DevVGA-SVGA3d-dx-dx11.cpp@ 100010

Last change on this file since 100010 was 100008, checked in by vboxsync, 2 years ago
Devices/Graphics: debug logging and assertions. bugref:9830
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1	/* $Id: DevVGA-SVGA3d-dx-dx11.cpp 100008 2023-05-30 07:05:05Z vboxsync $ */
2	/** @file
3	* DevVMWare - VMWare SVGA device
4	*/
5
6	/*
7	* Copyright (C) 2020-2023 Oracle and/or its affiliates.
8	*
9	* This file is part of VirtualBox base platform packages, as
10	* available from https://www.virtualbox.org.
11	*
12	* This program is free software; you can redistribute it and/or
13	* modify it under the terms of the GNU General Public License
14	* as published by the Free Software Foundation, in version 3 of the
15	* License.
16	*
17	* This program is distributed in the hope that it will be useful, but
18	* WITHOUT ANY WARRANTY; without even the implied warranty of
19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20	* General Public License for more details.
21	*
22	* You should have received a copy of the GNU General Public License
23	* along with this program; if not, see <https://www.gnu.org/licenses>.
24	*
25	* SPDX-License-Identifier: GPL-3.0-only
26	*/
27
28
29	/*********************************************************************************************************************************
30	* Header Files *
31	*********************************************************************************************************************************/
32	#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
33	#include <VBox/AssertGuest.h>
34	#include <VBox/log.h>
35	#include <VBox/vmm/pdmdev.h>
36	#include <VBox/vmm/pgm.h>
37
38	#include <iprt/assert.h>
39	#include <iprt/avl.h>
40	#include <iprt/errcore.h>
41	#include <iprt/mem.h>
42
43	#include <VBoxVideo.h> /* required by DevVGA.h */
44	#include <VBoxVideo3D.h>
45
46	/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
47	#include "DevVGA.h"
48
49	#include "DevVGA-SVGA.h"
50	#include "DevVGA-SVGA3d.h"
51	#include "DevVGA-SVGA3d-internal.h"
52	#include "DevVGA-SVGA3d-dx-shader.h"
53
54	/* d3d11_1.h has a structure field named 'Status' but Status is defined as int on Linux host */
55	#if defined(Status)
56	#undef Status
57	#endif
58	#include <d3d11_1.h>
59
60
61	#ifdef RT_OS_WINDOWS
62	# define VBOX_D3D11_LIBRARY_NAME "d3d11"
63	#else
64	# define VBOX_D3D11_LIBRARY_NAME "VBoxDxVk"
65	#endif
66
67	/* One ID3D11Device object is used for all VMSVGA contexts. */
68	/** @todo This should be the only option because VGPU freely uses surfaces from different VMSVGA contexts
69	* and synchronization of access to shared surfaces kills performance.
70	*/
71	#define DX_FORCE_SINGLE_DEVICE
72	/* A single staging ID3D11Buffer is used for uploading data to other buffers. */
73	#define DX_COMMON_STAGING_BUFFER
74	/* Always flush after submitting a draw call for debugging. */
75	//#define DX_FLUSH_AFTER_DRAW
76
77	/* This is not available on non Windows hosts. */
78	#ifndef D3D_RELEASE
79	# define D3D_RELEASE(a_Ptr) do { if ((a_Ptr)) (a_Ptr)->Release(); (a_Ptr) = NULL; } while (0)
80	#endif
81
82	/** Fake ID for the backend DX context. The context creates all shared textures. */
83	#define DX_CID_BACKEND UINT32_C(0xfffffffe)
84
85	#define D3D_RELEASE_ARRAY(a_Count, a_papArray) do { \
86	for (uint32_t i = 0; i < (a_Count); ++i) \
87	D3D_RELEASE((a_papArray)[i]); \
88	} while (0)
89
90	typedef struct D3D11BLITTER
91	{
92	ID3D11Device *pDevice;
93	ID3D11DeviceContext *pImmediateContext;
94
95	ID3D11VertexShader *pVertexShader;
96	ID3D11PixelShader *pPixelShader;
97	ID3D11SamplerState *pSamplerState;
98	ID3D11RasterizerState *pRasterizerState;
99	ID3D11BlendState *pBlendState;
100	} D3D11BLITTER;
101
102	typedef struct DXDEVICE
103	{
104	ID3D11Device1 pDevice; / Device. */
105	ID3D11DeviceContext1 pImmediateContext; / Corresponding context. */
106	IDXGIFactory pDxgiFactory; / DXGI Factory. */
107	D3D_FEATURE_LEVEL FeatureLevel;
108
109	#ifdef DX_COMMON_STAGING_BUFFER
110	/* Staging buffer for transfer to surface buffers. */
111	ID3D11Buffer pStagingBuffer; / The staging buffer resource. */
112	uint32_t cbStagingBuffer; /* Current size of the staging buffer resource. */
113	#endif
114
115	D3D11BLITTER Blitter; /* Blits one texture to another. */
116	} DXDEVICE;
117
118	/* Kind of a texture view. */
119	typedef enum VMSVGA3DBACKVIEWTYPE
120	{
121	VMSVGA3D_VIEWTYPE_NONE = 0,
122	VMSVGA3D_VIEWTYPE_RENDERTARGET = 1,
123	VMSVGA3D_VIEWTYPE_DEPTHSTENCIL = 2,
124	VMSVGA3D_VIEWTYPE_SHADERRESOURCE = 3,
125	VMSVGA3D_VIEWTYPE_UNORDEREDACCESS = 4
126	} VMSVGA3DBACKVIEWTYPE;
127
128	/* Information about a texture view to track all created views:.
129	* when a surface is invalidated, then all views must deleted;
130	* when a view is deleted, then the view must be unlinked from the surface.
131	*/
132	typedef struct DXVIEWINFO
133	{
134	uint32_t sid; /* Surface which the view was created for. */
135	uint32_t cid; /* DX context which created the view. */
136	uint32_t viewId; /* View id assigned by the guest. */
137	VMSVGA3DBACKVIEWTYPE enmViewType;
138	} DXVIEWINFO;
139
140	/* Context Object Table element for a texture view. */
141	typedef struct DXVIEW
142	{
143	uint32_t cid; /* DX context which created the view. */
144	uint32_t sid; /* Surface which the view was created for. */
145	uint32_t viewId; /* View id assigned by the guest. */
146	VMSVGA3DBACKVIEWTYPE enmViewType;
147
148	union
149	{
150	ID3D11View pView; / The view object. */
151	ID3D11RenderTargetView *pRenderTargetView;
152	ID3D11DepthStencilView *pDepthStencilView;
153	ID3D11ShaderResourceView *pShaderResourceView;
154	ID3D11UnorderedAccessView *pUnorderedAccessView;
155	} u;
156
157	RTLISTNODE nodeSurfaceView; /* Views are linked to the surface. */
158	} DXVIEW;
159
160	/* What kind of resource has been created for the VMSVGA3D surface. */
161	typedef enum VMSVGA3DBACKRESTYPE
162	{
163	VMSVGA3D_RESTYPE_NONE = 0,
164	VMSVGA3D_RESTYPE_SCREEN_TARGET = 1,
165	VMSVGA3D_RESTYPE_TEXTURE_1D = 2,
166	VMSVGA3D_RESTYPE_TEXTURE_2D = 3,
167	VMSVGA3D_RESTYPE_TEXTURE_CUBE = 4,
168	VMSVGA3D_RESTYPE_TEXTURE_3D = 5,
169	VMSVGA3D_RESTYPE_BUFFER = 6,
170	} VMSVGA3DBACKRESTYPE;
171
172	typedef struct VMSVGA3DBACKENDSURFACE
173	{
174	VMSVGA3DBACKRESTYPE enmResType;
175	DXGI_FORMAT enmDxgiFormat;
176	union
177	{
178	ID3D11Resource *pResource;
179	ID3D11Texture1D *pTexture1D;
180	ID3D11Texture2D *pTexture2D;
181	ID3D11Texture3D *pTexture3D;
182	ID3D11Buffer *pBuffer;
183	} u;
184
185	/* For updates from memory. */
186	union /** @todo One per format. */
187	{
188	ID3D11Resource *pResource;
189	ID3D11Texture1D *pTexture1D;
190	ID3D11Texture2D *pTexture2D;
191	ID3D11Texture3D *pTexture3D;
192	#ifndef DX_COMMON_STAGING_BUFFER
193	ID3D11Buffer *pBuffer;
194	#endif
195	} dynamic;
196
197	/* For reading the texture content. */
198	union /** @todo One per format. */
199	{
200	ID3D11Resource *pResource;
201	ID3D11Texture1D *pTexture1D;
202	ID3D11Texture2D *pTexture2D;
203	ID3D11Texture3D *pTexture3D;
204	#ifndef DX_COMMON_STAGING_BUFFER
205	ID3D11Buffer *pBuffer;
206	#endif
207	} staging;
208
209	/* Screen targets are created as shared surfaces. */
210	HANDLE SharedHandle; /* The shared handle of this structure. */
211
212	/* DX context which last rendered to the texture.
213	* This is only for render targets and screen targets, which can be shared between contexts.
214	* The backend context (cid == DX_CID_BACKEND) can also be a drawing context.
215	*/
216	uint32_t cidDrawing;
217
218	/** AVL tree containing DXSHAREDTEXTURE structures. */
219	AVLU32TREE SharedTextureTree;
220
221	/* Render target views, depth stencil views and shader resource views created for this texture or buffer. */
222	RTLISTANCHOR listView; /* DXVIEW */
223
224	} VMSVGA3DBACKENDSURFACE;
225
226	/* "The only resources that can be shared are 2D non-mipmapped textures." */
227	typedef struct DXSHAREDTEXTURE
228	{
229	AVLU32NODECORE Core; /* Key is context id which opened this texture. */
230	ID3D11Texture2D pTexture; / The opened shared texture. */
231	uint32_t sid; /* Surface id. */
232	} DXSHAREDTEXTURE;
233
234
235	typedef struct VMSVGAHWSCREEN
236	{
237	ID3D11Texture2D pTexture; / Shared texture for the screen content. Only used as CopyResource target. */
238	IDXGIResource pDxgiResource; / Interface of the texture. */
239	IDXGIKeyedMutex pDXGIKeyedMutex; / Synchronization interface for the render device. */
240	HANDLE SharedHandle; /* The shared handle of this structure. */
241	uint32_t sidScreenTarget; /* The source surface for this screen. */
242	} VMSVGAHWSCREEN;
243
244
245	typedef struct DXELEMENTLAYOUT
246	{
247	ID3D11InputLayout *pElementLayout;
248	uint32_t cElementDesc;
249	D3D11_INPUT_ELEMENT_DESC aElementDesc[32];
250	} DXELEMENTLAYOUT;
251
252	typedef struct DXSHADER
253	{
254	SVGA3dShaderType enmShaderType;
255	union
256	{
257	ID3D11DeviceChild pShader; / All. */
258	ID3D11VertexShader pVertexShader; / SVGA3D_SHADERTYPE_VS */
259	ID3D11PixelShader pPixelShader; / SVGA3D_SHADERTYPE_PS */
260	ID3D11GeometryShader pGeometryShader; / SVGA3D_SHADERTYPE_GS */
261	ID3D11HullShader pHullShader; / SVGA3D_SHADERTYPE_HS */
262	ID3D11DomainShader pDomainShader; / SVGA3D_SHADERTYPE_DS */
263	ID3D11ComputeShader pComputeShader; / SVGA3D_SHADERTYPE_CS */
264	};
265	void *pvDXBC;
266	uint32_t cbDXBC;
267
268	uint32_t soid; /* Stream output declarations for geometry shaders. */
269
270	DXShaderInfo shaderInfo;
271	} DXSHADER;
272
273	typedef struct DXQUERY
274	{
275	union
276	{
277	ID3D11Query *pQuery;
278	ID3D11Predicate *pPredicate;
279	};
280	} DXQUERY;
281
282	typedef struct DXSTREAMOUTPUT
283	{
284	UINT cDeclarationEntry;
285	D3D11_SO_DECLARATION_ENTRY aDeclarationEntry[SVGA3D_MAX_STREAMOUT_DECLS];
286	} DXSTREAMOUTPUT;
287
288	typedef struct DXBOUNDVERTEXBUFFER
289	{
290	ID3D11Buffer *pBuffer;
291	uint32_t stride;
292	uint32_t offset;
293	} DXBOUNDVERTEXBUFFER;
294
295	typedef struct DXBOUNDINDEXBUFFER
296	{
297	ID3D11Buffer *pBuffer;
298	DXGI_FORMAT indexBufferFormat;
299	uint32_t indexBufferOffset;
300	} DXBOUNDINDEXBUFFER;
301
302	typedef struct DXBOUNDRESOURCES /* Currently bound resources. Mirror SVGADXContextMobFormat structure. */
303	{
304	struct
305	{
306	DXBOUNDVERTEXBUFFER vertexBuffers[SVGA3D_DX_MAX_VERTEXBUFFERS];
307	DXBOUNDINDEXBUFFER indexBuffer;
308	} inputAssembly;
309	struct
310	{
311	ID3D11Buffer *constantBuffers[SVGA3D_DX_MAX_CONSTBUFFERS];
312	} shaderState[SVGA3D_NUM_SHADERTYPE];
313	} DXBOUNDRESOURCES;
314
315
316	typedef struct VMSVGA3DBACKENDDXCONTEXT
317	{
318	DXDEVICE dxDevice; /* DX device interfaces for this context operations. */
319
320	/* Arrays for Context-Object Tables. Number of entries depends on COTable size. */
321	uint32_t cBlendState; /* Number of entries in the papBlendState array. */
322	uint32_t cDepthStencilState; /* papDepthStencilState */
323	uint32_t cSamplerState; /* papSamplerState */
324	uint32_t cRasterizerState; /* papRasterizerState */
325	uint32_t cElementLayout; /* paElementLayout */
326	uint32_t cRenderTargetView; /* paRenderTargetView */
327	uint32_t cDepthStencilView; /* paDepthStencilView */
328	uint32_t cShaderResourceView; /* paShaderResourceView */
329	uint32_t cQuery; /* paQuery */
330	uint32_t cShader; /* paShader */
331	uint32_t cStreamOutput; /* paStreamOutput */
332	uint32_t cUnorderedAccessView; /* paUnorderedAccessView */
333	ID3D11BlendState **papBlendState;
334	ID3D11DepthStencilState **papDepthStencilState;
335	ID3D11SamplerState **papSamplerState;
336	ID3D11RasterizerState **papRasterizerState;
337	DXELEMENTLAYOUT *paElementLayout;
338	DXVIEW *paRenderTargetView;
339	DXVIEW *paDepthStencilView;
340	DXVIEW *paShaderResourceView;
341	DXQUERY *paQuery;
342	DXSHADER *paShader;
343	DXSTREAMOUTPUT *paStreamOutput;
344	DXVIEW *paUnorderedAccessView;
345
346	uint32_t cSOTarget; /* How many SO targets are currently set (SetSOTargets) */
347
348	DXBOUNDRESOURCES resources;
349	} VMSVGA3DBACKENDDXCONTEXT;
350
351	/* Shader disassembler function. Optional. */
352	typedef HRESULT FN_D3D_DISASSEMBLE(LPCVOID pSrcData, SIZE_T SrcDataSize, UINT Flags, LPCSTR szComments, ID3D10Blob **ppDisassembly);
353	typedef FN_D3D_DISASSEMBLE *PFN_D3D_DISASSEMBLE;
354
355	typedef struct VMSVGA3DBACKEND
356	{
357	RTLDRMOD hD3D11;
358	PFN_D3D11_CREATE_DEVICE pfnD3D11CreateDevice;
359
360	RTLDRMOD hD3DCompiler;
361	PFN_D3D_DISASSEMBLE pfnD3DDisassemble;
362
363	DXDEVICE dxDevice; /* Device for the VMSVGA3D context independent operation. */
364
365	DXBOUNDRESOURCES resources; /* What is currently applied to the pipeline. */
366
367	bool fSingleDevice; /* Whether to use one DX device for all guest contexts. */
368
369	/** @todo Here a set of functions which do different job in single and multiple device modes. */
370	} VMSVGA3DBACKEND;
371
372
373	/* Static function prototypes. */
374	static int dxDeviceFlush(DXDEVICE *pDevice);
375	static int dxDefineShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId, SVGACOTableDXSRViewEntry const *pEntry);
376	static int dxDefineUnorderedAccessView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId uaViewId, SVGACOTableDXUAViewEntry const *pEntry);
377	static int dxDefineRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGACOTableDXRTViewEntry const *pEntry);
378	static int dxDefineDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, SVGACOTableDXDSViewEntry const *pEntry);
379	static int dxSetRenderTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext);
380	static int dxSetCSUnorderedAccessViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext);
381	static DECLCALLBACK(void) vmsvga3dBackSurfaceDestroy(PVGASTATECC pThisCC, bool fClearCOTableEntry, PVMSVGA3DSURFACE pSurface);
382	static int dxDestroyShader(DXSHADER *pDXShader);
383	static int dxDestroyQuery(DXQUERY *pDXQuery);
384	static int dxReadBuffer(DXDEVICE pDevice, ID3D11Buffer pBuffer, UINT Offset, UINT Bytes, void *ppvData, uint32_t pcbData);
385
386	static HRESULT BlitInit(D3D11BLITTER pBlitter, ID3D11Device pDevice, ID3D11DeviceContext *pImmediateContext);
387	static void BlitRelease(D3D11BLITTER *pBlitter);
388
389
390	/* This is not available with the DXVK headers for some reason. */
391	#ifndef RT_OS_WINDOWS
392	typedef enum D3D11_TEXTURECUBE_FACE {
393	D3D11_TEXTURECUBE_FACE_POSITIVE_X,
394	D3D11_TEXTURECUBE_FACE_NEGATIVE_X,
395	D3D11_TEXTURECUBE_FACE_POSITIVE_Y,
396	D3D11_TEXTURECUBE_FACE_NEGATIVE_Y,
397	D3D11_TEXTURECUBE_FACE_POSITIVE_Z,
398	D3D11_TEXTURECUBE_FACE_NEGATIVE_Z
399	} D3D11_TEXTURECUBE_FACE;
400	#endif
401
402
403	DECLINLINE(D3D11_TEXTURECUBE_FACE) vmsvga3dCubemapFaceFromIndex(uint32_t iFace)
404	{
405	D3D11_TEXTURECUBE_FACE Face;
406	switch (iFace)
407	{
408	case 0: Face = D3D11_TEXTURECUBE_FACE_POSITIVE_X; break;
409	case 1: Face = D3D11_TEXTURECUBE_FACE_NEGATIVE_X; break;
410	case 2: Face = D3D11_TEXTURECUBE_FACE_POSITIVE_Y; break;
411	case 3: Face = D3D11_TEXTURECUBE_FACE_NEGATIVE_Y; break;
412	case 4: Face = D3D11_TEXTURECUBE_FACE_POSITIVE_Z; break;
413	default:
414	case 5: Face = D3D11_TEXTURECUBE_FACE_NEGATIVE_Z; break;
415	}
416	return Face;
417	}
418
419	/* This is to workaround issues with X8 formats, because they can't be used in some operations. */
420	#define DX_REPLACE_X8_WITH_A8
421	static DXGI_FORMAT vmsvgaDXSurfaceFormat2Dxgi(SVGA3dSurfaceFormat format)
422	{
423	/* Ensure that correct headers are used.
424	* SVGA3D_AYUV was equal to 45, then replaced with SVGA3D_FORMAT_DEAD2 = 45, and redefined as SVGA3D_AYUV = 152.
425	*/
426	AssertCompile(SVGA3D_AYUV == 152);
427
428	#define DXGI_FORMAT_ DXGI_FORMAT_UNKNOWN
429	/** @todo More formats. */
430	switch (format)
431	{
432	#ifdef DX_REPLACE_X8_WITH_A8
433	case SVGA3D_X8R8G8B8: return DXGI_FORMAT_B8G8R8A8_UNORM;
434	#else
435	case SVGA3D_X8R8G8B8: return DXGI_FORMAT_B8G8R8X8_UNORM;
436	#endif
437	case SVGA3D_A8R8G8B8: return DXGI_FORMAT_B8G8R8A8_UNORM;
438	case SVGA3D_R5G6B5: return DXGI_FORMAT_B5G6R5_UNORM;
439	case SVGA3D_X1R5G5B5: return DXGI_FORMAT_B5G5R5A1_UNORM;
440	case SVGA3D_A1R5G5B5: return DXGI_FORMAT_B5G5R5A1_UNORM;
441	case SVGA3D_A4R4G4B4: break; // 11.1 return DXGI_FORMAT_B4G4R4A4_UNORM;
442	case SVGA3D_Z_D32: break;
443	case SVGA3D_Z_D16: return DXGI_FORMAT_D16_UNORM;
444	case SVGA3D_Z_D24S8: return DXGI_FORMAT_D24_UNORM_S8_UINT;
445	case SVGA3D_Z_D15S1: break;
446	case SVGA3D_LUMINANCE8: return DXGI_FORMAT_;
447	case SVGA3D_LUMINANCE4_ALPHA4: return DXGI_FORMAT_;
448	case SVGA3D_LUMINANCE16: return DXGI_FORMAT_;
449	case SVGA3D_LUMINANCE8_ALPHA8: return DXGI_FORMAT_;
450	case SVGA3D_DXT1: return DXGI_FORMAT_;
451	case SVGA3D_DXT2: return DXGI_FORMAT_;
452	case SVGA3D_DXT3: return DXGI_FORMAT_;
453	case SVGA3D_DXT4: return DXGI_FORMAT_;
454	case SVGA3D_DXT5: return DXGI_FORMAT_;
455	case SVGA3D_BUMPU8V8: return DXGI_FORMAT_;
456	case SVGA3D_BUMPL6V5U5: return DXGI_FORMAT_;
457	case SVGA3D_BUMPX8L8V8U8: return DXGI_FORMAT_;
458	case SVGA3D_FORMAT_DEAD1: break;
459	case SVGA3D_ARGB_S10E5: return DXGI_FORMAT_;
460	case SVGA3D_ARGB_S23E8: return DXGI_FORMAT_;
461	case SVGA3D_A2R10G10B10: return DXGI_FORMAT_;
462	case SVGA3D_V8U8: return DXGI_FORMAT_;
463	case SVGA3D_Q8W8V8U8: return DXGI_FORMAT_;
464	case SVGA3D_CxV8U8: return DXGI_FORMAT_;
465	case SVGA3D_X8L8V8U8: return DXGI_FORMAT_;
466	case SVGA3D_A2W10V10U10: return DXGI_FORMAT_;
467	case SVGA3D_ALPHA8: return DXGI_FORMAT_;
468	case SVGA3D_R_S10E5: return DXGI_FORMAT_;
469	case SVGA3D_R_S23E8: return DXGI_FORMAT_;
470	case SVGA3D_RG_S10E5: return DXGI_FORMAT_;
471	case SVGA3D_RG_S23E8: return DXGI_FORMAT_;
472	case SVGA3D_BUFFER: return DXGI_FORMAT_;
473	case SVGA3D_Z_D24X8: return DXGI_FORMAT_;
474	case SVGA3D_V16U16: return DXGI_FORMAT_;
475	case SVGA3D_G16R16: return DXGI_FORMAT_;
476	case SVGA3D_A16B16G16R16: return DXGI_FORMAT_;
477	case SVGA3D_UYVY: return DXGI_FORMAT_;
478	case SVGA3D_YUY2: return DXGI_FORMAT_;
479	case SVGA3D_NV12: return DXGI_FORMAT_;
480	case SVGA3D_FORMAT_DEAD2: break; /* Old SVGA3D_AYUV */
481	case SVGA3D_R32G32B32A32_TYPELESS: return DXGI_FORMAT_R32G32B32A32_TYPELESS;
482	case SVGA3D_R32G32B32A32_UINT: return DXGI_FORMAT_R32G32B32A32_UINT;
483	case SVGA3D_R32G32B32A32_SINT: return DXGI_FORMAT_R32G32B32A32_SINT;
484	case SVGA3D_R32G32B32_TYPELESS: return DXGI_FORMAT_R32G32B32_TYPELESS;
485	case SVGA3D_R32G32B32_FLOAT: return DXGI_FORMAT_R32G32B32_FLOAT;
486	case SVGA3D_R32G32B32_UINT: return DXGI_FORMAT_R32G32B32_UINT;
487	case SVGA3D_R32G32B32_SINT: return DXGI_FORMAT_R32G32B32_SINT;
488	case SVGA3D_R16G16B16A16_TYPELESS: return DXGI_FORMAT_R16G16B16A16_TYPELESS;
489	case SVGA3D_R16G16B16A16_UINT: return DXGI_FORMAT_R16G16B16A16_UINT;
490	case SVGA3D_R16G16B16A16_SNORM: return DXGI_FORMAT_R16G16B16A16_SNORM;
491	case SVGA3D_R16G16B16A16_SINT: return DXGI_FORMAT_R16G16B16A16_SINT;
492	case SVGA3D_R32G32_TYPELESS: return DXGI_FORMAT_R32G32_TYPELESS;
493	case SVGA3D_R32G32_UINT: return DXGI_FORMAT_R32G32_UINT;
494	case SVGA3D_R32G32_SINT: return DXGI_FORMAT_R32G32_SINT;
495	case SVGA3D_R32G8X24_TYPELESS: return DXGI_FORMAT_R32G8X24_TYPELESS;
496	case SVGA3D_D32_FLOAT_S8X24_UINT: return DXGI_FORMAT_D32_FLOAT_S8X24_UINT;
497	case SVGA3D_R32_FLOAT_X8X24: return DXGI_FORMAT_R32_FLOAT_X8X24_TYPELESS;
498	case SVGA3D_X32_G8X24_UINT: return DXGI_FORMAT_X32_TYPELESS_G8X24_UINT;
499	case SVGA3D_R10G10B10A2_TYPELESS: return DXGI_FORMAT_R10G10B10A2_TYPELESS;
500	case SVGA3D_R10G10B10A2_UINT: return DXGI_FORMAT_R10G10B10A2_UINT;
501	case SVGA3D_R11G11B10_FLOAT: return DXGI_FORMAT_R11G11B10_FLOAT;
502	case SVGA3D_R8G8B8A8_TYPELESS: return DXGI_FORMAT_R8G8B8A8_TYPELESS;
503	case SVGA3D_R8G8B8A8_UNORM: return DXGI_FORMAT_R8G8B8A8_UNORM;
504	case SVGA3D_R8G8B8A8_UNORM_SRGB: return DXGI_FORMAT_R8G8B8A8_UNORM_SRGB;
505	case SVGA3D_R8G8B8A8_UINT: return DXGI_FORMAT_R8G8B8A8_UINT;
506	case SVGA3D_R8G8B8A8_SINT: return DXGI_FORMAT_R8G8B8A8_SINT;
507	case SVGA3D_R16G16_TYPELESS: return DXGI_FORMAT_R16G16_TYPELESS;
508	case SVGA3D_R16G16_UINT: return DXGI_FORMAT_R16G16_UINT;
509	case SVGA3D_R16G16_SINT: return DXGI_FORMAT_R16G16_SINT;
510	case SVGA3D_R32_TYPELESS: return DXGI_FORMAT_R32_TYPELESS;
511	case SVGA3D_D32_FLOAT: return DXGI_FORMAT_D32_FLOAT;
512	case SVGA3D_R32_UINT: return DXGI_FORMAT_R32_UINT;
513	case SVGA3D_R32_SINT: return DXGI_FORMAT_R32_SINT;
514	case SVGA3D_R24G8_TYPELESS: return DXGI_FORMAT_R24G8_TYPELESS;
515	case SVGA3D_D24_UNORM_S8_UINT: return DXGI_FORMAT_D24_UNORM_S8_UINT;
516	case SVGA3D_R24_UNORM_X8: return DXGI_FORMAT_R24_UNORM_X8_TYPELESS;
517	case SVGA3D_X24_G8_UINT: return DXGI_FORMAT_X24_TYPELESS_G8_UINT;
518	case SVGA3D_R8G8_TYPELESS: return DXGI_FORMAT_R8G8_TYPELESS;
519	case SVGA3D_R8G8_UNORM: return DXGI_FORMAT_R8G8_UNORM;
520	case SVGA3D_R8G8_UINT: return DXGI_FORMAT_R8G8_UINT;
521	case SVGA3D_R8G8_SINT: return DXGI_FORMAT_R8G8_SINT;
522	case SVGA3D_R16_TYPELESS: return DXGI_FORMAT_R16_TYPELESS;
523	case SVGA3D_R16_UNORM: return DXGI_FORMAT_R16_UNORM;
524	case SVGA3D_R16_UINT: return DXGI_FORMAT_R16_UINT;
525	case SVGA3D_R16_SNORM: return DXGI_FORMAT_R16_SNORM;
526	case SVGA3D_R16_SINT: return DXGI_FORMAT_R16_SINT;
527	case SVGA3D_R8_TYPELESS: return DXGI_FORMAT_R8_TYPELESS;
528	case SVGA3D_R8_UNORM: return DXGI_FORMAT_R8_UNORM;
529	case SVGA3D_R8_UINT: return DXGI_FORMAT_R8_UINT;
530	case SVGA3D_R8_SNORM: return DXGI_FORMAT_R8_SNORM;
531	case SVGA3D_R8_SINT: return DXGI_FORMAT_R8_SINT;
532	case SVGA3D_P8: break;
533	case SVGA3D_R9G9B9E5_SHAREDEXP: return DXGI_FORMAT_R9G9B9E5_SHAREDEXP;
534	case SVGA3D_R8G8_B8G8_UNORM: return DXGI_FORMAT_R8G8_B8G8_UNORM;
535	case SVGA3D_G8R8_G8B8_UNORM: return DXGI_FORMAT_G8R8_G8B8_UNORM;
536	case SVGA3D_BC1_TYPELESS: return DXGI_FORMAT_BC1_TYPELESS;
537	case SVGA3D_BC1_UNORM_SRGB: return DXGI_FORMAT_BC1_UNORM_SRGB;
538	case SVGA3D_BC2_TYPELESS: return DXGI_FORMAT_BC2_TYPELESS;
539	case SVGA3D_BC2_UNORM_SRGB: return DXGI_FORMAT_BC2_UNORM_SRGB;
540	case SVGA3D_BC3_TYPELESS: return DXGI_FORMAT_BC3_TYPELESS;
541	case SVGA3D_BC3_UNORM_SRGB: return DXGI_FORMAT_BC3_UNORM_SRGB;
542	case SVGA3D_BC4_TYPELESS: return DXGI_FORMAT_BC4_TYPELESS;
543	case SVGA3D_ATI1: break;
544	case SVGA3D_BC4_SNORM: return DXGI_FORMAT_BC4_SNORM;
545	case SVGA3D_BC5_TYPELESS: return DXGI_FORMAT_BC5_TYPELESS;
546	case SVGA3D_ATI2: break;
547	case SVGA3D_BC5_SNORM: return DXGI_FORMAT_BC5_SNORM;
548	case SVGA3D_R10G10B10_XR_BIAS_A2_UNORM: return DXGI_FORMAT_R10G10B10_XR_BIAS_A2_UNORM;
549	case SVGA3D_B8G8R8A8_TYPELESS: return DXGI_FORMAT_B8G8R8A8_TYPELESS;
550	case SVGA3D_B8G8R8A8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8A8_UNORM_SRGB;
551	#ifdef DX_REPLACE_X8_WITH_A8
552	case SVGA3D_B8G8R8X8_TYPELESS: return DXGI_FORMAT_B8G8R8A8_TYPELESS;
553	case SVGA3D_B8G8R8X8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8A8_UNORM_SRGB;
554	#else
555	case SVGA3D_B8G8R8X8_TYPELESS: return DXGI_FORMAT_B8G8R8X8_TYPELESS;
556	case SVGA3D_B8G8R8X8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8X8_UNORM_SRGB;
557	#endif
558	case SVGA3D_Z_DF16: break;
559	case SVGA3D_Z_DF24: break;
560	case SVGA3D_Z_D24S8_INT: return DXGI_FORMAT_D24_UNORM_S8_UINT;
561	case SVGA3D_YV12: break;
562	case SVGA3D_R32G32B32A32_FLOAT: return DXGI_FORMAT_R32G32B32A32_FLOAT;
563	case SVGA3D_R16G16B16A16_FLOAT: return DXGI_FORMAT_R16G16B16A16_FLOAT;
564	case SVGA3D_R16G16B16A16_UNORM: return DXGI_FORMAT_R16G16B16A16_UNORM;
565	case SVGA3D_R32G32_FLOAT: return DXGI_FORMAT_R32G32_FLOAT;
566	case SVGA3D_R10G10B10A2_UNORM: return DXGI_FORMAT_R10G10B10A2_UNORM;
567	case SVGA3D_R8G8B8A8_SNORM: return DXGI_FORMAT_R8G8B8A8_SNORM;
568	case SVGA3D_R16G16_FLOAT: return DXGI_FORMAT_R16G16_FLOAT;
569	case SVGA3D_R16G16_UNORM: return DXGI_FORMAT_R16G16_UNORM;
570	case SVGA3D_R16G16_SNORM: return DXGI_FORMAT_R16G16_SNORM;
571	case SVGA3D_R32_FLOAT: return DXGI_FORMAT_R32_FLOAT;
572	case SVGA3D_R8G8_SNORM: return DXGI_FORMAT_R8G8_SNORM;
573	case SVGA3D_R16_FLOAT: return DXGI_FORMAT_R16_FLOAT;
574	case SVGA3D_D16_UNORM: return DXGI_FORMAT_D16_UNORM;
575	case SVGA3D_A8_UNORM: return DXGI_FORMAT_A8_UNORM;
576	case SVGA3D_BC1_UNORM: return DXGI_FORMAT_BC1_UNORM;
577	case SVGA3D_BC2_UNORM: return DXGI_FORMAT_BC2_UNORM;
578	case SVGA3D_BC3_UNORM: return DXGI_FORMAT_BC3_UNORM;
579	case SVGA3D_B5G6R5_UNORM: return DXGI_FORMAT_B5G6R5_UNORM;
580	case SVGA3D_B5G5R5A1_UNORM: return DXGI_FORMAT_B5G5R5A1_UNORM;
581	case SVGA3D_B8G8R8A8_UNORM: return DXGI_FORMAT_B8G8R8A8_UNORM;
582	#ifdef DX_REPLACE_X8_WITH_A8
583	case SVGA3D_B8G8R8X8_UNORM: return DXGI_FORMAT_B8G8R8A8_UNORM;
584	#else
585	case SVGA3D_B8G8R8X8_UNORM: return DXGI_FORMAT_B8G8R8X8_UNORM;
586	#endif
587	case SVGA3D_BC4_UNORM: return DXGI_FORMAT_BC4_UNORM;
588	case SVGA3D_BC5_UNORM: return DXGI_FORMAT_BC5_UNORM;
589
590	case SVGA3D_B4G4R4A4_UNORM: return DXGI_FORMAT_;
591	case SVGA3D_BC6H_TYPELESS: return DXGI_FORMAT_BC6H_TYPELESS;
592	case SVGA3D_BC6H_UF16: return DXGI_FORMAT_BC6H_UF16;
593	case SVGA3D_BC6H_SF16: return DXGI_FORMAT_BC6H_SF16;
594	case SVGA3D_BC7_TYPELESS: return DXGI_FORMAT_BC7_TYPELESS;
595	case SVGA3D_BC7_UNORM: return DXGI_FORMAT_BC7_UNORM;
596	case SVGA3D_BC7_UNORM_SRGB: return DXGI_FORMAT_BC7_UNORM_SRGB;
597	case SVGA3D_AYUV: return DXGI_FORMAT_;
598
599	case SVGA3D_FORMAT_INVALID:
600	case SVGA3D_FORMAT_MAX: break;
601	}
602	// AssertFailed();
603	return DXGI_FORMAT_UNKNOWN;
604	#undef DXGI_FORMAT_
605	}
606
607
608	static SVGA3dSurfaceFormat vmsvgaDXDevCapSurfaceFmt2Format(SVGA3dDevCapIndex enmDevCap)
609	{
610	switch (enmDevCap)
611	{
612	case SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8: return SVGA3D_X8R8G8B8;
613	case SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8: return SVGA3D_A8R8G8B8;
614	case SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10: return SVGA3D_A2R10G10B10;
615	case SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5: return SVGA3D_X1R5G5B5;
616	case SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5: return SVGA3D_A1R5G5B5;
617	case SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4: return SVGA3D_A4R4G4B4;
618	case SVGA3D_DEVCAP_SURFACEFMT_R5G6B5: return SVGA3D_R5G6B5;
619	case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16: return SVGA3D_LUMINANCE16;
620	case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8: return SVGA3D_LUMINANCE8_ALPHA8;
621	case SVGA3D_DEVCAP_SURFACEFMT_ALPHA8: return SVGA3D_ALPHA8;
622	case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8: return SVGA3D_LUMINANCE8;
623	case SVGA3D_DEVCAP_SURFACEFMT_Z_D16: return SVGA3D_Z_D16;
624	case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8: return SVGA3D_Z_D24S8;
625	case SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8: return SVGA3D_Z_D24X8;
626	case SVGA3D_DEVCAP_SURFACEFMT_DXT1: return SVGA3D_DXT1;
627	case SVGA3D_DEVCAP_SURFACEFMT_DXT2: return SVGA3D_DXT2;
628	case SVGA3D_DEVCAP_SURFACEFMT_DXT3: return SVGA3D_DXT3;
629	case SVGA3D_DEVCAP_SURFACEFMT_DXT4: return SVGA3D_DXT4;
630	case SVGA3D_DEVCAP_SURFACEFMT_DXT5: return SVGA3D_DXT5;
631	case SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8: return SVGA3D_BUMPX8L8V8U8;
632	case SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10: return SVGA3D_A2W10V10U10;
633	case SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8: return SVGA3D_BUMPU8V8;
634	case SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8: return SVGA3D_Q8W8V8U8;
635	case SVGA3D_DEVCAP_SURFACEFMT_CxV8U8: return SVGA3D_CxV8U8;
636	case SVGA3D_DEVCAP_SURFACEFMT_R_S10E5: return SVGA3D_R_S10E5;
637	case SVGA3D_DEVCAP_SURFACEFMT_R_S23E8: return SVGA3D_R_S23E8;
638	case SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5: return SVGA3D_RG_S10E5;
639	case SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8: return SVGA3D_RG_S23E8;
640	case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5: return SVGA3D_ARGB_S10E5;
641	case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8: return SVGA3D_ARGB_S23E8;
642	case SVGA3D_DEVCAP_SURFACEFMT_V16U16: return SVGA3D_V16U16;
643	case SVGA3D_DEVCAP_SURFACEFMT_G16R16: return SVGA3D_G16R16;
644	case SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16: return SVGA3D_A16B16G16R16;
645	case SVGA3D_DEVCAP_SURFACEFMT_UYVY: return SVGA3D_UYVY;
646	case SVGA3D_DEVCAP_SURFACEFMT_YUY2: return SVGA3D_YUY2;
647	case SVGA3D_DEVCAP_SURFACEFMT_NV12: return SVGA3D_NV12;
648	case SVGA3D_DEVCAP_DEAD10: return SVGA3D_FORMAT_DEAD2; /* SVGA3D_DEVCAP_SURFACEFMT_AYUV -> SVGA3D_AYUV */
649	case SVGA3D_DEVCAP_SURFACEFMT_Z_DF16: return SVGA3D_Z_DF16;
650	case SVGA3D_DEVCAP_SURFACEFMT_Z_DF24: return SVGA3D_Z_DF24;
651	case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT: return SVGA3D_Z_D24S8_INT;
652	case SVGA3D_DEVCAP_SURFACEFMT_ATI1: return SVGA3D_ATI1;
653	case SVGA3D_DEVCAP_SURFACEFMT_ATI2: return SVGA3D_ATI2;
654	case SVGA3D_DEVCAP_SURFACEFMT_YV12: return SVGA3D_YV12;
655	default:
656	AssertFailed();
657	break;
658	}
659	return SVGA3D_FORMAT_INVALID;
660	}
661
662
663	static SVGA3dSurfaceFormat vmsvgaDXDevCapDxfmt2Format(SVGA3dDevCapIndex enmDevCap)
664	{
665	switch (enmDevCap)
666	{
667	case SVGA3D_DEVCAP_DXFMT_X8R8G8B8: return SVGA3D_X8R8G8B8;
668	case SVGA3D_DEVCAP_DXFMT_A8R8G8B8: return SVGA3D_A8R8G8B8;
669	case SVGA3D_DEVCAP_DXFMT_R5G6B5: return SVGA3D_R5G6B5;
670	case SVGA3D_DEVCAP_DXFMT_X1R5G5B5: return SVGA3D_X1R5G5B5;
671	case SVGA3D_DEVCAP_DXFMT_A1R5G5B5: return SVGA3D_A1R5G5B5;
672	case SVGA3D_DEVCAP_DXFMT_A4R4G4B4: return SVGA3D_A4R4G4B4;
673	case SVGA3D_DEVCAP_DXFMT_Z_D32: return SVGA3D_Z_D32;
674	case SVGA3D_DEVCAP_DXFMT_Z_D16: return SVGA3D_Z_D16;
675	case SVGA3D_DEVCAP_DXFMT_Z_D24S8: return SVGA3D_Z_D24S8;
676	case SVGA3D_DEVCAP_DXFMT_Z_D15S1: return SVGA3D_Z_D15S1;
677	case SVGA3D_DEVCAP_DXFMT_LUMINANCE8: return SVGA3D_LUMINANCE8;
678	case SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4: return SVGA3D_LUMINANCE4_ALPHA4;
679	case SVGA3D_DEVCAP_DXFMT_LUMINANCE16: return SVGA3D_LUMINANCE16;
680	case SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8: return SVGA3D_LUMINANCE8_ALPHA8;
681	case SVGA3D_DEVCAP_DXFMT_DXT1: return SVGA3D_DXT1;
682	case SVGA3D_DEVCAP_DXFMT_DXT2: return SVGA3D_DXT2;
683	case SVGA3D_DEVCAP_DXFMT_DXT3: return SVGA3D_DXT3;
684	case SVGA3D_DEVCAP_DXFMT_DXT4: return SVGA3D_DXT4;
685	case SVGA3D_DEVCAP_DXFMT_DXT5: return SVGA3D_DXT5;
686	case SVGA3D_DEVCAP_DXFMT_BUMPU8V8: return SVGA3D_BUMPU8V8;
687	case SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5: return SVGA3D_BUMPL6V5U5;
688	case SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8: return SVGA3D_BUMPX8L8V8U8;
689	case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1: return SVGA3D_FORMAT_DEAD1;
690	case SVGA3D_DEVCAP_DXFMT_ARGB_S10E5: return SVGA3D_ARGB_S10E5;
691	case SVGA3D_DEVCAP_DXFMT_ARGB_S23E8: return SVGA3D_ARGB_S23E8;
692	case SVGA3D_DEVCAP_DXFMT_A2R10G10B10: return SVGA3D_A2R10G10B10;
693	case SVGA3D_DEVCAP_DXFMT_V8U8: return SVGA3D_V8U8;
694	case SVGA3D_DEVCAP_DXFMT_Q8W8V8U8: return SVGA3D_Q8W8V8U8;
695	case SVGA3D_DEVCAP_DXFMT_CxV8U8: return SVGA3D_CxV8U8;
696	case SVGA3D_DEVCAP_DXFMT_X8L8V8U8: return SVGA3D_X8L8V8U8;
697	case SVGA3D_DEVCAP_DXFMT_A2W10V10U10: return SVGA3D_A2W10V10U10;
698	case SVGA3D_DEVCAP_DXFMT_ALPHA8: return SVGA3D_ALPHA8;
699	case SVGA3D_DEVCAP_DXFMT_R_S10E5: return SVGA3D_R_S10E5;
700	case SVGA3D_DEVCAP_DXFMT_R_S23E8: return SVGA3D_R_S23E8;
701	case SVGA3D_DEVCAP_DXFMT_RG_S10E5: return SVGA3D_RG_S10E5;
702	case SVGA3D_DEVCAP_DXFMT_RG_S23E8: return SVGA3D_RG_S23E8;
703	case SVGA3D_DEVCAP_DXFMT_BUFFER: return SVGA3D_BUFFER;
704	case SVGA3D_DEVCAP_DXFMT_Z_D24X8: return SVGA3D_Z_D24X8;
705	case SVGA3D_DEVCAP_DXFMT_V16U16: return SVGA3D_V16U16;
706	case SVGA3D_DEVCAP_DXFMT_G16R16: return SVGA3D_G16R16;
707	case SVGA3D_DEVCAP_DXFMT_A16B16G16R16: return SVGA3D_A16B16G16R16;
708	case SVGA3D_DEVCAP_DXFMT_UYVY: return SVGA3D_UYVY;
709	case SVGA3D_DEVCAP_DXFMT_YUY2: return SVGA3D_YUY2;
710	case SVGA3D_DEVCAP_DXFMT_NV12: return SVGA3D_NV12;
711	case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD2: return SVGA3D_FORMAT_DEAD2; /* SVGA3D_DEVCAP_DXFMT_AYUV -> SVGA3D_AYUV */
712	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS: return SVGA3D_R32G32B32A32_TYPELESS;
713	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT: return SVGA3D_R32G32B32A32_UINT;
714	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT: return SVGA3D_R32G32B32A32_SINT;
715	case SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS: return SVGA3D_R32G32B32_TYPELESS;
716	case SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT: return SVGA3D_R32G32B32_FLOAT;
717	case SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT: return SVGA3D_R32G32B32_UINT;
718	case SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT: return SVGA3D_R32G32B32_SINT;
719	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS: return SVGA3D_R16G16B16A16_TYPELESS;
720	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT: return SVGA3D_R16G16B16A16_UINT;
721	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM: return SVGA3D_R16G16B16A16_SNORM;
722	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT: return SVGA3D_R16G16B16A16_SINT;
723	case SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS: return SVGA3D_R32G32_TYPELESS;
724	case SVGA3D_DEVCAP_DXFMT_R32G32_UINT: return SVGA3D_R32G32_UINT;
725	case SVGA3D_DEVCAP_DXFMT_R32G32_SINT: return SVGA3D_R32G32_SINT;
726	case SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS: return SVGA3D_R32G8X24_TYPELESS;
727	case SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT: return SVGA3D_D32_FLOAT_S8X24_UINT;
728	case SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24: return SVGA3D_R32_FLOAT_X8X24;
729	case SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT: return SVGA3D_X32_G8X24_UINT;
730	case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS: return SVGA3D_R10G10B10A2_TYPELESS;
731	case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT: return SVGA3D_R10G10B10A2_UINT;
732	case SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT: return SVGA3D_R11G11B10_FLOAT;
733	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS: return SVGA3D_R8G8B8A8_TYPELESS;
734	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM: return SVGA3D_R8G8B8A8_UNORM;
735	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB: return SVGA3D_R8G8B8A8_UNORM_SRGB;
736	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT: return SVGA3D_R8G8B8A8_UINT;
737	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT: return SVGA3D_R8G8B8A8_SINT;
738	case SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS: return SVGA3D_R16G16_TYPELESS;
739	case SVGA3D_DEVCAP_DXFMT_R16G16_UINT: return SVGA3D_R16G16_UINT;
740	case SVGA3D_DEVCAP_DXFMT_R16G16_SINT: return SVGA3D_R16G16_SINT;
741	case SVGA3D_DEVCAP_DXFMT_R32_TYPELESS: return SVGA3D_R32_TYPELESS;
742	case SVGA3D_DEVCAP_DXFMT_D32_FLOAT: return SVGA3D_D32_FLOAT;
743	case SVGA3D_DEVCAP_DXFMT_R32_UINT: return SVGA3D_R32_UINT;
744	case SVGA3D_DEVCAP_DXFMT_R32_SINT: return SVGA3D_R32_SINT;
745	case SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS: return SVGA3D_R24G8_TYPELESS;
746	case SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT: return SVGA3D_D24_UNORM_S8_UINT;
747	case SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8: return SVGA3D_R24_UNORM_X8;
748	case SVGA3D_DEVCAP_DXFMT_X24_G8_UINT: return SVGA3D_X24_G8_UINT;
749	case SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS: return SVGA3D_R8G8_TYPELESS;
750	case SVGA3D_DEVCAP_DXFMT_R8G8_UNORM: return SVGA3D_R8G8_UNORM;
751	case SVGA3D_DEVCAP_DXFMT_R8G8_UINT: return SVGA3D_R8G8_UINT;
752	case SVGA3D_DEVCAP_DXFMT_R8G8_SINT: return SVGA3D_R8G8_SINT;
753	case SVGA3D_DEVCAP_DXFMT_R16_TYPELESS: return SVGA3D_R16_TYPELESS;
754	case SVGA3D_DEVCAP_DXFMT_R16_UNORM: return SVGA3D_R16_UNORM;
755	case SVGA3D_DEVCAP_DXFMT_R16_UINT: return SVGA3D_R16_UINT;
756	case SVGA3D_DEVCAP_DXFMT_R16_SNORM: return SVGA3D_R16_SNORM;
757	case SVGA3D_DEVCAP_DXFMT_R16_SINT: return SVGA3D_R16_SINT;
758	case SVGA3D_DEVCAP_DXFMT_R8_TYPELESS: return SVGA3D_R8_TYPELESS;
759	case SVGA3D_DEVCAP_DXFMT_R8_UNORM: return SVGA3D_R8_UNORM;
760	case SVGA3D_DEVCAP_DXFMT_R8_UINT: return SVGA3D_R8_UINT;
761	case SVGA3D_DEVCAP_DXFMT_R8_SNORM: return SVGA3D_R8_SNORM;
762	case SVGA3D_DEVCAP_DXFMT_R8_SINT: return SVGA3D_R8_SINT;
763	case SVGA3D_DEVCAP_DXFMT_P8: return SVGA3D_P8;
764	case SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP: return SVGA3D_R9G9B9E5_SHAREDEXP;
765	case SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM: return SVGA3D_R8G8_B8G8_UNORM;
766	case SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM: return SVGA3D_G8R8_G8B8_UNORM;
767	case SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS: return SVGA3D_BC1_TYPELESS;
768	case SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB: return SVGA3D_BC1_UNORM_SRGB;
769	case SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS: return SVGA3D_BC2_TYPELESS;
770	case SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB: return SVGA3D_BC2_UNORM_SRGB;
771	case SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS: return SVGA3D_BC3_TYPELESS;
772	case SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB: return SVGA3D_BC3_UNORM_SRGB;
773	case SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS: return SVGA3D_BC4_TYPELESS;
774	case SVGA3D_DEVCAP_DXFMT_ATI1: return SVGA3D_ATI1;
775	case SVGA3D_DEVCAP_DXFMT_BC4_SNORM: return SVGA3D_BC4_SNORM;
776	case SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS: return SVGA3D_BC5_TYPELESS;
777	case SVGA3D_DEVCAP_DXFMT_ATI2: return SVGA3D_ATI2;
778	case SVGA3D_DEVCAP_DXFMT_BC5_SNORM: return SVGA3D_BC5_SNORM;
779	case SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM: return SVGA3D_R10G10B10_XR_BIAS_A2_UNORM;
780	case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS: return SVGA3D_B8G8R8A8_TYPELESS;
781	case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB: return SVGA3D_B8G8R8A8_UNORM_SRGB;
782	case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS: return SVGA3D_B8G8R8X8_TYPELESS;
783	case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB: return SVGA3D_B8G8R8X8_UNORM_SRGB;
784	case SVGA3D_DEVCAP_DXFMT_Z_DF16: return SVGA3D_Z_DF16;
785	case SVGA3D_DEVCAP_DXFMT_Z_DF24: return SVGA3D_Z_DF24;
786	case SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT: return SVGA3D_Z_D24S8_INT;
787	case SVGA3D_DEVCAP_DXFMT_YV12: return SVGA3D_YV12;
788	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT: return SVGA3D_R32G32B32A32_FLOAT;
789	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT: return SVGA3D_R16G16B16A16_FLOAT;
790	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM: return SVGA3D_R16G16B16A16_UNORM;
791	case SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT: return SVGA3D_R32G32_FLOAT;
792	case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM: return SVGA3D_R10G10B10A2_UNORM;
793	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM: return SVGA3D_R8G8B8A8_SNORM;
794	case SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT: return SVGA3D_R16G16_FLOAT;
795	case SVGA3D_DEVCAP_DXFMT_R16G16_UNORM: return SVGA3D_R16G16_UNORM;
796	case SVGA3D_DEVCAP_DXFMT_R16G16_SNORM: return SVGA3D_R16G16_SNORM;
797	case SVGA3D_DEVCAP_DXFMT_R32_FLOAT: return SVGA3D_R32_FLOAT;
798	case SVGA3D_DEVCAP_DXFMT_R8G8_SNORM: return SVGA3D_R8G8_SNORM;
799	case SVGA3D_DEVCAP_DXFMT_R16_FLOAT: return SVGA3D_R16_FLOAT;
800	case SVGA3D_DEVCAP_DXFMT_D16_UNORM: return SVGA3D_D16_UNORM;
801	case SVGA3D_DEVCAP_DXFMT_A8_UNORM: return SVGA3D_A8_UNORM;
802	case SVGA3D_DEVCAP_DXFMT_BC1_UNORM: return SVGA3D_BC1_UNORM;
803	case SVGA3D_DEVCAP_DXFMT_BC2_UNORM: return SVGA3D_BC2_UNORM;
804	case SVGA3D_DEVCAP_DXFMT_BC3_UNORM: return SVGA3D_BC3_UNORM;
805	case SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM: return SVGA3D_B5G6R5_UNORM;
806	case SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM: return SVGA3D_B5G5R5A1_UNORM;
807	case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM: return SVGA3D_B8G8R8A8_UNORM;
808	case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM: return SVGA3D_B8G8R8X8_UNORM;
809	case SVGA3D_DEVCAP_DXFMT_BC4_UNORM: return SVGA3D_BC4_UNORM;
810	case SVGA3D_DEVCAP_DXFMT_BC5_UNORM: return SVGA3D_BC5_UNORM;
811	case SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS: return SVGA3D_BC6H_TYPELESS;
812	case SVGA3D_DEVCAP_DXFMT_BC6H_UF16: return SVGA3D_BC6H_UF16;
813	case SVGA3D_DEVCAP_DXFMT_BC6H_SF16: return SVGA3D_BC6H_SF16;
814	case SVGA3D_DEVCAP_DXFMT_BC7_TYPELESS: return SVGA3D_BC7_TYPELESS;
815	case SVGA3D_DEVCAP_DXFMT_BC7_UNORM: return SVGA3D_BC7_UNORM;
816	case SVGA3D_DEVCAP_DXFMT_BC7_UNORM_SRGB: return SVGA3D_BC7_UNORM_SRGB;
817	default:
818	AssertFailed();
819	break;
820	}
821	return SVGA3D_FORMAT_INVALID;
822	}
823
824
825	static int vmsvgaDXCheckFormatSupportPreDX(PVMSVGA3DSTATE pState, SVGA3dSurfaceFormat enmFormat, uint32_t *pu32DevCap)
826	{
827	int rc = VINF_SUCCESS;
828
829	*pu32DevCap = 0;
830
831	DXGI_FORMAT const dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(enmFormat);
832	if (dxgiFormat != DXGI_FORMAT_UNKNOWN)
833	{
834	RT_NOREF(pState);
835	/** @todo Implement */
836	}
837	else
838	rc = VERR_NOT_SUPPORTED;
839	return rc;
840	}
841
842	static int vmsvgaDXCheckFormatSupport(PVMSVGA3DSTATE pState, SVGA3dSurfaceFormat enmFormat, uint32_t *pu32DevCap)
843	{
844	int rc = VINF_SUCCESS;
845
846	*pu32DevCap = 0;
847
848	DXGI_FORMAT const dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(enmFormat);
849	if (dxgiFormat != DXGI_FORMAT_UNKNOWN)
850	{
851	ID3D11Device *pDevice = pState->pBackend->dxDevice.pDevice;
852	UINT FormatSupport = 0;
853	HRESULT hr = pDevice->CheckFormatSupport(dxgiFormat, &FormatSupport);
854	if (SUCCEEDED(hr))
855	{
856	*pu32DevCap \|= SVGA3D_DXFMT_SUPPORTED;
857
858	if (FormatSupport & D3D11_FORMAT_SUPPORT_SHADER_SAMPLE)
859	*pu32DevCap \|= SVGA3D_DXFMT_SHADER_SAMPLE;
860
861	if (FormatSupport & D3D11_FORMAT_SUPPORT_RENDER_TARGET)
862	*pu32DevCap \|= SVGA3D_DXFMT_COLOR_RENDERTARGET;
863
864	if (FormatSupport & D3D11_FORMAT_SUPPORT_DEPTH_STENCIL)
865	*pu32DevCap \|= SVGA3D_DXFMT_DEPTH_RENDERTARGET;
866
867	if (FormatSupport & D3D11_FORMAT_SUPPORT_BLENDABLE)
868	*pu32DevCap \|= SVGA3D_DXFMT_BLENDABLE;
869
870	if (FormatSupport & D3D11_FORMAT_SUPPORT_MIP)
871	*pu32DevCap \|= SVGA3D_DXFMT_MIPS;
872
873	if (FormatSupport & D3D11_FORMAT_SUPPORT_TEXTURECUBE)
874	*pu32DevCap \|= SVGA3D_DXFMT_ARRAY;
875
876	if (FormatSupport & D3D11_FORMAT_SUPPORT_TEXTURE3D)
877	*pu32DevCap \|= SVGA3D_DXFMT_VOLUME;
878
879	if (FormatSupport & D3D11_FORMAT_SUPPORT_IA_VERTEX_BUFFER)
880	*pu32DevCap \|= SVGA3D_DXFMT_DX_VERTEX_BUFFER;
881
882	UINT NumQualityLevels;
883	hr = pDevice->CheckMultisampleQualityLevels(dxgiFormat, 2, &NumQualityLevels);
884	if (SUCCEEDED(hr) && NumQualityLevels != 0)
885	*pu32DevCap \|= SVGA3D_DXFMT_MULTISAMPLE;
886	}
887	else
888	{
889	LogFunc(("CheckFormatSupport failed for 0x%08x, hr = 0x%08x\n", dxgiFormat, hr));
890	rc = VERR_NOT_SUPPORTED;
891	}
892	}
893	else
894	rc = VERR_NOT_SUPPORTED;
895	return rc;
896	}
897
898
899	static int dxDeviceCreate(PVMSVGA3DBACKEND pBackend, DXDEVICE *pDXDevice)
900	{
901	int rc = VINF_SUCCESS;
902
903	if (pBackend->fSingleDevice && pBackend->dxDevice.pDevice)
904	{
905	pDXDevice->pDevice = pBackend->dxDevice.pDevice;
906	pDXDevice->pDevice->AddRef();
907
908	pDXDevice->pImmediateContext = pBackend->dxDevice.pImmediateContext;
909	pDXDevice->pImmediateContext->AddRef();
910
911	pDXDevice->pDxgiFactory = pBackend->dxDevice.pDxgiFactory;
912	pDXDevice->pDxgiFactory->AddRef();
913
914	pDXDevice->FeatureLevel = pBackend->dxDevice.FeatureLevel;
915
916	#ifdef DX_COMMON_STAGING_BUFFER
917	pDXDevice->pStagingBuffer = 0;
918	pDXDevice->cbStagingBuffer = 0;
919	#endif
920
921	BlitInit(&pDXDevice->Blitter, pDXDevice->pDevice, pDXDevice->pImmediateContext);
922	return rc;
923	}
924
925	IDXGIAdapter pAdapter = NULL; / Default adapter. */
926	static D3D_FEATURE_LEVEL const s_aFeatureLevels[] =
927	{
928	D3D_FEATURE_LEVEL_11_1,
929	D3D_FEATURE_LEVEL_11_0
930	};
931	UINT Flags = D3D11_CREATE_DEVICE_BGRA_SUPPORT;
932	#ifdef DEBUG
933	Flags \|= D3D11_CREATE_DEVICE_DEBUG;
934	#endif
935
936	ID3D11Device *pDevice = 0;
937	ID3D11DeviceContext *pImmediateContext = 0;
938	HRESULT hr = pBackend->pfnD3D11CreateDevice(pAdapter,
939	D3D_DRIVER_TYPE_HARDWARE,
940	NULL,
941	Flags,
942	s_aFeatureLevels,
943	RT_ELEMENTS(s_aFeatureLevels),
944	D3D11_SDK_VERSION,
945	&pDevice,
946	&pDXDevice->FeatureLevel,
947	&pImmediateContext);
948	#ifdef DEBUG
949	if (FAILED(hr))
950	{
951	/* Device creation may fail because _DEBUG flag requires "D3D11 SDK Layers for Windows 10" ("Graphics Tools"):
952	* Settings/System/Apps/Optional features/Add a feature/Graphics Tools
953	* Retry without the flag.
954	*/
955	Flags &= ~D3D11_CREATE_DEVICE_DEBUG;
956	hr = pBackend->pfnD3D11CreateDevice(pAdapter,
957	D3D_DRIVER_TYPE_HARDWARE,
958	NULL,
959	Flags,
960	s_aFeatureLevels,
961	RT_ELEMENTS(s_aFeatureLevels),
962	D3D11_SDK_VERSION,
963	&pDevice,
964	&pDXDevice->FeatureLevel,
965	&pImmediateContext);
966	}
967	#endif
968
969	if (SUCCEEDED(hr))
970	{
971	LogRel(("VMSVGA: Feature level %#x\n", pDXDevice->FeatureLevel));
972
973	hr = pDevice->QueryInterface(__uuidof(ID3D11Device1), (void**)&pDXDevice->pDevice);
974	AssertReturnStmt(SUCCEEDED(hr),
975	D3D_RELEASE(pImmediateContext); D3D_RELEASE(pDevice),
976	VERR_NOT_SUPPORTED);
977
978	hr = pImmediateContext->QueryInterface(__uuidof(ID3D11DeviceContext1), (void**)&pDXDevice->pImmediateContext);
979	AssertReturnStmt(SUCCEEDED(hr),
980	D3D_RELEASE(pImmediateContext); D3D_RELEASE(pDXDevice->pDevice); D3D_RELEASE(pDevice),
981	VERR_NOT_SUPPORTED);
982
983	#ifdef DEBUG
984	/* Break into debugger when DX runtime detects anything unusual. */
985	HRESULT hr2;
986	ID3D11Debug *pDebug = 0;
987	hr2 = pDXDevice->pDevice->QueryInterface(__uuidof(ID3D11Debug), (void**)&pDebug);
988	if (SUCCEEDED(hr2))
989	{
990	ID3D11InfoQueue *pInfoQueue = 0;
991	hr2 = pDebug->QueryInterface(__uuidof(ID3D11InfoQueue), (void**)&pInfoQueue);
992	if (SUCCEEDED(hr2))
993	{
994	pInfoQueue->SetBreakOnSeverity(D3D11_MESSAGE_SEVERITY_CORRUPTION, true);
995	// pInfoQueue->SetBreakOnSeverity(D3D11_MESSAGE_SEVERITY_ERROR, true);
996	// pInfoQueue->SetBreakOnSeverity(D3D11_MESSAGE_SEVERITY_WARNING, true);
997
998	/* No breakpoints for the following messages. */
999	D3D11_MESSAGE_ID saIgnoredMessageIds[] =
1000	{
1001	/* Message ID: Caused by: */
1002	D3D11_MESSAGE_ID_CREATEINPUTLAYOUT_TYPE_MISMATCH, /* Autogenerated input signatures. */
1003	D3D11_MESSAGE_ID_LIVE_DEVICE, /* Live object report. Does not seem to prevent a breakpoint. */
1004	(D3D11_MESSAGE_ID)3146081 /DEVICE_DRAW_RENDERTARGETVIEW_NOT_SET/, /* U. */
1005	D3D11_MESSAGE_ID_DEVICE_DRAW_SAMPLER_NOT_SET, /* U. */
1006	D3D11_MESSAGE_ID_DEVICE_DRAW_SAMPLER_MISMATCH, /* U. */
1007	D3D11_MESSAGE_ID_CREATEINPUTLAYOUT_EMPTY_LAYOUT, /* P. */
1008	D3D11_MESSAGE_ID_DEVICE_SHADER_LINKAGE_REGISTERMASK, /* S. */
1009	};
1010
1011	D3D11_INFO_QUEUE_FILTER filter;
1012	RT_ZERO(filter);
1013	filter.DenyList.NumIDs = RT_ELEMENTS(saIgnoredMessageIds);
1014	filter.DenyList.pIDList = saIgnoredMessageIds;
1015	pInfoQueue->AddStorageFilterEntries(&filter);
1016
1017	D3D_RELEASE(pInfoQueue);
1018	}
1019	D3D_RELEASE(pDebug);
1020	}
1021	#endif
1022
1023	IDXGIDevice *pDxgiDevice = 0;
1024	hr = pDXDevice->pDevice->QueryInterface(__uuidof(IDXGIDevice), (void**)&pDxgiDevice);
1025	if (SUCCEEDED(hr))
1026	{
1027	IDXGIAdapter *pDxgiAdapter = 0;
1028	hr = pDxgiDevice->GetParent(__uuidof(IDXGIAdapter), (void**)&pDxgiAdapter);
1029	if (SUCCEEDED(hr))
1030	{
1031	hr = pDxgiAdapter->GetParent(__uuidof(IDXGIFactory), (void**)&pDXDevice->pDxgiFactory);
1032	D3D_RELEASE(pDxgiAdapter);
1033	}
1034
1035	D3D_RELEASE(pDxgiDevice);
1036	}
1037	}
1038
1039	if (SUCCEEDED(hr))
1040	BlitInit(&pDXDevice->Blitter, pDXDevice->pDevice, pDXDevice->pImmediateContext);
1041	else
1042	rc = VERR_NOT_SUPPORTED;
1043
1044	return rc;
1045	}
1046
1047
1048	static void dxDeviceDestroy(PVMSVGA3DBACKEND pBackend, DXDEVICE *pDevice)
1049	{
1050	RT_NOREF(pBackend);
1051
1052	BlitRelease(&pDevice->Blitter);
1053
1054	#ifdef DX_COMMON_STAGING_BUFFER
1055	D3D_RELEASE(pDevice->pStagingBuffer);
1056	#endif
1057
1058	D3D_RELEASE(pDevice->pDxgiFactory);
1059	D3D_RELEASE(pDevice->pImmediateContext);
1060
1061	#ifdef DEBUG
1062	HRESULT hr2;
1063	ID3D11Debug *pDebug = 0;
1064	hr2 = pDevice->pDevice->QueryInterface(__uuidof(ID3D11Debug), (void**)&pDebug);
1065	if (SUCCEEDED(hr2))
1066	{
1067	/// @todo Use this to see whether all resources have been properly released.
1068	//DEBUG_BREAKPOINT_TEST();
1069	//pDebug->ReportLiveDeviceObjects(D3D11_RLDO_DETAIL \| (D3D11_RLDO_FLAGS)0x4 /D3D11_RLDO_IGNORE_INTERNAL/);
1070	D3D_RELEASE(pDebug);
1071	}
1072	#endif
1073
1074	D3D_RELEASE(pDevice->pDevice);
1075	RT_ZERO(*pDevice);
1076	}
1077
1078
1079	static void dxViewAddToList(PVGASTATECC pThisCC, DXVIEW *pDXView)
1080	{
1081	LogFunc(("cid = %u, sid = %u, viewId = %u, type = %u\n",
1082	pDXView->cid, pDXView->sid, pDXView->viewId, pDXView->enmViewType));
1083
1084	Assert(pDXView->u.pView); /* Only already created views should be added. Guard against mis-use by callers. */
1085
1086	PVMSVGA3DSURFACE pSurface;
1087	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pDXView->sid, &pSurface);
1088	AssertRCReturnVoid(rc);
1089
1090	RTListAppend(&pSurface->pBackendSurface->listView, &pDXView->nodeSurfaceView);
1091	}
1092
1093
1094	static void dxViewRemoveFromList(DXVIEW *pDXView)
1095	{
1096	LogFunc(("cid = %u, sid = %u, viewId = %u, type = %u\n",
1097	pDXView->cid, pDXView->sid, pDXView->viewId, pDXView->enmViewType));
1098	/* pView can be NULL, if COT entry is already empty. */
1099	if (pDXView->u.pView)
1100	{
1101	Assert(pDXView->nodeSurfaceView.pNext && pDXView->nodeSurfaceView.pPrev);
1102	RTListNodeRemove(&pDXView->nodeSurfaceView);
1103	}
1104	}
1105
1106
1107	static int dxViewDestroy(DXVIEW *pDXView)
1108	{
1109	LogFunc(("cid = %u, sid = %u, viewId = %u, type = %u\n",
1110	pDXView->cid, pDXView->sid, pDXView->viewId, pDXView->enmViewType));
1111	if (pDXView->u.pView)
1112	{
1113	D3D_RELEASE(pDXView->u.pView);
1114	RTListNodeRemove(&pDXView->nodeSurfaceView);
1115	RT_ZERO(*pDXView);
1116	}
1117
1118	return VINF_SUCCESS;
1119	}
1120
1121
1122	static int dxViewInit(DXVIEW pDXView, PVMSVGA3DSURFACE pSurface, VMSVGA3DDXCONTEXT pDXContext, uint32_t viewId, VMSVGA3DBACKVIEWTYPE enmViewType, ID3D11View *pView)
1123	{
1124	pDXView->cid = pDXContext->cid;
1125	pDXView->sid = pSurface->id;
1126	pDXView->viewId = viewId;
1127	pDXView->enmViewType = enmViewType;
1128	pDXView->u.pView = pView;
1129	RTListAppend(&pSurface->pBackendSurface->listView, &pDXView->nodeSurfaceView);
1130
1131	LogFunc(("cid = %u, sid = %u, viewId = %u, type = %u\n",
1132	pDXView->cid, pDXView->sid, pDXView->viewId, pDXView->enmViewType));
1133
1134	DXVIEW pIter, pNext;
1135	RTListForEachSafe(&pSurface->pBackendSurface->listView, pIter, pNext, DXVIEW, nodeSurfaceView)
1136	{
1137	AssertPtr(pNext);
1138	LogFunc(("pIter=%p, pNext=%p\n", pIter, pNext));
1139	}
1140
1141	return VINF_SUCCESS;
1142	}
1143
1144
1145	DECLINLINE(bool) dxIsSurfaceShareable(PVMSVGA3DSURFACE pSurface)
1146	{
1147	/* It is not expected that volume textures will be shared between contexts. */
1148	if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_VOLUME)
1149	return false;
1150
1151	return (pSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET)
1152	\|\| (pSurface->f.surfaceFlags & SVGA3D_SURFACE_BIND_RENDER_TARGET);
1153	}
1154
1155
1156	static DXDEVICE *dxDeviceFromCid(uint32_t cid, PVMSVGA3DSTATE pState)
1157	{
1158	if (cid != DX_CID_BACKEND)
1159	{
1160	if (pState->pBackend->fSingleDevice)
1161	return &pState->pBackend->dxDevice;
1162
1163	VMSVGA3DDXCONTEXT *pDXContext;
1164	int rc = vmsvga3dDXContextFromCid(pState, cid, &pDXContext);
1165	if (RT_SUCCESS(rc))
1166	return &pDXContext->pBackendDXContext->dxDevice;
1167	}
1168	else
1169	return &pState->pBackend->dxDevice;
1170
1171	AssertFailed();
1172	return NULL;
1173	}
1174
1175
1176	static DXDEVICE dxDeviceFromContext(PVMSVGA3DSTATE p3dState, VMSVGA3DDXCONTEXT pDXContext)
1177	{
1178	if (pDXContext && !p3dState->pBackend->fSingleDevice)
1179	return &pDXContext->pBackendDXContext->dxDevice;
1180
1181	return &p3dState->pBackend->dxDevice;
1182	}
1183
1184
1185	static int dxDeviceFlush(DXDEVICE *pDevice)
1186	{
1187	/** @todo Should the flush follow the query submission? */
1188	pDevice->pImmediateContext->Flush();
1189
1190	ID3D11Query *pQuery = 0;
1191	D3D11_QUERY_DESC qd;
1192	RT_ZERO(qd);
1193	qd.Query = D3D11_QUERY_EVENT;
1194
1195	HRESULT hr = pDevice->pDevice->CreateQuery(&qd, &pQuery);
1196	Assert(hr == S_OK); RT_NOREF(hr);
1197	pDevice->pImmediateContext->End(pQuery);
1198
1199	BOOL queryData;
1200	while (pDevice->pImmediateContext->GetData(pQuery, &queryData, sizeof(queryData), 0) != S_OK)
1201	RTThreadYield();
1202
1203	D3D_RELEASE(pQuery);
1204
1205	return VINF_SUCCESS;
1206	}
1207
1208
1209	static int dxContextWait(uint32_t cidDrawing, PVMSVGA3DSTATE pState)
1210	{
1211	if (pState->pBackend->fSingleDevice)
1212	return VINF_SUCCESS;
1213
1214	/* Flush cidDrawing context and issue a query. */
1215	DXDEVICE *pDXDevice = dxDeviceFromCid(cidDrawing, pState);
1216	if (pDXDevice)
1217	return dxDeviceFlush(pDXDevice);
1218	/* cidDrawing does not exist anymore. */
1219	return VINF_SUCCESS;
1220	}
1221
1222
1223	static int dxSurfaceWait(PVMSVGA3DSTATE pState, PVMSVGA3DSURFACE pSurface, uint32_t cidRequesting)
1224	{
1225	if (pState->pBackend->fSingleDevice)
1226	return VINF_SUCCESS;
1227
1228	VMSVGA3DBACKENDSURFACE *pBackendSurface = pSurface->pBackendSurface;
1229	if (!pBackendSurface)
1230	AssertFailedReturn(VERR_INVALID_STATE);
1231
1232	int rc = VINF_SUCCESS;
1233	if (pBackendSurface->cidDrawing != SVGA_ID_INVALID)
1234	{
1235	if (pBackendSurface->cidDrawing != cidRequesting)
1236	{
1237	LogFunc(("sid = %u, assoc cid = %u, drawing cid = %u, req cid = %u\n",
1238	pSurface->id, pSurface->idAssociatedContext, pBackendSurface->cidDrawing, cidRequesting));
1239	Assert(dxIsSurfaceShareable(pSurface));
1240	rc = dxContextWait(pBackendSurface->cidDrawing, pState);
1241	pBackendSurface->cidDrawing = SVGA_ID_INVALID;
1242	}
1243	}
1244	return rc;
1245	}
1246
1247
1248	static ID3D11Resource dxResource(PVMSVGA3DSTATE pState, PVMSVGA3DSURFACE pSurface, VMSVGA3DDXCONTEXT pDXContext)
1249	{
1250	VMSVGA3DBACKENDSURFACE *pBackendSurface = pSurface->pBackendSurface;
1251	if (!pBackendSurface)
1252	AssertFailedReturn(NULL);
1253
1254	ID3D11Resource *pResource;
1255
1256	uint32_t const cidRequesting = pDXContext ? pDXContext->cid : DX_CID_BACKEND;
1257	if (cidRequesting == pSurface->idAssociatedContext \|\| pState->pBackend->fSingleDevice)
1258	pResource = pBackendSurface->u.pResource;
1259	else
1260	{
1261	/*
1262	* Context, which as not created the surface, is requesting.
1263	*/
1264	AssertReturn(pDXContext, NULL);
1265
1266	Assert(dxIsSurfaceShareable(pSurface));
1267	Assert(pSurface->idAssociatedContext == DX_CID_BACKEND);
1268
1269	DXSHAREDTEXTURE pSharedTexture = (DXSHAREDTEXTURE )RTAvlU32Get(&pBackendSurface->SharedTextureTree, pDXContext->cid);
1270	if (!pSharedTexture)
1271	{
1272	DXDEVICE *pDevice = dxDeviceFromContext(pState, pDXContext);
1273	AssertReturn(pDevice->pDevice, NULL);
1274
1275	AssertReturn(pBackendSurface->SharedHandle, NULL);
1276
1277	/* This context has not yet opened the texture. */
1278	pSharedTexture = (DXSHAREDTEXTURE *)RTMemAllocZ(sizeof(DXSHAREDTEXTURE));
1279	AssertReturn(pSharedTexture, NULL);
1280
1281	pSharedTexture->Core.Key = pDXContext->cid;
1282	bool const fSuccess = RTAvlU32Insert(&pBackendSurface->SharedTextureTree, &pSharedTexture->Core);
1283	AssertReturn(fSuccess, NULL);
1284
1285	HRESULT hr = pDevice->pDevice->OpenSharedResource(pBackendSurface->SharedHandle, __uuidof(ID3D11Texture2D), (void**)&pSharedTexture->pTexture);
1286	Assert(SUCCEEDED(hr));
1287	if (SUCCEEDED(hr))
1288	pSharedTexture->sid = pSurface->id;
1289	else
1290	{
1291	RTAvlU32Remove(&pBackendSurface->SharedTextureTree, pDXContext->cid);
1292	RTMemFree(pSharedTexture);
1293	return NULL;
1294	}
1295	}
1296
1297	pResource = pSharedTexture->pTexture;
1298	}
1299
1300	/* Wait for drawing to finish. */
1301	dxSurfaceWait(pState, pSurface, cidRequesting);
1302
1303	return pResource;
1304	}
1305
1306
1307	static uint32_t dxGetRenderTargetViewSid(PVMSVGA3DDXCONTEXT pDXContext, uint32_t renderTargetViewId)
1308	{
1309	ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, SVGA_ID_INVALID);
1310
1311	SVGACOTableDXRTViewEntry const *pRTViewEntry = &pDXContext->cot.paRTView[renderTargetViewId];
1312	return pRTViewEntry->sid;
1313	}
1314
1315
1316	static SVGACOTableDXSRViewEntry const *dxGetShaderResourceViewEntry(PVMSVGA3DDXCONTEXT pDXContext, uint32_t shaderResourceViewId)
1317	{
1318	ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->cot.cSRView, NULL);
1319
1320	SVGACOTableDXSRViewEntry const *pSRViewEntry = &pDXContext->cot.paSRView[shaderResourceViewId];
1321	return pSRViewEntry;
1322	}
1323
1324
1325	static SVGACOTableDXUAViewEntry const *dxGetUnorderedAccessViewEntry(PVMSVGA3DDXCONTEXT pDXContext, uint32_t uaViewId)
1326	{
1327	ASSERT_GUEST_RETURN(uaViewId < pDXContext->cot.cUAView, NULL);
1328
1329	SVGACOTableDXUAViewEntry const *pUAViewEntry = &pDXContext->cot.paUAView[uaViewId];
1330	return pUAViewEntry;
1331	}
1332
1333
1334	static SVGACOTableDXDSViewEntry const *dxGetDepthStencilViewEntry(PVMSVGA3DDXCONTEXT pDXContext, uint32_t depthStencilViewId)
1335	{
1336	ASSERT_GUEST_RETURN(depthStencilViewId < pDXContext->cot.cDSView, NULL);
1337
1338	SVGACOTableDXDSViewEntry const *pDSViewEntry = &pDXContext->cot.paDSView[depthStencilViewId];
1339	return pDSViewEntry;
1340	}
1341
1342
1343	static SVGACOTableDXRTViewEntry const *dxGetRenderTargetViewEntry(PVMSVGA3DDXCONTEXT pDXContext, uint32_t renderTargetViewId)
1344	{
1345	ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, NULL);
1346
1347	SVGACOTableDXRTViewEntry const *pRTViewEntry = &pDXContext->cot.paRTView[renderTargetViewId];
1348	return pRTViewEntry;
1349	}
1350
1351
1352	static int dxTrackRenderTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
1353	{
1354	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1355	AssertReturn(pState, VERR_INVALID_STATE);
1356
1357	for (unsigned long i = 0; i < RT_ELEMENTS(pDXContext->svgaDXContext.renderState.renderTargetViewIds); ++i)
1358	{
1359	uint32_t const renderTargetViewId = pDXContext->svgaDXContext.renderState.renderTargetViewIds[i];
1360	if (renderTargetViewId == SVGA_ID_INVALID)
1361	continue;
1362
1363	uint32_t const sid = dxGetRenderTargetViewSid(pDXContext, renderTargetViewId);
1364	LogFunc(("[%u] sid = %u, drawing cid = %u\n", i, sid, pDXContext->cid));
1365
1366	PVMSVGA3DSURFACE pSurface;
1367	int rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
1368	if (RT_SUCCESS(rc))
1369	{
1370	AssertContinue(pSurface->pBackendSurface);
1371	pSurface->pBackendSurface->cidDrawing = pDXContext->cid;
1372	}
1373	}
1374	return VINF_SUCCESS;
1375	}
1376
1377
1378	static int dxDefineStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dStreamOutputId soid, SVGACOTableDXStreamOutputEntry const pEntry, DXSHADER pDXShader)
1379	{
1380	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1381	DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[soid];
1382
1383	/* Make D3D11_SO_DECLARATION_ENTRY array from SVGA3dStreamOutputDeclarationEntry. */
1384	SVGA3dStreamOutputDeclarationEntry const *paDecls;
1385	PVMSVGAMOB pMob = NULL;
1386	if (pEntry->usesMob)
1387	{
1388	pMob = vmsvgaR3MobGet(pSvgaR3State, pEntry->mobid);
1389	ASSERT_GUEST_RETURN(pMob, VERR_INVALID_PARAMETER);
1390
1391	/* Create a memory pointer for the MOB, which is accessible by host. */
1392	int rc = vmsvgaR3MobBackingStoreCreate(pSvgaR3State, pMob, vmsvgaR3MobSize(pMob));
1393	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
1394
1395	/* Get pointer to the shader bytecode. This will also verify the offset. */
1396	paDecls = (SVGA3dStreamOutputDeclarationEntry const *)vmsvgaR3MobBackingStorePtr(pMob, pEntry->offsetInBytes);
1397	AssertReturnStmt(paDecls, vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob), VERR_INTERNAL_ERROR);
1398	}
1399	else
1400	paDecls = &pEntry->decl[0];
1401
1402	pDXStreamOutput->cDeclarationEntry = pEntry->numOutputStreamEntries;
1403	for (uint32_t i = 0; i < pDXStreamOutput->cDeclarationEntry; ++i)
1404	{
1405	D3D11_SO_DECLARATION_ENTRY *pDst = &pDXStreamOutput->aDeclarationEntry[i];
1406	SVGA3dStreamOutputDeclarationEntry const *pSrc = &paDecls[i];
1407
1408	uint32_t const registerMask = pSrc->registerMask & 0xF;
1409	unsigned const iFirstBit = ASMBitFirstSetU32(registerMask);
1410	unsigned const iLastBit = ASMBitLastSetU32(registerMask);
1411
1412	pDst->Stream = pSrc->stream;
1413	pDst->SemanticName = NULL; /* Semantic name and index will be taken from the shader output declaration. */
1414	pDst->SemanticIndex = 0;
1415	pDst->StartComponent = iFirstBit > 0 ? iFirstBit - 1 : 0;
1416	pDst->ComponentCount = iFirstBit > 0 ? iLastBit - (iFirstBit - 1) : 0;
1417	pDst->OutputSlot = pSrc->outputSlot;
1418	}
1419
1420	uint32_t MaxSemanticIndex = 0;
1421	for (uint32_t i = 0; i < pDXStreamOutput->cDeclarationEntry; ++i)
1422	{
1423	D3D11_SO_DECLARATION_ENTRY *pDeclarationEntry = &pDXStreamOutput->aDeclarationEntry[i];
1424	SVGA3dStreamOutputDeclarationEntry const *decl = &paDecls[i];
1425
1426	/* Find the corresponding register and mask in the GS shader output. */
1427	int idxFound = -1;
1428	for (uint32_t iOutputEntry = 0; iOutputEntry < pDXShader->shaderInfo.cOutputSignature; ++iOutputEntry)
1429	{
1430	SVGA3dDXSignatureEntry const *pOutputEntry = &pDXShader->shaderInfo.aOutputSignature[iOutputEntry];
1431	if ( pOutputEntry->registerIndex == decl->registerIndex
1432	&& (decl->registerMask & ~pOutputEntry->mask) == 0) /* SO decl mask is a subset of shader output mask. */
1433	{
1434	idxFound = iOutputEntry;
1435	break;
1436	}
1437	}
1438
1439	if (idxFound >= 0)
1440	{
1441	DXShaderAttributeSemantic const *pOutputSemantic = &pDXShader->shaderInfo.aOutputSemantic[idxFound];
1442	pDeclarationEntry->SemanticName = pOutputSemantic->pcszSemanticName;
1443	pDeclarationEntry->SemanticIndex = pOutputSemantic->SemanticIndex;
1444	MaxSemanticIndex = RT_MAX(MaxSemanticIndex, pOutputSemantic->SemanticIndex);
1445	}
1446	else
1447	AssertFailed();
1448	}
1449
1450	/* A geometry shader may return components of the same register as different attributes:
1451	*
1452	* Output signature
1453	* Name Index Mask Register
1454	* ATTRIB 2 xy 2
1455	* ATTRIB 3 z 2
1456	*
1457	* For ATTRIB 3 the stream output declaration expects StartComponent = 0 and ComponentCount = 1
1458	* (not StartComponent = 2 and ComponentCount = 1):
1459	*
1460	* Stream output declaration
1461	* SemanticName SemanticIndex StartComponent ComponentCount
1462	* ATTRIB 2 0 2
1463	* ATTRIB 3 0 1
1464	*
1465	* Stream output declaration can have multiple entries for the same attribute.
1466	* In this case StartComponent is the offset within the attribute.
1467	*
1468	* Output signature
1469	* Name Index Mask Register
1470	* ATTRIB 0 xyzw 0
1471	*
1472	* Stream output declaration
1473	* SemanticName SemanticIndex StartComponent ComponentCount
1474	* ATTRIB 0 0 1
1475	* ATTRIB 0 1 1
1476	*
1477	* StartComponent has been computed as the component offset in a register:
1478	* 'StartComponent = iFirstBit > 0 ? iFirstBit - 1 : 0;'.
1479	*
1480	* StartComponent must be the offset in an attribute.
1481	*/
1482	for (uint32_t SemanticIndex = 0; SemanticIndex <= MaxSemanticIndex; ++SemanticIndex)
1483	{
1484	/* Find minimum StartComponent value for this attribute. */
1485	uint32_t MinStartComponent = UINT32_MAX;
1486	for (uint32_t i = 0; i < pDXStreamOutput->cDeclarationEntry; ++i)
1487	{
1488	D3D11_SO_DECLARATION_ENTRY *pDeclarationEntry = &pDXStreamOutput->aDeclarationEntry[i];
1489	if (pDeclarationEntry->SemanticIndex == SemanticIndex)
1490	MinStartComponent = RT_MIN(MinStartComponent, pDeclarationEntry->StartComponent);
1491	}
1492
1493	AssertContinue(MinStartComponent != UINT32_MAX);
1494
1495	/* Adjust the StartComponent to start from 0 for this attribute. */
1496	for (uint32_t i = 0; i < pDXStreamOutput->cDeclarationEntry; ++i)
1497	{
1498	D3D11_SO_DECLARATION_ENTRY *pDeclarationEntry = &pDXStreamOutput->aDeclarationEntry[i];
1499	if (pDeclarationEntry->SemanticIndex == SemanticIndex)
1500	pDeclarationEntry->StartComponent -= MinStartComponent;
1501	}
1502	}
1503
1504	if (pMob)
1505	vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
1506
1507	return VINF_SUCCESS;
1508	}
1509
1510	static void dxDestroyStreamOutput(DXSTREAMOUTPUT *pDXStreamOutput)
1511	{
1512	RT_ZERO(*pDXStreamOutput);
1513	}
1514
1515	static D3D11_BLEND dxBlendFactorAlpha(uint8_t svgaBlend)
1516	{
1517	/* "Blend options that end in _COLOR are not allowed." but the guest sometimes sends them. */
1518	switch (svgaBlend)
1519	{
1520	case SVGA3D_BLENDOP_ZERO: return D3D11_BLEND_ZERO;
1521	case SVGA3D_BLENDOP_ONE: return D3D11_BLEND_ONE;
1522	case SVGA3D_BLENDOP_SRCCOLOR: return D3D11_BLEND_SRC_ALPHA;
1523	case SVGA3D_BLENDOP_INVSRCCOLOR: return D3D11_BLEND_INV_SRC_ALPHA;
1524	case SVGA3D_BLENDOP_SRCALPHA: return D3D11_BLEND_SRC_ALPHA;
1525	case SVGA3D_BLENDOP_INVSRCALPHA: return D3D11_BLEND_INV_SRC_ALPHA;
1526	case SVGA3D_BLENDOP_DESTALPHA: return D3D11_BLEND_DEST_ALPHA;
1527	case SVGA3D_BLENDOP_INVDESTALPHA: return D3D11_BLEND_INV_DEST_ALPHA;
1528	case SVGA3D_BLENDOP_DESTCOLOR: return D3D11_BLEND_DEST_ALPHA;
1529	case SVGA3D_BLENDOP_INVDESTCOLOR: return D3D11_BLEND_INV_DEST_ALPHA;
1530	case SVGA3D_BLENDOP_SRCALPHASAT: return D3D11_BLEND_SRC_ALPHA_SAT;
1531	case SVGA3D_BLENDOP_BLENDFACTOR: return D3D11_BLEND_BLEND_FACTOR;
1532	case SVGA3D_BLENDOP_INVBLENDFACTOR: return D3D11_BLEND_INV_BLEND_FACTOR;
1533	case SVGA3D_BLENDOP_SRC1COLOR: return D3D11_BLEND_SRC1_ALPHA;
1534	case SVGA3D_BLENDOP_INVSRC1COLOR: return D3D11_BLEND_INV_SRC1_ALPHA;
1535	case SVGA3D_BLENDOP_SRC1ALPHA: return D3D11_BLEND_SRC1_ALPHA;
1536	case SVGA3D_BLENDOP_INVSRC1ALPHA: return D3D11_BLEND_INV_SRC1_ALPHA;
1537	case SVGA3D_BLENDOP_BLENDFACTORALPHA: return D3D11_BLEND_BLEND_FACTOR;
1538	case SVGA3D_BLENDOP_INVBLENDFACTORALPHA: return D3D11_BLEND_INV_BLEND_FACTOR;
1539	default:
1540	break;
1541	}
1542	return D3D11_BLEND_ZERO;
1543	}
1544
1545
1546	static D3D11_BLEND dxBlendFactorColor(uint8_t svgaBlend)
1547	{
1548	switch (svgaBlend)
1549	{
1550	case SVGA3D_BLENDOP_ZERO: return D3D11_BLEND_ZERO;
1551	case SVGA3D_BLENDOP_ONE: return D3D11_BLEND_ONE;
1552	case SVGA3D_BLENDOP_SRCCOLOR: return D3D11_BLEND_SRC_COLOR;
1553	case SVGA3D_BLENDOP_INVSRCCOLOR: return D3D11_BLEND_INV_SRC_COLOR;
1554	case SVGA3D_BLENDOP_SRCALPHA: return D3D11_BLEND_SRC_ALPHA;
1555	case SVGA3D_BLENDOP_INVSRCALPHA: return D3D11_BLEND_INV_SRC_ALPHA;
1556	case SVGA3D_BLENDOP_DESTALPHA: return D3D11_BLEND_DEST_ALPHA;
1557	case SVGA3D_BLENDOP_INVDESTALPHA: return D3D11_BLEND_INV_DEST_ALPHA;
1558	case SVGA3D_BLENDOP_DESTCOLOR: return D3D11_BLEND_DEST_COLOR;
1559	case SVGA3D_BLENDOP_INVDESTCOLOR: return D3D11_BLEND_INV_DEST_COLOR;
1560	case SVGA3D_BLENDOP_SRCALPHASAT: return D3D11_BLEND_SRC_ALPHA_SAT;
1561	case SVGA3D_BLENDOP_BLENDFACTOR: return D3D11_BLEND_BLEND_FACTOR;
1562	case SVGA3D_BLENDOP_INVBLENDFACTOR: return D3D11_BLEND_INV_BLEND_FACTOR;
1563	case SVGA3D_BLENDOP_SRC1COLOR: return D3D11_BLEND_SRC1_COLOR;
1564	case SVGA3D_BLENDOP_INVSRC1COLOR: return D3D11_BLEND_INV_SRC1_COLOR;
1565	case SVGA3D_BLENDOP_SRC1ALPHA: return D3D11_BLEND_SRC1_ALPHA;
1566	case SVGA3D_BLENDOP_INVSRC1ALPHA: return D3D11_BLEND_INV_SRC1_ALPHA;
1567	case SVGA3D_BLENDOP_BLENDFACTORALPHA: return D3D11_BLEND_BLEND_FACTOR;
1568	case SVGA3D_BLENDOP_INVBLENDFACTORALPHA: return D3D11_BLEND_INV_BLEND_FACTOR;
1569	default:
1570	break;
1571	}
1572	return D3D11_BLEND_ZERO;
1573	}
1574
1575
1576	static D3D11_BLEND_OP dxBlendOp(uint8_t svgaBlendEq)
1577	{
1578	return (D3D11_BLEND_OP)svgaBlendEq;
1579	}
1580
1581
1582	/** @todo AssertCompile for types like D3D11_COMPARISON_FUNC and SVGA3dComparisonFunc */
1583	static HRESULT dxBlendStateCreate(DXDEVICE pDevice, SVGACOTableDXBlendStateEntry const pEntry, ID3D11BlendState **pp)
1584	{
1585	D3D11_BLEND_DESC BlendDesc;
1586	BlendDesc.AlphaToCoverageEnable = RT_BOOL(pEntry->alphaToCoverageEnable);
1587	BlendDesc.IndependentBlendEnable = RT_BOOL(pEntry->independentBlendEnable);
1588	for (int i = 0; i < SVGA3D_MAX_RENDER_TARGETS; ++i)
1589	{
1590	BlendDesc.RenderTarget[i].BlendEnable = RT_BOOL(pEntry->perRT[i].blendEnable);
1591	BlendDesc.RenderTarget[i].SrcBlend = dxBlendFactorColor(pEntry->perRT[i].srcBlend);
1592	BlendDesc.RenderTarget[i].DestBlend = dxBlendFactorColor(pEntry->perRT[i].destBlend);
1593	BlendDesc.RenderTarget[i].BlendOp = dxBlendOp (pEntry->perRT[i].blendOp);
1594	BlendDesc.RenderTarget[i].SrcBlendAlpha = dxBlendFactorAlpha(pEntry->perRT[i].srcBlendAlpha);
1595	BlendDesc.RenderTarget[i].DestBlendAlpha = dxBlendFactorAlpha(pEntry->perRT[i].destBlendAlpha);
1596	BlendDesc.RenderTarget[i].BlendOpAlpha = dxBlendOp (pEntry->perRT[i].blendOpAlpha);
1597	BlendDesc.RenderTarget[i].RenderTargetWriteMask = pEntry->perRT[i].renderTargetWriteMask;
1598	/** @todo logicOpEnable and logicOp */
1599	}
1600
1601	HRESULT hr = pDevice->pDevice->CreateBlendState(&BlendDesc, pp);
1602	Assert(SUCCEEDED(hr));
1603	return hr;
1604	}
1605
1606
1607	static HRESULT dxDepthStencilStateCreate(DXDEVICE pDevice, SVGACOTableDXDepthStencilEntry const pEntry, ID3D11DepthStencilState **pp)
1608	{
1609	D3D11_DEPTH_STENCIL_DESC desc;
1610	desc.DepthEnable = pEntry->depthEnable;
1611	desc.DepthWriteMask = (D3D11_DEPTH_WRITE_MASK)pEntry->depthWriteMask;
1612	desc.DepthFunc = (D3D11_COMPARISON_FUNC)pEntry->depthFunc;
1613	desc.StencilEnable = pEntry->stencilEnable;
1614	desc.StencilReadMask = pEntry->stencilReadMask;
1615	desc.StencilWriteMask = pEntry->stencilWriteMask;
1616	desc.FrontFace.StencilFailOp = (D3D11_STENCIL_OP)pEntry->frontStencilFailOp;
1617	desc.FrontFace.StencilDepthFailOp = (D3D11_STENCIL_OP)pEntry->frontStencilDepthFailOp;
1618	desc.FrontFace.StencilPassOp = (D3D11_STENCIL_OP)pEntry->frontStencilPassOp;
1619	desc.FrontFace.StencilFunc = (D3D11_COMPARISON_FUNC)pEntry->frontStencilFunc;
1620	desc.BackFace.StencilFailOp = (D3D11_STENCIL_OP)pEntry->backStencilFailOp;
1621	desc.BackFace.StencilDepthFailOp = (D3D11_STENCIL_OP)pEntry->backStencilDepthFailOp;
1622	desc.BackFace.StencilPassOp = (D3D11_STENCIL_OP)pEntry->backStencilPassOp;
1623	desc.BackFace.StencilFunc = (D3D11_COMPARISON_FUNC)pEntry->backStencilFunc;
1624	/** @todo frontEnable, backEnable */
1625
1626	HRESULT hr = pDevice->pDevice->CreateDepthStencilState(&desc, pp);
1627	Assert(SUCCEEDED(hr));
1628	return hr;
1629	}
1630
1631
1632	static HRESULT dxSamplerStateCreate(DXDEVICE pDevice, SVGACOTableDXSamplerEntry const pEntry, ID3D11SamplerState **pp)
1633	{
1634	D3D11_SAMPLER_DESC desc;
1635	/* Guest sometimes sends inconsistent (from D3D11 point of view) set of filter flags. */
1636	if (pEntry->filter & SVGA3D_FILTER_ANISOTROPIC)
1637	desc.Filter = (pEntry->filter & SVGA3D_FILTER_COMPARE)
1638	? D3D11_FILTER_COMPARISON_ANISOTROPIC
1639	: D3D11_FILTER_ANISOTROPIC;
1640	else
1641	desc.Filter = (D3D11_FILTER)pEntry->filter;
1642	desc.AddressU = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressU;
1643	desc.AddressV = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressV;
1644	desc.AddressW = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressW;
1645	desc.MipLODBias = pEntry->mipLODBias;
1646	desc.MaxAnisotropy = RT_CLAMP(pEntry->maxAnisotropy, 1, 16); /* "Valid values are between 1 and 16" */
1647	desc.ComparisonFunc = (D3D11_COMPARISON_FUNC)pEntry->comparisonFunc;
1648	desc.BorderColor[0] = pEntry->borderColor.value[0];
1649	desc.BorderColor[1] = pEntry->borderColor.value[1];
1650	desc.BorderColor[2] = pEntry->borderColor.value[2];
1651	desc.BorderColor[3] = pEntry->borderColor.value[3];
1652	desc.MinLOD = pEntry->minLOD;
1653	desc.MaxLOD = pEntry->maxLOD;
1654
1655	HRESULT hr = pDevice->pDevice->CreateSamplerState(&desc, pp);
1656	Assert(SUCCEEDED(hr));
1657	return hr;
1658	}
1659
1660
1661	static D3D11_FILL_MODE dxFillMode(uint8_t svgaFillMode)
1662	{
1663	if (svgaFillMode == SVGA3D_FILLMODE_POINT)
1664	return D3D11_FILL_WIREFRAME;
1665	return (D3D11_FILL_MODE)svgaFillMode;
1666	}
1667
1668
1669	static HRESULT dxRasterizerStateCreate(DXDEVICE pDevice, SVGACOTableDXRasterizerStateEntry const pEntry, ID3D11RasterizerState **pp)
1670	{
1671	D3D11_RASTERIZER_DESC desc;
1672	desc.FillMode = dxFillMode(pEntry->fillMode);
1673	desc.CullMode = (D3D11_CULL_MODE)pEntry->cullMode;
1674	desc.FrontCounterClockwise = pEntry->frontCounterClockwise;
1675	/** @todo provokingVertexLast */
1676	desc.DepthBias = pEntry->depthBias;
1677	desc.DepthBiasClamp = pEntry->depthBiasClamp;
1678	desc.SlopeScaledDepthBias = pEntry->slopeScaledDepthBias;
1679	desc.DepthClipEnable = pEntry->depthClipEnable;
1680	desc.ScissorEnable = pEntry->scissorEnable;
1681	desc.MultisampleEnable = pEntry->multisampleEnable;
1682	desc.AntialiasedLineEnable = pEntry->antialiasedLineEnable;
1683	/** @todo lineWidth lineStippleEnable lineStippleFactor lineStipplePattern forcedSampleCount */
1684
1685	HRESULT hr = pDevice->pDevice->CreateRasterizerState(&desc, pp);
1686	Assert(SUCCEEDED(hr));
1687	return hr;
1688	}
1689
1690
1691	static HRESULT dxRenderTargetViewCreate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableDXRTViewEntry const pEntry, VMSVGA3DSURFACE pSurface, ID3D11RenderTargetView **pp)
1692	{
1693	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
1694
1695	ID3D11Resource *pResource = dxResource(pThisCC->svga.p3dState, pSurface, pDXContext);
1696
1697	D3D11_RENDER_TARGET_VIEW_DESC desc;
1698	RT_ZERO(desc);
1699	desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
1700	AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN \|\| pEntry->format == SVGA3D_BUFFER, E_FAIL);
1701	switch (pEntry->resourceDimension)
1702	{
1703	case SVGA3D_RESOURCE_BUFFER:
1704	desc.ViewDimension = D3D11_RTV_DIMENSION_BUFFER;
1705	desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
1706	desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
1707	break;
1708	case SVGA3D_RESOURCE_TEXTURE1D:
1709	if (pSurface->surfaceDesc.numArrayElements <= 1)
1710	{
1711	desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE1D;
1712	desc.Texture1D.MipSlice = pEntry->desc.tex.mipSlice;
1713	}
1714	else
1715	{
1716	desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE1DARRAY;
1717	desc.Texture1DArray.MipSlice = pEntry->desc.tex.mipSlice;
1718	desc.Texture1DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1719	desc.Texture1DArray.ArraySize = pEntry->desc.tex.arraySize;
1720	}
1721	break;
1722	case SVGA3D_RESOURCE_TEXTURE2D:
1723	if (pSurface->surfaceDesc.numArrayElements <= 1)
1724	{
1725	desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2D;
1726	desc.Texture2D.MipSlice = pEntry->desc.tex.mipSlice;
1727	}
1728	else
1729	{
1730	desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2DARRAY;
1731	desc.Texture2DArray.MipSlice = pEntry->desc.tex.mipSlice;
1732	desc.Texture2DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1733	desc.Texture2DArray.ArraySize = pEntry->desc.tex.arraySize;
1734	}
1735	break;
1736	case SVGA3D_RESOURCE_TEXTURE3D:
1737	desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE3D;
1738	desc.Texture3D.MipSlice = pEntry->desc.tex3D.mipSlice;
1739	desc.Texture3D.FirstWSlice = pEntry->desc.tex3D.firstW;
1740	desc.Texture3D.WSize = pEntry->desc.tex3D.wSize;
1741	break;
1742	case SVGA3D_RESOURCE_TEXTURECUBE:
1743	desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2DARRAY;
1744	desc.Texture2DArray.MipSlice = pEntry->desc.tex.mipSlice;
1745	desc.Texture2DArray.FirstArraySlice = 0;
1746	desc.Texture2DArray.ArraySize = 6;
1747	break;
1748	case SVGA3D_RESOURCE_BUFFEREX:
1749	AssertFailed(); /** @todo test. Probably not applicable to a render target view. */
1750	desc.ViewDimension = D3D11_RTV_DIMENSION_BUFFER;
1751	desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
1752	desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
1753	break;
1754	default:
1755	ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
1756	}
1757
1758	HRESULT hr = pDevice->pDevice->CreateRenderTargetView(pResource, &desc, pp);
1759	Assert(SUCCEEDED(hr));
1760	return hr;
1761	}
1762
1763
1764	static HRESULT dxShaderResourceViewCreate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableDXSRViewEntry const pEntry, VMSVGA3DSURFACE pSurface, ID3D11ShaderResourceView **pp)
1765	{
1766	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
1767
1768	ID3D11Resource *pResource = dxResource(pThisCC->svga.p3dState, pSurface, pDXContext);
1769
1770	D3D11_SHADER_RESOURCE_VIEW_DESC desc;
1771	RT_ZERO(desc);
1772	desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
1773	AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN \|\| pEntry->format == SVGA3D_BUFFER, E_FAIL);
1774
1775	switch (pEntry->resourceDimension)
1776	{
1777	case SVGA3D_RESOURCE_BUFFER:
1778	desc.ViewDimension = D3D11_SRV_DIMENSION_BUFFER;
1779	desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
1780	desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
1781	break;
1782	case SVGA3D_RESOURCE_TEXTURE1D:
1783	if (pSurface->surfaceDesc.numArrayElements <= 1)
1784	{
1785	desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE1D;
1786	desc.Texture1D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1787	desc.Texture1D.MipLevels = pEntry->desc.tex.mipLevels;
1788	}
1789	else
1790	{
1791	desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE1DARRAY;
1792	desc.Texture1DArray.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1793	desc.Texture1DArray.MipLevels = pEntry->desc.tex.mipLevels;
1794	desc.Texture1DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1795	desc.Texture1DArray.ArraySize = pEntry->desc.tex.arraySize;
1796	}
1797	break;
1798	case SVGA3D_RESOURCE_TEXTURE2D:
1799	if (pSurface->surfaceDesc.numArrayElements <= 1)
1800	{
1801	desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE2D;
1802	desc.Texture2D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1803	desc.Texture2D.MipLevels = pEntry->desc.tex.mipLevels;
1804	}
1805	else
1806	{
1807	desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE2DARRAY;
1808	desc.Texture2DArray.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1809	desc.Texture2DArray.MipLevels = pEntry->desc.tex.mipLevels;
1810	desc.Texture2DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1811	desc.Texture2DArray.ArraySize = pEntry->desc.tex.arraySize;
1812	}
1813	break;
1814	case SVGA3D_RESOURCE_TEXTURE3D:
1815	desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE3D;
1816	desc.Texture3D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1817	desc.Texture3D.MipLevels = pEntry->desc.tex.mipLevels;
1818	break;
1819	case SVGA3D_RESOURCE_TEXTURECUBE:
1820	if (pSurface->surfaceDesc.numArrayElements <= 6)
1821	{
1822	desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURECUBE;
1823	desc.TextureCube.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1824	desc.TextureCube.MipLevels = pEntry->desc.tex.mipLevels;
1825	}
1826	else
1827	{
1828	desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURECUBEARRAY;
1829	desc.TextureCubeArray.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1830	desc.TextureCubeArray.MipLevels = pEntry->desc.tex.mipLevels;
1831	desc.TextureCubeArray.First2DArrayFace = pEntry->desc.tex.firstArraySlice;
1832	desc.TextureCubeArray.NumCubes = pEntry->desc.tex.arraySize / 6;
1833	}
1834	break;
1835	case SVGA3D_RESOURCE_BUFFEREX:
1836	AssertFailed(); /** @todo test. */
1837	desc.ViewDimension = D3D11_SRV_DIMENSION_BUFFEREX;
1838	desc.BufferEx.FirstElement = pEntry->desc.bufferex.firstElement;
1839	desc.BufferEx.NumElements = pEntry->desc.bufferex.numElements;
1840	desc.BufferEx.Flags = pEntry->desc.bufferex.flags;
1841	break;
1842	default:
1843	ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
1844	}
1845
1846	HRESULT hr = pDevice->pDevice->CreateShaderResourceView(pResource, &desc, pp);
1847	Assert(SUCCEEDED(hr));
1848	return hr;
1849	}
1850
1851
1852	static HRESULT dxUnorderedAccessViewCreate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableDXUAViewEntry const pEntry, VMSVGA3DSURFACE pSurface, ID3D11UnorderedAccessView **pp)
1853	{
1854	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
1855
1856	ID3D11Resource *pResource = dxResource(pThisCC->svga.p3dState, pSurface, pDXContext);
1857
1858	D3D11_UNORDERED_ACCESS_VIEW_DESC desc;
1859	RT_ZERO(desc);
1860	desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
1861	AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN \|\| pEntry->format == SVGA3D_BUFFER, E_FAIL);
1862
1863	switch (pEntry->resourceDimension)
1864	{
1865	case SVGA3D_RESOURCE_BUFFER:
1866	desc.ViewDimension = D3D11_UAV_DIMENSION_BUFFER;
1867	desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
1868	desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
1869	desc.Buffer.Flags = pEntry->desc.buffer.flags;
1870	break;
1871	case SVGA3D_RESOURCE_TEXTURE1D:
1872	if (pSurface->surfaceDesc.numArrayElements <= 1)
1873	{
1874	desc.ViewDimension = D3D11_UAV_DIMENSION_TEXTURE1D;
1875	desc.Texture1D.MipSlice = pEntry->desc.tex.mipSlice;
1876	}
1877	else
1878	{
1879	desc.ViewDimension = D3D11_UAV_DIMENSION_TEXTURE1DARRAY;
1880	desc.Texture1DArray.MipSlice = pEntry->desc.tex.mipSlice;
1881	desc.Texture1DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1882	desc.Texture1DArray.ArraySize = pEntry->desc.tex.arraySize;
1883	}
1884	break;
1885	case SVGA3D_RESOURCE_TEXTURE2D:
1886	if (pSurface->surfaceDesc.numArrayElements <= 1)
1887	{
1888	desc.ViewDimension = D3D11_UAV_DIMENSION_TEXTURE2D;
1889	desc.Texture2D.MipSlice = pEntry->desc.tex.mipSlice;
1890	}
1891	else
1892	{
1893	desc.ViewDimension = D3D11_UAV_DIMENSION_TEXTURE2DARRAY;
1894	desc.Texture2DArray.MipSlice = pEntry->desc.tex.mipSlice;
1895	desc.Texture2DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1896	desc.Texture2DArray.ArraySize = pEntry->desc.tex.arraySize;
1897	}
1898	break;
1899	case SVGA3D_RESOURCE_TEXTURE3D:
1900	desc.Texture3D.MipSlice = pEntry->desc.tex3D.mipSlice;
1901	desc.Texture3D.FirstWSlice = pEntry->desc.tex3D.firstW;
1902	desc.Texture3D.WSize = pEntry->desc.tex3D.wSize;
1903	break;
1904	default:
1905	ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
1906	}
1907
1908	HRESULT hr = pDevice->pDevice->CreateUnorderedAccessView(pResource, &desc, pp);
1909	Assert(SUCCEEDED(hr));
1910	return hr;
1911	}
1912
1913
1914	static HRESULT dxDepthStencilViewCreate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableDXDSViewEntry const pEntry, VMSVGA3DSURFACE pSurface, ID3D11DepthStencilView **pp)
1915	{
1916	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
1917
1918	ID3D11Resource *pResource = dxResource(pThisCC->svga.p3dState, pSurface, pDXContext);
1919
1920	D3D11_DEPTH_STENCIL_VIEW_DESC desc;
1921	RT_ZERO(desc);
1922	desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
1923	AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN \|\| pEntry->format == SVGA3D_BUFFER, E_FAIL);
1924	desc.Flags = pEntry->flags;
1925	switch (pEntry->resourceDimension)
1926	{
1927	case SVGA3D_RESOURCE_TEXTURE1D:
1928	if (pSurface->surfaceDesc.numArrayElements <= 1)
1929	{
1930	desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE1D;
1931	desc.Texture1D.MipSlice = pEntry->mipSlice;
1932	}
1933	else
1934	{
1935	desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE1DARRAY;
1936	desc.Texture1DArray.MipSlice = pEntry->mipSlice;
1937	desc.Texture1DArray.FirstArraySlice = pEntry->firstArraySlice;
1938	desc.Texture1DArray.ArraySize = pEntry->arraySize;
1939	}
1940	break;
1941	case SVGA3D_RESOURCE_TEXTURE2D:
1942	if (pSurface->surfaceDesc.numArrayElements <= 1)
1943	{
1944	desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE2D;
1945	desc.Texture2D.MipSlice = pEntry->mipSlice;
1946	}
1947	else
1948	{
1949	desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE2DARRAY;
1950	desc.Texture2DArray.MipSlice = pEntry->mipSlice;
1951	desc.Texture2DArray.FirstArraySlice = pEntry->firstArraySlice;
1952	desc.Texture2DArray.ArraySize = pEntry->arraySize;
1953	}
1954	break;
1955	default:
1956	ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
1957	}
1958
1959	HRESULT hr = pDevice->pDevice->CreateDepthStencilView(pResource, &desc, pp);
1960	Assert(SUCCEEDED(hr));
1961	return hr;
1962	}
1963
1964
1965	static HRESULT dxShaderCreate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, DXSHADER *pDXShader)
1966	{
1967	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
1968
1969	HRESULT hr = S_OK;
1970
1971	switch (pDXShader->enmShaderType)
1972	{
1973	case SVGA3D_SHADERTYPE_VS:
1974	hr = pDevice->pDevice->CreateVertexShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pVertexShader);
1975	Assert(SUCCEEDED(hr));
1976	break;
1977	case SVGA3D_SHADERTYPE_PS:
1978	hr = pDevice->pDevice->CreatePixelShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pPixelShader);
1979	Assert(SUCCEEDED(hr));
1980	break;
1981	case SVGA3D_SHADERTYPE_GS:
1982	{
1983	SVGA3dStreamOutputId const soid = pDXContext->svgaDXContext.streamOut.soid;
1984	if (soid == SVGA_ID_INVALID)
1985	{
1986	hr = pDevice->pDevice->CreateGeometryShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pGeometryShader);
1987	Assert(SUCCEEDED(hr));
1988	}
1989	else
1990	{
1991	ASSERT_GUEST_RETURN(soid < pDXContext->pBackendDXContext->cStreamOutput, E_INVALIDARG);
1992
1993	SVGACOTableDXStreamOutputEntry const *pEntry = &pDXContext->cot.paStreamOutput[soid];
1994	DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[soid];
1995
1996	hr = pDevice->pDevice->CreateGeometryShaderWithStreamOutput(pDXShader->pvDXBC, pDXShader->cbDXBC,
1997	pDXStreamOutput->aDeclarationEntry, pDXStreamOutput->cDeclarationEntry,
1998	pEntry->numOutputStreamStrides ? pEntry->streamOutputStrideInBytes : NULL, pEntry->numOutputStreamStrides,
1999	pEntry->rasterizedStream,
2000	/pClassLinkage=/ NULL, &pDXShader->pGeometryShader);
2001	AssertBreak(SUCCEEDED(hr));
2002
2003	pDXShader->soid = soid;
2004	}
2005	break;
2006	}
2007	case SVGA3D_SHADERTYPE_HS:
2008	hr = pDevice->pDevice->CreateHullShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pHullShader);
2009	Assert(SUCCEEDED(hr));
2010	break;
2011	case SVGA3D_SHADERTYPE_DS:
2012	hr = pDevice->pDevice->CreateDomainShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pDomainShader);
2013	Assert(SUCCEEDED(hr));
2014	break;
2015	case SVGA3D_SHADERTYPE_CS:
2016	hr = pDevice->pDevice->CreateComputeShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pComputeShader);
2017	Assert(SUCCEEDED(hr));
2018	break;
2019	default:
2020	ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
2021	}
2022
2023	return hr;
2024	}
2025
2026
2027	static void dxShaderSet(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderType type, DXSHADER *pDXShader)
2028	{
2029	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
2030
2031	switch (type)
2032	{
2033	case SVGA3D_SHADERTYPE_VS:
2034	pDevice->pImmediateContext->VSSetShader(pDXShader ? pDXShader->pVertexShader : NULL, NULL, 0);
2035	break;
2036	case SVGA3D_SHADERTYPE_PS:
2037	pDevice->pImmediateContext->PSSetShader(pDXShader ? pDXShader->pPixelShader : NULL, NULL, 0);
2038	break;
2039	case SVGA3D_SHADERTYPE_GS:
2040	{
2041	Assert(!pDXShader \|\| (pDXShader->soid == pDXContext->svgaDXContext.streamOut.soid));
2042	pDevice->pImmediateContext->GSSetShader(pDXShader ? pDXShader->pGeometryShader : NULL, NULL, 0);
2043	} break;
2044	case SVGA3D_SHADERTYPE_HS:
2045	pDevice->pImmediateContext->HSSetShader(pDXShader ? pDXShader->pHullShader : NULL, NULL, 0);
2046	break;
2047	case SVGA3D_SHADERTYPE_DS:
2048	pDevice->pImmediateContext->DSSetShader(pDXShader ? pDXShader->pDomainShader : NULL, NULL, 0);
2049	break;
2050	case SVGA3D_SHADERTYPE_CS:
2051	pDevice->pImmediateContext->CSSetShader(pDXShader ? pDXShader->pComputeShader : NULL, NULL, 0);
2052	break;
2053	default:
2054	ASSERT_GUEST_FAILED_RETURN_VOID();
2055	}
2056	}
2057
2058
2059	static void dxConstantBufferSet(DXDEVICE pDevice, uint32_t slot, SVGA3dShaderType type, ID3D11Buffer pConstantBuffer)
2060	{
2061	switch (type)
2062	{
2063	case SVGA3D_SHADERTYPE_VS:
2064	pDevice->pImmediateContext->VSSetConstantBuffers(slot, 1, &pConstantBuffer);
2065	break;
2066	case SVGA3D_SHADERTYPE_PS:
2067	pDevice->pImmediateContext->PSSetConstantBuffers(slot, 1, &pConstantBuffer);
2068	break;
2069	case SVGA3D_SHADERTYPE_GS:
2070	pDevice->pImmediateContext->GSSetConstantBuffers(slot, 1, &pConstantBuffer);
2071	break;
2072	case SVGA3D_SHADERTYPE_HS:
2073	pDevice->pImmediateContext->HSSetConstantBuffers(slot, 1, &pConstantBuffer);
2074	break;
2075	case SVGA3D_SHADERTYPE_DS:
2076	pDevice->pImmediateContext->DSSetConstantBuffers(slot, 1, &pConstantBuffer);
2077	break;
2078	case SVGA3D_SHADERTYPE_CS:
2079	pDevice->pImmediateContext->CSSetConstantBuffers(slot, 1, &pConstantBuffer);
2080	break;
2081	default:
2082	ASSERT_GUEST_FAILED_RETURN_VOID();
2083	}
2084	}
2085
2086
2087	static void dxSamplerSet(DXDEVICE pDevice, SVGA3dShaderType type, uint32_t startSampler, uint32_t cSampler, ID3D11SamplerState const *papSampler)
2088	{
2089	switch (type)
2090	{
2091	case SVGA3D_SHADERTYPE_VS:
2092	pDevice->pImmediateContext->VSSetSamplers(startSampler, cSampler, papSampler);
2093	break;
2094	case SVGA3D_SHADERTYPE_PS:
2095	pDevice->pImmediateContext->PSSetSamplers(startSampler, cSampler, papSampler);
2096	break;
2097	case SVGA3D_SHADERTYPE_GS:
2098	pDevice->pImmediateContext->GSSetSamplers(startSampler, cSampler, papSampler);
2099	break;
2100	case SVGA3D_SHADERTYPE_HS:
2101	pDevice->pImmediateContext->HSSetSamplers(startSampler, cSampler, papSampler);
2102	break;
2103	case SVGA3D_SHADERTYPE_DS:
2104	pDevice->pImmediateContext->DSSetSamplers(startSampler, cSampler, papSampler);
2105	break;
2106	case SVGA3D_SHADERTYPE_CS:
2107	pDevice->pImmediateContext->CSSetSamplers(startSampler, cSampler, papSampler);
2108	break;
2109	default:
2110	ASSERT_GUEST_FAILED_RETURN_VOID();
2111	}
2112	}
2113
2114
2115	static void dxShaderResourceViewSet(DXDEVICE pDevice, SVGA3dShaderType type, uint32_t startView, uint32_t cShaderResourceView, ID3D11ShaderResourceView const *papShaderResourceView)
2116	{
2117	switch (type)
2118	{
2119	case SVGA3D_SHADERTYPE_VS:
2120	pDevice->pImmediateContext->VSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2121	break;
2122	case SVGA3D_SHADERTYPE_PS:
2123	pDevice->pImmediateContext->PSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2124	break;
2125	case SVGA3D_SHADERTYPE_GS:
2126	pDevice->pImmediateContext->GSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2127	break;
2128	case SVGA3D_SHADERTYPE_HS:
2129	pDevice->pImmediateContext->HSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2130	break;
2131	case SVGA3D_SHADERTYPE_DS:
2132	pDevice->pImmediateContext->DSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2133	break;
2134	case SVGA3D_SHADERTYPE_CS:
2135	pDevice->pImmediateContext->CSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2136	break;
2137	default:
2138	ASSERT_GUEST_FAILED_RETURN_VOID();
2139	}
2140	}
2141
2142
2143	static void dxCSUnorderedAccessViewSet(DXDEVICE pDevice, uint32_t startView, uint32_t cView, ID3D11UnorderedAccessView const papUnorderedAccessView, UINT pUAVInitialCounts)
2144	{
2145	pDevice->pImmediateContext->CSSetUnorderedAccessViews(startView, cView, papUnorderedAccessView, pUAVInitialCounts);
2146	}
2147
2148
2149	static int dxBackendSurfaceAlloc(PVMSVGA3DBACKENDSURFACE *ppBackendSurface)
2150	{
2151	PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
2152	AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
2153	pBackendSurface->cidDrawing = SVGA_ID_INVALID;
2154	RTListInit(&pBackendSurface->listView);
2155	*ppBackendSurface = pBackendSurface;
2156	return VINF_SUCCESS;
2157	}
2158
2159
2160	static HRESULT dxInitSharedHandle(PVMSVGA3DBACKEND pBackend, PVMSVGA3DBACKENDSURFACE pBackendSurface)
2161	{
2162	if (pBackend->fSingleDevice)
2163	return S_OK;
2164
2165	/* Get the shared handle. */
2166	IDXGIResource *pDxgiResource = NULL;
2167	HRESULT hr = pBackendSurface->u.pResource->QueryInterface(__uuidof(IDXGIResource), (void**)&pDxgiResource);
2168	Assert(SUCCEEDED(hr));
2169	if (SUCCEEDED(hr))
2170	{
2171	hr = pDxgiResource->GetSharedHandle(&pBackendSurface->SharedHandle);
2172	Assert(SUCCEEDED(hr));
2173	D3D_RELEASE(pDxgiResource);
2174	}
2175
2176	return hr;
2177	}
2178
2179
2180	static int vmsvga3dBackSurfaceCreateScreenTarget(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface)
2181	{
2182	PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2183	AssertReturn(p3dState, VERR_INVALID_STATE);
2184
2185	PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2186	AssertReturn(pBackend, VERR_INVALID_STATE);
2187
2188	DXDEVICE *pDXDevice = &pBackend->dxDevice;
2189	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
2190
2191	/* Surface must have SCREEN_TARGET flag. */
2192	ASSERT_GUEST_RETURN(RT_BOOL(pSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET), VERR_INVALID_PARAMETER);
2193
2194	if (VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
2195	{
2196	AssertFailed(); /* Should the function not be used like that? */
2197	vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
2198	}
2199
2200	PVMSVGA3DBACKENDSURFACE pBackendSurface;
2201	int rc = dxBackendSurfaceAlloc(&pBackendSurface);
2202	AssertRCReturn(rc, rc);
2203
2204	D3D11_TEXTURE2D_DESC td;
2205	RT_ZERO(td);
2206	td.Width = pSurface->paMipmapLevels[0].mipmapSize.width;
2207	td.Height = pSurface->paMipmapLevels[0].mipmapSize.height;
2208	Assert(pSurface->cLevels == 1);
2209	td.MipLevels = 1;
2210	td.ArraySize = 1;
2211	td.Format = vmsvgaDXSurfaceFormat2Dxgi(pSurface->format);
2212	td.SampleDesc.Count = 1;
2213	td.SampleDesc.Quality = 0;
2214	td.Usage = D3D11_USAGE_DEFAULT;
2215	td.BindFlags = D3D11_BIND_RENDER_TARGET \| D3D11_BIND_SHADER_RESOURCE;
2216	td.CPUAccessFlags = 0;
2217	td.MiscFlags = pBackend->fSingleDevice ? 0 : D3D11_RESOURCE_MISC_SHARED;
2218
2219	HRESULT hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.pTexture2D);
2220	Assert(SUCCEEDED(hr));
2221	if (SUCCEEDED(hr))
2222	{
2223	/* Map-able texture. */
2224	td.Usage = D3D11_USAGE_DYNAMIC;
2225	td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2226	td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2227	td.MiscFlags = 0;
2228	hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->dynamic.pTexture2D);
2229	Assert(SUCCEEDED(hr));
2230	}
2231
2232	if (SUCCEEDED(hr))
2233	{
2234	/* Staging texture. */
2235	td.Usage = D3D11_USAGE_STAGING;
2236	td.BindFlags = 0; /* No flags allowed. */
2237	td.CPUAccessFlags = D3D11_CPU_ACCESS_READ \| D3D11_CPU_ACCESS_WRITE;
2238	hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->staging.pTexture2D);
2239	Assert(SUCCEEDED(hr));
2240	}
2241
2242	if (SUCCEEDED(hr))
2243	hr = dxInitSharedHandle(pBackend, pBackendSurface);
2244
2245	if (SUCCEEDED(hr))
2246	{
2247	/*
2248	* Success.
2249	*/
2250	pBackendSurface->enmResType = VMSVGA3D_RESTYPE_SCREEN_TARGET;
2251	pBackendSurface->enmDxgiFormat = td.Format;
2252	pSurface->pBackendSurface = pBackendSurface;
2253	pSurface->idAssociatedContext = DX_CID_BACKEND;
2254	return VINF_SUCCESS;
2255	}
2256
2257	/* Failure. */
2258	D3D_RELEASE(pBackendSurface->staging.pTexture2D);
2259	D3D_RELEASE(pBackendSurface->dynamic.pTexture2D);
2260	D3D_RELEASE(pBackendSurface->u.pTexture2D);
2261	RTMemFree(pBackendSurface);
2262	return VERR_NO_MEMORY;
2263	}
2264
2265
2266	static UINT dxBindFlags(SVGA3dSurfaceAllFlags surfaceFlags)
2267	{
2268	/* Catch unimplemented flags. */
2269	Assert(!RT_BOOL(surfaceFlags & (SVGA3D_SURFACE_BIND_LOGICOPS \| SVGA3D_SURFACE_BIND_RAW_VIEWS)));
2270
2271	UINT BindFlags = 0;
2272
2273	if (surfaceFlags & (SVGA3D_SURFACE_BIND_VERTEX_BUFFER \| SVGA3D_SURFACE_HINT_VERTEXBUFFER))
2274	BindFlags \|= D3D11_BIND_VERTEX_BUFFER;
2275	if (surfaceFlags & (SVGA3D_SURFACE_BIND_INDEX_BUFFER \| SVGA3D_SURFACE_HINT_INDEXBUFFER))
2276	BindFlags \|= D3D11_BIND_INDEX_BUFFER;
2277	if (surfaceFlags & SVGA3D_SURFACE_BIND_CONSTANT_BUFFER) BindFlags \|= D3D11_BIND_CONSTANT_BUFFER;
2278	if (surfaceFlags & SVGA3D_SURFACE_BIND_SHADER_RESOURCE) BindFlags \|= D3D11_BIND_SHADER_RESOURCE;
2279	if (surfaceFlags & SVGA3D_SURFACE_BIND_RENDER_TARGET) BindFlags \|= D3D11_BIND_RENDER_TARGET;
2280	if (surfaceFlags & SVGA3D_SURFACE_BIND_DEPTH_STENCIL) BindFlags \|= D3D11_BIND_DEPTH_STENCIL;
2281	if (surfaceFlags & SVGA3D_SURFACE_BIND_STREAM_OUTPUT) BindFlags \|= D3D11_BIND_STREAM_OUTPUT;
2282	if (surfaceFlags & SVGA3D_SURFACE_BIND_UAVIEW) BindFlags \|= D3D11_BIND_UNORDERED_ACCESS;
2283
2284	return BindFlags;
2285	}
2286
2287
2288	static DXDEVICE dxSurfaceDevice(PVMSVGA3DSTATE p3dState, PVMSVGA3DSURFACE pSurface, PVMSVGA3DDXCONTEXT pDXContext, UINT pMiscFlags)
2289	{
2290	if (p3dState->pBackend->fSingleDevice)
2291	{
2292	*pMiscFlags = 0;
2293	return &p3dState->pBackend->dxDevice;
2294	}
2295
2296	if (dxIsSurfaceShareable(pSurface))
2297	{
2298	*pMiscFlags = D3D11_RESOURCE_MISC_SHARED;
2299	return &p3dState->pBackend->dxDevice;
2300	}
2301
2302	*pMiscFlags = 0;
2303	return &pDXContext->pBackendDXContext->dxDevice;
2304	}
2305
2306
2307	static DXGI_FORMAT dxGetDxgiTypelessFormat(DXGI_FORMAT dxgiFormat)
2308	{
2309	switch (dxgiFormat)
2310	{
2311	case DXGI_FORMAT_R32G32B32A32_FLOAT:
2312	case DXGI_FORMAT_R32G32B32A32_UINT:
2313	case DXGI_FORMAT_R32G32B32A32_SINT:
2314	return DXGI_FORMAT_R32G32B32A32_TYPELESS; /* 1 */
2315	case DXGI_FORMAT_R32G32B32_FLOAT:
2316	case DXGI_FORMAT_R32G32B32_UINT:
2317	case DXGI_FORMAT_R32G32B32_SINT:
2318	return DXGI_FORMAT_R32G32B32_TYPELESS; /* 5 */
2319	case DXGI_FORMAT_R16G16B16A16_FLOAT:
2320	case DXGI_FORMAT_R16G16B16A16_UNORM:
2321	case DXGI_FORMAT_R16G16B16A16_UINT:
2322	case DXGI_FORMAT_R16G16B16A16_SNORM:
2323	case DXGI_FORMAT_R16G16B16A16_SINT:
2324	return DXGI_FORMAT_R16G16B16A16_TYPELESS; /* 9 */
2325	case DXGI_FORMAT_R32G32_FLOAT:
2326	case DXGI_FORMAT_R32G32_UINT:
2327	case DXGI_FORMAT_R32G32_SINT:
2328	return DXGI_FORMAT_R32G32_TYPELESS; /* 15 */
2329	case DXGI_FORMAT_D32_FLOAT_S8X24_UINT:
2330	case DXGI_FORMAT_R32_FLOAT_X8X24_TYPELESS:
2331	case DXGI_FORMAT_X32_TYPELESS_G8X24_UINT:
2332	return DXGI_FORMAT_R32G8X24_TYPELESS; /* 19 */
2333	case DXGI_FORMAT_R10G10B10A2_UNORM:
2334	case DXGI_FORMAT_R10G10B10A2_UINT:
2335	return DXGI_FORMAT_R10G10B10A2_TYPELESS; /* 23 */
2336	case DXGI_FORMAT_R8G8B8A8_UNORM:
2337	case DXGI_FORMAT_R8G8B8A8_UNORM_SRGB:
2338	case DXGI_FORMAT_R8G8B8A8_UINT:
2339	case DXGI_FORMAT_R8G8B8A8_SNORM:
2340	case DXGI_FORMAT_R8G8B8A8_SINT:
2341	return DXGI_FORMAT_R8G8B8A8_TYPELESS; /* 27 */
2342	case DXGI_FORMAT_R16G16_FLOAT:
2343	case DXGI_FORMAT_R16G16_UNORM:
2344	case DXGI_FORMAT_R16G16_UINT:
2345	case DXGI_FORMAT_R16G16_SNORM:
2346	case DXGI_FORMAT_R16G16_SINT:
2347	return DXGI_FORMAT_R16G16_TYPELESS; /* 33 */
2348	case DXGI_FORMAT_D32_FLOAT:
2349	case DXGI_FORMAT_R32_FLOAT:
2350	case DXGI_FORMAT_R32_UINT:
2351	case DXGI_FORMAT_R32_SINT:
2352	return DXGI_FORMAT_R32_TYPELESS; /* 39 */
2353	case DXGI_FORMAT_D24_UNORM_S8_UINT:
2354	case DXGI_FORMAT_R24_UNORM_X8_TYPELESS:
2355	case DXGI_FORMAT_X24_TYPELESS_G8_UINT:
2356	return DXGI_FORMAT_R24G8_TYPELESS; /* 44 */
2357	case DXGI_FORMAT_R8G8_UNORM:
2358	case DXGI_FORMAT_R8G8_UINT:
2359	case DXGI_FORMAT_R8G8_SNORM:
2360	case DXGI_FORMAT_R8G8_SINT:
2361	return DXGI_FORMAT_R8G8_TYPELESS; /* 48*/
2362	case DXGI_FORMAT_R16_FLOAT:
2363	case DXGI_FORMAT_D16_UNORM:
2364	case DXGI_FORMAT_R16_UNORM:
2365	case DXGI_FORMAT_R16_UINT:
2366	case DXGI_FORMAT_R16_SNORM:
2367	case DXGI_FORMAT_R16_SINT:
2368	return DXGI_FORMAT_R16_TYPELESS; /* 53 */
2369	case DXGI_FORMAT_R8_UNORM:
2370	case DXGI_FORMAT_R8_UINT:
2371	case DXGI_FORMAT_R8_SNORM:
2372	case DXGI_FORMAT_R8_SINT:
2373	return DXGI_FORMAT_R8_TYPELESS; /* 60*/
2374	case DXGI_FORMAT_BC1_UNORM:
2375	case DXGI_FORMAT_BC1_UNORM_SRGB:
2376	return DXGI_FORMAT_BC1_TYPELESS; /* 70 */
2377	case DXGI_FORMAT_BC2_UNORM:
2378	case DXGI_FORMAT_BC2_UNORM_SRGB:
2379	return DXGI_FORMAT_BC2_TYPELESS; /* 73 */
2380	case DXGI_FORMAT_BC3_UNORM:
2381	case DXGI_FORMAT_BC3_UNORM_SRGB:
2382	return DXGI_FORMAT_BC3_TYPELESS; /* 76 */
2383	case DXGI_FORMAT_BC4_UNORM:
2384	case DXGI_FORMAT_BC4_SNORM:
2385	return DXGI_FORMAT_BC4_TYPELESS; /* 79 */
2386	case DXGI_FORMAT_BC5_UNORM:
2387	case DXGI_FORMAT_BC5_SNORM:
2388	return DXGI_FORMAT_BC5_TYPELESS; /* 82 */
2389	case DXGI_FORMAT_B8G8R8A8_UNORM:
2390	case DXGI_FORMAT_B8G8R8A8_UNORM_SRGB:
2391	return DXGI_FORMAT_B8G8R8A8_TYPELESS; /* 90 */
2392	case DXGI_FORMAT_B8G8R8X8_UNORM:
2393	case DXGI_FORMAT_B8G8R8X8_UNORM_SRGB:
2394	return DXGI_FORMAT_B8G8R8X8_TYPELESS; /* 92 */
2395	case DXGI_FORMAT_BC6H_UF16:
2396	case DXGI_FORMAT_BC6H_SF16:
2397	return DXGI_FORMAT_BC6H_TYPELESS; /* 94 */
2398	case DXGI_FORMAT_BC7_UNORM:
2399	case DXGI_FORMAT_BC7_UNORM_SRGB:
2400	return DXGI_FORMAT_BC7_TYPELESS; /* 97 */
2401	default:
2402	break;
2403	}
2404
2405	return dxgiFormat;
2406	}
2407
2408
2409	static bool dxIsDepthStencilFormat(DXGI_FORMAT dxgiFormat)
2410	{
2411	switch (dxgiFormat)
2412	{
2413	case DXGI_FORMAT_D32_FLOAT_S8X24_UINT:
2414	case DXGI_FORMAT_D32_FLOAT:
2415	case DXGI_FORMAT_D24_UNORM_S8_UINT:
2416	case DXGI_FORMAT_D16_UNORM:
2417	return true;
2418	default:
2419	break;
2420	}
2421
2422	return false;
2423	}
2424
2425
2426	static int vmsvga3dBackSurfaceCreateTexture(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
2427	{
2428	PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2429	AssertReturn(p3dState, VERR_INVALID_STATE);
2430
2431	PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2432	AssertReturn(pBackend, VERR_INVALID_STATE);
2433
2434	UINT MiscFlags;
2435	DXDEVICE *pDXDevice = dxSurfaceDevice(p3dState, pSurface, pDXContext, &MiscFlags);
2436	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
2437
2438	if (pSurface->pBackendSurface != NULL)
2439	{
2440	AssertFailed(); /** @todo Should the function not be used like that? */
2441	vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
2442	}
2443
2444	PVMSVGA3DBACKENDSURFACE pBackendSurface;
2445	int rc = dxBackendSurfaceAlloc(&pBackendSurface);
2446	AssertRCReturn(rc, rc);
2447
2448	uint32_t const cWidth = pSurface->paMipmapLevels[0].cBlocksX * pSurface->cxBlock;
2449	uint32_t const cHeight = pSurface->paMipmapLevels[0].cBlocksY * pSurface->cyBlock;
2450	uint32_t const cDepth = pSurface->paMipmapLevels[0].mipmapSize.depth;
2451	uint32_t const numMipLevels = pSurface->cLevels;
2452
2453	DXGI_FORMAT dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(pSurface->format);
2454	AssertReturn(dxgiFormat != DXGI_FORMAT_UNKNOWN, E_FAIL);
2455
2456	/* Create typeless textures, unless it is a depth/stencil resource,
2457	* because D3D11_BIND_DEPTH_STENCIL requires a depth/stencil format.
2458	* Always use typeless format for staging/dynamic resources.
2459	*/
2460	DXGI_FORMAT const dxgiFormatTypeless = dxGetDxgiTypelessFormat(dxgiFormat);
2461	if (!dxIsDepthStencilFormat(dxgiFormat))
2462	dxgiFormat = dxgiFormatTypeless;
2463
2464	/* Format for staging resource is always the typeless one. */
2465	DXGI_FORMAT const dxgiFormatStaging = dxgiFormatTypeless;
2466
2467	DXGI_FORMAT dxgiFormatDynamic;
2468	/* Some drivers do not allow to use depth typeless formats for dynamic resources.
2469	* Create a placeholder texture (it does not work with CopySubresource).
2470	*/
2471	/** @todo Implement upload from such textures. */
2472	if (dxgiFormatTypeless == DXGI_FORMAT_R24G8_TYPELESS)
2473	dxgiFormatDynamic = DXGI_FORMAT_R32_UINT;
2474	else if (dxgiFormatTypeless == DXGI_FORMAT_R32G8X24_TYPELESS)
2475	dxgiFormatDynamic = DXGI_FORMAT_R32G32_UINT;
2476	else
2477	dxgiFormatDynamic = dxgiFormatTypeless;
2478
2479	/*
2480	* Create D3D11 texture object.
2481	*/
2482	D3D11_SUBRESOURCE_DATA *paInitialData = NULL;
2483	if (pSurface->paMipmapLevels[0].pSurfaceData)
2484	{
2485	/* Can happen for a non GBO surface or if GBO texture was updated prior to creation of the hardware resource. */
2486	uint32_t const cSubresource = numMipLevels * pSurface->surfaceDesc.numArrayElements;
2487	paInitialData = (D3D11_SUBRESOURCE_DATA )RTMemAlloc(cSubresource sizeof(D3D11_SUBRESOURCE_DATA));
2488	AssertPtrReturn(paInitialData, VERR_NO_MEMORY);
2489
2490	for (uint32_t i = 0; i < cSubresource; ++i)
2491	{
2492	PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
2493	D3D11_SUBRESOURCE_DATA *p = &paInitialData[i];
2494	p->pSysMem = pMipmapLevel->pSurfaceData;
2495	p->SysMemPitch = pMipmapLevel->cbSurfacePitch;
2496	p->SysMemSlicePitch = pMipmapLevel->cbSurfacePlane;
2497	}
2498	}
2499
2500	HRESULT hr = S_OK;
2501	if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET)
2502	{
2503	/*
2504	* Create the texture in backend device and open for the specified context.
2505	*/
2506	D3D11_TEXTURE2D_DESC td;
2507	RT_ZERO(td);
2508	td.Width = pSurface->paMipmapLevels[0].mipmapSize.width;
2509	td.Height = pSurface->paMipmapLevels[0].mipmapSize.height;
2510	Assert(pSurface->cLevels == 1);
2511	td.MipLevels = 1;
2512	td.ArraySize = 1;
2513	td.Format = dxgiFormat;
2514	td.SampleDesc.Count = 1;
2515	td.SampleDesc.Quality = 0;
2516	td.Usage = D3D11_USAGE_DEFAULT;
2517	td.BindFlags = D3D11_BIND_RENDER_TARGET \| D3D11_BIND_SHADER_RESOURCE;
2518	td.CPUAccessFlags = 0;
2519	td.MiscFlags = MiscFlags;
2520
2521	hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->u.pTexture2D);
2522	Assert(SUCCEEDED(hr));
2523	if (SUCCEEDED(hr))
2524	{
2525	/* Map-able texture. */
2526	td.Format = dxgiFormatDynamic;
2527	td.Usage = D3D11_USAGE_DYNAMIC;
2528	td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2529	td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2530	td.MiscFlags = 0;
2531	hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->dynamic.pTexture2D);
2532	Assert(SUCCEEDED(hr));
2533	}
2534
2535	if (SUCCEEDED(hr))
2536	{
2537	/* Staging texture. */
2538	td.Format = dxgiFormatStaging;
2539	td.Usage = D3D11_USAGE_STAGING;
2540	td.BindFlags = 0; /* No flags allowed. */
2541	td.CPUAccessFlags = D3D11_CPU_ACCESS_READ \| D3D11_CPU_ACCESS_WRITE;
2542	hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->staging.pTexture2D);
2543	Assert(SUCCEEDED(hr));
2544	}
2545
2546	if (SUCCEEDED(hr))
2547	hr = dxInitSharedHandle(pBackend, pBackendSurface);
2548
2549	if (SUCCEEDED(hr))
2550	{
2551	pBackendSurface->enmResType = VMSVGA3D_RESTYPE_SCREEN_TARGET;
2552	}
2553	}
2554	else if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_CUBEMAP)
2555	{
2556	Assert(pSurface->cFaces == 6);
2557	Assert(cWidth == cHeight);
2558	Assert(cDepth == 1);
2559	//DEBUG_BREAKPOINT_TEST();
2560
2561	D3D11_TEXTURE2D_DESC td;
2562	RT_ZERO(td);
2563	td.Width = cWidth;
2564	td.Height = cHeight;
2565	td.MipLevels = numMipLevels;
2566	td.ArraySize = pSurface->surfaceDesc.numArrayElements; /* This is 6 * numCubes */
2567	td.Format = dxgiFormat;
2568	td.SampleDesc.Count = 1;
2569	td.SampleDesc.Quality = 0;
2570	td.Usage = D3D11_USAGE_DEFAULT;
2571	td.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
2572	td.CPUAccessFlags = 0; /** @todo */
2573	td.MiscFlags = MiscFlags \| D3D11_RESOURCE_MISC_TEXTURECUBE; /** @todo */
2574	if ( numMipLevels > 1
2575	&& (td.BindFlags & (D3D11_BIND_SHADER_RESOURCE \| D3D11_BIND_RENDER_TARGET)) == (D3D11_BIND_SHADER_RESOURCE \| D3D11_BIND_RENDER_TARGET))
2576	td.MiscFlags \|= D3D11_RESOURCE_MISC_GENERATE_MIPS; /* Required for GenMips. */
2577
2578	hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->u.pTexture2D);
2579	Assert(SUCCEEDED(hr));
2580	if (SUCCEEDED(hr))
2581	{
2582	/* Map-able texture. */
2583	td.Format = dxgiFormatDynamic;
2584	td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2585	td.ArraySize = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2586	td.Usage = D3D11_USAGE_DYNAMIC;
2587	td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2588	td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2589	td.MiscFlags = 0;
2590	hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->dynamic.pTexture2D);
2591	Assert(SUCCEEDED(hr));
2592	}
2593
2594	if (SUCCEEDED(hr))
2595	{
2596	/* Staging texture. */
2597	td.Format = dxgiFormatStaging;
2598	td.Usage = D3D11_USAGE_STAGING;
2599	td.BindFlags = 0; /* No flags allowed. */
2600	td.CPUAccessFlags = D3D11_CPU_ACCESS_READ \| D3D11_CPU_ACCESS_WRITE;
2601	td.MiscFlags = 0;
2602	hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->staging.pTexture2D);
2603	Assert(SUCCEEDED(hr));
2604	}
2605
2606	if (SUCCEEDED(hr))
2607	hr = dxInitSharedHandle(pBackend, pBackendSurface);
2608
2609	if (SUCCEEDED(hr))
2610	{
2611	pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE_CUBE;
2612	}
2613	}
2614	else if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_1D)
2615	{
2616	/*
2617	* 1D texture.
2618	*/
2619	Assert(pSurface->cFaces == 1);
2620
2621	D3D11_TEXTURE1D_DESC td;
2622	RT_ZERO(td);
2623	td.Width = cWidth;
2624	td.MipLevels = numMipLevels;
2625	td.ArraySize = pSurface->surfaceDesc.numArrayElements;
2626	td.Format = dxgiFormat;
2627	td.Usage = D3D11_USAGE_DEFAULT;
2628	td.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
2629	td.CPUAccessFlags = 0;
2630	td.MiscFlags = MiscFlags; /** @todo */
2631	if ( numMipLevels > 1
2632	&& (td.BindFlags & (D3D11_BIND_SHADER_RESOURCE \| D3D11_BIND_RENDER_TARGET)) == (D3D11_BIND_SHADER_RESOURCE \| D3D11_BIND_RENDER_TARGET))
2633	td.MiscFlags \|= D3D11_RESOURCE_MISC_GENERATE_MIPS; /* Required for GenMips. */
2634
2635	hr = pDXDevice->pDevice->CreateTexture1D(&td, paInitialData, &pBackendSurface->u.pTexture1D);
2636	Assert(SUCCEEDED(hr));
2637	if (SUCCEEDED(hr))
2638	{
2639	/* Map-able texture. */
2640	td.Format = dxgiFormatDynamic;
2641	td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2642	td.ArraySize = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2643	td.Usage = D3D11_USAGE_DYNAMIC;
2644	td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2645	td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2646	td.MiscFlags = 0;
2647	hr = pDXDevice->pDevice->CreateTexture1D(&td, paInitialData, &pBackendSurface->dynamic.pTexture1D);
2648	Assert(SUCCEEDED(hr));
2649	}
2650
2651	if (SUCCEEDED(hr))
2652	{
2653	/* Staging texture. */
2654	td.Format = dxgiFormatStaging;
2655	td.Usage = D3D11_USAGE_STAGING;
2656	td.BindFlags = 0; /* No flags allowed. */
2657	td.CPUAccessFlags = D3D11_CPU_ACCESS_READ \| D3D11_CPU_ACCESS_WRITE;
2658	td.MiscFlags = 0;
2659	hr = pDXDevice->pDevice->CreateTexture1D(&td, paInitialData, &pBackendSurface->staging.pTexture1D);
2660	Assert(SUCCEEDED(hr));
2661	}
2662
2663	if (SUCCEEDED(hr))
2664	hr = dxInitSharedHandle(pBackend, pBackendSurface);
2665
2666	if (SUCCEEDED(hr))
2667	{
2668	pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE_1D;
2669	}
2670	}
2671	else
2672	{
2673	if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_VOLUME)
2674	{
2675	/*
2676	* Volume texture.
2677	*/
2678	Assert(pSurface->cFaces == 1);
2679	Assert(pSurface->surfaceDesc.numArrayElements == 1);
2680
2681	D3D11_TEXTURE3D_DESC td;
2682	RT_ZERO(td);
2683	td.Width = cWidth;
2684	td.Height = cHeight;
2685	td.Depth = cDepth;
2686	td.MipLevels = numMipLevels;
2687	td.Format = dxgiFormat;
2688	td.Usage = D3D11_USAGE_DEFAULT;
2689	td.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
2690	td.CPUAccessFlags = 0; /** @todo */
2691	td.MiscFlags = MiscFlags; /** @todo */
2692	if ( numMipLevels > 1
2693	&& (td.BindFlags & (D3D11_BIND_SHADER_RESOURCE \| D3D11_BIND_RENDER_TARGET)) == (D3D11_BIND_SHADER_RESOURCE \| D3D11_BIND_RENDER_TARGET))
2694	td.MiscFlags \|= D3D11_RESOURCE_MISC_GENERATE_MIPS; /* Required for GenMips. */
2695
2696	hr = pDXDevice->pDevice->CreateTexture3D(&td, paInitialData, &pBackendSurface->u.pTexture3D);
2697	Assert(SUCCEEDED(hr));
2698	if (SUCCEEDED(hr))
2699	{
2700	/* Map-able texture. */
2701	td.Format = dxgiFormatDynamic;
2702	td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2703	td.Usage = D3D11_USAGE_DYNAMIC;
2704	td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2705	td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2706	td.MiscFlags = 0;
2707	hr = pDXDevice->pDevice->CreateTexture3D(&td, paInitialData, &pBackendSurface->dynamic.pTexture3D);
2708	Assert(SUCCEEDED(hr));
2709	}
2710
2711	if (SUCCEEDED(hr))
2712	{
2713	/* Staging texture. */
2714	td.Format = dxgiFormatStaging;
2715	td.Usage = D3D11_USAGE_STAGING;
2716	td.BindFlags = 0; /* No flags allowed. */
2717	td.CPUAccessFlags = D3D11_CPU_ACCESS_READ \| D3D11_CPU_ACCESS_WRITE;
2718	td.MiscFlags = 0;
2719	hr = pDXDevice->pDevice->CreateTexture3D(&td, paInitialData, &pBackendSurface->staging.pTexture3D);
2720	Assert(SUCCEEDED(hr));
2721	}
2722
2723	if (SUCCEEDED(hr))
2724	hr = dxInitSharedHandle(pBackend, pBackendSurface);
2725
2726	if (SUCCEEDED(hr))
2727	{
2728	pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE_3D;
2729	}
2730	}
2731	else
2732	{
2733	/*
2734	* 2D texture.
2735	*/
2736	Assert(cDepth == 1);
2737	Assert(pSurface->cFaces == 1);
2738
2739	D3D11_TEXTURE2D_DESC td;
2740	RT_ZERO(td);
2741	td.Width = cWidth;
2742	td.Height = cHeight;
2743	td.MipLevels = numMipLevels;
2744	td.ArraySize = pSurface->surfaceDesc.numArrayElements;
2745	td.Format = dxgiFormat;
2746	td.SampleDesc.Count = 1;
2747	td.SampleDesc.Quality = 0;
2748	td.Usage = D3D11_USAGE_DEFAULT;
2749	td.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
2750	td.CPUAccessFlags = 0; /** @todo */
2751	td.MiscFlags = MiscFlags; /** @todo */
2752	if ( numMipLevels > 1
2753	&& (td.BindFlags & (D3D11_BIND_SHADER_RESOURCE \| D3D11_BIND_RENDER_TARGET)) == (D3D11_BIND_SHADER_RESOURCE \| D3D11_BIND_RENDER_TARGET))
2754	td.MiscFlags \|= D3D11_RESOURCE_MISC_GENERATE_MIPS; /* Required for GenMips. */
2755
2756	hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->u.pTexture2D);
2757	Assert(SUCCEEDED(hr));
2758	if (SUCCEEDED(hr))
2759	{
2760	/* Map-able texture. */
2761	td.Format = dxgiFormatDynamic;
2762	td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2763	td.ArraySize = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2764	td.Usage = D3D11_USAGE_DYNAMIC;
2765	td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2766	td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2767	td.MiscFlags = 0;
2768	hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->dynamic.pTexture2D);
2769	Assert(SUCCEEDED(hr));
2770	}
2771
2772	if (SUCCEEDED(hr))
2773	{
2774	/* Staging texture. */
2775	td.Format = dxgiFormatStaging;
2776	td.Usage = D3D11_USAGE_STAGING;
2777	td.BindFlags = 0; /* No flags allowed. */
2778	td.CPUAccessFlags = D3D11_CPU_ACCESS_READ \| D3D11_CPU_ACCESS_WRITE;
2779	td.MiscFlags = 0;
2780	hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->staging.pTexture2D);
2781	Assert(SUCCEEDED(hr));
2782	}
2783
2784	if (SUCCEEDED(hr))
2785	hr = dxInitSharedHandle(pBackend, pBackendSurface);
2786
2787	if (SUCCEEDED(hr))
2788	{
2789	pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE_2D;
2790	}
2791	}
2792	}
2793
2794	if (hr == DXGI_ERROR_DEVICE_REMOVED)
2795	{
2796	DEBUG_BREAKPOINT_TEST();
2797	hr = pDXDevice->pDevice->GetDeviceRemovedReason();
2798	}
2799
2800	Assert(hr == S_OK);
2801
2802	RTMemFree(paInitialData);
2803
2804	if (pSurface->autogenFilter != SVGA3D_TEX_FILTER_NONE)
2805	{
2806	}
2807
2808	if (SUCCEEDED(hr))
2809	{
2810	/*
2811	* Success.
2812	*/
2813	LogFunc(("sid = %u\n", pSurface->id));
2814	pBackendSurface->enmDxgiFormat = dxgiFormat;
2815	pSurface->pBackendSurface = pBackendSurface;
2816	if (p3dState->pBackend->fSingleDevice \|\| RT_BOOL(MiscFlags & D3D11_RESOURCE_MISC_SHARED))
2817	pSurface->idAssociatedContext = DX_CID_BACKEND;
2818	else
2819	pSurface->idAssociatedContext = pDXContext->cid;
2820	return VINF_SUCCESS;
2821	}
2822
2823	D3D_RELEASE(pBackendSurface->staging.pResource);
2824	D3D_RELEASE(pBackendSurface->dynamic.pResource);
2825	D3D_RELEASE(pBackendSurface->u.pResource);
2826	RTMemFree(pBackendSurface);
2827	return VERR_NO_MEMORY;
2828	}
2829
2830
2831	static int vmsvga3dBackSurfaceCreateBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
2832	{
2833	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
2834	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
2835
2836	/* Buffers should be created as such. */
2837	AssertReturn(RT_BOOL(pSurface->f.surfaceFlags & ( SVGA3D_SURFACE_HINT_INDEXBUFFER
2838	\| SVGA3D_SURFACE_HINT_VERTEXBUFFER
2839	\| SVGA3D_SURFACE_BIND_VERTEX_BUFFER
2840	\| SVGA3D_SURFACE_BIND_INDEX_BUFFER
2841	)), VERR_INVALID_PARAMETER);
2842
2843	if (pSurface->pBackendSurface != NULL)
2844	{
2845	AssertFailed(); /** @todo Should the function not be used like that? */
2846	vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
2847	}
2848
2849	PVMSVGA3DMIPMAPLEVEL pMipLevel;
2850	int rc = vmsvga3dMipmapLevel(pSurface, 0, 0, &pMipLevel);
2851	AssertRCReturn(rc, rc);
2852
2853	PVMSVGA3DBACKENDSURFACE pBackendSurface;
2854	rc = dxBackendSurfaceAlloc(&pBackendSurface);
2855	AssertRCReturn(rc, rc);
2856
2857	LogFunc(("sid = %u, size = %u\n", pSurface->id, pMipLevel->cbSurface));
2858
2859	/* Upload the current data, if any. */
2860	D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
2861	D3D11_SUBRESOURCE_DATA initialData;
2862	if (pMipLevel->pSurfaceData)
2863	{
2864	initialData.pSysMem = pMipLevel->pSurfaceData;
2865	initialData.SysMemPitch = pMipLevel->cbSurface;
2866	initialData.SysMemSlicePitch = pMipLevel->cbSurface;
2867
2868	pInitialData = &initialData;
2869	}
2870
2871	D3D11_BUFFER_DESC bd;
2872	RT_ZERO(bd);
2873	bd.ByteWidth = pMipLevel->cbSurface;
2874	bd.Usage = D3D11_USAGE_DEFAULT;
2875	bd.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
2876
2877	HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->u.pBuffer);
2878	Assert(SUCCEEDED(hr));
2879	#ifndef DX_COMMON_STAGING_BUFFER
2880	if (SUCCEEDED(hr))
2881	{
2882	/* Map-able Buffer. */
2883	bd.Usage = D3D11_USAGE_DYNAMIC;
2884	bd.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2885	bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2886	hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->dynamic.pBuffer);
2887	Assert(SUCCEEDED(hr));
2888	}
2889
2890	if (SUCCEEDED(hr))
2891	{
2892	/* Staging texture. */
2893	bd.Usage = D3D11_USAGE_STAGING;
2894	bd.BindFlags = 0; /* No flags allowed. */
2895	bd.CPUAccessFlags = D3D11_CPU_ACCESS_READ \| D3D11_CPU_ACCESS_WRITE;
2896	hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->staging.pBuffer);
2897	Assert(SUCCEEDED(hr));
2898	}
2899	#endif
2900
2901	if (SUCCEEDED(hr))
2902	{
2903	/*
2904	* Success.
2905	*/
2906	pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
2907	pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
2908	pSurface->pBackendSurface = pBackendSurface;
2909	pSurface->idAssociatedContext = pDXContext->cid;
2910	return VINF_SUCCESS;
2911	}
2912
2913	/* Failure. */
2914	D3D_RELEASE(pBackendSurface->u.pBuffer);
2915	#ifndef DX_COMMON_STAGING_BUFFER
2916	D3D_RELEASE(pBackendSurface->dynamic.pBuffer);
2917	D3D_RELEASE(pBackendSurface->staging.pBuffer);
2918	#endif
2919	RTMemFree(pBackendSurface);
2920	return VERR_NO_MEMORY;
2921	}
2922
2923
2924	static int vmsvga3dBackSurfaceCreateSoBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
2925	{
2926	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
2927	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
2928
2929	/* Buffers should be created as such. */
2930	AssertReturn(RT_BOOL(pSurface->f.surfaceFlags & SVGA3D_SURFACE_BIND_STREAM_OUTPUT), VERR_INVALID_PARAMETER);
2931
2932	if (pSurface->pBackendSurface != NULL)
2933	{
2934	AssertFailed(); /** @todo Should the function not be used like that? */
2935	vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
2936	}
2937
2938	PVMSVGA3DBACKENDSURFACE pBackendSurface;
2939	int rc = dxBackendSurfaceAlloc(&pBackendSurface);
2940	AssertRCReturn(rc, rc);
2941
2942	D3D11_BUFFER_DESC bd;
2943	RT_ZERO(bd);
2944	bd.ByteWidth = pSurface->paMipmapLevels[0].cbSurface;
2945	bd.Usage = D3D11_USAGE_DEFAULT;
2946	bd.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
2947	bd.CPUAccessFlags = 0; /// @todo ? D3D11_CPU_ACCESS_READ;
2948	bd.MiscFlags = 0;
2949	bd.StructureByteStride = 0;
2950
2951	HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, 0, &pBackendSurface->u.pBuffer);
2952	#ifndef DX_COMMON_STAGING_BUFFER
2953	if (SUCCEEDED(hr))
2954	{
2955	/* Map-able Buffer. */
2956	bd.Usage = D3D11_USAGE_DYNAMIC;
2957	bd.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2958	bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2959	hr = pDevice->pDevice->CreateBuffer(&bd, 0, &pBackendSurface->dynamic.pBuffer);
2960	Assert(SUCCEEDED(hr));
2961	}
2962
2963	if (SUCCEEDED(hr))
2964	{
2965	/* Staging texture. */
2966	bd.Usage = D3D11_USAGE_STAGING;
2967	bd.BindFlags = 0; /* No flags allowed. */
2968	bd.CPUAccessFlags = D3D11_CPU_ACCESS_READ \| D3D11_CPU_ACCESS_WRITE;
2969	hr = pDevice->pDevice->CreateBuffer(&bd, 0, &pBackendSurface->staging.pBuffer);
2970	Assert(SUCCEEDED(hr));
2971	}
2972	#endif
2973
2974	if (SUCCEEDED(hr))
2975	{
2976	/*
2977	* Success.
2978	*/
2979	pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
2980	pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
2981	pSurface->pBackendSurface = pBackendSurface;
2982	pSurface->idAssociatedContext = pDXContext->cid;
2983	return VINF_SUCCESS;
2984	}
2985
2986	/* Failure. */
2987	D3D_RELEASE(pBackendSurface->u.pBuffer);
2988	#ifndef DX_COMMON_STAGING_BUFFER
2989	D3D_RELEASE(pBackendSurface->dynamic.pBuffer);
2990	D3D_RELEASE(pBackendSurface->staging.pBuffer);
2991	#endif
2992	RTMemFree(pBackendSurface);
2993	return VERR_NO_MEMORY;
2994	}
2995
2996	#if 0
2997	static int vmsvga3dBackSurfaceCreateConstantBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface, uint32_t offsetInBytes, uint32_t sizeInBytes)
2998	{
2999	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
3000	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3001
3002	/* Buffers should be created as such. */
3003	AssertReturn(RT_BOOL(pSurface->f.surfaceFlags & ( SVGA3D_SURFACE_BIND_CONSTANT_BUFFER)), VERR_INVALID_PARAMETER);
3004
3005	if (pSurface->pBackendSurface != NULL)
3006	{
3007	AssertFailed(); /** @todo Should the function not be used like that? */
3008	vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
3009	}
3010
3011	PVMSVGA3DMIPMAPLEVEL pMipLevel;
3012	int rc = vmsvga3dMipmapLevel(pSurface, 0, 0, &pMipLevel);
3013	AssertRCReturn(rc, rc);
3014
3015	ASSERT_GUEST_RETURN( offsetInBytes < pMipLevel->cbSurface
3016	&& sizeInBytes <= pMipLevel->cbSurface - offsetInBytes, VERR_INVALID_PARAMETER);
3017
3018	PVMSVGA3DBACKENDSURFACE pBackendSurface;
3019	rc = dxBackendSurfaceAlloc(&pBackendSurface);
3020	AssertRCReturn(rc, rc);
3021
3022	/* Upload the current data, if any. */
3023	D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
3024	D3D11_SUBRESOURCE_DATA initialData;
3025	if (pMipLevel->pSurfaceData)
3026	{
3027	initialData.pSysMem = (uint8_t *)pMipLevel->pSurfaceData + offsetInBytes;
3028	initialData.SysMemPitch = pMipLevel->cbSurface;
3029	initialData.SysMemSlicePitch = pMipLevel->cbSurface;
3030
3031	pInitialData = &initialData;
3032
3033	// Log(("%.*Rhxd\n", sizeInBytes, initialData.pSysMem));
3034	}
3035
3036	D3D11_BUFFER_DESC bd;
3037	RT_ZERO(bd);
3038	bd.ByteWidth = sizeInBytes;
3039	bd.Usage = D3D11_USAGE_DYNAMIC;
3040	bd.BindFlags = D3D11_BIND_CONSTANT_BUFFER;
3041	bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
3042	bd.MiscFlags = 0;
3043	bd.StructureByteStride = 0;
3044
3045	HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->u.pBuffer);
3046	if (SUCCEEDED(hr))
3047	{
3048	/*
3049	* Success.
3050	*/
3051	pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
3052	pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
3053	pSurface->pBackendSurface = pBackendSurface;
3054	pSurface->idAssociatedContext = pDXContext->cid;
3055	return VINF_SUCCESS;
3056	}
3057
3058	/* Failure. */
3059	D3D_RELEASE(pBackendSurface->u.pBuffer);
3060	RTMemFree(pBackendSurface);
3061	return VERR_NO_MEMORY;
3062	}
3063	#endif
3064
3065	static int vmsvga3dBackSurfaceCreateResource(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
3066	{
3067	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
3068	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3069
3070	if (pSurface->pBackendSurface != NULL)
3071	{
3072	AssertFailed(); /** @todo Should the function not be used like that? */
3073	vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
3074	}
3075
3076	PVMSVGA3DMIPMAPLEVEL pMipLevel;
3077	int rc = vmsvga3dMipmapLevel(pSurface, 0, 0, &pMipLevel);
3078	AssertRCReturn(rc, rc);
3079
3080	PVMSVGA3DBACKENDSURFACE pBackendSurface;
3081	rc = dxBackendSurfaceAlloc(&pBackendSurface);
3082	AssertRCReturn(rc, rc);
3083
3084	HRESULT hr;
3085
3086	/*
3087	* Figure out the type of the surface.
3088	*/
3089	if (pSurface->format == SVGA3D_BUFFER)
3090	{
3091	/* Upload the current data, if any. */
3092	D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
3093	D3D11_SUBRESOURCE_DATA initialData;
3094	if (pMipLevel->pSurfaceData)
3095	{
3096	initialData.pSysMem = pMipLevel->pSurfaceData;
3097	initialData.SysMemPitch = pMipLevel->cbSurface;
3098	initialData.SysMemSlicePitch = pMipLevel->cbSurface;
3099
3100	pInitialData = &initialData;
3101	}
3102
3103	D3D11_BUFFER_DESC bd;
3104	RT_ZERO(bd);
3105	bd.ByteWidth = pMipLevel->cbSurface;
3106
3107	if (pSurface->f.surfaceFlags & (SVGA3D_SURFACE_STAGING_UPLOAD \| SVGA3D_SURFACE_STAGING_DOWNLOAD))
3108	bd.Usage = D3D11_USAGE_STAGING;
3109	else if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_HINT_DYNAMIC)
3110	bd.Usage = D3D11_USAGE_DYNAMIC;
3111	else if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_HINT_STATIC)
3112	bd.Usage = pInitialData ? D3D11_USAGE_IMMUTABLE : D3D11_USAGE_DEFAULT; /* Guest will update later. */
3113	else if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_HINT_INDIRECT_UPDATE)
3114	bd.Usage = D3D11_USAGE_DEFAULT;
3115
3116	bd.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
3117
3118	if (bd.Usage == D3D11_USAGE_STAGING)
3119	bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE \| D3D11_CPU_ACCESS_READ;
3120	else if (bd.Usage == D3D11_USAGE_DYNAMIC)
3121	bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
3122
3123	if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_DRAWINDIRECT_ARGS)
3124	bd.MiscFlags \|= D3D11_RESOURCE_MISC_DRAWINDIRECT_ARGS;
3125	if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_BIND_RAW_VIEWS)
3126	bd.MiscFlags \|= D3D11_RESOURCE_MISC_BUFFER_ALLOW_RAW_VIEWS;
3127	if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_BUFFER_STRUCTURED)
3128	bd.MiscFlags \|= D3D11_RESOURCE_MISC_BUFFER_STRUCTURED;
3129	if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_RESOURCE_CLAMP)
3130	bd.MiscFlags \|= D3D11_RESOURCE_MISC_RESOURCE_CLAMP;
3131
3132	if (bd.MiscFlags & D3D11_RESOURCE_MISC_BUFFER_STRUCTURED)
3133	{
3134	SVGAOTableSurfaceEntry entrySurface;
3135	rc = vmsvgaR3OTableReadSurface(pThisCC->svga.pSvgaR3State, pSurface->id, &entrySurface);
3136	AssertRCReturn(rc, rc);
3137
3138	bd.StructureByteStride = entrySurface.bufferByteStride;
3139	}
3140
3141	hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->u.pBuffer);
3142	Assert(SUCCEEDED(hr));
3143	#ifndef DX_COMMON_STAGING_BUFFER
3144	if (SUCCEEDED(hr))
3145	{
3146	/* Map-able Buffer. */
3147	bd.Usage = D3D11_USAGE_DYNAMIC;
3148	bd.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
3149	bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
3150	hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->dynamic.pBuffer);
3151	Assert(SUCCEEDED(hr));
3152	}
3153
3154	if (SUCCEEDED(hr))
3155	{
3156	/* Staging texture. */
3157	bd.Usage = D3D11_USAGE_STAGING;
3158	bd.BindFlags = 0; /* No flags allowed. */
3159	bd.CPUAccessFlags = D3D11_CPU_ACCESS_READ \| D3D11_CPU_ACCESS_WRITE;
3160	hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->staging.pBuffer);
3161	Assert(SUCCEEDED(hr));
3162	}
3163	#endif
3164	if (SUCCEEDED(hr))
3165	{
3166	pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
3167	pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
3168	}
3169	}
3170	else
3171	{
3172	/** @todo Texture. Currently vmsvga3dBackSurfaceCreateTexture is called for textures. */
3173	AssertFailed();
3174	hr = E_FAIL;
3175	}
3176
3177	if (SUCCEEDED(hr))
3178	{
3179	/*
3180	* Success.
3181	*/
3182	pSurface->pBackendSurface = pBackendSurface;
3183	pSurface->idAssociatedContext = pDXContext->cid;
3184	return VINF_SUCCESS;
3185	}
3186
3187	/* Failure. */
3188	D3D_RELEASE(pBackendSurface->u.pResource);
3189	D3D_RELEASE(pBackendSurface->dynamic.pResource);
3190	D3D_RELEASE(pBackendSurface->staging.pResource);
3191	RTMemFree(pBackendSurface);
3192	return VERR_NO_MEMORY;
3193	}
3194
3195
3196	#ifdef DX_COMMON_STAGING_BUFFER
3197	static int dxStagingBufferRealloc(DXDEVICE *pDXDevice, uint32_t cbRequiredSize)
3198	{
3199	AssertReturn(cbRequiredSize < SVGA3D_MAX_SURFACE_MEM_SIZE, VERR_INVALID_PARAMETER);
3200
3201	if (RT_LIKELY(cbRequiredSize <= pDXDevice->cbStagingBuffer))
3202	return VINF_SUCCESS;
3203
3204	D3D_RELEASE(pDXDevice->pStagingBuffer);
3205
3206	uint32_t const cbAlloc = RT_ALIGN_32(cbRequiredSize, _64K);
3207
3208	D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
3209	D3D11_BUFFER_DESC bd;
3210	RT_ZERO(bd);
3211	bd.ByteWidth = cbAlloc;
3212	bd.Usage = D3D11_USAGE_STAGING;
3213	//bd.BindFlags = 0; /* No bind flags are allowed for staging resources. */
3214	bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE \| D3D11_CPU_ACCESS_READ;
3215
3216	int rc = VINF_SUCCESS;
3217	ID3D11Buffer *pBuffer;
3218	HRESULT hr = pDXDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBuffer);
3219	if (SUCCEEDED(hr))
3220	{
3221	pDXDevice->pStagingBuffer = pBuffer;
3222	pDXDevice->cbStagingBuffer = cbAlloc;
3223	}
3224	else
3225	{
3226	pDXDevice->cbStagingBuffer = 0;
3227	rc = VERR_NO_MEMORY;
3228	}
3229
3230	return rc;
3231	}
3232	#endif
3233
3234
3235	static DECLCALLBACK(int) vmsvga3dBackInit(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC)
3236	{
3237	RT_NOREF(pDevIns, pThis);
3238
3239	int rc;
3240	#ifdef RT_OS_LINUX /** @todo Remove, this is currently needed for loading the X11 library in order to call XInitThreads(). */
3241	rc = glLdrInit(pDevIns);
3242	if (RT_FAILURE(rc))
3243	{
3244	LogRel(("VMSVGA3d: Error loading OpenGL library and resolving necessary functions: %Rrc\n", rc));
3245	return rc;
3246	}
3247	#endif
3248
3249	PVMSVGA3DBACKEND pBackend = (PVMSVGA3DBACKEND)RTMemAllocZ(sizeof(VMSVGA3DBACKEND));
3250	AssertReturn(pBackend, VERR_NO_MEMORY);
3251	pThisCC->svga.p3dState->pBackend = pBackend;
3252
3253	rc = RTLdrLoadSystem(VBOX_D3D11_LIBRARY_NAME, /* fNoUnload = */ true, &pBackend->hD3D11);
3254	AssertRC(rc);
3255	if (RT_SUCCESS(rc))
3256	{
3257	rc = RTLdrGetSymbol(pBackend->hD3D11, "D3D11CreateDevice", (void **)&pBackend->pfnD3D11CreateDevice);
3258	AssertRC(rc);
3259	}
3260
3261	if (RT_SUCCESS(rc))
3262	{
3263	/* Failure to load the shader disassembler is ignored. */
3264	int rc2 = RTLdrLoadSystem("D3DCompiler_47", /* fNoUnload = */ true, &pBackend->hD3DCompiler);
3265	if (RT_SUCCESS(rc2))
3266	rc2 = RTLdrGetSymbol(pBackend->hD3DCompiler, "D3DDisassemble", (void **)&pBackend->pfnD3DDisassemble);
3267	Log6Func(("Load D3DDisassemble: %Rrc\n", rc2));
3268	}
3269
3270	#if !defined(RT_OS_WINDOWS) \|\| defined(DX_FORCE_SINGLE_DEVICE)
3271	pBackend->fSingleDevice = true;
3272	#endif
3273
3274	LogRelMax(1, ("VMSVGA: Single DX device mode: %s\n", pBackend->fSingleDevice ? "enabled" : "disabled"));
3275
3276	//DEBUG_BREAKPOINT_TEST();
3277	return rc;
3278	}
3279
3280
3281	static DECLCALLBACK(int) vmsvga3dBackPowerOn(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC)
3282	{
3283	RT_NOREF(pDevIns, pThis);
3284
3285	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3286	AssertReturn(pState, VERR_INVALID_STATE);
3287
3288	PVMSVGA3DBACKEND pBackend = pState->pBackend;
3289	AssertReturn(pBackend, VERR_INVALID_STATE);
3290
3291	int rc = dxDeviceCreate(pBackend, &pBackend->dxDevice);
3292	if (RT_SUCCESS(rc))
3293	{
3294	IDXGIAdapter *pAdapter = NULL;
3295	HRESULT hr = pBackend->dxDevice.pDxgiFactory->EnumAdapters(0, &pAdapter);
3296	if (SUCCEEDED(hr))
3297	{
3298	DXGI_ADAPTER_DESC desc;
3299	hr = pAdapter->GetDesc(&desc);
3300	if (SUCCEEDED(hr))
3301	{
3302	char sz[RT_ELEMENTS(desc.Description)];
3303	for (unsigned i = 0; i < RT_ELEMENTS(desc.Description); ++i)
3304	sz[i] = (char)desc.Description[i];
3305	LogRelMax(1, ("VMSVGA: Adapter [%s]\n", sz));
3306	}
3307
3308	pAdapter->Release();
3309	}
3310	}
3311	return rc;
3312	}
3313
3314
3315	static DECLCALLBACK(int) vmsvga3dBackReset(PVGASTATECC pThisCC)
3316	{
3317	RT_NOREF(pThisCC);
3318	return VINF_SUCCESS;
3319	}
3320
3321
3322	static DECLCALLBACK(int) vmsvga3dBackTerminate(PVGASTATECC pThisCC)
3323	{
3324	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3325	AssertReturn(pState, VERR_INVALID_STATE);
3326
3327	if (pState->pBackend)
3328	dxDeviceDestroy(pState->pBackend, &pState->pBackend->dxDevice);
3329
3330	return VINF_SUCCESS;
3331	}
3332
3333
3334	/** @todo Such structures must be in VBoxVideo3D.h */
3335	typedef struct VBOX3DNOTIFYDEFINESCREEN
3336	{
3337	VBOX3DNOTIFY Core;
3338	uint32_t cWidth;
3339	uint32_t cHeight;
3340	int32_t xRoot;
3341	int32_t yRoot;
3342	uint32_t fPrimary;
3343	uint32_t cDpi;
3344	} VBOX3DNOTIFYDEFINESCREEN;
3345
3346
3347	static int vmsvga3dDrvNotifyDefineScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
3348	{
3349	VBOX3DNOTIFYDEFINESCREEN n;
3350	n.Core.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_CREATED;
3351	n.Core.iDisplay = pScreen->idScreen;
3352	n.Core.u32Reserved = 0;
3353	n.Core.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
3354	RT_ZERO(n.Core.au8Data);
3355	n.cWidth = pScreen->cWidth;
3356	n.cHeight = pScreen->cHeight;
3357	n.xRoot = pScreen->xOrigin;
3358	n.yRoot = pScreen->yOrigin;
3359	n.fPrimary = RT_BOOL(pScreen->fuScreen & SVGA_SCREEN_IS_PRIMARY);
3360	n.cDpi = pScreen->cDpi;
3361
3362	return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n.Core);
3363	}
3364
3365
3366	static int vmsvga3dDrvNotifyDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
3367	{
3368	VBOX3DNOTIFY n;
3369	n.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_DESTROYED;
3370	n.iDisplay = pScreen->idScreen;
3371	n.u32Reserved = 0;
3372	n.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
3373	RT_ZERO(n.au8Data);
3374
3375	return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n);
3376	}
3377
3378
3379	static int vmsvga3dDrvNotifyBindSurface(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, HANDLE hSharedSurface)
3380	{
3381	VBOX3DNOTIFY n;
3382	n.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_BIND_SURFACE;
3383	n.iDisplay = pScreen->idScreen;
3384	n.u32Reserved = 0;
3385	n.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
3386	(uint64_t )&n.au8Data[0] = (uint64_t)hSharedSurface;
3387
3388	return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n);
3389	}
3390
3391
3392	typedef struct VBOX3DNOTIFYUPDATE
3393	{
3394	VBOX3DNOTIFY Core;
3395	uint32_t x;
3396	uint32_t y;
3397	uint32_t w;
3398	uint32_t h;
3399	} VBOX3DNOTIFYUPDATE;
3400
3401
3402	static int vmsvga3dDrvNotifyUpdate(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen,
3403	uint32_t x, uint32_t y, uint32_t w, uint32_t h)
3404	{
3405	VBOX3DNOTIFYUPDATE n;
3406	n.Core.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_UPDATE_END;
3407	n.Core.iDisplay = pScreen->idScreen;
3408	n.Core.u32Reserved = 0;
3409	n.Core.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
3410	RT_ZERO(n.Core.au8Data);
3411	n.x = x;
3412	n.y = y;
3413	n.w = w;
3414	n.h = h;
3415
3416	return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n.Core);
3417	}
3418
3419	static int vmsvga3dHwScreenCreate(PVMSVGA3DSTATE pState, uint32_t cWidth, uint32_t cHeight, VMSVGAHWSCREEN *p)
3420	{
3421	PVMSVGA3DBACKEND pBackend = pState->pBackend;
3422
3423	DXDEVICE *pDXDevice = &pBackend->dxDevice;
3424	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
3425
3426	D3D11_TEXTURE2D_DESC td;
3427	RT_ZERO(td);
3428	td.Width = cWidth;
3429	td.Height = cHeight;
3430	td.MipLevels = 1;
3431	td.ArraySize = 1;
3432	td.Format = DXGI_FORMAT_B8G8R8A8_UNORM;
3433	td.SampleDesc.Count = 1;
3434	td.SampleDesc.Quality = 0;
3435	td.Usage = D3D11_USAGE_DEFAULT;
3436	td.BindFlags = D3D11_BIND_RENDER_TARGET \| D3D11_BIND_SHADER_RESOURCE;
3437	td.CPUAccessFlags = 0;
3438	td.MiscFlags = D3D11_RESOURCE_MISC_SHARED_KEYEDMUTEX;
3439
3440	HRESULT hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &p->pTexture);
3441	if (SUCCEEDED(hr))
3442	{
3443	/* Get the shared handle. */
3444	hr = p->pTexture->QueryInterface(__uuidof(IDXGIResource), (void**)&p->pDxgiResource);
3445	if (SUCCEEDED(hr))
3446	{
3447	hr = p->pDxgiResource->GetSharedHandle(&p->SharedHandle);
3448	if (SUCCEEDED(hr))
3449	hr = p->pTexture->QueryInterface(__uuidof(IDXGIKeyedMutex), (void**)&p->pDXGIKeyedMutex);
3450	}
3451	}
3452
3453	if (SUCCEEDED(hr))
3454	return VINF_SUCCESS;
3455
3456	AssertFailed();
3457	return VERR_NOT_SUPPORTED;
3458	}
3459
3460
3461	static void vmsvga3dHwScreenDestroy(PVMSVGA3DSTATE pState, VMSVGAHWSCREEN *p)
3462	{
3463	RT_NOREF(pState);
3464	D3D_RELEASE(p->pDXGIKeyedMutex);
3465	D3D_RELEASE(p->pDxgiResource);
3466	D3D_RELEASE(p->pTexture);
3467	p->SharedHandle = 0;
3468	p->sidScreenTarget = SVGA_ID_INVALID;
3469	}
3470
3471
3472	static DECLCALLBACK(int) vmsvga3dBackDefineScreen(PVGASTATE pThis, PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
3473	{
3474	RT_NOREF(pThis, pThisCC, pScreen);
3475
3476	LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: screen %u\n", pScreen->idScreen));
3477
3478	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3479	AssertReturn(pState, VERR_INVALID_STATE);
3480
3481	PVMSVGA3DBACKEND pBackend = pState->pBackend;
3482	AssertReturn(pBackend, VERR_INVALID_STATE);
3483
3484	Assert(pScreen->pHwScreen == NULL);
3485
3486	VMSVGAHWSCREEN p = (VMSVGAHWSCREEN )RTMemAllocZ(sizeof(VMSVGAHWSCREEN));
3487	AssertPtrReturn(p, VERR_NO_MEMORY);
3488
3489	p->sidScreenTarget = SVGA_ID_INVALID;
3490
3491	int rc = vmsvga3dDrvNotifyDefineScreen(pThisCC, pScreen);
3492	if (RT_SUCCESS(rc))
3493	{
3494	/* The frontend supports the screen. Create the actual resource. */
3495	rc = vmsvga3dHwScreenCreate(pState, pScreen->cWidth, pScreen->cHeight, p);
3496	if (RT_SUCCESS(rc))
3497	LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: created\n"));
3498	}
3499
3500	if (RT_SUCCESS(rc))
3501	{
3502	LogRel(("VMSVGA: Using HW accelerated screen %u\n", pScreen->idScreen));
3503	pScreen->pHwScreen = p;
3504	}
3505	else
3506	{
3507	LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: %Rrc\n", rc));
3508	vmsvga3dHwScreenDestroy(pState, p);
3509	RTMemFree(p);
3510	}
3511
3512	return rc;
3513	}
3514
3515
3516	static DECLCALLBACK(int) vmsvga3dBackDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
3517	{
3518	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3519	AssertReturn(pState, VERR_INVALID_STATE);
3520
3521	vmsvga3dDrvNotifyDestroyScreen(pThisCC, pScreen);
3522
3523	if (pScreen->pHwScreen)
3524	{
3525	vmsvga3dHwScreenDestroy(pState, pScreen->pHwScreen);
3526	RTMemFree(pScreen->pHwScreen);
3527	pScreen->pHwScreen = NULL;
3528	}
3529
3530	return VINF_SUCCESS;
3531	}
3532
3533
3534	static DECLCALLBACK(int) vmsvga3dBackSurfaceBlitToScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen,
3535	SVGASignedRect destRect, SVGA3dSurfaceImageId srcImage,
3536	SVGASignedRect srcRect, uint32_t cRects, SVGASignedRect *paRects)
3537	{
3538	RT_NOREF(pThisCC, pScreen, destRect, srcImage, srcRect, cRects, paRects);
3539
3540	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3541	AssertReturn(pState, VERR_INVALID_STATE);
3542
3543	PVMSVGA3DBACKEND pBackend = pState->pBackend;
3544	AssertReturn(pBackend, VERR_INVALID_STATE);
3545
3546	VMSVGAHWSCREEN *p = pScreen->pHwScreen;
3547	AssertReturn(p, VERR_NOT_SUPPORTED);
3548
3549	PVMSVGA3DSURFACE pSurface;
3550	int rc = vmsvga3dSurfaceFromSid(pState, srcImage.sid, &pSurface);
3551	AssertRCReturn(rc, rc);
3552
3553	/** @todo Implement. */
3554	AssertFailed();
3555	return VERR_NOT_IMPLEMENTED;
3556	}
3557
3558
3559	static DECLCALLBACK(int) vmsvga3dBackSurfaceMap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const pImage, SVGA3dBox const pBox,
3560	VMSVGA3D_SURFACE_MAP enmMapType, VMSVGA3D_MAPPED_SURFACE *pMap)
3561	{
3562	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3563	AssertReturn(pState, VERR_INVALID_STATE);
3564
3565	PVMSVGA3DBACKEND pBackend = pState->pBackend;
3566	AssertReturn(pBackend, VERR_INVALID_STATE);
3567
3568	PVMSVGA3DSURFACE pSurface;
3569	int rc = vmsvga3dSurfaceFromSid(pState, pImage->sid, &pSurface);
3570	AssertRCReturn(rc, rc);
3571
3572	PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
3573	AssertPtrReturn(pBackendSurface, VERR_INVALID_STATE);
3574
3575	PVMSVGA3DMIPMAPLEVEL pMipLevel;
3576	rc = vmsvga3dMipmapLevel(pSurface, pImage->face, pImage->mipmap, &pMipLevel);
3577	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
3578
3579	/* A surface is always mapped by the DX context which has created the surface. */
3580	DXDEVICE *pDevice = dxDeviceFromCid(pSurface->idAssociatedContext, pState);
3581	AssertReturn(pDevice && pDevice->pDevice, VERR_INVALID_STATE);
3582
3583	SVGA3dBox clipBox;
3584	if (pBox)
3585	{
3586	clipBox = *pBox;
3587	vmsvgaR3ClipBox(&pMipLevel->mipmapSize, &clipBox);
3588	ASSERT_GUEST_RETURN(clipBox.w && clipBox.h && clipBox.d, VERR_INVALID_PARAMETER);
3589	}
3590	else
3591	{
3592	clipBox.x = 0;
3593	clipBox.y = 0;
3594	clipBox.z = 0;
3595	clipBox.w = pMipLevel->mipmapSize.width;
3596	clipBox.h = pMipLevel->mipmapSize.height;
3597	clipBox.d = pMipLevel->mipmapSize.depth;
3598	}
3599
3600	D3D11_MAP d3d11MapType;
3601	switch (enmMapType)
3602	{
3603	case VMSVGA3D_SURFACE_MAP_READ: d3d11MapType = D3D11_MAP_READ; break;
3604	case VMSVGA3D_SURFACE_MAP_WRITE: d3d11MapType = D3D11_MAP_WRITE; break;
3605	case VMSVGA3D_SURFACE_MAP_READ_WRITE: d3d11MapType = D3D11_MAP_READ_WRITE; break;
3606	case VMSVGA3D_SURFACE_MAP_WRITE_DISCARD: d3d11MapType = D3D11_MAP_WRITE_DISCARD; break;
3607	default:
3608	AssertFailed();
3609	return VERR_INVALID_PARAMETER;
3610	}
3611
3612	D3D11_MAPPED_SUBRESOURCE mappedResource;
3613	RT_ZERO(mappedResource);
3614
3615	if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
3616	{
3617	Assert(pImage->face == 0 && pImage->mipmap == 0);
3618
3619	/* Wait for the surface to finish drawing. */
3620	dxSurfaceWait(pState, pSurface, pSurface->idAssociatedContext);
3621
3622	ID3D11Texture2D *pMappedTexture;
3623	if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
3624	{
3625	pMappedTexture = pBackendSurface->staging.pTexture2D;
3626
3627	/* Copy the texture content to the staging texture. */
3628	pDevice->pImmediateContext->CopyResource(pBackendSurface->staging.pTexture2D, pBackendSurface->u.pTexture2D);
3629	}
3630	else if (enmMapType == VMSVGA3D_SURFACE_MAP_WRITE)
3631	pMappedTexture = pBackendSurface->staging.pTexture2D;
3632	else
3633	pMappedTexture = pBackendSurface->dynamic.pTexture2D;
3634
3635	UINT const Subresource = 0; /* Screen target surfaces have only one subresource. */
3636	HRESULT hr = pDevice->pImmediateContext->Map(pMappedTexture, Subresource,
3637	d3d11MapType, /* MapFlags = */ 0, &mappedResource);
3638	if (SUCCEEDED(hr))
3639	vmsvga3dSurfaceMapInit(pMap, enmMapType, &clipBox, pSurface,
3640	mappedResource.pData, mappedResource.RowPitch, mappedResource.DepthPitch);
3641	else
3642	AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
3643	}
3644	else if ( pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_1D
3645	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_2D
3646	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_CUBE
3647	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
3648	{
3649	dxSurfaceWait(pState, pSurface, pSurface->idAssociatedContext);
3650
3651	ID3D11Resource *pMappedResource;
3652	if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
3653	{
3654	pMappedResource = pBackendSurface->staging.pResource;
3655
3656	/* Copy the texture content to the staging texture.
3657	* The requested miplevel of the texture is copied to the miplevel 0 of the staging texture,
3658	* because the staging (and dynamic) structures do not have miplevels.
3659	* Always copy entire miplevel so all Dst are zero and pSrcBox is NULL, as D3D11 requires.
3660	*/
3661	ID3D11Resource *pDstResource = pMappedResource;
3662	UINT DstSubresource = 0;
3663	UINT DstX = 0;
3664	UINT DstY = 0;
3665	UINT DstZ = 0;
3666	ID3D11Resource *pSrcResource = pBackendSurface->u.pResource;
3667	UINT SrcSubresource = D3D11CalcSubresource(pImage->mipmap, pImage->face, pSurface->cLevels);
3668	D3D11_BOX *pSrcBox = NULL;
3669	//D3D11_BOX SrcBox;
3670	//SrcBox.left = 0;
3671	//SrcBox.top = 0;
3672	//SrcBox.front = 0;
3673	//SrcBox.right = pMipLevel->mipmapSize.width;
3674	//SrcBox.bottom = pMipLevel->mipmapSize.height;
3675	//SrcBox.back = pMipLevel->mipmapSize.depth;
3676	pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3677	pSrcResource, SrcSubresource, pSrcBox);
3678	}
3679	else if (enmMapType == VMSVGA3D_SURFACE_MAP_WRITE)
3680	pMappedResource = pBackendSurface->staging.pResource;
3681	else
3682	pMappedResource = pBackendSurface->dynamic.pResource;
3683
3684	UINT const Subresource = 0; /* Dynamic or staging textures have one subresource. */
3685	HRESULT hr = pDevice->pImmediateContext->Map(pMappedResource, Subresource,
3686	d3d11MapType, /* MapFlags = */ 0, &mappedResource);
3687	if (SUCCEEDED(hr))
3688	vmsvga3dSurfaceMapInit(pMap, enmMapType, &clipBox, pSurface,
3689	mappedResource.pData, mappedResource.RowPitch, mappedResource.DepthPitch);
3690	else
3691	AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
3692	}
3693	else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
3694	{
3695	#ifdef DX_COMMON_STAGING_BUFFER
3696	/* Map the staging buffer. */
3697	rc = dxStagingBufferRealloc(pDevice, pMipLevel->cbSurface);
3698	if (RT_SUCCESS(rc))
3699	{
3700	/* The staging buffer does not allow D3D11_MAP_WRITE_DISCARD, so replace it. */
3701	if (d3d11MapType == D3D11_MAP_WRITE_DISCARD)
3702	d3d11MapType = D3D11_MAP_WRITE;
3703
3704	if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
3705	{
3706	/* Copy from the buffer to the staging buffer. */
3707	ID3D11Resource *pDstResource = pDevice->pStagingBuffer;
3708	UINT DstSubresource = 0;
3709	UINT DstX = clipBox.x;
3710	UINT DstY = clipBox.y;
3711	UINT DstZ = clipBox.z;
3712	ID3D11Resource *pSrcResource = pBackendSurface->u.pResource;
3713	UINT SrcSubresource = 0;
3714	D3D11_BOX SrcBox;
3715	SrcBox.left = clipBox.x;
3716	SrcBox.top = clipBox.y;
3717	SrcBox.front = clipBox.z;
3718	SrcBox.right = clipBox.w;
3719	SrcBox.bottom = clipBox.h;
3720	SrcBox.back = clipBox.d;
3721	pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3722	pSrcResource, SrcSubresource, &SrcBox);
3723	}
3724
3725	UINT const Subresource = 0; /* Buffers have only one subresource. */
3726	HRESULT hr = pDevice->pImmediateContext->Map(pDevice->pStagingBuffer, Subresource,
3727	d3d11MapType, /* MapFlags = */ 0, &mappedResource);
3728	if (SUCCEEDED(hr))
3729	vmsvga3dSurfaceMapInit(pMap, enmMapType, &clipBox, pSurface,
3730	mappedResource.pData, mappedResource.RowPitch, mappedResource.DepthPitch);
3731	else
3732	AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
3733	}
3734	#else
3735	ID3D11Resource *pMappedResource;
3736	if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
3737	{
3738	pMappedResource = pBackendSurface->staging.pResource;
3739
3740	/* Copy the resource content to the staging resource. */
3741	ID3D11Resource *pDstResource = pMappedResource;
3742	UINT DstSubresource = 0;
3743	UINT DstX = clipBox.x;
3744	UINT DstY = clipBox.y;
3745	UINT DstZ = clipBox.z;
3746	ID3D11Resource *pSrcResource = pBackendSurface->u.pResource;
3747	UINT SrcSubresource = 0;
3748	D3D11_BOX SrcBox;
3749	SrcBox.left = clipBox.x;
3750	SrcBox.top = clipBox.y;
3751	SrcBox.front = clipBox.z;
3752	SrcBox.right = clipBox.w;
3753	SrcBox.bottom = clipBox.h;
3754	SrcBox.back = clipBox.d;
3755	pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3756	pSrcResource, SrcSubresource, &SrcBox);
3757	}
3758	else if (enmMapType == VMSVGA3D_SURFACE_MAP_WRITE)
3759	pMappedResource = pBackendSurface->staging.pResource;
3760	else
3761	pMappedResource = pBackendSurface->dynamic.pResource;
3762
3763	UINT const Subresource = 0; /* Dynamic or staging textures have one subresource. */
3764	HRESULT hr = pDevice->pImmediateContext->Map(pMappedResource, Subresource,
3765	d3d11MapType, /* MapFlags = */ 0, &mappedResource);
3766	if (SUCCEEDED(hr))
3767	vmsvga3dSurfaceMapInit(pMap, enmMapType, &clipBox, pSurface,
3768	mappedResource.pData, mappedResource.RowPitch, mappedResource.DepthPitch);
3769	else
3770	AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
3771	#endif
3772	}
3773	else
3774	{
3775	// UINT D3D11CalcSubresource(UINT MipSlice, UINT ArraySlice, UINT MipLevels);
3776	/** @todo Implement. */
3777	AssertFailed();
3778	rc = VERR_NOT_IMPLEMENTED;
3779	}
3780
3781	return rc;
3782	}
3783
3784
3785	static DECLCALLBACK(int) vmsvga3dBackSurfaceUnmap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const pImage, VMSVGA3D_MAPPED_SURFACE pMap, bool fWritten)
3786	{
3787	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3788	AssertReturn(pState, VERR_INVALID_STATE);
3789
3790	PVMSVGA3DBACKEND pBackend = pState->pBackend;
3791	AssertReturn(pBackend, VERR_INVALID_STATE);
3792
3793	PVMSVGA3DSURFACE pSurface;
3794	int rc = vmsvga3dSurfaceFromSid(pState, pImage->sid, &pSurface);
3795	AssertRCReturn(rc, rc);
3796
3797	/* The called should not use the function for system memory surfaces. */
3798	PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
3799	AssertReturn(pBackendSurface, VERR_INVALID_PARAMETER);
3800
3801	PVMSVGA3DMIPMAPLEVEL pMipLevel;
3802	rc = vmsvga3dMipmapLevel(pSurface, pImage->face, pImage->mipmap, &pMipLevel);
3803	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
3804
3805	/* A surface is always mapped by the DX context which has created the surface. */
3806	DXDEVICE *pDevice = dxDeviceFromCid(pSurface->idAssociatedContext, pState);
3807	AssertReturn(pDevice && pDevice->pDevice, VERR_INVALID_STATE);
3808
3809	if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
3810	{
3811	ID3D11Texture2D *pMappedTexture;
3812	if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ)
3813	pMappedTexture = pBackendSurface->staging.pTexture2D;
3814	else if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE)
3815	pMappedTexture = pBackendSurface->staging.pTexture2D;
3816	else
3817	pMappedTexture = pBackendSurface->dynamic.pTexture2D;
3818
3819	UINT const Subresource = 0; /* Screen target surfaces have only one subresource. */
3820	pDevice->pImmediateContext->Unmap(pMappedTexture, Subresource);
3821
3822	if ( fWritten
3823	&& ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
3824	\|\| pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
3825	\|\| pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
3826	{
3827	ID3D11Resource *pDstResource = pBackendSurface->u.pTexture2D;
3828	UINT DstSubresource = Subresource;
3829	UINT DstX = pMap->box.x;
3830	UINT DstY = pMap->box.y;
3831	UINT DstZ = pMap->box.z;
3832	ID3D11Resource *pSrcResource = pMappedTexture;
3833	UINT SrcSubresource = Subresource;
3834	D3D11_BOX SrcBox;
3835	SrcBox.left = pMap->box.x;
3836	SrcBox.top = pMap->box.y;
3837	SrcBox.front = pMap->box.z;
3838	SrcBox.right = pMap->box.x + pMap->box.w;
3839	SrcBox.bottom = pMap->box.y + pMap->box.h;
3840	SrcBox.back = pMap->box.z + pMap->box.d;
3841
3842	pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3843	pSrcResource, SrcSubresource, &SrcBox);
3844
3845	pBackendSurface->cidDrawing = pSurface->idAssociatedContext;
3846	}
3847	}
3848	else if ( pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_1D
3849	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_2D
3850	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_CUBE
3851	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
3852	{
3853	ID3D11Resource *pMappedResource;
3854	if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ)
3855	pMappedResource = pBackendSurface->staging.pResource;
3856	else if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE)
3857	pMappedResource = pBackendSurface->staging.pResource;
3858	else
3859	pMappedResource = pBackendSurface->dynamic.pResource;
3860
3861	UINT const Subresource = 0; /* Staging or dynamic textures have one subresource. */
3862	pDevice->pImmediateContext->Unmap(pMappedResource, Subresource);
3863
3864	if ( fWritten
3865	&& ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
3866	\|\| pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
3867	\|\| pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
3868	{
3869	/* If entire resource must be copied then use pSrcBox = NULL and dst point (0,0,0)
3870	* Because DX11 insists on this for some resource types, for example DEPTH_STENCIL resources.
3871	*/
3872	uint32_t const cWidth0 = pSurface->paMipmapLevels[0].mipmapSize.width;
3873	uint32_t const cHeight0 = pSurface->paMipmapLevels[0].mipmapSize.height;
3874	uint32_t const cDepth0 = pSurface->paMipmapLevels[0].mipmapSize.depth;
3875	/** @todo Entire subresource is always mapped. So find a way to copy it back, important for DEPTH_STENCIL mipmaps. */
3876	bool const fEntireResource = pMap->box.x == 0 && pMap->box.y == 0 && pMap->box.z == 0
3877	&& pMap->box.w == cWidth0 && pMap->box.h == cHeight0 && pMap->box.d == cDepth0;
3878
3879	ID3D11Resource *pDstResource = pBackendSurface->u.pResource;
3880	UINT DstSubresource = D3D11CalcSubresource(pImage->mipmap, pImage->face, pSurface->cLevels);
3881	UINT DstX = (pMap->box.x / pSurface->cxBlock) * pSurface->cxBlock;
3882	UINT DstY = (pMap->box.y / pSurface->cyBlock) * pSurface->cyBlock;
3883	UINT DstZ = pMap->box.z;
3884	ID3D11Resource *pSrcResource = pMappedResource;
3885	UINT SrcSubresource = Subresource;
3886	D3D11_BOX *pSrcBox;
3887	D3D11_BOX SrcBox;
3888	if (fEntireResource)
3889	pSrcBox = NULL;
3890	else
3891	{
3892	uint32_t const cxBlocks = (pMap->box.w + pSurface->cxBlock - 1) / pSurface->cxBlock;
3893	uint32_t const cyBlocks = (pMap->box.h + pSurface->cyBlock - 1) / pSurface->cyBlock;
3894
3895	SrcBox.left = DstX;
3896	SrcBox.top = DstY;
3897	SrcBox.front = DstZ;
3898	SrcBox.right = DstX + cxBlocks * pSurface->cxBlock;
3899	SrcBox.bottom = DstY + cyBlocks * pSurface->cyBlock;
3900	SrcBox.back = DstZ + pMap->box.d;
3901	pSrcBox = &SrcBox;
3902	}
3903
3904	pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3905	pSrcResource, SrcSubresource, pSrcBox);
3906
3907	pBackendSurface->cidDrawing = pSurface->idAssociatedContext;
3908	}
3909	}
3910	else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
3911	{
3912	Log4(("Unmap buffer sid = %u:\n%.*Rhxd\n", pSurface->id, pMap->cbRow, pMap->pvData));
3913
3914	#ifdef DX_COMMON_STAGING_BUFFER
3915	/* Unmap the staging buffer. */
3916	UINT const Subresource = 0; /* Buffers have only one subresource. */
3917	pDevice->pImmediateContext->Unmap(pDevice->pStagingBuffer, Subresource);
3918
3919	/* Copy from the staging buffer to the actual buffer */
3920	if ( fWritten
3921	&& ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
3922	\|\| pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
3923	\|\| pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
3924	{
3925	ID3D11Resource *pDstResource = pBackendSurface->u.pResource;
3926	UINT DstSubresource = 0;
3927	UINT DstX = (pMap->box.x / pSurface->cxBlock) * pSurface->cxBlock;
3928	UINT DstY = (pMap->box.y / pSurface->cyBlock) * pSurface->cyBlock;
3929	UINT DstZ = pMap->box.z;
3930	ID3D11Resource *pSrcResource = pDevice->pStagingBuffer;
3931	UINT SrcSubresource = 0;
3932	D3D11_BOX SrcBox;
3933
3934	uint32_t const cxBlocks = (pMap->box.w + pSurface->cxBlock - 1) / pSurface->cxBlock;
3935	uint32_t const cyBlocks = (pMap->box.h + pSurface->cyBlock - 1) / pSurface->cyBlock;
3936
3937	SrcBox.left = DstX;
3938	SrcBox.top = DstY;
3939	SrcBox.front = DstZ;
3940	SrcBox.right = DstX + cxBlocks * pSurface->cxBlock;
3941	SrcBox.bottom = DstY + cyBlocks * pSurface->cyBlock;
3942	SrcBox.back = DstZ + pMap->box.d;
3943
3944	pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3945	pSrcResource, SrcSubresource, &SrcBox);
3946	}
3947	#else
3948	ID3D11Resource *pMappedResource;
3949	if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ)
3950	pMappedResource = pBackendSurface->staging.pResource;
3951	else if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE)
3952	pMappedResource = pBackendSurface->staging.pResource;
3953	else
3954	pMappedResource = pBackendSurface->dynamic.pResource;
3955
3956	UINT const Subresource = 0; /* Staging or dynamic textures have one subresource. */
3957	pDevice->pImmediateContext->Unmap(pMappedResource, Subresource);
3958
3959	if ( fWritten
3960	&& ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
3961	\|\| pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
3962	\|\| pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
3963	{
3964	ID3D11Resource *pDstResource = pBackendSurface->u.pResource;
3965	UINT DstSubresource = 0;
3966	UINT DstX = pMap->box.x;
3967	UINT DstY = pMap->box.y;
3968	UINT DstZ = pMap->box.z;
3969	ID3D11Resource *pSrcResource = pMappedResource;
3970	UINT SrcSubresource = 0;
3971	D3D11_BOX SrcBox;
3972	SrcBox.left = DstX;
3973	SrcBox.top = DstY;
3974	SrcBox.front = DstZ;
3975	SrcBox.right = DstX + pMap->box.w;
3976	SrcBox.bottom = DstY + pMap->box.h;
3977	SrcBox.back = DstZ + pMap->box.d;
3978	pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3979	pSrcResource, SrcSubresource, &SrcBox);
3980
3981	pBackendSurface->cidDrawing = pSurface->idAssociatedContext;
3982	}
3983	#endif
3984	}
3985	else
3986	{
3987	AssertFailed();
3988	rc = VERR_NOT_IMPLEMENTED;
3989	}
3990
3991	return rc;
3992	}
3993
3994
3995	static DECLCALLBACK(int) vmsvga3dScreenTargetBind(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, uint32_t sid)
3996	{
3997	int rc = VINF_SUCCESS;
3998
3999	PVMSVGA3DSURFACE pSurface;
4000	if (sid != SVGA_ID_INVALID)
4001	{
4002	/* Create the surface if does not yet exist. */
4003	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4004	AssertReturn(pState, VERR_INVALID_STATE);
4005
4006	rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
4007	AssertRCReturn(rc, rc);
4008
4009	if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
4010	{
4011	/* Create the actual texture. */
4012	rc = vmsvga3dBackSurfaceCreateScreenTarget(pThisCC, pSurface);
4013	AssertRCReturn(rc, rc);
4014	}
4015	}
4016	else
4017	pSurface = NULL;
4018
4019	/* Notify the HW accelerated screen if it is used. */
4020	VMSVGAHWSCREEN *pHwScreen = pScreen->pHwScreen;
4021	if (!pHwScreen)
4022	return VINF_SUCCESS;
4023
4024	/* Same surface -> do nothing. */
4025	if (pHwScreen->sidScreenTarget == sid)
4026	return VINF_SUCCESS;
4027
4028	if (sid != SVGA_ID_INVALID)
4029	{
4030	AssertReturn( pSurface->pBackendSurface
4031	&& pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET, VERR_INVALID_PARAMETER);
4032
4033	HANDLE const hSharedSurface = pHwScreen->SharedHandle;
4034	rc = vmsvga3dDrvNotifyBindSurface(pThisCC, pScreen, hSharedSurface);
4035	}
4036
4037	if (RT_SUCCESS(rc))
4038	{
4039	pHwScreen->sidScreenTarget = sid;
4040	}
4041
4042	return rc;
4043	}
4044
4045
4046	static DECLCALLBACK(int) vmsvga3dScreenTargetUpdate(PVGASTATECC pThisCC, VMSVGASCREENOBJECT pScreen, SVGA3dRect const pRect)
4047	{
4048	VMSVGAHWSCREEN *pHwScreen = pScreen->pHwScreen;
4049	AssertReturn(pHwScreen, VERR_NOT_SUPPORTED);
4050
4051	if (pHwScreen->sidScreenTarget == SVGA_ID_INVALID)
4052	return VINF_SUCCESS; /* No surface bound. */
4053
4054	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4055	AssertReturn(pState, VERR_INVALID_STATE);
4056
4057	PVMSVGA3DBACKEND pBackend = pState->pBackend;
4058	AssertReturn(pBackend, VERR_INVALID_STATE);
4059
4060	PVMSVGA3DSURFACE pSurface;
4061	int rc = vmsvga3dSurfaceFromSid(pState, pHwScreen->sidScreenTarget, &pSurface);
4062	AssertRCReturn(rc, rc);
4063
4064	PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
4065	AssertReturn(pBackendSurface && pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET, VERR_INVALID_PARAMETER);
4066
4067	SVGA3dRect boundRect;
4068	boundRect.x = 0;
4069	boundRect.y = 0;
4070	boundRect.w = pSurface->paMipmapLevels[0].mipmapSize.width;
4071	boundRect.h = pSurface->paMipmapLevels[0].mipmapSize.height;
4072	SVGA3dRect clipRect = *pRect;
4073	vmsvgaR3Clip3dRect(&boundRect, &clipRect);
4074	ASSERT_GUEST_RETURN(clipRect.w && clipRect.h, VERR_INVALID_PARAMETER);
4075
4076	/* Wait for the surface to finish drawing. */
4077	dxSurfaceWait(pState, pSurface, DX_CID_BACKEND);
4078
4079	/* Copy the screen texture to the shared surface. */
4080	DWORD result = pHwScreen->pDXGIKeyedMutex->AcquireSync(0, 10000);
4081	if (result == S_OK)
4082	{
4083	pBackend->dxDevice.pImmediateContext->CopyResource(pHwScreen->pTexture, pBackendSurface->u.pTexture2D);
4084
4085	dxDeviceFlush(&pBackend->dxDevice);
4086
4087	result = pHwScreen->pDXGIKeyedMutex->ReleaseSync(1);
4088	}
4089	else
4090	AssertFailed();
4091
4092	rc = vmsvga3dDrvNotifyUpdate(pThisCC, pScreen, pRect->x, pRect->y, pRect->w, pRect->h);
4093	return rc;
4094	}
4095
4096
4097	/*
4098	*
4099	* 3D interface.
4100	*
4101	*/
4102
4103	static DECLCALLBACK(int) vmsvga3dBackQueryCaps(PVGASTATECC pThisCC, SVGA3dDevCapIndex idx3dCaps, uint32_t *pu32Val)
4104	{
4105	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4106	AssertReturn(pState, VERR_INVALID_STATE);
4107
4108	int rc = VINF_SUCCESS;
4109
4110	*pu32Val = 0;
4111
4112	if (idx3dCaps > SVGA3D_DEVCAP_MAX)
4113	{
4114	LogRelMax(16, ("VMSVGA: unsupported SVGA3D_DEVCAP %d\n", idx3dCaps));
4115	return VERR_NOT_SUPPORTED;
4116	}
4117
4118	D3D_FEATURE_LEVEL const FeatureLevel = pState->pBackend->dxDevice.FeatureLevel;
4119
4120	/* Most values are taken from:
4121	* https://docs.microsoft.com/en-us/windows/win32/direct3d11/overviews-direct3d-11-devices-downlevel-intro
4122	*
4123	* Shader values are from
4124	* https://docs.microsoft.com/en-us/windows/win32/direct3dhlsl/dx-graphics-hlsl-models
4125	*/
4126
4127	switch (idx3dCaps)
4128	{
4129	case SVGA3D_DEVCAP_3D:
4130	*pu32Val = 1;
4131	break;
4132
4133	case SVGA3D_DEVCAP_MAX_LIGHTS:
4134	pu32Val = SVGA3D_NUM_LIGHTS; / VGPU9. Not applicable to DX11. */
4135	break;
4136
4137	case SVGA3D_DEVCAP_MAX_TEXTURES:
4138	pu32Val = SVGA3D_NUM_TEXTURE_UNITS; / VGPU9. Not applicable to DX11. */
4139	break;
4140
4141	case SVGA3D_DEVCAP_MAX_CLIP_PLANES:
4142	*pu32Val = SVGA3D_NUM_CLIPPLANES;
4143	break;
4144
4145	case SVGA3D_DEVCAP_VERTEX_SHADER_VERSION:
4146	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4147	*pu32Val = SVGA3DVSVERSION_40;
4148	else
4149	*pu32Val = SVGA3DVSVERSION_30;
4150	break;
4151
4152	case SVGA3D_DEVCAP_VERTEX_SHADER:
4153	*pu32Val = 1;
4154	break;
4155
4156	case SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION:
4157	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4158	*pu32Val = SVGA3DPSVERSION_40;
4159	else
4160	*pu32Val = SVGA3DPSVERSION_30;
4161	break;
4162
4163	case SVGA3D_DEVCAP_FRAGMENT_SHADER:
4164	*pu32Val = 1;
4165	break;
4166
4167	case SVGA3D_DEVCAP_MAX_RENDER_TARGETS:
4168	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4169	*pu32Val = 8;
4170	else
4171	*pu32Val = 4;
4172	break;
4173
4174	case SVGA3D_DEVCAP_S23E8_TEXTURES:
4175	case SVGA3D_DEVCAP_S10E5_TEXTURES:
4176	/* Must be obsolete by now; surface format caps specify the same thing. */
4177	break;
4178
4179	case SVGA3D_DEVCAP_MAX_FIXED_VERTEXBLEND:
4180	/* Obsolete */
4181	break;
4182
4183	/*
4184	* 2. The BUFFER_FORMAT capabilities are deprecated, and they always
4185	* return TRUE. Even on physical hardware that does not support
4186	* these formats natively, the SVGA3D device will provide an emulation
4187	* which should be invisible to the guest OS.
4188	*/
4189	case SVGA3D_DEVCAP_D16_BUFFER_FORMAT:
4190	case SVGA3D_DEVCAP_D24S8_BUFFER_FORMAT:
4191	case SVGA3D_DEVCAP_D24X8_BUFFER_FORMAT:
4192	*pu32Val = 1;
4193	break;
4194
4195	case SVGA3D_DEVCAP_QUERY_TYPES:
4196	/* Obsolete */
4197	break;
4198
4199	case SVGA3D_DEVCAP_TEXTURE_GRADIENT_SAMPLING:
4200	/* Obsolete */
4201	break;
4202
4203	case SVGA3D_DEVCAP_MAX_POINT_SIZE:
4204	AssertCompile(sizeof(uint32_t) == sizeof(float));
4205	(float )pu32Val = 256.0f; /* VGPU9. Not applicable to DX11. */
4206	break;
4207
4208	case SVGA3D_DEVCAP_MAX_SHADER_TEXTURES:
4209	/* Obsolete */
4210	break;
4211
4212	case SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH:
4213	case SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT:
4214	if (FeatureLevel >= D3D_FEATURE_LEVEL_11_0)
4215	*pu32Val = 16384;
4216	else if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4217	*pu32Val = 8192;
4218	else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
4219	*pu32Val = 4096;
4220	else
4221	*pu32Val = 2048;
4222	break;
4223
4224	case SVGA3D_DEVCAP_MAX_VOLUME_EXTENT:
4225	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4226	*pu32Val = 2048;
4227	else
4228	*pu32Val = 256;
4229	break;
4230
4231	case SVGA3D_DEVCAP_MAX_TEXTURE_REPEAT:
4232	if (FeatureLevel >= D3D_FEATURE_LEVEL_11_0)
4233	*pu32Val = 16384;
4234	else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
4235	*pu32Val = 8192;
4236	else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
4237	*pu32Val = 2048;
4238	else
4239	*pu32Val = 128;
4240	break;
4241
4242	case SVGA3D_DEVCAP_MAX_TEXTURE_ASPECT_RATIO:
4243	/* Obsolete */
4244	break;
4245
4246	case SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY:
4247	if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
4248	*pu32Val = D3D11_REQ_MAXANISOTROPY;
4249	else
4250	*pu32Val = 2; // D3D_FL9_1_DEFAULT_MAX_ANISOTROPY;
4251	break;
4252
4253	case SVGA3D_DEVCAP_MAX_PRIMITIVE_COUNT:
4254	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4255	*pu32Val = UINT32_MAX;
4256	else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
4257	*pu32Val = 1048575; // D3D_FL9_2_IA_PRIMITIVE_MAX_COUNT;
4258	else
4259	*pu32Val = 65535; // D3D_FL9_1_IA_PRIMITIVE_MAX_COUNT;
4260	break;
4261
4262	case SVGA3D_DEVCAP_MAX_VERTEX_INDEX:
4263	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4264	*pu32Val = UINT32_MAX;
4265	else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
4266	*pu32Val = 1048575;
4267	else
4268	*pu32Val = 65534;
4269	break;
4270
4271	case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS:
4272	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4273	*pu32Val = UINT32_MAX;
4274	else
4275	*pu32Val = 512;
4276	break;
4277
4278	case SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_INSTRUCTIONS:
4279	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4280	*pu32Val = UINT32_MAX;
4281	else
4282	*pu32Val = 512;
4283	break;
4284
4285	case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS:
4286	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4287	*pu32Val = 4096;
4288	else
4289	*pu32Val = 32;
4290	break;
4291
4292	case SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS:
4293	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4294	*pu32Val = 4096;
4295	else
4296	*pu32Val = 32;
4297	break;
4298
4299	case SVGA3D_DEVCAP_TEXTURE_OPS:
4300	/* Obsolete */
4301	break;
4302
4303	case SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8:
4304	case SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8:
4305	case SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10:
4306	case SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5:
4307	case SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5:
4308	case SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4:
4309	case SVGA3D_DEVCAP_SURFACEFMT_R5G6B5:
4310	case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16:
4311	case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8:
4312	case SVGA3D_DEVCAP_SURFACEFMT_ALPHA8:
4313	case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8:
4314	case SVGA3D_DEVCAP_SURFACEFMT_Z_D16:
4315	case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8:
4316	case SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8:
4317	case SVGA3D_DEVCAP_SURFACEFMT_DXT1:
4318	case SVGA3D_DEVCAP_SURFACEFMT_DXT2:
4319	case SVGA3D_DEVCAP_SURFACEFMT_DXT3:
4320	case SVGA3D_DEVCAP_SURFACEFMT_DXT4:
4321	case SVGA3D_DEVCAP_SURFACEFMT_DXT5:
4322	case SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8:
4323	case SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10:
4324	case SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8:
4325	case SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8:
4326	case SVGA3D_DEVCAP_SURFACEFMT_CxV8U8:
4327	case SVGA3D_DEVCAP_SURFACEFMT_R_S10E5:
4328	case SVGA3D_DEVCAP_SURFACEFMT_R_S23E8:
4329	case SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5:
4330	case SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8:
4331	case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5:
4332	case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8:
4333	case SVGA3D_DEVCAP_SURFACEFMT_V16U16:
4334	case SVGA3D_DEVCAP_SURFACEFMT_G16R16:
4335	case SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16:
4336	case SVGA3D_DEVCAP_SURFACEFMT_UYVY:
4337	case SVGA3D_DEVCAP_SURFACEFMT_YUY2:
4338	case SVGA3D_DEVCAP_SURFACEFMT_NV12:
4339	case SVGA3D_DEVCAP_DEAD10: /* SVGA3D_DEVCAP_SURFACEFMT_AYUV */
4340	case SVGA3D_DEVCAP_SURFACEFMT_Z_DF16:
4341	case SVGA3D_DEVCAP_SURFACEFMT_Z_DF24:
4342	case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT:
4343	case SVGA3D_DEVCAP_SURFACEFMT_ATI1:
4344	case SVGA3D_DEVCAP_SURFACEFMT_ATI2:
4345	case SVGA3D_DEVCAP_SURFACEFMT_YV12:
4346	{
4347	SVGA3dSurfaceFormat const enmFormat = vmsvgaDXDevCapSurfaceFmt2Format(idx3dCaps);
4348	rc = vmsvgaDXCheckFormatSupportPreDX(pState, enmFormat, pu32Val);
4349	break;
4350	}
4351
4352	case SVGA3D_DEVCAP_MISSING62:
4353	/* Unused */
4354	break;
4355
4356	case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEXTURES:
4357	/* Obsolete */
4358	break;
4359
4360	case SVGA3D_DEVCAP_MAX_SIMULTANEOUS_RENDER_TARGETS:
4361	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4362	*pu32Val = 8;
4363	else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
4364	*pu32Val = 4; // D3D_FL9_3_SIMULTANEOUS_RENDER_TARGET_COUNT
4365	else
4366	*pu32Val = 1; // D3D_FL9_1_SIMULTANEOUS_RENDER_TARGET_COUNT
4367	break;
4368
4369	case SVGA3D_DEVCAP_DEAD4: /* SVGA3D_DEVCAP_MULTISAMPLE_NONMASKABLESAMPLES */
4370	case SVGA3D_DEVCAP_DEAD5: /* SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES */
4371	pu32Val = (1 << (2-1)) \| (1 << (4-1)) \| (1 << (8-1)); / 2x, 4x, 8x */
4372	break;
4373
4374	case SVGA3D_DEVCAP_DEAD7: /* SVGA3D_DEVCAP_ALPHATOCOVERAGE */
4375	/* Obsolete */
4376	break;
4377
4378	case SVGA3D_DEVCAP_DEAD6: /* SVGA3D_DEVCAP_SUPERSAMPLE */
4379	/* Obsolete */
4380	break;
4381
4382	case SVGA3D_DEVCAP_AUTOGENMIPMAPS:
4383	*pu32Val = 1;
4384	break;
4385
4386	case SVGA3D_DEVCAP_MAX_CONTEXT_IDS:
4387	*pu32Val = SVGA3D_MAX_CONTEXT_IDS;
4388	break;
4389
4390	case SVGA3D_DEVCAP_MAX_SURFACE_IDS:
4391	*pu32Val = SVGA3D_MAX_SURFACE_IDS;
4392	break;
4393
4394	case SVGA3D_DEVCAP_DEAD1:
4395	/* Obsolete */
4396	break;
4397
4398	case SVGA3D_DEVCAP_DEAD8: /* SVGA3D_DEVCAP_VIDEO_DECODE */
4399	/* Obsolete */
4400	break;
4401
4402	case SVGA3D_DEVCAP_DEAD9: /* SVGA3D_DEVCAP_VIDEO_PROCESS */
4403	/* Obsolete */
4404	break;
4405
4406	case SVGA3D_DEVCAP_LINE_AA:
4407	*pu32Val = 1;
4408	break;
4409
4410	case SVGA3D_DEVCAP_LINE_STIPPLE:
4411	pu32Val = 0; / DX11 does not seem to support this directly. */
4412	break;
4413
4414	case SVGA3D_DEVCAP_MAX_LINE_WIDTH:
4415	AssertCompile(sizeof(uint32_t) == sizeof(float));
4416	(float )pu32Val = 1.0f;
4417	break;
4418
4419	case SVGA3D_DEVCAP_MAX_AA_LINE_WIDTH:
4420	AssertCompile(sizeof(uint32_t) == sizeof(float));
4421	(float )pu32Val = 1.0f;
4422	break;
4423
4424	case SVGA3D_DEVCAP_DEAD3: /* Old SVGA3D_DEVCAP_LOGICOPS */
4425	/* Deprecated. */
4426	AssertCompile(SVGA3D_DEVCAP_DEAD3 == 92); /* Newer SVGA headers redefine this. */
4427	break;
4428
4429	case SVGA3D_DEVCAP_TS_COLOR_KEY:
4430	pu32Val = 0; / DX11 does not seem to support this directly. */
4431	break;
4432
4433	case SVGA3D_DEVCAP_DEAD2:
4434	break;
4435
4436	case SVGA3D_DEVCAP_DXCONTEXT:
4437	*pu32Val = 1;
4438	break;
4439
4440	case SVGA3D_DEVCAP_DEAD11: /* SVGA3D_DEVCAP_MAX_TEXTURE_ARRAY_SIZE */
4441	*pu32Val = D3D11_REQ_TEXTURE2D_ARRAY_AXIS_DIMENSION;
4442	break;
4443
4444	case SVGA3D_DEVCAP_DX_MAX_VERTEXBUFFERS:
4445	*pu32Val = D3D11_IA_VERTEX_INPUT_RESOURCE_SLOT_COUNT;
4446	break;
4447
4448	case SVGA3D_DEVCAP_DX_MAX_CONSTANT_BUFFERS:
4449	*pu32Val = D3D11_COMMONSHADER_CONSTANT_BUFFER_HW_SLOT_COUNT;
4450	break;
4451
4452	case SVGA3D_DEVCAP_DX_PROVOKING_VERTEX:
4453	pu32Val = 0; / boolean */
4454	break;
4455
4456	case SVGA3D_DEVCAP_DXFMT_X8R8G8B8:
4457	case SVGA3D_DEVCAP_DXFMT_A8R8G8B8:
4458	case SVGA3D_DEVCAP_DXFMT_R5G6B5:
4459	case SVGA3D_DEVCAP_DXFMT_X1R5G5B5:
4460	case SVGA3D_DEVCAP_DXFMT_A1R5G5B5:
4461	case SVGA3D_DEVCAP_DXFMT_A4R4G4B4:
4462	case SVGA3D_DEVCAP_DXFMT_Z_D32:
4463	case SVGA3D_DEVCAP_DXFMT_Z_D16:
4464	case SVGA3D_DEVCAP_DXFMT_Z_D24S8:
4465	case SVGA3D_DEVCAP_DXFMT_Z_D15S1:
4466	case SVGA3D_DEVCAP_DXFMT_LUMINANCE8:
4467	case SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4:
4468	case SVGA3D_DEVCAP_DXFMT_LUMINANCE16:
4469	case SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8:
4470	case SVGA3D_DEVCAP_DXFMT_DXT1:
4471	case SVGA3D_DEVCAP_DXFMT_DXT2:
4472	case SVGA3D_DEVCAP_DXFMT_DXT3:
4473	case SVGA3D_DEVCAP_DXFMT_DXT4:
4474	case SVGA3D_DEVCAP_DXFMT_DXT5:
4475	case SVGA3D_DEVCAP_DXFMT_BUMPU8V8:
4476	case SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5:
4477	case SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8:
4478	case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1:
4479	case SVGA3D_DEVCAP_DXFMT_ARGB_S10E5:
4480	case SVGA3D_DEVCAP_DXFMT_ARGB_S23E8:
4481	case SVGA3D_DEVCAP_DXFMT_A2R10G10B10:
4482	case SVGA3D_DEVCAP_DXFMT_V8U8:
4483	case SVGA3D_DEVCAP_DXFMT_Q8W8V8U8:
4484	case SVGA3D_DEVCAP_DXFMT_CxV8U8:
4485	case SVGA3D_DEVCAP_DXFMT_X8L8V8U8:
4486	case SVGA3D_DEVCAP_DXFMT_A2W10V10U10:
4487	case SVGA3D_DEVCAP_DXFMT_ALPHA8:
4488	case SVGA3D_DEVCAP_DXFMT_R_S10E5:
4489	case SVGA3D_DEVCAP_DXFMT_R_S23E8:
4490	case SVGA3D_DEVCAP_DXFMT_RG_S10E5:
4491	case SVGA3D_DEVCAP_DXFMT_RG_S23E8:
4492	case SVGA3D_DEVCAP_DXFMT_BUFFER:
4493	case SVGA3D_DEVCAP_DXFMT_Z_D24X8:
4494	case SVGA3D_DEVCAP_DXFMT_V16U16:
4495	case SVGA3D_DEVCAP_DXFMT_G16R16:
4496	case SVGA3D_DEVCAP_DXFMT_A16B16G16R16:
4497	case SVGA3D_DEVCAP_DXFMT_UYVY:
4498	case SVGA3D_DEVCAP_DXFMT_YUY2:
4499	case SVGA3D_DEVCAP_DXFMT_NV12:
4500	case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD2: /* SVGA3D_DEVCAP_DXFMT_AYUV */
4501	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS:
4502	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT:
4503	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT:
4504	case SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS:
4505	case SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT:
4506	case SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT:
4507	case SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT:
4508	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS:
4509	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT:
4510	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM:
4511	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT:
4512	case SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS:
4513	case SVGA3D_DEVCAP_DXFMT_R32G32_UINT:
4514	case SVGA3D_DEVCAP_DXFMT_R32G32_SINT:
4515	case SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS:
4516	case SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT:
4517	case SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24:
4518	case SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT:
4519	case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS:
4520	case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT:
4521	case SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT:
4522	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS:
4523	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM:
4524	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB:
4525	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT:
4526	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT:
4527	case SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS:
4528	case SVGA3D_DEVCAP_DXFMT_R16G16_UINT:
4529	case SVGA3D_DEVCAP_DXFMT_R16G16_SINT:
4530	case SVGA3D_DEVCAP_DXFMT_R32_TYPELESS:
4531	case SVGA3D_DEVCAP_DXFMT_D32_FLOAT:
4532	case SVGA3D_DEVCAP_DXFMT_R32_UINT:
4533	case SVGA3D_DEVCAP_DXFMT_R32_SINT:
4534	case SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS:
4535	case SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT:
4536	case SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8:
4537	case SVGA3D_DEVCAP_DXFMT_X24_G8_UINT:
4538	case SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS:
4539	case SVGA3D_DEVCAP_DXFMT_R8G8_UNORM:
4540	case SVGA3D_DEVCAP_DXFMT_R8G8_UINT:
4541	case SVGA3D_DEVCAP_DXFMT_R8G8_SINT:
4542	case SVGA3D_DEVCAP_DXFMT_R16_TYPELESS:
4543	case SVGA3D_DEVCAP_DXFMT_R16_UNORM:
4544	case SVGA3D_DEVCAP_DXFMT_R16_UINT:
4545	case SVGA3D_DEVCAP_DXFMT_R16_SNORM:
4546	case SVGA3D_DEVCAP_DXFMT_R16_SINT:
4547	case SVGA3D_DEVCAP_DXFMT_R8_TYPELESS:
4548	case SVGA3D_DEVCAP_DXFMT_R8_UNORM:
4549	case SVGA3D_DEVCAP_DXFMT_R8_UINT:
4550	case SVGA3D_DEVCAP_DXFMT_R8_SNORM:
4551	case SVGA3D_DEVCAP_DXFMT_R8_SINT:
4552	case SVGA3D_DEVCAP_DXFMT_P8:
4553	case SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP:
4554	case SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM:
4555	case SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM:
4556	case SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS:
4557	case SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB:
4558	case SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS:
4559	case SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB:
4560	case SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS:
4561	case SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB:
4562	case SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS:
4563	case SVGA3D_DEVCAP_DXFMT_ATI1:
4564	case SVGA3D_DEVCAP_DXFMT_BC4_SNORM:
4565	case SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS:
4566	case SVGA3D_DEVCAP_DXFMT_ATI2:
4567	case SVGA3D_DEVCAP_DXFMT_BC5_SNORM:
4568	case SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM:
4569	case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS:
4570	case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB:
4571	case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS:
4572	case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB:
4573	case SVGA3D_DEVCAP_DXFMT_Z_DF16:
4574	case SVGA3D_DEVCAP_DXFMT_Z_DF24:
4575	case SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT:
4576	case SVGA3D_DEVCAP_DXFMT_YV12:
4577	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT:
4578	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT:
4579	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM:
4580	case SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT:
4581	case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM:
4582	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM:
4583	case SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT:
4584	case SVGA3D_DEVCAP_DXFMT_R16G16_UNORM:
4585	case SVGA3D_DEVCAP_DXFMT_R16G16_SNORM:
4586	case SVGA3D_DEVCAP_DXFMT_R32_FLOAT:
4587	case SVGA3D_DEVCAP_DXFMT_R8G8_SNORM:
4588	case SVGA3D_DEVCAP_DXFMT_R16_FLOAT:
4589	case SVGA3D_DEVCAP_DXFMT_D16_UNORM:
4590	case SVGA3D_DEVCAP_DXFMT_A8_UNORM:
4591	case SVGA3D_DEVCAP_DXFMT_BC1_UNORM:
4592	case SVGA3D_DEVCAP_DXFMT_BC2_UNORM:
4593	case SVGA3D_DEVCAP_DXFMT_BC3_UNORM:
4594	case SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM:
4595	case SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM:
4596	case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM:
4597	case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM:
4598	case SVGA3D_DEVCAP_DXFMT_BC4_UNORM:
4599	case SVGA3D_DEVCAP_DXFMT_BC5_UNORM:
4600	case SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS:
4601	case SVGA3D_DEVCAP_DXFMT_BC6H_UF16:
4602	case SVGA3D_DEVCAP_DXFMT_BC6H_SF16:
4603	case SVGA3D_DEVCAP_DXFMT_BC7_TYPELESS:
4604	case SVGA3D_DEVCAP_DXFMT_BC7_UNORM:
4605	case SVGA3D_DEVCAP_DXFMT_BC7_UNORM_SRGB:
4606	{
4607	SVGA3dSurfaceFormat const enmFormat = vmsvgaDXDevCapDxfmt2Format(idx3dCaps);
4608	rc = vmsvgaDXCheckFormatSupport(pState, enmFormat, pu32Val);
4609	break;
4610	}
4611
4612	case SVGA3D_DEVCAP_SM41:
4613	pu32Val = 1; / boolean */
4614	break;
4615
4616	case SVGA3D_DEVCAP_MULTISAMPLE_2X:
4617	pu32Val = 0; / boolean */
4618	break;
4619
4620	case SVGA3D_DEVCAP_MULTISAMPLE_4X:
4621	pu32Val = 0; / boolean */
4622	break;
4623
4624	case SVGA3D_DEVCAP_MS_FULL_QUALITY:
4625	pu32Val = 0; / boolean */
4626	break;
4627
4628	case SVGA3D_DEVCAP_LOGICOPS:
4629	AssertCompile(SVGA3D_DEVCAP_LOGICOPS == 248);
4630	pu32Val = 0; / boolean */
4631	break;
4632
4633	case SVGA3D_DEVCAP_LOGIC_BLENDOPS:
4634	pu32Val = 0; / boolean */
4635	break;
4636
4637	case SVGA3D_DEVCAP_RESERVED_1:
4638	break;
4639
4640	case SVGA3D_DEVCAP_RESERVED_2:
4641	break;
4642
4643	case SVGA3D_DEVCAP_SM5:
4644	pu32Val = 1; / boolean */
4645	break;
4646
4647	case SVGA3D_DEVCAP_MULTISAMPLE_8X:
4648	pu32Val = 0; / boolean */
4649	break;
4650
4651	case SVGA3D_DEVCAP_MAX:
4652	case SVGA3D_DEVCAP_INVALID:
4653	rc = VERR_NOT_SUPPORTED;
4654	break;
4655	}
4656
4657	return rc;
4658	}
4659
4660
4661	static DECLCALLBACK(int) vmsvga3dBackChangeMode(PVGASTATECC pThisCC)
4662	{
4663	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4664	AssertReturn(pState, VERR_INVALID_STATE);
4665
4666	return VINF_SUCCESS;
4667	}
4668
4669
4670	static DECLCALLBACK(int) vmsvga3dBackSurfaceCopy(PVGASTATECC pThisCC, SVGA3dSurfaceImageId dest, SVGA3dSurfaceImageId src,
4671	uint32_t cCopyBoxes, SVGA3dCopyBox *pBox)
4672	{
4673	RT_NOREF(cCopyBoxes, pBox);
4674
4675	LogFunc(("src sid %d -> dst sid %d\n", src.sid, dest.sid));
4676
4677	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4678	AssertReturn(pState, VERR_INVALID_STATE);
4679
4680	PVMSVGA3DBACKEND pBackend = pState->pBackend;
4681
4682	PVMSVGA3DSURFACE pSrcSurface;
4683	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, src.sid, &pSrcSurface);
4684	AssertRCReturn(rc, rc);
4685
4686	PVMSVGA3DSURFACE pDstSurface;
4687	rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, dest.sid, &pDstSurface);
4688	AssertRCReturn(rc, rc);
4689
4690	LogFunc(("src%s cid %d -> dst%s cid %d\n",
4691	pSrcSurface->pBackendSurface ? "" : " sysmem",
4692	pSrcSurface ? pSrcSurface->idAssociatedContext : SVGA_ID_INVALID,
4693	pDstSurface->pBackendSurface ? "" : " sysmem",
4694	pDstSurface ? pDstSurface->idAssociatedContext : SVGA_ID_INVALID));
4695
4696	//DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
4697	//AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4698
4699	if (pSrcSurface->pBackendSurface)
4700	{
4701	if (pDstSurface->pBackendSurface == NULL)
4702	{
4703	/* Create the target if it can be used as a device context shared resource (render or screen target). */
4704	if (pBackend->fSingleDevice \|\| dxIsSurfaceShareable(pDstSurface))
4705	{
4706	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, NULL, pDstSurface);
4707	AssertRCReturn(rc, rc);
4708	}
4709	}
4710
4711	if (pDstSurface->pBackendSurface)
4712	{
4713	/* Surface -> Surface. */
4714	/* Expect both of them to be shared surfaces created by the backend context. */
4715	Assert(pSrcSurface->idAssociatedContext == DX_CID_BACKEND && pDstSurface->idAssociatedContext == DX_CID_BACKEND);
4716
4717	/* Wait for the source surface to finish drawing. */
4718	dxSurfaceWait(pState, pSrcSurface, DX_CID_BACKEND);
4719
4720	DXDEVICE *pDXDevice = &pBackend->dxDevice;
4721
4722	/* Clip the box. */
4723	PVMSVGA3DMIPMAPLEVEL pSrcMipLevel;
4724	rc = vmsvga3dMipmapLevel(pSrcSurface, src.face, src.mipmap, &pSrcMipLevel);
4725	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
4726
4727	PVMSVGA3DMIPMAPLEVEL pDstMipLevel;
4728	rc = vmsvga3dMipmapLevel(pDstSurface, dest.face, dest.mipmap, &pDstMipLevel);
4729	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
4730
4731	SVGA3dCopyBox clipBox = *pBox;
4732	vmsvgaR3ClipCopyBox(&pSrcMipLevel->mipmapSize, &pDstMipLevel->mipmapSize, &clipBox);
4733
4734	UINT DstSubresource = vmsvga3dCalcSubresource(dest.mipmap, dest.face, pDstSurface->cLevels);
4735	UINT DstX = clipBox.x;
4736	UINT DstY = clipBox.y;
4737	UINT DstZ = clipBox.z;
4738
4739	UINT SrcSubresource = vmsvga3dCalcSubresource(src.mipmap, src.face, pSrcSurface->cLevels);
4740	D3D11_BOX SrcBox;
4741	SrcBox.left = clipBox.srcx;
4742	SrcBox.top = clipBox.srcy;
4743	SrcBox.front = clipBox.srcz;
4744	SrcBox.right = clipBox.srcx + clipBox.w;
4745	SrcBox.bottom = clipBox.srcy + clipBox.h;
4746	SrcBox.back = clipBox.srcz + clipBox.d;
4747
4748	Assert(cCopyBoxes == 1); /** @todo */
4749
4750	ID3D11Resource *pDstResource;
4751	ID3D11Resource *pSrcResource;
4752	pDstResource = dxResource(pState, pDstSurface, NULL);
4753	pSrcResource = dxResource(pState, pSrcSurface, NULL);
4754
4755	pDXDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
4756	pSrcResource, SrcSubresource, &SrcBox);
4757
4758	pDstSurface->pBackendSurface->cidDrawing = DX_CID_BACKEND;
4759	}
4760	else
4761	{
4762	/* Surface -> Memory. */
4763	AssertFailed(); /** @todo implement */
4764	}
4765	}
4766	else
4767	{
4768	/* Memory -> Surface. */
4769	AssertFailed(); /** @todo implement */
4770	}
4771
4772	return rc;
4773	}
4774
4775
4776	static DECLCALLBACK(void) vmsvga3dBackUpdateHostScreenViewport(PVGASTATECC pThisCC, uint32_t idScreen, VMSVGAVIEWPORT const *pOldViewport)
4777	{
4778	RT_NOREF(pThisCC, idScreen, pOldViewport);
4779	/** @todo Scroll the screen content without requiring the guest to redraw. */
4780	}
4781
4782
4783	static DECLCALLBACK(int) vmsvga3dBackSurfaceUpdateHeapBuffers(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface)
4784	{
4785	/** @todo */
4786	RT_NOREF(pThisCC, pSurface);
4787	return VERR_NOT_IMPLEMENTED;
4788	}
4789
4790
4791	/*
4792	*
4793	* VGPU9 callbacks. Not implemented.
4794	*
4795	*/
4796	/** @todo later */
4797
4798	/**
4799	* Create a new 3d context
4800	*
4801	* @returns VBox status code.
4802	* @param pThisCC The VGA/VMSVGA state for ring-3.
4803	* @param cid Context id
4804	*/
4805	static DECLCALLBACK(int) vmsvga3dBackContextDefine(PVGASTATECC pThisCC, uint32_t cid)
4806	{
4807	RT_NOREF(cid);
4808
4809	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4810	AssertReturn(pState, VERR_INVALID_STATE);
4811
4812	DEBUG_BREAKPOINT_TEST();
4813	return VERR_NOT_IMPLEMENTED;
4814	}
4815
4816
4817	/**
4818	* Destroy an existing 3d context
4819	*
4820	* @returns VBox status code.
4821	* @param pThisCC The VGA/VMSVGA state for ring-3.
4822	* @param cid Context id
4823	*/
4824	static DECLCALLBACK(int) vmsvga3dBackContextDestroy(PVGASTATECC pThisCC, uint32_t cid)
4825	{
4826	RT_NOREF(cid);
4827
4828	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4829	AssertReturn(pState, VERR_INVALID_STATE);
4830
4831	DEBUG_BREAKPOINT_TEST();
4832	return VINF_SUCCESS;
4833	}
4834
4835
4836	static DECLCALLBACK(int) vmsvga3dBackSetTransform(PVGASTATECC pThisCC, uint32_t cid, SVGA3dTransformType type, float matrix[16])
4837	{
4838	RT_NOREF(cid, type, matrix);
4839
4840	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4841	AssertReturn(pState, VERR_INVALID_STATE);
4842
4843	DEBUG_BREAKPOINT_TEST();
4844	return VINF_SUCCESS;
4845	}
4846
4847
4848	static DECLCALLBACK(int) vmsvga3dBackSetZRange(PVGASTATECC pThisCC, uint32_t cid, SVGA3dZRange zRange)
4849	{
4850	RT_NOREF(cid, zRange);
4851
4852	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4853	AssertReturn(pState, VERR_INVALID_STATE);
4854
4855	DEBUG_BREAKPOINT_TEST();
4856	return VINF_SUCCESS;
4857	}
4858
4859
4860	static DECLCALLBACK(int) vmsvga3dBackSetRenderState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cRenderStates, SVGA3dRenderState *pRenderState)
4861	{
4862	RT_NOREF(cid, cRenderStates, pRenderState);
4863
4864	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4865	AssertReturn(pState, VERR_INVALID_STATE);
4866
4867	DEBUG_BREAKPOINT_TEST();
4868	return VINF_SUCCESS;
4869	}
4870
4871
4872	static DECLCALLBACK(int) vmsvga3dBackSetRenderTarget(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRenderTargetType type, SVGA3dSurfaceImageId target)
4873	{
4874	RT_NOREF(cid, type, target);
4875
4876	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4877	AssertReturn(pState, VERR_INVALID_STATE);
4878
4879	DEBUG_BREAKPOINT_TEST();
4880	return VINF_SUCCESS;
4881	}
4882
4883
4884	static DECLCALLBACK(int) vmsvga3dBackSetTextureState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cTextureStates, SVGA3dTextureState *pTextureState)
4885	{
4886	RT_NOREF(cid, cTextureStates, pTextureState);
4887
4888	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4889	AssertReturn(pState, VERR_INVALID_STATE);
4890
4891	DEBUG_BREAKPOINT_TEST();
4892	return VINF_SUCCESS;
4893	}
4894
4895
4896	static DECLCALLBACK(int) vmsvga3dBackSetMaterial(PVGASTATECC pThisCC, uint32_t cid, SVGA3dFace face, SVGA3dMaterial *pMaterial)
4897	{
4898	RT_NOREF(cid, face, pMaterial);
4899
4900	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4901	AssertReturn(pState, VERR_INVALID_STATE);
4902
4903	DEBUG_BREAKPOINT_TEST();
4904	return VINF_SUCCESS;
4905	}
4906
4907
4908	static DECLCALLBACK(int) vmsvga3dBackSetLightData(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, SVGA3dLightData *pData)
4909	{
4910	RT_NOREF(cid, index, pData);
4911
4912	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4913	AssertReturn(pState, VERR_INVALID_STATE);
4914
4915	DEBUG_BREAKPOINT_TEST();
4916	return VINF_SUCCESS;
4917	}
4918
4919
4920	static DECLCALLBACK(int) vmsvga3dBackSetLightEnabled(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, uint32_t enabled)
4921	{
4922	RT_NOREF(cid, index, enabled);
4923
4924	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4925	AssertReturn(pState, VERR_INVALID_STATE);
4926
4927	DEBUG_BREAKPOINT_TEST();
4928	return VINF_SUCCESS;
4929	}
4930
4931
4932	static DECLCALLBACK(int) vmsvga3dBackSetViewPort(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
4933	{
4934	RT_NOREF(cid, pRect);
4935
4936	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4937	AssertReturn(pState, VERR_INVALID_STATE);
4938
4939	DEBUG_BREAKPOINT_TEST();
4940	return VINF_SUCCESS;
4941	}
4942
4943
4944	static DECLCALLBACK(int) vmsvga3dBackSetClipPlane(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, float plane[4])
4945	{
4946	RT_NOREF(cid, index, plane);
4947
4948	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4949	AssertReturn(pState, VERR_INVALID_STATE);
4950
4951	DEBUG_BREAKPOINT_TEST();
4952	return VINF_SUCCESS;
4953	}
4954
4955
4956	static DECLCALLBACK(int) vmsvga3dBackCommandClear(PVGASTATECC pThisCC, uint32_t cid, SVGA3dClearFlag clearFlag, uint32_t color, float depth,
4957	uint32_t stencil, uint32_t cRects, SVGA3dRect *pRect)
4958	{
4959	/* From SVGA3D_BeginClear comments:
4960	*
4961	* Clear is not affected by clipping, depth test, or other
4962	* render state which affects the fragment pipeline.
4963	*
4964	* Therefore this code must ignore the current scissor rect.
4965	*/
4966
4967	RT_NOREF(cid, clearFlag, color, depth, stencil, cRects, pRect);
4968
4969	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4970	AssertReturn(pState, VERR_INVALID_STATE);
4971
4972	DEBUG_BREAKPOINT_TEST();
4973	return VINF_SUCCESS;
4974	}
4975
4976
4977	static DECLCALLBACK(int) vmsvga3dBackDrawPrimitives(PVGASTATECC pThisCC, uint32_t cid, uint32_t numVertexDecls, SVGA3dVertexDecl *pVertexDecl,
4978	uint32_t numRanges, SVGA3dPrimitiveRange *pRange,
4979	uint32_t cVertexDivisor, SVGA3dVertexDivisor *pVertexDivisor)
4980	{
4981	RT_NOREF(cid, numVertexDecls, pVertexDecl, numRanges, pRange, cVertexDivisor, pVertexDivisor);
4982
4983	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4984	AssertReturn(pState, VERR_INVALID_STATE);
4985
4986	DEBUG_BREAKPOINT_TEST();
4987	return VINF_SUCCESS;
4988	}
4989
4990
4991	static DECLCALLBACK(int) vmsvga3dBackSetScissorRect(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
4992	{
4993	RT_NOREF(cid, pRect);
4994
4995	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4996	AssertReturn(pState, VERR_INVALID_STATE);
4997
4998	DEBUG_BREAKPOINT_TEST();
4999	return VINF_SUCCESS;
5000	}
5001
5002
5003	static DECLCALLBACK(int) vmsvga3dBackGenerateMipmaps(PVGASTATECC pThisCC, uint32_t sid, SVGA3dTextureFilter filter)
5004	{
5005	RT_NOREF(sid, filter);
5006
5007	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
5008	AssertReturn(pState, VERR_INVALID_STATE);
5009
5010	DEBUG_BREAKPOINT_TEST();
5011	return VINF_SUCCESS;
5012	}
5013
5014
5015	static DECLCALLBACK(int) vmsvga3dBackShaderDefine(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type,
5016	uint32_t cbData, uint32_t *pShaderData)
5017	{
5018	RT_NOREF(cid, shid, type, cbData, pShaderData);
5019
5020	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
5021	AssertReturn(pState, VERR_INVALID_STATE);
5022
5023	DEBUG_BREAKPOINT_TEST();
5024	return VINF_SUCCESS;
5025	}
5026
5027
5028	static DECLCALLBACK(int) vmsvga3dBackShaderDestroy(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type)
5029	{
5030	RT_NOREF(cid, shid, type);
5031
5032	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
5033	AssertReturn(pState, VERR_INVALID_STATE);
5034
5035	DEBUG_BREAKPOINT_TEST();
5036	return VINF_SUCCESS;
5037	}
5038
5039
5040	static DECLCALLBACK(int) vmsvga3dBackShaderSet(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext, uint32_t cid, SVGA3dShaderType type, uint32_t shid)
5041	{
5042	RT_NOREF(pContext, cid, type, shid);
5043
5044	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
5045	AssertReturn(pState, VERR_INVALID_STATE);
5046
5047	DEBUG_BREAKPOINT_TEST();
5048	return VINF_SUCCESS;
5049	}
5050
5051
5052	static DECLCALLBACK(int) vmsvga3dBackShaderSetConst(PVGASTATECC pThisCC, uint32_t cid, uint32_t reg, SVGA3dShaderType type,
5053	SVGA3dShaderConstType ctype, uint32_t cRegisters, uint32_t *pValues)
5054	{
5055	RT_NOREF(cid, reg, type, ctype, cRegisters, pValues);
5056
5057	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
5058	AssertReturn(pState, VERR_INVALID_STATE);
5059
5060	DEBUG_BREAKPOINT_TEST();
5061	return VINF_SUCCESS;
5062	}
5063
5064	static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryCreate(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
5065	{
5066	RT_NOREF(pThisCC, pContext);
5067	DEBUG_BREAKPOINT_TEST();
5068	return VINF_SUCCESS;
5069	}
5070
5071	static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryDelete(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
5072	{
5073	RT_NOREF(pThisCC, pContext);
5074	DEBUG_BREAKPOINT_TEST();
5075	return VINF_SUCCESS;
5076	}
5077
5078	static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryBegin(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
5079	{
5080	RT_NOREF(pThisCC, pContext);
5081	DEBUG_BREAKPOINT_TEST();
5082	return VINF_SUCCESS;
5083	}
5084
5085	static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryEnd(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
5086	{
5087	RT_NOREF(pThisCC, pContext);
5088	DEBUG_BREAKPOINT_TEST();
5089	return VINF_SUCCESS;
5090	}
5091
5092	static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryGetData(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext, uint32_t *pu32Pixels)
5093	{
5094	RT_NOREF(pThisCC, pContext, pu32Pixels);
5095	DEBUG_BREAKPOINT_TEST();
5096	return VINF_SUCCESS;
5097	}
5098
5099
5100	/**
5101	* Destroy backend specific surface bits (part of SVGA_3D_CMD_SURFACE_DESTROY).
5102	*
5103	* @param pThisCC The device context.
5104	* @param fClearCOTableEntry Whether to clear the corresponding COTable entry.
5105	* @param pSurface The surface being destroyed.
5106	*/
5107	static DECLCALLBACK(void) vmsvga3dBackSurfaceDestroy(PVGASTATECC pThisCC, bool fClearCOTableEntry, PVMSVGA3DSURFACE pSurface)
5108	{
5109	RT_NOREF(pThisCC);
5110
5111	/* The caller should not use the function for system memory surfaces. */
5112	PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
5113	if (!pBackendSurface)
5114	return;
5115	pSurface->pBackendSurface = NULL;
5116
5117	LogFunc(("sid=%u\n", pSurface->id));
5118
5119	/* If any views have been created for this resource, then also release them. */
5120	DXVIEW pIter, pNext;
5121	RTListForEachSafe(&pBackendSurface->listView, pIter, pNext, DXVIEW, nodeSurfaceView)
5122	{
5123	LogFunc(("pIter=%p, pNext=%p\n", pIter, pNext));
5124
5125	/** @todo The common DX code should track the views and clean COTable on a surface destruction. */
5126	if (fClearCOTableEntry)
5127	{
5128	PVMSVGA3DDXCONTEXT pDXContext;
5129	int rc = vmsvga3dDXContextFromCid(pThisCC->svga.p3dState, pIter->cid, &pDXContext);
5130	AssertRC(rc);
5131	if (RT_SUCCESS(rc))
5132	{
5133	switch (pIter->enmViewType)
5134	{
5135	case VMSVGA3D_VIEWTYPE_RENDERTARGET:
5136	{
5137	SVGACOTableDXRTViewEntry *pEntry = &pDXContext->cot.paRTView[pIter->viewId];
5138	RT_ZERO(*pEntry);
5139	break;
5140	}
5141	case VMSVGA3D_VIEWTYPE_DEPTHSTENCIL:
5142	{
5143	SVGACOTableDXDSViewEntry *pEntry = &pDXContext->cot.paDSView[pIter->viewId];
5144	RT_ZERO(*pEntry);
5145	break;
5146	}
5147	case VMSVGA3D_VIEWTYPE_SHADERRESOURCE:
5148	{
5149	SVGACOTableDXSRViewEntry *pEntry = &pDXContext->cot.paSRView[pIter->viewId];
5150	RT_ZERO(*pEntry);
5151	break;
5152	}
5153	case VMSVGA3D_VIEWTYPE_UNORDEREDACCESS:
5154	{
5155	SVGACOTableDXUAViewEntry *pEntry = &pDXContext->cot.paUAView[pIter->viewId];
5156	RT_ZERO(*pEntry);
5157	break;
5158	}
5159	default:
5160	AssertFailed();
5161	}
5162	}
5163	}
5164
5165	dxViewDestroy(pIter);
5166	}
5167
5168	if ( pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET
5169	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_1D
5170	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_2D
5171	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_CUBE
5172	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
5173	{
5174	D3D_RELEASE(pBackendSurface->staging.pResource);
5175	D3D_RELEASE(pBackendSurface->dynamic.pResource);
5176	D3D_RELEASE(pBackendSurface->u.pResource);
5177	}
5178	else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
5179	{
5180	#ifndef DX_COMMON_STAGING_BUFFER
5181	D3D_RELEASE(pBackendSurface->staging.pBuffer);
5182	D3D_RELEASE(pBackendSurface->dynamic.pBuffer);
5183	#endif
5184	D3D_RELEASE(pBackendSurface->u.pBuffer);
5185	}
5186	else
5187	{
5188	AssertFailed();
5189	}
5190
5191	RTMemFree(pBackendSurface);
5192
5193	/* No context has created the surface, because the surface does not exist anymore. */
5194	pSurface->idAssociatedContext = SVGA_ID_INVALID;
5195	}
5196
5197
5198	static DECLCALLBACK(void) vmsvga3dBackSurfaceInvalidateImage(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface, uint32_t uFace, uint32_t uMipmap)
5199	{
5200	RT_NOREF(pThisCC, uFace, uMipmap);
5201
5202	/* The caller should not use the function for system memory surfaces. */
5203	PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
5204	if (!pBackendSurface)
5205	return;
5206
5207	LogFunc(("sid=%u\n", pSurface->id));
5208
5209	/* The guest uses this to invalidate a buffer. */
5210	if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
5211	{
5212	Assert(uFace == 0 && uMipmap == 0); /* The caller ensures this. */
5213	/** @todo This causes flickering when a buffer is invalidated and re-created right before a draw call. */
5214	//vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
5215	}
5216	else
5217	{
5218	/** @todo Delete views that have been created for this mipmap.
5219	* For now just delete all views, they will be recte=reated if necessary.
5220	*/
5221	ASSERT_GUEST_FAILED();
5222	DXVIEW pIter, pNext;
5223	RTListForEachSafe(&pBackendSurface->listView, pIter, pNext, DXVIEW, nodeSurfaceView)
5224	{
5225	dxViewDestroy(pIter);
5226	}
5227	}
5228	}
5229
5230
5231	/**
5232	* Backend worker for implementing SVGA_3D_CMD_SURFACE_STRETCHBLT.
5233	*
5234	* @returns VBox status code.
5235	* @param pThis The VGA device instance.
5236	* @param pState The VMSVGA3d state.
5237	* @param pDstSurface The destination host surface.
5238	* @param uDstFace The destination face (valid).
5239	* @param uDstMipmap The destination mipmap level (valid).
5240	* @param pDstBox The destination box.
5241	* @param pSrcSurface The source host surface.
5242	* @param uSrcFace The destination face (valid).
5243	* @param uSrcMipmap The source mimap level (valid).
5244	* @param pSrcBox The source box.
5245	* @param enmMode The strecht blt mode .
5246	* @param pContext The VMSVGA3d context (already current for OGL).
5247	*/
5248	static DECLCALLBACK(int) vmsvga3dBackSurfaceStretchBlt(PVGASTATE pThis, PVMSVGA3DSTATE pState,
5249	PVMSVGA3DSURFACE pDstSurface, uint32_t uDstFace, uint32_t uDstMipmap, SVGA3dBox const *pDstBox,
5250	PVMSVGA3DSURFACE pSrcSurface, uint32_t uSrcFace, uint32_t uSrcMipmap, SVGA3dBox const *pSrcBox,
5251	SVGA3dStretchBltMode enmMode, PVMSVGA3DCONTEXT pContext)
5252	{
5253	RT_NOREF(pThis, pState, pDstSurface, uDstFace, uDstMipmap, pDstBox,
5254	pSrcSurface, uSrcFace, uSrcMipmap, pSrcBox, enmMode, pContext);
5255
5256	AssertFailed();
5257	return VINF_SUCCESS;
5258	}
5259
5260
5261	/**
5262	* Backend worker for implementing SVGA_3D_CMD_SURFACE_DMA that copies one box.
5263	*
5264	* @returns Failure status code or @a rc.
5265	* @param pThis The shared VGA/VMSVGA instance data.
5266	* @param pThisCC The VGA/VMSVGA state for ring-3.
5267	* @param pState The VMSVGA3d state.
5268	* @param pSurface The host surface.
5269	* @param pMipLevel Mipmap level. The caller knows it already.
5270	* @param uHostFace The host face (valid).
5271	* @param uHostMipmap The host mipmap level (valid).
5272	* @param GuestPtr The guest pointer.
5273	* @param cbGuestPitch The guest pitch.
5274	* @param transfer The transfer direction.
5275	* @param pBox The box to copy (clipped, valid, except for guest's srcx, srcy, srcz).
5276	* @param pContext The context (for OpenGL).
5277	* @param rc The current rc for all boxes.
5278	* @param iBox The current box number (for Direct 3D).
5279	*/
5280	static DECLCALLBACK(int) vmsvga3dBackSurfaceDMACopyBox(PVGASTATE pThis, PVGASTATECC pThisCC, PVMSVGA3DSTATE pState, PVMSVGA3DSURFACE pSurface,
5281	PVMSVGA3DMIPMAPLEVEL pMipLevel, uint32_t uHostFace, uint32_t uHostMipmap,
5282	SVGAGuestPtr GuestPtr, uint32_t cbGuestPitch, SVGA3dTransferType transfer,
5283	SVGA3dCopyBox const *pBox, PVMSVGA3DCONTEXT pContext, int rc, int iBox)
5284	{
5285	RT_NOREF(pState, pMipLevel, pContext, iBox);
5286
5287	/* The called should not use the function for system memory surfaces. */
5288	PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
5289	AssertReturn(pBackendSurface, VERR_INVALID_PARAMETER);
5290
5291	if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
5292	{
5293	/** @todo This is generic code and should be in DevVGA-SVGA3d.cpp for backends which support Map/Unmap. */
5294	AssertReturn(uHostFace == 0 && uHostMipmap == 0, VERR_INVALID_PARAMETER);
5295
5296	uint32_t const u32GuestBlockX = pBox->srcx / pSurface->cxBlock;
5297	uint32_t const u32GuestBlockY = pBox->srcy / pSurface->cyBlock;
5298	Assert(u32GuestBlockX * pSurface->cxBlock == pBox->srcx);
5299	Assert(u32GuestBlockY * pSurface->cyBlock == pBox->srcy);
5300	uint32_t const cBlocksX = (pBox->w + pSurface->cxBlock - 1) / pSurface->cxBlock;
5301	uint32_t const cBlocksY = (pBox->h + pSurface->cyBlock - 1) / pSurface->cyBlock;
5302	AssertMsgReturn(cBlocksX && cBlocksY, ("Empty box %dx%d\n", pBox->w, pBox->h), VERR_INTERNAL_ERROR);
5303
5304	/* vmsvgaR3GmrTransfer verifies uGuestOffset.
5305	* srcx(u32GuestBlockX) and srcy(u32GuestBlockY) have been verified in vmsvga3dSurfaceDMA
5306	* to not cause 32 bit overflow when multiplied by cbBlock and cbGuestPitch.
5307	*/
5308	uint64_t const uGuestOffset = u32GuestBlockX * pSurface->cbBlock + u32GuestBlockY * cbGuestPitch;
5309	AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
5310
5311	SVGA3dSurfaceImageId image;
5312	image.sid = pSurface->id;
5313	image.face = uHostFace;
5314	image.mipmap = uHostMipmap;
5315
5316	SVGA3dBox box;
5317	box.x = pBox->x;
5318	box.y = pBox->y;
5319	box.z = 0;
5320	box.w = pBox->w;
5321	box.h = pBox->h;
5322	box.d = 1;
5323
5324	VMSVGA3D_SURFACE_MAP const enmMap = transfer == SVGA3D_WRITE_HOST_VRAM
5325	? VMSVGA3D_SURFACE_MAP_WRITE
5326	: VMSVGA3D_SURFACE_MAP_READ;
5327
5328	VMSVGA3D_MAPPED_SURFACE map;
5329	rc = vmsvga3dBackSurfaceMap(pThisCC, &image, &box, enmMap, &map);
5330	if (RT_SUCCESS(rc))
5331	{
5332	/* Prepare parameters for vmsvgaR3GmrTransfer, which needs the host buffer address, size
5333	* and offset of the first scanline.
5334	*/
5335	uint32_t const cbLockedBuf = map.cbRowPitch * cBlocksY;
5336	uint8_t pu8LockedBuf = (uint8_t )map.pvData;
5337	uint32_t const offLockedBuf = 0;
5338
5339	rc = vmsvgaR3GmrTransfer(pThis,
5340	pThisCC,
5341	transfer,
5342	pu8LockedBuf,
5343	cbLockedBuf,
5344	offLockedBuf,
5345	map.cbRowPitch,
5346	GuestPtr,
5347	(uint32_t)uGuestOffset,
5348	cbGuestPitch,
5349	cBlocksX * pSurface->cbBlock,
5350	cBlocksY);
5351	AssertRC(rc);
5352
5353	// Log4(("first line:\n%.Rhxd\n", cBlocksX pSurface->cbBlock, LockedRect.pBits));
5354
5355	//vmsvga3dMapWriteBmpFile(&map, "Dynamic");
5356
5357	vmsvga3dBackSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ true);
5358	}
5359	#if 0
5360	//DEBUG_BREAKPOINT_TEST();
5361	rc = vmsvga3dBackSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
5362	if (RT_SUCCESS(rc))
5363	{
5364	vmsvga3dMapWriteBmpFile(&map, "Staging");
5365
5366	vmsvga3dBackSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
5367	}
5368	#endif
5369	}
5370	else if ( pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_1D
5371	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_2D
5372	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_CUBE
5373	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
5374	{
5375	/** @todo This is generic code and should be in DevVGA-SVGA3d.cpp for backends which support Map/Unmap. */
5376	uint32_t const u32GuestBlockX = pBox->srcx / pSurface->cxBlock;
5377	uint32_t const u32GuestBlockY = pBox->srcy / pSurface->cyBlock;
5378	Assert(u32GuestBlockX * pSurface->cxBlock == pBox->srcx);
5379	Assert(u32GuestBlockY * pSurface->cyBlock == pBox->srcy);
5380	uint32_t const cBlocksX = (pBox->w + pSurface->cxBlock - 1) / pSurface->cxBlock;
5381	uint32_t const cBlocksY = (pBox->h + pSurface->cyBlock - 1) / pSurface->cyBlock;
5382	AssertMsgReturn(cBlocksX && cBlocksY && pBox->d, ("Empty box %dx%dx%d\n", pBox->w, pBox->h, pBox->d), VERR_INTERNAL_ERROR);
5383
5384	/* vmsvgaR3GmrTransfer verifies uGuestOffset.
5385	* srcx(u32GuestBlockX) and srcy(u32GuestBlockY) have been verified in vmsvga3dSurfaceDMA
5386	* to not cause 32 bit overflow when multiplied by cbBlock and cbGuestPitch.
5387	*/
5388	uint64_t uGuestOffset = u32GuestBlockX * pSurface->cbBlock + u32GuestBlockY * cbGuestPitch;
5389	AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
5390
5391	/* 3D texture needs additional processing. */
5392	ASSERT_GUEST_RETURN( pBox->z < D3D11_REQ_TEXTURE3D_U_V_OR_W_DIMENSION
5393	&& pBox->d <= D3D11_REQ_TEXTURE3D_U_V_OR_W_DIMENSION
5394	&& pBox->d <= D3D11_REQ_TEXTURE3D_U_V_OR_W_DIMENSION - pBox->z,
5395	VERR_INVALID_PARAMETER);
5396	ASSERT_GUEST_RETURN( pBox->srcz < D3D11_REQ_TEXTURE3D_U_V_OR_W_DIMENSION
5397	&& pBox->d <= D3D11_REQ_TEXTURE3D_U_V_OR_W_DIMENSION
5398	&& pBox->d <= D3D11_REQ_TEXTURE3D_U_V_OR_W_DIMENSION - pBox->srcz,
5399	VERR_INVALID_PARAMETER);
5400
5401	uGuestOffset += pBox->srcz * pMipLevel->cbSurfacePlane;
5402
5403	SVGA3dSurfaceImageId image;
5404	image.sid = pSurface->id;
5405	image.face = uHostFace;
5406	image.mipmap = uHostMipmap;
5407
5408	SVGA3dBox box;
5409	box.x = pBox->x;
5410	box.y = pBox->y;
5411	box.z = pBox->z;
5412	box.w = pBox->w;
5413	box.h = pBox->h;
5414	box.d = pBox->d;
5415
5416	VMSVGA3D_SURFACE_MAP const enmMap = transfer == SVGA3D_WRITE_HOST_VRAM
5417	? VMSVGA3D_SURFACE_MAP_WRITE
5418	: VMSVGA3D_SURFACE_MAP_READ;
5419
5420	VMSVGA3D_MAPPED_SURFACE map;
5421	rc = vmsvga3dBackSurfaceMap(pThisCC, &image, &box, enmMap, &map);
5422	if (RT_SUCCESS(rc))
5423	{
5424	#if 0
5425	if (box.w == 250 && box.h == 250 && box.d == 1 && enmMap == VMSVGA3D_SURFACE_MAP_READ)
5426	{
5427	DEBUG_BREAKPOINT_TEST();
5428	vmsvga3dMapWriteBmpFile(&map, "P");
5429	}
5430	#endif
5431	/* Prepare parameters for vmsvgaR3GmrTransfer, which needs the host buffer address, size
5432	* and offset of the first scanline.
5433	*/
5434	uint32_t cbLockedBuf = map.cbRowPitch * cBlocksY;
5435	if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
5436	cbLockedBuf += map.cbDepthPitch * (pBox->d - 1); /// @todo why map does not compute this for 2D textures
5437	uint8_t pu8LockedBuf = (uint8_t )map.pvData;
5438	uint32_t offLockedBuf = 0;
5439
5440	for (uint32_t iPlane = 0; iPlane < pBox->d; ++iPlane)
5441	{
5442	AssertBreak(uGuestOffset < UINT32_MAX);
5443
5444	rc = vmsvgaR3GmrTransfer(pThis,
5445	pThisCC,
5446	transfer,
5447	pu8LockedBuf,
5448	cbLockedBuf,
5449	offLockedBuf,
5450	map.cbRowPitch,
5451	GuestPtr,
5452	(uint32_t)uGuestOffset,
5453	cbGuestPitch,
5454	cBlocksX * pSurface->cbBlock,
5455	cBlocksY);
5456	AssertRC(rc);
5457
5458	uGuestOffset += pMipLevel->cbSurfacePlane;
5459	offLockedBuf += map.cbDepthPitch;
5460	}
5461
5462	bool const fWritten = (transfer == SVGA3D_WRITE_HOST_VRAM);
5463	vmsvga3dBackSurfaceUnmap(pThisCC, &image, &map, fWritten);
5464	}
5465	}
5466	else
5467	{
5468	AssertMsgFailed(("Unsupported surface type %d\n", pBackendSurface->enmResType));
5469	rc = VERR_NOT_IMPLEMENTED;
5470	}
5471
5472	return rc;
5473	}
5474
5475
5476	/**
5477	* Create D3D/OpenGL texture object for the specified surface.
5478	*
5479	* Surfaces are created when needed.
5480	*
5481	* @param pThisCC The device context.
5482	* @param pContext The context.
5483	* @param idAssociatedContext Probably the same as pContext->id.
5484	* @param pSurface The surface to create the texture for.
5485	*/
5486	static DECLCALLBACK(int) vmsvga3dBackCreateTexture(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext, uint32_t idAssociatedContext,
5487	PVMSVGA3DSURFACE pSurface)
5488
5489	{
5490	RT_NOREF(pThisCC, pContext, idAssociatedContext, pSurface);
5491
5492	AssertFailed();
5493	return VINF_SUCCESS;
5494	}
5495
5496
5497	/*
5498	* DX callbacks.
5499	*/
5500
5501	static DECLCALLBACK(int) vmsvga3dBackDXDefineContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5502	{
5503	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5504
5505	/* Allocate a backend specific context structure. */
5506	PVMSVGA3DBACKENDDXCONTEXT pBackendDXContext = (PVMSVGA3DBACKENDDXCONTEXT)RTMemAllocZ(sizeof(VMSVGA3DBACKENDDXCONTEXT));
5507	AssertPtrReturn(pBackendDXContext, VERR_NO_MEMORY);
5508	pDXContext->pBackendDXContext = pBackendDXContext;
5509
5510	LogFunc(("cid %d\n", pDXContext->cid));
5511
5512	int rc = dxDeviceCreate(pBackend, &pBackendDXContext->dxDevice);
5513	return rc;
5514	}
5515
5516
5517	static DECLCALLBACK(int) vmsvga3dBackDXDestroyContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5518	{
5519	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5520
5521	LogFunc(("cid %d\n", pDXContext->cid));
5522
5523	if (pDXContext->pBackendDXContext)
5524	{
5525	/* Clean up context resources. */
5526	VMSVGA3DBACKENDDXCONTEXT *pBackendDXContext = pDXContext->pBackendDXContext;
5527
5528	for (uint32_t idxShaderState = 0; idxShaderState < RT_ELEMENTS(pBackendDXContext->resources.shaderState); ++idxShaderState)
5529	{
5530	ID3D11Buffer **papConstantBuffer = &pBackendDXContext->resources.shaderState[idxShaderState].constantBuffers[0];
5531	D3D_RELEASE_ARRAY(RT_ELEMENTS(pBackendDXContext->resources.shaderState[idxShaderState].constantBuffers), papConstantBuffer);
5532	}
5533
5534	for (uint32_t i = 0; i < RT_ELEMENTS(pBackendDXContext->resources.inputAssembly.vertexBuffers); ++i)
5535	{
5536	D3D_RELEASE(pBackendDXContext->resources.inputAssembly.vertexBuffers[i].pBuffer);
5537	}
5538
5539	D3D_RELEASE(pBackendDXContext->resources.inputAssembly.indexBuffer.pBuffer);
5540
5541	if (pBackendDXContext->dxDevice.pImmediateContext)
5542	dxDeviceFlush(&pBackendDXContext->dxDevice); /* Make sure that any pending draw calls are finished. */
5543
5544	if (pBackendDXContext->paRenderTargetView)
5545	{
5546	for (uint32_t i = 0; i < pBackendDXContext->cRenderTargetView; ++i)
5547	D3D_RELEASE(pBackendDXContext->paRenderTargetView[i].u.pRenderTargetView);
5548	}
5549	if (pBackendDXContext->paDepthStencilView)
5550	{
5551	for (uint32_t i = 0; i < pBackendDXContext->cDepthStencilView; ++i)
5552	D3D_RELEASE(pBackendDXContext->paDepthStencilView[i].u.pDepthStencilView);
5553	}
5554	if (pBackendDXContext->paShaderResourceView)
5555	{
5556	for (uint32_t i = 0; i < pBackendDXContext->cShaderResourceView; ++i)
5557	D3D_RELEASE(pBackendDXContext->paShaderResourceView[i].u.pShaderResourceView);
5558	}
5559	if (pBackendDXContext->paElementLayout)
5560	{
5561	for (uint32_t i = 0; i < pBackendDXContext->cElementLayout; ++i)
5562	D3D_RELEASE(pBackendDXContext->paElementLayout[i].pElementLayout);
5563	}
5564	if (pBackendDXContext->papBlendState)
5565	D3D_RELEASE_ARRAY(pBackendDXContext->cBlendState, pBackendDXContext->papBlendState);
5566	if (pBackendDXContext->papDepthStencilState)
5567	D3D_RELEASE_ARRAY(pBackendDXContext->cDepthStencilState, pBackendDXContext->papDepthStencilState);
5568	if (pBackendDXContext->papRasterizerState)
5569	D3D_RELEASE_ARRAY(pBackendDXContext->cRasterizerState, pBackendDXContext->papRasterizerState);
5570	if (pBackendDXContext->papSamplerState)
5571	D3D_RELEASE_ARRAY(pBackendDXContext->cSamplerState, pBackendDXContext->papSamplerState);
5572	if (pBackendDXContext->paQuery)
5573	{
5574	for (uint32_t i = 0; i < pBackendDXContext->cQuery; ++i)
5575	dxDestroyQuery(&pBackendDXContext->paQuery[i]);
5576	}
5577	if (pBackendDXContext->paShader)
5578	{
5579	for (uint32_t i = 0; i < pBackendDXContext->cShader; ++i)
5580	dxDestroyShader(&pBackendDXContext->paShader[i]);
5581	}
5582	if (pBackendDXContext->paStreamOutput)
5583	{
5584	for (uint32_t i = 0; i < pBackendDXContext->cStreamOutput; ++i)
5585	dxDestroyStreamOutput(&pBackendDXContext->paStreamOutput[i]);
5586	}
5587	if (pBackendDXContext->paUnorderedAccessView)
5588	{
5589	for (uint32_t i = 0; i < pBackendDXContext->cUnorderedAccessView; ++i)
5590	D3D_RELEASE(pBackendDXContext->paUnorderedAccessView[i].u.pUnorderedAccessView);
5591	}
5592
5593	RTMemFreeZ(pBackendDXContext->papBlendState, sizeof(pBackendDXContext->papBlendState[0]) * pBackendDXContext->cBlendState);
5594	RTMemFreeZ(pBackendDXContext->papDepthStencilState, sizeof(pBackendDXContext->papDepthStencilState[0]) * pBackendDXContext->cDepthStencilState);
5595	RTMemFreeZ(pBackendDXContext->papSamplerState, sizeof(pBackendDXContext->papSamplerState[0]) * pBackendDXContext->cSamplerState);
5596	RTMemFreeZ(pBackendDXContext->papRasterizerState, sizeof(pBackendDXContext->papRasterizerState[0]) * pBackendDXContext->cRasterizerState);
5597	RTMemFreeZ(pBackendDXContext->paElementLayout, sizeof(pBackendDXContext->paElementLayout[0]) * pBackendDXContext->cElementLayout);
5598	RTMemFreeZ(pBackendDXContext->paRenderTargetView, sizeof(pBackendDXContext->paRenderTargetView[0]) * pBackendDXContext->cRenderTargetView);
5599	RTMemFreeZ(pBackendDXContext->paDepthStencilView, sizeof(pBackendDXContext->paDepthStencilView[0]) * pBackendDXContext->cDepthStencilView);
5600	RTMemFreeZ(pBackendDXContext->paShaderResourceView, sizeof(pBackendDXContext->paShaderResourceView[0]) * pBackendDXContext->cShaderResourceView);
5601	RTMemFreeZ(pBackendDXContext->paQuery, sizeof(pBackendDXContext->paQuery[0]) * pBackendDXContext->cQuery);
5602	RTMemFreeZ(pBackendDXContext->paShader, sizeof(pBackendDXContext->paShader[0]) * pBackendDXContext->cShader);
5603	RTMemFreeZ(pBackendDXContext->paStreamOutput, sizeof(pBackendDXContext->paStreamOutput[0]) * pBackendDXContext->cStreamOutput);
5604	RTMemFreeZ(pBackendDXContext->paUnorderedAccessView, sizeof(pBackendDXContext->paUnorderedAccessView[0]) * pBackendDXContext->cUnorderedAccessView);
5605
5606	/* Destroy backend surfaces which belong to this context. */
5607	/** @todo The context should have a list of surfaces (and also shared resources). */
5608	/** @todo This should not be needed in fSingleDevice mode. */
5609	for (uint32_t sid = 0; sid < pThisCC->svga.p3dState->cSurfaces; ++sid)
5610	{
5611	PVMSVGA3DSURFACE const pSurface = pThisCC->svga.p3dState->papSurfaces[sid];
5612	if ( pSurface
5613	&& pSurface->id == sid)
5614	{
5615	if (pSurface->idAssociatedContext == pDXContext->cid)
5616	{
5617	if (pSurface->pBackendSurface)
5618	vmsvga3dBackSurfaceDestroy(pThisCC, true, pSurface);
5619	}
5620	else if (pSurface->idAssociatedContext == DX_CID_BACKEND)
5621	{
5622	/* May have shared resources in this context. */
5623	if (pSurface->pBackendSurface)
5624	{
5625	DXSHAREDTEXTURE pSharedTexture = (DXSHAREDTEXTURE )RTAvlU32Get(&pSurface->pBackendSurface->SharedTextureTree, pDXContext->cid);
5626	if (pSharedTexture)
5627	{
5628	Assert(pSharedTexture->sid == sid);
5629	RTAvlU32Remove(&pSurface->pBackendSurface->SharedTextureTree, pDXContext->cid);
5630	D3D_RELEASE(pSharedTexture->pTexture);
5631	RTMemFreeZ(pSharedTexture, sizeof(*pSharedTexture));
5632	}
5633	}
5634	}
5635	}
5636	}
5637
5638	dxDeviceDestroy(pBackend, &pBackendDXContext->dxDevice);
5639
5640	RTMemFreeZ(pBackendDXContext, sizeof(*pBackendDXContext));
5641	pDXContext->pBackendDXContext = NULL;
5642	}
5643	return VINF_SUCCESS;
5644	}
5645
5646
5647	static DECLCALLBACK(int) vmsvga3dBackDXBindContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5648	{
5649	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5650	RT_NOREF(pBackend, pDXContext);
5651	return VINF_SUCCESS;
5652	}
5653
5654
5655	static DECLCALLBACK(int) vmsvga3dBackDXSwitchContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5656	{
5657	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5658	if (!pBackend->fSingleDevice)
5659	return VINF_NOT_IMPLEMENTED; /* Not required. */
5660
5661	/* The new context state will be applied by the generic DX code. */
5662	RT_NOREF(pDXContext);
5663	return VINF_SUCCESS;
5664	}
5665
5666
5667	static DECLCALLBACK(int) vmsvga3dBackDXReadbackContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5668	{
5669	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5670	RT_NOREF(pBackend, pDXContext);
5671	return VINF_SUCCESS;
5672	}
5673
5674
5675	static DECLCALLBACK(int) vmsvga3dBackDXInvalidateContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5676	{
5677	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5678
5679	RT_NOREF(pBackend, pDXContext);
5680	AssertFailed(); /** @todo Implement */
5681	return VERR_NOT_IMPLEMENTED;
5682	}
5683
5684
5685	static DECLCALLBACK(int) vmsvga3dBackDXSetSingleConstantBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t slot, SVGA3dShaderType type, SVGA3dSurfaceId sid, uint32_t offsetInBytes, uint32_t sizeInBytes)
5686	{
5687	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5688	RT_NOREF(pBackend);
5689
5690	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
5691	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5692
5693	if (sid == SVGA_ID_INVALID)
5694	{
5695	uint32_t const idxShaderState = type - SVGA3D_SHADERTYPE_MIN;
5696	D3D_RELEASE(pDXContext->pBackendDXContext->resources.shaderState[idxShaderState].constantBuffers[slot]);
5697	return VINF_SUCCESS;
5698	}
5699
5700	PVMSVGA3DSURFACE pSurface;
5701	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
5702	AssertRCReturn(rc, rc);
5703
5704	PVMSVGA3DMIPMAPLEVEL pMipLevel;
5705	rc = vmsvga3dMipmapLevel(pSurface, 0, 0, &pMipLevel);
5706	AssertRCReturn(rc, rc);
5707
5708	uint32_t const cbSurface = pMipLevel->cbSurface;
5709	ASSERT_GUEST_RETURN( offsetInBytes < cbSurface
5710	&& sizeInBytes <= cbSurface - offsetInBytes, VERR_INVALID_PARAMETER);
5711
5712	/* Constant buffers are created on demand. */
5713	Assert(pSurface->pBackendSurface == NULL);
5714
5715	/* Upload the current data, if any. */
5716	D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
5717	D3D11_SUBRESOURCE_DATA initialData;
5718	if (pMipLevel->pSurfaceData)
5719	{
5720	initialData.pSysMem = (uint8_t *)pMipLevel->pSurfaceData + offsetInBytes;
5721	initialData.SysMemPitch = sizeInBytes;
5722	initialData.SysMemSlicePitch = sizeInBytes;
5723
5724	pInitialData = &initialData;
5725
5726	#ifdef LOG_ENABLED
5727	if (LogIs8Enabled())
5728	{
5729	float pValuesF = (float )initialData.pSysMem;
5730	for (unsigned i = 0; i < sizeInBytes / sizeof(float) / 4; ++i)
5731	{
5732	Log(("ConstantF[%d]: " FLOAT_FMT_STR ", " FLOAT_FMT_STR ", " FLOAT_FMT_STR ", " FLOAT_FMT_STR "\n",
5733	i, FLOAT_FMT_ARGS(pValuesF[i4 + 0]), FLOAT_FMT_ARGS(pValuesF[i4 + 1]), FLOAT_FMT_ARGS(pValuesF[i4 + 2]), FLOAT_FMT_ARGS(pValuesF[i4 + 3])));
5734	}
5735	}
5736	#endif
5737	}
5738
5739	D3D11_BUFFER_DESC bd;
5740	RT_ZERO(bd);
5741	bd.ByteWidth = sizeInBytes;
5742	bd.Usage = D3D11_USAGE_DEFAULT;
5743	bd.BindFlags = D3D11_BIND_CONSTANT_BUFFER;
5744	bd.CPUAccessFlags = 0;
5745	bd.MiscFlags = 0;
5746	bd.StructureByteStride = 0;
5747
5748	ID3D11Buffer *pBuffer = 0;
5749	HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBuffer);
5750	if (SUCCEEDED(hr))
5751	{
5752	uint32_t const idxShaderState = type - SVGA3D_SHADERTYPE_MIN;
5753	ID3D11Buffer **ppOldBuffer = &pDXContext->pBackendDXContext->resources.shaderState[idxShaderState].constantBuffers[slot];
5754	LogFunc(("constant buffer: [%u][%u]: sid = %u, %u, %u (%p -> %p)\n",
5755	idxShaderState, slot, sid, offsetInBytes, sizeInBytes, *ppOldBuffer, pBuffer));
5756	D3D_RELEASE(*ppOldBuffer);
5757	*ppOldBuffer = pBuffer;
5758	}
5759
5760	return VINF_SUCCESS;
5761	}
5762
5763	static int dxSetShaderResources(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderType type)
5764	{
5765	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
5766	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5767
5768	//DEBUG_BREAKPOINT_TEST();
5769	AssertReturn(type >= SVGA3D_SHADERTYPE_MIN && type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
5770	uint32_t const idxShaderState = type - SVGA3D_SHADERTYPE_MIN;
5771	uint32_t const *pSRIds = &pDXContext->svgaDXContext.shaderState[idxShaderState].shaderResources[0];
5772	ID3D11ShaderResourceView *papShaderResourceView[SVGA3D_DX_MAX_SRVIEWS];
5773	for (uint32_t i = 0; i < SVGA3D_DX_MAX_SRVIEWS; ++i)
5774	{
5775	SVGA3dShaderResourceViewId shaderResourceViewId = pSRIds[i];
5776	if (shaderResourceViewId != SVGA3D_INVALID_ID)
5777	{
5778	ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->pBackendDXContext->cShaderResourceView, VERR_INVALID_PARAMETER);
5779
5780	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paShaderResourceView[shaderResourceViewId];
5781	Assert(pDXView->u.pShaderResourceView);
5782	papShaderResourceView[i] = pDXView->u.pShaderResourceView;
5783	}
5784	else
5785	papShaderResourceView[i] = NULL;
5786	}
5787
5788	dxShaderResourceViewSet(pDevice, type, 0, SVGA3D_DX_MAX_SRVIEWS, papShaderResourceView);
5789	return VINF_SUCCESS;
5790	}
5791
5792
5793	static DECLCALLBACK(int) vmsvga3dBackDXSetShaderResources(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startView, SVGA3dShaderType type, uint32_t cShaderResourceViewId, SVGA3dShaderResourceViewId const *paShaderResourceViewId)
5794	{
5795	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5796	RT_NOREF(pBackend);
5797
5798	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
5799	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5800
5801	RT_NOREF(startView, type, cShaderResourceViewId, paShaderResourceViewId);
5802
5803	return VINF_SUCCESS;
5804	}
5805
5806
5807	static DECLCALLBACK(int) vmsvga3dBackDXSetShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderId shaderId, SVGA3dShaderType type)
5808	{
5809	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5810	RT_NOREF(pBackend);
5811
5812	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
5813	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5814
5815	RT_NOREF(shaderId, type);
5816
5817	return VINF_SUCCESS;
5818	}
5819
5820
5821	static DECLCALLBACK(int) vmsvga3dBackDXSetSamplers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startSampler, SVGA3dShaderType type, uint32_t cSamplerId, SVGA3dSamplerId const *paSamplerId)
5822	{
5823	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5824	RT_NOREF(pBackend);
5825
5826	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
5827	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5828
5829	ID3D11SamplerState *papSamplerState[SVGA3D_DX_MAX_SAMPLERS];
5830	for (uint32_t i = 0; i < cSamplerId; ++i)
5831	{
5832	SVGA3dSamplerId samplerId = paSamplerId[i];
5833	if (samplerId != SVGA3D_INVALID_ID)
5834	{
5835	ASSERT_GUEST_RETURN(samplerId < pDXContext->pBackendDXContext->cSamplerState, VERR_INVALID_PARAMETER);
5836	papSamplerState[i] = pDXContext->pBackendDXContext->papSamplerState[samplerId];
5837	}
5838	else
5839	papSamplerState[i] = NULL;
5840	}
5841
5842	dxSamplerSet(pDevice, type, startSampler, cSamplerId, papSamplerState);
5843	return VINF_SUCCESS;
5844	}
5845
5846
5847	static void vboxDXMatchShaderInput(DXSHADER pDXShader, DXSHADER pDXShaderPrior)
5848	{
5849	/* For each input generic attribute of the shader find corresponding entry in the prior shader. */
5850	for (uint32_t i = 0; i < pDXShader->shaderInfo.cInputSignature; ++i)
5851	{
5852	SVGA3dDXSignatureEntry const *pSignatureEntry = &pDXShader->shaderInfo.aInputSignature[i];
5853	DXShaderAttributeSemantic *pSemantic = &pDXShader->shaderInfo.aInputSemantic[i];
5854
5855	if (pSignatureEntry->semanticName != SVGADX_SIGNATURE_SEMANTIC_NAME_UNDEFINED)
5856	continue;
5857
5858	int iMatch = -1;
5859	for (uint32_t iPrior = 0; iPrior < pDXShaderPrior->shaderInfo.cOutputSignature; ++iPrior)
5860	{
5861	SVGA3dDXSignatureEntry const *pPriorSignatureEntry = &pDXShaderPrior->shaderInfo.aOutputSignature[iPrior];
5862
5863	if (pPriorSignatureEntry->semanticName != SVGADX_SIGNATURE_SEMANTIC_NAME_UNDEFINED)
5864	continue;
5865
5866	if (pPriorSignatureEntry->registerIndex == pSignatureEntry->registerIndex)
5867	{
5868	iMatch = iPrior;
5869	if (pPriorSignatureEntry->mask == pSignatureEntry->mask)
5870	break; /* Exact match, no need to continue search. */
5871	}
5872	}
5873
5874	if (iMatch >= 0)
5875	{
5876	SVGA3dDXSignatureEntry const *pPriorSignatureEntry = &pDXShaderPrior->shaderInfo.aOutputSignature[iMatch];
5877	DXShaderAttributeSemantic const *pPriorSemantic = &pDXShaderPrior->shaderInfo.aOutputSemantic[iMatch];
5878
5879	Assert(pPriorSignatureEntry->registerIndex == pSignatureEntry->registerIndex);
5880	Assert((pPriorSignatureEntry->mask & pSignatureEntry->mask) == pSignatureEntry->mask);
5881	RT_NOREF(pPriorSignatureEntry);
5882
5883	pSemantic->SemanticIndex = pPriorSemantic->SemanticIndex;
5884	}
5885	}
5886	}
5887
5888
5889	static void vboxDXMatchShaderSignatures(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, DXSHADER *pDXShader)
5890	{
5891	SVGA3dShaderId const shaderIdVS = pDXContext->svgaDXContext.shaderState[SVGA3D_SHADERTYPE_VS - SVGA3D_SHADERTYPE_MIN].shaderId;
5892	SVGA3dShaderId const shaderIdHS = pDXContext->svgaDXContext.shaderState[SVGA3D_SHADERTYPE_HS - SVGA3D_SHADERTYPE_MIN].shaderId;
5893	SVGA3dShaderId const shaderIdDS = pDXContext->svgaDXContext.shaderState[SVGA3D_SHADERTYPE_DS - SVGA3D_SHADERTYPE_MIN].shaderId;
5894	SVGA3dShaderId const shaderIdGS = pDXContext->svgaDXContext.shaderState[SVGA3D_SHADERTYPE_GS - SVGA3D_SHADERTYPE_MIN].shaderId;
5895	SVGA3dShaderId const shaderIdPS = pDXContext->svgaDXContext.shaderState[SVGA3D_SHADERTYPE_PS - SVGA3D_SHADERTYPE_MIN].shaderId;
5896
5897	/* Try to fix the input semantic indices. Output is usually not changed. */
5898	switch (pDXShader->enmShaderType)
5899	{
5900	case SVGA3D_SHADERTYPE_VS:
5901	{
5902	/* Match input to input layout, which sets generic semantic indices to the source registerIndex (dxCreateInputLayout). */
5903	for (uint32_t i = 0; i < pDXShader->shaderInfo.cInputSignature; ++i)
5904	{
5905	SVGA3dDXSignatureEntry const *pSignatureEntry = &pDXShader->shaderInfo.aInputSignature[i];
5906	DXShaderAttributeSemantic *pSemantic = &pDXShader->shaderInfo.aInputSemantic[i];
5907
5908	if (pSignatureEntry->semanticName != SVGADX_SIGNATURE_SEMANTIC_NAME_UNDEFINED)
5909	continue;
5910
5911	pSemantic->SemanticIndex = pSignatureEntry->registerIndex;
5912	}
5913	break;
5914	}
5915	case SVGA3D_SHADERTYPE_HS:
5916	{
5917	/* Input of a HS shader is the output of VS. */
5918	DXSHADER *pDXShaderPrior;
5919	if (shaderIdVS != SVGA3D_INVALID_ID)
5920	pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdVS];
5921	else
5922	pDXShaderPrior = NULL;
5923
5924	if (pDXShaderPrior)
5925	vboxDXMatchShaderInput(pDXShader, pDXShaderPrior);
5926
5927	break;
5928	}
5929	case SVGA3D_SHADERTYPE_DS:
5930	{
5931	/* Input of a DS shader is the output of HS. */
5932	DXSHADER *pDXShaderPrior;
5933	if (shaderIdHS != SVGA3D_INVALID_ID)
5934	pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdHS];
5935	else
5936	pDXShaderPrior = NULL;
5937
5938	if (pDXShaderPrior)
5939	vboxDXMatchShaderInput(pDXShader, pDXShaderPrior);
5940
5941	break;
5942	}
5943	case SVGA3D_SHADERTYPE_GS:
5944	{
5945	/* Input signature of a GS shader is the output of DS or VS. */
5946	DXSHADER *pDXShaderPrior;
5947	if (shaderIdDS != SVGA3D_INVALID_ID)
5948	pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdDS];
5949	else if (shaderIdVS != SVGA3D_INVALID_ID)
5950	pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdVS];
5951	else
5952	pDXShaderPrior = NULL;
5953
5954	if (pDXShaderPrior)
5955	{
5956	/* If GS shader does not have input signature (Windows guest can do that),
5957	* then assign the prior shader signature as GS input.
5958	*/
5959	if (pDXShader->shaderInfo.cInputSignature == 0)
5960	{
5961	pDXShader->shaderInfo.cInputSignature = pDXShaderPrior->shaderInfo.cOutputSignature;
5962	memcpy(pDXShader->shaderInfo.aInputSignature,
5963	pDXShaderPrior->shaderInfo.aOutputSignature,
5964	pDXShaderPrior->shaderInfo.cOutputSignature * sizeof(SVGA3dDXSignatureEntry));
5965	memcpy(pDXShader->shaderInfo.aInputSemantic,
5966	pDXShaderPrior->shaderInfo.aOutputSemantic,
5967	pDXShaderPrior->shaderInfo.cOutputSignature * sizeof(DXShaderAttributeSemantic));
5968	}
5969	else
5970	vboxDXMatchShaderInput(pDXShader, pDXShaderPrior);
5971	}
5972
5973	/* Output signature of a GS shader is the input of the pixel shader. */
5974	if (shaderIdPS != SVGA3D_INVALID_ID)
5975	{
5976	/* If GS shader does not have output signature (Windows guest can do that),
5977	* then assign the PS shader signature as GS output.
5978	*/
5979	if (pDXShader->shaderInfo.cOutputSignature == 0)
5980	{
5981	DXSHADER const *pDXShaderPosterior = &pDXContext->pBackendDXContext->paShader[shaderIdPS];
5982	pDXShader->shaderInfo.cOutputSignature = pDXShaderPosterior->shaderInfo.cInputSignature;
5983	memcpy(pDXShader->shaderInfo.aOutputSignature,
5984	pDXShaderPosterior->shaderInfo.aInputSignature,
5985	pDXShaderPosterior->shaderInfo.cInputSignature * sizeof(SVGA3dDXSignatureEntry));
5986	memcpy(pDXShader->shaderInfo.aOutputSemantic,
5987	pDXShaderPosterior->shaderInfo.aInputSemantic,
5988	pDXShaderPosterior->shaderInfo.cInputSignature * sizeof(DXShaderAttributeSemantic));
5989	}
5990	}
5991
5992	SVGA3dStreamOutputId const soid = pDXContext->svgaDXContext.streamOut.soid;
5993	if (soid != SVGA3D_INVALID_ID)
5994	{
5995	ASSERT_GUEST_RETURN_VOID(soid < pDXContext->pBackendDXContext->cStreamOutput);
5996
5997	/* Set semantic names and indices for SO declaration entries according to the shader output. */
5998	SVGACOTableDXStreamOutputEntry const *pStreamOutputEntry = &pDXContext->cot.paStreamOutput[soid];
5999	DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[soid];
6000
6001	if (pDXStreamOutput->cDeclarationEntry == 0)
6002	{
6003	int rc = dxDefineStreamOutput(pThisCC, pDXContext, soid, pStreamOutputEntry, pDXShader);
6004	AssertRCReturnVoid(rc);
6005	#ifdef LOG_ENABLED
6006	Log6(("Stream output declaration:\n\n"));
6007	Log6(("Stream SemanticName SemanticIndex StartComponent ComponentCount OutputSlot\n"));
6008	Log6(("------ -------------- ------------- -------------- -------------- ----------\n"));
6009	for (unsigned i = 0; i < pDXStreamOutput->cDeclarationEntry; ++i)
6010	{
6011	D3D11_SO_DECLARATION_ENTRY *p = &pDXStreamOutput->aDeclarationEntry[i];
6012	Log6(("%d %-14s %d %d %d %d\n",
6013	p->Stream, p->SemanticName, p->SemanticIndex, p->StartComponent, p->ComponentCount, p->OutputSlot));
6014	}
6015	Log6(("\n"));
6016	#endif
6017
6018	}
6019	}
6020	break;
6021	}
6022	case SVGA3D_SHADERTYPE_PS:
6023	{
6024	/* Input of a PS shader is the output of GS, DS or VS. */
6025	DXSHADER *pDXShaderPrior;
6026	if (shaderIdGS != SVGA3D_INVALID_ID)
6027	pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdGS];
6028	else if (shaderIdDS != SVGA3D_INVALID_ID)
6029	pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdDS];
6030	else if (shaderIdVS != SVGA3D_INVALID_ID)
6031	pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdVS];
6032	else
6033	pDXShaderPrior = NULL;
6034
6035	if (pDXShaderPrior)
6036	vboxDXMatchShaderInput(pDXShader, pDXShaderPrior);
6037	break;
6038	}
6039	default:
6040	break;
6041	}
6042
6043	/* Intermediate shaders normally have both input and output signatures. However it is ok if they do not.
6044	* Just catch this unusual case in order to see if everything is fine.
6045	*/
6046	Assert( ( pDXShader->enmShaderType == SVGA3D_SHADERTYPE_VS
6047	\|\| pDXShader->enmShaderType == SVGA3D_SHADERTYPE_PS
6048	\|\| pDXShader->enmShaderType == SVGA3D_SHADERTYPE_CS)
6049	\|\| (pDXShader->shaderInfo.cInputSignature && pDXShader->shaderInfo.cOutputSignature));
6050	}
6051
6052
6053	static void vboxDXUpdateVSInputSignature(PVMSVGA3DDXCONTEXT pDXContext, DXSHADER *pDXShader)
6054	{
6055	SVGA3dElementLayoutId const elementLayoutId = pDXContext->svgaDXContext.inputAssembly.layoutId;
6056	if (elementLayoutId != SVGA3D_INVALID_ID)
6057	{
6058	SVGACOTableDXElementLayoutEntry const *pElementLayout = &pDXContext->cot.paElementLayout[elementLayoutId];
6059	for (uint32_t i = 0; i < RT_MIN(pElementLayout->numDescs, pDXShader->shaderInfo.cInputSignature); ++i)
6060	{
6061	SVGA3dInputElementDesc const *pElementDesc = &pElementLayout->descs[i];
6062	SVGA3dDXSignatureEntry *pSignatureEntry = &pDXShader->shaderInfo.aInputSignature[i];
6063	pSignatureEntry->componentType = DXShaderComponentTypeFromFormat(pElementDesc->format);
6064	}
6065	}
6066	}
6067
6068
6069	static void dxCreateInputLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId, DXSHADER *pDXShader)
6070	{
6071	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
6072	AssertReturnVoid(pDevice->pDevice);
6073
6074	SVGACOTableDXElementLayoutEntry const *pEntry = &pDXContext->cot.paElementLayout[elementLayoutId];
6075	DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
6076
6077	if (pDXElementLayout->cElementDesc == 0)
6078	{
6079	/* Semantic name is not interpreted by D3D, therefore arbitrary names can be used
6080	* if they are consistent between the element layout and shader input signature.
6081	* "In general, data passed between pipeline stages is completely generic and is not uniquely
6082	* interpreted by the system; arbitrary semantics are allowed ..."
6083	*
6084	* However D3D runtime insists that "SemanticName string ("POSITIO1") cannot end with a number."
6085	*
6086	* System-Value semantics ("SV_*") between shaders require proper names of course.
6087	* But they are irrelevant for input attributes.
6088	*/
6089	pDXElementLayout->cElementDesc = pEntry->numDescs;
6090	for (uint32_t i = 0; i < pEntry->numDescs; ++i)
6091	{
6092	D3D11_INPUT_ELEMENT_DESC *pDst = &pDXElementLayout->aElementDesc[i];
6093	SVGA3dInputElementDesc const *pSrc = &pEntry->descs[i];
6094	pDst->SemanticName = "ATTRIB";
6095	pDst->SemanticIndex = pSrc->inputRegister;
6096	pDst->Format = vmsvgaDXSurfaceFormat2Dxgi(pSrc->format);
6097	Assert(pDst->Format != DXGI_FORMAT_UNKNOWN);
6098	pDst->InputSlot = pSrc->inputSlot;
6099	pDst->AlignedByteOffset = pSrc->alignedByteOffset;
6100	pDst->InputSlotClass = (D3D11_INPUT_CLASSIFICATION)pSrc->inputSlotClass;
6101	pDst->InstanceDataStepRate = pSrc->instanceDataStepRate;
6102	}
6103	}
6104
6105	HRESULT hr = pDevice->pDevice->CreateInputLayout(pDXElementLayout->aElementDesc,
6106	pDXElementLayout->cElementDesc,
6107	pDXShader->pvDXBC,
6108	pDXShader->cbDXBC,
6109	&pDXElementLayout->pElementLayout);
6110	Assert(SUCCEEDED(hr)); RT_NOREF(hr);
6111	}
6112
6113
6114	static void dxSetConstantBuffers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6115	{
6116	//DEBUG_BREAKPOINT_TEST();
6117	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6118	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
6119	VMSVGA3DBACKENDDXCONTEXT *pBackendDXContext = pDXContext->pBackendDXContext;
6120
6121	AssertCompile(RT_ELEMENTS(pBackendDXContext->resources.shaderState[0].constantBuffers) == SVGA3D_DX_MAX_CONSTBUFFERS);
6122
6123	for (uint32_t idxShaderState = 0; idxShaderState < SVGA3D_NUM_SHADERTYPE; ++idxShaderState)
6124	{
6125	SVGA3dShaderType const shaderType = (SVGA3dShaderType)(idxShaderState + SVGA3D_SHADERTYPE_MIN);
6126	for (uint32_t idxSlot = 0; idxSlot < SVGA3D_DX_MAX_CONSTBUFFERS; ++idxSlot)
6127	{
6128	ID3D11Buffer **pBufferContext = &pBackendDXContext->resources.shaderState[idxShaderState].constantBuffers[idxSlot];
6129	ID3D11Buffer **pBufferPipeline = &pBackend->resources.shaderState[idxShaderState].constantBuffers[idxSlot];
6130	if (pBufferContext != pBufferPipeline)
6131	{
6132	LogFunc(("constant buffer: [%u][%u]: %p -> %p\n",
6133	idxShaderState, idxSlot, pBufferPipeline, pBufferContext));
6134	dxConstantBufferSet(pDXDevice, idxSlot, shaderType, *pBufferContext);
6135
6136	if (*pBufferContext)
6137	(*pBufferContext)->AddRef();
6138	D3D_RELEASE(*pBufferPipeline);
6139	pBufferPipeline = pBufferContext;
6140	}
6141	}
6142	}
6143	}
6144
6145	static void dxSetVertexBuffers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6146	{
6147	//DEBUG_BREAKPOINT_TEST();
6148	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6149	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
6150	VMSVGA3DBACKENDDXCONTEXT *pBackendDXContext = pDXContext->pBackendDXContext;
6151
6152	AssertCompile(RT_ELEMENTS(pBackendDXContext->resources.inputAssembly.vertexBuffers) == SVGA3D_DX_MAX_VERTEXBUFFERS);
6153
6154	ID3D11Buffer *paResources[SVGA3D_DX_MAX_VERTEXBUFFERS];
6155	UINT paStride[SVGA3D_DX_MAX_VERTEXBUFFERS];
6156	UINT paOffset[SVGA3D_DX_MAX_VERTEXBUFFERS];
6157
6158	int32_t idxMaxSlot = -1;
6159	for (uint32_t i = 0; i < SVGA3D_DX_MAX_VERTEXBUFFERS; ++i)
6160	{
6161	DXBOUNDVERTEXBUFFER *pBufferContext = &pBackendDXContext->resources.inputAssembly.vertexBuffers[i];
6162	DXBOUNDVERTEXBUFFER *pBufferPipeline = &pBackend->resources.inputAssembly.vertexBuffers[i];
6163	if ( pBufferContext->pBuffer != pBufferPipeline->pBuffer
6164	\|\| pBufferContext->stride != pBufferPipeline->stride
6165	\|\| pBufferContext->offset != pBufferPipeline->offset)
6166	{
6167	LogFunc(("vertex buffer: [%u]: sid = %u, %p (stride %d, off %d) -> %p (stride %d, off %d)\n",
6168	i, pDXContext->svgaDXContext.inputAssembly.vertexBuffers[i].bufferId,
6169	pBufferPipeline->pBuffer, pBufferPipeline->stride, pBufferPipeline->offset,
6170	pBufferContext->pBuffer, pBufferContext->stride, pBufferContext->offset));
6171
6172	if (pBufferContext->pBuffer != pBufferPipeline->pBuffer)
6173	{
6174	if (pBufferContext->pBuffer)
6175	pBufferContext->pBuffer->AddRef();
6176	D3D_RELEASE(pBufferPipeline->pBuffer);
6177	}
6178	pBufferPipeline = pBufferContext;
6179
6180	idxMaxSlot = i;
6181	}
6182	#ifdef LOG_ENABLED
6183	else if (pBufferContext->pBuffer)
6184	{
6185	LogFunc(("vertex buffer: [%u]: sid = %u, %p (stride %d, off %d)\n",
6186	i, pDXContext->svgaDXContext.inputAssembly.vertexBuffers[i].bufferId,
6187	pBufferContext->pBuffer, pBufferContext->stride, pBufferContext->offset));
6188	}
6189	#endif
6190
6191	paResources[i] = pBufferContext->pBuffer;
6192	if (pBufferContext->pBuffer)
6193	{
6194	paStride[i] = pBufferContext->stride;
6195	paOffset[i] = pBufferContext->offset;
6196	}
6197	else
6198	{
6199	paStride[i] = 0;
6200	paOffset[i] = 0;
6201	}
6202	}
6203
6204	LogFunc(("idxMaxSlot = %d\n", idxMaxSlot));
6205	if (idxMaxSlot >= 0)
6206	pDXDevice->pImmediateContext->IASetVertexBuffers(0, idxMaxSlot + 1, paResources, paStride, paOffset);
6207	}
6208
6209	static void dxSetIndexBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6210	{
6211	//DEBUG_BREAKPOINT_TEST();
6212	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6213	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
6214	VMSVGA3DBACKENDDXCONTEXT *pBackendDXContext = pDXContext->pBackendDXContext;
6215
6216	DXBOUNDINDEXBUFFER *pBufferContext = &pBackendDXContext->resources.inputAssembly.indexBuffer;
6217	DXBOUNDINDEXBUFFER *pBufferPipeline = &pBackend->resources.inputAssembly.indexBuffer;
6218	if ( pBufferContext->pBuffer != pBufferPipeline->pBuffer
6219	\|\| pBufferContext->indexBufferOffset != pBufferPipeline->indexBufferOffset
6220	\|\| pBufferContext->indexBufferFormat != pBufferPipeline->indexBufferFormat)
6221	{
6222	LogFunc(("index_buffer: sid = %u, %p -> %p\n",
6223	pDXContext->svgaDXContext.inputAssembly.indexBufferSid, pBufferPipeline->pBuffer, pBufferContext->pBuffer));
6224
6225	if (pBufferContext->pBuffer != pBufferPipeline->pBuffer)
6226	{
6227	if (pBufferContext->pBuffer)
6228	pBufferContext->pBuffer->AddRef();
6229	D3D_RELEASE(pBufferPipeline->pBuffer);
6230	}
6231	pBufferPipeline = pBufferContext;
6232
6233	pDXDevice->pImmediateContext->IASetIndexBuffer(pBufferContext->pBuffer, pBufferContext->indexBufferFormat, pBufferContext->indexBufferOffset);
6234	}
6235	}
6236
6237	#ifdef LOG_ENABLED
6238	static void dxDbgLogVertexElement(DXGI_FORMAT Format, void const *pvElementData)
6239	{
6240	switch (Format)
6241	{
6242	case DXGI_FORMAT_R32G32B32A32_FLOAT:
6243	{
6244	float const pValues = (float const )pvElementData;
6245	Log8(("{ " FLOAT_FMT_STR ", " FLOAT_FMT_STR ", " FLOAT_FMT_STR ", " FLOAT_FMT_STR " },",
6246	FLOAT_FMT_ARGS(pValues[0]), FLOAT_FMT_ARGS(pValues[1]), FLOAT_FMT_ARGS(pValues[2]), FLOAT_FMT_ARGS(pValues[3])));
6247	break;
6248	}
6249	case DXGI_FORMAT_R32G32B32_FLOAT:
6250	{
6251	float const pValues = (float const )pvElementData;
6252	Log8(("{ " FLOAT_FMT_STR ", " FLOAT_FMT_STR ", " FLOAT_FMT_STR " },",
6253	FLOAT_FMT_ARGS(pValues[0]), FLOAT_FMT_ARGS(pValues[1]), FLOAT_FMT_ARGS(pValues[2])));
6254	break;
6255	}
6256	case DXGI_FORMAT_R32G32_FLOAT:
6257	{
6258	float const pValues = (float const )pvElementData;
6259	Log8(("{ " FLOAT_FMT_STR ", " FLOAT_FMT_STR " },",
6260	FLOAT_FMT_ARGS(pValues[0]), FLOAT_FMT_ARGS(pValues[1])));
6261	break;
6262	}
6263	case DXGI_FORMAT_R16G16_FLOAT:
6264	{
6265	uint16_t const pValues = (uint16_t const )pvElementData;
6266	Log8(("{ f16 " FLOAT_FMT_STR ", " FLOAT_FMT_STR " },",
6267	FLOAT_FMT_ARGS(float16ToFloat(pValues[0])), FLOAT_FMT_ARGS(float16ToFloat(pValues[1]))));
6268	break;
6269	}
6270	case DXGI_FORMAT_R16G16_SINT:
6271	{
6272	int16_t const pValues = (int16_t const )pvElementData;
6273	Log8(("{ s %d, %d },",
6274	pValues[0], pValues[1]));
6275	break;
6276	}
6277	case DXGI_FORMAT_R16G16_UINT:
6278	{
6279	uint16_t const pValues = (uint16_t const )pvElementData;
6280	Log8(("{ u %u, %u },",
6281	pValues[0], pValues[1]));
6282	break;
6283	}
6284	case DXGI_FORMAT_R8G8B8A8_UNORM:
6285	{
6286	uint8_t const pValues = (uint8_t const )pvElementData;
6287	Log8(("{ 8unorm %u, %u, %u, %u },",
6288	pValues[0], pValues[1], pValues[2], pValues[3]));
6289	break;
6290	}
6291	case DXGI_FORMAT_R8G8_UNORM:
6292	{
6293	uint8_t const pValues = (uint8_t const )pvElementData;
6294	Log8(("{ 8unorm %u, %u },",
6295	pValues[0], pValues[1]));
6296	break;
6297	}
6298	default:
6299	Log8(("{ ??? DXGI_FORMAT %d },",
6300	Format));
6301	AssertFailed();
6302	}
6303	}
6304
6305
6306	static void dxDbgDumpVertices_Draw(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t vertexCount, uint32_t startVertexLocation)
6307	{
6308	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6309
6310	for (uint32_t iSlot = 0; iSlot < SVGA3D_DX_MAX_VERTEXBUFFERS; ++iSlot)
6311	{
6312	DXBOUNDVERTEXBUFFER *pBufferPipeline = &pBackend->resources.inputAssembly.vertexBuffers[iSlot];
6313	uint32_t const sid = pDXContext->svgaDXContext.inputAssembly.vertexBuffers[iSlot].bufferId;
6314	if (sid == SVGA3D_INVALID_ID)
6315	{
6316	Assert(pBufferPipeline->pBuffer == 0);
6317	continue;
6318	}
6319
6320	Assert(pBufferPipeline->pBuffer);
6321
6322	SVGA3dSurfaceImageId image;
6323	image.sid = sid;
6324	image.face = 0;
6325	image.mipmap = 0;
6326
6327	VMSVGA3D_MAPPED_SURFACE map;
6328	int rc = vmsvga3dBackSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
6329	AssertRC(rc);
6330	if (RT_SUCCESS(rc))
6331	{
6332	uint8_t const pu8VertexData = (uint8_t )map.pvData;
6333	pu8VertexData += pBufferPipeline->offset;
6334	pu8VertexData += startVertexLocation * pBufferPipeline->stride;
6335
6336	SVGA3dElementLayoutId const elementLayoutId = pDXContext->svgaDXContext.inputAssembly.layoutId;
6337	DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
6338	Assert(pDXElementLayout->cElementDesc > 0);
6339
6340	Log8(("Vertex buffer dump: sid = %u, vertexCount %u, startVertexLocation %d, offset = %d, stride = %d:\n",
6341	sid, vertexCount, startVertexLocation, pBufferPipeline->offset, pBufferPipeline->stride));
6342
6343	for (uint32_t v = 0; v < vertexCount; ++v)
6344	{
6345	Log8(("slot[%u] v%u { ", iSlot, startVertexLocation + v));
6346
6347	for (uint32_t iElement = 0; iElement < pDXElementLayout->cElementDesc; ++iElement)
6348	{
6349	D3D11_INPUT_ELEMENT_DESC *pElement = &pDXElementLayout->aElementDesc[iElement];
6350	if (pElement->InputSlot == iSlot)
6351	dxDbgLogVertexElement(pElement->Format, pu8VertexData + pElement->AlignedByteOffset);
6352	}
6353
6354	Log8((" }\n"));
6355
6356	if (pBufferPipeline->stride == 0)
6357	break;
6358
6359	pu8VertexData += pBufferPipeline->stride;
6360	}
6361
6362	vmsvga3dBackSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
6363	}
6364	}
6365	}
6366
6367
6368	static void dxDbgDumpVertices_DrawIndexed(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t indexCount, uint32_t startIndexLocation, int32_t baseVertexLocation)
6369	{
6370	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6371	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
6372	SVGA3dSurfaceImageId image;
6373	//DEBUG_BREAKPOINT_TEST();
6374	DXBOUNDINDEXBUFFER *pIB = &pBackend->resources.inputAssembly.indexBuffer;
6375	uint32_t const sidIB = pDXContext->svgaDXContext.inputAssembly.indexBufferSid;
6376	if (sidIB == SVGA3D_INVALID_ID)
6377	{
6378	Assert(pIB->pBuffer == 0);
6379	return;
6380	}
6381
6382	Assert(pIB->pBuffer);
6383	UINT const BytesPerIndex = pIB->indexBufferFormat == DXGI_FORMAT_R16_UINT ? 2 : 4;
6384
6385	void *pvIndexBuffer;
6386	uint32_t cbIndexBuffer;
6387	int rc = dxReadBuffer(pDXDevice, pIB->pBuffer, pIB->indexBufferOffset + startIndexLocation * BytesPerIndex, indexCount * BytesPerIndex, &pvIndexBuffer, &cbIndexBuffer);
6388	AssertRC(rc);
6389	if (RT_SUCCESS(rc))
6390	{
6391	uint8_t const pu8IndexData = (uint8_t )pvIndexBuffer;
6392
6393	for (uint32_t iSlot = 0; iSlot < SVGA3D_DX_MAX_VERTEXBUFFERS; ++iSlot)
6394	{
6395	DXBOUNDVERTEXBUFFER *pVB = &pBackend->resources.inputAssembly.vertexBuffers[iSlot];
6396	uint32_t const sidVB = pDXContext->svgaDXContext.inputAssembly.vertexBuffers[iSlot].bufferId;
6397	if (sidVB == SVGA3D_INVALID_ID)
6398	{
6399	Assert(pVB->pBuffer == 0);
6400	continue;
6401	}
6402
6403	Assert(pVB->pBuffer);
6404
6405	image.sid = sidVB;
6406	image.face = 0;
6407	image.mipmap = 0;
6408
6409	VMSVGA3D_MAPPED_SURFACE mapVB;
6410	rc = vmsvga3dBackSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &mapVB);
6411	AssertRC(rc);
6412	if (RT_SUCCESS(rc))
6413	{
6414	uint8_t const pu8VertexData = (uint8_t )mapVB.pvData;
6415	pu8VertexData += pVB->offset;
6416	pu8VertexData += baseVertexLocation * pVB->stride;
6417
6418	SVGA3dElementLayoutId const elementLayoutId = pDXContext->svgaDXContext.inputAssembly.layoutId;
6419	DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
6420	Assert(pDXElementLayout->cElementDesc > 0);
6421
6422	Log8(("Vertex buffer dump: sid = %u, indexCount %u, startIndexLocation %d, baseVertexLocation %d, offset = %d, stride = %d:\n",
6423	sidVB, indexCount, startIndexLocation, baseVertexLocation, pVB->offset, pVB->stride));
6424
6425	for (uint32_t i = 0; i < indexCount; ++i)
6426	{
6427	uint32_t Index;
6428	if (BytesPerIndex == 2)
6429	Index = ((uint16_t *)pu8IndexData)[i];
6430	else
6431	Index = ((uint32_t *)pu8IndexData)[i];
6432
6433	Log8(("slot[%u] v%u { ", iSlot, Index));
6434
6435	for (uint32_t iElement = 0; iElement < pDXElementLayout->cElementDesc; ++iElement)
6436	{
6437	D3D11_INPUT_ELEMENT_DESC *pElement = &pDXElementLayout->aElementDesc[iElement];
6438	if (pElement->InputSlot == iSlot)
6439	{
6440	uint8_t const pu8Vertex = pu8VertexData + Index pVB->stride;
6441	dxDbgLogVertexElement(pElement->Format, pu8Vertex + pElement->AlignedByteOffset);
6442	}
6443	}
6444
6445	Log8((" }\n"));
6446
6447	if (pVB->stride == 0)
6448	break;
6449	}
6450
6451	vmsvga3dBackSurfaceUnmap(pThisCC, &image, &mapVB, /* fWritten = */ false);
6452	}
6453	}
6454
6455	RTMemFree(pvIndexBuffer);
6456	}
6457	}
6458	#endif
6459
6460
6461	static void dxSetupPipeline(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6462	{
6463	/* Make sure that any draw operations on shader resource views have finished. */
6464	AssertCompile(RT_ELEMENTS(pDXContext->svgaDXContext.shaderState) == SVGA3D_NUM_SHADERTYPE);
6465	AssertCompile(RT_ELEMENTS(pDXContext->svgaDXContext.shaderState[0].shaderResources) == SVGA3D_DX_MAX_SRVIEWS);
6466
6467	int rc;
6468
6469	/* Unbind render target views because they mught be (re-)used as shader resource views. */
6470	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
6471	pDXDevice->pImmediateContext->OMSetRenderTargetsAndUnorderedAccessViews(0, NULL, NULL, 0, 0, NULL, NULL);
6472	for (unsigned i = 0; i < SVGA3D_DX11_1_MAX_UAVIEWS; ++i)
6473	{
6474	ID3D11UnorderedAccessView *pNullUA = 0;
6475	pDXDevice->pImmediateContext->CSSetUnorderedAccessViews(i, 1, &pNullUA, NULL);
6476	}
6477
6478	dxSetConstantBuffers(pThisCC, pDXContext);
6479	dxSetVertexBuffers(pThisCC, pDXContext);
6480	dxSetIndexBuffer(pThisCC, pDXContext);
6481
6482	/*
6483	* Shader resources
6484	*/
6485
6486	/* Make sure that the shader resource views exist. */
6487	for (uint32_t idxShaderState = 0; idxShaderState < SVGA3D_NUM_SHADERTYPE; ++idxShaderState)
6488	{
6489	for (uint32_t idxSR = 0; idxSR < SVGA3D_DX_MAX_SRVIEWS; ++idxSR)
6490	{
6491	SVGA3dShaderResourceViewId const shaderResourceViewId = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderResources[idxSR];
6492	if (shaderResourceViewId != SVGA3D_INVALID_ID)
6493	{
6494	ASSERT_GUEST_RETURN_VOID(shaderResourceViewId < pDXContext->pBackendDXContext->cShaderResourceView);
6495
6496	SVGACOTableDXSRViewEntry const *pSRViewEntry = dxGetShaderResourceViewEntry(pDXContext, shaderResourceViewId);
6497	AssertContinue(pSRViewEntry != NULL);
6498
6499	uint32_t const sid = pSRViewEntry->sid;
6500
6501	PVMSVGA3DSURFACE pSurface;
6502	rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
6503	if (RT_FAILURE(rc))
6504	{
6505	AssertMsgFailed(("sid = %u, rc = %Rrc\n", sid, rc));
6506	continue;
6507	}
6508
6509	/* The guest might have invalidated the surface in which case pSurface->pBackendSurface is NULL. */
6510	/** @todo This is not needed for "single DX device" mode. */
6511	if (pSurface->pBackendSurface)
6512	{
6513	/* Wait for the surface to finish drawing. */
6514	dxSurfaceWait(pThisCC->svga.p3dState, pSurface, pDXContext->cid);
6515	}
6516
6517	/* If a view has not been created yet, do it now. */
6518	if (!pDXContext->pBackendDXContext->paShaderResourceView[shaderResourceViewId].u.pView)
6519	{
6520	//DEBUG_BREAKPOINT_TEST();
6521	LogFunc(("Re-creating SRV: sid=%u srvid = %u\n", sid, shaderResourceViewId));
6522	rc = dxDefineShaderResourceView(pThisCC, pDXContext, shaderResourceViewId, pSRViewEntry);
6523	AssertContinue(RT_SUCCESS(rc));
6524	}
6525
6526	LogFunc(("srv[%d][%d] sid = %u, srvid = %u, format = %s(%d)\n", idxShaderState, idxSR, sid, shaderResourceViewId, vmsvgaLookupEnum((int)pSRViewEntry->format, &g_SVGA3dSurfaceFormat2String), pSRViewEntry->format));
6527
6528	#ifdef DUMP_BITMAPS
6529	SVGA3dSurfaceImageId image;
6530	image.sid = sid;
6531	image.face = 0;
6532	image.mipmap = 0;
6533	VMSVGA3D_MAPPED_SURFACE map;
6534	int rc2 = vmsvga3dSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
6535	if (RT_SUCCESS(rc2))
6536	{
6537	vmsvga3dMapWriteBmpFile(&map, "sr-");
6538	vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
6539	}
6540	else
6541	Log(("Map failed %Rrc\n", rc));
6542	#endif
6543	}
6544	}
6545
6546	/* Set shader resources. */
6547	rc = dxSetShaderResources(pThisCC, pDXContext, (SVGA3dShaderType)(idxShaderState + SVGA3D_SHADERTYPE_MIN));
6548	AssertRC(rc);
6549	}
6550
6551	/*
6552	* Compute shader unordered access views
6553	*/
6554
6555	for (uint32_t idxUA = 0; idxUA < SVGA3D_DX11_1_MAX_UAVIEWS; ++idxUA)
6556	{
6557	SVGA3dUAViewId const uaViewId = pDXContext->svgaDXContext.csuaViewIds[idxUA];
6558	if (uaViewId != SVGA3D_INVALID_ID)
6559	{
6560	//DEBUG_BREAKPOINT_TEST();
6561	ASSERT_GUEST_RETURN_VOID(uaViewId < pDXContext->pBackendDXContext->cUnorderedAccessView);
6562
6563	SVGACOTableDXUAViewEntry const *pUAViewEntry = dxGetUnorderedAccessViewEntry(pDXContext, uaViewId);
6564	AssertContinue(pUAViewEntry != NULL);
6565
6566	uint32_t const sid = pUAViewEntry->sid;
6567
6568	PVMSVGA3DSURFACE pSurface;
6569	rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
6570	AssertRCReturnVoid(rc);
6571
6572	/* The guest might have invalidated the surface in which case pSurface->pBackendSurface is NULL. */
6573	/** @todo This is not needed for "single DX device" mode. */
6574	if (pSurface->pBackendSurface)
6575	{
6576	/* Wait for the surface to finish drawing. */
6577	dxSurfaceWait(pThisCC->svga.p3dState, pSurface, pDXContext->cid);
6578	}
6579
6580	/* If a view has not been created yet, do it now. */
6581	if (!pDXContext->pBackendDXContext->paUnorderedAccessView[uaViewId].u.pView)
6582	{
6583	LogFunc(("Re-creating UAV: sid=%u uaid = %u\n", sid, uaViewId));
6584	rc = dxDefineUnorderedAccessView(pThisCC, pDXContext, uaViewId, pUAViewEntry);
6585	AssertContinue(RT_SUCCESS(rc));
6586	}
6587
6588	LogFunc(("csuav[%d] sid = %u, uaid = %u\n", idxUA, sid, uaViewId));
6589	}
6590	}
6591
6592	/* Set views. */
6593	rc = dxSetCSUnorderedAccessViews(pThisCC, pDXContext);
6594	AssertRC(rc);
6595
6596	/*
6597	* Render targets and unordered access views.
6598	*/
6599
6600	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
6601	AssertReturnVoid(pDevice->pDevice);
6602
6603	/* Make sure that the render target views exist. Similar to SRVs. */
6604	if (pDXContext->svgaDXContext.renderState.depthStencilViewId != SVGA3D_INVALID_ID)
6605	{
6606	uint32_t const viewId = pDXContext->svgaDXContext.renderState.depthStencilViewId;
6607
6608	ASSERT_GUEST_RETURN_VOID(viewId < pDXContext->pBackendDXContext->cDepthStencilView);
6609
6610	SVGACOTableDXDSViewEntry const *pDSViewEntry = dxGetDepthStencilViewEntry(pDXContext, viewId);
6611	AssertReturnVoid(pDSViewEntry != NULL);
6612
6613	PVMSVGA3DSURFACE pSurface;
6614	rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pDSViewEntry->sid, &pSurface);
6615	AssertRCReturnVoid(rc);
6616
6617	/* If a view has not been created yet, do it now. */
6618	if (!pDXContext->pBackendDXContext->paDepthStencilView[viewId].u.pView)
6619	{
6620	//DEBUG_BREAKPOINT_TEST();
6621	LogFunc(("Re-creating DSV: sid=%u dsvid = %u\n", pDSViewEntry->sid, viewId));
6622	rc = dxDefineDepthStencilView(pThisCC, pDXContext, viewId, pDSViewEntry);
6623	AssertReturnVoid(RT_SUCCESS(rc));
6624	}
6625
6626	LogFunc(("dsv sid = %u, dsvid = %u\n", pDSViewEntry->sid, viewId));
6627	}
6628
6629	for (uint32_t i = 0; i < SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS; ++i)
6630	{
6631	if (pDXContext->svgaDXContext.renderState.renderTargetViewIds[i] != SVGA3D_INVALID_ID)
6632	{
6633	uint32_t const viewId = pDXContext->svgaDXContext.renderState.renderTargetViewIds[i];
6634
6635	ASSERT_GUEST_RETURN_VOID(viewId < pDXContext->pBackendDXContext->cRenderTargetView);
6636
6637	SVGACOTableDXRTViewEntry const *pRTViewEntry = dxGetRenderTargetViewEntry(pDXContext, viewId);
6638	AssertReturnVoid(pRTViewEntry != NULL);
6639
6640	PVMSVGA3DSURFACE pSurface;
6641	rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pRTViewEntry->sid, &pSurface);
6642	AssertRCReturnVoid(rc);
6643
6644	/* If a view has not been created yet, do it now. */
6645	if (!pDXContext->pBackendDXContext->paRenderTargetView[viewId].u.pView)
6646	{
6647	//DEBUG_BREAKPOINT_TEST();
6648	LogFunc(("Re-creating RTV: sid=%u rtvid = %u\n", pRTViewEntry->sid, viewId));
6649	rc = dxDefineRenderTargetView(pThisCC, pDXContext, viewId, pRTViewEntry);
6650	AssertReturnVoid(RT_SUCCESS(rc));
6651	}
6652
6653	LogFunc(("rtv sid = %u, rtvid = %u, format = %s(%d)\n", pRTViewEntry->sid, viewId, vmsvgaLookupEnum((int)pRTViewEntry->format, &g_SVGA3dSurfaceFormat2String), pRTViewEntry->format));
6654	}
6655	}
6656
6657	for (uint32_t idxUA = 0; idxUA < SVGA3D_DX11_1_MAX_UAVIEWS; ++idxUA)
6658	{
6659	SVGA3dUAViewId const uaViewId = pDXContext->svgaDXContext.uaViewIds[idxUA];
6660	if (uaViewId != SVGA3D_INVALID_ID)
6661	{
6662	//DEBUG_BREAKPOINT_TEST();
6663	ASSERT_GUEST_RETURN_VOID(uaViewId < pDXContext->pBackendDXContext->cUnorderedAccessView);
6664
6665	SVGACOTableDXUAViewEntry const *pUAViewEntry = dxGetUnorderedAccessViewEntry(pDXContext, uaViewId);
6666	AssertContinue(pUAViewEntry != NULL);
6667
6668	uint32_t const sid = pUAViewEntry->sid;
6669
6670	PVMSVGA3DSURFACE pSurface;
6671	rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
6672	AssertRCReturnVoid(rc);
6673
6674	/* The guest might have invalidated the surface in which case pSurface->pBackendSurface is NULL. */
6675	/** @todo This is not needed for "single DX device" mode. */
6676	if (pSurface->pBackendSurface)
6677	{
6678	/* Wait for the surface to finish drawing. */
6679	dxSurfaceWait(pThisCC->svga.p3dState, pSurface, pDXContext->cid);
6680	}
6681
6682	/* If a view has not been created yet, do it now. */
6683	if (!pDXContext->pBackendDXContext->paUnorderedAccessView[uaViewId].u.pView)
6684	{
6685	LogFunc(("Re-creating UAV: sid=%u uaid = %u\n", sid, uaViewId));
6686	rc = dxDefineUnorderedAccessView(pThisCC, pDXContext, uaViewId, pUAViewEntry);
6687	AssertContinue(RT_SUCCESS(rc));
6688	}
6689
6690	LogFunc(("uav[%d] sid = %u, uaid = %u\n", idxUA, sid, uaViewId));
6691	}
6692	}
6693
6694	/* Set render targets. */
6695	rc = dxSetRenderTargets(pThisCC, pDXContext);
6696	AssertRC(rc);
6697
6698	/*
6699	* Shaders
6700	*/
6701
6702	for (uint32_t idxShaderState = 0; idxShaderState < SVGA3D_NUM_SHADERTYPE; ++idxShaderState)
6703	{
6704	DXSHADER *pDXShader;
6705	SVGA3dShaderType const shaderType = (SVGA3dShaderType)(idxShaderState + SVGA3D_SHADERTYPE_MIN);
6706	SVGA3dShaderId const shaderId = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId;
6707
6708	if (shaderId != SVGA3D_INVALID_ID)
6709	{
6710	pDXShader = &pDXContext->pBackendDXContext->paShader[shaderId];
6711	if (pDXShader->pShader == NULL)
6712	{
6713	/* Create a new shader. */
6714
6715	/* Apply resource types to a pixel shader. */
6716	if (shaderType == SVGA3D_SHADERTYPE_PS) /* Others too? */
6717	{
6718	VGPU10_RESOURCE_DIMENSION aResourceDimension[SVGA3D_DX_MAX_SRVIEWS];
6719	RT_ZERO(aResourceDimension);
6720	VGPU10_RESOURCE_RETURN_TYPE aResourceReturnType[SVGA3D_DX_MAX_SRVIEWS];
6721	RT_ZERO(aResourceReturnType);
6722	uint32_t cResources = 0;
6723
6724	for (uint32_t idxSR = 0; idxSR < SVGA3D_DX_MAX_SRVIEWS; ++idxSR)
6725	{
6726	SVGA3dShaderResourceViewId const shaderResourceViewId = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderResources[idxSR];
6727	if (shaderResourceViewId != SVGA3D_INVALID_ID)
6728	{
6729	SVGACOTableDXSRViewEntry const *pSRViewEntry = dxGetShaderResourceViewEntry(pDXContext, shaderResourceViewId);
6730	AssertContinue(pSRViewEntry != NULL);
6731
6732	PVMSVGA3DSURFACE pSurface;
6733	rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pSRViewEntry->sid, &pSurface);
6734	AssertRCReturnVoid(rc);
6735
6736	aResourceReturnType[idxSR] = DXShaderResourceReturnTypeFromFormat(pSRViewEntry->format);
6737
6738	switch (pSRViewEntry->resourceDimension)
6739	{
6740	case SVGA3D_RESOURCE_BUFFEREX:
6741	case SVGA3D_RESOURCE_BUFFER:
6742	aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_BUFFER;
6743	break;
6744	case SVGA3D_RESOURCE_TEXTURE1D:
6745	if (pSurface->surfaceDesc.numArrayElements <= 1)
6746	aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURE1D;
6747	else
6748	aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURE1DARRAY;
6749	break;
6750	case SVGA3D_RESOURCE_TEXTURE2D:
6751	if (pSurface->surfaceDesc.numArrayElements <= 1)
6752	aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURE2D;
6753	else
6754	aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURE2DARRAY;
6755	break;
6756	case SVGA3D_RESOURCE_TEXTURE3D:
6757	aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURE3D;
6758	break;
6759	case SVGA3D_RESOURCE_TEXTURECUBE:
6760	if (pSurface->surfaceDesc.numArrayElements <= 6)
6761	aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURECUBE;
6762	else
6763	aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURECUBEARRAY;
6764	break;
6765	default:
6766	ASSERT_GUEST_FAILED();
6767	aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURE2D;
6768	}
6769
6770	cResources = idxSR + 1;
6771
6772	/* Update componentType of the pixel shader output signature to correspond to the bound resources. */
6773	if (idxSR < pDXShader->shaderInfo.cOutputSignature)
6774	{
6775	SVGA3dDXSignatureEntry *pSignatureEntry = &pDXShader->shaderInfo.aOutputSignature[idxSR];
6776	pSignatureEntry->componentType = DXShaderComponentTypeFromFormat(pSRViewEntry->format);
6777	}
6778	}
6779	}
6780
6781	rc = DXShaderUpdateResources(&pDXShader->shaderInfo, aResourceDimension, aResourceReturnType, cResources);
6782	AssertRC(rc); /* Ignore rc because the shader will most likely work anyway. */
6783	}
6784
6785	if (shaderType == SVGA3D_SHADERTYPE_VS)
6786	{
6787	/* Update componentType of the vertex shader input signature to correspond to the input declaration. */
6788	vboxDXUpdateVSInputSignature(pDXContext, pDXShader);
6789	}
6790
6791	vboxDXMatchShaderSignatures(pThisCC, pDXContext, pDXShader);
6792
6793	rc = DXShaderCreateDXBC(&pDXShader->shaderInfo, &pDXShader->pvDXBC, &pDXShader->cbDXBC);
6794	if (RT_SUCCESS(rc))
6795	{
6796	#ifdef LOG_ENABLED
6797	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6798	if (pBackend->pfnD3DDisassemble && LogIs6Enabled())
6799	{
6800	ID3D10Blob *pBlob = 0;
6801	HRESULT hr2 = pBackend->pfnD3DDisassemble(pDXShader->pvDXBC, pDXShader->cbDXBC, 0, NULL, &pBlob);
6802	if (SUCCEEDED(hr2) && pBlob && pBlob->GetBufferSize())
6803	Log6(("%s\n", pBlob->GetBufferPointer()));
6804	else
6805	AssertFailed();
6806	D3D_RELEASE(pBlob);
6807	}
6808	LogFunc(("Shader: set cid=%u shid=%u type=%d, GuestSignatures %d\n", pDXContext->cid, shaderId, pDXShader->enmShaderType, pDXShader->shaderInfo.fGuestSignatures));
6809	#endif
6810
6811	HRESULT hr = dxShaderCreate(pThisCC, pDXContext, pDXShader);
6812	if (FAILED(hr))
6813	rc = VERR_INVALID_STATE;
6814	}
6815	}
6816
6817	LogFunc(("Shader: cid=%u shid=%u type=%d, GuestSignatures %d, %Rrc\n", pDXContext->cid, shaderId, pDXShader->enmShaderType, pDXShader->shaderInfo.fGuestSignatures, rc));
6818	}
6819	else
6820	pDXShader = NULL;
6821
6822	if (RT_SUCCESS(rc))
6823	dxShaderSet(pThisCC, pDXContext, shaderType, pDXShader);
6824
6825	AssertRC(rc);
6826	}
6827
6828	/*
6829	* InputLayout
6830	*/
6831	SVGA3dElementLayoutId const elementLayoutId = pDXContext->svgaDXContext.inputAssembly.layoutId;
6832	ID3D11InputLayout *pInputLayout = NULL;
6833	if (elementLayoutId != SVGA3D_INVALID_ID)
6834	{
6835	DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
6836	if (!pDXElementLayout->pElementLayout)
6837	{
6838	uint32_t const idxShaderState = SVGA3D_SHADERTYPE_VS - SVGA3D_SHADERTYPE_MIN;
6839	uint32_t const shid = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId;
6840	if (shid < pDXContext->pBackendDXContext->cShader)
6841	{
6842	DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[shid];
6843	if (pDXShader->pvDXBC)
6844	dxCreateInputLayout(pThisCC, pDXContext, elementLayoutId, pDXShader);
6845	else
6846	LogRelMax(16, ("VMSVGA: DX shader bytecode is not available in DXSetInputLayout: shid = %u\n", shid));
6847	}
6848	else
6849	LogRelMax(16, ("VMSVGA: DX shader is not set in DXSetInputLayout: shid = 0x%x\n", shid));
6850	}
6851
6852	pInputLayout = pDXElementLayout->pElementLayout;
6853
6854	LogFunc(("Input layout id %u\n", elementLayoutId));
6855	}
6856
6857	pDevice->pImmediateContext->IASetInputLayout(pInputLayout);
6858	}
6859
6860
6861	static DECLCALLBACK(int) vmsvga3dBackDXDraw(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t vertexCount, uint32_t startVertexLocation)
6862	{
6863	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6864	RT_NOREF(pBackend);
6865
6866	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
6867	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
6868
6869	dxSetupPipeline(pThisCC, pDXContext);
6870
6871	#ifdef LOG_ENABLED
6872	if (LogIs8Enabled())
6873	dxDbgDumpVertices_Draw(pThisCC, pDXContext, vertexCount, startVertexLocation);
6874	#endif
6875
6876	if (pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN)
6877	pDevice->pImmediateContext->Draw(vertexCount, startVertexLocation);
6878	else
6879	{
6880	/*
6881	* Emulate SVGA3D_PRIMITIVE_TRIANGLEFAN using an indexed draw of a triangle list.
6882	*/
6883
6884	/* Make sure that 16 bit indices are enough. */
6885	if (vertexCount > 65535)
6886	{
6887	LogRelMax(1, ("VMSVGA: ignore Draw(TRIANGLEFAN, %u)\n", vertexCount));
6888	return VERR_NOT_SUPPORTED;
6889	}
6890
6891	/* Generate indices. */
6892	UINT const IndexCount = 3 * (vertexCount - 2); /* 3_per_triangle * num_triangles */
6893	UINT const cbAlloc = IndexCount * sizeof(USHORT);
6894	USHORT paIndices = (USHORT )RTMemAlloc(cbAlloc);
6895	AssertReturn(paIndices, VERR_NO_MEMORY);
6896	USHORT iVertex = 1;
6897	for (UINT i = 0; i < IndexCount; i+= 3)
6898	{
6899	paIndices[i] = 0;
6900	paIndices[i + 1] = iVertex;
6901	++iVertex;
6902	paIndices[i + 2] = iVertex;
6903	}
6904
6905	D3D11_SUBRESOURCE_DATA InitData;
6906	InitData.pSysMem = paIndices;
6907	InitData.SysMemPitch = cbAlloc;
6908	InitData.SysMemSlicePitch = cbAlloc;
6909
6910	D3D11_BUFFER_DESC bd;
6911	RT_ZERO(bd);
6912	bd.ByteWidth = cbAlloc;
6913	bd.Usage = D3D11_USAGE_IMMUTABLE;
6914	bd.BindFlags = D3D11_BIND_INDEX_BUFFER;
6915	//bd.CPUAccessFlags = 0;
6916	//bd.MiscFlags = 0;
6917	//bd.StructureByteStride = 0;
6918
6919	ID3D11Buffer *pIndexBuffer = 0;
6920	HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, &InitData, &pIndexBuffer);
6921	Assert(SUCCEEDED(hr));RT_NOREF(hr);
6922
6923	/* Save the current index buffer. */
6924	ID3D11Buffer *pSavedIndexBuffer = 0;
6925	DXGI_FORMAT SavedFormat = DXGI_FORMAT_UNKNOWN;
6926	UINT SavedOffset = 0;
6927	pDevice->pImmediateContext->IAGetIndexBuffer(&pSavedIndexBuffer, &SavedFormat, &SavedOffset);
6928
6929	/* Set up the device state. */
6930	pDevice->pImmediateContext->IASetIndexBuffer(pIndexBuffer, DXGI_FORMAT_R16_UINT, 0);
6931	pDevice->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST);
6932
6933	UINT const StartIndexLocation = 0;
6934	INT const BaseVertexLocation = startVertexLocation;
6935	pDevice->pImmediateContext->DrawIndexed(IndexCount, StartIndexLocation, BaseVertexLocation);
6936
6937	/* Restore the device state. */
6938	pDevice->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP);
6939	pDevice->pImmediateContext->IASetIndexBuffer(pSavedIndexBuffer, SavedFormat, SavedOffset);
6940	D3D_RELEASE(pSavedIndexBuffer);
6941
6942	/* Cleanup. */
6943	D3D_RELEASE(pIndexBuffer);
6944	RTMemFree(paIndices);
6945	}
6946
6947	/* Note which surfaces are being drawn. */
6948	dxTrackRenderTargets(pThisCC, pDXContext);
6949
6950	#ifdef DX_FLUSH_AFTER_DRAW
6951	dxDeviceFlush(pDevice);
6952	#endif
6953
6954	return VINF_SUCCESS;
6955	}
6956
6957	static int dxReadBuffer(DXDEVICE pDevice, ID3D11Buffer pBuffer, UINT Offset, UINT Bytes, void *ppvData, uint32_t pcbData)
6958	{
6959	D3D11_BUFFER_DESC desc;
6960	RT_ZERO(desc);
6961	pBuffer->GetDesc(&desc);
6962
6963	AssertReturn( Offset < desc.ByteWidth
6964	&& Bytes <= desc.ByteWidth - Offset, VERR_INVALID_STATE);
6965
6966	void *pvData = RTMemAlloc(Bytes);
6967	if (!pvData)
6968	return VERR_NO_MEMORY;
6969
6970	*ppvData = pvData;
6971	*pcbData = Bytes;
6972
6973	#ifdef DX_COMMON_STAGING_BUFFER
6974	int rc = dxStagingBufferRealloc(pDevice, Bytes);
6975	if (RT_SUCCESS(rc))
6976	{
6977	/* Copy 'Bytes' bytes starting at 'Offset' from the buffer to the start of staging buffer. */
6978	ID3D11Resource *pDstResource = pDevice->pStagingBuffer;
6979	UINT DstSubresource = 0;
6980	UINT DstX = 0;
6981	UINT DstY = 0;
6982	UINT DstZ = 0;
6983	ID3D11Resource *pSrcResource = pBuffer;
6984	UINT SrcSubresource = 0;
6985	D3D11_BOX SrcBox;
6986	SrcBox.left = Offset;
6987	SrcBox.top = 0;
6988	SrcBox.front = 0;
6989	SrcBox.right = Offset + Bytes;
6990	SrcBox.bottom = 1;
6991	SrcBox.back = 1;
6992	pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
6993	pSrcResource, SrcSubresource, &SrcBox);
6994
6995	D3D11_MAPPED_SUBRESOURCE mappedResource;
6996	UINT const Subresource = 0; /* Buffers have only one subresource. */
6997	HRESULT hr = pDevice->pImmediateContext->Map(pDevice->pStagingBuffer, Subresource,
6998	D3D11_MAP_READ, /* MapFlags = */ 0, &mappedResource);
6999	if (SUCCEEDED(hr))
7000	{
7001	memcpy(pvData, mappedResource.pData, Bytes);
7002
7003	/* Unmap the staging buffer. */
7004	pDevice->pImmediateContext->Unmap(pDevice->pStagingBuffer, Subresource);
7005	}
7006	else
7007	AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
7008
7009	}
7010	#else
7011	uint32_t const cbAlloc = Bytes;
7012
7013	D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
7014	D3D11_BUFFER_DESC bd;
7015	RT_ZERO(bd);
7016	bd.ByteWidth = Bytes;
7017	bd.Usage = D3D11_USAGE_STAGING;
7018	//bd.BindFlags = 0; /* No bind flags are allowed for staging resources. */
7019	bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE \| D3D11_CPU_ACCESS_READ;
7020
7021	int rc = VINF_SUCCESS;
7022	ID3D11Buffer *pStagingBuffer;
7023	HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pStagingBuffer);
7024	if (SUCCEEDED(hr))
7025	{
7026	/* Copy from the buffer to the staging buffer. */
7027	ID3D11Resource *pDstResource = pStagingBuffer;
7028	UINT DstSubresource = 0;
7029	UINT DstX = 0;
7030	UINT DstY = 0;
7031	UINT DstZ = 0;
7032	ID3D11Resource *pSrcResource = pBuffer;
7033	UINT SrcSubresource = 0;
7034	D3D11_BOX SrcBox;
7035	SrcBox.left = Offset;
7036	SrcBox.top = 0;
7037	SrcBox.front = 0;
7038	SrcBox.right = Offset + Bytes;
7039	SrcBox.bottom = 1;
7040	SrcBox.back = 1;
7041	pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
7042	pSrcResource, SrcSubresource, &SrcBox);
7043
7044	D3D11_MAPPED_SUBRESOURCE mappedResource;
7045	UINT const Subresource = 0; /* Buffers have only one subresource. */
7046	hr = pDevice->pImmediateContext->Map(pStagingBuffer, Subresource,
7047	D3D11_MAP_READ, /* MapFlags = */ 0, &mappedResource);
7048	if (SUCCEEDED(hr))
7049	{
7050	memcpy(pvData, mappedResource.pData, Bytes);
7051
7052	/* Unmap the staging buffer. */
7053	pDevice->pImmediateContext->Unmap(pStagingBuffer, Subresource);
7054	}
7055	else
7056	AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
7057
7058	D3D_RELEASE(pStagingBuffer);
7059	}
7060	else
7061	{
7062	rc = VERR_NO_MEMORY;
7063	}
7064	#endif
7065
7066	if (RT_FAILURE(rc))
7067	{
7068	RTMemFree(*ppvData);
7069	*ppvData = NULL;
7070	*pcbData = 0;
7071	}
7072
7073	return rc;
7074	}
7075
7076
7077	static int dxDrawIndexedTriangleFan(DXDEVICE *pDevice, uint32_t IndexCountTF, uint32_t StartIndexLocationTF, int32_t BaseVertexLocationTF)
7078	{
7079	/*
7080	* Emulate an indexed SVGA3D_PRIMITIVE_TRIANGLEFAN using an indexed draw of triangle list.
7081	*/
7082
7083	/* Make sure that 16 bit indices are enough. */
7084	if (IndexCountTF > 65535)
7085	{
7086	LogRelMax(1, ("VMSVGA: ignore DrawIndexed(TRIANGLEFAN, %u)\n", IndexCountTF));
7087	return VERR_NOT_SUPPORTED;
7088	}
7089
7090	/* Save the current index buffer. */
7091	ID3D11Buffer *pSavedIndexBuffer = 0;
7092	DXGI_FORMAT SavedFormat = DXGI_FORMAT_UNKNOWN;
7093	UINT SavedOffset = 0;
7094	pDevice->pImmediateContext->IAGetIndexBuffer(&pSavedIndexBuffer, &SavedFormat, &SavedOffset);
7095
7096	AssertReturn( SavedFormat == DXGI_FORMAT_R16_UINT
7097	\|\| SavedFormat == DXGI_FORMAT_R32_UINT, VERR_NOT_SUPPORTED);
7098
7099	/* How many bytes are used by triangle fan indices. */
7100	UINT const BytesPerIndexTF = SavedFormat == DXGI_FORMAT_R16_UINT ? 2 : 4;
7101	UINT const BytesTF = BytesPerIndexTF * IndexCountTF;
7102
7103	/* Read the current index buffer content to obtain indices. */
7104	void *pvDataTF;
7105	uint32_t cbDataTF;
7106	int rc = dxReadBuffer(pDevice, pSavedIndexBuffer, StartIndexLocationTF, BytesTF, &pvDataTF, &cbDataTF);
7107	AssertRCReturn(rc, rc);
7108	AssertReturnStmt(cbDataTF >= BytesPerIndexTF, RTMemFree(pvDataTF), VERR_INVALID_STATE);
7109
7110	/* Generate indices for triangle list. */
7111	UINT const IndexCount = 3 * (IndexCountTF - 2); /* 3_per_triangle * num_triangles */
7112	UINT const cbAlloc = IndexCount * sizeof(USHORT);
7113	USHORT paIndices = (USHORT )RTMemAlloc(cbAlloc);
7114	AssertReturnStmt(paIndices, RTMemFree(pvDataTF), VERR_NO_MEMORY);
7115
7116	USHORT iVertex = 1;
7117	if (BytesPerIndexTF == 2)
7118	{
7119	USHORT paIndicesTF = (USHORT )pvDataTF;
7120	for (UINT i = 0; i < IndexCount; i+= 3)
7121	{
7122	paIndices[i] = paIndicesTF[0];
7123	AssertBreakStmt(iVertex < IndexCountTF, rc = VERR_INVALID_STATE);
7124	paIndices[i + 1] = paIndicesTF[iVertex];
7125	++iVertex;
7126	AssertBreakStmt(iVertex < IndexCountTF, rc = VERR_INVALID_STATE);
7127	paIndices[i + 2] = paIndicesTF[iVertex];
7128	}
7129	}
7130	else
7131	{
7132	UINT paIndicesTF = (UINT )pvDataTF;
7133	for (UINT i = 0; i < IndexCount; i+= 3)
7134	{
7135	paIndices[i] = paIndicesTF[0];
7136	AssertBreakStmt(iVertex < IndexCountTF, rc = VERR_INVALID_STATE);
7137	paIndices[i + 1] = paIndicesTF[iVertex];
7138	++iVertex;
7139	AssertBreakStmt(iVertex < IndexCountTF, rc = VERR_INVALID_STATE);
7140	paIndices[i + 2] = paIndicesTF[iVertex];
7141	}
7142	}
7143
7144	D3D11_SUBRESOURCE_DATA InitData;
7145	InitData.pSysMem = paIndices;
7146	InitData.SysMemPitch = cbAlloc;
7147	InitData.SysMemSlicePitch = cbAlloc;
7148
7149	D3D11_BUFFER_DESC bd;
7150	RT_ZERO(bd);
7151	bd.ByteWidth = cbAlloc;
7152	bd.Usage = D3D11_USAGE_IMMUTABLE;
7153	bd.BindFlags = D3D11_BIND_INDEX_BUFFER;
7154	//bd.CPUAccessFlags = 0;
7155	//bd.MiscFlags = 0;
7156	//bd.StructureByteStride = 0;
7157
7158	ID3D11Buffer *pIndexBuffer = 0;
7159	HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, &InitData, &pIndexBuffer);
7160	Assert(SUCCEEDED(hr));RT_NOREF(hr);
7161
7162	/* Set up the device state. */
7163	pDevice->pImmediateContext->IASetIndexBuffer(pIndexBuffer, DXGI_FORMAT_R16_UINT, 0);
7164	pDevice->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST);
7165
7166	UINT const StartIndexLocation = 0;
7167	INT const BaseVertexLocation = BaseVertexLocationTF;
7168	pDevice->pImmediateContext->DrawIndexed(IndexCount, StartIndexLocation, BaseVertexLocation);
7169
7170	/* Restore the device state. */
7171	pDevice->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP);
7172	pDevice->pImmediateContext->IASetIndexBuffer(pSavedIndexBuffer, SavedFormat, SavedOffset);
7173	D3D_RELEASE(pSavedIndexBuffer);
7174
7175	/* Cleanup. */
7176	D3D_RELEASE(pIndexBuffer);
7177	RTMemFree(paIndices);
7178	RTMemFree(pvDataTF);
7179
7180	return VINF_SUCCESS;
7181	}
7182
7183
7184	static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexed(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t indexCount, uint32_t startIndexLocation, int32_t baseVertexLocation)
7185	{
7186	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7187	RT_NOREF(pBackend);
7188
7189	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7190	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7191
7192	dxSetupPipeline(pThisCC, pDXContext);
7193
7194	#ifdef LOG_ENABLED
7195	if (LogIs8Enabled())
7196	dxDbgDumpVertices_DrawIndexed(pThisCC, pDXContext, indexCount, startIndexLocation, baseVertexLocation);
7197	#endif
7198
7199	if (pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN)
7200	pDevice->pImmediateContext->DrawIndexed(indexCount, startIndexLocation, baseVertexLocation);
7201	else
7202	{
7203	dxDrawIndexedTriangleFan(pDevice, indexCount, startIndexLocation, baseVertexLocation);
7204	}
7205
7206	/* Note which surfaces are being drawn. */
7207	dxTrackRenderTargets(pThisCC, pDXContext);
7208
7209	#ifdef DX_FLUSH_AFTER_DRAW
7210	dxDeviceFlush(pDevice);
7211	#endif
7212
7213	return VINF_SUCCESS;
7214	}
7215
7216
7217	static DECLCALLBACK(int) vmsvga3dBackDXDrawInstanced(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
7218	uint32_t vertexCountPerInstance, uint32_t instanceCount, uint32_t startVertexLocation, uint32_t startInstanceLocation)
7219	{
7220	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7221	RT_NOREF(pBackend);
7222
7223	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7224	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7225
7226	dxSetupPipeline(pThisCC, pDXContext);
7227
7228	Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
7229
7230	pDevice->pImmediateContext->DrawInstanced(vertexCountPerInstance, instanceCount, startVertexLocation, startInstanceLocation);
7231
7232	/* Note which surfaces are being drawn. */
7233	dxTrackRenderTargets(pThisCC, pDXContext);
7234
7235	#ifdef DX_FLUSH_AFTER_DRAW
7236	dxDeviceFlush(pDevice);
7237	#endif
7238
7239	return VINF_SUCCESS;
7240	}
7241
7242
7243	static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexedInstanced(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
7244	uint32_t indexCountPerInstance, uint32_t instanceCount, uint32_t startIndexLocation, int32_t baseVertexLocation, uint32_t startInstanceLocation)
7245	{
7246	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7247	RT_NOREF(pBackend);
7248
7249	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7250	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7251
7252	dxSetupPipeline(pThisCC, pDXContext);
7253
7254	Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
7255
7256	pDevice->pImmediateContext->DrawIndexedInstanced(indexCountPerInstance, instanceCount, startIndexLocation, baseVertexLocation, startInstanceLocation);
7257
7258	/* Note which surfaces are being drawn. */
7259	dxTrackRenderTargets(pThisCC, pDXContext);
7260
7261	#ifdef DX_FLUSH_AFTER_DRAW
7262	dxDeviceFlush(pDevice);
7263	#endif
7264
7265	return VINF_SUCCESS;
7266	}
7267
7268
7269	static DECLCALLBACK(int) vmsvga3dBackDXDrawAuto(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
7270	{
7271	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7272	RT_NOREF(pBackend);
7273
7274	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7275	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7276
7277	dxSetupPipeline(pThisCC, pDXContext);
7278
7279	Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
7280
7281	pDevice->pImmediateContext->DrawAuto();
7282
7283	/* Note which surfaces are being drawn. */
7284	dxTrackRenderTargets(pThisCC, pDXContext);
7285
7286	#ifdef DX_FLUSH_AFTER_DRAW
7287	dxDeviceFlush(pDevice);
7288	#endif
7289
7290	return VINF_SUCCESS;
7291	}
7292
7293
7294	static DECLCALLBACK(int) vmsvga3dBackDXSetInputLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId)
7295	{
7296	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7297	RT_NOREF(pBackend);
7298
7299	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7300	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7301
7302	RT_NOREF(elementLayoutId);
7303
7304	return VINF_SUCCESS;
7305	}
7306
7307
7308	static DECLCALLBACK(int) vmsvga3dBackDXSetVertexBuffers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startBuffer, uint32_t cVertexBuffer, SVGA3dVertexBuffer const *paVertexBuffer)
7309	{
7310	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7311	RT_NOREF(pBackend);
7312
7313	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7314	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7315
7316	for (uint32_t i = 0; i < cVertexBuffer; ++i)
7317	{
7318	uint32_t const idxVertexBuffer = startBuffer + i;
7319
7320	/* Get corresponding resource. Create the buffer if does not yet exist. */
7321	if (paVertexBuffer[i].sid != SVGA_ID_INVALID)
7322	{
7323	PVMSVGA3DSURFACE pSurface;
7324	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, paVertexBuffer[i].sid, &pSurface);
7325	AssertRCReturn(rc, rc);
7326
7327	if (pSurface->pBackendSurface == NULL)
7328	{
7329	/* Create the resource and initialize it with the current surface data. */
7330	rc = vmsvga3dBackSurfaceCreateBuffer(pThisCC, pDXContext, pSurface);
7331	AssertRCReturn(rc, rc);
7332	}
7333	Assert(pSurface->pBackendSurface->u.pBuffer);
7334
7335	DXBOUNDVERTEXBUFFER *pBoundBuffer = &pDXContext->pBackendDXContext->resources.inputAssembly.vertexBuffers[idxVertexBuffer];
7336	if ( pBoundBuffer->pBuffer != pSurface->pBackendSurface->u.pBuffer
7337	\|\| pBoundBuffer->stride != paVertexBuffer[i].stride
7338	\|\| pBoundBuffer->offset != paVertexBuffer[i].offset)
7339	{
7340	LogFunc(("vertex buffer: [%u]: sid = %u, offset %u, stride %u (%p -> %p)\n",
7341	idxVertexBuffer, paVertexBuffer[i].sid, paVertexBuffer[i].offset, paVertexBuffer[i].stride, pBoundBuffer->pBuffer, pSurface->pBackendSurface->u.pBuffer));
7342
7343	if (pBoundBuffer->pBuffer != pSurface->pBackendSurface->u.pBuffer)
7344	{
7345	D3D_RELEASE(pBoundBuffer->pBuffer);
7346	pBoundBuffer->pBuffer = pSurface->pBackendSurface->u.pBuffer;
7347	pBoundBuffer->pBuffer->AddRef();
7348	}
7349	pBoundBuffer->stride = paVertexBuffer[i].stride;
7350	pBoundBuffer->offset = paVertexBuffer[i].offset;
7351	}
7352	}
7353	else
7354	{
7355	DXBOUNDVERTEXBUFFER *pBoundBuffer = &pDXContext->pBackendDXContext->resources.inputAssembly.vertexBuffers[idxVertexBuffer];
7356	D3D_RELEASE(pBoundBuffer->pBuffer);
7357	pBoundBuffer->stride = 0;
7358	pBoundBuffer->offset = 0;
7359	}
7360	}
7361
7362	return VINF_SUCCESS;
7363	}
7364
7365
7366	static DECLCALLBACK(int) vmsvga3dBackDXSetIndexBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId sid, SVGA3dSurfaceFormat format, uint32_t offset)
7367	{
7368	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7369	RT_NOREF(pBackend);
7370
7371	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7372	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7373
7374	/* Get corresponding resource. Create the buffer if does not yet exist. */
7375	if (sid != SVGA_ID_INVALID)
7376	{
7377	PVMSVGA3DSURFACE pSurface;
7378	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
7379	AssertRCReturn(rc, rc);
7380
7381	if (pSurface->pBackendSurface == NULL)
7382	{
7383	/* Create the resource and initialize it with the current surface data. */
7384	rc = vmsvga3dBackSurfaceCreateBuffer(pThisCC, pDXContext, pSurface);
7385	AssertRCReturn(rc, rc);
7386	}
7387
7388	DXGI_FORMAT const enmDxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(format);
7389	AssertReturn(enmDxgiFormat == DXGI_FORMAT_R16_UINT \|\| enmDxgiFormat == DXGI_FORMAT_R32_UINT, VERR_INVALID_PARAMETER);
7390
7391	DXBOUNDINDEXBUFFER *pBoundBuffer = &pDXContext->pBackendDXContext->resources.inputAssembly.indexBuffer;
7392	if ( pBoundBuffer->pBuffer != pSurface->pBackendSurface->u.pBuffer
7393	\|\| pBoundBuffer->indexBufferOffset != offset
7394	\|\| pBoundBuffer->indexBufferFormat != enmDxgiFormat)
7395	{
7396	LogFunc(("index_buffer: sid = %u, offset %u, (%p -> %p)\n",
7397	sid, offset, pBoundBuffer->pBuffer, pSurface->pBackendSurface->u.pBuffer));
7398
7399	if (pBoundBuffer->pBuffer != pSurface->pBackendSurface->u.pBuffer)
7400	{
7401	D3D_RELEASE(pBoundBuffer->pBuffer);
7402	pBoundBuffer->pBuffer = pSurface->pBackendSurface->u.pBuffer;
7403	pBoundBuffer->pBuffer->AddRef();
7404	}
7405	pBoundBuffer->indexBufferOffset = offset;
7406	pBoundBuffer->indexBufferFormat = enmDxgiFormat;
7407	}
7408	}
7409	else
7410	{
7411	DXBOUNDINDEXBUFFER *pBoundBuffer = &pDXContext->pBackendDXContext->resources.inputAssembly.indexBuffer;
7412	D3D_RELEASE(pBoundBuffer->pBuffer);
7413	pBoundBuffer->indexBufferOffset = 0;
7414	pBoundBuffer->indexBufferFormat = DXGI_FORMAT_UNKNOWN;
7415	}
7416
7417	return VINF_SUCCESS;
7418	}
7419
7420	static D3D11_PRIMITIVE_TOPOLOGY dxTopology(SVGA3dPrimitiveType primitiveType)
7421	{
7422	static D3D11_PRIMITIVE_TOPOLOGY const aD3D11PrimitiveTopology[SVGA3D_PRIMITIVE_MAX] =
7423	{
7424	D3D11_PRIMITIVE_TOPOLOGY_UNDEFINED,
7425	D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST,
7426	D3D11_PRIMITIVE_TOPOLOGY_POINTLIST,
7427	D3D11_PRIMITIVE_TOPOLOGY_LINELIST,
7428	D3D11_PRIMITIVE_TOPOLOGY_LINESTRIP,
7429	D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP,
7430	D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP, /* SVGA3D_PRIMITIVE_TRIANGLEFAN: No FAN in D3D11. */
7431	D3D11_PRIMITIVE_TOPOLOGY_LINELIST_ADJ,
7432	D3D11_PRIMITIVE_TOPOLOGY_LINESTRIP_ADJ,
7433	D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST_ADJ,
7434	D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP_ADJ,
7435	D3D11_PRIMITIVE_TOPOLOGY_1_CONTROL_POINT_PATCHLIST,
7436	D3D11_PRIMITIVE_TOPOLOGY_2_CONTROL_POINT_PATCHLIST,
7437	D3D11_PRIMITIVE_TOPOLOGY_3_CONTROL_POINT_PATCHLIST,
7438	D3D11_PRIMITIVE_TOPOLOGY_4_CONTROL_POINT_PATCHLIST,
7439	D3D11_PRIMITIVE_TOPOLOGY_5_CONTROL_POINT_PATCHLIST,
7440	D3D11_PRIMITIVE_TOPOLOGY_6_CONTROL_POINT_PATCHLIST,
7441	D3D11_PRIMITIVE_TOPOLOGY_7_CONTROL_POINT_PATCHLIST,
7442	D3D11_PRIMITIVE_TOPOLOGY_8_CONTROL_POINT_PATCHLIST,
7443	D3D11_PRIMITIVE_TOPOLOGY_9_CONTROL_POINT_PATCHLIST,
7444	D3D11_PRIMITIVE_TOPOLOGY_10_CONTROL_POINT_PATCHLIST,
7445	D3D11_PRIMITIVE_TOPOLOGY_11_CONTROL_POINT_PATCHLIST,
7446	D3D11_PRIMITIVE_TOPOLOGY_12_CONTROL_POINT_PATCHLIST,
7447	D3D11_PRIMITIVE_TOPOLOGY_13_CONTROL_POINT_PATCHLIST,
7448	D3D11_PRIMITIVE_TOPOLOGY_14_CONTROL_POINT_PATCHLIST,
7449	D3D11_PRIMITIVE_TOPOLOGY_15_CONTROL_POINT_PATCHLIST,
7450	D3D11_PRIMITIVE_TOPOLOGY_16_CONTROL_POINT_PATCHLIST,
7451	D3D11_PRIMITIVE_TOPOLOGY_17_CONTROL_POINT_PATCHLIST,
7452	D3D11_PRIMITIVE_TOPOLOGY_18_CONTROL_POINT_PATCHLIST,
7453	D3D11_PRIMITIVE_TOPOLOGY_19_CONTROL_POINT_PATCHLIST,
7454	D3D11_PRIMITIVE_TOPOLOGY_20_CONTROL_POINT_PATCHLIST,
7455	D3D11_PRIMITIVE_TOPOLOGY_21_CONTROL_POINT_PATCHLIST,
7456	D3D11_PRIMITIVE_TOPOLOGY_22_CONTROL_POINT_PATCHLIST,
7457	D3D11_PRIMITIVE_TOPOLOGY_23_CONTROL_POINT_PATCHLIST,
7458	D3D11_PRIMITIVE_TOPOLOGY_24_CONTROL_POINT_PATCHLIST,
7459	D3D11_PRIMITIVE_TOPOLOGY_25_CONTROL_POINT_PATCHLIST,
7460	D3D11_PRIMITIVE_TOPOLOGY_26_CONTROL_POINT_PATCHLIST,
7461	D3D11_PRIMITIVE_TOPOLOGY_27_CONTROL_POINT_PATCHLIST,
7462	D3D11_PRIMITIVE_TOPOLOGY_28_CONTROL_POINT_PATCHLIST,
7463	D3D11_PRIMITIVE_TOPOLOGY_29_CONTROL_POINT_PATCHLIST,
7464	D3D11_PRIMITIVE_TOPOLOGY_30_CONTROL_POINT_PATCHLIST,
7465	D3D11_PRIMITIVE_TOPOLOGY_31_CONTROL_POINT_PATCHLIST,
7466	D3D11_PRIMITIVE_TOPOLOGY_32_CONTROL_POINT_PATCHLIST,
7467	};
7468	return aD3D11PrimitiveTopology[primitiveType];
7469	}
7470
7471	static DECLCALLBACK(int) vmsvga3dBackDXSetTopology(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dPrimitiveType topology)
7472	{
7473	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7474	RT_NOREF(pBackend);
7475
7476	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7477	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7478
7479	D3D11_PRIMITIVE_TOPOLOGY const enmTopology = dxTopology(topology);
7480	pDevice->pImmediateContext->IASetPrimitiveTopology(enmTopology);
7481	return VINF_SUCCESS;
7482	}
7483
7484
7485	static int dxSetRenderTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
7486	{
7487	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7488	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7489
7490	UINT UAVStartSlot = 0;
7491	UINT NumUAVs = 0;
7492	ID3D11UnorderedAccessView *apUnorderedAccessViews[SVGA3D_DX11_1_MAX_UAVIEWS];
7493	UINT aUAVInitialCounts[SVGA3D_DX11_1_MAX_UAVIEWS];
7494	for (uint32_t idxUA = 0; idxUA < SVGA3D_DX11_1_MAX_UAVIEWS; ++idxUA)
7495	{
7496	SVGA3dUAViewId const uaViewId = pDXContext->svgaDXContext.uaViewIds[idxUA];
7497	if (uaViewId != SVGA3D_INVALID_ID)
7498	{
7499	if (NumUAVs == 0)
7500	UAVStartSlot = idxUA;
7501	NumUAVs = idxUA - UAVStartSlot + 1;
7502	apUnorderedAccessViews[idxUA] = pDXContext->pBackendDXContext->paUnorderedAccessView[uaViewId].u.pUnorderedAccessView;
7503
7504	SVGACOTableDXUAViewEntry const *pEntry = dxGetUnorderedAccessViewEntry(pDXContext, uaViewId);
7505	aUAVInitialCounts[idxUA] = pEntry->structureCount;
7506	}
7507	else
7508	{
7509	apUnorderedAccessViews[idxUA] = NULL;
7510	aUAVInitialCounts[idxUA] = (UINT)-1;
7511	}
7512	}
7513
7514	UINT NumRTVs = 0;
7515	ID3D11RenderTargetView *apRenderTargetViews[SVGA3D_MAX_RENDER_TARGETS];
7516	RT_ZERO(apRenderTargetViews);
7517	for (uint32_t i = 0; i < pDXContext->cRenderTargets; ++i)
7518	{
7519	SVGA3dRenderTargetViewId const renderTargetViewId = pDXContext->svgaDXContext.renderState.renderTargetViewIds[i];
7520	if (renderTargetViewId != SVGA3D_INVALID_ID)
7521	{
7522	ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->pBackendDXContext->cRenderTargetView, VERR_INVALID_PARAMETER);
7523	apRenderTargetViews[i] = pDXContext->pBackendDXContext->paRenderTargetView[renderTargetViewId].u.pRenderTargetView;
7524	++NumRTVs;
7525	}
7526	}
7527
7528	/* RTVs are followed by UAVs. */
7529	Assert(NumUAVs == 0 \|\| NumRTVs <= pDXContext->svgaDXContext.uavSpliceIndex);
7530
7531	ID3D11DepthStencilView *pDepthStencilView = NULL;
7532	SVGA3dDepthStencilViewId const depthStencilViewId = pDXContext->svgaDXContext.renderState.depthStencilViewId;
7533	if (depthStencilViewId != SVGA_ID_INVALID)
7534	pDepthStencilView = pDXContext->pBackendDXContext->paDepthStencilView[depthStencilViewId].u.pDepthStencilView;
7535
7536	pDevice->pImmediateContext->OMSetRenderTargetsAndUnorderedAccessViews(NumRTVs,
7537	apRenderTargetViews,
7538	pDepthStencilView,
7539	pDXContext->svgaDXContext.uavSpliceIndex,
7540	NumUAVs,
7541	apUnorderedAccessViews,
7542	aUAVInitialCounts);
7543	return VINF_SUCCESS;
7544	}
7545
7546
7547	static DECLCALLBACK(int) vmsvga3dBackDXSetRenderTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, uint32_t cRenderTargetViewId, SVGA3dRenderTargetViewId const *paRenderTargetViewId)
7548	{
7549	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7550	RT_NOREF(pBackend);
7551
7552	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7553	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7554
7555	RT_NOREF(depthStencilViewId, cRenderTargetViewId, paRenderTargetViewId);
7556
7557	return VINF_SUCCESS;
7558	}
7559
7560
7561	static DECLCALLBACK(int) vmsvga3dBackDXSetBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dBlendStateId blendId, float const blendFactor[4], uint32_t sampleMask)
7562	{
7563	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7564	RT_NOREF(pBackend);
7565
7566	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7567	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7568
7569	if (blendId != SVGA3D_INVALID_ID)
7570	{
7571	ID3D11BlendState *pBlendState = pDXContext->pBackendDXContext->papBlendState[blendId];
7572	pDevice->pImmediateContext->OMSetBlendState(pBlendState, blendFactor, sampleMask);
7573	}
7574	else
7575	pDevice->pImmediateContext->OMSetBlendState(NULL, NULL, 0);
7576
7577	return VINF_SUCCESS;
7578	}
7579
7580
7581	static DECLCALLBACK(int) vmsvga3dBackDXSetDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, uint32_t stencilRef)
7582	{
7583	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7584	RT_NOREF(pBackend);
7585
7586	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7587	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7588
7589	if (depthStencilId != SVGA3D_INVALID_ID)
7590	{
7591	ID3D11DepthStencilState *pDepthStencilState = pDXContext->pBackendDXContext->papDepthStencilState[depthStencilId];
7592	pDevice->pImmediateContext->OMSetDepthStencilState(pDepthStencilState, stencilRef);
7593	}
7594	else
7595	pDevice->pImmediateContext->OMSetDepthStencilState(NULL, 0);
7596
7597	return VINF_SUCCESS;
7598	}
7599
7600
7601	static DECLCALLBACK(int) vmsvga3dBackDXSetRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId)
7602	{
7603	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7604	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7605	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7606
7607	RT_NOREF(pBackend);
7608
7609	if (rasterizerId != SVGA3D_INVALID_ID)
7610	{
7611	ID3D11RasterizerState *pRasterizerState = pDXContext->pBackendDXContext->papRasterizerState[rasterizerId];
7612	pDevice->pImmediateContext->RSSetState(pRasterizerState);
7613	}
7614	else
7615	pDevice->pImmediateContext->RSSetState(NULL);
7616
7617	return VINF_SUCCESS;
7618	}
7619
7620
7621	typedef struct VGPU10QUERYINFO
7622	{
7623	SVGA3dQueryType svgaQueryType;
7624	uint32_t cbDataVMSVGA;
7625	D3D11_QUERY dxQueryType;
7626	uint32_t cbDataD3D11;
7627	} VGPU10QUERYINFO;
7628
7629	static VGPU10QUERYINFO const *dxQueryInfo(SVGA3dQueryType type)
7630	{
7631	static VGPU10QUERYINFO const aQueryInfo[SVGA3D_QUERYTYPE_MAX] =
7632	{
7633	{ SVGA3D_QUERYTYPE_OCCLUSION, sizeof(SVGADXOcclusionQueryResult),
7634	D3D11_QUERY_OCCLUSION, sizeof(UINT64) },
7635	{ SVGA3D_QUERYTYPE_TIMESTAMP, sizeof(SVGADXTimestampQueryResult),
7636	D3D11_QUERY_TIMESTAMP, sizeof(UINT64) },
7637	{ SVGA3D_QUERYTYPE_TIMESTAMPDISJOINT, sizeof(SVGADXTimestampDisjointQueryResult),
7638	D3D11_QUERY_TIMESTAMP_DISJOINT, sizeof(D3D11_QUERY_DATA_TIMESTAMP_DISJOINT) },
7639	{ SVGA3D_QUERYTYPE_PIPELINESTATS, sizeof(SVGADXPipelineStatisticsQueryResult),
7640	D3D11_QUERY_PIPELINE_STATISTICS, sizeof(D3D11_QUERY_DATA_PIPELINE_STATISTICS) },
7641	{ SVGA3D_QUERYTYPE_OCCLUSIONPREDICATE, sizeof(SVGADXOcclusionPredicateQueryResult),
7642	D3D11_QUERY_OCCLUSION_PREDICATE, sizeof(BOOL) },
7643	{ SVGA3D_QUERYTYPE_STREAMOUTPUTSTATS, sizeof(SVGADXStreamOutStatisticsQueryResult),
7644	D3D11_QUERY_SO_STATISTICS, sizeof(D3D11_QUERY_DATA_SO_STATISTICS) },
7645	{ SVGA3D_QUERYTYPE_STREAMOVERFLOWPREDICATE, sizeof(SVGADXStreamOutPredicateQueryResult),
7646	D3D11_QUERY_SO_OVERFLOW_PREDICATE, sizeof(BOOL) },
7647	{ SVGA3D_QUERYTYPE_OCCLUSION64, sizeof(SVGADXOcclusion64QueryResult),
7648	D3D11_QUERY_OCCLUSION, sizeof(UINT64) },
7649	{ SVGA3D_QUERYTYPE_SOSTATS_STREAM0, sizeof(SVGADXStreamOutStatisticsQueryResult),
7650	D3D11_QUERY_SO_STATISTICS_STREAM0, sizeof(D3D11_QUERY_DATA_SO_STATISTICS) },
7651	{ SVGA3D_QUERYTYPE_SOSTATS_STREAM1, sizeof(SVGADXStreamOutStatisticsQueryResult),
7652	D3D11_QUERY_SO_STATISTICS_STREAM1, sizeof(D3D11_QUERY_DATA_SO_STATISTICS) },
7653	{ SVGA3D_QUERYTYPE_SOSTATS_STREAM2, sizeof(SVGADXStreamOutStatisticsQueryResult),
7654	D3D11_QUERY_SO_STATISTICS_STREAM2, sizeof(D3D11_QUERY_DATA_SO_STATISTICS) },
7655	{ SVGA3D_QUERYTYPE_SOSTATS_STREAM3, sizeof(SVGADXStreamOutStatisticsQueryResult),
7656	D3D11_QUERY_SO_STATISTICS_STREAM3, sizeof(D3D11_QUERY_DATA_SO_STATISTICS) },
7657	{ SVGA3D_QUERYTYPE_SOP_STREAM0, sizeof(SVGADXStreamOutPredicateQueryResult),
7658	D3D11_QUERY_SO_OVERFLOW_PREDICATE_STREAM0, sizeof(BOOL) },
7659	{ SVGA3D_QUERYTYPE_SOP_STREAM1, sizeof(SVGADXStreamOutPredicateQueryResult),
7660	D3D11_QUERY_SO_OVERFLOW_PREDICATE_STREAM1, sizeof(BOOL) },
7661	{ SVGA3D_QUERYTYPE_SOP_STREAM2, sizeof(SVGADXStreamOutPredicateQueryResult),
7662	D3D11_QUERY_SO_OVERFLOW_PREDICATE_STREAM2, sizeof(BOOL) },
7663	{ SVGA3D_QUERYTYPE_SOP_STREAM3, sizeof(SVGADXStreamOutPredicateQueryResult),
7664	D3D11_QUERY_SO_OVERFLOW_PREDICATE_STREAM3, sizeof(BOOL) },
7665	};
7666
7667	ASSERT_GUEST_RETURN(type < RT_ELEMENTS(aQueryInfo), NULL);
7668	return &aQueryInfo[type];
7669	}
7670
7671	static int dxDefineQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId, SVGACOTableDXQueryEntry const *pEntry)
7672	{
7673	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7674	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
7675
7676	DXQUERY *pDXQuery = &pDXContext->pBackendDXContext->paQuery[queryId];
7677	VGPU10QUERYINFO const *pQueryInfo = dxQueryInfo((SVGA3dQueryType)pEntry->type);
7678	if (!pQueryInfo)
7679	return VERR_INVALID_PARAMETER;
7680
7681	D3D11_QUERY_DESC desc;
7682	desc.Query = pQueryInfo->dxQueryType;
7683	desc.MiscFlags = 0;
7684	if (pEntry->flags & SVGA3D_DXQUERY_FLAG_PREDICATEHINT)
7685	desc.MiscFlags \|= (UINT)D3D11_QUERY_MISC_PREDICATEHINT;
7686
7687	HRESULT hr = pDXDevice->pDevice->CreateQuery(&desc, &pDXQuery->pQuery);
7688	AssertReturn(SUCCEEDED(hr), VERR_INVALID_STATE);
7689
7690	return VINF_SUCCESS;
7691	}
7692
7693
7694	static int dxDestroyQuery(DXQUERY *pDXQuery)
7695	{
7696	D3D_RELEASE(pDXQuery->pQuery);
7697	return VINF_SUCCESS;
7698	}
7699
7700
7701	static DECLCALLBACK(int) vmsvga3dBackDXDefineQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId, SVGACOTableDXQueryEntry const *pEntry)
7702	{
7703	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7704	RT_NOREF(pBackend);
7705
7706	return dxDefineQuery(pThisCC, pDXContext, queryId, pEntry);
7707	}
7708
7709
7710	static DECLCALLBACK(int) vmsvga3dBackDXDestroyQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId)
7711	{
7712	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7713	RT_NOREF(pBackend);
7714
7715	DXQUERY *pDXQuery = &pDXContext->pBackendDXContext->paQuery[queryId];
7716	dxDestroyQuery(pDXQuery);
7717
7718	return VINF_SUCCESS;
7719	}
7720
7721
7722	/** @todo queryId makes pDXQuery redundant */
7723	static int dxBeginQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId, DXQUERY *pDXQuery)
7724	{
7725	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7726	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
7727
7728	/* Begin is disabled for some queries. */
7729	SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
7730	if (pEntry->type == SVGA3D_QUERYTYPE_TIMESTAMP)
7731	return VINF_SUCCESS;
7732
7733	pDXDevice->pImmediateContext->Begin(pDXQuery->pQuery);
7734	return VINF_SUCCESS;
7735	}
7736
7737
7738	static DECLCALLBACK(int) vmsvga3dBackDXBeginQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId)
7739	{
7740	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7741	RT_NOREF(pBackend);
7742
7743	DXQUERY *pDXQuery = &pDXContext->pBackendDXContext->paQuery[queryId];
7744	int rc = dxBeginQuery(pThisCC, pDXContext, queryId, pDXQuery);
7745	return rc;
7746	}
7747
7748
7749	static int dxGetQueryResult(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId,
7750	SVGADXQueryResultUnion pQueryResult, uint32_t pcbOut)
7751	{
7752	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7753	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
7754
7755	typedef union _DXQUERYRESULT
7756	{
7757	UINT64 occlusion;
7758	UINT64 timestamp;
7759	D3D11_QUERY_DATA_TIMESTAMP_DISJOINT timestampDisjoint;
7760	D3D11_QUERY_DATA_PIPELINE_STATISTICS pipelineStatistics;
7761	BOOL occlusionPredicate;
7762	D3D11_QUERY_DATA_SO_STATISTICS soStatistics;
7763	BOOL soOverflowPredicate;
7764	} DXQUERYRESULT;
7765
7766	DXQUERY *pDXQuery = &pDXContext->pBackendDXContext->paQuery[queryId];
7767	SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
7768	VGPU10QUERYINFO const *pQueryInfo = dxQueryInfo((SVGA3dQueryType)pEntry->type);
7769	if (!pQueryInfo)
7770	return VERR_INVALID_PARAMETER;
7771
7772	DXQUERYRESULT dxQueryResult;
7773	while (pDXDevice->pImmediateContext->GetData(pDXQuery->pQuery, &dxQueryResult, pQueryInfo->cbDataD3D11, 0) != S_OK)
7774	{
7775	RTThreadYield();
7776	}
7777
7778	/* Copy back the result. */
7779	switch (pEntry->type)
7780	{
7781	case SVGA3D_QUERYTYPE_OCCLUSION:
7782	pQueryResult->occ.samplesRendered = (uint32_t)dxQueryResult.occlusion;
7783	break;
7784	case SVGA3D_QUERYTYPE_TIMESTAMP:
7785	pQueryResult->ts.timestamp = dxQueryResult.timestamp;
7786	break;
7787	case SVGA3D_QUERYTYPE_TIMESTAMPDISJOINT:
7788	pQueryResult->tsDisjoint.realFrequency = dxQueryResult.timestampDisjoint.Frequency;
7789	pQueryResult->tsDisjoint.disjoint = dxQueryResult.timestampDisjoint.Disjoint;
7790	break;
7791	case SVGA3D_QUERYTYPE_PIPELINESTATS:
7792	pQueryResult->pipelineStats.inputAssemblyVertices = dxQueryResult.pipelineStatistics.IAVertices;
7793	pQueryResult->pipelineStats.inputAssemblyPrimitives = dxQueryResult.pipelineStatistics.IAPrimitives;
7794	pQueryResult->pipelineStats.vertexShaderInvocations = dxQueryResult.pipelineStatistics.VSInvocations;
7795	pQueryResult->pipelineStats.geometryShaderInvocations = dxQueryResult.pipelineStatistics.GSInvocations;
7796	pQueryResult->pipelineStats.geometryShaderPrimitives = dxQueryResult.pipelineStatistics.GSPrimitives;
7797	pQueryResult->pipelineStats.clipperInvocations = dxQueryResult.pipelineStatistics.CInvocations;
7798	pQueryResult->pipelineStats.clipperPrimitives = dxQueryResult.pipelineStatistics.CPrimitives;
7799	pQueryResult->pipelineStats.pixelShaderInvocations = dxQueryResult.pipelineStatistics.PSInvocations;
7800	pQueryResult->pipelineStats.hullShaderInvocations = dxQueryResult.pipelineStatistics.HSInvocations;
7801	pQueryResult->pipelineStats.domainShaderInvocations = dxQueryResult.pipelineStatistics.DSInvocations;
7802	pQueryResult->pipelineStats.computeShaderInvocations = dxQueryResult.pipelineStatistics.CSInvocations;
7803	break;
7804	case SVGA3D_QUERYTYPE_OCCLUSIONPREDICATE:
7805	pQueryResult->occPred.anySamplesRendered = dxQueryResult.occlusionPredicate;
7806	break;
7807	case SVGA3D_QUERYTYPE_STREAMOUTPUTSTATS:
7808	case SVGA3D_QUERYTYPE_SOSTATS_STREAM0:
7809	case SVGA3D_QUERYTYPE_SOSTATS_STREAM1:
7810	case SVGA3D_QUERYTYPE_SOSTATS_STREAM2:
7811	case SVGA3D_QUERYTYPE_SOSTATS_STREAM3:
7812	pQueryResult->soStats.numPrimitivesWritten = dxQueryResult.soStatistics.NumPrimitivesWritten;
7813	pQueryResult->soStats.numPrimitivesRequired = dxQueryResult.soStatistics.PrimitivesStorageNeeded;
7814	break;
7815	case SVGA3D_QUERYTYPE_STREAMOVERFLOWPREDICATE:
7816	case SVGA3D_QUERYTYPE_SOP_STREAM0:
7817	case SVGA3D_QUERYTYPE_SOP_STREAM1:
7818	case SVGA3D_QUERYTYPE_SOP_STREAM2:
7819	case SVGA3D_QUERYTYPE_SOP_STREAM3:
7820	pQueryResult->soPred.overflowed = dxQueryResult.soOverflowPredicate;
7821	break;
7822	case SVGA3D_QUERYTYPE_OCCLUSION64:
7823	pQueryResult->occ64.samplesRendered = dxQueryResult.occlusion;
7824	break;
7825	}
7826
7827	*pcbOut = pQueryInfo->cbDataVMSVGA;
7828	return VINF_SUCCESS;
7829	}
7830
7831	static int dxEndQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId,
7832	SVGADXQueryResultUnion pQueryResult, uint32_t pcbOut)
7833	{
7834	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7835	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
7836
7837	DXQUERY *pDXQuery = &pDXContext->pBackendDXContext->paQuery[queryId];
7838	pDXDevice->pImmediateContext->End(pDXQuery->pQuery);
7839
7840	/** @todo Consider issuing QueryEnd and getting data later in FIFO thread loop. */
7841	return dxGetQueryResult(pThisCC, pDXContext, queryId, pQueryResult, pcbOut);
7842	}
7843
7844
7845	static DECLCALLBACK(int) vmsvga3dBackDXEndQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
7846	SVGA3dQueryId queryId, SVGADXQueryResultUnion pQueryResult, uint32_t pcbOut)
7847	{
7848	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7849	RT_NOREF(pBackend);
7850
7851	int rc = dxEndQuery(pThisCC, pDXContext, queryId, pQueryResult, pcbOut);
7852	return rc;
7853	}
7854
7855
7856	static DECLCALLBACK(int) vmsvga3dBackDXSetPredication(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId, uint32_t predicateValue)
7857	{
7858	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7859	RT_NOREF(pBackend);
7860
7861	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7862	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
7863
7864	if (queryId != SVGA3D_INVALID_ID)
7865	{
7866	DEBUG_BREAKPOINT_TEST();
7867	DXQUERY *pDXQuery = &pDXContext->pBackendDXContext->paQuery[queryId];
7868	SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
7869
7870	VGPU10QUERYINFO const *pQueryInfo = dxQueryInfo((SVGA3dQueryType)pEntry->type);
7871	if (!pQueryInfo)
7872	return VERR_INVALID_PARAMETER;
7873
7874	D3D_RELEASE(pDXQuery->pQuery);
7875
7876	D3D11_QUERY_DESC desc;
7877	desc.Query = pQueryInfo->dxQueryType;
7878	desc.MiscFlags = 0;
7879	if (pEntry->flags & SVGA3D_DXQUERY_FLAG_PREDICATEHINT)
7880	desc.MiscFlags \|= (UINT)D3D11_QUERY_MISC_PREDICATEHINT;
7881
7882	HRESULT hr = pDXDevice->pDevice->CreatePredicate(&desc, &pDXQuery->pPredicate);
7883	AssertReturn(SUCCEEDED(hr), VERR_INVALID_STATE);
7884
7885	pDXDevice->pImmediateContext->SetPredication(pDXQuery->pPredicate, RT_BOOL(predicateValue));
7886	}
7887	else
7888	pDXDevice->pImmediateContext->SetPredication(NULL, FALSE);
7889
7890	return VINF_SUCCESS;
7891	}
7892
7893
7894	static DECLCALLBACK(int) vmsvga3dBackDXSetSOTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t cSOTarget, SVGA3dSoTarget const *paSoTarget)
7895	{
7896	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7897	RT_NOREF(pBackend);
7898
7899	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7900	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7901
7902	/* For each paSoTarget[i]:
7903	* If the stream outout buffer object does not exist then create it.
7904	* If the surface has been updated by the guest then update the buffer object.
7905	* Use SOSetTargets to set the buffers.
7906	*/
7907
7908	ID3D11Buffer *paResource[SVGA3D_DX_MAX_SOTARGETS];
7909	UINT paOffset[SVGA3D_DX_MAX_SOTARGETS];
7910
7911	/* Always re-bind all 4 SO targets. They can be NULL. */
7912	for (uint32_t i = 0; i < SVGA3D_DX_MAX_SOTARGETS; ++i)
7913	{
7914	/* Get corresponding resource. Create the buffer if does not yet exist. */
7915	if (i < cSOTarget && paSoTarget[i].sid != SVGA_ID_INVALID)
7916	{
7917	PVMSVGA3DSURFACE pSurface;
7918	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, paSoTarget[i].sid, &pSurface);
7919	AssertRCReturn(rc, rc);
7920
7921	if (pSurface->pBackendSurface == NULL)
7922	{
7923	/* Create the resource. */
7924	rc = vmsvga3dBackSurfaceCreateSoBuffer(pThisCC, pDXContext, pSurface);
7925	AssertRCReturn(rc, rc);
7926	}
7927
7928	/** @todo How paSoTarget[i].sizeInBytes is used? Maybe when the buffer is created? */
7929	paResource[i] = pSurface->pBackendSurface->u.pBuffer;
7930	paOffset[i] = paSoTarget[i].offset;
7931	}
7932	else
7933	{
7934	paResource[i] = NULL;
7935	paOffset[i] = 0;
7936	}
7937	}
7938
7939	pDevice->pImmediateContext->SOSetTargets(SVGA3D_DX_MAX_SOTARGETS, paResource, paOffset);
7940
7941	pDXContext->pBackendDXContext->cSOTarget = cSOTarget;
7942
7943	return VINF_SUCCESS;
7944	}
7945
7946
7947	static DECLCALLBACK(int) vmsvga3dBackDXSetViewports(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t cViewport, SVGA3dViewport const *paViewport)
7948	{
7949	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7950	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7951	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7952
7953	RT_NOREF(pBackend);
7954
7955	/* D3D11_VIEWPORT is identical to SVGA3dViewport. */
7956	D3D11_VIEWPORT pViewports = (D3D11_VIEWPORT )paViewport;
7957
7958	pDevice->pImmediateContext->RSSetViewports(cViewport, pViewports);
7959	return VINF_SUCCESS;
7960	}
7961
7962
7963	static DECLCALLBACK(int) vmsvga3dBackDXSetScissorRects(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t cRect, SVGASignedRect const *paRect)
7964	{
7965	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7966	RT_NOREF(pBackend);
7967
7968	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7969	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7970
7971	/* D3D11_RECT is identical to SVGASignedRect. */
7972	D3D11_RECT pRects = (D3D11_RECT )paRect;
7973
7974	pDevice->pImmediateContext->RSSetScissorRects(cRect, pRects);
7975	return VINF_SUCCESS;
7976	}
7977
7978
7979	static DECLCALLBACK(int) vmsvga3dBackDXClearRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGA3dRGBAFloat const *pRGBA)
7980	{
7981	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7982	RT_NOREF(pBackend);
7983
7984	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7985	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7986
7987	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paRenderTargetView[renderTargetViewId];
7988	if (!pDXView->u.pRenderTargetView)
7989	{
7990	//DEBUG_BREAKPOINT_TEST();
7991	/* (Re-)create the render target view, because a creation of a view is deferred until a draw or a clear call. */
7992	SVGACOTableDXRTViewEntry const *pEntry = &pDXContext->cot.paRTView[renderTargetViewId];
7993	int rc = dxDefineRenderTargetView(pThisCC, pDXContext, renderTargetViewId, pEntry);
7994	AssertRCReturn(rc, rc);
7995	}
7996	pDevice->pImmediateContext->ClearRenderTargetView(pDXView->u.pRenderTargetView, pRGBA->value);
7997	return VINF_SUCCESS;
7998	}
7999
8000
8001	static DECLCALLBACK(int) vmsvga3dBackVBDXClearRenderTargetViewRegion(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId,
8002	SVGA3dRGBAFloat const pColor, uint32_t cRect, SVGASignedRect const paRect)
8003	{
8004	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8005	RT_NOREF(pBackend);
8006
8007	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8008	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8009
8010	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paRenderTargetView[renderTargetViewId];
8011	if (!pDXView->u.pRenderTargetView)
8012	{
8013	/* (Re-)create the render target view, because a creation of a view is deferred until a draw or a clear call. */
8014	SVGACOTableDXRTViewEntry const *pEntry = &pDXContext->cot.paRTView[renderTargetViewId];
8015	int rc = dxDefineRenderTargetView(pThisCC, pDXContext, renderTargetViewId, pEntry);
8016	AssertRCReturn(rc, rc);
8017	}
8018	pDevice->pImmediateContext->ClearView(pDXView->u.pRenderTargetView, pColor->value, (D3D11_RECT *)paRect, cRect);
8019	return VINF_SUCCESS;
8020	}
8021
8022
8023	static DECLCALLBACK(int) vmsvga3dBackDXClearDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t flags, SVGA3dDepthStencilViewId depthStencilViewId, float depth, uint8_t stencil)
8024	{
8025	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8026	RT_NOREF(pBackend);
8027
8028	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8029	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8030
8031	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paDepthStencilView[depthStencilViewId];
8032	if (!pDXView->u.pDepthStencilView)
8033	{
8034	//DEBUG_BREAKPOINT_TEST();
8035	/* (Re-)create the depth stencil view, because a creation of a view is deferred until a draw or a clear call. */
8036	SVGACOTableDXDSViewEntry const *pEntry = &pDXContext->cot.paDSView[depthStencilViewId];
8037	int rc = dxDefineDepthStencilView(pThisCC, pDXContext, depthStencilViewId, pEntry);
8038	AssertRCReturn(rc, rc);
8039	}
8040	pDevice->pImmediateContext->ClearDepthStencilView(pDXView->u.pDepthStencilView, flags, depth, stencil);
8041	return VINF_SUCCESS;
8042	}
8043
8044
8045	static DECLCALLBACK(int) vmsvga3dBackDXPredCopyRegion(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId dstSid, uint32_t dstSubResource, SVGA3dSurfaceId srcSid, uint32_t srcSubResource, SVGA3dCopyBox const *pBox)
8046	{
8047	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8048	RT_NOREF(pBackend);
8049
8050	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8051	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8052
8053	PVMSVGA3DSURFACE pSrcSurface;
8054	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, srcSid, &pSrcSurface);
8055	AssertRCReturn(rc, rc);
8056
8057	PVMSVGA3DSURFACE pDstSurface;
8058	rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, dstSid, &pDstSurface);
8059	AssertRCReturn(rc, rc);
8060
8061	if (pSrcSurface->pBackendSurface == NULL)
8062	{
8063	/* Create the resource. */
8064	if (pSrcSurface->format != SVGA3D_BUFFER)
8065	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pSrcSurface);
8066	else
8067	rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pSrcSurface);
8068	AssertRCReturn(rc, rc);
8069	}
8070
8071	if (pDstSurface->pBackendSurface == NULL)
8072	{
8073	/* Create the resource. */
8074	if (pSrcSurface->format != SVGA3D_BUFFER)
8075	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pDstSurface);
8076	else
8077	rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pDstSurface);
8078	AssertRCReturn(rc, rc);
8079	}
8080
8081	LogFunc(("cid %d: src cid %d%s -> dst cid %d%s\n",
8082	pDXContext->cid, pSrcSurface->idAssociatedContext,
8083	(pSrcSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : "",
8084	pDstSurface->idAssociatedContext,
8085	(pDstSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : ""));
8086
8087	/* Clip the box. */
8088	/** @todo Use [src\|dst]SubResource to index p[Src\|Dst]Surface->paMipmapLevels array directly. */
8089	uint32_t iSrcFace;
8090	uint32_t iSrcMipmap;
8091	vmsvga3dCalcMipmapAndFace(pSrcSurface->cLevels, srcSubResource, &iSrcMipmap, &iSrcFace);
8092
8093	uint32_t iDstFace;
8094	uint32_t iDstMipmap;
8095	vmsvga3dCalcMipmapAndFace(pDstSurface->cLevels, dstSubResource, &iDstMipmap, &iDstFace);
8096
8097	PVMSVGA3DMIPMAPLEVEL pSrcMipLevel;
8098	rc = vmsvga3dMipmapLevel(pSrcSurface, iSrcFace, iSrcMipmap, &pSrcMipLevel);
8099	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
8100
8101	PVMSVGA3DMIPMAPLEVEL pDstMipLevel;
8102	rc = vmsvga3dMipmapLevel(pDstSurface, iDstFace, iDstMipmap, &pDstMipLevel);
8103	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
8104
8105	SVGA3dCopyBox clipBox = *pBox;
8106	vmsvgaR3ClipCopyBox(&pSrcMipLevel->mipmapSize, &pDstMipLevel->mipmapSize, &clipBox);
8107
8108	UINT DstSubresource = dstSubResource;
8109	UINT DstX = clipBox.x;
8110	UINT DstY = clipBox.y;
8111	UINT DstZ = clipBox.z;
8112
8113	UINT SrcSubresource = srcSubResource;
8114	D3D11_BOX SrcBox;
8115	SrcBox.left = clipBox.srcx;
8116	SrcBox.top = clipBox.srcy;
8117	SrcBox.front = clipBox.srcz;
8118	SrcBox.right = clipBox.srcx + clipBox.w;
8119	SrcBox.bottom = clipBox.srcy + clipBox.h;
8120	SrcBox.back = clipBox.srcz + clipBox.d;
8121
8122	ID3D11Resource *pDstResource;
8123	ID3D11Resource *pSrcResource;
8124
8125	pDstResource = dxResource(pThisCC->svga.p3dState, pDstSurface, pDXContext);
8126	pSrcResource = dxResource(pThisCC->svga.p3dState, pSrcSurface, pDXContext);
8127
8128	pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
8129	pSrcResource, SrcSubresource, &SrcBox);
8130
8131	#ifdef DUMP_BITMAPS
8132	SVGA3dSurfaceImageId image;
8133	image.sid = pDstSurface->id;
8134	image.face = 0;
8135	image.mipmap = 0;
8136	VMSVGA3D_MAPPED_SURFACE map;
8137	int rc2 = vmsvga3dSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
8138	if (RT_SUCCESS(rc2))
8139	{
8140	vmsvga3dMapWriteBmpFile(&map, "copyregion-");
8141	vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
8142	}
8143	else
8144	Log(("Map failed %Rrc\n", rc));
8145	#endif
8146
8147	pDstSurface->pBackendSurface->cidDrawing = pDXContext->cid;
8148	return VINF_SUCCESS;
8149	}
8150
8151
8152	static DECLCALLBACK(int) vmsvga3dBackDXPredCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId dstSid, SVGA3dSurfaceId srcSid)
8153	{
8154	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8155	RT_NOREF(pBackend);
8156
8157	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8158	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8159
8160	PVMSVGA3DSURFACE pSrcSurface;
8161	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, srcSid, &pSrcSurface);
8162	AssertRCReturn(rc, rc);
8163
8164	PVMSVGA3DSURFACE pDstSurface;
8165	rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, dstSid, &pDstSurface);
8166	AssertRCReturn(rc, rc);
8167
8168	if (pSrcSurface->pBackendSurface == NULL)
8169	{
8170	/* Create the resource. */
8171	if (pSrcSurface->format != SVGA3D_BUFFER)
8172	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pSrcSurface);
8173	else
8174	rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pSrcSurface);
8175	AssertRCReturn(rc, rc);
8176	}
8177
8178	if (pDstSurface->pBackendSurface == NULL)
8179	{
8180	/* Create the resource. */
8181	if (pSrcSurface->format != SVGA3D_BUFFER)
8182	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pDstSurface);
8183	else
8184	rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pDstSurface);
8185	AssertRCReturn(rc, rc);
8186	}
8187
8188	LogFunc(("cid %d: src cid %d%s -> dst cid %d%s\n",
8189	pDXContext->cid, pSrcSurface->idAssociatedContext,
8190	(pSrcSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : "",
8191	pDstSurface->idAssociatedContext,
8192	(pDstSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : ""));
8193
8194	ID3D11Resource *pDstResource = dxResource(pThisCC->svga.p3dState, pDstSurface, pDXContext);
8195	ID3D11Resource *pSrcResource = dxResource(pThisCC->svga.p3dState, pSrcSurface, pDXContext);
8196
8197	pDevice->pImmediateContext->CopyResource(pDstResource, pSrcResource);
8198
8199	pDstSurface->pBackendSurface->cidDrawing = pDXContext->cid;
8200	return VINF_SUCCESS;
8201	}
8202
8203
8204	#include "shaders/d3d11blitter.hlsl.vs.h"
8205	#include "shaders/d3d11blitter.hlsl.ps.h"
8206
8207	#define HTEST(stmt) \
8208	hr = stmt; \
8209	AssertReturn(SUCCEEDED(hr), hr)
8210
8211
8212	static void BlitRelease(D3D11BLITTER *pBlitter)
8213	{
8214	D3D_RELEASE(pBlitter->pVertexShader);
8215	D3D_RELEASE(pBlitter->pPixelShader);
8216	D3D_RELEASE(pBlitter->pSamplerState);
8217	D3D_RELEASE(pBlitter->pRasterizerState);
8218	D3D_RELEASE(pBlitter->pBlendState);
8219	RT_ZERO(*pBlitter);
8220	}
8221
8222
8223	static HRESULT BlitInit(D3D11BLITTER pBlitter, ID3D11Device pDevice, ID3D11DeviceContext *pImmediateContext)
8224	{
8225	HRESULT hr;
8226
8227	RT_ZERO(*pBlitter);
8228
8229	pBlitter->pDevice = pDevice;
8230	pBlitter->pImmediateContext = pImmediateContext;
8231
8232	HTEST(pBlitter->pDevice->CreateVertexShader(g_vs_blitter, sizeof(g_vs_blitter), NULL, &pBlitter->pVertexShader));
8233	HTEST(pBlitter->pDevice->CreatePixelShader(g_ps_blitter, sizeof(g_ps_blitter), NULL, &pBlitter->pPixelShader));
8234
8235	D3D11_SAMPLER_DESC SamplerDesc;
8236	SamplerDesc.Filter = D3D11_FILTER_ANISOTROPIC;
8237	SamplerDesc.AddressU = D3D11_TEXTURE_ADDRESS_WRAP;
8238	SamplerDesc.AddressV = D3D11_TEXTURE_ADDRESS_WRAP;
8239	SamplerDesc.AddressW = D3D11_TEXTURE_ADDRESS_WRAP;
8240	SamplerDesc.MipLODBias = 0.0f;
8241	SamplerDesc.MaxAnisotropy = 4;
8242	SamplerDesc.ComparisonFunc = D3D11_COMPARISON_ALWAYS;
8243	SamplerDesc.BorderColor[0] = 0.0f;
8244	SamplerDesc.BorderColor[1] = 0.0f;
8245	SamplerDesc.BorderColor[2] = 0.0f;
8246	SamplerDesc.BorderColor[3] = 0.0f;
8247	SamplerDesc.MinLOD = 0.0f;
8248	SamplerDesc.MaxLOD = 0.0f;
8249	HTEST(pBlitter->pDevice->CreateSamplerState(&SamplerDesc, &pBlitter->pSamplerState));
8250
8251	D3D11_RASTERIZER_DESC RasterizerDesc;
8252	RasterizerDesc.FillMode = D3D11_FILL_SOLID;
8253	RasterizerDesc.CullMode = D3D11_CULL_NONE;
8254	RasterizerDesc.FrontCounterClockwise = FALSE;
8255	RasterizerDesc.DepthBias = 0;
8256	RasterizerDesc.DepthBiasClamp = 0.0f;
8257	RasterizerDesc.SlopeScaledDepthBias = 0.0f;
8258	RasterizerDesc.DepthClipEnable = FALSE;
8259	RasterizerDesc.ScissorEnable = FALSE;
8260	RasterizerDesc.MultisampleEnable = FALSE;
8261	RasterizerDesc.AntialiasedLineEnable = FALSE;
8262	HTEST(pBlitter->pDevice->CreateRasterizerState(&RasterizerDesc, &pBlitter->pRasterizerState));
8263
8264	D3D11_BLEND_DESC BlendDesc;
8265	BlendDesc.AlphaToCoverageEnable = FALSE;
8266	BlendDesc.IndependentBlendEnable = FALSE;
8267	for (unsigned i = 0; i < RT_ELEMENTS(BlendDesc.RenderTarget); ++i)
8268	{
8269	BlendDesc.RenderTarget[i].BlendEnable = FALSE;
8270	BlendDesc.RenderTarget[i].SrcBlend = D3D11_BLEND_SRC_COLOR;
8271	BlendDesc.RenderTarget[i].DestBlend = D3D11_BLEND_ZERO;
8272	BlendDesc.RenderTarget[i].BlendOp = D3D11_BLEND_OP_ADD;
8273	BlendDesc.RenderTarget[i].SrcBlendAlpha = D3D11_BLEND_SRC_ALPHA;
8274	BlendDesc.RenderTarget[i].DestBlendAlpha = D3D11_BLEND_ZERO;
8275	BlendDesc.RenderTarget[i].BlendOpAlpha = D3D11_BLEND_OP_ADD;
8276	BlendDesc.RenderTarget[i].RenderTargetWriteMask = 0xF;
8277	}
8278	HTEST(pBlitter->pDevice->CreateBlendState(&BlendDesc, &pBlitter->pBlendState));
8279
8280	return S_OK;
8281	}
8282
8283
8284	static HRESULT BlitFromTexture(D3D11BLITTER pBlitter, ID3D11RenderTargetView pDstRenderTargetView,
8285	float cDstWidth, float cDstHeight, D3D11_RECT const &rectDst,
8286	ID3D11ShaderResourceView *pSrcShaderResourceView)
8287	{
8288	HRESULT hr;
8289
8290	/*
8291	* Save pipeline state.
8292	*/
8293	struct
8294	{
8295	D3D11_PRIMITIVE_TOPOLOGY Topology;
8296	ID3D11InputLayout *pInputLayout;
8297	ID3D11Buffer *pConstantBuffer;
8298	ID3D11VertexShader *pVertexShader;
8299	ID3D11HullShader *pHullShader;
8300	ID3D11DomainShader *pDomainShader;
8301	ID3D11GeometryShader *pGeometryShader;
8302	ID3D11ShaderResourceView *pShaderResourceView;
8303	ID3D11PixelShader *pPixelShader;
8304	ID3D11SamplerState *pSamplerState;
8305	ID3D11RasterizerState *pRasterizerState;
8306	ID3D11BlendState *pBlendState;
8307	FLOAT BlendFactor[4];
8308	UINT SampleMask;
8309	ID3D11RenderTargetView *apRenderTargetView[D3D11_SIMULTANEOUS_RENDER_TARGET_COUNT];
8310	ID3D11DepthStencilView *pDepthStencilView;
8311	UINT NumViewports;
8312	D3D11_VIEWPORT aViewport[D3D11_VIEWPORT_AND_SCISSORRECT_OBJECT_COUNT_PER_PIPELINE];
8313	} SavedState;
8314
8315	pBlitter->pImmediateContext->IAGetPrimitiveTopology(&SavedState.Topology);
8316	pBlitter->pImmediateContext->IAGetInputLayout(&SavedState.pInputLayout);
8317	pBlitter->pImmediateContext->VSGetConstantBuffers(0, 1, &SavedState.pConstantBuffer);
8318	pBlitter->pImmediateContext->VSGetShader(&SavedState.pVertexShader, NULL, NULL);
8319	pBlitter->pImmediateContext->HSGetShader(&SavedState.pHullShader, NULL, NULL);
8320	pBlitter->pImmediateContext->DSGetShader(&SavedState.pDomainShader, NULL, NULL);
8321	pBlitter->pImmediateContext->GSGetShader(&SavedState.pGeometryShader, NULL, NULL);
8322	pBlitter->pImmediateContext->PSGetShaderResources(0, 1, &SavedState.pShaderResourceView);
8323	pBlitter->pImmediateContext->PSGetShader(&SavedState.pPixelShader, NULL, NULL);
8324	pBlitter->pImmediateContext->PSGetSamplers(0, 1, &SavedState.pSamplerState);
8325	pBlitter->pImmediateContext->RSGetState(&SavedState.pRasterizerState);
8326	pBlitter->pImmediateContext->OMGetBlendState(&SavedState.pBlendState, SavedState.BlendFactor, &SavedState.SampleMask);
8327	pBlitter->pImmediateContext->OMGetRenderTargets(RT_ELEMENTS(SavedState.apRenderTargetView), SavedState.apRenderTargetView, &SavedState.pDepthStencilView);
8328	SavedState.NumViewports = RT_ELEMENTS(SavedState.aViewport);
8329	pBlitter->pImmediateContext->RSGetViewports(&SavedState.NumViewports, &SavedState.aViewport[0]);
8330
8331	/*
8332	* Setup pipeline for the blitter.
8333	*/
8334
8335	/* Render target is first.
8336	* If the source texture is bound as a render target, then this call will unbind it
8337	* and allow to use it as the shader resource.
8338	*/
8339	pBlitter->pImmediateContext->OMSetRenderTargets(1, &pDstRenderTargetView, NULL);
8340
8341	/* Input assembler. */
8342	pBlitter->pImmediateContext->IASetInputLayout(NULL);
8343	pBlitter->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP);
8344
8345	/* Constant buffer. */
8346	struct
8347	{
8348	float scaleX;
8349	float scaleY;
8350	float offsetX;
8351	float offsetY;
8352	} VSConstantBuffer;
8353	VSConstantBuffer.scaleX = (float)(rectDst.right - rectDst.left) / cDstWidth;
8354	VSConstantBuffer.scaleY = (float)(rectDst.bottom - rectDst.top) / cDstHeight;
8355	VSConstantBuffer.offsetX = (float)(rectDst.right + rectDst.left) / cDstWidth - 1.0f;
8356	VSConstantBuffer.offsetY = -((float)(rectDst.bottom + rectDst.top) / cDstHeight - 1.0f);
8357
8358	D3D11_SUBRESOURCE_DATA initialData;
8359	initialData.pSysMem = &VSConstantBuffer;
8360	initialData.SysMemPitch = sizeof(VSConstantBuffer);
8361	initialData.SysMemSlicePitch = sizeof(VSConstantBuffer);
8362
8363	D3D11_BUFFER_DESC bd;
8364	RT_ZERO(bd);
8365	bd.ByteWidth = sizeof(VSConstantBuffer);
8366	bd.Usage = D3D11_USAGE_IMMUTABLE;
8367	bd.BindFlags = D3D11_BIND_CONSTANT_BUFFER;
8368
8369	ID3D11Buffer *pConstantBuffer;
8370	HTEST(pBlitter->pDevice->CreateBuffer(&bd, &initialData, &pConstantBuffer));
8371	pBlitter->pImmediateContext->VSSetConstantBuffers(0, 1, &pConstantBuffer);
8372	D3D_RELEASE(pConstantBuffer); /* xSSetConstantBuffers "will hold a reference to the interfaces passed in." */
8373
8374	/* Vertex shader. */
8375	pBlitter->pImmediateContext->VSSetShader(pBlitter->pVertexShader, NULL, 0);
8376
8377	/* Unused shaders. */
8378	pBlitter->pImmediateContext->HSSetShader(NULL, NULL, 0);
8379	pBlitter->pImmediateContext->DSSetShader(NULL, NULL, 0);
8380	pBlitter->pImmediateContext->GSSetShader(NULL, NULL, 0);
8381
8382	/* Shader resource view. */
8383	pBlitter->pImmediateContext->PSSetShaderResources(0, 1, &pSrcShaderResourceView);
8384
8385	/* Pixel shader. */
8386	pBlitter->pImmediateContext->PSSetShader(pBlitter->pPixelShader, NULL, 0);
8387
8388	/* Sampler. */
8389	pBlitter->pImmediateContext->PSSetSamplers(0, 1, &pBlitter->pSamplerState);
8390
8391	/* Rasterizer. */
8392	pBlitter->pImmediateContext->RSSetState(pBlitter->pRasterizerState);
8393
8394	/* Blend state. */
8395	static FLOAT const BlendFactor[4] = { 0.0f, 0.0f, 0.0f, 0.0f };
8396	pBlitter->pImmediateContext->OMSetBlendState(pBlitter->pBlendState, BlendFactor, 0xffffffff);
8397
8398	/* Viewport. */
8399	D3D11_VIEWPORT Viewport;
8400	Viewport.TopLeftX = 0;
8401	Viewport.TopLeftY = 0;
8402	Viewport.Width = cDstWidth;
8403	Viewport.Height = cDstHeight;
8404	Viewport.MinDepth = 0.0f;
8405	Viewport.MaxDepth = 1.0f;
8406	pBlitter->pImmediateContext->RSSetViewports(1, &Viewport);
8407
8408	/* Draw. */
8409	pBlitter->pImmediateContext->Draw(4, 0);
8410
8411	/*
8412	* Restore pipeline state.
8413	*/
8414	pBlitter->pImmediateContext->IASetPrimitiveTopology(SavedState.Topology);
8415	pBlitter->pImmediateContext->IASetInputLayout(SavedState.pInputLayout);
8416	D3D_RELEASE(SavedState.pInputLayout);
8417	pBlitter->pImmediateContext->VSSetConstantBuffers(0, 1, &SavedState.pConstantBuffer);
8418	D3D_RELEASE(SavedState.pConstantBuffer);
8419	pBlitter->pImmediateContext->VSSetShader(SavedState.pVertexShader, NULL, 0);
8420	D3D_RELEASE(SavedState.pVertexShader);
8421
8422	pBlitter->pImmediateContext->HSSetShader(SavedState.pHullShader, NULL, 0);
8423	D3D_RELEASE(SavedState.pHullShader);
8424	pBlitter->pImmediateContext->DSSetShader(SavedState.pDomainShader, NULL, 0);
8425	D3D_RELEASE(SavedState.pDomainShader);
8426	pBlitter->pImmediateContext->GSSetShader(SavedState.pGeometryShader, NULL, 0);
8427	D3D_RELEASE(SavedState.pGeometryShader);
8428
8429	pBlitter->pImmediateContext->PSSetShaderResources(0, 1, &SavedState.pShaderResourceView);
8430	D3D_RELEASE(SavedState.pShaderResourceView);
8431	pBlitter->pImmediateContext->PSSetShader(SavedState.pPixelShader, NULL, 0);
8432	D3D_RELEASE(SavedState.pPixelShader);
8433	pBlitter->pImmediateContext->PSSetSamplers(0, 1, &SavedState.pSamplerState);
8434	D3D_RELEASE(SavedState.pSamplerState);
8435	pBlitter->pImmediateContext->RSSetState(SavedState.pRasterizerState);
8436	D3D_RELEASE(SavedState.pRasterizerState);
8437	pBlitter->pImmediateContext->OMSetBlendState(SavedState.pBlendState, SavedState.BlendFactor, SavedState.SampleMask);
8438	D3D_RELEASE(SavedState.pBlendState);
8439	pBlitter->pImmediateContext->OMSetRenderTargets(RT_ELEMENTS(SavedState.apRenderTargetView), SavedState.apRenderTargetView, SavedState.pDepthStencilView);
8440	D3D_RELEASE_ARRAY(RT_ELEMENTS(SavedState.apRenderTargetView), SavedState.apRenderTargetView);
8441	D3D_RELEASE(SavedState.pDepthStencilView);
8442	pBlitter->pImmediateContext->RSSetViewports(SavedState.NumViewports, &SavedState.aViewport[0]);
8443
8444	return S_OK;
8445	}
8446
8447
8448	static DECLCALLBACK(int) vmsvga3dBackDXPresentBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
8449	SVGA3dSurfaceId dstSid, uint32_t dstSubResource, SVGA3dBox const *pBoxDst,
8450	SVGA3dSurfaceId srcSid, uint32_t srcSubResource, SVGA3dBox const *pBoxSrc,
8451	SVGA3dDXPresentBltMode mode)
8452	{
8453	RT_NOREF(mode);
8454
8455	ASSERT_GUEST_RETURN(pBoxDst->z == 0 && pBoxDst->d == 1, VERR_INVALID_PARAMETER);
8456	ASSERT_GUEST_RETURN(pBoxSrc->z == 0 && pBoxSrc->d == 1, VERR_INVALID_PARAMETER);
8457
8458	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8459	RT_NOREF(pBackend);
8460
8461	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8462	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8463
8464	PVMSVGA3DSURFACE pSrcSurface;
8465	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, srcSid, &pSrcSurface);
8466	AssertRCReturn(rc, rc);
8467
8468	PVMSVGA3DSURFACE pDstSurface;
8469	rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, dstSid, &pDstSurface);
8470	AssertRCReturn(rc, rc);
8471
8472	if (pSrcSurface->pBackendSurface == NULL)
8473	{
8474	/* Create the resource. */
8475	if (pSrcSurface->format != SVGA3D_BUFFER)
8476	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pSrcSurface);
8477	else
8478	rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pSrcSurface);
8479	AssertRCReturn(rc, rc);
8480	}
8481
8482	if (pDstSurface->pBackendSurface == NULL)
8483	{
8484	/* Create the resource. */
8485	if (pSrcSurface->format != SVGA3D_BUFFER)
8486	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pDstSurface);
8487	else
8488	rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pDstSurface);
8489	AssertRCReturn(rc, rc);
8490	}
8491
8492	LogFunc(("cid %d: src cid %d%s -> dst cid %d%s\n",
8493	pDXContext->cid, pSrcSurface->idAssociatedContext,
8494	(pSrcSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : "",
8495	pDstSurface->idAssociatedContext,
8496	(pDstSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : ""));
8497
8498	/* Clip the box. */
8499	/** @todo Use [src\|dst]SubResource to index p[Src\|Dst]Surface->paMipmapLevels array directly. */
8500	uint32_t iSrcFace;
8501	uint32_t iSrcMipmap;
8502	vmsvga3dCalcMipmapAndFace(pSrcSurface->cLevels, srcSubResource, &iSrcMipmap, &iSrcFace);
8503
8504	uint32_t iDstFace;
8505	uint32_t iDstMipmap;
8506	vmsvga3dCalcMipmapAndFace(pDstSurface->cLevels, dstSubResource, &iDstMipmap, &iDstFace);
8507
8508	PVMSVGA3DMIPMAPLEVEL pSrcMipLevel;
8509	rc = vmsvga3dMipmapLevel(pSrcSurface, iSrcFace, iSrcMipmap, &pSrcMipLevel);
8510	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
8511
8512	PVMSVGA3DMIPMAPLEVEL pDstMipLevel;
8513	rc = vmsvga3dMipmapLevel(pDstSurface, iDstFace, iDstMipmap, &pDstMipLevel);
8514	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
8515
8516	SVGA3dBox clipBoxSrc = *pBoxSrc;
8517	vmsvgaR3ClipBox(&pSrcMipLevel->mipmapSize, &clipBoxSrc);
8518
8519	SVGA3dBox clipBoxDst = *pBoxDst;
8520	vmsvgaR3ClipBox(&pDstMipLevel->mipmapSize, &clipBoxDst);
8521
8522	ID3D11Resource *pDstResource = dxResource(pThisCC->svga.p3dState, pDstSurface, pDXContext);
8523	ID3D11Resource *pSrcResource = dxResource(pThisCC->svga.p3dState, pSrcSurface, pDXContext);
8524
8525	D3D11_RENDER_TARGET_VIEW_DESC RTVDesc;
8526	RT_ZERO(RTVDesc);
8527	RTVDesc.Format = vmsvgaDXSurfaceFormat2Dxgi(pDstSurface->format);;
8528	RTVDesc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2D;
8529	RTVDesc.Texture2D.MipSlice = dstSubResource;
8530
8531	ID3D11RenderTargetView *pDstRenderTargetView;
8532	HRESULT hr = pDevice->pDevice->CreateRenderTargetView(pDstResource, &RTVDesc, &pDstRenderTargetView);
8533	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
8534
8535	D3D11_SHADER_RESOURCE_VIEW_DESC SRVDesc;
8536	RT_ZERO(SRVDesc);
8537	SRVDesc.Format = vmsvgaDXSurfaceFormat2Dxgi(pSrcSurface->format);
8538	SRVDesc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE2D;
8539	SRVDesc.Texture2D.MostDetailedMip = srcSubResource;
8540	SRVDesc.Texture2D.MipLevels = 1;
8541
8542	ID3D11ShaderResourceView *pSrcShaderResourceView;
8543	hr = pDevice->pDevice->CreateShaderResourceView(pSrcResource, &SRVDesc, &pSrcShaderResourceView);
8544	AssertReturnStmt(SUCCEEDED(hr), D3D_RELEASE(pDstRenderTargetView), VERR_NOT_SUPPORTED);
8545
8546	D3D11_RECT rectDst;
8547	rectDst.left = pBoxDst->x;
8548	rectDst.top = pBoxDst->y;
8549	rectDst.right = pBoxDst->x + pBoxDst->w;
8550	rectDst.bottom = pBoxDst->y + pBoxDst->h;
8551
8552	BlitFromTexture(&pDevice->Blitter, pDstRenderTargetView, (float)pDstMipLevel->mipmapSize.width, (float)pDstMipLevel->mipmapSize.height,
8553	rectDst, pSrcShaderResourceView);
8554
8555	D3D_RELEASE(pSrcShaderResourceView);
8556	D3D_RELEASE(pDstRenderTargetView);
8557
8558	pDstSurface->pBackendSurface->cidDrawing = pDXContext->cid;
8559	return VINF_SUCCESS;
8560	}
8561
8562
8563	static DECLCALLBACK(int) vmsvga3dBackDXGenMips(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId)
8564	{
8565	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8566	RT_NOREF(pBackend);
8567
8568	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8569	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8570
8571	ID3D11ShaderResourceView *pShaderResourceView = pDXContext->pBackendDXContext->paShaderResourceView[shaderResourceViewId].u.pShaderResourceView;
8572	AssertReturn(pShaderResourceView, VERR_INVALID_STATE);
8573
8574	SVGACOTableDXSRViewEntry const *pSRViewEntry = dxGetShaderResourceViewEntry(pDXContext, shaderResourceViewId);
8575	AssertReturn(pSRViewEntry, VERR_INVALID_STATE);
8576
8577	uint32_t const sid = pSRViewEntry->sid;
8578
8579	PVMSVGA3DSURFACE pSurface;
8580	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
8581	AssertRCReturn(rc, rc);
8582	AssertReturn(pSurface->pBackendSurface, VERR_INVALID_STATE);
8583
8584	pDevice->pImmediateContext->GenerateMips(pShaderResourceView);
8585
8586	pSurface->pBackendSurface->cidDrawing = pDXContext->cid;
8587	return VINF_SUCCESS;
8588	}
8589
8590
8591	static int dxDefineShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId, SVGACOTableDXSRViewEntry const *pEntry)
8592	{
8593	/* Get corresponding resource for pEntry->sid. Create the surface if does not yet exist. */
8594	PVMSVGA3DSURFACE pSurface;
8595	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pEntry->sid, &pSurface);
8596	AssertRCReturn(rc, rc);
8597
8598	ID3D11ShaderResourceView *pShaderResourceView;
8599	DXVIEW *pView = &pDXContext->pBackendDXContext->paShaderResourceView[shaderResourceViewId];
8600	Assert(pView->u.pView == NULL);
8601
8602	if (pSurface->pBackendSurface == NULL)
8603	{
8604	/* Create the actual texture or buffer. */
8605	/** @todo One function to create all resources from surfaces. */
8606	if (pSurface->format != SVGA3D_BUFFER)
8607	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pSurface);
8608	else
8609	rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pSurface);
8610
8611	AssertRCReturn(rc, rc);
8612	}
8613
8614	HRESULT hr = dxShaderResourceViewCreate(pThisCC, pDXContext, pEntry, pSurface, &pShaderResourceView);
8615	AssertReturn(SUCCEEDED(hr), VERR_INVALID_STATE);
8616
8617	return dxViewInit(pView, pSurface, pDXContext, shaderResourceViewId, VMSVGA3D_VIEWTYPE_SHADERRESOURCE, pShaderResourceView);
8618	}
8619
8620
8621	static DECLCALLBACK(int) vmsvga3dBackDXDefineShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId, SVGACOTableDXSRViewEntry const *pEntry)
8622	{
8623	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8624	RT_NOREF(pBackend);
8625
8626	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8627	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8628
8629	/** @todo Probably not necessary because SRVs are defined in setupPipeline. */
8630	return dxDefineShaderResourceView(pThisCC, pDXContext, shaderResourceViewId, pEntry);
8631	}
8632
8633
8634	static DECLCALLBACK(int) vmsvga3dBackDXDestroyShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId)
8635	{
8636	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8637	RT_NOREF(pBackend);
8638
8639	return dxViewDestroy(&pDXContext->pBackendDXContext->paShaderResourceView[shaderResourceViewId]);
8640	}
8641
8642
8643	static int dxDefineRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGACOTableDXRTViewEntry const *pEntry)
8644	{
8645	/* Get corresponding resource for pEntry->sid. Create the surface if does not yet exist. */
8646	PVMSVGA3DSURFACE pSurface;
8647	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pEntry->sid, &pSurface);
8648	AssertRCReturn(rc, rc);
8649
8650	DXVIEW *pView = &pDXContext->pBackendDXContext->paRenderTargetView[renderTargetViewId];
8651	Assert(pView->u.pView == NULL);
8652
8653	if (pSurface->pBackendSurface == NULL)
8654	{
8655	/* Create the actual texture. */
8656	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pSurface);
8657	AssertRCReturn(rc, rc);
8658	}
8659
8660	ID3D11RenderTargetView *pRenderTargetView;
8661	HRESULT hr = dxRenderTargetViewCreate(pThisCC, pDXContext, pEntry, pSurface, &pRenderTargetView);
8662	AssertReturn(SUCCEEDED(hr), VERR_INVALID_STATE);
8663
8664	return dxViewInit(pView, pSurface, pDXContext, renderTargetViewId, VMSVGA3D_VIEWTYPE_RENDERTARGET, pRenderTargetView);
8665	}
8666
8667
8668	static DECLCALLBACK(int) vmsvga3dBackDXDefineRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGACOTableDXRTViewEntry const *pEntry)
8669	{
8670	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8671	RT_NOREF(pBackend);
8672
8673	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8674	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8675
8676	return dxDefineRenderTargetView(pThisCC, pDXContext, renderTargetViewId, pEntry);
8677	}
8678
8679
8680	static DECLCALLBACK(int) vmsvga3dBackDXDestroyRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId)
8681	{
8682	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8683	RT_NOREF(pBackend);
8684
8685	return dxViewDestroy(&pDXContext->pBackendDXContext->paRenderTargetView[renderTargetViewId]);
8686	}
8687
8688
8689	static int dxDefineDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, SVGACOTableDXDSViewEntry const *pEntry)
8690	{
8691	/* Get corresponding resource for pEntry->sid. Create the surface if does not yet exist. */
8692	PVMSVGA3DSURFACE pSurface;
8693	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pEntry->sid, &pSurface);
8694	AssertRCReturn(rc, rc);
8695
8696	DXVIEW *pView = &pDXContext->pBackendDXContext->paDepthStencilView[depthStencilViewId];
8697	Assert(pView->u.pView == NULL);
8698
8699	if (pSurface->pBackendSurface == NULL)
8700	{
8701	/* Create the actual texture. */
8702	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pSurface);
8703	AssertRCReturn(rc, rc);
8704	}
8705
8706	ID3D11DepthStencilView *pDepthStencilView;
8707	HRESULT hr = dxDepthStencilViewCreate(pThisCC, pDXContext, pEntry, pSurface, &pDepthStencilView);
8708	AssertReturn(SUCCEEDED(hr), VERR_INVALID_STATE);
8709
8710	return dxViewInit(pView, pSurface, pDXContext, depthStencilViewId, VMSVGA3D_VIEWTYPE_DEPTHSTENCIL, pDepthStencilView);
8711	}
8712
8713	static DECLCALLBACK(int) vmsvga3dBackDXDefineDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, SVGACOTableDXDSViewEntry const *pEntry)
8714	{
8715	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8716	RT_NOREF(pBackend);
8717
8718	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8719	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8720
8721	return dxDefineDepthStencilView(pThisCC, pDXContext, depthStencilViewId, pEntry);
8722	}
8723
8724
8725	static DECLCALLBACK(int) vmsvga3dBackDXDestroyDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId)
8726	{
8727	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8728	RT_NOREF(pBackend);
8729
8730	return dxViewDestroy(&pDXContext->pBackendDXContext->paDepthStencilView[depthStencilViewId]);
8731	}
8732
8733
8734	static int dxDefineElementLayout(PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId, SVGACOTableDXElementLayoutEntry const *pEntry)
8735	{
8736	DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
8737	D3D_RELEASE(pDXElementLayout->pElementLayout);
8738	pDXElementLayout->cElementDesc = 0;
8739	RT_ZERO(pDXElementLayout->aElementDesc);
8740
8741	RT_NOREF(pEntry);
8742
8743	return VINF_SUCCESS;
8744	}
8745
8746
8747	static int dxDestroyElementLayout(DXELEMENTLAYOUT *pDXElementLayout)
8748	{
8749	D3D_RELEASE(pDXElementLayout->pElementLayout);
8750	pDXElementLayout->cElementDesc = 0;
8751	RT_ZERO(pDXElementLayout->aElementDesc);
8752	return VINF_SUCCESS;
8753	}
8754
8755
8756	static DECLCALLBACK(int) vmsvga3dBackDXDefineElementLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId, SVGACOTableDXElementLayoutEntry const *pEntry)
8757	{
8758	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8759	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8760	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8761
8762	RT_NOREF(pBackend);
8763
8764	/* Not much can be done here because ID3D11Device::CreateInputLayout requires
8765	* a pShaderBytecodeWithInputSignature which is not known at this moment.
8766	* InputLayout object will be created in setupPipeline.
8767	*/
8768
8769	Assert(elementLayoutId == pEntry->elid);
8770
8771	return dxDefineElementLayout(pDXContext, elementLayoutId, pEntry);
8772	}
8773
8774
8775	static DECLCALLBACK(int) vmsvga3dBackDXDestroyElementLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId)
8776	{
8777	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8778	RT_NOREF(pBackend);
8779
8780	DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
8781	dxDestroyElementLayout(pDXElementLayout);
8782
8783	return VINF_SUCCESS;
8784	}
8785
8786
8787	static int dxDefineBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
8788	SVGA3dBlendStateId blendId, SVGACOTableDXBlendStateEntry const *pEntry)
8789	{
8790	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8791	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8792
8793	HRESULT hr = dxBlendStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papBlendState[blendId]);
8794	if (SUCCEEDED(hr))
8795	return VINF_SUCCESS;
8796	return VERR_INVALID_STATE;
8797	}
8798
8799
8800	static DECLCALLBACK(int) vmsvga3dBackDXDefineBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
8801	SVGA3dBlendStateId blendId, SVGACOTableDXBlendStateEntry const *pEntry)
8802	{
8803	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8804	RT_NOREF(pBackend);
8805
8806	return dxDefineBlendState(pThisCC, pDXContext, blendId, pEntry);
8807	}
8808
8809
8810	static DECLCALLBACK(int) vmsvga3dBackDXDestroyBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dBlendStateId blendId)
8811	{
8812	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8813	RT_NOREF(pBackend);
8814
8815	D3D_RELEASE(pDXContext->pBackendDXContext->papBlendState[blendId]);
8816	return VINF_SUCCESS;
8817	}
8818
8819
8820	static int dxDefineDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, SVGACOTableDXDepthStencilEntry const *pEntry)
8821	{
8822	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8823	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8824
8825	HRESULT hr = dxDepthStencilStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papDepthStencilState[depthStencilId]);
8826	if (SUCCEEDED(hr))
8827	return VINF_SUCCESS;
8828	return VERR_INVALID_STATE;
8829	}
8830
8831
8832	static DECLCALLBACK(int) vmsvga3dBackDXDefineDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, SVGACOTableDXDepthStencilEntry const *pEntry)
8833	{
8834	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8835	RT_NOREF(pBackend);
8836
8837	return dxDefineDepthStencilState(pThisCC, pDXContext, depthStencilId, pEntry);
8838	}
8839
8840
8841	static DECLCALLBACK(int) vmsvga3dBackDXDestroyDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId)
8842	{
8843	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8844	RT_NOREF(pBackend);
8845
8846	D3D_RELEASE(pDXContext->pBackendDXContext->papDepthStencilState[depthStencilId]);
8847	return VINF_SUCCESS;
8848	}
8849
8850
8851	static int dxDefineRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId, SVGACOTableDXRasterizerStateEntry const *pEntry)
8852	{
8853	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8854	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8855
8856	HRESULT hr = dxRasterizerStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papRasterizerState[rasterizerId]);
8857	if (SUCCEEDED(hr))
8858	return VINF_SUCCESS;
8859	return VERR_INVALID_STATE;
8860	}
8861
8862
8863	static DECLCALLBACK(int) vmsvga3dBackDXDefineRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId, SVGACOTableDXRasterizerStateEntry const *pEntry)
8864	{
8865	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8866	RT_NOREF(pBackend);
8867
8868	return dxDefineRasterizerState(pThisCC, pDXContext, rasterizerId, pEntry);
8869	}
8870
8871
8872	static DECLCALLBACK(int) vmsvga3dBackDXDestroyRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId)
8873	{
8874	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8875	RT_NOREF(pBackend);
8876
8877	D3D_RELEASE(pDXContext->pBackendDXContext->papRasterizerState[rasterizerId]);
8878	return VINF_SUCCESS;
8879	}
8880
8881
8882	static int dxDefineSamplerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSamplerId samplerId, SVGACOTableDXSamplerEntry const *pEntry)
8883	{
8884	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8885	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8886
8887	HRESULT hr = dxSamplerStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papSamplerState[samplerId]);
8888	if (SUCCEEDED(hr))
8889	return VINF_SUCCESS;
8890	return VERR_INVALID_STATE;
8891	}
8892
8893
8894	static DECLCALLBACK(int) vmsvga3dBackDXDefineSamplerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSamplerId samplerId, SVGACOTableDXSamplerEntry const *pEntry)
8895	{
8896	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8897	RT_NOREF(pBackend);
8898
8899	return dxDefineSamplerState(pThisCC, pDXContext, samplerId, pEntry);
8900	}
8901
8902
8903	static DECLCALLBACK(int) vmsvga3dBackDXDestroySamplerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSamplerId samplerId)
8904	{
8905	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8906	RT_NOREF(pBackend);
8907
8908	D3D_RELEASE(pDXContext->pBackendDXContext->papSamplerState[samplerId]);
8909	return VINF_SUCCESS;
8910	}
8911
8912
8913	static int dxDefineShader(PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderId shaderId, SVGACOTableDXShaderEntry const *pEntry)
8914	{
8915	/** @todo A common approach for creation of COTable backend objects: runtime, empty DX COTable, live DX COTable. */
8916	DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[shaderId];
8917	Assert(pDXShader->enmShaderType == SVGA3D_SHADERTYPE_INVALID);
8918
8919	/* Init the backend shader structure, if the shader has not been created yet. */
8920	pDXShader->enmShaderType = pEntry->type;
8921	pDXShader->pShader = NULL;
8922	pDXShader->soid = SVGA_ID_INVALID;
8923
8924	return VINF_SUCCESS;
8925	}
8926
8927
8928	static int dxDestroyShader(DXSHADER *pDXShader)
8929	{
8930	pDXShader->enmShaderType = SVGA3D_SHADERTYPE_INVALID;
8931	DXShaderFree(&pDXShader->shaderInfo);
8932	D3D_RELEASE(pDXShader->pShader);
8933	RTMemFree(pDXShader->pvDXBC);
8934	pDXShader->pvDXBC = NULL;
8935	pDXShader->cbDXBC = 0;
8936	pDXShader->soid = SVGA_ID_INVALID;
8937	return VINF_SUCCESS;
8938	}
8939
8940
8941	static DECLCALLBACK(int) vmsvga3dBackDXDefineShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderId shaderId, SVGACOTableDXShaderEntry const *pEntry)
8942	{
8943	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8944	RT_NOREF(pBackend);
8945
8946	return dxDefineShader(pDXContext, shaderId, pEntry);
8947	}
8948
8949
8950	static DECLCALLBACK(int) vmsvga3dBackDXDestroyShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderId shaderId)
8951	{
8952	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8953	RT_NOREF(pBackend);
8954
8955	DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[shaderId];
8956	dxDestroyShader(pDXShader);
8957
8958	return VINF_SUCCESS;
8959	}
8960
8961
8962	static DECLCALLBACK(int) vmsvga3dBackDXBindShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderId shaderId, DXShaderInfo const *pShaderInfo)
8963	{
8964	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8965	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8966	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8967
8968	RT_NOREF(pBackend);
8969
8970	DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[shaderId];
8971	if (pDXShader->pvDXBC)
8972	{
8973	/* New DXBC code and new shader must be created. */
8974	D3D_RELEASE(pDXShader->pShader);
8975	RTMemFree(pDXShader->pvDXBC);
8976	pDXShader->pvDXBC = NULL;
8977	pDXShader->cbDXBC = 0;
8978	}
8979
8980	pDXShader->shaderInfo = *pShaderInfo;
8981
8982	return VINF_SUCCESS;
8983	}
8984
8985
8986	static DECLCALLBACK(int) vmsvga3dBackDXDefineStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dStreamOutputId soid, SVGACOTableDXStreamOutputEntry const *pEntry)
8987	{
8988	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8989	RT_NOREF(pBackend);
8990
8991	DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[soid];
8992	dxDestroyStreamOutput(pDXStreamOutput);
8993
8994	RT_NOREF(pEntry);
8995	return VINF_SUCCESS;
8996	}
8997
8998
8999	static DECLCALLBACK(int) vmsvga3dBackDXDestroyStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dStreamOutputId soid)
9000	{
9001	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9002	RT_NOREF(pBackend);
9003
9004	DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[soid];
9005	dxDestroyStreamOutput(pDXStreamOutput);
9006
9007	return VINF_SUCCESS;
9008	}
9009
9010
9011	static DECLCALLBACK(int) vmsvga3dBackDXSetStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dStreamOutputId soid)
9012	{
9013	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9014	RT_NOREF(pBackend, pDXContext, soid);
9015
9016	return VINF_SUCCESS;
9017	}
9018
9019
9020	static int dxCOTableRealloc(void *ppvCOTable, uint32_t pcCOTable, uint32_t cbEntry, uint32_t cEntries, uint32_t cValidEntries)
9021	{
9022	uint32_t const cCOTableCurrent = *pcCOTable;
9023
9024	if (*pcCOTable != cEntries)
9025	{
9026	/* Grow/shrink the array. */
9027	if (cEntries)
9028	{
9029	void pvNew = RTMemRealloc(ppvCOTable, cEntries * cbEntry);
9030	AssertReturn(pvNew, VERR_NO_MEMORY);
9031	*ppvCOTable = pvNew;
9032	}
9033	else
9034	{
9035	RTMemFree(*ppvCOTable);
9036	*ppvCOTable = NULL;
9037	}
9038
9039	*pcCOTable = cEntries;
9040	}
9041
9042	if (*ppvCOTable)
9043	{
9044	uint32_t const cEntriesToKeep = RT_MIN(cCOTableCurrent, cValidEntries);
9045	memset((uint8_t )(ppvCOTable) + cEntriesToKeep * cbEntry, 0, (cEntries - cEntriesToKeep) * cbEntry);
9046	}
9047
9048	return VINF_SUCCESS;
9049	}
9050
9051	static DECLCALLBACK(int) vmsvga3dBackDXSetCOTable(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableType type, uint32_t cValidEntries)
9052	{
9053	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9054	RT_NOREF(pBackend);
9055
9056	VMSVGA3DBACKENDDXCONTEXT *pBackendDXContext = pDXContext->pBackendDXContext;
9057
9058	int rc = VINF_SUCCESS;
9059
9060	/*
9061	* 1) Release current backend table, if exists;
9062	* 2) Reallocate memory for the new backend table;
9063	* 3) If cValidEntries is not zero, then re-define corresponding backend table elements.
9064	*/
9065	switch (type)
9066	{
9067	case SVGA_COTABLE_RTVIEW:
9068	/* Clear current entries. */
9069	if (pBackendDXContext->paRenderTargetView)
9070	{
9071	for (uint32_t i = 0; i < pBackendDXContext->cRenderTargetView; ++i)
9072	{
9073	DXVIEW *pDXView = &pBackendDXContext->paRenderTargetView[i];
9074	if (i < cValidEntries)
9075	dxViewRemoveFromList(pDXView); /* Remove from list because DXVIEW array will be reallocated. */
9076	else
9077	dxViewDestroy(pDXView);
9078	}
9079	}
9080
9081	rc = dxCOTableRealloc((void **)&pBackendDXContext->paRenderTargetView, &pBackendDXContext->cRenderTargetView,
9082	sizeof(pBackendDXContext->paRenderTargetView[0]), pDXContext->cot.cRTView, cValidEntries);
9083	AssertRCBreak(rc);
9084
9085	for (uint32_t i = 0; i < cValidEntries; ++i)
9086	{
9087	SVGACOTableDXRTViewEntry const *pEntry = &pDXContext->cot.paRTView[i];
9088	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9089	continue; /* Skip uninitialized entry. */
9090
9091	/* Define views which were not defined yet in backend. */
9092	DXVIEW *pDXView = &pBackendDXContext->paRenderTargetView[i];
9093	/** @todo Verify that the pEntry content still corresponds to the view. */
9094	if (pDXView->u.pView)
9095	dxViewAddToList(pThisCC, pDXView);
9096	else if (pDXView->enmViewType == VMSVGA3D_VIEWTYPE_NONE)
9097	dxDefineRenderTargetView(pThisCC, pDXContext, i, pEntry);
9098	}
9099	break;
9100	case SVGA_COTABLE_DSVIEW:
9101	if (pBackendDXContext->paDepthStencilView)
9102	{
9103	for (uint32_t i = 0; i < pBackendDXContext->cDepthStencilView; ++i)
9104	{
9105	DXVIEW *pDXView = &pBackendDXContext->paDepthStencilView[i];
9106	if (i < cValidEntries)
9107	dxViewRemoveFromList(pDXView); /* Remove from list because DXVIEW array will be reallocated. */
9108	else
9109	dxViewDestroy(pDXView);
9110	}
9111	}
9112
9113	rc = dxCOTableRealloc((void **)&pBackendDXContext->paDepthStencilView, &pBackendDXContext->cDepthStencilView,
9114	sizeof(pBackendDXContext->paDepthStencilView[0]), pDXContext->cot.cDSView, cValidEntries);
9115	AssertRCBreak(rc);
9116
9117	for (uint32_t i = 0; i < cValidEntries; ++i)
9118	{
9119	SVGACOTableDXDSViewEntry const *pEntry = &pDXContext->cot.paDSView[i];
9120	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9121	continue; /* Skip uninitialized entry. */
9122
9123	/* Define views which were not defined yet in backend. */
9124	DXVIEW *pDXView = &pBackendDXContext->paDepthStencilView[i];
9125	/** @todo Verify that the pEntry content still corresponds to the view. */
9126	if (pDXView->u.pView)
9127	dxViewAddToList(pThisCC, pDXView);
9128	else if (pDXView->enmViewType == VMSVGA3D_VIEWTYPE_NONE)
9129	dxDefineDepthStencilView(pThisCC, pDXContext, i, pEntry);
9130	}
9131	break;
9132	case SVGA_COTABLE_SRVIEW:
9133	if (pBackendDXContext->paShaderResourceView)
9134	{
9135	for (uint32_t i = 0; i < pBackendDXContext->cShaderResourceView; ++i)
9136	{
9137	DXVIEW *pDXView = &pBackendDXContext->paShaderResourceView[i];
9138	if (i < cValidEntries)
9139	dxViewRemoveFromList(pDXView); /* Remove from list because DXVIEW array will be reallocated. */
9140	else
9141	dxViewDestroy(pDXView);
9142	}
9143	}
9144
9145	rc = dxCOTableRealloc((void **)&pBackendDXContext->paShaderResourceView, &pBackendDXContext->cShaderResourceView,
9146	sizeof(pBackendDXContext->paShaderResourceView[0]), pDXContext->cot.cSRView, cValidEntries);
9147	AssertRCBreak(rc);
9148
9149	for (uint32_t i = 0; i < cValidEntries; ++i)
9150	{
9151	SVGACOTableDXSRViewEntry const *pEntry = &pDXContext->cot.paSRView[i];
9152	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9153	continue; /* Skip uninitialized entry. */
9154
9155	/* Define views which were not defined yet in backend. */
9156	DXVIEW *pDXView = &pBackendDXContext->paShaderResourceView[i];
9157	/** @todo Verify that the pEntry content still corresponds to the view. */
9158	if (pDXView->u.pView)
9159	dxViewAddToList(pThisCC, pDXView);
9160	else if (pDXView->enmViewType == VMSVGA3D_VIEWTYPE_NONE)
9161	dxDefineShaderResourceView(pThisCC, pDXContext, i, pEntry);
9162	}
9163	break;
9164	case SVGA_COTABLE_ELEMENTLAYOUT:
9165	if (pBackendDXContext->paElementLayout)
9166	{
9167	for (uint32_t i = cValidEntries; i < pBackendDXContext->cElementLayout; ++i)
9168	D3D_RELEASE(pBackendDXContext->paElementLayout[i].pElementLayout);
9169	}
9170
9171	rc = dxCOTableRealloc((void **)&pBackendDXContext->paElementLayout, &pBackendDXContext->cElementLayout,
9172	sizeof(pBackendDXContext->paElementLayout[0]), pDXContext->cot.cElementLayout, cValidEntries);
9173	AssertRCBreak(rc);
9174
9175	for (uint32_t i = 0; i < cValidEntries; ++i)
9176	{
9177	SVGACOTableDXElementLayoutEntry const *pEntry = &pDXContext->cot.paElementLayout[i];
9178	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9179	continue; /* Skip uninitialized entry. */
9180
9181	dxDefineElementLayout(pDXContext, i, pEntry);
9182	}
9183	break;
9184	case SVGA_COTABLE_BLENDSTATE:
9185	if (pBackendDXContext->papBlendState)
9186	{
9187	for (uint32_t i = cValidEntries; i < pBackendDXContext->cBlendState; ++i)
9188	D3D_RELEASE(pBackendDXContext->papBlendState[i]);
9189	}
9190
9191	rc = dxCOTableRealloc((void **)&pBackendDXContext->papBlendState, &pBackendDXContext->cBlendState,
9192	sizeof(pBackendDXContext->papBlendState[0]), pDXContext->cot.cBlendState, cValidEntries);
9193	AssertRCBreak(rc);
9194
9195	for (uint32_t i = 0; i < cValidEntries; ++i)
9196	{
9197	SVGACOTableDXBlendStateEntry const *pEntry = &pDXContext->cot.paBlendState[i];
9198	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9199	continue; /* Skip uninitialized entry. */
9200
9201	dxDefineBlendState(pThisCC, pDXContext, i, pEntry);
9202	}
9203	break;
9204	case SVGA_COTABLE_DEPTHSTENCIL:
9205	if (pBackendDXContext->papDepthStencilState)
9206	{
9207	for (uint32_t i = cValidEntries; i < pBackendDXContext->cDepthStencilState; ++i)
9208	D3D_RELEASE(pBackendDXContext->papDepthStencilState[i]);
9209	}
9210
9211	rc = dxCOTableRealloc((void **)&pBackendDXContext->papDepthStencilState, &pBackendDXContext->cDepthStencilState,
9212	sizeof(pBackendDXContext->papDepthStencilState[0]), pDXContext->cot.cDepthStencil, cValidEntries);
9213	AssertRCBreak(rc);
9214
9215	for (uint32_t i = 0; i < cValidEntries; ++i)
9216	{
9217	SVGACOTableDXDepthStencilEntry const *pEntry = &pDXContext->cot.paDepthStencil[i];
9218	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9219	continue; /* Skip uninitialized entry. */
9220
9221	dxDefineDepthStencilState(pThisCC, pDXContext, i, pEntry);
9222	}
9223	break;
9224	case SVGA_COTABLE_RASTERIZERSTATE:
9225	if (pBackendDXContext->papRasterizerState)
9226	{
9227	for (uint32_t i = cValidEntries; i < pBackendDXContext->cRasterizerState; ++i)
9228	D3D_RELEASE(pBackendDXContext->papRasterizerState[i]);
9229	}
9230
9231	rc = dxCOTableRealloc((void **)&pBackendDXContext->papRasterizerState, &pBackendDXContext->cRasterizerState,
9232	sizeof(pBackendDXContext->papRasterizerState[0]), pDXContext->cot.cRasterizerState, cValidEntries);
9233	AssertRCBreak(rc);
9234
9235	for (uint32_t i = 0; i < cValidEntries; ++i)
9236	{
9237	SVGACOTableDXRasterizerStateEntry const *pEntry = &pDXContext->cot.paRasterizerState[i];
9238	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9239	continue; /* Skip uninitialized entry. */
9240
9241	dxDefineRasterizerState(pThisCC, pDXContext, i, pEntry);
9242	}
9243	break;
9244	case SVGA_COTABLE_SAMPLER:
9245	if (pBackendDXContext->papSamplerState)
9246	{
9247	for (uint32_t i = cValidEntries; i < pBackendDXContext->cSamplerState; ++i)
9248	D3D_RELEASE(pBackendDXContext->papSamplerState[i]);
9249	}
9250
9251	rc = dxCOTableRealloc((void **)&pBackendDXContext->papSamplerState, &pBackendDXContext->cSamplerState,
9252	sizeof(pBackendDXContext->papSamplerState[0]), pDXContext->cot.cSampler, cValidEntries);
9253	AssertRCBreak(rc);
9254
9255	for (uint32_t i = 0; i < cValidEntries; ++i)
9256	{
9257	SVGACOTableDXSamplerEntry const *pEntry = &pDXContext->cot.paSampler[i];
9258	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9259	continue; /* Skip uninitialized entry. */
9260
9261	dxDefineSamplerState(pThisCC, pDXContext, i, pEntry);
9262	}
9263	break;
9264	case SVGA_COTABLE_STREAMOUTPUT:
9265	if (pBackendDXContext->paStreamOutput)
9266	{
9267	for (uint32_t i = cValidEntries; i < pBackendDXContext->cStreamOutput; ++i)
9268	dxDestroyStreamOutput(&pBackendDXContext->paStreamOutput[i]);
9269	}
9270
9271	rc = dxCOTableRealloc((void **)&pBackendDXContext->paStreamOutput, &pBackendDXContext->cStreamOutput,
9272	sizeof(pBackendDXContext->paStreamOutput[0]), pDXContext->cot.cStreamOutput, cValidEntries);
9273	AssertRCBreak(rc);
9274
9275	for (uint32_t i = 0; i < cValidEntries; ++i)
9276	{
9277	SVGACOTableDXStreamOutputEntry const *pEntry = &pDXContext->cot.paStreamOutput[i];
9278	/** @todo The caller must verify the COTable content using same rules as when a new entry is defined. */
9279	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9280	continue; /* Skip uninitialized entry. */
9281
9282	/* Reset the stream output backend data. It will be re-created when a GS shader with this streamoutput
9283	* will be set in setupPipeline.
9284	*/
9285	DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[i];
9286	dxDestroyStreamOutput(pDXStreamOutput);
9287	}
9288	break;
9289	case SVGA_COTABLE_DXQUERY:
9290	if (pBackendDXContext->paQuery)
9291	{
9292	/* Destroy the no longer used entries. */
9293	for (uint32_t i = cValidEntries; i < pBackendDXContext->cQuery; ++i)
9294	dxDestroyQuery(&pBackendDXContext->paQuery[i]);
9295	}
9296
9297	rc = dxCOTableRealloc((void **)&pBackendDXContext->paQuery, &pBackendDXContext->cQuery,
9298	sizeof(pBackendDXContext->paQuery[0]), pDXContext->cot.cQuery, cValidEntries);
9299	AssertRCBreak(rc);
9300
9301	for (uint32_t i = 0; i < cValidEntries; ++i)
9302	{
9303	SVGACOTableDXQueryEntry const *pEntry = &pDXContext->cot.paQuery[i];
9304	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9305	continue; /* Skip uninitialized entry. */
9306
9307	/* Define queries which were not defined yet in backend. */
9308	DXQUERY *pDXQuery = &pBackendDXContext->paQuery[i];
9309	if ( pEntry->type != SVGA3D_QUERYTYPE_INVALID
9310	&& pDXQuery->pQuery == NULL)
9311	dxDefineQuery(pThisCC, pDXContext, i, pEntry);
9312	else
9313	Assert(pEntry->type == SVGA3D_QUERYTYPE_INVALID \|\| pDXQuery->pQuery);
9314	}
9315	break;
9316	case SVGA_COTABLE_DXSHADER:
9317	if (pBackendDXContext->paShader)
9318	{
9319	/* Destroy the no longer used entries. */
9320	for (uint32_t i = cValidEntries; i < pBackendDXContext->cShader; ++i)
9321	dxDestroyShader(&pBackendDXContext->paShader[i]);
9322	}
9323
9324	rc = dxCOTableRealloc((void **)&pBackendDXContext->paShader, &pBackendDXContext->cShader,
9325	sizeof(pBackendDXContext->paShader[0]), pDXContext->cot.cShader, cValidEntries);
9326	AssertRCBreak(rc);
9327
9328	for (uint32_t i = 0; i < cValidEntries; ++i)
9329	{
9330	SVGACOTableDXShaderEntry const *pEntry = &pDXContext->cot.paShader[i];
9331	/** @todo The caller must verify the COTable content using same rules as when a new entry is defined. */
9332	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9333	continue; /* Skip uninitialized entry. */
9334
9335	/* Define shaders which were not defined yet in backend. */
9336	DXSHADER *pDXShader = &pBackendDXContext->paShader[i];
9337	if ( pEntry->type != SVGA3D_SHADERTYPE_INVALID
9338	&& pDXShader->enmShaderType == SVGA3D_SHADERTYPE_INVALID)
9339	dxDefineShader(pDXContext, i, pEntry);
9340	else
9341	Assert(pEntry->type == pDXShader->enmShaderType);
9342
9343	}
9344	break;
9345	case SVGA_COTABLE_UAVIEW:
9346	if (pBackendDXContext->paUnorderedAccessView)
9347	{
9348	for (uint32_t i = 0; i < pBackendDXContext->cUnorderedAccessView; ++i)
9349	{
9350	DXVIEW *pDXView = &pBackendDXContext->paUnorderedAccessView[i];
9351	if (i < cValidEntries)
9352	dxViewRemoveFromList(pDXView); /* Remove from list because DXVIEW array will be reallocated. */
9353	else
9354	dxViewDestroy(pDXView);
9355	}
9356	}
9357
9358	rc = dxCOTableRealloc((void **)&pBackendDXContext->paUnorderedAccessView, &pBackendDXContext->cUnorderedAccessView,
9359	sizeof(pBackendDXContext->paUnorderedAccessView[0]), pDXContext->cot.cUAView, cValidEntries);
9360	AssertRCBreak(rc);
9361
9362	for (uint32_t i = 0; i < cValidEntries; ++i)
9363	{
9364	SVGACOTableDXUAViewEntry const *pEntry = &pDXContext->cot.paUAView[i];
9365	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9366	continue; /* Skip uninitialized entry. */
9367
9368	/* Define views which were not defined yet in backend. */
9369	DXVIEW *pDXView = &pBackendDXContext->paUnorderedAccessView[i];
9370	/** @todo Verify that the pEntry content still corresponds to the view. */
9371	if (pDXView->u.pView)
9372	dxViewAddToList(pThisCC, pDXView);
9373	else if (pDXView->enmViewType == VMSVGA3D_VIEWTYPE_NONE)
9374	dxDefineUnorderedAccessView(pThisCC, pDXContext, i, pEntry);
9375	}
9376	break;
9377	case SVGA_COTABLE_MAX: break; /* Compiler warning */
9378	}
9379	return rc;
9380	}
9381
9382
9383	static DECLCALLBACK(int) vmsvga3dBackDXBufferCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9384	{
9385	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9386
9387	RT_NOREF(pBackend, pDXContext);
9388	AssertFailed(); /** @todo Implement */
9389	return VERR_NOT_IMPLEMENTED;
9390	}
9391
9392
9393	static DECLCALLBACK(int) vmsvga3dBackDXSurfaceCopyAndReadback(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9394	{
9395	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9396
9397	RT_NOREF(pBackend, pDXContext);
9398	AssertFailed(); /** @todo Implement */
9399	return VERR_NOT_IMPLEMENTED;
9400	}
9401
9402
9403	static DECLCALLBACK(int) vmsvga3dBackDXMoveQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9404	{
9405	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9406
9407	RT_NOREF(pBackend, pDXContext);
9408	AssertFailed(); /** @todo Implement */
9409	return VERR_NOT_IMPLEMENTED;
9410	}
9411
9412
9413	static DECLCALLBACK(int) vmsvga3dBackDXBindAllShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9414	{
9415	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9416
9417	RT_NOREF(pBackend, pDXContext);
9418	AssertFailed(); /** @todo Implement */
9419	return VERR_NOT_IMPLEMENTED;
9420	}
9421
9422
9423	static DECLCALLBACK(int) vmsvga3dBackDXHint(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9424	{
9425	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9426
9427	RT_NOREF(pBackend, pDXContext);
9428	AssertFailed(); /** @todo Implement */
9429	return VERR_NOT_IMPLEMENTED;
9430	}
9431
9432
9433	static DECLCALLBACK(int) vmsvga3dBackDXBufferUpdate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9434	{
9435	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9436
9437	RT_NOREF(pBackend, pDXContext);
9438	AssertFailed(); /** @todo Implement */
9439	return VERR_NOT_IMPLEMENTED;
9440	}
9441
9442
9443	static DECLCALLBACK(int) vmsvga3dBackDXCondBindAllShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9444	{
9445	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9446
9447	RT_NOREF(pBackend, pDXContext);
9448	AssertFailed(); /** @todo Implement */
9449	return VERR_NOT_IMPLEMENTED;
9450	}
9451
9452
9453	static DECLCALLBACK(int) vmsvga3dBackScreenCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9454	{
9455	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9456
9457	RT_NOREF(pBackend, pDXContext);
9458	AssertFailed(); /** @todo Implement */
9459	return VERR_NOT_IMPLEMENTED;
9460	}
9461
9462
9463	static DECLCALLBACK(int) vmsvga3dBackIntraSurfaceCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceImageId const &surface, SVGA3dCopyBox const &box)
9464	{
9465	RT_NOREF(pDXContext);
9466
9467	LogFunc(("sid %u\n", surface.sid));
9468
9469	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
9470	AssertReturn(pState, VERR_INVALID_STATE);
9471
9472	PVMSVGA3DBACKEND pBackend = pState->pBackend;
9473
9474	PVMSVGA3DSURFACE pSurface;
9475	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, surface.sid, &pSurface);
9476	AssertRCReturn(rc, rc);
9477
9478	PVMSVGA3DMIPMAPLEVEL pMipLevel;
9479	rc = vmsvga3dMipmapLevel(pSurface, surface.face, surface.mipmap, &pMipLevel);
9480	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
9481
9482	/* Clip the box. */
9483	SVGA3dCopyBox clipBox = box;
9484	vmsvgaR3ClipCopyBox(&pMipLevel->mipmapSize, &pMipLevel->mipmapSize, &clipBox);
9485
9486	LogFunc(("surface%s cid %d\n",
9487	pSurface->pBackendSurface ? "" : " sysmem",
9488	pSurface ? pSurface->idAssociatedContext : SVGA_ID_INVALID));
9489
9490	if (pSurface->pBackendSurface)
9491	{
9492	/* Surface -> Surface. */
9493	DXDEVICE *pDXDevice = &pBackend->dxDevice;
9494
9495	UINT DstSubresource = vmsvga3dCalcSubresource(surface.mipmap, surface.face, pSurface->cLevels);
9496	UINT DstX = clipBox.x;
9497	UINT DstY = clipBox.y;
9498	UINT DstZ = clipBox.z;
9499
9500	UINT SrcSubresource = DstSubresource;
9501	D3D11_BOX SrcBox;
9502	SrcBox.left = clipBox.srcx;
9503	SrcBox.top = clipBox.srcy;
9504	SrcBox.front = clipBox.srcz;
9505	SrcBox.right = clipBox.srcx + clipBox.w;
9506	SrcBox.bottom = clipBox.srcy + clipBox.h;
9507	SrcBox.back = clipBox.srcz + clipBox.d;
9508
9509	ID3D11Resource *pDstResource;
9510	ID3D11Resource *pSrcResource;
9511	pDstResource = dxResource(pState, pSurface, NULL);
9512	pSrcResource = pDstResource;
9513
9514	pDXDevice->pImmediateContext->CopySubresourceRegion1(pDstResource, DstSubresource, DstX, DstY, DstZ,
9515	pSrcResource, SrcSubresource, &SrcBox, 0);
9516	}
9517	else
9518	{
9519	/* Memory -> Memory. */
9520	uint32_t const cxBlocks = (clipBox.w + pSurface->cxBlock - 1) / pSurface->cxBlock;
9521	uint32_t const cyBlocks = (clipBox.h + pSurface->cyBlock - 1) / pSurface->cyBlock;
9522	uint32_t const cbRow = cxBlocks * pSurface->cbBlock;
9523
9524	uint8_t const pu8Src = (uint8_t )pMipLevel->pSurfaceData
9525	+ (clipBox.srcx / pSurface->cxBlock) * pSurface->cbBlock
9526	+ (clipBox.srcy / pSurface->cyBlock) * pMipLevel->cbSurfacePitch
9527	+ clipBox.srcz * pMipLevel->cbSurfacePlane;
9528
9529	uint8_t pu8Dst = (uint8_t )pMipLevel->pSurfaceData
9530	+ (clipBox.x / pSurface->cxBlock) * pSurface->cbBlock
9531	+ (clipBox.y / pSurface->cyBlock) * pMipLevel->cbSurfacePitch
9532	+ clipBox.z * pMipLevel->cbSurfacePlane;
9533
9534	for (uint32_t z = 0; z < clipBox.d; ++z)
9535	{
9536	uint8_t const *pu8PlaneSrc = pu8Src;
9537	uint8_t *pu8PlaneDst = pu8Dst;
9538
9539	for (uint32_t y = 0; y < cyBlocks; ++y)
9540	{
9541	memmove(pu8PlaneDst, pu8PlaneSrc, cbRow);
9542	pu8PlaneDst += pMipLevel->cbSurfacePitch;
9543	pu8PlaneSrc += pMipLevel->cbSurfacePitch;
9544	}
9545
9546	pu8Src += pMipLevel->cbSurfacePlane;
9547	pu8Dst += pMipLevel->cbSurfacePlane;
9548	}
9549	}
9550
9551	return rc;
9552	}
9553
9554
9555	static DECLCALLBACK(int) vmsvga3dBackDXResolveCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9556	{
9557	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9558
9559	RT_NOREF(pBackend, pDXContext);
9560	AssertFailed(); /** @todo Implement */
9561	return VERR_NOT_IMPLEMENTED;
9562	}
9563
9564
9565	static DECLCALLBACK(int) vmsvga3dBackDXPredResolveCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9566	{
9567	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9568
9569	RT_NOREF(pBackend, pDXContext);
9570	AssertFailed(); /** @todo Implement */
9571	return VERR_NOT_IMPLEMENTED;
9572	}
9573
9574
9575	static DECLCALLBACK(int) vmsvga3dBackDXPredConvertRegion(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9576	{
9577	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9578
9579	RT_NOREF(pBackend, pDXContext);
9580	AssertFailed(); /** @todo Implement */
9581	return VERR_NOT_IMPLEMENTED;
9582	}
9583
9584
9585	static DECLCALLBACK(int) vmsvga3dBackDXPredConvert(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9586	{
9587	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9588
9589	RT_NOREF(pBackend, pDXContext);
9590	AssertFailed(); /** @todo Implement */
9591	return VERR_NOT_IMPLEMENTED;
9592	}
9593
9594
9595	static DECLCALLBACK(int) vmsvga3dBackWholeSurfaceCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9596	{
9597	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9598
9599	RT_NOREF(pBackend, pDXContext);
9600	AssertFailed(); /** @todo Implement */
9601	return VERR_NOT_IMPLEMENTED;
9602	}
9603
9604
9605	static int dxDefineUnorderedAccessView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId uaViewId, SVGACOTableDXUAViewEntry const *pEntry)
9606	{
9607	/* Get corresponding resource for pEntry->sid. Create the surface if does not yet exist. */
9608	PVMSVGA3DSURFACE pSurface;
9609	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pEntry->sid, &pSurface);
9610	AssertRCReturn(rc, rc);
9611
9612	ID3D11UnorderedAccessView *pUnorderedAccessView;
9613	DXVIEW *pView = &pDXContext->pBackendDXContext->paUnorderedAccessView[uaViewId];
9614	Assert(pView->u.pView == NULL);
9615
9616	if (pSurface->pBackendSurface == NULL)
9617	{
9618	/* Create the actual texture or buffer. */
9619	/** @todo One function to create all resources from surfaces. */
9620	if (pSurface->format != SVGA3D_BUFFER)
9621	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pSurface);
9622	else
9623	rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pSurface);
9624
9625	AssertRCReturn(rc, rc);
9626	}
9627
9628	HRESULT hr = dxUnorderedAccessViewCreate(pThisCC, pDXContext, pEntry, pSurface, &pUnorderedAccessView);
9629	AssertReturn(SUCCEEDED(hr), VERR_INVALID_STATE);
9630
9631	return dxViewInit(pView, pSurface, pDXContext, uaViewId, VMSVGA3D_VIEWTYPE_UNORDEREDACCESS, pUnorderedAccessView);
9632	}
9633
9634
9635	static DECLCALLBACK(int) vmsvga3dBackDXDefineUAView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId uaViewId, SVGACOTableDXUAViewEntry const *pEntry)
9636	{
9637	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9638	RT_NOREF(pBackend);
9639
9640	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
9641	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9642
9643	/** @todo Probably not necessary because UAVs are defined in setupPipeline. */
9644	return dxDefineUnorderedAccessView(pThisCC, pDXContext, uaViewId, pEntry);
9645	}
9646
9647
9648	static DECLCALLBACK(int) vmsvga3dBackDXDestroyUAView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId uaViewId)
9649	{
9650	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9651	RT_NOREF(pBackend);
9652
9653	return dxViewDestroy(&pDXContext->pBackendDXContext->paUnorderedAccessView[uaViewId]);
9654	}
9655
9656
9657	static DECLCALLBACK(int) vmsvga3dBackDXClearUAViewUint(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId uaViewId, uint32_t const aValues[4])
9658	{
9659	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9660	RT_NOREF(pBackend);
9661
9662	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
9663	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9664
9665	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paUnorderedAccessView[uaViewId];
9666	if (!pDXView->u.pUnorderedAccessView)
9667	{
9668	/* (Re-)create the view, because a creation of a view is deferred until a draw or a clear call. */
9669	SVGACOTableDXUAViewEntry const *pEntry = dxGetUnorderedAccessViewEntry(pDXContext, uaViewId);
9670	int rc = dxDefineUnorderedAccessView(pThisCC, pDXContext, uaViewId, pEntry);
9671	AssertRCReturn(rc, rc);
9672	}
9673	pDevice->pImmediateContext->ClearUnorderedAccessViewUint(pDXView->u.pUnorderedAccessView, aValues);
9674	return VINF_SUCCESS;
9675	}
9676
9677
9678	static DECLCALLBACK(int) vmsvga3dBackDXClearUAViewFloat(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId uaViewId, float const aValues[4])
9679	{
9680	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9681	RT_NOREF(pBackend);
9682
9683	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
9684	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9685
9686	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paUnorderedAccessView[uaViewId];
9687	if (!pDXView->u.pUnorderedAccessView)
9688	{
9689	/* (Re-)create the view, because a creation of a view is deferred until a draw or a clear call. */
9690	SVGACOTableDXUAViewEntry const *pEntry = &pDXContext->cot.paUAView[uaViewId];
9691	int rc = dxDefineUnorderedAccessView(pThisCC, pDXContext, uaViewId, pEntry);
9692	AssertRCReturn(rc, rc);
9693	}
9694	pDevice->pImmediateContext->ClearUnorderedAccessViewFloat(pDXView->u.pUnorderedAccessView, aValues);
9695	return VINF_SUCCESS;
9696	}
9697
9698
9699	static DECLCALLBACK(int) vmsvga3dBackDXCopyStructureCount(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId srcUAViewId, SVGA3dSurfaceId destSid, uint32_t destByteOffset)
9700	{
9701	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9702	RT_NOREF(pBackend);
9703
9704	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
9705	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9706
9707	/* Get corresponding resource. Create the buffer if does not yet exist. */
9708	ID3D11Buffer *pDstBuffer;
9709	if (destSid != SVGA3D_INVALID_ID)
9710	{
9711	PVMSVGA3DSURFACE pSurface;
9712	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, destSid, &pSurface);
9713	AssertRCReturn(rc, rc);
9714
9715	if (pSurface->pBackendSurface == NULL)
9716	{
9717	/* Create the resource and initialize it with the current surface data. */
9718	rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pSurface);
9719	AssertRCReturn(rc, rc);
9720	}
9721
9722	pDstBuffer = pSurface->pBackendSurface->u.pBuffer;
9723	}
9724	else
9725	pDstBuffer = NULL;
9726
9727	ID3D11UnorderedAccessView *pSrcView;
9728	if (srcUAViewId != SVGA3D_INVALID_ID)
9729	{
9730	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paUnorderedAccessView[srcUAViewId];
9731	AssertReturn(pDXView->u.pUnorderedAccessView, VERR_INVALID_STATE);
9732	pSrcView = pDXView->u.pUnorderedAccessView;
9733	}
9734	else
9735	pSrcView = NULL;
9736
9737	pDevice->pImmediateContext->CopyStructureCount(pDstBuffer, destByteOffset, pSrcView);
9738
9739	return VINF_SUCCESS;
9740	}
9741
9742
9743	static DECLCALLBACK(int) vmsvga3dBackDXSetUAViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t uavSpliceIndex, uint32_t cUAViewId, SVGA3dUAViewId const *paUAViewId)
9744	{
9745	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9746	RT_NOREF(pBackend);
9747
9748	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
9749	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9750
9751	RT_NOREF(uavSpliceIndex, cUAViewId, paUAViewId);
9752
9753	return VINF_SUCCESS;
9754	}
9755
9756
9757	static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexedInstancedIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId argsBufferSid, uint32_t byteOffsetForArgs)
9758	{
9759	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9760	RT_NOREF(pBackend);
9761
9762	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
9763	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9764
9765	/* Get corresponding resource. Create the buffer if does not yet exist. */
9766	ID3D11Buffer *pBufferForArgs;
9767	if (argsBufferSid != SVGA_ID_INVALID)
9768	{
9769	PVMSVGA3DSURFACE pSurface;
9770	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, argsBufferSid, &pSurface);
9771	AssertRCReturn(rc, rc);
9772
9773	if (pSurface->pBackendSurface == NULL)
9774	{
9775	/* Create the resource and initialize it with the current surface data. */
9776	rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pSurface);
9777	AssertRCReturn(rc, rc);
9778	}
9779
9780	pBufferForArgs = pSurface->pBackendSurface->u.pBuffer;
9781	}
9782	else
9783	pBufferForArgs = NULL;
9784
9785	dxSetupPipeline(pThisCC, pDXContext);
9786
9787	Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
9788
9789	pDevice->pImmediateContext->DrawIndexedInstancedIndirect(pBufferForArgs, byteOffsetForArgs);
9790
9791	/* Note which surfaces are being drawn. */
9792	dxTrackRenderTargets(pThisCC, pDXContext);
9793
9794	#ifdef DX_FLUSH_AFTER_DRAW
9795	dxDeviceFlush(pDevice);
9796	#endif
9797
9798	return VINF_SUCCESS;
9799	}
9800
9801
9802	static DECLCALLBACK(int) vmsvga3dBackDXDrawInstancedIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId argsBufferSid, uint32_t byteOffsetForArgs)
9803	{
9804	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9805	RT_NOREF(pBackend);
9806
9807	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
9808	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9809
9810	/* Get corresponding resource. Create the buffer if does not yet exist. */
9811	ID3D11Buffer *pBufferForArgs;
9812	if (argsBufferSid != SVGA_ID_INVALID)
9813	{
9814	PVMSVGA3DSURFACE pSurface;
9815	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, argsBufferSid, &pSurface);
9816	AssertRCReturn(rc, rc);
9817
9818	if (pSurface->pBackendSurface == NULL)
9819	{
9820	/* Create the resource and initialize it with the current surface data. */
9821	rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pSurface);
9822	AssertRCReturn(rc, rc);
9823	}
9824
9825	pBufferForArgs = pSurface->pBackendSurface->u.pBuffer;
9826	}
9827	else
9828	pBufferForArgs = NULL;
9829
9830	dxSetupPipeline(pThisCC, pDXContext);
9831
9832	Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
9833
9834	pDevice->pImmediateContext->DrawInstancedIndirect(pBufferForArgs, byteOffsetForArgs);
9835
9836	/* Note which surfaces are being drawn. */
9837	dxTrackRenderTargets(pThisCC, pDXContext);
9838
9839	#ifdef DX_FLUSH_AFTER_DRAW
9840	dxDeviceFlush(pDevice);
9841	#endif
9842
9843	return VINF_SUCCESS;
9844	}
9845
9846
9847	static DECLCALLBACK(int) vmsvga3dBackDXDispatch(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t threadGroupCountX, uint32_t threadGroupCountY, uint32_t threadGroupCountZ)
9848	{
9849	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9850	RT_NOREF(pBackend);
9851
9852	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
9853	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9854
9855	dxSetupPipeline(pThisCC, pDXContext);
9856
9857	pDevice->pImmediateContext->Dispatch(threadGroupCountX, threadGroupCountY, threadGroupCountZ);
9858
9859	#ifdef DX_FLUSH_AFTER_DRAW
9860	dxDeviceFlush(pDevice);
9861	#endif
9862
9863	return VINF_SUCCESS;
9864	}
9865
9866
9867	static DECLCALLBACK(int) vmsvga3dBackDXDispatchIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9868	{
9869	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9870
9871	RT_NOREF(pBackend, pDXContext);
9872	AssertFailed(); /** @todo Implement */
9873	return VERR_NOT_IMPLEMENTED;
9874	}
9875
9876
9877	static DECLCALLBACK(int) vmsvga3dBackWriteZeroSurface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9878	{
9879	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9880
9881	RT_NOREF(pBackend, pDXContext);
9882	AssertFailed(); /** @todo Implement */
9883	return VERR_NOT_IMPLEMENTED;
9884	}
9885
9886
9887	static DECLCALLBACK(int) vmsvga3dBackHintZeroSurface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9888	{
9889	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9890
9891	RT_NOREF(pBackend, pDXContext);
9892	AssertFailed(); /** @todo Implement */
9893	return VERR_NOT_IMPLEMENTED;
9894	}
9895
9896
9897	static DECLCALLBACK(int) vmsvga3dBackDXTransferToBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9898	{
9899	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9900
9901	RT_NOREF(pBackend, pDXContext);
9902	AssertFailed(); /** @todo Implement */
9903	return VERR_NOT_IMPLEMENTED;
9904	}
9905
9906
9907	static DECLCALLBACK(int) vmsvga3dBackLogicOpsBitBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9908	{
9909	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9910
9911	RT_NOREF(pBackend, pDXContext);
9912	AssertFailed(); /** @todo Implement */
9913	return VERR_NOT_IMPLEMENTED;
9914	}
9915
9916
9917	static DECLCALLBACK(int) vmsvga3dBackLogicOpsTransBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9918	{
9919	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9920
9921	RT_NOREF(pBackend, pDXContext);
9922	AssertFailed(); /** @todo Implement */
9923	return VERR_NOT_IMPLEMENTED;
9924	}
9925
9926
9927	static DECLCALLBACK(int) vmsvga3dBackLogicOpsStretchBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9928	{
9929	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9930
9931	RT_NOREF(pBackend, pDXContext);
9932	AssertFailed(); /** @todo Implement */
9933	return VERR_NOT_IMPLEMENTED;
9934	}
9935
9936
9937	static DECLCALLBACK(int) vmsvga3dBackLogicOpsColorFill(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9938	{
9939	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9940
9941	RT_NOREF(pBackend, pDXContext);
9942	AssertFailed(); /** @todo Implement */
9943	return VERR_NOT_IMPLEMENTED;
9944	}
9945
9946
9947	static DECLCALLBACK(int) vmsvga3dBackLogicOpsAlphaBlend(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9948	{
9949	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9950
9951	RT_NOREF(pBackend, pDXContext);
9952	AssertFailed(); /** @todo Implement */
9953	return VERR_NOT_IMPLEMENTED;
9954	}
9955
9956
9957	static DECLCALLBACK(int) vmsvga3dBackLogicOpsClearTypeBlend(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9958	{
9959	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9960
9961	RT_NOREF(pBackend, pDXContext);
9962	AssertFailed(); /** @todo Implement */
9963	return VERR_NOT_IMPLEMENTED;
9964	}
9965
9966
9967	static int dxSetCSUnorderedAccessViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9968	{
9969	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
9970	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9971
9972	//DEBUG_BREAKPOINT_TEST();
9973	uint32_t const *pUAIds = &pDXContext->svgaDXContext.csuaViewIds[0];
9974	ID3D11UnorderedAccessView *papUnorderedAccessView[SVGA3D_DX11_1_MAX_UAVIEWS];
9975	UINT aUAVInitialCounts[SVGA3D_DX11_1_MAX_UAVIEWS];
9976	for (uint32_t i = 0; i < SVGA3D_DX11_1_MAX_UAVIEWS; ++i)
9977	{
9978	SVGA3dUAViewId const uaViewId = pUAIds[i];
9979	if (uaViewId != SVGA3D_INVALID_ID)
9980	{
9981	ASSERT_GUEST_RETURN(uaViewId < pDXContext->pBackendDXContext->cUnorderedAccessView, VERR_INVALID_PARAMETER);
9982
9983	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paUnorderedAccessView[uaViewId];
9984	Assert(pDXView->u.pUnorderedAccessView);
9985	papUnorderedAccessView[i] = pDXView->u.pUnorderedAccessView;
9986
9987	SVGACOTableDXUAViewEntry const *pEntry = dxGetUnorderedAccessViewEntry(pDXContext, uaViewId);
9988	aUAVInitialCounts[i] = pEntry->structureCount;
9989	}
9990	else
9991	{
9992	papUnorderedAccessView[i] = NULL;
9993	aUAVInitialCounts[i] = (UINT)-1;
9994	}
9995	}
9996
9997	dxCSUnorderedAccessViewSet(pDevice, 0, SVGA3D_DX11_1_MAX_UAVIEWS, papUnorderedAccessView, aUAVInitialCounts);
9998	return VINF_SUCCESS;
9999	}
10000
10001
10002	static DECLCALLBACK(int) vmsvga3dBackDXSetCSUAViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startIndex, uint32_t cUAViewId, SVGA3dUAViewId const *paUAViewId)
10003	{
10004	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
10005	RT_NOREF(pBackend);
10006
10007	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
10008	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
10009
10010	RT_NOREF(startIndex, cUAViewId, paUAViewId);
10011
10012	return VINF_SUCCESS;
10013	}
10014
10015
10016	static DECLCALLBACK(int) vmsvga3dBackDXSetMinLOD(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
10017	{
10018	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
10019
10020	RT_NOREF(pBackend, pDXContext);
10021	AssertFailed(); /** @todo Implement */
10022	return VERR_NOT_IMPLEMENTED;
10023	}
10024
10025
10026	static DECLCALLBACK(int) vmsvga3dBackDXSetShaderIface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
10027	{
10028	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
10029
10030	RT_NOREF(pBackend, pDXContext);
10031	AssertFailed(); /** @todo Implement */
10032	return VERR_NOT_IMPLEMENTED;
10033	}
10034
10035
10036	static DECLCALLBACK(int) vmsvga3dBackSurfaceStretchBltNonMSToMS(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
10037	{
10038	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
10039
10040	RT_NOREF(pBackend, pDXContext);
10041	AssertFailed(); /** @todo Implement */
10042	return VERR_NOT_IMPLEMENTED;
10043	}
10044
10045
10046	static DECLCALLBACK(int) vmsvga3dBackDXBindShaderIface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
10047	{
10048	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
10049
10050	RT_NOREF(pBackend, pDXContext);
10051	AssertFailed(); /** @todo Implement */
10052	return VERR_NOT_IMPLEMENTED;
10053	}
10054
10055
10056	static DECLCALLBACK(int) vmsvga3dBackDXLoadState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PCPDMDEVHLPR3 pHlp, PSSMHANDLE pSSM)
10057	{
10058	RT_NOREF(pThisCC);
10059	uint32_t u32;
10060	int rc;
10061
10062	rc = pHlp->pfnSSMGetU32(pSSM, &u32);
10063	AssertLogRelRCReturn(rc, rc);
10064	AssertLogRelRCReturn(u32 == pDXContext->pBackendDXContext->cShader, VERR_INVALID_STATE);
10065
10066	for (uint32_t i = 0; i < pDXContext->pBackendDXContext->cShader; ++i)
10067	{
10068	DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[i];
10069
10070	rc = pHlp->pfnSSMGetU32(pSSM, &u32);
10071	AssertLogRelRCReturn(rc, rc);
10072	AssertLogRelReturn((SVGA3dShaderType)u32 == pDXShader->enmShaderType, VERR_INVALID_STATE);
10073
10074	if (pDXShader->enmShaderType == SVGA3D_SHADERTYPE_INVALID)
10075	continue;
10076
10077	pHlp->pfnSSMGetU32(pSSM, &pDXShader->soid);
10078
10079	pHlp->pfnSSMGetU32(pSSM, &u32);
10080	pDXShader->shaderInfo.enmProgramType = (VGPU10_PROGRAM_TYPE)u32;
10081
10082	rc = pHlp->pfnSSMGetU32(pSSM, &pDXShader->shaderInfo.cbBytecode);
10083	AssertLogRelRCReturn(rc, rc);
10084	AssertLogRelReturn(pDXShader->shaderInfo.cbBytecode <= 2 * SVGA3D_MAX_SHADER_MEMORY_BYTES, VERR_INVALID_STATE);
10085
10086	if (pDXShader->shaderInfo.cbBytecode)
10087	{
10088	pDXShader->shaderInfo.pvBytecode = RTMemAlloc(pDXShader->shaderInfo.cbBytecode);
10089	AssertPtrReturn(pDXShader->shaderInfo.pvBytecode, VERR_NO_MEMORY);
10090	pHlp->pfnSSMGetMem(pSSM, pDXShader->shaderInfo.pvBytecode, pDXShader->shaderInfo.cbBytecode);
10091	}
10092
10093	rc = pHlp->pfnSSMGetU32(pSSM, &pDXShader->shaderInfo.cInputSignature);
10094	AssertLogRelRCReturn(rc, rc);
10095	AssertLogRelReturn(pDXShader->shaderInfo.cInputSignature <= 32, VERR_INVALID_STATE);
10096	if (pDXShader->shaderInfo.cInputSignature)
10097	pHlp->pfnSSMGetMem(pSSM, pDXShader->shaderInfo.aInputSignature, pDXShader->shaderInfo.cInputSignature * sizeof(SVGA3dDXSignatureEntry));
10098
10099	rc = pHlp->pfnSSMGetU32(pSSM, &pDXShader->shaderInfo.cOutputSignature);
10100	AssertLogRelRCReturn(rc, rc);
10101	AssertLogRelReturn(pDXShader->shaderInfo.cOutputSignature <= 32, VERR_INVALID_STATE);
10102	if (pDXShader->shaderInfo.cOutputSignature)
10103	pHlp->pfnSSMGetMem(pSSM, pDXShader->shaderInfo.aOutputSignature, pDXShader->shaderInfo.cOutputSignature * sizeof(SVGA3dDXSignatureEntry));
10104
10105	rc = pHlp->pfnSSMGetU32(pSSM, &pDXShader->shaderInfo.cPatchConstantSignature);
10106	AssertLogRelRCReturn(rc, rc);
10107	AssertLogRelReturn(pDXShader->shaderInfo.cPatchConstantSignature <= 32, VERR_INVALID_STATE);
10108	if (pDXShader->shaderInfo.cPatchConstantSignature)
10109	pHlp->pfnSSMGetMem(pSSM, pDXShader->shaderInfo.aPatchConstantSignature, pDXShader->shaderInfo.cPatchConstantSignature * sizeof(SVGA3dDXSignatureEntry));
10110
10111	rc = pHlp->pfnSSMGetU32(pSSM, &pDXShader->shaderInfo.cDclResource);
10112	AssertLogRelRCReturn(rc, rc);
10113	AssertLogRelReturn(pDXShader->shaderInfo.cDclResource <= SVGA3D_DX_MAX_SRVIEWS, VERR_INVALID_STATE);
10114	if (pDXShader->shaderInfo.cDclResource)
10115	pHlp->pfnSSMGetMem(pSSM, pDXShader->shaderInfo.aOffDclResource, pDXShader->shaderInfo.cDclResource * sizeof(uint32_t));
10116
10117	DXShaderGenerateSemantics(&pDXShader->shaderInfo);
10118	}
10119
10120	rc = pHlp->pfnSSMGetU32(pSSM, &pDXContext->pBackendDXContext->cSOTarget);
10121	AssertLogRelRCReturn(rc, rc);
10122
10123	return VINF_SUCCESS;
10124	}
10125
10126
10127	static DECLCALLBACK(int) vmsvga3dBackDXSaveState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PCPDMDEVHLPR3 pHlp, PSSMHANDLE pSSM)
10128	{
10129	RT_NOREF(pThisCC);
10130	int rc;
10131
10132	pHlp->pfnSSMPutU32(pSSM, pDXContext->pBackendDXContext->cShader);
10133	for (uint32_t i = 0; i < pDXContext->pBackendDXContext->cShader; ++i)
10134	{
10135	DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[i];
10136
10137	pHlp->pfnSSMPutU32(pSSM, (uint32_t)pDXShader->enmShaderType);
10138	if (pDXShader->enmShaderType == SVGA3D_SHADERTYPE_INVALID)
10139	continue;
10140
10141	pHlp->pfnSSMPutU32(pSSM, pDXShader->soid);
10142
10143	pHlp->pfnSSMPutU32(pSSM, (uint32_t)pDXShader->shaderInfo.enmProgramType);
10144
10145	pHlp->pfnSSMPutU32(pSSM, pDXShader->shaderInfo.cbBytecode);
10146	if (pDXShader->shaderInfo.cbBytecode)
10147	pHlp->pfnSSMPutMem(pSSM, pDXShader->shaderInfo.pvBytecode, pDXShader->shaderInfo.cbBytecode);
10148
10149	pHlp->pfnSSMPutU32(pSSM, pDXShader->shaderInfo.cInputSignature);
10150	if (pDXShader->shaderInfo.cInputSignature)
10151	pHlp->pfnSSMPutMem(pSSM, pDXShader->shaderInfo.aInputSignature, pDXShader->shaderInfo.cInputSignature * sizeof(SVGA3dDXSignatureEntry));
10152
10153	pHlp->pfnSSMPutU32(pSSM, pDXShader->shaderInfo.cOutputSignature);
10154	if (pDXShader->shaderInfo.cOutputSignature)
10155	pHlp->pfnSSMPutMem(pSSM, pDXShader->shaderInfo.aOutputSignature, pDXShader->shaderInfo.cOutputSignature * sizeof(SVGA3dDXSignatureEntry));
10156
10157	pHlp->pfnSSMPutU32(pSSM, pDXShader->shaderInfo.cPatchConstantSignature);
10158	if (pDXShader->shaderInfo.cPatchConstantSignature)
10159	pHlp->pfnSSMPutMem(pSSM, pDXShader->shaderInfo.aPatchConstantSignature, pDXShader->shaderInfo.cPatchConstantSignature * sizeof(SVGA3dDXSignatureEntry));
10160
10161	pHlp->pfnSSMPutU32(pSSM, pDXShader->shaderInfo.cDclResource);
10162	if (pDXShader->shaderInfo.cDclResource)
10163	pHlp->pfnSSMPutMem(pSSM, pDXShader->shaderInfo.aOffDclResource, pDXShader->shaderInfo.cDclResource * sizeof(uint32_t));
10164	}
10165	rc = pHlp->pfnSSMPutU32(pSSM, pDXContext->pBackendDXContext->cSOTarget);
10166	AssertLogRelRCReturn(rc, rc);
10167
10168	return VINF_SUCCESS;
10169	}
10170
10171
10172	static DECLCALLBACK(int) vmsvga3dBackQueryInterface(PVGASTATECC pThisCC, char const pszInterfaceName, void pvInterfaceFuncs, size_t cbInterfaceFuncs)
10173	{
10174	RT_NOREF(pThisCC);
10175
10176	int rc = VINF_SUCCESS;
10177	if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_DX) == 0)
10178	{
10179	if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSDX))
10180	{
10181	if (pvInterfaceFuncs)
10182	{
10183	VMSVGA3DBACKENDFUNCSDX p = (VMSVGA3DBACKENDFUNCSDX )pvInterfaceFuncs;
10184	p->pfnDXSaveState = vmsvga3dBackDXSaveState;
10185	p->pfnDXLoadState = vmsvga3dBackDXLoadState;
10186	p->pfnDXDefineContext = vmsvga3dBackDXDefineContext;
10187	p->pfnDXDestroyContext = vmsvga3dBackDXDestroyContext;
10188	p->pfnDXBindContext = vmsvga3dBackDXBindContext;
10189	p->pfnDXSwitchContext = vmsvga3dBackDXSwitchContext;
10190	p->pfnDXReadbackContext = vmsvga3dBackDXReadbackContext;
10191	p->pfnDXInvalidateContext = vmsvga3dBackDXInvalidateContext;
10192	p->pfnDXSetSingleConstantBuffer = vmsvga3dBackDXSetSingleConstantBuffer;
10193	p->pfnDXSetShaderResources = vmsvga3dBackDXSetShaderResources;
10194	p->pfnDXSetShader = vmsvga3dBackDXSetShader;
10195	p->pfnDXSetSamplers = vmsvga3dBackDXSetSamplers;
10196	p->pfnDXDraw = vmsvga3dBackDXDraw;
10197	p->pfnDXDrawIndexed = vmsvga3dBackDXDrawIndexed;
10198	p->pfnDXDrawInstanced = vmsvga3dBackDXDrawInstanced;
10199	p->pfnDXDrawIndexedInstanced = vmsvga3dBackDXDrawIndexedInstanced;
10200	p->pfnDXDrawAuto = vmsvga3dBackDXDrawAuto;
10201	p->pfnDXSetInputLayout = vmsvga3dBackDXSetInputLayout;
10202	p->pfnDXSetVertexBuffers = vmsvga3dBackDXSetVertexBuffers;
10203	p->pfnDXSetIndexBuffer = vmsvga3dBackDXSetIndexBuffer;
10204	p->pfnDXSetTopology = vmsvga3dBackDXSetTopology;
10205	p->pfnDXSetRenderTargets = vmsvga3dBackDXSetRenderTargets;
10206	p->pfnDXSetBlendState = vmsvga3dBackDXSetBlendState;
10207	p->pfnDXSetDepthStencilState = vmsvga3dBackDXSetDepthStencilState;
10208	p->pfnDXSetRasterizerState = vmsvga3dBackDXSetRasterizerState;
10209	p->pfnDXDefineQuery = vmsvga3dBackDXDefineQuery;
10210	p->pfnDXDestroyQuery = vmsvga3dBackDXDestroyQuery;
10211	p->pfnDXBeginQuery = vmsvga3dBackDXBeginQuery;
10212	p->pfnDXEndQuery = vmsvga3dBackDXEndQuery;
10213	p->pfnDXSetPredication = vmsvga3dBackDXSetPredication;
10214	p->pfnDXSetSOTargets = vmsvga3dBackDXSetSOTargets;
10215	p->pfnDXSetViewports = vmsvga3dBackDXSetViewports;
10216	p->pfnDXSetScissorRects = vmsvga3dBackDXSetScissorRects;
10217	p->pfnDXClearRenderTargetView = vmsvga3dBackDXClearRenderTargetView;
10218	p->pfnDXClearDepthStencilView = vmsvga3dBackDXClearDepthStencilView;
10219	p->pfnDXPredCopyRegion = vmsvga3dBackDXPredCopyRegion;
10220	p->pfnDXPredCopy = vmsvga3dBackDXPredCopy;
10221	p->pfnDXPresentBlt = vmsvga3dBackDXPresentBlt;
10222	p->pfnDXGenMips = vmsvga3dBackDXGenMips;
10223	p->pfnDXDefineShaderResourceView = vmsvga3dBackDXDefineShaderResourceView;
10224	p->pfnDXDestroyShaderResourceView = vmsvga3dBackDXDestroyShaderResourceView;
10225	p->pfnDXDefineRenderTargetView = vmsvga3dBackDXDefineRenderTargetView;
10226	p->pfnDXDestroyRenderTargetView = vmsvga3dBackDXDestroyRenderTargetView;
10227	p->pfnDXDefineDepthStencilView = vmsvga3dBackDXDefineDepthStencilView;
10228	p->pfnDXDestroyDepthStencilView = vmsvga3dBackDXDestroyDepthStencilView;
10229	p->pfnDXDefineElementLayout = vmsvga3dBackDXDefineElementLayout;
10230	p->pfnDXDestroyElementLayout = vmsvga3dBackDXDestroyElementLayout;
10231	p->pfnDXDefineBlendState = vmsvga3dBackDXDefineBlendState;
10232	p->pfnDXDestroyBlendState = vmsvga3dBackDXDestroyBlendState;
10233	p->pfnDXDefineDepthStencilState = vmsvga3dBackDXDefineDepthStencilState;
10234	p->pfnDXDestroyDepthStencilState = vmsvga3dBackDXDestroyDepthStencilState;
10235	p->pfnDXDefineRasterizerState = vmsvga3dBackDXDefineRasterizerState;
10236	p->pfnDXDestroyRasterizerState = vmsvga3dBackDXDestroyRasterizerState;
10237	p->pfnDXDefineSamplerState = vmsvga3dBackDXDefineSamplerState;
10238	p->pfnDXDestroySamplerState = vmsvga3dBackDXDestroySamplerState;
10239	p->pfnDXDefineShader = vmsvga3dBackDXDefineShader;
10240	p->pfnDXDestroyShader = vmsvga3dBackDXDestroyShader;
10241	p->pfnDXBindShader = vmsvga3dBackDXBindShader;
10242	p->pfnDXDefineStreamOutput = vmsvga3dBackDXDefineStreamOutput;
10243	p->pfnDXDestroyStreamOutput = vmsvga3dBackDXDestroyStreamOutput;
10244	p->pfnDXSetStreamOutput = vmsvga3dBackDXSetStreamOutput;
10245	p->pfnDXSetCOTable = vmsvga3dBackDXSetCOTable;
10246	p->pfnDXBufferCopy = vmsvga3dBackDXBufferCopy;
10247	p->pfnDXSurfaceCopyAndReadback = vmsvga3dBackDXSurfaceCopyAndReadback;
10248	p->pfnDXMoveQuery = vmsvga3dBackDXMoveQuery;
10249	p->pfnDXBindAllShader = vmsvga3dBackDXBindAllShader;
10250	p->pfnDXHint = vmsvga3dBackDXHint;
10251	p->pfnDXBufferUpdate = vmsvga3dBackDXBufferUpdate;
10252	p->pfnDXCondBindAllShader = vmsvga3dBackDXCondBindAllShader;
10253	p->pfnScreenCopy = vmsvga3dBackScreenCopy;
10254	p->pfnIntraSurfaceCopy = vmsvga3dBackIntraSurfaceCopy;
10255	p->pfnDXResolveCopy = vmsvga3dBackDXResolveCopy;
10256	p->pfnDXPredResolveCopy = vmsvga3dBackDXPredResolveCopy;
10257	p->pfnDXPredConvertRegion = vmsvga3dBackDXPredConvertRegion;
10258	p->pfnDXPredConvert = vmsvga3dBackDXPredConvert;
10259	p->pfnWholeSurfaceCopy = vmsvga3dBackWholeSurfaceCopy;
10260	p->pfnDXDefineUAView = vmsvga3dBackDXDefineUAView;
10261	p->pfnDXDestroyUAView = vmsvga3dBackDXDestroyUAView;
10262	p->pfnDXClearUAViewUint = vmsvga3dBackDXClearUAViewUint;
10263	p->pfnDXClearUAViewFloat = vmsvga3dBackDXClearUAViewFloat;
10264	p->pfnDXCopyStructureCount = vmsvga3dBackDXCopyStructureCount;
10265	p->pfnDXSetUAViews = vmsvga3dBackDXSetUAViews;
10266	p->pfnDXDrawIndexedInstancedIndirect = vmsvga3dBackDXDrawIndexedInstancedIndirect;
10267	p->pfnDXDrawInstancedIndirect = vmsvga3dBackDXDrawInstancedIndirect;
10268	p->pfnDXDispatch = vmsvga3dBackDXDispatch;
10269	p->pfnDXDispatchIndirect = vmsvga3dBackDXDispatchIndirect;
10270	p->pfnWriteZeroSurface = vmsvga3dBackWriteZeroSurface;
10271	p->pfnHintZeroSurface = vmsvga3dBackHintZeroSurface;
10272	p->pfnDXTransferToBuffer = vmsvga3dBackDXTransferToBuffer;
10273	p->pfnLogicOpsBitBlt = vmsvga3dBackLogicOpsBitBlt;
10274	p->pfnLogicOpsTransBlt = vmsvga3dBackLogicOpsTransBlt;
10275	p->pfnLogicOpsStretchBlt = vmsvga3dBackLogicOpsStretchBlt;
10276	p->pfnLogicOpsColorFill = vmsvga3dBackLogicOpsColorFill;
10277	p->pfnLogicOpsAlphaBlend = vmsvga3dBackLogicOpsAlphaBlend;
10278	p->pfnLogicOpsClearTypeBlend = vmsvga3dBackLogicOpsClearTypeBlend;
10279	p->pfnDXSetCSUAViews = vmsvga3dBackDXSetCSUAViews;
10280	p->pfnDXSetMinLOD = vmsvga3dBackDXSetMinLOD;
10281	p->pfnDXSetShaderIface = vmsvga3dBackDXSetShaderIface;
10282	p->pfnSurfaceStretchBltNonMSToMS = vmsvga3dBackSurfaceStretchBltNonMSToMS;
10283	p->pfnDXBindShaderIface = vmsvga3dBackDXBindShaderIface;
10284	p->pfnVBDXClearRenderTargetViewRegion = vmsvga3dBackVBDXClearRenderTargetViewRegion;
10285	}
10286	}
10287	else
10288	{
10289	AssertFailed();
10290	rc = VERR_INVALID_PARAMETER;
10291	}
10292	}
10293	else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_MAP) == 0)
10294	{
10295	if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSMAP))
10296	{
10297	if (pvInterfaceFuncs)
10298	{
10299	VMSVGA3DBACKENDFUNCSMAP p = (VMSVGA3DBACKENDFUNCSMAP )pvInterfaceFuncs;
10300	p->pfnSurfaceMap = vmsvga3dBackSurfaceMap;
10301	p->pfnSurfaceUnmap = vmsvga3dBackSurfaceUnmap;
10302	}
10303	}
10304	else
10305	{
10306	AssertFailed();
10307	rc = VERR_INVALID_PARAMETER;
10308	}
10309	}
10310	else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_GBO) == 0)
10311	{
10312	if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSGBO))
10313	{
10314	if (pvInterfaceFuncs)
10315	{
10316	VMSVGA3DBACKENDFUNCSGBO p = (VMSVGA3DBACKENDFUNCSGBO )pvInterfaceFuncs;
10317	p->pfnScreenTargetBind = vmsvga3dScreenTargetBind;
10318	p->pfnScreenTargetUpdate = vmsvga3dScreenTargetUpdate;
10319	}
10320	}
10321	else
10322	{
10323	AssertFailed();
10324	rc = VERR_INVALID_PARAMETER;
10325	}
10326	}
10327	else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_3D) == 0)
10328	{
10329	if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCS3D))
10330	{
10331	if (pvInterfaceFuncs)
10332	{
10333	VMSVGA3DBACKENDFUNCS3D p = (VMSVGA3DBACKENDFUNCS3D )pvInterfaceFuncs;
10334	p->pfnInit = vmsvga3dBackInit;
10335	p->pfnPowerOn = vmsvga3dBackPowerOn;
10336	p->pfnTerminate = vmsvga3dBackTerminate;
10337	p->pfnReset = vmsvga3dBackReset;
10338	p->pfnQueryCaps = vmsvga3dBackQueryCaps;
10339	p->pfnChangeMode = vmsvga3dBackChangeMode;
10340	p->pfnCreateTexture = vmsvga3dBackCreateTexture;
10341	p->pfnSurfaceDestroy = vmsvga3dBackSurfaceDestroy;
10342	p->pfnSurfaceInvalidateImage = vmsvga3dBackSurfaceInvalidateImage;
10343	p->pfnSurfaceCopy = vmsvga3dBackSurfaceCopy;
10344	p->pfnSurfaceDMACopyBox = vmsvga3dBackSurfaceDMACopyBox;
10345	p->pfnSurfaceStretchBlt = vmsvga3dBackSurfaceStretchBlt;
10346	p->pfnUpdateHostScreenViewport = vmsvga3dBackUpdateHostScreenViewport;
10347	p->pfnDefineScreen = vmsvga3dBackDefineScreen;
10348	p->pfnDestroyScreen = vmsvga3dBackDestroyScreen;
10349	p->pfnSurfaceBlitToScreen = vmsvga3dBackSurfaceBlitToScreen;
10350	p->pfnSurfaceUpdateHeapBuffers = vmsvga3dBackSurfaceUpdateHeapBuffers;
10351	}
10352	}
10353	else
10354	{
10355	AssertFailed();
10356	rc = VERR_INVALID_PARAMETER;
10357	}
10358	}
10359	else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_VGPU9) == 0)
10360	{
10361	if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSVGPU9))
10362	{
10363	if (pvInterfaceFuncs)
10364	{
10365	VMSVGA3DBACKENDFUNCSVGPU9 p = (VMSVGA3DBACKENDFUNCSVGPU9 )pvInterfaceFuncs;
10366	p->pfnContextDefine = vmsvga3dBackContextDefine;
10367	p->pfnContextDestroy = vmsvga3dBackContextDestroy;
10368	p->pfnSetTransform = vmsvga3dBackSetTransform;
10369	p->pfnSetZRange = vmsvga3dBackSetZRange;
10370	p->pfnSetRenderState = vmsvga3dBackSetRenderState;
10371	p->pfnSetRenderTarget = vmsvga3dBackSetRenderTarget;
10372	p->pfnSetTextureState = vmsvga3dBackSetTextureState;
10373	p->pfnSetMaterial = vmsvga3dBackSetMaterial;
10374	p->pfnSetLightData = vmsvga3dBackSetLightData;
10375	p->pfnSetLightEnabled = vmsvga3dBackSetLightEnabled;
10376	p->pfnSetViewPort = vmsvga3dBackSetViewPort;
10377	p->pfnSetClipPlane = vmsvga3dBackSetClipPlane;
10378	p->pfnCommandClear = vmsvga3dBackCommandClear;
10379	p->pfnDrawPrimitives = vmsvga3dBackDrawPrimitives;
10380	p->pfnSetScissorRect = vmsvga3dBackSetScissorRect;
10381	p->pfnGenerateMipmaps = vmsvga3dBackGenerateMipmaps;
10382	p->pfnShaderDefine = vmsvga3dBackShaderDefine;
10383	p->pfnShaderDestroy = vmsvga3dBackShaderDestroy;
10384	p->pfnShaderSet = vmsvga3dBackShaderSet;
10385	p->pfnShaderSetConst = vmsvga3dBackShaderSetConst;
10386	p->pfnOcclusionQueryCreate = vmsvga3dBackOcclusionQueryCreate;
10387	p->pfnOcclusionQueryDelete = vmsvga3dBackOcclusionQueryDelete;
10388	p->pfnOcclusionQueryBegin = vmsvga3dBackOcclusionQueryBegin;
10389	p->pfnOcclusionQueryEnd = vmsvga3dBackOcclusionQueryEnd;
10390	p->pfnOcclusionQueryGetData = vmsvga3dBackOcclusionQueryGetData;
10391	}
10392	}
10393	else
10394	{
10395	AssertFailed();
10396	rc = VERR_INVALID_PARAMETER;
10397	}
10398	}
10399	else
10400	rc = VERR_NOT_IMPLEMENTED;
10401	return rc;
10402	}
10403
10404
10405	extern VMSVGA3DBACKENDDESC const g_BackendDX =
10406	{
10407	"DX",
10408	vmsvga3dBackQueryInterface
10409	};

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source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-dx-dx11.cpp@ 100010

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