DevVGA-SVGA3d-dx-dx11.cpp@ 104811

Last change on this file since 104811 was 104811, checked in by vboxsync, 10 months ago
Devices/Graphics/DevVGA-SVGA3d-dx-dx11.cpp: removed obsolete code which used multiple D3D11 devices. bugref:9830
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 508.3 KB

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1	/* $Id: DevVGA-SVGA3d-dx-dx11.cpp 104811 2024-05-29 17:29:10Z vboxsync $ */
2	/** @file
3	* DevVMWare - VMWare SVGA device
4	*/
5
6	/*
7	* Copyright (C) 2020-2024 Oracle and/or its affiliates.
8	*
9	* This file is part of VirtualBox base platform packages, as
10	* available from https://www.virtualbox.org.
11	*
12	* This program is free software; you can redistribute it and/or
13	* modify it under the terms of the GNU General Public License
14	* as published by the Free Software Foundation, in version 3 of the
15	* License.
16	*
17	* This program is distributed in the hope that it will be useful, but
18	* WITHOUT ANY WARRANTY; without even the implied warranty of
19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20	* General Public License for more details.
21	*
22	* You should have received a copy of the GNU General Public License
23	* along with this program; if not, see <https://www.gnu.org/licenses>.
24	*
25	* SPDX-License-Identifier: GPL-3.0-only
26	*/
27
28
29	/*********************************************************************************************************************************
30	* Header Files *
31	*********************************************************************************************************************************/
32	#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
33	#include <VBox/AssertGuest.h>
34	#include <VBox/log.h>
35	#include <VBox/vmm/pdmdev.h>
36	#include <VBox/vmm/pgm.h>
37
38	#include <iprt/asm-mem.h>
39	#include <iprt/assert.h>
40	#include <iprt/errcore.h>
41	#include <iprt/mem.h>
42
43	#include <VBoxVideo.h> /* required by DevVGA.h */
44	#include <VBoxVideo3D.h>
45
46	/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
47	#include "DevVGA.h"
48
49	#include "DevVGA-SVGA.h"
50	#include "DevVGA-SVGA3d.h"
51	#include "DevVGA-SVGA3d-internal.h"
52	#include "DevVGA-SVGA3d-dx-shader.h"
53
54	/* d3d11_1.h has a structure field named 'Status' but Status is defined as int on Linux host */
55	#if defined(Status)
56	#undef Status
57	#endif
58	#include <d3d11_1.h>
59
60
61	#ifdef RT_OS_WINDOWS
62	# define VBOX_D3D11_LIBRARY_NAME "d3d11"
63	#else
64	# define VBOX_D3D11_LIBRARY_NAME "VBoxDxVk"
65	#endif
66
67	/* One ID3D11Device object is used for all VMSVGA guest contexts because the VGPU design makes resources
68	* independent from rendering contexts. I.e. multiple guest contexts freely access a surface.
69	*
70	* The initial implementation of this backend has used separate ID3D11Devices for each VMSVGA context
71	* and created shared resources to allow one ID3D11Device to access a resource which was rendered to by
72	* another ID3D11Device. This synchronization of access to shared resources kills performance actually.
73	*/
74
75	/* A single staging ID3D11Buffer is used for uploading data to other buffers. */
76	#define DX_COMMON_STAGING_BUFFER
77	/* Always flush after submitting a draw call for debugging. */
78	//#define DX_FLUSH_AFTER_DRAW
79
80	/* This is not available on non Windows hosts. */
81	#ifndef D3D_RELEASE
82	# define D3D_RELEASE(a_Ptr) do { if ((a_Ptr)) (a_Ptr)->Release(); (a_Ptr) = NULL; } while (0)
83	#endif
84
85	#define D3D_RELEASE_ARRAY(a_Count, a_papArray) do { \
86	for (uint32_t i = 0; i < (a_Count); ++i) \
87	D3D_RELEASE((a_papArray)[i]); \
88	} while (0)
89
90	typedef struct D3D11BLITTER
91	{
92	ID3D11Device1 *pDevice;
93	ID3D11DeviceContext1 *pImmediateContext;
94
95	ID3D11VertexShader *pVertexShader;
96	ID3D11PixelShader *pPixelShader;
97	ID3D11SamplerState *pSamplerState;
98	ID3D11RasterizerState1 *pRasterizerState;
99	ID3D11BlendState1 *pBlendState;
100	} D3D11BLITTER;
101
102	typedef struct DXDEVICE
103	{
104	ID3D11Device1 pDevice; / Device. */
105	ID3D11DeviceContext1 pImmediateContext; / Corresponding context. */
106	IDXGIFactory pDxgiFactory; / DXGI Factory. */
107	D3D_FEATURE_LEVEL FeatureLevel;
108
109	uint32_t MultisampleCountMask; /* 1 << (MSCount - 1) for MSCount = 2, 4, 8, 16, 32 */
110
111	ID3D11VideoDevice *pVideoDevice;
112	ID3D11VideoContext *pVideoContext;
113	#ifdef DX_COMMON_STAGING_BUFFER
114	/* Staging buffer for transfer to surface buffers. */
115	ID3D11Buffer pStagingBuffer; / The staging buffer resource. */
116	uint32_t cbStagingBuffer; /* Current size of the staging buffer resource. */
117	#endif
118
119	D3D11BLITTER Blitter; /* Blits one texture to another. */
120	} DXDEVICE;
121
122	/* Kind of a texture view. */
123	typedef enum VMSVGA3DBACKVIEWTYPE
124	{
125	VMSVGA3D_VIEWTYPE_NONE = 0,
126	VMSVGA3D_VIEWTYPE_RENDERTARGET = 1,
127	VMSVGA3D_VIEWTYPE_DEPTHSTENCIL = 2,
128	VMSVGA3D_VIEWTYPE_SHADERRESOURCE = 3,
129	VMSVGA3D_VIEWTYPE_UNORDEREDACCESS = 4,
130	VMSVGA3D_VIEWTYPE_VIDEODECODEROUTPUT = 5,
131	VMSVGA3D_VIEWTYPE_VIDEOPROCESSORINPUT = 6,
132	VMSVGA3D_VIEWTYPE_VIDEOPROCESSOROUTPUT = 7
133	} VMSVGA3DBACKVIEWTYPE;
134
135	/* Information about a texture view to track all created views:.
136	* when a surface is invalidated, then all views must deleted;
137	* when a view is deleted, then the view must be unlinked from the surface.
138	*/
139	typedef struct DXVIEWINFO
140	{
141	uint32_t sid; /* Surface which the view was created for. */
142	uint32_t cid; /* DX context which created the view. */
143	uint32_t viewId; /* View id assigned by the guest. */
144	VMSVGA3DBACKVIEWTYPE enmViewType;
145	} DXVIEWINFO;
146
147	/* Context Object Table element for a texture view. */
148	typedef struct DXVIEW
149	{
150	uint32_t cid; /* DX context which created the view. */
151	uint32_t sid; /* Surface which the view was created for. */
152	uint32_t viewId; /* View id assigned by the guest. */
153	VMSVGA3DBACKVIEWTYPE enmViewType;
154
155	union
156	{
157	ID3D11View pView; / The view object. */
158	ID3D11RenderTargetView *pRenderTargetView;
159	ID3D11DepthStencilView *pDepthStencilView;
160	ID3D11ShaderResourceView *pShaderResourceView;
161	ID3D11UnorderedAccessView *pUnorderedAccessView;
162	ID3D11VideoDecoderOutputView *pVideoDecoderOutputView;
163	ID3D11VideoProcessorInputView *pVideoProcessorInputView;
164	ID3D11VideoProcessorOutputView *pVideoProcessorOutputView;
165	} u;
166
167	RTLISTNODE nodeSurfaceView; /* Views are linked to the surface. */
168	} DXVIEW;
169
170	/* What kind of resource has been created for the VMSVGA3D surface. */
171	typedef enum VMSVGA3DBACKRESTYPE
172	{
173	VMSVGA3D_RESTYPE_NONE = 0,
174	VMSVGA3D_RESTYPE_TEXTURE_1D = 1,
175	VMSVGA3D_RESTYPE_TEXTURE_2D = 2,
176	VMSVGA3D_RESTYPE_TEXTURE_CUBE = 3,
177	VMSVGA3D_RESTYPE_TEXTURE_3D = 4,
178	VMSVGA3D_RESTYPE_BUFFER = 5,
179	} VMSVGA3DBACKRESTYPE;
180
181	typedef struct VMSVGA3DBACKENDSURFACE
182	{
183	VMSVGA3DBACKRESTYPE enmResType;
184	DXGI_FORMAT enmDxgiFormat;
185	union
186	{
187	ID3D11Resource *pResource;
188	ID3D11Texture1D *pTexture1D;
189	ID3D11Texture2D *pTexture2D;
190	ID3D11Texture3D *pTexture3D;
191	ID3D11Buffer *pBuffer;
192	} u;
193
194	/* For updates from memory. */
195	union /** @todo One per format. */
196	{
197	ID3D11Resource *pResource;
198	ID3D11Texture1D *pTexture1D;
199	ID3D11Texture2D *pTexture2D;
200	ID3D11Texture3D *pTexture3D;
201	#ifndef DX_COMMON_STAGING_BUFFER
202	ID3D11Buffer *pBuffer;
203	#endif
204	} dynamic;
205
206	/* For reading the texture content. */
207	union /** @todo One per format. */
208	{
209	ID3D11Resource *pResource;
210	ID3D11Texture1D *pTexture1D;
211	ID3D11Texture2D *pTexture2D;
212	ID3D11Texture3D *pTexture3D;
213	#ifndef DX_COMMON_STAGING_BUFFER
214	ID3D11Buffer *pBuffer;
215	#endif
216	} staging;
217
218	/* Render target views, depth stencil views and shader resource views created for this texture or buffer. */
219	RTLISTANCHOR listView; /* DXVIEW */
220
221	} VMSVGA3DBACKENDSURFACE;
222
223
224	typedef struct VMSVGAHWSCREEN
225	{
226	ID3D11Texture2D pTexture; / Shared texture for the screen content. Only used as CopyResource target. */
227	IDXGIResource pDxgiResource; / Interface of the texture. */
228	IDXGIKeyedMutex pDXGIKeyedMutex; / Synchronization interface for the render device. */
229	HANDLE SharedHandle; /* The shared handle of this structure. */
230	uint32_t sidScreenTarget; /* The source surface for this screen. */
231	} VMSVGAHWSCREEN;
232
233
234	typedef struct DXELEMENTLAYOUT
235	{
236	ID3D11InputLayout *pElementLayout;
237	uint32_t cElementDesc;
238	D3D11_INPUT_ELEMENT_DESC aElementDesc[32];
239	} DXELEMENTLAYOUT;
240
241	typedef struct DXSHADER
242	{
243	SVGA3dShaderType enmShaderType;
244	union
245	{
246	ID3D11DeviceChild pShader; / All. */
247	ID3D11VertexShader pVertexShader; / SVGA3D_SHADERTYPE_VS */
248	ID3D11PixelShader pPixelShader; / SVGA3D_SHADERTYPE_PS */
249	ID3D11GeometryShader pGeometryShader; / SVGA3D_SHADERTYPE_GS */
250	ID3D11HullShader pHullShader; / SVGA3D_SHADERTYPE_HS */
251	ID3D11DomainShader pDomainShader; / SVGA3D_SHADERTYPE_DS */
252	ID3D11ComputeShader pComputeShader; / SVGA3D_SHADERTYPE_CS */
253	};
254	void *pvDXBC;
255	uint32_t cbDXBC;
256
257	uint32_t soid; /* Stream output declarations for geometry shaders. */
258
259	DXShaderInfo shaderInfo;
260	} DXSHADER;
261
262	typedef struct DXQUERY
263	{
264	union
265	{
266	ID3D11Query *pQuery;
267	ID3D11Predicate *pPredicate;
268	};
269	} DXQUERY;
270
271	typedef struct DXVIDEOPROCESSOR
272	{
273	ID3D11VideoProcessorEnumerator *pEnum;
274	ID3D11VideoProcessor *pVideoProcessor;
275	} DXVIDEOPROCESSOR;
276
277	typedef struct DXVIDEODECODER
278	{
279	ID3D11VideoDecoder *pVideoDecoder;
280	} DXVIDEODECODER;
281
282	typedef struct DXSTREAMOUTPUT
283	{
284	UINT cDeclarationEntry;
285	D3D11_SO_DECLARATION_ENTRY aDeclarationEntry[SVGA3D_MAX_STREAMOUT_DECLS];
286	} DXSTREAMOUTPUT;
287
288	typedef struct DXBOUNDVERTEXBUFFER
289	{
290	ID3D11Buffer *pBuffer;
291	uint32_t stride;
292	uint32_t offset;
293	} DXBOUNDVERTEXBUFFER;
294
295	typedef struct DXBOUNDINDEXBUFFER
296	{
297	ID3D11Buffer *pBuffer;
298	DXGI_FORMAT indexBufferFormat;
299	uint32_t indexBufferOffset;
300	} DXBOUNDINDEXBUFFER;
301
302	typedef struct DXBOUNDRESOURCES /* Currently bound resources. Mirror SVGADXContextMobFormat structure. */
303	{
304	struct
305	{
306	ID3D11Buffer *constantBuffers[SVGA3D_DX_MAX_CONSTBUFFERS];
307	} shaderState[SVGA3D_NUM_SHADERTYPE];
308	} DXBOUNDRESOURCES;
309
310
311	typedef struct VMSVGA3DBACKENDDXCONTEXT
312	{
313	DXDEVICE dxDevice; /* DX device interfaces for this context operations. */
314
315	/* Arrays for Context-Object Tables. Number of entries depends on COTable size. */
316	uint32_t cBlendState; /* Number of entries in the papBlendState array. */
317	uint32_t cDepthStencilState; /* papDepthStencilState */
318	uint32_t cSamplerState; /* papSamplerState */
319	uint32_t cRasterizerState; /* papRasterizerState */
320	uint32_t cElementLayout; /* paElementLayout */
321	uint32_t cRenderTargetView; /* paRenderTargetView */
322	uint32_t cDepthStencilView; /* paDepthStencilView */
323	uint32_t cShaderResourceView; /* paShaderResourceView */
324	uint32_t cQuery; /* paQuery */
325	uint32_t cShader; /* paShader */
326	uint32_t cStreamOutput; /* paStreamOutput */
327	uint32_t cUnorderedAccessView; /* paUnorderedAccessView */
328	ID3D11BlendState1 **papBlendState;
329	ID3D11DepthStencilState **papDepthStencilState;
330	ID3D11SamplerState **papSamplerState;
331	ID3D11RasterizerState1 **papRasterizerState;
332	DXELEMENTLAYOUT *paElementLayout;
333	DXVIEW *paRenderTargetView;
334	DXVIEW *paDepthStencilView;
335	DXVIEW *paShaderResourceView;
336	DXQUERY *paQuery;
337	DXSHADER *paShader;
338	DXSTREAMOUTPUT *paStreamOutput;
339	DXVIEW *paUnorderedAccessView;
340
341	uint32_t cVideoProcessor; /* paVideoProcessor */
342	uint32_t cVideoDecoderOutputView; /* paVideoDecoderOutputView */
343	uint32_t cVideoDecoder; /* paVideoDecoder */
344	uint32_t cVideoProcessorInputView; /* paVideoProcessorInputView */
345	uint32_t cVideoProcessorOutputView; /* paVideoProcessorOutputView */
346	DXVIDEOPROCESSOR *paVideoProcessor;
347	DXVIEW *paVideoDecoderOutputView;
348	DXVIDEODECODER *paVideoDecoder;
349	DXVIEW *paVideoProcessorInputView;
350	DXVIEW *paVideoProcessorOutputView;
351
352	uint32_t cSOTarget; /* How many SO targets are currently set (SetSOTargets) */
353
354	DXBOUNDRESOURCES resources;
355	} VMSVGA3DBACKENDDXCONTEXT;
356
357	/* Shader disassembler function. Optional. */
358	typedef HRESULT FN_D3D_DISASSEMBLE(LPCVOID pSrcData, SIZE_T SrcDataSize, UINT Flags, LPCSTR szComments, ID3D10Blob **ppDisassembly);
359	typedef FN_D3D_DISASSEMBLE *PFN_D3D_DISASSEMBLE;
360
361	typedef struct VMSVGA3DBACKEND
362	{
363	RTLDRMOD hD3D11;
364	PFN_D3D11_CREATE_DEVICE pfnD3D11CreateDevice;
365
366	RTLDRMOD hD3DCompiler;
367	PFN_D3D_DISASSEMBLE pfnD3DDisassemble;
368
369	DXDEVICE dxDevice;
370	UINT VendorId;
371	UINT DeviceId;
372
373	SVGADXContextMobFormat svgaDXContext; /* Current state of pipeline. */
374
375	DXBOUNDRESOURCES resources; /* What is currently applied to the pipeline. */
376	} VMSVGA3DBACKEND;
377
378
379	/* Static function prototypes. */
380	static int dxDeviceFlush(DXDEVICE *pDevice);
381	static int dxSetRenderTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext);
382	static int dxSetCSUnorderedAccessViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext);
383	static DECLCALLBACK(void) vmsvga3dBackSurfaceDestroy(PVGASTATECC pThisCC, bool fClearCOTableEntry, PVMSVGA3DSURFACE pSurface);
384	static int dxDestroyShader(DXSHADER *pDXShader);
385	static int dxDestroyQuery(DXQUERY *pDXQuery);
386	static int dxReadBuffer(DXDEVICE pDevice, ID3D11Buffer pBuffer, UINT Offset, UINT Bytes, void *ppvData, uint32_t pcbData);
387
388	static int dxCreateVideoProcessor(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId, VBSVGACOTableDXVideoProcessorEntry const *pEntry);
389	static void dxDestroyVideoProcessor(DXVIDEOPROCESSOR *pDXVideoProcessor);
390	static int dxCreateVideoDecoder(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoDecoderId videoDecoderId, VBSVGACOTableDXVideoDecoderEntry const *pEntry);
391	static void dxDestroyVideoDecoder(DXVIDEODECODER *pDXVideoDecoder);
392
393	static HRESULT BlitInit(D3D11BLITTER pBlitter, ID3D11Device1 pDevice, ID3D11DeviceContext1 *pImmediateContext);
394	static void BlitRelease(D3D11BLITTER *pBlitter);
395
396
397	/* This is not available with the DXVK headers for some reason. */
398	#ifndef RT_OS_WINDOWS
399	typedef enum D3D11_TEXTURECUBE_FACE {
400	D3D11_TEXTURECUBE_FACE_POSITIVE_X,
401	D3D11_TEXTURECUBE_FACE_NEGATIVE_X,
402	D3D11_TEXTURECUBE_FACE_POSITIVE_Y,
403	D3D11_TEXTURECUBE_FACE_NEGATIVE_Y,
404	D3D11_TEXTURECUBE_FACE_POSITIVE_Z,
405	D3D11_TEXTURECUBE_FACE_NEGATIVE_Z
406	} D3D11_TEXTURECUBE_FACE;
407	#endif
408
409
410	#if 0 /* unused */
411	DECLINLINE(D3D11_TEXTURECUBE_FACE) vmsvga3dCubemapFaceFromIndex(uint32_t iFace)
412	{
413	D3D11_TEXTURECUBE_FACE Face;
414	switch (iFace)
415	{
416	case 0: Face = D3D11_TEXTURECUBE_FACE_POSITIVE_X; break;
417	case 1: Face = D3D11_TEXTURECUBE_FACE_NEGATIVE_X; break;
418	case 2: Face = D3D11_TEXTURECUBE_FACE_POSITIVE_Y; break;
419	case 3: Face = D3D11_TEXTURECUBE_FACE_NEGATIVE_Y; break;
420	case 4: Face = D3D11_TEXTURECUBE_FACE_POSITIVE_Z; break;
421	default:
422	case 5: Face = D3D11_TEXTURECUBE_FACE_NEGATIVE_Z; break;
423	}
424	return Face;
425	}
426	#endif
427
428	/* This is to workaround issues with X8 formats, because they can't be used in some operations. */
429	#define DX_REPLACE_X8_WITH_A8
430	static DXGI_FORMAT vmsvgaDXSurfaceFormat2Dxgi(SVGA3dSurfaceFormat format)
431	{
432	/* Ensure that correct headers are used.
433	* SVGA3D_AYUV was equal to 45, then replaced with SVGA3D_FORMAT_DEAD2 = 45, and redefined as SVGA3D_AYUV = 152.
434	*/
435	AssertCompile(SVGA3D_AYUV == 152);
436
437	#define DXGI_FORMAT_ DXGI_FORMAT_UNKNOWN
438	/** @todo More formats. */
439	switch (format)
440	{
441	#ifdef DX_REPLACE_X8_WITH_A8
442	case SVGA3D_X8R8G8B8: return DXGI_FORMAT_B8G8R8A8_UNORM;
443	#else
444	case SVGA3D_X8R8G8B8: return DXGI_FORMAT_B8G8R8X8_UNORM;
445	#endif
446	case SVGA3D_A8R8G8B8: return DXGI_FORMAT_B8G8R8A8_UNORM;
447	case SVGA3D_R5G6B5: return DXGI_FORMAT_B5G6R5_UNORM;
448	case SVGA3D_X1R5G5B5: return DXGI_FORMAT_B5G5R5A1_UNORM;
449	case SVGA3D_A1R5G5B5: return DXGI_FORMAT_B5G5R5A1_UNORM;
450	case SVGA3D_A4R4G4B4: break; // 11.1 return DXGI_FORMAT_B4G4R4A4_UNORM;
451	case SVGA3D_Z_D32: break;
452	case SVGA3D_Z_D16: return DXGI_FORMAT_D16_UNORM;
453	case SVGA3D_Z_D24S8: return DXGI_FORMAT_D24_UNORM_S8_UINT;
454	case SVGA3D_Z_D15S1: break;
455	case SVGA3D_LUMINANCE8: return DXGI_FORMAT_;
456	case SVGA3D_LUMINANCE4_ALPHA4: return DXGI_FORMAT_;
457	case SVGA3D_LUMINANCE16: return DXGI_FORMAT_;
458	case SVGA3D_LUMINANCE8_ALPHA8: return DXGI_FORMAT_;
459	case SVGA3D_DXT1: return DXGI_FORMAT_;
460	case SVGA3D_DXT2: return DXGI_FORMAT_;
461	case SVGA3D_DXT3: return DXGI_FORMAT_;
462	case SVGA3D_DXT4: return DXGI_FORMAT_;
463	case SVGA3D_DXT5: return DXGI_FORMAT_;
464	case SVGA3D_BUMPU8V8: return DXGI_FORMAT_;
465	case SVGA3D_BUMPL6V5U5: return DXGI_FORMAT_;
466	case SVGA3D_BUMPX8L8V8U8: return DXGI_FORMAT_;
467	case SVGA3D_FORMAT_DEAD1: break;
468	case SVGA3D_ARGB_S10E5: return DXGI_FORMAT_;
469	case SVGA3D_ARGB_S23E8: return DXGI_FORMAT_;
470	case SVGA3D_A2R10G10B10: return DXGI_FORMAT_;
471	case SVGA3D_V8U8: return DXGI_FORMAT_;
472	case SVGA3D_Q8W8V8U8: return DXGI_FORMAT_;
473	case SVGA3D_CxV8U8: return DXGI_FORMAT_;
474	case SVGA3D_X8L8V8U8: return DXGI_FORMAT_;
475	case SVGA3D_A2W10V10U10: return DXGI_FORMAT_;
476	case SVGA3D_ALPHA8: return DXGI_FORMAT_;
477	case SVGA3D_R_S10E5: return DXGI_FORMAT_;
478	case SVGA3D_R_S23E8: return DXGI_FORMAT_;
479	case SVGA3D_RG_S10E5: return DXGI_FORMAT_;
480	case SVGA3D_RG_S23E8: return DXGI_FORMAT_;
481	case SVGA3D_BUFFER: return DXGI_FORMAT_;
482	case SVGA3D_Z_D24X8: return DXGI_FORMAT_;
483	case SVGA3D_V16U16: return DXGI_FORMAT_;
484	case SVGA3D_G16R16: return DXGI_FORMAT_;
485	case SVGA3D_A16B16G16R16: return DXGI_FORMAT_;
486	case SVGA3D_UYVY: return DXGI_FORMAT_;
487	case SVGA3D_YUY2: return DXGI_FORMAT_YUY2;
488	case SVGA3D_NV12: return DXGI_FORMAT_NV12;
489	case SVGA3D_FORMAT_DEAD2: break; /* Old SVGA3D_AYUV */
490	case SVGA3D_R32G32B32A32_TYPELESS: return DXGI_FORMAT_R32G32B32A32_TYPELESS;
491	case SVGA3D_R32G32B32A32_UINT: return DXGI_FORMAT_R32G32B32A32_UINT;
492	case SVGA3D_R32G32B32A32_SINT: return DXGI_FORMAT_R32G32B32A32_SINT;
493	case SVGA3D_R32G32B32_TYPELESS: return DXGI_FORMAT_R32G32B32_TYPELESS;
494	case SVGA3D_R32G32B32_FLOAT: return DXGI_FORMAT_R32G32B32_FLOAT;
495	case SVGA3D_R32G32B32_UINT: return DXGI_FORMAT_R32G32B32_UINT;
496	case SVGA3D_R32G32B32_SINT: return DXGI_FORMAT_R32G32B32_SINT;
497	case SVGA3D_R16G16B16A16_TYPELESS: return DXGI_FORMAT_R16G16B16A16_TYPELESS;
498	case SVGA3D_R16G16B16A16_UINT: return DXGI_FORMAT_R16G16B16A16_UINT;
499	case SVGA3D_R16G16B16A16_SNORM: return DXGI_FORMAT_R16G16B16A16_SNORM;
500	case SVGA3D_R16G16B16A16_SINT: return DXGI_FORMAT_R16G16B16A16_SINT;
501	case SVGA3D_R32G32_TYPELESS: return DXGI_FORMAT_R32G32_TYPELESS;
502	case SVGA3D_R32G32_UINT: return DXGI_FORMAT_R32G32_UINT;
503	case SVGA3D_R32G32_SINT: return DXGI_FORMAT_R32G32_SINT;
504	case SVGA3D_R32G8X24_TYPELESS: return DXGI_FORMAT_R32G8X24_TYPELESS;
505	case SVGA3D_D32_FLOAT_S8X24_UINT: return DXGI_FORMAT_D32_FLOAT_S8X24_UINT;
506	case SVGA3D_R32_FLOAT_X8X24: return DXGI_FORMAT_R32_FLOAT_X8X24_TYPELESS;
507	case SVGA3D_X32_G8X24_UINT: return DXGI_FORMAT_X32_TYPELESS_G8X24_UINT;
508	case SVGA3D_R10G10B10A2_TYPELESS: return DXGI_FORMAT_R10G10B10A2_TYPELESS;
509	case SVGA3D_R10G10B10A2_UINT: return DXGI_FORMAT_R10G10B10A2_UINT;
510	case SVGA3D_R11G11B10_FLOAT: return DXGI_FORMAT_R11G11B10_FLOAT;
511	case SVGA3D_R8G8B8A8_TYPELESS: return DXGI_FORMAT_R8G8B8A8_TYPELESS;
512	case SVGA3D_R8G8B8A8_UNORM: return DXGI_FORMAT_R8G8B8A8_UNORM;
513	case SVGA3D_R8G8B8A8_UNORM_SRGB: return DXGI_FORMAT_R8G8B8A8_UNORM_SRGB;
514	case SVGA3D_R8G8B8A8_UINT: return DXGI_FORMAT_R8G8B8A8_UINT;
515	case SVGA3D_R8G8B8A8_SINT: return DXGI_FORMAT_R8G8B8A8_SINT;
516	case SVGA3D_R16G16_TYPELESS: return DXGI_FORMAT_R16G16_TYPELESS;
517	case SVGA3D_R16G16_UINT: return DXGI_FORMAT_R16G16_UINT;
518	case SVGA3D_R16G16_SINT: return DXGI_FORMAT_R16G16_SINT;
519	case SVGA3D_R32_TYPELESS: return DXGI_FORMAT_R32_TYPELESS;
520	case SVGA3D_D32_FLOAT: return DXGI_FORMAT_D32_FLOAT;
521	case SVGA3D_R32_UINT: return DXGI_FORMAT_R32_UINT;
522	case SVGA3D_R32_SINT: return DXGI_FORMAT_R32_SINT;
523	case SVGA3D_R24G8_TYPELESS: return DXGI_FORMAT_R24G8_TYPELESS;
524	case SVGA3D_D24_UNORM_S8_UINT: return DXGI_FORMAT_D24_UNORM_S8_UINT;
525	case SVGA3D_R24_UNORM_X8: return DXGI_FORMAT_R24_UNORM_X8_TYPELESS;
526	case SVGA3D_X24_G8_UINT: return DXGI_FORMAT_X24_TYPELESS_G8_UINT;
527	case SVGA3D_R8G8_TYPELESS: return DXGI_FORMAT_R8G8_TYPELESS;
528	case SVGA3D_R8G8_UNORM: return DXGI_FORMAT_R8G8_UNORM;
529	case SVGA3D_R8G8_UINT: return DXGI_FORMAT_R8G8_UINT;
530	case SVGA3D_R8G8_SINT: return DXGI_FORMAT_R8G8_SINT;
531	case SVGA3D_R16_TYPELESS: return DXGI_FORMAT_R16_TYPELESS;
532	case SVGA3D_R16_UNORM: return DXGI_FORMAT_R16_UNORM;
533	case SVGA3D_R16_UINT: return DXGI_FORMAT_R16_UINT;
534	case SVGA3D_R16_SNORM: return DXGI_FORMAT_R16_SNORM;
535	case SVGA3D_R16_SINT: return DXGI_FORMAT_R16_SINT;
536	case SVGA3D_R8_TYPELESS: return DXGI_FORMAT_R8_TYPELESS;
537	case SVGA3D_R8_UNORM: return DXGI_FORMAT_R8_UNORM;
538	case SVGA3D_R8_UINT: return DXGI_FORMAT_R8_UINT;
539	case SVGA3D_R8_SNORM: return DXGI_FORMAT_R8_SNORM;
540	case SVGA3D_R8_SINT: return DXGI_FORMAT_R8_SINT;
541	case SVGA3D_P8: break;
542	case SVGA3D_R9G9B9E5_SHAREDEXP: return DXGI_FORMAT_R9G9B9E5_SHAREDEXP;
543	case SVGA3D_R8G8_B8G8_UNORM: return DXGI_FORMAT_R8G8_B8G8_UNORM;
544	case SVGA3D_G8R8_G8B8_UNORM: return DXGI_FORMAT_G8R8_G8B8_UNORM;
545	case SVGA3D_BC1_TYPELESS: return DXGI_FORMAT_BC1_TYPELESS;
546	case SVGA3D_BC1_UNORM_SRGB: return DXGI_FORMAT_BC1_UNORM_SRGB;
547	case SVGA3D_BC2_TYPELESS: return DXGI_FORMAT_BC2_TYPELESS;
548	case SVGA3D_BC2_UNORM_SRGB: return DXGI_FORMAT_BC2_UNORM_SRGB;
549	case SVGA3D_BC3_TYPELESS: return DXGI_FORMAT_BC3_TYPELESS;
550	case SVGA3D_BC3_UNORM_SRGB: return DXGI_FORMAT_BC3_UNORM_SRGB;
551	case SVGA3D_BC4_TYPELESS: return DXGI_FORMAT_BC4_TYPELESS;
552	case SVGA3D_ATI1: break;
553	case SVGA3D_BC4_SNORM: return DXGI_FORMAT_BC4_SNORM;
554	case SVGA3D_BC5_TYPELESS: return DXGI_FORMAT_BC5_TYPELESS;
555	case SVGA3D_ATI2: break;
556	case SVGA3D_BC5_SNORM: return DXGI_FORMAT_BC5_SNORM;
557	case SVGA3D_R10G10B10_XR_BIAS_A2_UNORM: return DXGI_FORMAT_R10G10B10_XR_BIAS_A2_UNORM;
558	case SVGA3D_B8G8R8A8_TYPELESS: return DXGI_FORMAT_B8G8R8A8_TYPELESS;
559	case SVGA3D_B8G8R8A8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8A8_UNORM_SRGB;
560	#ifdef DX_REPLACE_X8_WITH_A8
561	case SVGA3D_B8G8R8X8_TYPELESS: return DXGI_FORMAT_B8G8R8A8_TYPELESS;
562	case SVGA3D_B8G8R8X8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8A8_UNORM_SRGB;
563	#else
564	case SVGA3D_B8G8R8X8_TYPELESS: return DXGI_FORMAT_B8G8R8X8_TYPELESS;
565	case SVGA3D_B8G8R8X8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8X8_UNORM_SRGB;
566	#endif
567	case SVGA3D_Z_DF16: break;
568	case SVGA3D_Z_DF24: break;
569	case SVGA3D_Z_D24S8_INT: return DXGI_FORMAT_D24_UNORM_S8_UINT;
570	case SVGA3D_YV12: break;
571	case SVGA3D_R32G32B32A32_FLOAT: return DXGI_FORMAT_R32G32B32A32_FLOAT;
572	case SVGA3D_R16G16B16A16_FLOAT: return DXGI_FORMAT_R16G16B16A16_FLOAT;
573	case SVGA3D_R16G16B16A16_UNORM: return DXGI_FORMAT_R16G16B16A16_UNORM;
574	case SVGA3D_R32G32_FLOAT: return DXGI_FORMAT_R32G32_FLOAT;
575	case SVGA3D_R10G10B10A2_UNORM: return DXGI_FORMAT_R10G10B10A2_UNORM;
576	case SVGA3D_R8G8B8A8_SNORM: return DXGI_FORMAT_R8G8B8A8_SNORM;
577	case SVGA3D_R16G16_FLOAT: return DXGI_FORMAT_R16G16_FLOAT;
578	case SVGA3D_R16G16_UNORM: return DXGI_FORMAT_R16G16_UNORM;
579	case SVGA3D_R16G16_SNORM: return DXGI_FORMAT_R16G16_SNORM;
580	case SVGA3D_R32_FLOAT: return DXGI_FORMAT_R32_FLOAT;
581	case SVGA3D_R8G8_SNORM: return DXGI_FORMAT_R8G8_SNORM;
582	case SVGA3D_R16_FLOAT: return DXGI_FORMAT_R16_FLOAT;
583	case SVGA3D_D16_UNORM: return DXGI_FORMAT_D16_UNORM;
584	case SVGA3D_A8_UNORM: return DXGI_FORMAT_A8_UNORM;
585	case SVGA3D_BC1_UNORM: return DXGI_FORMAT_BC1_UNORM;
586	case SVGA3D_BC2_UNORM: return DXGI_FORMAT_BC2_UNORM;
587	case SVGA3D_BC3_UNORM: return DXGI_FORMAT_BC3_UNORM;
588	case SVGA3D_B5G6R5_UNORM: return DXGI_FORMAT_B5G6R5_UNORM;
589	case SVGA3D_B5G5R5A1_UNORM: return DXGI_FORMAT_B5G5R5A1_UNORM;
590	case SVGA3D_B8G8R8A8_UNORM: return DXGI_FORMAT_B8G8R8A8_UNORM;
591	#ifdef DX_REPLACE_X8_WITH_A8
592	case SVGA3D_B8G8R8X8_UNORM: return DXGI_FORMAT_B8G8R8A8_UNORM;
593	#else
594	case SVGA3D_B8G8R8X8_UNORM: return DXGI_FORMAT_B8G8R8X8_UNORM;
595	#endif
596	case SVGA3D_BC4_UNORM: return DXGI_FORMAT_BC4_UNORM;
597	case SVGA3D_BC5_UNORM: return DXGI_FORMAT_BC5_UNORM;
598
599	case SVGA3D_B4G4R4A4_UNORM: return DXGI_FORMAT_;
600	case SVGA3D_BC6H_TYPELESS: return DXGI_FORMAT_BC6H_TYPELESS;
601	case SVGA3D_BC6H_UF16: return DXGI_FORMAT_BC6H_UF16;
602	case SVGA3D_BC6H_SF16: return DXGI_FORMAT_BC6H_SF16;
603	case SVGA3D_BC7_TYPELESS: return DXGI_FORMAT_BC7_TYPELESS;
604	case SVGA3D_BC7_UNORM: return DXGI_FORMAT_BC7_UNORM;
605	case SVGA3D_BC7_UNORM_SRGB: return DXGI_FORMAT_BC7_UNORM_SRGB;
606	case SVGA3D_AYUV: return DXGI_FORMAT_AYUV;
607
608	case SVGA3D_FORMAT_INVALID:
609	case SVGA3D_FORMAT_MAX: break;
610	}
611	// AssertFailed();
612	return DXGI_FORMAT_UNKNOWN;
613	#undef DXGI_FORMAT_
614	}
615
616
617	static SVGA3dSurfaceFormat vmsvgaDXDevCapSurfaceFmt2Format(SVGA3dDevCapIndex enmDevCap)
618	{
619	switch (enmDevCap)
620	{
621	case SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8: return SVGA3D_X8R8G8B8;
622	case SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8: return SVGA3D_A8R8G8B8;
623	case SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10: return SVGA3D_A2R10G10B10;
624	case SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5: return SVGA3D_X1R5G5B5;
625	case SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5: return SVGA3D_A1R5G5B5;
626	case SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4: return SVGA3D_A4R4G4B4;
627	case SVGA3D_DEVCAP_SURFACEFMT_R5G6B5: return SVGA3D_R5G6B5;
628	case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16: return SVGA3D_LUMINANCE16;
629	case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8: return SVGA3D_LUMINANCE8_ALPHA8;
630	case SVGA3D_DEVCAP_SURFACEFMT_ALPHA8: return SVGA3D_ALPHA8;
631	case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8: return SVGA3D_LUMINANCE8;
632	case SVGA3D_DEVCAP_SURFACEFMT_Z_D16: return SVGA3D_Z_D16;
633	case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8: return SVGA3D_Z_D24S8;
634	case SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8: return SVGA3D_Z_D24X8;
635	case SVGA3D_DEVCAP_SURFACEFMT_DXT1: return SVGA3D_DXT1;
636	case SVGA3D_DEVCAP_SURFACEFMT_DXT2: return SVGA3D_DXT2;
637	case SVGA3D_DEVCAP_SURFACEFMT_DXT3: return SVGA3D_DXT3;
638	case SVGA3D_DEVCAP_SURFACEFMT_DXT4: return SVGA3D_DXT4;
639	case SVGA3D_DEVCAP_SURFACEFMT_DXT5: return SVGA3D_DXT5;
640	case SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8: return SVGA3D_BUMPX8L8V8U8;
641	case SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10: return SVGA3D_A2W10V10U10;
642	case SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8: return SVGA3D_BUMPU8V8;
643	case SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8: return SVGA3D_Q8W8V8U8;
644	case SVGA3D_DEVCAP_SURFACEFMT_CxV8U8: return SVGA3D_CxV8U8;
645	case SVGA3D_DEVCAP_SURFACEFMT_R_S10E5: return SVGA3D_R_S10E5;
646	case SVGA3D_DEVCAP_SURFACEFMT_R_S23E8: return SVGA3D_R_S23E8;
647	case SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5: return SVGA3D_RG_S10E5;
648	case SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8: return SVGA3D_RG_S23E8;
649	case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5: return SVGA3D_ARGB_S10E5;
650	case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8: return SVGA3D_ARGB_S23E8;
651	case SVGA3D_DEVCAP_SURFACEFMT_V16U16: return SVGA3D_V16U16;
652	case SVGA3D_DEVCAP_SURFACEFMT_G16R16: return SVGA3D_G16R16;
653	case SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16: return SVGA3D_A16B16G16R16;
654	case SVGA3D_DEVCAP_SURFACEFMT_UYVY: return SVGA3D_UYVY;
655	case SVGA3D_DEVCAP_SURFACEFMT_YUY2: return SVGA3D_YUY2;
656	case SVGA3D_DEVCAP_SURFACEFMT_NV12: return SVGA3D_NV12;
657	case SVGA3D_DEVCAP_DEAD10: return SVGA3D_FORMAT_DEAD2; /* SVGA3D_DEVCAP_SURFACEFMT_AYUV -> SVGA3D_AYUV */
658	case SVGA3D_DEVCAP_SURFACEFMT_Z_DF16: return SVGA3D_Z_DF16;
659	case SVGA3D_DEVCAP_SURFACEFMT_Z_DF24: return SVGA3D_Z_DF24;
660	case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT: return SVGA3D_Z_D24S8_INT;
661	case SVGA3D_DEVCAP_SURFACEFMT_ATI1: return SVGA3D_ATI1;
662	case SVGA3D_DEVCAP_SURFACEFMT_ATI2: return SVGA3D_ATI2;
663	case SVGA3D_DEVCAP_SURFACEFMT_YV12: return SVGA3D_YV12;
664	default:
665	AssertFailed();
666	break;
667	}
668	return SVGA3D_FORMAT_INVALID;
669	}
670
671
672	static SVGA3dSurfaceFormat vmsvgaDXDevCapDxfmt2Format(SVGA3dDevCapIndex enmDevCap)
673	{
674	switch (enmDevCap)
675	{
676	case SVGA3D_DEVCAP_DXFMT_X8R8G8B8: return SVGA3D_X8R8G8B8;
677	case SVGA3D_DEVCAP_DXFMT_A8R8G8B8: return SVGA3D_A8R8G8B8;
678	case SVGA3D_DEVCAP_DXFMT_R5G6B5: return SVGA3D_R5G6B5;
679	case SVGA3D_DEVCAP_DXFMT_X1R5G5B5: return SVGA3D_X1R5G5B5;
680	case SVGA3D_DEVCAP_DXFMT_A1R5G5B5: return SVGA3D_A1R5G5B5;
681	case SVGA3D_DEVCAP_DXFMT_A4R4G4B4: return SVGA3D_A4R4G4B4;
682	case SVGA3D_DEVCAP_DXFMT_Z_D32: return SVGA3D_Z_D32;
683	case SVGA3D_DEVCAP_DXFMT_Z_D16: return SVGA3D_Z_D16;
684	case SVGA3D_DEVCAP_DXFMT_Z_D24S8: return SVGA3D_Z_D24S8;
685	case SVGA3D_DEVCAP_DXFMT_Z_D15S1: return SVGA3D_Z_D15S1;
686	case SVGA3D_DEVCAP_DXFMT_LUMINANCE8: return SVGA3D_LUMINANCE8;
687	case SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4: return SVGA3D_LUMINANCE4_ALPHA4;
688	case SVGA3D_DEVCAP_DXFMT_LUMINANCE16: return SVGA3D_LUMINANCE16;
689	case SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8: return SVGA3D_LUMINANCE8_ALPHA8;
690	case SVGA3D_DEVCAP_DXFMT_DXT1: return SVGA3D_DXT1;
691	case SVGA3D_DEVCAP_DXFMT_DXT2: return SVGA3D_DXT2;
692	case SVGA3D_DEVCAP_DXFMT_DXT3: return SVGA3D_DXT3;
693	case SVGA3D_DEVCAP_DXFMT_DXT4: return SVGA3D_DXT4;
694	case SVGA3D_DEVCAP_DXFMT_DXT5: return SVGA3D_DXT5;
695	case SVGA3D_DEVCAP_DXFMT_BUMPU8V8: return SVGA3D_BUMPU8V8;
696	case SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5: return SVGA3D_BUMPL6V5U5;
697	case SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8: return SVGA3D_BUMPX8L8V8U8;
698	case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1: return SVGA3D_FORMAT_DEAD1;
699	case SVGA3D_DEVCAP_DXFMT_ARGB_S10E5: return SVGA3D_ARGB_S10E5;
700	case SVGA3D_DEVCAP_DXFMT_ARGB_S23E8: return SVGA3D_ARGB_S23E8;
701	case SVGA3D_DEVCAP_DXFMT_A2R10G10B10: return SVGA3D_A2R10G10B10;
702	case SVGA3D_DEVCAP_DXFMT_V8U8: return SVGA3D_V8U8;
703	case SVGA3D_DEVCAP_DXFMT_Q8W8V8U8: return SVGA3D_Q8W8V8U8;
704	case SVGA3D_DEVCAP_DXFMT_CxV8U8: return SVGA3D_CxV8U8;
705	case SVGA3D_DEVCAP_DXFMT_X8L8V8U8: return SVGA3D_X8L8V8U8;
706	case SVGA3D_DEVCAP_DXFMT_A2W10V10U10: return SVGA3D_A2W10V10U10;
707	case SVGA3D_DEVCAP_DXFMT_ALPHA8: return SVGA3D_ALPHA8;
708	case SVGA3D_DEVCAP_DXFMT_R_S10E5: return SVGA3D_R_S10E5;
709	case SVGA3D_DEVCAP_DXFMT_R_S23E8: return SVGA3D_R_S23E8;
710	case SVGA3D_DEVCAP_DXFMT_RG_S10E5: return SVGA3D_RG_S10E5;
711	case SVGA3D_DEVCAP_DXFMT_RG_S23E8: return SVGA3D_RG_S23E8;
712	case SVGA3D_DEVCAP_DXFMT_BUFFER: return SVGA3D_BUFFER;
713	case SVGA3D_DEVCAP_DXFMT_Z_D24X8: return SVGA3D_Z_D24X8;
714	case SVGA3D_DEVCAP_DXFMT_V16U16: return SVGA3D_V16U16;
715	case SVGA3D_DEVCAP_DXFMT_G16R16: return SVGA3D_G16R16;
716	case SVGA3D_DEVCAP_DXFMT_A16B16G16R16: return SVGA3D_A16B16G16R16;
717	case SVGA3D_DEVCAP_DXFMT_UYVY: return SVGA3D_UYVY;
718	case SVGA3D_DEVCAP_DXFMT_YUY2: return SVGA3D_YUY2;
719	case SVGA3D_DEVCAP_DXFMT_NV12: return SVGA3D_NV12;
720	case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD2: return SVGA3D_FORMAT_DEAD2; /* SVGA3D_DEVCAP_DXFMT_AYUV -> SVGA3D_AYUV */
721	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS: return SVGA3D_R32G32B32A32_TYPELESS;
722	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT: return SVGA3D_R32G32B32A32_UINT;
723	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT: return SVGA3D_R32G32B32A32_SINT;
724	case SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS: return SVGA3D_R32G32B32_TYPELESS;
725	case SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT: return SVGA3D_R32G32B32_FLOAT;
726	case SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT: return SVGA3D_R32G32B32_UINT;
727	case SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT: return SVGA3D_R32G32B32_SINT;
728	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS: return SVGA3D_R16G16B16A16_TYPELESS;
729	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT: return SVGA3D_R16G16B16A16_UINT;
730	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM: return SVGA3D_R16G16B16A16_SNORM;
731	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT: return SVGA3D_R16G16B16A16_SINT;
732	case SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS: return SVGA3D_R32G32_TYPELESS;
733	case SVGA3D_DEVCAP_DXFMT_R32G32_UINT: return SVGA3D_R32G32_UINT;
734	case SVGA3D_DEVCAP_DXFMT_R32G32_SINT: return SVGA3D_R32G32_SINT;
735	case SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS: return SVGA3D_R32G8X24_TYPELESS;
736	case SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT: return SVGA3D_D32_FLOAT_S8X24_UINT;
737	case SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24: return SVGA3D_R32_FLOAT_X8X24;
738	case SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT: return SVGA3D_X32_G8X24_UINT;
739	case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS: return SVGA3D_R10G10B10A2_TYPELESS;
740	case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT: return SVGA3D_R10G10B10A2_UINT;
741	case SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT: return SVGA3D_R11G11B10_FLOAT;
742	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS: return SVGA3D_R8G8B8A8_TYPELESS;
743	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM: return SVGA3D_R8G8B8A8_UNORM;
744	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB: return SVGA3D_R8G8B8A8_UNORM_SRGB;
745	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT: return SVGA3D_R8G8B8A8_UINT;
746	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT: return SVGA3D_R8G8B8A8_SINT;
747	case SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS: return SVGA3D_R16G16_TYPELESS;
748	case SVGA3D_DEVCAP_DXFMT_R16G16_UINT: return SVGA3D_R16G16_UINT;
749	case SVGA3D_DEVCAP_DXFMT_R16G16_SINT: return SVGA3D_R16G16_SINT;
750	case SVGA3D_DEVCAP_DXFMT_R32_TYPELESS: return SVGA3D_R32_TYPELESS;
751	case SVGA3D_DEVCAP_DXFMT_D32_FLOAT: return SVGA3D_D32_FLOAT;
752	case SVGA3D_DEVCAP_DXFMT_R32_UINT: return SVGA3D_R32_UINT;
753	case SVGA3D_DEVCAP_DXFMT_R32_SINT: return SVGA3D_R32_SINT;
754	case SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS: return SVGA3D_R24G8_TYPELESS;
755	case SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT: return SVGA3D_D24_UNORM_S8_UINT;
756	case SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8: return SVGA3D_R24_UNORM_X8;
757	case SVGA3D_DEVCAP_DXFMT_X24_G8_UINT: return SVGA3D_X24_G8_UINT;
758	case SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS: return SVGA3D_R8G8_TYPELESS;
759	case SVGA3D_DEVCAP_DXFMT_R8G8_UNORM: return SVGA3D_R8G8_UNORM;
760	case SVGA3D_DEVCAP_DXFMT_R8G8_UINT: return SVGA3D_R8G8_UINT;
761	case SVGA3D_DEVCAP_DXFMT_R8G8_SINT: return SVGA3D_R8G8_SINT;
762	case SVGA3D_DEVCAP_DXFMT_R16_TYPELESS: return SVGA3D_R16_TYPELESS;
763	case SVGA3D_DEVCAP_DXFMT_R16_UNORM: return SVGA3D_R16_UNORM;
764	case SVGA3D_DEVCAP_DXFMT_R16_UINT: return SVGA3D_R16_UINT;
765	case SVGA3D_DEVCAP_DXFMT_R16_SNORM: return SVGA3D_R16_SNORM;
766	case SVGA3D_DEVCAP_DXFMT_R16_SINT: return SVGA3D_R16_SINT;
767	case SVGA3D_DEVCAP_DXFMT_R8_TYPELESS: return SVGA3D_R8_TYPELESS;
768	case SVGA3D_DEVCAP_DXFMT_R8_UNORM: return SVGA3D_R8_UNORM;
769	case SVGA3D_DEVCAP_DXFMT_R8_UINT: return SVGA3D_R8_UINT;
770	case SVGA3D_DEVCAP_DXFMT_R8_SNORM: return SVGA3D_R8_SNORM;
771	case SVGA3D_DEVCAP_DXFMT_R8_SINT: return SVGA3D_R8_SINT;
772	case SVGA3D_DEVCAP_DXFMT_P8: return SVGA3D_P8;
773	case SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP: return SVGA3D_R9G9B9E5_SHAREDEXP;
774	case SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM: return SVGA3D_R8G8_B8G8_UNORM;
775	case SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM: return SVGA3D_G8R8_G8B8_UNORM;
776	case SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS: return SVGA3D_BC1_TYPELESS;
777	case SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB: return SVGA3D_BC1_UNORM_SRGB;
778	case SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS: return SVGA3D_BC2_TYPELESS;
779	case SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB: return SVGA3D_BC2_UNORM_SRGB;
780	case SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS: return SVGA3D_BC3_TYPELESS;
781	case SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB: return SVGA3D_BC3_UNORM_SRGB;
782	case SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS: return SVGA3D_BC4_TYPELESS;
783	case SVGA3D_DEVCAP_DXFMT_ATI1: return SVGA3D_ATI1;
784	case SVGA3D_DEVCAP_DXFMT_BC4_SNORM: return SVGA3D_BC4_SNORM;
785	case SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS: return SVGA3D_BC5_TYPELESS;
786	case SVGA3D_DEVCAP_DXFMT_ATI2: return SVGA3D_ATI2;
787	case SVGA3D_DEVCAP_DXFMT_BC5_SNORM: return SVGA3D_BC5_SNORM;
788	case SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM: return SVGA3D_R10G10B10_XR_BIAS_A2_UNORM;
789	case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS: return SVGA3D_B8G8R8A8_TYPELESS;
790	case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB: return SVGA3D_B8G8R8A8_UNORM_SRGB;
791	case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS: return SVGA3D_B8G8R8X8_TYPELESS;
792	case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB: return SVGA3D_B8G8R8X8_UNORM_SRGB;
793	case SVGA3D_DEVCAP_DXFMT_Z_DF16: return SVGA3D_Z_DF16;
794	case SVGA3D_DEVCAP_DXFMT_Z_DF24: return SVGA3D_Z_DF24;
795	case SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT: return SVGA3D_Z_D24S8_INT;
796	case SVGA3D_DEVCAP_DXFMT_YV12: return SVGA3D_YV12;
797	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT: return SVGA3D_R32G32B32A32_FLOAT;
798	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT: return SVGA3D_R16G16B16A16_FLOAT;
799	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM: return SVGA3D_R16G16B16A16_UNORM;
800	case SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT: return SVGA3D_R32G32_FLOAT;
801	case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM: return SVGA3D_R10G10B10A2_UNORM;
802	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM: return SVGA3D_R8G8B8A8_SNORM;
803	case SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT: return SVGA3D_R16G16_FLOAT;
804	case SVGA3D_DEVCAP_DXFMT_R16G16_UNORM: return SVGA3D_R16G16_UNORM;
805	case SVGA3D_DEVCAP_DXFMT_R16G16_SNORM: return SVGA3D_R16G16_SNORM;
806	case SVGA3D_DEVCAP_DXFMT_R32_FLOAT: return SVGA3D_R32_FLOAT;
807	case SVGA3D_DEVCAP_DXFMT_R8G8_SNORM: return SVGA3D_R8G8_SNORM;
808	case SVGA3D_DEVCAP_DXFMT_R16_FLOAT: return SVGA3D_R16_FLOAT;
809	case SVGA3D_DEVCAP_DXFMT_D16_UNORM: return SVGA3D_D16_UNORM;
810	case SVGA3D_DEVCAP_DXFMT_A8_UNORM: return SVGA3D_A8_UNORM;
811	case SVGA3D_DEVCAP_DXFMT_BC1_UNORM: return SVGA3D_BC1_UNORM;
812	case SVGA3D_DEVCAP_DXFMT_BC2_UNORM: return SVGA3D_BC2_UNORM;
813	case SVGA3D_DEVCAP_DXFMT_BC3_UNORM: return SVGA3D_BC3_UNORM;
814	case SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM: return SVGA3D_B5G6R5_UNORM;
815	case SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM: return SVGA3D_B5G5R5A1_UNORM;
816	case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM: return SVGA3D_B8G8R8A8_UNORM;
817	case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM: return SVGA3D_B8G8R8X8_UNORM;
818	case SVGA3D_DEVCAP_DXFMT_BC4_UNORM: return SVGA3D_BC4_UNORM;
819	case SVGA3D_DEVCAP_DXFMT_BC5_UNORM: return SVGA3D_BC5_UNORM;
820	case SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS: return SVGA3D_BC6H_TYPELESS;
821	case SVGA3D_DEVCAP_DXFMT_BC6H_UF16: return SVGA3D_BC6H_UF16;
822	case SVGA3D_DEVCAP_DXFMT_BC6H_SF16: return SVGA3D_BC6H_SF16;
823	case SVGA3D_DEVCAP_DXFMT_BC7_TYPELESS: return SVGA3D_BC7_TYPELESS;
824	case SVGA3D_DEVCAP_DXFMT_BC7_UNORM: return SVGA3D_BC7_UNORM;
825	case SVGA3D_DEVCAP_DXFMT_BC7_UNORM_SRGB: return SVGA3D_BC7_UNORM_SRGB;
826	default:
827	AssertFailed();
828	break;
829	}
830	return SVGA3D_FORMAT_INVALID;
831	}
832
833
834	static int vmsvgaDXCheckFormatSupportPreDX(PVMSVGA3DSTATE pState, SVGA3dSurfaceFormat enmFormat, uint32_t *pu32DevCap)
835	{
836	int rc = VINF_SUCCESS;
837
838	*pu32DevCap = 0;
839
840	DXGI_FORMAT const dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(enmFormat);
841	if (dxgiFormat != DXGI_FORMAT_UNKNOWN)
842	{
843	RT_NOREF(pState);
844	/** @todo Implement */
845	}
846	else
847	rc = VERR_NOT_SUPPORTED;
848	return rc;
849	}
850
851	static int vmsvgaDXCheckFormatSupport(PVMSVGA3DSTATE pState, SVGA3dSurfaceFormat enmFormat, uint32_t *pu32DevCap)
852	{
853	int rc = VINF_SUCCESS;
854
855	*pu32DevCap = 0;
856
857	DXGI_FORMAT const dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(enmFormat);
858	if (dxgiFormat != DXGI_FORMAT_UNKNOWN)
859	{
860	ID3D11Device *pDevice = pState->pBackend->dxDevice.pDevice;
861	UINT FormatSupport = 0;
862	HRESULT hr = pDevice->CheckFormatSupport(dxgiFormat, &FormatSupport);
863	if (SUCCEEDED(hr))
864	{
865	*pu32DevCap \|= SVGA3D_DXFMT_SUPPORTED;
866
867	if (FormatSupport & D3D11_FORMAT_SUPPORT_SHADER_SAMPLE)
868	*pu32DevCap \|= SVGA3D_DXFMT_SHADER_SAMPLE;
869
870	if (FormatSupport & D3D11_FORMAT_SUPPORT_RENDER_TARGET)
871	*pu32DevCap \|= SVGA3D_DXFMT_COLOR_RENDERTARGET;
872
873	if (FormatSupport & D3D11_FORMAT_SUPPORT_DEPTH_STENCIL)
874	*pu32DevCap \|= SVGA3D_DXFMT_DEPTH_RENDERTARGET;
875
876	if (FormatSupport & D3D11_FORMAT_SUPPORT_BLENDABLE)
877	*pu32DevCap \|= SVGA3D_DXFMT_BLENDABLE;
878
879	if (FormatSupport & D3D11_FORMAT_SUPPORT_MIP)
880	*pu32DevCap \|= SVGA3D_DXFMT_MIPS;
881
882	if (FormatSupport & D3D11_FORMAT_SUPPORT_TEXTURECUBE)
883	*pu32DevCap \|= SVGA3D_DXFMT_ARRAY;
884
885	if (FormatSupport & D3D11_FORMAT_SUPPORT_TEXTURE3D)
886	*pu32DevCap \|= SVGA3D_DXFMT_VOLUME;
887
888	if (FormatSupport & D3D11_FORMAT_SUPPORT_IA_VERTEX_BUFFER)
889	*pu32DevCap \|= SVGA3D_DXFMT_DX_VERTEX_BUFFER;
890
891	if (pState->pBackend->dxDevice.MultisampleCountMask != 0)
892	{
893	UINT NumQualityLevels;
894	hr = pDevice->CheckMultisampleQualityLevels(dxgiFormat, 2, &NumQualityLevels);
895	if (SUCCEEDED(hr) && NumQualityLevels != 0)
896	*pu32DevCap \|= SVGA3D_DXFMT_MULTISAMPLE;
897	}
898	}
899	else
900	{
901	LogFunc(("CheckFormatSupport failed for 0x%08x, hr = 0x%08x\n", dxgiFormat, hr));
902	rc = VERR_NOT_SUPPORTED;
903	}
904	}
905	else
906	rc = VERR_NOT_SUPPORTED;
907	return rc;
908	}
909
910
911	static void dxLogRelVideoCaps(ID3D11VideoDevice *pVideoDevice)
912	{
913	#define FORMAT_ELEMENT(aFormat) { aFormat, #aFormat }
914	static const struct {
915	DXGI_FORMAT format;
916	char const *pszFormat;
917	} aVDFormats[] =
918	{
919	FORMAT_ELEMENT(DXGI_FORMAT_NV12),
920	FORMAT_ELEMENT(DXGI_FORMAT_YUY2),
921	FORMAT_ELEMENT(DXGI_FORMAT_AYUV),
922	};
923
924	static const struct {
925	DXGI_FORMAT format;
926	char const *pszFormat;
927	} aVPFormats[] =
928	{
929	// Queried from driver
930	FORMAT_ELEMENT(DXGI_FORMAT_R8_UNORM),
931	FORMAT_ELEMENT(DXGI_FORMAT_R16_UNORM),
932	FORMAT_ELEMENT(DXGI_FORMAT_NV12),
933	FORMAT_ELEMENT(DXGI_FORMAT_420_OPAQUE),
934	FORMAT_ELEMENT(DXGI_FORMAT_P010),
935	FORMAT_ELEMENT(DXGI_FORMAT_P016),
936	FORMAT_ELEMENT(DXGI_FORMAT_YUY2),
937	FORMAT_ELEMENT(DXGI_FORMAT_NV11),
938	FORMAT_ELEMENT(DXGI_FORMAT_AYUV),
939	FORMAT_ELEMENT(DXGI_FORMAT_R16G16B16A16_FLOAT),
940	FORMAT_ELEMENT(DXGI_FORMAT_Y216),
941	FORMAT_ELEMENT(DXGI_FORMAT_B8G8R8X8_UNORM),
942	FORMAT_ELEMENT(DXGI_FORMAT_B8G8R8A8_UNORM),
943	FORMAT_ELEMENT(DXGI_FORMAT_R8G8B8A8_UNORM),
944	FORMAT_ELEMENT(DXGI_FORMAT_R10G10B10A2_UNORM),
945
946	// From format table
947	FORMAT_ELEMENT(DXGI_FORMAT_R10G10B10_XR_BIAS_A2_UNORM),
948	FORMAT_ELEMENT(DXGI_FORMAT_R8G8B8A8_UNORM_SRGB),
949	FORMAT_ELEMENT(DXGI_FORMAT_B8G8R8A8_UNORM_SRGB),
950	FORMAT_ELEMENT(DXGI_FORMAT_Y410),
951	FORMAT_ELEMENT(DXGI_FORMAT_Y416),
952	FORMAT_ELEMENT(DXGI_FORMAT_Y210),
953	FORMAT_ELEMENT(DXGI_FORMAT_AI44),
954	FORMAT_ELEMENT(DXGI_FORMAT_IA44),
955	FORMAT_ELEMENT(DXGI_FORMAT_P8),
956	FORMAT_ELEMENT(DXGI_FORMAT_A8P8),
957	};
958	#undef FORMAT_ELEMENT
959
960	static char const *apszFilterName[] =
961	{
962	"BRIGHTNESS",
963	"CONTRAST",
964	"HUE",
965	"SATURATION",
966	"NOISE_REDUCTION",
967	"EDGE_ENHANCEMENT",
968	"ANAMORPHIC_SCALING",
969	"STEREO_ADJUSTMENT",
970	};
971
972	HRESULT hr;
973
974	UINT cProfiles = pVideoDevice->GetVideoDecoderProfileCount();
975	for (UINT i = 0; i < cProfiles; ++i)
976	{
977	GUID DecodeProfile;
978	hr = pVideoDevice->GetVideoDecoderProfile(i, &DecodeProfile);
979	if (SUCCEEDED(hr))
980	LogRel(("VMSVGA: DecodeProfile[%d]: %RTuuid\n", i, &DecodeProfile));
981	}
982
983	D3D11_VIDEO_DECODER_DESC DecoderDesc;
984	// Commonly used D3D11_DECODER_PROFILE_H264_VLD_NOFGT
985	DecoderDesc.Guid = { 0x1b81be68, 0xa0c7,0x11d3,0xb9,0x84,0x00,0xc0,0x4f,0x2e,0x73,0xc5 };
986	DecoderDesc.SampleWidth = 1920;
987	DecoderDesc.SampleHeight = 1080;
988	DecoderDesc.OutputFormat = DXGI_FORMAT_NV12;
989
990	UINT cConfigs = 0;
991	hr = pVideoDevice->GetVideoDecoderConfigCount(&DecoderDesc, &cConfigs);
992	for (UINT i = 0; i < cConfigs; ++i)
993	{
994	D3D11_VIDEO_DECODER_CONFIG DecoderConfig;
995	hr = pVideoDevice->GetVideoDecoderConfig(&DecoderDesc, i, &DecoderConfig);
996	if (SUCCEEDED(hr))
997	{
998	LogRel2(("VMSVGA: Config[%d]:\n"
999	"VMSVGA: %RTuuid\n"
1000	"VMSVGA: %RTuuid\n"
1001	"VMSVGA: %RTuuid\n"
1002	"VMSVGA: BitstreamRaw 0x%x\n"
1003	"VMSVGA: MBCRO 0x%x\n"
1004	"VMSVGA: RDH 0x%x\n"
1005	"VMSVGA: SR8 0x%x\n"
1006	"VMSVGA: R8Sub 0x%x\n"
1007	"VMSVGA: SH8or9C 0x%x\n"
1008	"VMSVGA: SRInterlea 0x%x\n"
1009	"VMSVGA: IRUnsigned 0x%x\n"
1010	"VMSVGA: RDAccel 0x%x\n"
1011	"VMSVGA: HInvScan 0x%x\n"
1012	"VMSVGA: SpecIDCT 0x%x\n"
1013	"VMSVGA: 4GCoefs 0x%x\n"
1014	"VMSVGA: MinRTBC 0x%x\n"
1015	"VMSVGA: DecSpec 0x%x\n"
1016	,
1017	i, &DecoderConfig.guidConfigBitstreamEncryption,
1018	&DecoderConfig.guidConfigMBcontrolEncryption,
1019	&DecoderConfig.guidConfigResidDiffEncryption,
1020	DecoderConfig.ConfigBitstreamRaw,
1021	DecoderConfig.ConfigMBcontrolRasterOrder,
1022	DecoderConfig.ConfigResidDiffHost,
1023	DecoderConfig.ConfigSpatialResid8,
1024	DecoderConfig.ConfigResid8Subtraction,
1025	DecoderConfig.ConfigSpatialHost8or9Clipping,
1026	DecoderConfig.ConfigSpatialResidInterleaved,
1027	DecoderConfig.ConfigIntraResidUnsigned,
1028	DecoderConfig.ConfigResidDiffAccelerator,
1029	DecoderConfig.ConfigHostInverseScan,
1030	DecoderConfig.ConfigSpecificIDCT,
1031	DecoderConfig.Config4GroupedCoefs,
1032	DecoderConfig.ConfigMinRenderTargetBuffCount,
1033	DecoderConfig.ConfigDecoderSpecific
1034	));
1035	}
1036	}
1037
1038	for (UINT idxFormat = 0; idxFormat < RT_ELEMENTS(aVDFormats); ++idxFormat)
1039	{
1040	BOOL Supported;
1041	hr = pVideoDevice->CheckVideoDecoderFormat(&DecoderDesc.Guid, aVDFormats[idxFormat].format, &Supported);
1042	if (FAILED(hr))
1043	Supported = FALSE;
1044	LogRel(("VMSVGA: %s: %s\n", aVDFormats[idxFormat].pszFormat, Supported ? "supported" : "-"));
1045	}
1046
1047	/* An arbitrary common video content. */
1048	D3D11_VIDEO_PROCESSOR_CONTENT_DESC Desc;
1049	Desc.InputFrameFormat = D3D11_VIDEO_FRAME_FORMAT_PROGRESSIVE;
1050	Desc.InputFrameRate.Numerator = 25;
1051	Desc.InputFrameRate.Denominator = 1;
1052	Desc.InputWidth = 1920;
1053	Desc.InputHeight = 1080;
1054	Desc.OutputFrameRate.Numerator = 30;
1055	Desc.OutputFrameRate.Denominator = 1;
1056	Desc.OutputWidth = 864;
1057	Desc.OutputHeight = 486;
1058	Desc.Usage = D3D11_VIDEO_USAGE_OPTIMAL_QUALITY;
1059
1060	ID3D11VideoProcessorEnumerator *pEnum = 0;
1061	hr = pVideoDevice->CreateVideoProcessorEnumerator(&Desc, &pEnum);
1062	if (SUCCEEDED(hr))
1063	{
1064	for (unsigned i = 0; i < RT_ELEMENTS(aVPFormats); ++i)
1065	{
1066	UINT Flags;
1067	hr = pEnum->CheckVideoProcessorFormat(aVPFormats[i].format, &Flags);
1068	if (FAILED(hr))
1069	Flags = 0;
1070	LogRel(("VMSVGA: %s: flags %x\n", aVPFormats[i].pszFormat, Flags));
1071	}
1072
1073	D3D11_VIDEO_PROCESSOR_CAPS Caps;
1074	hr = pEnum->GetVideoProcessorCaps(&Caps);
1075	if (SUCCEEDED(hr))
1076	{
1077	LogRel(("VMSVGA: VideoProcessorCaps:\n"
1078	"VMSVGA: DeviceCaps %x\n"
1079	"VMSVGA: FeatureCaps %x\n"
1080	"VMSVGA: FilterCaps %x\n"
1081	"VMSVGA: InputFormatCaps %x\n"
1082	"VMSVGA: AutoStreamCaps %x\n"
1083	"VMSVGA: StereoCaps %x\n"
1084	"VMSVGA: RateConversionCapsCount %d\n"
1085	"VMSVGA: MaxInputStreams %d\n"
1086	"VMSVGA: MaxStreamStates %d\n"
1087	"",
1088	Caps.DeviceCaps,
1089	Caps.FeatureCaps,
1090	Caps.FilterCaps,
1091	Caps.InputFormatCaps,
1092	Caps.AutoStreamCaps,
1093	Caps.StereoCaps,
1094	Caps.RateConversionCapsCount,
1095	Caps.MaxInputStreams,
1096	Caps.MaxStreamStates
1097	));
1098
1099	for (unsigned i = 0; i < RT_ELEMENTS(apszFilterName); ++i)
1100	{
1101	if (Caps.FilterCaps & (1 << i))
1102	{
1103	D3D11_VIDEO_PROCESSOR_FILTER_RANGE Range;
1104	hr = pEnum->GetVideoProcessorFilterRange((D3D11_VIDEO_PROCESSOR_FILTER)i, &Range);
1105	if (SUCCEEDED(hr))
1106	{
1107	LogRel(("VMSVGA: Filter[%s]: Min %d, Max %d, Default %d, Multiplier " FLOAT_FMT_STR "\n",
1108	apszFilterName[i],
1109	Range.Minimum,
1110	Range.Maximum,
1111	Range.Default,
1112	FLOAT_FMT_ARGS(Range.Multiplier)
1113	));
1114	}
1115	}
1116	}
1117
1118	for (unsigned idxRateCaps = 0; idxRateCaps < Caps.RateConversionCapsCount; ++idxRateCaps)
1119	{
1120	D3D11_VIDEO_PROCESSOR_RATE_CONVERSION_CAPS RateCaps;
1121	hr = pEnum->GetVideoProcessorRateConversionCaps(idxRateCaps, &RateCaps);
1122	if (SUCCEEDED(hr))
1123	{
1124	LogRel(("VMSVGA: RateConversionCaps[%u]:\n"
1125	"VMSVGA: PastFrames %d\n"
1126	"VMSVGA: FutureFrames %d\n"
1127	"VMSVGA: ProcessorCaps %x\n"
1128	"VMSVGA: ITelecineCaps %x\n"
1129	"VMSVGA: CustomRateCount %d\n"
1130	"",
1131	idxRateCaps,
1132	RateCaps.PastFrames,
1133	RateCaps.FutureFrames,
1134	RateCaps.ProcessorCaps,
1135	RateCaps.ITelecineCaps,
1136	RateCaps.CustomRateCount
1137	));
1138
1139	for (unsigned idxCustomRateCap = 0; idxCustomRateCap < RateCaps.CustomRateCount; ++idxCustomRateCap)
1140	{
1141	D3D11_VIDEO_PROCESSOR_CUSTOM_RATE Rate;
1142	hr = pEnum->GetVideoProcessorCustomRate(idxRateCaps, idxCustomRateCap, &Rate);
1143	if (SUCCEEDED(hr))
1144	{
1145	LogRel(("VMSVGA: CustomRate[%u][%u]:\n"
1146	"VMSVGA: CustomRate %d/%d\n"
1147	"VMSVGA: OutputFrames %d\n"
1148	"VMSVGA: InputInterlaced %d\n"
1149	"VMSVGA: InputFramesOrFields %d\n"
1150	"",
1151	idxRateCaps, idxCustomRateCap,
1152	Rate.CustomRate.Numerator,
1153	Rate.CustomRate.Denominator,
1154	Rate.OutputFrames,
1155	Rate.InputInterlaced,
1156	Rate.InputFramesOrFields
1157	));
1158	}
1159	}
1160	}
1161	}
1162	}
1163
1164	D3D_RELEASE(pEnum);
1165	}
1166	}
1167
1168
1169	static int dxDeviceCreate(PVMSVGA3DBACKEND pBackend, DXDEVICE *pDXDevice)
1170	{
1171	int rc = VINF_SUCCESS;
1172
1173	if (pBackend->dxDevice.pDevice)
1174	{
1175	pDXDevice->pDevice = pBackend->dxDevice.pDevice;
1176	pDXDevice->pDevice->AddRef();
1177
1178	pDXDevice->pImmediateContext = pBackend->dxDevice.pImmediateContext;
1179	pDXDevice->pImmediateContext->AddRef();
1180
1181	pDXDevice->pDxgiFactory = pBackend->dxDevice.pDxgiFactory;
1182	pDXDevice->pDxgiFactory->AddRef();
1183
1184	pDXDevice->FeatureLevel = pBackend->dxDevice.FeatureLevel;
1185
1186	pDXDevice->pVideoDevice = pBackend->dxDevice.pVideoDevice;
1187	if (pDXDevice->pVideoDevice)
1188	pDXDevice->pVideoDevice->AddRef();
1189
1190	pDXDevice->pVideoContext = pBackend->dxDevice.pVideoContext;
1191	if (pDXDevice->pVideoContext)
1192	pDXDevice->pVideoContext->AddRef();
1193
1194	#ifdef DX_COMMON_STAGING_BUFFER
1195	pDXDevice->pStagingBuffer = 0;
1196	pDXDevice->cbStagingBuffer = 0;
1197	#endif
1198
1199	BlitInit(&pDXDevice->Blitter, pDXDevice->pDevice, pDXDevice->pImmediateContext);
1200	return rc;
1201	}
1202
1203	IDXGIAdapter pAdapter = NULL; / Default adapter. */
1204	static D3D_FEATURE_LEVEL const s_aFeatureLevels[] =
1205	{
1206	D3D_FEATURE_LEVEL_11_1,
1207	D3D_FEATURE_LEVEL_11_0
1208	};
1209	UINT Flags = D3D11_CREATE_DEVICE_BGRA_SUPPORT;
1210	#ifdef DEBUG
1211	Flags \|= D3D11_CREATE_DEVICE_DEBUG;
1212	#endif
1213
1214	ID3D11Device *pDevice = 0;
1215	ID3D11DeviceContext *pImmediateContext = 0;
1216	HRESULT hr = pBackend->pfnD3D11CreateDevice(pAdapter,
1217	D3D_DRIVER_TYPE_HARDWARE,
1218	NULL,
1219	Flags,
1220	s_aFeatureLevels,
1221	RT_ELEMENTS(s_aFeatureLevels),
1222	D3D11_SDK_VERSION,
1223	&pDevice,
1224	&pDXDevice->FeatureLevel,
1225	&pImmediateContext);
1226	#ifdef DEBUG
1227	if (FAILED(hr))
1228	{
1229	/* Device creation may fail because _DEBUG flag requires "D3D11 SDK Layers for Windows 10" ("Graphics Tools"):
1230	* Settings/System/Apps/Optional features/Add a feature/Graphics Tools
1231	* Retry without the flag.
1232	*/
1233	Flags &= ~D3D11_CREATE_DEVICE_DEBUG;
1234	hr = pBackend->pfnD3D11CreateDevice(pAdapter,
1235	D3D_DRIVER_TYPE_HARDWARE,
1236	NULL,
1237	Flags,
1238	s_aFeatureLevels,
1239	RT_ELEMENTS(s_aFeatureLevels),
1240	D3D11_SDK_VERSION,
1241	&pDevice,
1242	&pDXDevice->FeatureLevel,
1243	&pImmediateContext);
1244	}
1245	#endif
1246
1247	if (SUCCEEDED(hr))
1248	{
1249	LogRel(("VMSVGA: Feature level %#x\n", pDXDevice->FeatureLevel));
1250
1251	hr = pDevice->QueryInterface(__uuidof(ID3D11Device1), (void**)&pDXDevice->pDevice);
1252	AssertReturnStmt(SUCCEEDED(hr),
1253	D3D_RELEASE(pImmediateContext); D3D_RELEASE(pDevice),
1254	VERR_NOT_SUPPORTED);
1255
1256	hr = pImmediateContext->QueryInterface(__uuidof(ID3D11DeviceContext1), (void**)&pDXDevice->pImmediateContext);
1257	AssertReturnStmt(SUCCEEDED(hr),
1258	D3D_RELEASE(pImmediateContext); D3D_RELEASE(pDXDevice->pDevice); D3D_RELEASE(pDevice),
1259	VERR_NOT_SUPPORTED);
1260
1261	HRESULT hr2;
1262	#ifdef DEBUG
1263	/* Break into debugger when DX runtime detects anything unusual. */
1264	ID3D11Debug *pDebug = 0;
1265	hr2 = pDXDevice->pDevice->QueryInterface(__uuidof(ID3D11Debug), (void**)&pDebug);
1266	if (SUCCEEDED(hr2))
1267	{
1268	ID3D11InfoQueue *pInfoQueue = 0;
1269	hr2 = pDebug->QueryInterface(__uuidof(ID3D11InfoQueue), (void**)&pInfoQueue);
1270	if (SUCCEEDED(hr2))
1271	{
1272	pInfoQueue->SetBreakOnSeverity(D3D11_MESSAGE_SEVERITY_CORRUPTION, true);
1273	// pInfoQueue->SetBreakOnSeverity(D3D11_MESSAGE_SEVERITY_ERROR, true);
1274	// pInfoQueue->SetBreakOnSeverity(D3D11_MESSAGE_SEVERITY_WARNING, true);
1275
1276	/* No breakpoints for the following messages. */
1277	D3D11_MESSAGE_ID saIgnoredMessageIds[] =
1278	{
1279	/* Message ID: Caused by: */
1280	D3D11_MESSAGE_ID_CREATEINPUTLAYOUT_TYPE_MISMATCH, /* Autogenerated input signatures. */
1281	D3D11_MESSAGE_ID_LIVE_DEVICE, /* Live object report. Does not seem to prevent a breakpoint. */
1282	(D3D11_MESSAGE_ID)3146081 /DEVICE_DRAW_RENDERTARGETVIEW_NOT_SET/, /* U. */
1283	D3D11_MESSAGE_ID_DEVICE_DRAW_SAMPLER_NOT_SET, /* U. */
1284	D3D11_MESSAGE_ID_DEVICE_DRAW_SAMPLER_MISMATCH, /* U. */
1285	D3D11_MESSAGE_ID_CREATEINPUTLAYOUT_EMPTY_LAYOUT, /* P. */
1286	D3D11_MESSAGE_ID_DEVICE_SHADER_LINKAGE_REGISTERMASK, /* S. */
1287	};
1288
1289	D3D11_INFO_QUEUE_FILTER filter;
1290	RT_ZERO(filter);
1291	filter.DenyList.NumIDs = RT_ELEMENTS(saIgnoredMessageIds);
1292	filter.DenyList.pIDList = saIgnoredMessageIds;
1293	pInfoQueue->AddStorageFilterEntries(&filter);
1294
1295	D3D_RELEASE(pInfoQueue);
1296	}
1297	D3D_RELEASE(pDebug);
1298	}
1299	#endif
1300
1301	IDXGIDevice *pDxgiDevice = 0;
1302	hr = pDXDevice->pDevice->QueryInterface(__uuidof(IDXGIDevice), (void**)&pDxgiDevice);
1303	if (SUCCEEDED(hr))
1304	{
1305	IDXGIAdapter *pDxgiAdapter = 0;
1306	hr = pDxgiDevice->GetParent(__uuidof(IDXGIAdapter), (void**)&pDxgiAdapter);
1307	if (SUCCEEDED(hr))
1308	{
1309	hr = pDxgiAdapter->GetParent(__uuidof(IDXGIFactory), (void**)&pDXDevice->pDxgiFactory);
1310	D3D_RELEASE(pDxgiAdapter);
1311	}
1312
1313	D3D_RELEASE(pDxgiDevice);
1314	}
1315
1316	/* Failure to query VideoDevice should be ignored. */
1317	hr2 = pDXDevice->pDevice->QueryInterface(__uuidof(ID3D11VideoDevice), (void**)&pDXDevice->pVideoDevice);
1318	Assert(SUCCEEDED(hr2));
1319	if (SUCCEEDED(hr2))
1320	{
1321	hr2 = pDXDevice->pImmediateContext->QueryInterface(__uuidof(ID3D11VideoContext), (void**)&pDXDevice->pVideoContext);
1322	Assert(SUCCEEDED(hr2));
1323	if (SUCCEEDED(hr2))
1324	{
1325	LogRel(("VMSVGA: VideoDevice available\n"));
1326	}
1327	else
1328	{
1329	D3D_RELEASE(pDXDevice->pVideoDevice);
1330	pDXDevice->pVideoContext = NULL;
1331	}
1332	}
1333	else
1334	pDXDevice->pVideoDevice = NULL;
1335	}
1336
1337	if (SUCCEEDED(hr))
1338	BlitInit(&pDXDevice->Blitter, pDXDevice->pDevice, pDXDevice->pImmediateContext);
1339	else
1340	rc = VERR_NOT_SUPPORTED;
1341
1342	if (SUCCEEDED(hr))
1343	{
1344	/* Query multisample support for a common format. */
1345	DXGI_FORMAT const dxgiFormat = DXGI_FORMAT_B8G8R8A8_UNORM;
1346
1347	for (uint32_t i = 2; i <= D3D11_MAX_MULTISAMPLE_SAMPLE_COUNT; i *= 2)
1348	{
1349	UINT NumQualityLevels = 0;
1350	HRESULT hr2 = pDXDevice->pDevice->CheckMultisampleQualityLevels(dxgiFormat, i, &NumQualityLevels);
1351	if (SUCCEEDED(hr2) && NumQualityLevels > 0)
1352	pDXDevice->MultisampleCountMask \|= UINT32_C(1) << (i - 1);
1353	}
1354	}
1355	return rc;
1356	}
1357
1358
1359	static void dxDeviceDestroy(PVMSVGA3DBACKEND pBackend, DXDEVICE *pDevice)
1360	{
1361	RT_NOREF(pBackend);
1362
1363	BlitRelease(&pDevice->Blitter);
1364
1365	#ifdef DX_COMMON_STAGING_BUFFER
1366	D3D_RELEASE(pDevice->pStagingBuffer);
1367	#endif
1368
1369	D3D_RELEASE(pDevice->pVideoDevice);
1370	D3D_RELEASE(pDevice->pVideoContext);
1371
1372	D3D_RELEASE(pDevice->pDxgiFactory);
1373	D3D_RELEASE(pDevice->pImmediateContext);
1374
1375	#ifdef DEBUG
1376	HRESULT hr2;
1377	ID3D11Debug *pDebug = 0;
1378	hr2 = pDevice->pDevice->QueryInterface(__uuidof(ID3D11Debug), (void**)&pDebug);
1379	if (SUCCEEDED(hr2))
1380	{
1381	/// @todo Use this to see whether all resources have been properly released.
1382	//DEBUG_BREAKPOINT_TEST();
1383	//pDebug->ReportLiveDeviceObjects(D3D11_RLDO_DETAIL \| (D3D11_RLDO_FLAGS)0x4 /D3D11_RLDO_IGNORE_INTERNAL/);
1384	D3D_RELEASE(pDebug);
1385	}
1386	#endif
1387
1388	D3D_RELEASE(pDevice->pDevice);
1389	RT_ZERO(*pDevice);
1390	}
1391
1392
1393	static void dxViewAddToList(PVGASTATECC pThisCC, DXVIEW *pDXView)
1394	{
1395	LogFunc(("cid = %u, sid = %u, viewId = %u, type = %u\n",
1396	pDXView->cid, pDXView->sid, pDXView->viewId, pDXView->enmViewType));
1397
1398	Assert(pDXView->u.pView); /* Only already created views should be added. Guard against mis-use by callers. */
1399
1400	PVMSVGA3DSURFACE pSurface;
1401	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pDXView->sid, &pSurface);
1402	AssertRCReturnVoid(rc);
1403
1404	RTListAppend(&pSurface->pBackendSurface->listView, &pDXView->nodeSurfaceView);
1405	}
1406
1407
1408	static void dxViewRemoveFromList(DXVIEW *pDXView)
1409	{
1410	LogFunc(("cid = %u, sid = %u, viewId = %u, type = %u\n",
1411	pDXView->cid, pDXView->sid, pDXView->viewId, pDXView->enmViewType));
1412	/* pView can be NULL, if COT entry is already empty. */
1413	if (pDXView->u.pView)
1414	{
1415	Assert(pDXView->nodeSurfaceView.pNext && pDXView->nodeSurfaceView.pPrev);
1416	RTListNodeRemove(&pDXView->nodeSurfaceView);
1417	}
1418	}
1419
1420
1421	static int dxViewDestroy(DXVIEW *pDXView)
1422	{
1423	LogFunc(("cid = %u, sid = %u, viewId = %u, type = %u\n",
1424	pDXView->cid, pDXView->sid, pDXView->viewId, pDXView->enmViewType));
1425	if (pDXView->u.pView)
1426	{
1427	D3D_RELEASE(pDXView->u.pView);
1428	RTListNodeRemove(&pDXView->nodeSurfaceView);
1429	RT_ZERO(*pDXView);
1430	}
1431
1432	return VINF_SUCCESS;
1433	}
1434
1435
1436	static int dxViewInit(DXVIEW pDXView, PVMSVGA3DSURFACE pSurface, VMSVGA3DDXCONTEXT pDXContext, uint32_t viewId, VMSVGA3DBACKVIEWTYPE enmViewType, ID3D11View *pView)
1437	{
1438	pDXView->cid = pDXContext->cid;
1439	pDXView->sid = pSurface->id;
1440	pDXView->viewId = viewId;
1441	pDXView->enmViewType = enmViewType;
1442	pDXView->u.pView = pView;
1443	RTListAppend(&pSurface->pBackendSurface->listView, &pDXView->nodeSurfaceView);
1444
1445	LogFunc(("cid = %u, sid = %u, viewId = %u, type = %u\n",
1446	pDXView->cid, pDXView->sid, pDXView->viewId, pDXView->enmViewType));
1447
1448	DXVIEW pIter, pNext;
1449	RTListForEachSafe(&pSurface->pBackendSurface->listView, pIter, pNext, DXVIEW, nodeSurfaceView)
1450	{
1451	AssertPtr(pNext);
1452	LogFunc(("pIter=%p, pNext=%p\n", pIter, pNext));
1453	}
1454
1455	return VINF_SUCCESS;
1456	}
1457
1458
1459	/// @todo Rename, parameters
1460	static DXDEVICE *dxDeviceFromCid(uint32_t cid, PVMSVGA3DSTATE pState)
1461	{
1462	RT_NOREF(cid);
1463	return &pState->pBackend->dxDevice;
1464	}
1465
1466
1467	/// @todo Rename, parameters
1468	static DXDEVICE dxDeviceFromContext(PVMSVGA3DSTATE p3dState, VMSVGA3DDXCONTEXT pDXContext)
1469	{
1470	RT_NOREF(pDXContext);
1471	DXDEVICE *pDXDevice = &p3dState->pBackend->dxDevice;
1472	#ifdef DEBUG
1473	HRESULT hr = pDXDevice->pDevice->GetDeviceRemovedReason();
1474	Assert(SUCCEEDED(hr));
1475	#endif
1476	return pDXDevice;
1477	}
1478
1479
1480	static int dxDeviceFlush(DXDEVICE *pDevice)
1481	{
1482	/** @todo Should the flush follow the query submission? */
1483	pDevice->pImmediateContext->Flush();
1484
1485	ID3D11Query *pQuery = 0;
1486	D3D11_QUERY_DESC qd;
1487	RT_ZERO(qd);
1488	qd.Query = D3D11_QUERY_EVENT;
1489
1490	HRESULT hr = pDevice->pDevice->CreateQuery(&qd, &pQuery);
1491	Assert(hr == S_OK); RT_NOREF(hr);
1492	pDevice->pImmediateContext->End(pQuery);
1493
1494	BOOL queryData;
1495	while (pDevice->pImmediateContext->GetData(pQuery, &queryData, sizeof(queryData), 0) != S_OK)
1496	RTThreadYield();
1497
1498	D3D_RELEASE(pQuery);
1499
1500	return VINF_SUCCESS;
1501	}
1502
1503
1504	/// @todo Parameters
1505	static ID3D11Resource dxResource(PVMSVGA3DSTATE pState, PVMSVGA3DSURFACE pSurface, VMSVGA3DDXCONTEXT pDXContext)
1506	{
1507	RT_NOREF(pState, pDXContext);
1508	VMSVGA3DBACKENDSURFACE *pBackendSurface = pSurface->pBackendSurface;
1509	if (!pBackendSurface)
1510	AssertFailedReturn(NULL);
1511
1512	return pBackendSurface->u.pResource;
1513	}
1514
1515
1516	static uint32_t dxGetRenderTargetViewSid(PVMSVGA3DDXCONTEXT pDXContext, uint32_t renderTargetViewId)
1517	{
1518	ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, SVGA_ID_INVALID);
1519
1520	SVGACOTableDXRTViewEntry const *pRTViewEntry = &pDXContext->cot.paRTView[renderTargetViewId];
1521	return pRTViewEntry->sid;
1522	}
1523
1524
1525	static int dxDefineStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dStreamOutputId soid, SVGACOTableDXStreamOutputEntry const pEntry, DXSHADER pDXShader)
1526	{
1527	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1528	DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[soid];
1529
1530	/* Make D3D11_SO_DECLARATION_ENTRY array from SVGA3dStreamOutputDeclarationEntry. */
1531	SVGA3dStreamOutputDeclarationEntry const *paDecls;
1532	PVMSVGAMOB pMob = NULL;
1533	if (pEntry->usesMob)
1534	{
1535	pMob = vmsvgaR3MobGet(pSvgaR3State, pEntry->mobid);
1536	ASSERT_GUEST_RETURN(pMob, VERR_INVALID_PARAMETER);
1537
1538	/* Create a memory pointer for the MOB, which is accessible by host. */
1539	int rc = vmsvgaR3MobBackingStoreCreate(pSvgaR3State, pMob, vmsvgaR3MobSize(pMob));
1540	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
1541
1542	/* Get pointer to the shader bytecode. This will also verify the offset. */
1543	paDecls = (SVGA3dStreamOutputDeclarationEntry const *)vmsvgaR3MobBackingStorePtr(pMob, pEntry->offsetInBytes);
1544	AssertReturnStmt(paDecls, vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob), VERR_INTERNAL_ERROR);
1545	}
1546	else
1547	paDecls = &pEntry->decl[0];
1548
1549	pDXStreamOutput->cDeclarationEntry = pEntry->numOutputStreamEntries;
1550	for (uint32_t i = 0; i < pDXStreamOutput->cDeclarationEntry; ++i)
1551	{
1552	D3D11_SO_DECLARATION_ENTRY *pDst = &pDXStreamOutput->aDeclarationEntry[i];
1553	SVGA3dStreamOutputDeclarationEntry const *pSrc = &paDecls[i];
1554
1555	uint32_t const registerMask = pSrc->registerMask & 0xF;
1556	unsigned const iFirstBit = ASMBitFirstSetU32(registerMask);
1557	unsigned const iLastBit = ASMBitLastSetU32(registerMask);
1558
1559	pDst->Stream = pSrc->stream;
1560	pDst->SemanticName = NULL; /* Semantic name and index will be taken from the shader output declaration. */
1561	pDst->SemanticIndex = 0;
1562	pDst->StartComponent = iFirstBit > 0 ? iFirstBit - 1 : 0;
1563	pDst->ComponentCount = iFirstBit > 0 ? iLastBit - (iFirstBit - 1) : 0;
1564	pDst->OutputSlot = pSrc->outputSlot;
1565	}
1566
1567	uint32_t MaxSemanticIndex = 0;
1568	for (uint32_t i = 0; i < pDXStreamOutput->cDeclarationEntry; ++i)
1569	{
1570	D3D11_SO_DECLARATION_ENTRY *pDeclarationEntry = &pDXStreamOutput->aDeclarationEntry[i];
1571	SVGA3dStreamOutputDeclarationEntry const *decl = &paDecls[i];
1572
1573	/* Find the corresponding register and mask in the GS shader output. */
1574	int idxFound = -1;
1575	for (uint32_t iOutputEntry = 0; iOutputEntry < pDXShader->shaderInfo.cOutputSignature; ++iOutputEntry)
1576	{
1577	SVGA3dDXSignatureEntry const *pOutputEntry = &pDXShader->shaderInfo.aOutputSignature[iOutputEntry];
1578	if ( pOutputEntry->registerIndex == decl->registerIndex
1579	&& (decl->registerMask & ~pOutputEntry->mask) == 0) /* SO decl mask is a subset of shader output mask. */
1580	{
1581	idxFound = iOutputEntry;
1582	break;
1583	}
1584	}
1585
1586	if (idxFound >= 0)
1587	{
1588	DXShaderAttributeSemantic const *pOutputSemantic = &pDXShader->shaderInfo.aOutputSemantic[idxFound];
1589	pDeclarationEntry->SemanticName = pOutputSemantic->pcszSemanticName;
1590	pDeclarationEntry->SemanticIndex = pOutputSemantic->SemanticIndex;
1591	MaxSemanticIndex = RT_MAX(MaxSemanticIndex, pOutputSemantic->SemanticIndex);
1592	}
1593	else
1594	AssertFailed();
1595	}
1596
1597	/* A geometry shader may return components of the same register as different attributes:
1598	*
1599	* Output signature
1600	* Name Index Mask Register
1601	* ATTRIB 2 xy 2
1602	* ATTRIB 3 z 2
1603	*
1604	* For ATTRIB 3 the stream output declaration expects StartComponent = 0 and ComponentCount = 1
1605	* (not StartComponent = 2 and ComponentCount = 1):
1606	*
1607	* Stream output declaration
1608	* SemanticName SemanticIndex StartComponent ComponentCount
1609	* ATTRIB 2 0 2
1610	* ATTRIB 3 0 1
1611	*
1612	* Stream output declaration can have multiple entries for the same attribute.
1613	* In this case StartComponent is the offset within the attribute.
1614	*
1615	* Output signature
1616	* Name Index Mask Register
1617	* ATTRIB 0 xyzw 0
1618	*
1619	* Stream output declaration
1620	* SemanticName SemanticIndex StartComponent ComponentCount
1621	* ATTRIB 0 0 1
1622	* ATTRIB 0 1 1
1623	*
1624	* StartComponent has been computed as the component offset in a register:
1625	* 'StartComponent = iFirstBit > 0 ? iFirstBit - 1 : 0;'.
1626	*
1627	* StartComponent must be the offset in an attribute.
1628	*/
1629	for (uint32_t SemanticIndex = 0; SemanticIndex <= MaxSemanticIndex; ++SemanticIndex)
1630	{
1631	/* Find minimum StartComponent value for this attribute. */
1632	uint32_t MinStartComponent = UINT32_MAX;
1633	for (uint32_t i = 0; i < pDXStreamOutput->cDeclarationEntry; ++i)
1634	{
1635	D3D11_SO_DECLARATION_ENTRY *pDeclarationEntry = &pDXStreamOutput->aDeclarationEntry[i];
1636	if (pDeclarationEntry->SemanticIndex == SemanticIndex)
1637	MinStartComponent = RT_MIN(MinStartComponent, pDeclarationEntry->StartComponent);
1638	}
1639
1640	AssertContinue(MinStartComponent != UINT32_MAX);
1641
1642	/* Adjust the StartComponent to start from 0 for this attribute. */
1643	for (uint32_t i = 0; i < pDXStreamOutput->cDeclarationEntry; ++i)
1644	{
1645	D3D11_SO_DECLARATION_ENTRY *pDeclarationEntry = &pDXStreamOutput->aDeclarationEntry[i];
1646	if (pDeclarationEntry->SemanticIndex == SemanticIndex)
1647	pDeclarationEntry->StartComponent -= MinStartComponent;
1648	}
1649	}
1650
1651	if (pMob)
1652	vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
1653
1654	return VINF_SUCCESS;
1655	}
1656
1657	static void dxDestroyStreamOutput(DXSTREAMOUTPUT *pDXStreamOutput)
1658	{
1659	RT_ZERO(*pDXStreamOutput);
1660	}
1661
1662	static D3D11_BLEND dxBlendFactorAlpha(uint8_t svgaBlend)
1663	{
1664	/* "Blend options that end in _COLOR are not allowed." but the guest sometimes sends them. */
1665	switch (svgaBlend)
1666	{
1667	case SVGA3D_BLENDOP_ZERO: return D3D11_BLEND_ZERO;
1668	case SVGA3D_BLENDOP_ONE: return D3D11_BLEND_ONE;
1669	case SVGA3D_BLENDOP_SRCCOLOR: return D3D11_BLEND_SRC_ALPHA;
1670	case SVGA3D_BLENDOP_INVSRCCOLOR: return D3D11_BLEND_INV_SRC_ALPHA;
1671	case SVGA3D_BLENDOP_SRCALPHA: return D3D11_BLEND_SRC_ALPHA;
1672	case SVGA3D_BLENDOP_INVSRCALPHA: return D3D11_BLEND_INV_SRC_ALPHA;
1673	case SVGA3D_BLENDOP_DESTALPHA: return D3D11_BLEND_DEST_ALPHA;
1674	case SVGA3D_BLENDOP_INVDESTALPHA: return D3D11_BLEND_INV_DEST_ALPHA;
1675	case SVGA3D_BLENDOP_DESTCOLOR: return D3D11_BLEND_DEST_ALPHA;
1676	case SVGA3D_BLENDOP_INVDESTCOLOR: return D3D11_BLEND_INV_DEST_ALPHA;
1677	case SVGA3D_BLENDOP_SRCALPHASAT: return D3D11_BLEND_SRC_ALPHA_SAT;
1678	case SVGA3D_BLENDOP_BLENDFACTOR: return D3D11_BLEND_BLEND_FACTOR;
1679	case SVGA3D_BLENDOP_INVBLENDFACTOR: return D3D11_BLEND_INV_BLEND_FACTOR;
1680	case SVGA3D_BLENDOP_SRC1COLOR: return D3D11_BLEND_SRC1_ALPHA;
1681	case SVGA3D_BLENDOP_INVSRC1COLOR: return D3D11_BLEND_INV_SRC1_ALPHA;
1682	case SVGA3D_BLENDOP_SRC1ALPHA: return D3D11_BLEND_SRC1_ALPHA;
1683	case SVGA3D_BLENDOP_INVSRC1ALPHA: return D3D11_BLEND_INV_SRC1_ALPHA;
1684	case SVGA3D_BLENDOP_BLENDFACTORALPHA: return D3D11_BLEND_BLEND_FACTOR;
1685	case SVGA3D_BLENDOP_INVBLENDFACTORALPHA: return D3D11_BLEND_INV_BLEND_FACTOR;
1686	default:
1687	break;
1688	}
1689	return D3D11_BLEND_ZERO;
1690	}
1691
1692
1693	static D3D11_BLEND dxBlendFactorColor(uint8_t svgaBlend)
1694	{
1695	switch (svgaBlend)
1696	{
1697	case SVGA3D_BLENDOP_ZERO: return D3D11_BLEND_ZERO;
1698	case SVGA3D_BLENDOP_ONE: return D3D11_BLEND_ONE;
1699	case SVGA3D_BLENDOP_SRCCOLOR: return D3D11_BLEND_SRC_COLOR;
1700	case SVGA3D_BLENDOP_INVSRCCOLOR: return D3D11_BLEND_INV_SRC_COLOR;
1701	case SVGA3D_BLENDOP_SRCALPHA: return D3D11_BLEND_SRC_ALPHA;
1702	case SVGA3D_BLENDOP_INVSRCALPHA: return D3D11_BLEND_INV_SRC_ALPHA;
1703	case SVGA3D_BLENDOP_DESTALPHA: return D3D11_BLEND_DEST_ALPHA;
1704	case SVGA3D_BLENDOP_INVDESTALPHA: return D3D11_BLEND_INV_DEST_ALPHA;
1705	case SVGA3D_BLENDOP_DESTCOLOR: return D3D11_BLEND_DEST_COLOR;
1706	case SVGA3D_BLENDOP_INVDESTCOLOR: return D3D11_BLEND_INV_DEST_COLOR;
1707	case SVGA3D_BLENDOP_SRCALPHASAT: return D3D11_BLEND_SRC_ALPHA_SAT;
1708	case SVGA3D_BLENDOP_BLENDFACTOR: return D3D11_BLEND_BLEND_FACTOR;
1709	case SVGA3D_BLENDOP_INVBLENDFACTOR: return D3D11_BLEND_INV_BLEND_FACTOR;
1710	case SVGA3D_BLENDOP_SRC1COLOR: return D3D11_BLEND_SRC1_COLOR;
1711	case SVGA3D_BLENDOP_INVSRC1COLOR: return D3D11_BLEND_INV_SRC1_COLOR;
1712	case SVGA3D_BLENDOP_SRC1ALPHA: return D3D11_BLEND_SRC1_ALPHA;
1713	case SVGA3D_BLENDOP_INVSRC1ALPHA: return D3D11_BLEND_INV_SRC1_ALPHA;
1714	case SVGA3D_BLENDOP_BLENDFACTORALPHA: return D3D11_BLEND_BLEND_FACTOR;
1715	case SVGA3D_BLENDOP_INVBLENDFACTORALPHA: return D3D11_BLEND_INV_BLEND_FACTOR;
1716	default:
1717	break;
1718	}
1719	return D3D11_BLEND_ZERO;
1720	}
1721
1722
1723	static D3D11_BLEND_OP dxBlendOp(uint8_t svgaBlendEq)
1724	{
1725	return (D3D11_BLEND_OP)svgaBlendEq;
1726	}
1727
1728
1729	static D3D11_LOGIC_OP dxLogicOp(uint8_t svgaLogicEq)
1730	{
1731	return (D3D11_LOGIC_OP)svgaLogicEq;
1732	}
1733
1734
1735	/** @todo AssertCompile for types like D3D11_COMPARISON_FUNC and SVGA3dComparisonFunc */
1736	static HRESULT dxBlendStateCreate(DXDEVICE pDevice, SVGACOTableDXBlendStateEntry const pEntry, ID3D11BlendState1 **pp)
1737	{
1738	D3D11_BLEND_DESC1 BlendDesc;
1739	BlendDesc.AlphaToCoverageEnable = RT_BOOL(pEntry->alphaToCoverageEnable);
1740	BlendDesc.IndependentBlendEnable = RT_BOOL(pEntry->independentBlendEnable);
1741	for (int i = 0; i < SVGA3D_MAX_RENDER_TARGETS; ++i)
1742	{
1743	BlendDesc.RenderTarget[i].BlendEnable = RT_BOOL(pEntry->perRT[i].blendEnable);
1744	BlendDesc.RenderTarget[i].LogicOpEnable = RT_BOOL(pEntry->perRT[i].logicOpEnable);
1745	BlendDesc.RenderTarget[i].SrcBlend = dxBlendFactorColor(pEntry->perRT[i].srcBlend);
1746	BlendDesc.RenderTarget[i].DestBlend = dxBlendFactorColor(pEntry->perRT[i].destBlend);
1747	BlendDesc.RenderTarget[i].BlendOp = dxBlendOp (pEntry->perRT[i].blendOp);
1748	BlendDesc.RenderTarget[i].SrcBlendAlpha = dxBlendFactorAlpha(pEntry->perRT[i].srcBlendAlpha);
1749	BlendDesc.RenderTarget[i].DestBlendAlpha = dxBlendFactorAlpha(pEntry->perRT[i].destBlendAlpha);
1750	BlendDesc.RenderTarget[i].BlendOpAlpha = dxBlendOp (pEntry->perRT[i].blendOpAlpha);
1751	BlendDesc.RenderTarget[i].LogicOp = dxLogicOp (pEntry->perRT[i].logicOp);
1752	BlendDesc.RenderTarget[i].RenderTargetWriteMask = pEntry->perRT[i].renderTargetWriteMask;
1753	}
1754
1755	HRESULT hr = pDevice->pDevice->CreateBlendState1(&BlendDesc, pp);
1756	Assert(SUCCEEDED(hr));
1757	return hr;
1758	}
1759
1760
1761	static HRESULT dxDepthStencilStateCreate(DXDEVICE pDevice, SVGACOTableDXDepthStencilEntry const pEntry, ID3D11DepthStencilState **pp)
1762	{
1763	D3D11_DEPTH_STENCIL_DESC desc;
1764	desc.DepthEnable = pEntry->depthEnable;
1765	desc.DepthWriteMask = (D3D11_DEPTH_WRITE_MASK)pEntry->depthWriteMask;
1766	desc.DepthFunc = (D3D11_COMPARISON_FUNC)pEntry->depthFunc;
1767	desc.StencilEnable = pEntry->stencilEnable;
1768	desc.StencilReadMask = pEntry->stencilReadMask;
1769	desc.StencilWriteMask = pEntry->stencilWriteMask;
1770	desc.FrontFace.StencilFailOp = (D3D11_STENCIL_OP)pEntry->frontStencilFailOp;
1771	desc.FrontFace.StencilDepthFailOp = (D3D11_STENCIL_OP)pEntry->frontStencilDepthFailOp;
1772	desc.FrontFace.StencilPassOp = (D3D11_STENCIL_OP)pEntry->frontStencilPassOp;
1773	desc.FrontFace.StencilFunc = (D3D11_COMPARISON_FUNC)pEntry->frontStencilFunc;
1774	desc.BackFace.StencilFailOp = (D3D11_STENCIL_OP)pEntry->backStencilFailOp;
1775	desc.BackFace.StencilDepthFailOp = (D3D11_STENCIL_OP)pEntry->backStencilDepthFailOp;
1776	desc.BackFace.StencilPassOp = (D3D11_STENCIL_OP)pEntry->backStencilPassOp;
1777	desc.BackFace.StencilFunc = (D3D11_COMPARISON_FUNC)pEntry->backStencilFunc;
1778	/** @todo frontEnable, backEnable */
1779
1780	HRESULT hr = pDevice->pDevice->CreateDepthStencilState(&desc, pp);
1781	Assert(SUCCEEDED(hr));
1782	return hr;
1783	}
1784
1785
1786	static HRESULT dxSamplerStateCreate(DXDEVICE pDevice, SVGACOTableDXSamplerEntry const pEntry, ID3D11SamplerState **pp)
1787	{
1788	D3D11_SAMPLER_DESC desc;
1789	/* Guest sometimes sends inconsistent (from D3D11 point of view) set of filter flags. */
1790	if (pEntry->filter & SVGA3D_FILTER_ANISOTROPIC)
1791	desc.Filter = (pEntry->filter & SVGA3D_FILTER_COMPARE)
1792	? D3D11_FILTER_COMPARISON_ANISOTROPIC
1793	: D3D11_FILTER_ANISOTROPIC;
1794	else
1795	desc.Filter = (D3D11_FILTER)pEntry->filter;
1796	desc.AddressU = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressU;
1797	desc.AddressV = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressV;
1798	desc.AddressW = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressW;
1799	desc.MipLODBias = pEntry->mipLODBias;
1800	desc.MaxAnisotropy = RT_CLAMP(pEntry->maxAnisotropy, 1, 16); /* "Valid values are between 1 and 16" */
1801	desc.ComparisonFunc = (D3D11_COMPARISON_FUNC)pEntry->comparisonFunc;
1802	desc.BorderColor[0] = pEntry->borderColor.value[0];
1803	desc.BorderColor[1] = pEntry->borderColor.value[1];
1804	desc.BorderColor[2] = pEntry->borderColor.value[2];
1805	desc.BorderColor[3] = pEntry->borderColor.value[3];
1806	desc.MinLOD = pEntry->minLOD;
1807	desc.MaxLOD = pEntry->maxLOD;
1808
1809	HRESULT hr = pDevice->pDevice->CreateSamplerState(&desc, pp);
1810	Assert(SUCCEEDED(hr));
1811	return hr;
1812	}
1813
1814
1815	static D3D11_FILL_MODE dxFillMode(uint8_t svgaFillMode)
1816	{
1817	if (svgaFillMode == SVGA3D_FILLMODE_POINT)
1818	return D3D11_FILL_WIREFRAME;
1819	return (D3D11_FILL_MODE)svgaFillMode;
1820	}
1821
1822
1823	static D3D11_CULL_MODE dxCullMode(uint8_t svgaCullMode)
1824	{
1825	return (D3D11_CULL_MODE)svgaCullMode;
1826	}
1827
1828
1829	static HRESULT dxRasterizerStateCreate(DXDEVICE pDevice, SVGACOTableDXRasterizerStateEntry const pEntry, ID3D11RasterizerState1 **pp)
1830	{
1831	D3D11_RASTERIZER_DESC1 desc;
1832	desc.FillMode = dxFillMode(pEntry->fillMode);
1833	desc.CullMode = dxCullMode(pEntry->cullMode);
1834	desc.FrontCounterClockwise = pEntry->frontCounterClockwise;
1835	/** @todo provokingVertexLast */
1836	desc.DepthBias = pEntry->depthBias;
1837	desc.DepthBiasClamp = pEntry->depthBiasClamp;
1838	desc.SlopeScaledDepthBias = pEntry->slopeScaledDepthBias;
1839	desc.DepthClipEnable = pEntry->depthClipEnable;
1840	desc.ScissorEnable = pEntry->scissorEnable;
1841	desc.MultisampleEnable = pEntry->multisampleEnable;
1842	desc.AntialiasedLineEnable = pEntry->antialiasedLineEnable;
1843	desc.ForcedSampleCount = pEntry->forcedSampleCount;
1844	/** @todo lineWidth lineStippleEnable lineStippleFactor lineStipplePattern */
1845
1846	HRESULT hr = pDevice->pDevice->CreateRasterizerState1(&desc, pp);
1847	Assert(SUCCEEDED(hr));
1848	return hr;
1849	}
1850
1851
1852	static HRESULT dxRenderTargetViewCreate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableDXRTViewEntry const pEntry, VMSVGA3DSURFACE pSurface, ID3D11RenderTargetView **pp)
1853	{
1854	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
1855
1856	ID3D11Resource *pResource = dxResource(pThisCC->svga.p3dState, pSurface, pDXContext);
1857
1858	D3D11_RENDER_TARGET_VIEW_DESC desc;
1859	RT_ZERO(desc);
1860	desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
1861	AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN \|\| pEntry->format == SVGA3D_BUFFER, E_FAIL);
1862	switch (pEntry->resourceDimension)
1863	{
1864	case SVGA3D_RESOURCE_BUFFER:
1865	desc.ViewDimension = D3D11_RTV_DIMENSION_BUFFER;
1866	desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
1867	desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
1868	break;
1869	case SVGA3D_RESOURCE_TEXTURE1D:
1870	if (pSurface->surfaceDesc.numArrayElements <= 1)
1871	{
1872	desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE1D;
1873	desc.Texture1D.MipSlice = pEntry->desc.tex.mipSlice;
1874	}
1875	else
1876	{
1877	desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE1DARRAY;
1878	desc.Texture1DArray.MipSlice = pEntry->desc.tex.mipSlice;
1879	desc.Texture1DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1880	desc.Texture1DArray.ArraySize = pEntry->desc.tex.arraySize;
1881	}
1882	break;
1883	case SVGA3D_RESOURCE_TEXTURE2D:
1884	if (pSurface->surfaceDesc.numArrayElements <= 1)
1885	{
1886	desc.ViewDimension = pSurface->surfaceDesc.multisampleCount > 1
1887	? D3D11_RTV_DIMENSION_TEXTURE2DMS
1888	: D3D11_RTV_DIMENSION_TEXTURE2D;
1889	desc.Texture2D.MipSlice = pEntry->desc.tex.mipSlice;
1890	}
1891	else
1892	{
1893	desc.ViewDimension = pSurface->surfaceDesc.multisampleCount > 1
1894	? D3D11_RTV_DIMENSION_TEXTURE2DMSARRAY
1895	: D3D11_RTV_DIMENSION_TEXTURE2DARRAY;
1896	desc.Texture2DArray.MipSlice = pEntry->desc.tex.mipSlice;
1897	desc.Texture2DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1898	desc.Texture2DArray.ArraySize = pEntry->desc.tex.arraySize;
1899	}
1900	break;
1901	case SVGA3D_RESOURCE_TEXTURE3D:
1902	desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE3D;
1903	desc.Texture3D.MipSlice = pEntry->desc.tex3D.mipSlice;
1904	desc.Texture3D.FirstWSlice = pEntry->desc.tex3D.firstW;
1905	desc.Texture3D.WSize = pEntry->desc.tex3D.wSize;
1906	break;
1907	case SVGA3D_RESOURCE_TEXTURECUBE:
1908	desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2DARRAY;
1909	desc.Texture2DArray.MipSlice = pEntry->desc.tex.mipSlice;
1910	desc.Texture2DArray.FirstArraySlice = 0;
1911	desc.Texture2DArray.ArraySize = 6;
1912	break;
1913	case SVGA3D_RESOURCE_BUFFEREX:
1914	AssertFailed(); /** @todo test. Probably not applicable to a render target view. */
1915	desc.ViewDimension = D3D11_RTV_DIMENSION_BUFFER;
1916	desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
1917	desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
1918	break;
1919	default:
1920	ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
1921	}
1922
1923	HRESULT hr = pDevice->pDevice->CreateRenderTargetView(pResource, &desc, pp);
1924	Assert(SUCCEEDED(hr));
1925	return hr;
1926	}
1927
1928
1929	static HRESULT dxShaderResourceViewCreate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableDXSRViewEntry const pEntry, VMSVGA3DSURFACE pSurface, ID3D11ShaderResourceView **pp)
1930	{
1931	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
1932
1933	ID3D11Resource *pResource = dxResource(pThisCC->svga.p3dState, pSurface, pDXContext);
1934
1935	D3D11_SHADER_RESOURCE_VIEW_DESC desc;
1936	RT_ZERO(desc);
1937	desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
1938	AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN \|\| pEntry->format == SVGA3D_BUFFER, E_FAIL);
1939
1940	switch (pEntry->resourceDimension)
1941	{
1942	case SVGA3D_RESOURCE_BUFFER:
1943	desc.ViewDimension = D3D11_SRV_DIMENSION_BUFFER;
1944	desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
1945	desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
1946	break;
1947	case SVGA3D_RESOURCE_TEXTURE1D:
1948	if (pSurface->surfaceDesc.numArrayElements <= 1)
1949	{
1950	desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE1D;
1951	desc.Texture1D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1952	desc.Texture1D.MipLevels = pEntry->desc.tex.mipLevels;
1953	}
1954	else
1955	{
1956	desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE1DARRAY;
1957	desc.Texture1DArray.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1958	desc.Texture1DArray.MipLevels = pEntry->desc.tex.mipLevels;
1959	desc.Texture1DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1960	desc.Texture1DArray.ArraySize = pEntry->desc.tex.arraySize;
1961	}
1962	break;
1963	case SVGA3D_RESOURCE_TEXTURE2D:
1964	if (pSurface->surfaceDesc.numArrayElements <= 1)
1965	{
1966	desc.ViewDimension = pSurface->surfaceDesc.multisampleCount > 1
1967	? D3D11_SRV_DIMENSION_TEXTURE2DMS
1968	: D3D11_SRV_DIMENSION_TEXTURE2D;
1969	desc.Texture2D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1970	desc.Texture2D.MipLevels = pEntry->desc.tex.mipLevels;
1971	}
1972	else
1973	{
1974	desc.ViewDimension = pSurface->surfaceDesc.multisampleCount > 1
1975	? D3D11_SRV_DIMENSION_TEXTURE2DMSARRAY
1976	: D3D11_SRV_DIMENSION_TEXTURE2DARRAY;
1977	desc.Texture2DArray.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1978	desc.Texture2DArray.MipLevels = pEntry->desc.tex.mipLevels;
1979	desc.Texture2DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1980	desc.Texture2DArray.ArraySize = pEntry->desc.tex.arraySize;
1981	}
1982	break;
1983	case SVGA3D_RESOURCE_TEXTURE3D:
1984	desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE3D;
1985	desc.Texture3D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1986	desc.Texture3D.MipLevels = pEntry->desc.tex.mipLevels;
1987	break;
1988	case SVGA3D_RESOURCE_TEXTURECUBE:
1989	if (pSurface->surfaceDesc.numArrayElements <= 6)
1990	{
1991	desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURECUBE;
1992	desc.TextureCube.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1993	desc.TextureCube.MipLevels = pEntry->desc.tex.mipLevels;
1994	}
1995	else
1996	{
1997	desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURECUBEARRAY;
1998	desc.TextureCubeArray.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1999	desc.TextureCubeArray.MipLevels = pEntry->desc.tex.mipLevels;
2000	desc.TextureCubeArray.First2DArrayFace = pEntry->desc.tex.firstArraySlice;
2001	desc.TextureCubeArray.NumCubes = pEntry->desc.tex.arraySize / 6;
2002	}
2003	break;
2004	case SVGA3D_RESOURCE_BUFFEREX:
2005	AssertFailed(); /** @todo test. */
2006	desc.ViewDimension = D3D11_SRV_DIMENSION_BUFFEREX;
2007	desc.BufferEx.FirstElement = pEntry->desc.bufferex.firstElement;
2008	desc.BufferEx.NumElements = pEntry->desc.bufferex.numElements;
2009	desc.BufferEx.Flags = pEntry->desc.bufferex.flags;
2010	break;
2011	default:
2012	ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
2013	}
2014
2015	HRESULT hr = pDevice->pDevice->CreateShaderResourceView(pResource, &desc, pp);
2016	Assert(SUCCEEDED(hr));
2017	return hr;
2018	}
2019
2020
2021	static HRESULT dxUnorderedAccessViewCreate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableDXUAViewEntry const pEntry, VMSVGA3DSURFACE pSurface, ID3D11UnorderedAccessView **pp)
2022	{
2023	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
2024
2025	ID3D11Resource *pResource = dxResource(pThisCC->svga.p3dState, pSurface, pDXContext);
2026
2027	D3D11_UNORDERED_ACCESS_VIEW_DESC desc;
2028	RT_ZERO(desc);
2029	desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
2030	AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN \|\| pEntry->format == SVGA3D_BUFFER, E_FAIL);
2031
2032	switch (pEntry->resourceDimension)
2033	{
2034	case SVGA3D_RESOURCE_BUFFER:
2035	desc.ViewDimension = D3D11_UAV_DIMENSION_BUFFER;
2036	desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
2037	desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
2038	desc.Buffer.Flags = pEntry->desc.buffer.flags;
2039	break;
2040	case SVGA3D_RESOURCE_TEXTURE1D:
2041	if (pSurface->surfaceDesc.numArrayElements <= 1)
2042	{
2043	desc.ViewDimension = D3D11_UAV_DIMENSION_TEXTURE1D;
2044	desc.Texture1D.MipSlice = pEntry->desc.tex.mipSlice;
2045	}
2046	else
2047	{
2048	desc.ViewDimension = D3D11_UAV_DIMENSION_TEXTURE1DARRAY;
2049	desc.Texture1DArray.MipSlice = pEntry->desc.tex.mipSlice;
2050	desc.Texture1DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
2051	desc.Texture1DArray.ArraySize = pEntry->desc.tex.arraySize;
2052	}
2053	break;
2054	case SVGA3D_RESOURCE_TEXTURE2D:
2055	if (pSurface->surfaceDesc.numArrayElements <= 1)
2056	{
2057	desc.ViewDimension = D3D11_UAV_DIMENSION_TEXTURE2D;
2058	desc.Texture2D.MipSlice = pEntry->desc.tex.mipSlice;
2059	}
2060	else
2061	{
2062	desc.ViewDimension = D3D11_UAV_DIMENSION_TEXTURE2DARRAY;
2063	desc.Texture2DArray.MipSlice = pEntry->desc.tex.mipSlice;
2064	desc.Texture2DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
2065	desc.Texture2DArray.ArraySize = pEntry->desc.tex.arraySize;
2066	}
2067	break;
2068	case SVGA3D_RESOURCE_TEXTURE3D:
2069	desc.Texture3D.MipSlice = pEntry->desc.tex3D.mipSlice;
2070	desc.Texture3D.FirstWSlice = pEntry->desc.tex3D.firstW;
2071	desc.Texture3D.WSize = pEntry->desc.tex3D.wSize;
2072	break;
2073	default:
2074	ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
2075	}
2076
2077	HRESULT hr = pDevice->pDevice->CreateUnorderedAccessView(pResource, &desc, pp);
2078	Assert(SUCCEEDED(hr));
2079	return hr;
2080	}
2081
2082
2083	static HRESULT dxDepthStencilViewCreate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableDXDSViewEntry const pEntry, VMSVGA3DSURFACE pSurface, ID3D11DepthStencilView **pp)
2084	{
2085	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
2086
2087	ID3D11Resource *pResource = dxResource(pThisCC->svga.p3dState, pSurface, pDXContext);
2088
2089	D3D11_DEPTH_STENCIL_VIEW_DESC desc;
2090	RT_ZERO(desc);
2091	desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
2092	AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN \|\| pEntry->format == SVGA3D_BUFFER, E_FAIL);
2093	desc.Flags = pEntry->flags;
2094	switch (pEntry->resourceDimension)
2095	{
2096	case SVGA3D_RESOURCE_TEXTURE1D:
2097	if (pSurface->surfaceDesc.numArrayElements <= 1)
2098	{
2099	desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE1D;
2100	desc.Texture1D.MipSlice = pEntry->mipSlice;
2101	}
2102	else
2103	{
2104	desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE1DARRAY;
2105	desc.Texture1DArray.MipSlice = pEntry->mipSlice;
2106	desc.Texture1DArray.FirstArraySlice = pEntry->firstArraySlice;
2107	desc.Texture1DArray.ArraySize = pEntry->arraySize;
2108	}
2109	break;
2110	case SVGA3D_RESOURCE_TEXTURE2D:
2111	if (pSurface->surfaceDesc.numArrayElements <= 1)
2112	{
2113	desc.ViewDimension = pSurface->surfaceDesc.multisampleCount > 1
2114	? D3D11_DSV_DIMENSION_TEXTURE2DMS
2115	: D3D11_DSV_DIMENSION_TEXTURE2D;
2116	desc.Texture2D.MipSlice = pEntry->mipSlice;
2117	}
2118	else
2119	{
2120	desc.ViewDimension = pSurface->surfaceDesc.multisampleCount > 1
2121	? D3D11_DSV_DIMENSION_TEXTURE2DMSARRAY
2122	: D3D11_DSV_DIMENSION_TEXTURE2DARRAY;
2123	desc.Texture2DArray.MipSlice = pEntry->mipSlice;
2124	desc.Texture2DArray.FirstArraySlice = pEntry->firstArraySlice;
2125	desc.Texture2DArray.ArraySize = pEntry->arraySize;
2126	}
2127	break;
2128	default:
2129	ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
2130	}
2131
2132	HRESULT hr = pDevice->pDevice->CreateDepthStencilView(pResource, &desc, pp);
2133	Assert(SUCCEEDED(hr));
2134	return hr;
2135	}
2136
2137
2138	static HRESULT dxShaderCreate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, DXSHADER *pDXShader)
2139	{
2140	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
2141
2142	HRESULT hr = S_OK;
2143
2144	switch (pDXShader->enmShaderType)
2145	{
2146	case SVGA3D_SHADERTYPE_VS:
2147	hr = pDevice->pDevice->CreateVertexShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pVertexShader);
2148	Assert(SUCCEEDED(hr));
2149	break;
2150	case SVGA3D_SHADERTYPE_PS:
2151	hr = pDevice->pDevice->CreatePixelShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pPixelShader);
2152	Assert(SUCCEEDED(hr));
2153	break;
2154	case SVGA3D_SHADERTYPE_GS:
2155	{
2156	SVGA3dStreamOutputId const soid = pDXContext->svgaDXContext.streamOut.soid;
2157	if (soid == SVGA_ID_INVALID)
2158	{
2159	hr = pDevice->pDevice->CreateGeometryShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pGeometryShader);
2160	Assert(SUCCEEDED(hr));
2161	}
2162	else
2163	{
2164	ASSERT_GUEST_RETURN(soid < pDXContext->pBackendDXContext->cStreamOutput, E_INVALIDARG);
2165
2166	SVGACOTableDXStreamOutputEntry const *pEntry = &pDXContext->cot.paStreamOutput[soid];
2167	DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[soid];
2168
2169	hr = pDevice->pDevice->CreateGeometryShaderWithStreamOutput(pDXShader->pvDXBC, pDXShader->cbDXBC,
2170	pDXStreamOutput->aDeclarationEntry, pDXStreamOutput->cDeclarationEntry,
2171	pEntry->numOutputStreamStrides ? pEntry->streamOutputStrideInBytes : NULL, pEntry->numOutputStreamStrides,
2172	pEntry->rasterizedStream,
2173	/pClassLinkage=/ NULL, &pDXShader->pGeometryShader);
2174	AssertBreak(SUCCEEDED(hr));
2175
2176	pDXShader->soid = soid;
2177	}
2178	break;
2179	}
2180	case SVGA3D_SHADERTYPE_HS:
2181	hr = pDevice->pDevice->CreateHullShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pHullShader);
2182	Assert(SUCCEEDED(hr));
2183	break;
2184	case SVGA3D_SHADERTYPE_DS:
2185	hr = pDevice->pDevice->CreateDomainShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pDomainShader);
2186	Assert(SUCCEEDED(hr));
2187	break;
2188	case SVGA3D_SHADERTYPE_CS:
2189	hr = pDevice->pDevice->CreateComputeShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pComputeShader);
2190	Assert(SUCCEEDED(hr));
2191	break;
2192	default:
2193	ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
2194	}
2195
2196	return hr;
2197	}
2198
2199
2200	static void dxShaderSet(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderType type, DXSHADER *pDXShader)
2201	{
2202	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
2203
2204	switch (type)
2205	{
2206	case SVGA3D_SHADERTYPE_VS:
2207	pDevice->pImmediateContext->VSSetShader(pDXShader ? pDXShader->pVertexShader : NULL, NULL, 0);
2208	break;
2209	case SVGA3D_SHADERTYPE_PS:
2210	pDevice->pImmediateContext->PSSetShader(pDXShader ? pDXShader->pPixelShader : NULL, NULL, 0);
2211	break;
2212	case SVGA3D_SHADERTYPE_GS:
2213	{
2214	Assert(!pDXShader \|\| (pDXShader->soid == pDXContext->svgaDXContext.streamOut.soid));
2215	pDevice->pImmediateContext->GSSetShader(pDXShader ? pDXShader->pGeometryShader : NULL, NULL, 0);
2216	} break;
2217	case SVGA3D_SHADERTYPE_HS:
2218	pDevice->pImmediateContext->HSSetShader(pDXShader ? pDXShader->pHullShader : NULL, NULL, 0);
2219	break;
2220	case SVGA3D_SHADERTYPE_DS:
2221	pDevice->pImmediateContext->DSSetShader(pDXShader ? pDXShader->pDomainShader : NULL, NULL, 0);
2222	break;
2223	case SVGA3D_SHADERTYPE_CS:
2224	pDevice->pImmediateContext->CSSetShader(pDXShader ? pDXShader->pComputeShader : NULL, NULL, 0);
2225	break;
2226	default:
2227	ASSERT_GUEST_FAILED_RETURN_VOID();
2228	}
2229	}
2230
2231
2232	static void dxConstantBufferSet(DXDEVICE pDevice, uint32_t slot, SVGA3dShaderType type, ID3D11Buffer pConstantBuffer)
2233	{
2234	switch (type)
2235	{
2236	case SVGA3D_SHADERTYPE_VS:
2237	pDevice->pImmediateContext->VSSetConstantBuffers(slot, 1, &pConstantBuffer);
2238	break;
2239	case SVGA3D_SHADERTYPE_PS:
2240	pDevice->pImmediateContext->PSSetConstantBuffers(slot, 1, &pConstantBuffer);
2241	break;
2242	case SVGA3D_SHADERTYPE_GS:
2243	pDevice->pImmediateContext->GSSetConstantBuffers(slot, 1, &pConstantBuffer);
2244	break;
2245	case SVGA3D_SHADERTYPE_HS:
2246	pDevice->pImmediateContext->HSSetConstantBuffers(slot, 1, &pConstantBuffer);
2247	break;
2248	case SVGA3D_SHADERTYPE_DS:
2249	pDevice->pImmediateContext->DSSetConstantBuffers(slot, 1, &pConstantBuffer);
2250	break;
2251	case SVGA3D_SHADERTYPE_CS:
2252	pDevice->pImmediateContext->CSSetConstantBuffers(slot, 1, &pConstantBuffer);
2253	break;
2254	default:
2255	ASSERT_GUEST_FAILED_RETURN_VOID();
2256	}
2257	}
2258
2259
2260	static void dxSamplerSet(DXDEVICE pDevice, SVGA3dShaderType type, uint32_t startSampler, uint32_t cSampler, ID3D11SamplerState const *papSampler)
2261	{
2262	switch (type)
2263	{
2264	case SVGA3D_SHADERTYPE_VS:
2265	pDevice->pImmediateContext->VSSetSamplers(startSampler, cSampler, papSampler);
2266	break;
2267	case SVGA3D_SHADERTYPE_PS:
2268	pDevice->pImmediateContext->PSSetSamplers(startSampler, cSampler, papSampler);
2269	break;
2270	case SVGA3D_SHADERTYPE_GS:
2271	pDevice->pImmediateContext->GSSetSamplers(startSampler, cSampler, papSampler);
2272	break;
2273	case SVGA3D_SHADERTYPE_HS:
2274	pDevice->pImmediateContext->HSSetSamplers(startSampler, cSampler, papSampler);
2275	break;
2276	case SVGA3D_SHADERTYPE_DS:
2277	pDevice->pImmediateContext->DSSetSamplers(startSampler, cSampler, papSampler);
2278	break;
2279	case SVGA3D_SHADERTYPE_CS:
2280	pDevice->pImmediateContext->CSSetSamplers(startSampler, cSampler, papSampler);
2281	break;
2282	default:
2283	ASSERT_GUEST_FAILED_RETURN_VOID();
2284	}
2285	}
2286
2287
2288	static void dxShaderResourceViewSet(DXDEVICE pDevice, SVGA3dShaderType type, uint32_t startView, uint32_t cShaderResourceView, ID3D11ShaderResourceView const *papShaderResourceView)
2289	{
2290	switch (type)
2291	{
2292	case SVGA3D_SHADERTYPE_VS:
2293	pDevice->pImmediateContext->VSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2294	break;
2295	case SVGA3D_SHADERTYPE_PS:
2296	pDevice->pImmediateContext->PSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2297	break;
2298	case SVGA3D_SHADERTYPE_GS:
2299	pDevice->pImmediateContext->GSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2300	break;
2301	case SVGA3D_SHADERTYPE_HS:
2302	pDevice->pImmediateContext->HSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2303	break;
2304	case SVGA3D_SHADERTYPE_DS:
2305	pDevice->pImmediateContext->DSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2306	break;
2307	case SVGA3D_SHADERTYPE_CS:
2308	pDevice->pImmediateContext->CSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2309	break;
2310	default:
2311	ASSERT_GUEST_FAILED_RETURN_VOID();
2312	}
2313	}
2314
2315
2316	static void dxCSUnorderedAccessViewSet(DXDEVICE pDevice, uint32_t startView, uint32_t cView, ID3D11UnorderedAccessView const papUnorderedAccessView, UINT pUAVInitialCounts)
2317	{
2318	pDevice->pImmediateContext->CSSetUnorderedAccessViews(startView, cView, papUnorderedAccessView, pUAVInitialCounts);
2319	}
2320
2321
2322	static int dxBackendSurfaceAlloc(PVMSVGA3DBACKENDSURFACE *ppBackendSurface)
2323	{
2324	PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
2325	AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
2326	RTListInit(&pBackendSurface->listView);
2327	*ppBackendSurface = pBackendSurface;
2328	return VINF_SUCCESS;
2329	}
2330
2331
2332	static UINT dxBindFlags(SVGA3dSurfaceAllFlags surfaceFlags)
2333	{
2334	/* Catch unimplemented flags. */
2335	Assert(!RT_BOOL(surfaceFlags & (SVGA3D_SURFACE_BIND_LOGICOPS \| SVGA3D_SURFACE_BIND_RAW_VIEWS)));
2336
2337	UINT BindFlags = 0;
2338
2339	if (surfaceFlags & (SVGA3D_SURFACE_BIND_VERTEX_BUFFER \| SVGA3D_SURFACE_HINT_VERTEXBUFFER))
2340	BindFlags \|= D3D11_BIND_VERTEX_BUFFER;
2341	if (surfaceFlags & (SVGA3D_SURFACE_BIND_INDEX_BUFFER \| SVGA3D_SURFACE_HINT_INDEXBUFFER))
2342	BindFlags \|= D3D11_BIND_INDEX_BUFFER;
2343	if (surfaceFlags & SVGA3D_SURFACE_BIND_CONSTANT_BUFFER) BindFlags \|= D3D11_BIND_CONSTANT_BUFFER;
2344	if (surfaceFlags & SVGA3D_SURFACE_BIND_SHADER_RESOURCE) BindFlags \|= D3D11_BIND_SHADER_RESOURCE;
2345	if (surfaceFlags & SVGA3D_SURFACE_BIND_RENDER_TARGET) BindFlags \|= D3D11_BIND_RENDER_TARGET;
2346	if (surfaceFlags & SVGA3D_SURFACE_BIND_DEPTH_STENCIL) BindFlags \|= D3D11_BIND_DEPTH_STENCIL;
2347	if (surfaceFlags & SVGA3D_SURFACE_BIND_STREAM_OUTPUT) BindFlags \|= D3D11_BIND_STREAM_OUTPUT;
2348	if (surfaceFlags & SVGA3D_SURFACE_BIND_UAVIEW) BindFlags \|= D3D11_BIND_UNORDERED_ACCESS;
2349	if (surfaceFlags & SVGA3D_SURFACE_RESERVED1) BindFlags \|= D3D11_BIND_DECODER;
2350
2351	return BindFlags;
2352	}
2353
2354
2355	/// @todo Parameters
2356	static DXDEVICE dxSurfaceDevice(PVMSVGA3DSTATE p3dState, PVMSVGA3DSURFACE pSurface, PVMSVGA3DDXCONTEXT pDXContext, UINT pMiscFlags)
2357	{
2358	RT_NOREF(pSurface, pDXContext);
2359	*pMiscFlags = 0;
2360	return &p3dState->pBackend->dxDevice;
2361	}
2362
2363
2364	static DXGI_FORMAT dxGetDxgiTypelessFormat(DXGI_FORMAT dxgiFormat)
2365	{
2366	switch (dxgiFormat)
2367	{
2368	case DXGI_FORMAT_R32G32B32A32_FLOAT:
2369	case DXGI_FORMAT_R32G32B32A32_UINT:
2370	case DXGI_FORMAT_R32G32B32A32_SINT:
2371	return DXGI_FORMAT_R32G32B32A32_TYPELESS; /* 1 */
2372	case DXGI_FORMAT_R32G32B32_FLOAT:
2373	case DXGI_FORMAT_R32G32B32_UINT:
2374	case DXGI_FORMAT_R32G32B32_SINT:
2375	return DXGI_FORMAT_R32G32B32_TYPELESS; /* 5 */
2376	case DXGI_FORMAT_R16G16B16A16_FLOAT:
2377	case DXGI_FORMAT_R16G16B16A16_UNORM:
2378	case DXGI_FORMAT_R16G16B16A16_UINT:
2379	case DXGI_FORMAT_R16G16B16A16_SNORM:
2380	case DXGI_FORMAT_R16G16B16A16_SINT:
2381	return DXGI_FORMAT_R16G16B16A16_TYPELESS; /* 9 */
2382	case DXGI_FORMAT_R32G32_FLOAT:
2383	case DXGI_FORMAT_R32G32_UINT:
2384	case DXGI_FORMAT_R32G32_SINT:
2385	return DXGI_FORMAT_R32G32_TYPELESS; /* 15 */
2386	case DXGI_FORMAT_D32_FLOAT_S8X24_UINT:
2387	case DXGI_FORMAT_R32_FLOAT_X8X24_TYPELESS:
2388	case DXGI_FORMAT_X32_TYPELESS_G8X24_UINT:
2389	return DXGI_FORMAT_R32G8X24_TYPELESS; /* 19 */
2390	case DXGI_FORMAT_R10G10B10A2_UNORM:
2391	case DXGI_FORMAT_R10G10B10A2_UINT:
2392	return DXGI_FORMAT_R10G10B10A2_TYPELESS; /* 23 */
2393	case DXGI_FORMAT_R8G8B8A8_UNORM:
2394	case DXGI_FORMAT_R8G8B8A8_UNORM_SRGB:
2395	case DXGI_FORMAT_R8G8B8A8_UINT:
2396	case DXGI_FORMAT_R8G8B8A8_SNORM:
2397	case DXGI_FORMAT_R8G8B8A8_SINT:
2398	return DXGI_FORMAT_R8G8B8A8_TYPELESS; /* 27 */
2399	case DXGI_FORMAT_R16G16_FLOAT:
2400	case DXGI_FORMAT_R16G16_UNORM:
2401	case DXGI_FORMAT_R16G16_UINT:
2402	case DXGI_FORMAT_R16G16_SNORM:
2403	case DXGI_FORMAT_R16G16_SINT:
2404	return DXGI_FORMAT_R16G16_TYPELESS; /* 33 */
2405	case DXGI_FORMAT_D32_FLOAT:
2406	case DXGI_FORMAT_R32_FLOAT:
2407	case DXGI_FORMAT_R32_UINT:
2408	case DXGI_FORMAT_R32_SINT:
2409	return DXGI_FORMAT_R32_TYPELESS; /* 39 */
2410	case DXGI_FORMAT_D24_UNORM_S8_UINT:
2411	case DXGI_FORMAT_R24_UNORM_X8_TYPELESS:
2412	case DXGI_FORMAT_X24_TYPELESS_G8_UINT:
2413	return DXGI_FORMAT_R24G8_TYPELESS; /* 44 */
2414	case DXGI_FORMAT_R8G8_UNORM:
2415	case DXGI_FORMAT_R8G8_UINT:
2416	case DXGI_FORMAT_R8G8_SNORM:
2417	case DXGI_FORMAT_R8G8_SINT:
2418	return DXGI_FORMAT_R8G8_TYPELESS; /* 48*/
2419	case DXGI_FORMAT_R16_FLOAT:
2420	case DXGI_FORMAT_D16_UNORM:
2421	case DXGI_FORMAT_R16_UNORM:
2422	case DXGI_FORMAT_R16_UINT:
2423	case DXGI_FORMAT_R16_SNORM:
2424	case DXGI_FORMAT_R16_SINT:
2425	return DXGI_FORMAT_R16_TYPELESS; /* 53 */
2426	case DXGI_FORMAT_R8_UNORM:
2427	case DXGI_FORMAT_R8_UINT:
2428	case DXGI_FORMAT_R8_SNORM:
2429	case DXGI_FORMAT_R8_SINT:
2430	return DXGI_FORMAT_R8_TYPELESS; /* 60*/
2431	case DXGI_FORMAT_BC1_UNORM:
2432	case DXGI_FORMAT_BC1_UNORM_SRGB:
2433	return DXGI_FORMAT_BC1_TYPELESS; /* 70 */
2434	case DXGI_FORMAT_BC2_UNORM:
2435	case DXGI_FORMAT_BC2_UNORM_SRGB:
2436	return DXGI_FORMAT_BC2_TYPELESS; /* 73 */
2437	case DXGI_FORMAT_BC3_UNORM:
2438	case DXGI_FORMAT_BC3_UNORM_SRGB:
2439	return DXGI_FORMAT_BC3_TYPELESS; /* 76 */
2440	case DXGI_FORMAT_BC4_UNORM:
2441	case DXGI_FORMAT_BC4_SNORM:
2442	return DXGI_FORMAT_BC4_TYPELESS; /* 79 */
2443	case DXGI_FORMAT_BC5_UNORM:
2444	case DXGI_FORMAT_BC5_SNORM:
2445	return DXGI_FORMAT_BC5_TYPELESS; /* 82 */
2446	case DXGI_FORMAT_B8G8R8A8_UNORM:
2447	case DXGI_FORMAT_B8G8R8A8_UNORM_SRGB:
2448	return DXGI_FORMAT_B8G8R8A8_TYPELESS; /* 90 */
2449	case DXGI_FORMAT_B8G8R8X8_UNORM:
2450	case DXGI_FORMAT_B8G8R8X8_UNORM_SRGB:
2451	return DXGI_FORMAT_B8G8R8X8_TYPELESS; /* 92 */
2452	case DXGI_FORMAT_BC6H_UF16:
2453	case DXGI_FORMAT_BC6H_SF16:
2454	return DXGI_FORMAT_BC6H_TYPELESS; /* 94 */
2455	case DXGI_FORMAT_BC7_UNORM:
2456	case DXGI_FORMAT_BC7_UNORM_SRGB:
2457	return DXGI_FORMAT_BC7_TYPELESS; /* 97 */
2458	default:
2459	break;
2460	}
2461
2462	return dxgiFormat;
2463	}
2464
2465
2466	static bool dxIsDepthStencilFormat(DXGI_FORMAT dxgiFormat)
2467	{
2468	switch (dxgiFormat)
2469	{
2470	case DXGI_FORMAT_D32_FLOAT_S8X24_UINT:
2471	case DXGI_FORMAT_D32_FLOAT:
2472	case DXGI_FORMAT_D24_UNORM_S8_UINT:
2473	case DXGI_FORMAT_D16_UNORM:
2474	return true;
2475	default:
2476	break;
2477	}
2478
2479	return false;
2480	}
2481
2482
2483	static int vmsvga3dBackSurfaceCreateTexture(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
2484	{
2485	PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2486	AssertReturn(p3dState, VERR_INVALID_STATE);
2487
2488	PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2489	AssertReturn(pBackend, VERR_INVALID_STATE);
2490
2491	UINT MiscFlags;
2492	DXDEVICE *pDXDevice = dxSurfaceDevice(p3dState, pSurface, pDXContext, &MiscFlags);
2493	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
2494
2495	if (pSurface->pBackendSurface != NULL)
2496	{
2497	AssertFailed(); /** @todo Should the function not be used like that? */
2498	vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
2499	}
2500
2501	PVMSVGA3DBACKENDSURFACE pBackendSurface;
2502	int rc = dxBackendSurfaceAlloc(&pBackendSurface);
2503	AssertRCReturn(rc, rc);
2504
2505	uint32_t const cWidth = pSurface->paMipmapLevels[0].cBlocksX * pSurface->cxBlock;
2506	uint32_t const cHeight = pSurface->paMipmapLevels[0].cBlocksY * pSurface->cyBlock;
2507	uint32_t const cDepth = pSurface->paMipmapLevels[0].mipmapSize.depth;
2508	uint32_t const numMipLevels = pSurface->cLevels;
2509
2510	DXGI_FORMAT dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(pSurface->format);
2511	AssertReturn(dxgiFormat != DXGI_FORMAT_UNKNOWN, E_FAIL);
2512
2513	/* Create typeless textures, unless it is a depth/stencil resource,
2514	* because D3D11_BIND_DEPTH_STENCIL requires a depth/stencil format.
2515	* Always use typeless format for staging/dynamic resources.
2516	* Use explicit format for screen targets. For example they can be used
2517	* for video processor output view, which does not allow a typeless format.
2518	*/
2519	DXGI_FORMAT const dxgiFormatTypeless = dxGetDxgiTypelessFormat(dxgiFormat);
2520	if ( !dxIsDepthStencilFormat(dxgiFormat)
2521	&& !RT_BOOL(pSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET))
2522	dxgiFormat = dxgiFormatTypeless;
2523
2524	/* Format for staging resource is always the typeless one. */
2525	DXGI_FORMAT const dxgiFormatStaging = dxgiFormatTypeless;
2526
2527	DXGI_FORMAT dxgiFormatDynamic;
2528	/* Some drivers do not allow to use depth typeless formats for dynamic resources.
2529	* Create a placeholder texture (it does not work with CopySubresource).
2530	*/
2531	/** @todo Implement upload from such textures. */
2532	if (dxgiFormatTypeless == DXGI_FORMAT_R24G8_TYPELESS)
2533	dxgiFormatDynamic = DXGI_FORMAT_R32_UINT;
2534	else if (dxgiFormatTypeless == DXGI_FORMAT_R32G8X24_TYPELESS)
2535	dxgiFormatDynamic = DXGI_FORMAT_R32G32_UINT;
2536	else
2537	dxgiFormatDynamic = dxgiFormatTypeless;
2538
2539	/*
2540	* Create D3D11 texture object.
2541	*/
2542	D3D11_SUBRESOURCE_DATA *paInitialData = NULL;
2543	if (pSurface->paMipmapLevels[0].pSurfaceData && pSurface->surfaceDesc.multisampleCount <= 1)
2544	{
2545	/* Can happen for a non GBO surface or if GBO texture was updated prior to creation of the hardware resource. */
2546	uint32_t const cSubresource = numMipLevels * pSurface->surfaceDesc.numArrayElements;
2547	paInitialData = (D3D11_SUBRESOURCE_DATA )RTMemAlloc(cSubresource sizeof(D3D11_SUBRESOURCE_DATA));
2548	AssertPtrReturn(paInitialData, VERR_NO_MEMORY);
2549
2550	for (uint32_t i = 0; i < cSubresource; ++i)
2551	{
2552	PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
2553	D3D11_SUBRESOURCE_DATA *p = &paInitialData[i];
2554	p->pSysMem = pMipmapLevel->pSurfaceData;
2555	p->SysMemPitch = pMipmapLevel->cbSurfacePitch;
2556	p->SysMemSlicePitch = pMipmapLevel->cbSurfacePlane;
2557	}
2558	}
2559
2560	HRESULT hr = S_OK;
2561	if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_CUBEMAP)
2562	{
2563	Assert(pSurface->cFaces == 6);
2564	Assert(cWidth == cHeight);
2565	Assert(cDepth == 1);
2566	//DEBUG_BREAKPOINT_TEST();
2567
2568	D3D11_TEXTURE2D_DESC td;
2569	RT_ZERO(td);
2570	td.Width = cWidth;
2571	td.Height = cHeight;
2572	td.MipLevels = numMipLevels;
2573	td.ArraySize = pSurface->surfaceDesc.numArrayElements; /* This is 6 * numCubes */
2574	td.Format = dxgiFormat;
2575	td.SampleDesc.Count = 1;
2576	td.SampleDesc.Quality = 0;
2577	td.Usage = D3D11_USAGE_DEFAULT;
2578	td.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
2579	td.CPUAccessFlags = 0; /** @todo */
2580	td.MiscFlags = MiscFlags \| D3D11_RESOURCE_MISC_TEXTURECUBE; /** @todo */
2581	if ( numMipLevels > 1
2582	&& (td.BindFlags & (D3D11_BIND_SHADER_RESOURCE \| D3D11_BIND_RENDER_TARGET)) == (D3D11_BIND_SHADER_RESOURCE \| D3D11_BIND_RENDER_TARGET))
2583	td.MiscFlags \|= D3D11_RESOURCE_MISC_GENERATE_MIPS; /* Required for GenMips. */
2584
2585	hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->u.pTexture2D);
2586	Assert(SUCCEEDED(hr));
2587	if (SUCCEEDED(hr))
2588	{
2589	/* Map-able texture. */
2590	td.Format = dxgiFormatDynamic;
2591	td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2592	td.ArraySize = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2593	td.Usage = D3D11_USAGE_DYNAMIC;
2594	td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2595	td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2596	td.MiscFlags = 0;
2597	hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->dynamic.pTexture2D);
2598	Assert(SUCCEEDED(hr));
2599	}
2600
2601	if (SUCCEEDED(hr))
2602	{
2603	/* Staging texture. */
2604	td.Format = dxgiFormatStaging;
2605	td.Usage = D3D11_USAGE_STAGING;
2606	td.BindFlags = 0; /* No flags allowed. */
2607	td.CPUAccessFlags = D3D11_CPU_ACCESS_READ \| D3D11_CPU_ACCESS_WRITE;
2608	td.MiscFlags = 0;
2609	hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->staging.pTexture2D);
2610	Assert(SUCCEEDED(hr));
2611	}
2612
2613	if (SUCCEEDED(hr))
2614	{
2615	pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE_CUBE;
2616	}
2617	}
2618	else if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_1D)
2619	{
2620	/*
2621	* 1D texture.
2622	*/
2623	Assert(pSurface->cFaces == 1);
2624
2625	D3D11_TEXTURE1D_DESC td;
2626	RT_ZERO(td);
2627	td.Width = cWidth;
2628	td.MipLevels = numMipLevels;
2629	td.ArraySize = pSurface->surfaceDesc.numArrayElements;
2630	td.Format = dxgiFormat;
2631	td.Usage = D3D11_USAGE_DEFAULT;
2632	td.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
2633	td.CPUAccessFlags = 0;
2634	td.MiscFlags = MiscFlags; /** @todo */
2635	if ( numMipLevels > 1
2636	&& (td.BindFlags & (D3D11_BIND_SHADER_RESOURCE \| D3D11_BIND_RENDER_TARGET)) == (D3D11_BIND_SHADER_RESOURCE \| D3D11_BIND_RENDER_TARGET))
2637	td.MiscFlags \|= D3D11_RESOURCE_MISC_GENERATE_MIPS; /* Required for GenMips. */
2638
2639	hr = pDXDevice->pDevice->CreateTexture1D(&td, paInitialData, &pBackendSurface->u.pTexture1D);
2640	Assert(SUCCEEDED(hr));
2641	if (SUCCEEDED(hr))
2642	{
2643	/* Map-able texture. */
2644	td.Format = dxgiFormatDynamic;
2645	td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2646	td.ArraySize = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2647	td.Usage = D3D11_USAGE_DYNAMIC;
2648	td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2649	td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2650	td.MiscFlags = 0;
2651	hr = pDXDevice->pDevice->CreateTexture1D(&td, paInitialData, &pBackendSurface->dynamic.pTexture1D);
2652	Assert(SUCCEEDED(hr));
2653	}
2654
2655	if (SUCCEEDED(hr))
2656	{
2657	/* Staging texture. */
2658	td.Format = dxgiFormatStaging;
2659	td.Usage = D3D11_USAGE_STAGING;
2660	td.BindFlags = 0; /* No flags allowed. */
2661	td.CPUAccessFlags = D3D11_CPU_ACCESS_READ \| D3D11_CPU_ACCESS_WRITE;
2662	td.MiscFlags = 0;
2663	hr = pDXDevice->pDevice->CreateTexture1D(&td, paInitialData, &pBackendSurface->staging.pTexture1D);
2664	Assert(SUCCEEDED(hr));
2665	}
2666
2667	if (SUCCEEDED(hr))
2668	{
2669	pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE_1D;
2670	}
2671	}
2672	else
2673	{
2674	if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_VOLUME)
2675	{
2676	/*
2677	* Volume texture.
2678	*/
2679	Assert(pSurface->cFaces == 1);
2680	Assert(pSurface->surfaceDesc.numArrayElements == 1);
2681
2682	D3D11_TEXTURE3D_DESC td;
2683	RT_ZERO(td);
2684	td.Width = cWidth;
2685	td.Height = cHeight;
2686	td.Depth = cDepth;
2687	td.MipLevels = numMipLevels;
2688	td.Format = dxgiFormat;
2689	td.Usage = D3D11_USAGE_DEFAULT;
2690	td.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
2691	td.CPUAccessFlags = 0; /** @todo */
2692	td.MiscFlags = MiscFlags; /** @todo */
2693	if ( numMipLevels > 1
2694	&& (td.BindFlags & (D3D11_BIND_SHADER_RESOURCE \| D3D11_BIND_RENDER_TARGET)) == (D3D11_BIND_SHADER_RESOURCE \| D3D11_BIND_RENDER_TARGET))
2695	td.MiscFlags \|= D3D11_RESOURCE_MISC_GENERATE_MIPS; /* Required for GenMips. */
2696
2697	hr = pDXDevice->pDevice->CreateTexture3D(&td, paInitialData, &pBackendSurface->u.pTexture3D);
2698	Assert(SUCCEEDED(hr));
2699	if (SUCCEEDED(hr))
2700	{
2701	/* Map-able texture. */
2702	td.Format = dxgiFormatDynamic;
2703	td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2704	td.Usage = D3D11_USAGE_DYNAMIC;
2705	td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2706	td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2707	td.MiscFlags = 0;
2708	hr = pDXDevice->pDevice->CreateTexture3D(&td, paInitialData, &pBackendSurface->dynamic.pTexture3D);
2709	Assert(SUCCEEDED(hr));
2710	}
2711
2712	if (SUCCEEDED(hr))
2713	{
2714	/* Staging texture. */
2715	td.Format = dxgiFormatStaging;
2716	td.Usage = D3D11_USAGE_STAGING;
2717	td.BindFlags = 0; /* No flags allowed. */
2718	td.CPUAccessFlags = D3D11_CPU_ACCESS_READ \| D3D11_CPU_ACCESS_WRITE;
2719	td.MiscFlags = 0;
2720	hr = pDXDevice->pDevice->CreateTexture3D(&td, paInitialData, &pBackendSurface->staging.pTexture3D);
2721	Assert(SUCCEEDED(hr));
2722	}
2723
2724	if (SUCCEEDED(hr))
2725	{
2726	pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE_3D;
2727	}
2728	}
2729	else
2730	{
2731	/*
2732	* 2D texture.
2733	*/
2734	Assert(cDepth == 1);
2735	Assert(pSurface->cFaces == 1);
2736
2737	D3D11_TEXTURE2D_DESC td;
2738	RT_ZERO(td);
2739	td.Width = cWidth;
2740	td.Height = cHeight;
2741	td.MipLevels = numMipLevels;
2742	td.ArraySize = pSurface->surfaceDesc.numArrayElements;
2743	td.Format = dxgiFormat;
2744	td.SampleDesc.Count = pSurface->surfaceDesc.multisampleCount;
2745	td.SampleDesc.Quality = 0;
2746	td.Usage = D3D11_USAGE_DEFAULT;
2747	td.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
2748	td.CPUAccessFlags = 0; /** @todo */
2749	td.MiscFlags = MiscFlags; /** @todo */
2750	if ( numMipLevels > 1
2751	&& (td.BindFlags & (D3D11_BIND_SHADER_RESOURCE \| D3D11_BIND_RENDER_TARGET)) == (D3D11_BIND_SHADER_RESOURCE \| D3D11_BIND_RENDER_TARGET))
2752	td.MiscFlags \|= D3D11_RESOURCE_MISC_GENERATE_MIPS; /* Required for GenMips. */
2753
2754	hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->u.pTexture2D);
2755	Assert(SUCCEEDED(hr));
2756	if (SUCCEEDED(hr))
2757	{
2758	/* Map-able texture. */
2759	td.Format = dxgiFormatDynamic;
2760	td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2761	td.ArraySize = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2762	td.SampleDesc.Count = 1;
2763	td.SampleDesc.Quality = 0;
2764	td.Usage = D3D11_USAGE_DYNAMIC;
2765	td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2766	td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2767	td.MiscFlags = 0;
2768	hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->dynamic.pTexture2D);
2769	Assert(SUCCEEDED(hr));
2770	}
2771
2772	if (SUCCEEDED(hr))
2773	{
2774	/* Staging texture. */
2775	td.Format = dxgiFormatStaging;
2776	td.Usage = D3D11_USAGE_STAGING;
2777	td.BindFlags = 0; /* No flags allowed. */
2778	td.CPUAccessFlags = D3D11_CPU_ACCESS_READ \| D3D11_CPU_ACCESS_WRITE;
2779	td.MiscFlags = 0;
2780	hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->staging.pTexture2D);
2781	Assert(SUCCEEDED(hr));
2782	}
2783
2784	if (SUCCEEDED(hr))
2785	{
2786	pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE_2D;
2787	}
2788	}
2789	}
2790
2791	if (hr == DXGI_ERROR_DEVICE_REMOVED)
2792	{
2793	DEBUG_BREAKPOINT_TEST();
2794	hr = pDXDevice->pDevice->GetDeviceRemovedReason();
2795	}
2796
2797	Assert(hr == S_OK);
2798
2799	RTMemFree(paInitialData);
2800
2801	if (pSurface->autogenFilter != SVGA3D_TEX_FILTER_NONE)
2802	{
2803	}
2804
2805	if (SUCCEEDED(hr))
2806	{
2807	/*
2808	* Success.
2809	*/
2810	LogFunc(("sid = %u\n", pSurface->id));
2811	pBackendSurface->enmDxgiFormat = dxgiFormat;
2812	pSurface->pBackendSurface = pBackendSurface;
2813	return VINF_SUCCESS;
2814	}
2815
2816	D3D_RELEASE(pBackendSurface->staging.pResource);
2817	D3D_RELEASE(pBackendSurface->dynamic.pResource);
2818	D3D_RELEASE(pBackendSurface->u.pResource);
2819	RTMemFree(pBackendSurface);
2820	return VERR_NO_MEMORY;
2821	}
2822
2823	#if 0
2824	static int vmsvga3dBackSurfaceCreateBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
2825	{
2826	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
2827	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
2828
2829	/* Buffers should be created as such. */
2830	AssertReturn(RT_BOOL(pSurface->f.surfaceFlags & ( SVGA3D_SURFACE_HINT_INDEXBUFFER
2831	\| SVGA3D_SURFACE_HINT_VERTEXBUFFER
2832	\| SVGA3D_SURFACE_BIND_VERTEX_BUFFER
2833	\| SVGA3D_SURFACE_BIND_INDEX_BUFFER
2834	)), VERR_INVALID_PARAMETER);
2835
2836	if (pSurface->pBackendSurface != NULL)
2837	{
2838	AssertFailed(); /** @todo Should the function not be used like that? */
2839	vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
2840	}
2841
2842	PVMSVGA3DMIPMAPLEVEL pMipLevel;
2843	int rc = vmsvga3dMipmapLevel(pSurface, 0, 0, &pMipLevel);
2844	AssertRCReturn(rc, rc);
2845
2846	PVMSVGA3DBACKENDSURFACE pBackendSurface;
2847	rc = dxBackendSurfaceAlloc(&pBackendSurface);
2848	AssertRCReturn(rc, rc);
2849
2850	LogFunc(("sid = %u, size = %u\n", pSurface->id, pMipLevel->cbSurface));
2851
2852	/* Upload the current data, if any. */
2853	D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
2854	D3D11_SUBRESOURCE_DATA initialData;
2855	if (pMipLevel->pSurfaceData)
2856	{
2857	initialData.pSysMem = pMipLevel->pSurfaceData;
2858	initialData.SysMemPitch = pMipLevel->cbSurface;
2859	initialData.SysMemSlicePitch = pMipLevel->cbSurface;
2860
2861	pInitialData = &initialData;
2862	}
2863
2864	D3D11_BUFFER_DESC bd;
2865	RT_ZERO(bd);
2866	bd.ByteWidth = pMipLevel->cbSurface;
2867	bd.Usage = D3D11_USAGE_DEFAULT;
2868	bd.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
2869
2870	HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->u.pBuffer);
2871	Assert(SUCCEEDED(hr));
2872	#ifndef DX_COMMON_STAGING_BUFFER
2873	if (SUCCEEDED(hr))
2874	{
2875	/* Map-able Buffer. */
2876	bd.Usage = D3D11_USAGE_DYNAMIC;
2877	bd.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2878	bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2879	hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->dynamic.pBuffer);
2880	Assert(SUCCEEDED(hr));
2881	}
2882
2883	if (SUCCEEDED(hr))
2884	{
2885	/* Staging texture. */
2886	bd.Usage = D3D11_USAGE_STAGING;
2887	bd.BindFlags = 0; /* No flags allowed. */
2888	bd.CPUAccessFlags = D3D11_CPU_ACCESS_READ \| D3D11_CPU_ACCESS_WRITE;
2889	hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->staging.pBuffer);
2890	Assert(SUCCEEDED(hr));
2891	}
2892	#endif
2893
2894	if (SUCCEEDED(hr))
2895	{
2896	/*
2897	* Success.
2898	*/
2899	pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
2900	pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
2901	pSurface->pBackendSurface = pBackendSurface;
2902	return VINF_SUCCESS;
2903	}
2904
2905	/* Failure. */
2906	D3D_RELEASE(pBackendSurface->u.pBuffer);
2907	#ifndef DX_COMMON_STAGING_BUFFER
2908	D3D_RELEASE(pBackendSurface->dynamic.pBuffer);
2909	D3D_RELEASE(pBackendSurface->staging.pBuffer);
2910	#endif
2911	RTMemFree(pBackendSurface);
2912	return VERR_NO_MEMORY;
2913	}
2914	#endif
2915
2916	static int vmsvga3dBackSurfaceCreateSoBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
2917	{
2918	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
2919	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
2920
2921	/* Buffers should be created as such. */
2922	AssertReturn(RT_BOOL(pSurface->f.surfaceFlags & SVGA3D_SURFACE_BIND_STREAM_OUTPUT), VERR_INVALID_PARAMETER);
2923
2924	if (pSurface->pBackendSurface != NULL)
2925	{
2926	AssertFailed(); /** @todo Should the function not be used like that? */
2927	vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
2928	}
2929
2930	PVMSVGA3DBACKENDSURFACE pBackendSurface;
2931	int rc = dxBackendSurfaceAlloc(&pBackendSurface);
2932	AssertRCReturn(rc, rc);
2933
2934	D3D11_BUFFER_DESC bd;
2935	RT_ZERO(bd);
2936	bd.ByteWidth = pSurface->paMipmapLevels[0].cbSurface;
2937	bd.Usage = D3D11_USAGE_DEFAULT;
2938	bd.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
2939	bd.CPUAccessFlags = 0; /// @todo ? D3D11_CPU_ACCESS_READ;
2940	bd.MiscFlags = 0;
2941	bd.StructureByteStride = 0;
2942
2943	HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, 0, &pBackendSurface->u.pBuffer);
2944	#ifndef DX_COMMON_STAGING_BUFFER
2945	if (SUCCEEDED(hr))
2946	{
2947	/* Map-able Buffer. */
2948	bd.Usage = D3D11_USAGE_DYNAMIC;
2949	bd.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2950	bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2951	hr = pDevice->pDevice->CreateBuffer(&bd, 0, &pBackendSurface->dynamic.pBuffer);
2952	Assert(SUCCEEDED(hr));
2953	}
2954
2955	if (SUCCEEDED(hr))
2956	{
2957	/* Staging texture. */
2958	bd.Usage = D3D11_USAGE_STAGING;
2959	bd.BindFlags = 0; /* No flags allowed. */
2960	bd.CPUAccessFlags = D3D11_CPU_ACCESS_READ \| D3D11_CPU_ACCESS_WRITE;
2961	hr = pDevice->pDevice->CreateBuffer(&bd, 0, &pBackendSurface->staging.pBuffer);
2962	Assert(SUCCEEDED(hr));
2963	}
2964	#endif
2965
2966	if (SUCCEEDED(hr))
2967	{
2968	/*
2969	* Success.
2970	*/
2971	pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
2972	pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
2973	pSurface->pBackendSurface = pBackendSurface;
2974	return VINF_SUCCESS;
2975	}
2976
2977	/* Failure. */
2978	D3D_RELEASE(pBackendSurface->u.pBuffer);
2979	#ifndef DX_COMMON_STAGING_BUFFER
2980	D3D_RELEASE(pBackendSurface->dynamic.pBuffer);
2981	D3D_RELEASE(pBackendSurface->staging.pBuffer);
2982	#endif
2983	RTMemFree(pBackendSurface);
2984	return VERR_NO_MEMORY;
2985	}
2986
2987	#if 0
2988	static int vmsvga3dBackSurfaceCreateConstantBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface, uint32_t offsetInBytes, uint32_t sizeInBytes)
2989	{
2990	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
2991	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
2992
2993	/* Buffers should be created as such. */
2994	AssertReturn(RT_BOOL(pSurface->f.surfaceFlags & ( SVGA3D_SURFACE_BIND_CONSTANT_BUFFER)), VERR_INVALID_PARAMETER);
2995
2996	if (pSurface->pBackendSurface != NULL)
2997	{
2998	AssertFailed(); /** @todo Should the function not be used like that? */
2999	vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
3000	}
3001
3002	PVMSVGA3DMIPMAPLEVEL pMipLevel;
3003	int rc = vmsvga3dMipmapLevel(pSurface, 0, 0, &pMipLevel);
3004	AssertRCReturn(rc, rc);
3005
3006	ASSERT_GUEST_RETURN( offsetInBytes < pMipLevel->cbSurface
3007	&& sizeInBytes <= pMipLevel->cbSurface - offsetInBytes, VERR_INVALID_PARAMETER);
3008
3009	PVMSVGA3DBACKENDSURFACE pBackendSurface;
3010	rc = dxBackendSurfaceAlloc(&pBackendSurface);
3011	AssertRCReturn(rc, rc);
3012
3013	/* Upload the current data, if any. */
3014	D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
3015	D3D11_SUBRESOURCE_DATA initialData;
3016	if (pMipLevel->pSurfaceData)
3017	{
3018	initialData.pSysMem = (uint8_t *)pMipLevel->pSurfaceData + offsetInBytes;
3019	initialData.SysMemPitch = pMipLevel->cbSurface;
3020	initialData.SysMemSlicePitch = pMipLevel->cbSurface;
3021
3022	pInitialData = &initialData;
3023
3024	// Log(("%.*Rhxd\n", sizeInBytes, initialData.pSysMem));
3025	}
3026
3027	D3D11_BUFFER_DESC bd;
3028	RT_ZERO(bd);
3029	bd.ByteWidth = sizeInBytes;
3030	bd.Usage = D3D11_USAGE_DYNAMIC;
3031	bd.BindFlags = D3D11_BIND_CONSTANT_BUFFER;
3032	bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
3033	bd.MiscFlags = 0;
3034	bd.StructureByteStride = 0;
3035
3036	HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->u.pBuffer);
3037	if (SUCCEEDED(hr))
3038	{
3039	/*
3040	* Success.
3041	*/
3042	pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
3043	pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
3044	pSurface->pBackendSurface = pBackendSurface;
3045	return VINF_SUCCESS;
3046	}
3047
3048	/* Failure. */
3049	D3D_RELEASE(pBackendSurface->u.pBuffer);
3050	RTMemFree(pBackendSurface);
3051	return VERR_NO_MEMORY;
3052	}
3053	#endif
3054
3055	static int vmsvga3dBackSurfaceCreateResource(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
3056	{
3057	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
3058	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3059
3060	if (pSurface->pBackendSurface != NULL)
3061	{
3062	AssertFailed(); /** @todo Should the function not be used like that? */
3063	vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
3064	}
3065
3066	PVMSVGA3DMIPMAPLEVEL pMipLevel;
3067	int rc = vmsvga3dMipmapLevel(pSurface, 0, 0, &pMipLevel);
3068	AssertRCReturn(rc, rc);
3069
3070	PVMSVGA3DBACKENDSURFACE pBackendSurface;
3071	rc = dxBackendSurfaceAlloc(&pBackendSurface);
3072	AssertRCReturn(rc, rc);
3073
3074	HRESULT hr;
3075
3076	/*
3077	* Figure out the type of the surface.
3078	*/
3079	if (pSurface->format == SVGA3D_BUFFER)
3080	{
3081	/* Upload the current data, if any. */
3082	D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
3083	D3D11_SUBRESOURCE_DATA initialData;
3084	if (pMipLevel->pSurfaceData)
3085	{
3086	initialData.pSysMem = pMipLevel->pSurfaceData;
3087	initialData.SysMemPitch = pMipLevel->cbSurface;
3088	initialData.SysMemSlicePitch = pMipLevel->cbSurface;
3089
3090	pInitialData = &initialData;
3091	}
3092
3093	D3D11_BUFFER_DESC bd;
3094	RT_ZERO(bd);
3095	bd.ByteWidth = pMipLevel->cbSurface;
3096
3097	if (pSurface->f.surfaceFlags & (SVGA3D_SURFACE_STAGING_UPLOAD \| SVGA3D_SURFACE_STAGING_DOWNLOAD))
3098	bd.Usage = D3D11_USAGE_STAGING;
3099	else if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_HINT_DYNAMIC)
3100	bd.Usage = D3D11_USAGE_DYNAMIC;
3101	else if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_HINT_STATIC)
3102	{
3103	/* Use D3D11_USAGE_DEFAULT instead of D3D11_USAGE_IMMUTABLE to let the guest the guest update
3104	* the buffer later.
3105	*
3106	* The guest issues SVGA_3D_CMD_INVALIDATE_GB_IMAGE followed by SVGA_3D_CMD_UPDATE_GB_IMAGE
3107	* when the data in SVGA3D_SURFACE_HINT_STATIC surface is updated.
3108	* D3D11_USAGE_IMMUTABLE would work if the device destroys the D3D buffer on INVALIDATE
3109	* and re-creates it in setupPipeline with initial data from the backing guest MOB.
3110	* Currently the device does not destroy the buffer on INVALIDATE. So just use D3D11_USAGE_DEFAULT.
3111	*/
3112	bd.Usage = D3D11_USAGE_DEFAULT;
3113	}
3114	else if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_HINT_INDIRECT_UPDATE)
3115	bd.Usage = D3D11_USAGE_DEFAULT;
3116
3117	bd.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
3118
3119	if (bd.Usage == D3D11_USAGE_STAGING)
3120	bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE \| D3D11_CPU_ACCESS_READ;
3121	else if (bd.Usage == D3D11_USAGE_DYNAMIC)
3122	bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
3123
3124	if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_DRAWINDIRECT_ARGS)
3125	bd.MiscFlags \|= D3D11_RESOURCE_MISC_DRAWINDIRECT_ARGS;
3126	if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_BIND_RAW_VIEWS)
3127	bd.MiscFlags \|= D3D11_RESOURCE_MISC_BUFFER_ALLOW_RAW_VIEWS;
3128	if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_BUFFER_STRUCTURED)
3129	bd.MiscFlags \|= D3D11_RESOURCE_MISC_BUFFER_STRUCTURED;
3130	if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_RESOURCE_CLAMP)
3131	bd.MiscFlags \|= D3D11_RESOURCE_MISC_RESOURCE_CLAMP;
3132
3133	if (bd.MiscFlags & D3D11_RESOURCE_MISC_BUFFER_STRUCTURED)
3134	{
3135	SVGAOTableSurfaceEntry entrySurface;
3136	rc = vmsvgaR3OTableReadSurface(pThisCC->svga.pSvgaR3State, pSurface->id, &entrySurface);
3137	AssertRCReturn(rc, rc);
3138
3139	bd.StructureByteStride = entrySurface.bufferByteStride;
3140	}
3141
3142	hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->u.pBuffer);
3143	Assert(SUCCEEDED(hr));
3144	#ifndef DX_COMMON_STAGING_BUFFER
3145	if (SUCCEEDED(hr))
3146	{
3147	/* Map-able Buffer. */
3148	bd.Usage = D3D11_USAGE_DYNAMIC;
3149	bd.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
3150	bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
3151	hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->dynamic.pBuffer);
3152	Assert(SUCCEEDED(hr));
3153	}
3154
3155	if (SUCCEEDED(hr))
3156	{
3157	/* Staging texture. */
3158	bd.Usage = D3D11_USAGE_STAGING;
3159	bd.BindFlags = 0; /* No flags allowed. */
3160	bd.CPUAccessFlags = D3D11_CPU_ACCESS_READ \| D3D11_CPU_ACCESS_WRITE;
3161	hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->staging.pBuffer);
3162	Assert(SUCCEEDED(hr));
3163	}
3164	#endif
3165	if (SUCCEEDED(hr))
3166	{
3167	pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
3168	pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
3169	}
3170	}
3171	else
3172	{
3173	/** @todo Texture. Currently vmsvga3dBackSurfaceCreateTexture is called for textures. */
3174	AssertFailed();
3175	hr = E_FAIL;
3176	}
3177
3178	if (SUCCEEDED(hr))
3179	{
3180	/*
3181	* Success.
3182	*/
3183	pSurface->pBackendSurface = pBackendSurface;
3184	return VINF_SUCCESS;
3185	}
3186
3187	/* Failure. */
3188	D3D_RELEASE(pBackendSurface->u.pResource);
3189	D3D_RELEASE(pBackendSurface->dynamic.pResource);
3190	D3D_RELEASE(pBackendSurface->staging.pResource);
3191	RTMemFree(pBackendSurface);
3192	return VERR_NO_MEMORY;
3193	}
3194
3195
3196	static int dxEnsureResource(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t sid,
3197	PVMSVGA3DSURFACE ppSurface, ID3D11Resource *ppResource)
3198	{
3199	/* Get corresponding resource for sid. Create the surface if does not yet exist. */
3200	PVMSVGA3DSURFACE pSurface;
3201	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
3202	AssertRCReturn(rc, rc);
3203
3204	if (pSurface->pBackendSurface == NULL)
3205	{
3206	/* Create the actual texture or buffer. */
3207	/** @todo One function to create all resources from surfaces. */
3208	if (pSurface->format != SVGA3D_BUFFER)
3209	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pSurface);
3210	else
3211	rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pSurface);
3212
3213	AssertRCReturn(rc, rc);
3214	LogFunc(("Created for sid = %u\n", sid));
3215	}
3216
3217	ID3D11Resource *pResource = dxResource(pThisCC->svga.p3dState, pSurface, pDXContext);
3218	AssertReturn(pResource, VERR_INVALID_STATE);
3219
3220	*ppSurface = pSurface;
3221	*ppResource = pResource;
3222	return VINF_SUCCESS;
3223	}
3224
3225
3226	#ifdef DX_COMMON_STAGING_BUFFER
3227	static int dxStagingBufferRealloc(DXDEVICE *pDXDevice, uint32_t cbRequiredSize)
3228	{
3229	AssertReturn(cbRequiredSize < SVGA3D_MAX_SURFACE_MEM_SIZE, VERR_INVALID_PARAMETER);
3230
3231	if (RT_LIKELY(cbRequiredSize <= pDXDevice->cbStagingBuffer))
3232	return VINF_SUCCESS;
3233
3234	D3D_RELEASE(pDXDevice->pStagingBuffer);
3235
3236	uint32_t const cbAlloc = RT_ALIGN_32(cbRequiredSize, _64K);
3237
3238	D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
3239	D3D11_BUFFER_DESC bd;
3240	RT_ZERO(bd);
3241	bd.ByteWidth = cbAlloc;
3242	bd.Usage = D3D11_USAGE_STAGING;
3243	//bd.BindFlags = 0; /* No bind flags are allowed for staging resources. */
3244	bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE \| D3D11_CPU_ACCESS_READ;
3245
3246	int rc = VINF_SUCCESS;
3247	ID3D11Buffer *pBuffer;
3248	HRESULT hr = pDXDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBuffer);
3249	if (SUCCEEDED(hr))
3250	{
3251	pDXDevice->pStagingBuffer = pBuffer;
3252	pDXDevice->cbStagingBuffer = cbAlloc;
3253	}
3254	else
3255	{
3256	pDXDevice->cbStagingBuffer = 0;
3257	rc = VERR_NO_MEMORY;
3258	}
3259
3260	return rc;
3261	}
3262	#endif
3263
3264
3265	static DECLCALLBACK(int) vmsvga3dBackInit(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC)
3266	{
3267	RT_NOREF(pDevIns, pThis);
3268
3269	int rc;
3270	#ifdef RT_OS_LINUX /** @todo Remove, this is currently needed for loading the X11 library in order to call XInitThreads(). */
3271	rc = glLdrInit(pDevIns);
3272	if (RT_FAILURE(rc))
3273	{
3274	LogRel(("VMSVGA3d: Error loading OpenGL library and resolving necessary functions: %Rrc\n", rc));
3275	return rc;
3276	}
3277	#endif
3278
3279	PVMSVGA3DBACKEND pBackend = (PVMSVGA3DBACKEND)RTMemAllocZ(sizeof(VMSVGA3DBACKEND));
3280	AssertReturn(pBackend, VERR_NO_MEMORY);
3281	pThisCC->svga.p3dState->pBackend = pBackend;
3282
3283	rc = RTLdrLoadSystem(VBOX_D3D11_LIBRARY_NAME, /* fNoUnload = */ true, &pBackend->hD3D11);
3284	AssertRC(rc);
3285	if (RT_SUCCESS(rc))
3286	{
3287	rc = RTLdrGetSymbol(pBackend->hD3D11, "D3D11CreateDevice", (void **)&pBackend->pfnD3D11CreateDevice);
3288	AssertRC(rc);
3289	}
3290
3291	if (RT_SUCCESS(rc))
3292	{
3293	/* Failure to load the shader disassembler is ignored. */
3294	int rc2 = RTLdrLoadSystem("D3DCompiler_47", /* fNoUnload = */ true, &pBackend->hD3DCompiler);
3295	if (RT_SUCCESS(rc2))
3296	rc2 = RTLdrGetSymbol(pBackend->hD3DCompiler, "D3DDisassemble", (void **)&pBackend->pfnD3DDisassemble);
3297	Log6Func(("Load D3DDisassemble: %Rrc\n", rc2));
3298	}
3299
3300	vmsvga3dDXInitContextMobData(&pBackend->svgaDXContext);
3301	//DEBUG_BREAKPOINT_TEST();
3302	return rc;
3303	}
3304
3305
3306	static DECLCALLBACK(int) vmsvga3dBackPowerOn(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC)
3307	{
3308	RT_NOREF(pDevIns, pThis);
3309
3310	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3311	AssertReturn(pState, VERR_INVALID_STATE);
3312
3313	PVMSVGA3DBACKEND pBackend = pState->pBackend;
3314	AssertReturn(pBackend, VERR_INVALID_STATE);
3315
3316	int rc = dxDeviceCreate(pBackend, &pBackend->dxDevice);
3317	if (RT_SUCCESS(rc))
3318	{
3319	IDXGIAdapter *pAdapter = NULL;
3320	HRESULT hr = pBackend->dxDevice.pDxgiFactory->EnumAdapters(0, &pAdapter);
3321	if (SUCCEEDED(hr))
3322	{
3323	DXGI_ADAPTER_DESC desc;
3324	hr = pAdapter->GetDesc(&desc);
3325	if (SUCCEEDED(hr))
3326	{
3327	pBackend->VendorId = desc.VendorId;
3328	pBackend->DeviceId = desc.DeviceId;
3329
3330	char sz[RT_ELEMENTS(desc.Description)];
3331	for (unsigned i = 0; i < RT_ELEMENTS(desc.Description); ++i)
3332	sz[i] = (char)desc.Description[i];
3333	LogRelMax(1, ("VMSVGA: Adapter %04x:%04x [%s]\n", pBackend->VendorId, pBackend->DeviceId, sz));
3334	}
3335
3336	pAdapter->Release();
3337	}
3338
3339	if (pBackend->dxDevice.pVideoDevice)
3340	dxLogRelVideoCaps(pBackend->dxDevice.pVideoDevice);
3341
3342	if (!pThis->svga.fVMSVGA3dMSAA)
3343	pBackend->dxDevice.MultisampleCountMask = 0;
3344	}
3345	return rc;
3346	}
3347
3348
3349	static DECLCALLBACK(int) vmsvga3dBackReset(PVGASTATECC pThisCC)
3350	{
3351	RT_NOREF(pThisCC);
3352	return VINF_SUCCESS;
3353	}
3354
3355
3356	static DECLCALLBACK(int) vmsvga3dBackTerminate(PVGASTATECC pThisCC)
3357	{
3358	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3359	AssertReturn(pState, VERR_INVALID_STATE);
3360
3361	if (pState->pBackend)
3362	dxDeviceDestroy(pState->pBackend, &pState->pBackend->dxDevice);
3363
3364	return VINF_SUCCESS;
3365	}
3366
3367
3368	/** @todo Such structures must be in VBoxVideo3D.h */
3369	typedef struct VBOX3DNOTIFYDEFINESCREEN
3370	{
3371	VBOX3DNOTIFY Core;
3372	uint32_t cWidth;
3373	uint32_t cHeight;
3374	int32_t xRoot;
3375	int32_t yRoot;
3376	uint32_t fPrimary;
3377	uint32_t cDpi;
3378	} VBOX3DNOTIFYDEFINESCREEN;
3379
3380
3381	static int vmsvga3dDrvNotifyDefineScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
3382	{
3383	VBOX3DNOTIFYDEFINESCREEN n;
3384	n.Core.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_CREATED;
3385	n.Core.iDisplay = pScreen->idScreen;
3386	n.Core.u32Reserved = 0;
3387	n.Core.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
3388	RT_ZERO(n.Core.au8Data);
3389	n.cWidth = pScreen->cWidth;
3390	n.cHeight = pScreen->cHeight;
3391	n.xRoot = pScreen->xOrigin;
3392	n.yRoot = pScreen->yOrigin;
3393	n.fPrimary = RT_BOOL(pScreen->fuScreen & SVGA_SCREEN_IS_PRIMARY);
3394	n.cDpi = pScreen->cDpi;
3395
3396	return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n.Core);
3397	}
3398
3399
3400	static int vmsvga3dDrvNotifyDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
3401	{
3402	VBOX3DNOTIFY n;
3403	n.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_DESTROYED;
3404	n.iDisplay = pScreen->idScreen;
3405	n.u32Reserved = 0;
3406	n.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
3407	RT_ZERO(n.au8Data);
3408
3409	return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n);
3410	}
3411
3412
3413	static int vmsvga3dDrvNotifyBindSurface(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, HANDLE hSharedSurface)
3414	{
3415	VBOX3DNOTIFY n;
3416	n.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_BIND_SURFACE;
3417	n.iDisplay = pScreen->idScreen;
3418	n.u32Reserved = 0;
3419	n.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
3420	(uint64_t )&n.au8Data[0] = (uint64_t)hSharedSurface;
3421
3422	return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n);
3423	}
3424
3425
3426	typedef struct VBOX3DNOTIFYUPDATE
3427	{
3428	VBOX3DNOTIFY Core;
3429	uint32_t x;
3430	uint32_t y;
3431	uint32_t w;
3432	uint32_t h;
3433	} VBOX3DNOTIFYUPDATE;
3434
3435
3436	static int vmsvga3dDrvNotifyUpdate(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen,
3437	uint32_t x, uint32_t y, uint32_t w, uint32_t h)
3438	{
3439	VBOX3DNOTIFYUPDATE n;
3440	n.Core.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_UPDATE_END;
3441	n.Core.iDisplay = pScreen->idScreen;
3442	n.Core.u32Reserved = 0;
3443	n.Core.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
3444	RT_ZERO(n.Core.au8Data);
3445	n.x = x;
3446	n.y = y;
3447	n.w = w;
3448	n.h = h;
3449
3450	return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n.Core);
3451	}
3452
3453	static int vmsvga3dHwScreenCreate(PVMSVGA3DSTATE pState, uint32_t cWidth, uint32_t cHeight, VMSVGAHWSCREEN *p)
3454	{
3455	PVMSVGA3DBACKEND pBackend = pState->pBackend;
3456
3457	DXDEVICE *pDXDevice = &pBackend->dxDevice;
3458	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
3459
3460	D3D11_TEXTURE2D_DESC td;
3461	RT_ZERO(td);
3462	td.Width = cWidth;
3463	td.Height = cHeight;
3464	td.MipLevels = 1;
3465	td.ArraySize = 1;
3466	td.Format = DXGI_FORMAT_B8G8R8A8_UNORM;
3467	td.SampleDesc.Count = 1;
3468	td.SampleDesc.Quality = 0;
3469	td.Usage = D3D11_USAGE_DEFAULT;
3470	td.BindFlags = D3D11_BIND_RENDER_TARGET \| D3D11_BIND_SHADER_RESOURCE;
3471	td.CPUAccessFlags = 0;
3472	td.MiscFlags = D3D11_RESOURCE_MISC_SHARED_KEYEDMUTEX;
3473
3474	HRESULT hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &p->pTexture);
3475	if (SUCCEEDED(hr))
3476	{
3477	/* Get the shared handle. */
3478	hr = p->pTexture->QueryInterface(__uuidof(IDXGIResource), (void**)&p->pDxgiResource);
3479	if (SUCCEEDED(hr))
3480	{
3481	hr = p->pDxgiResource->GetSharedHandle(&p->SharedHandle);
3482	if (SUCCEEDED(hr))
3483	hr = p->pTexture->QueryInterface(__uuidof(IDXGIKeyedMutex), (void**)&p->pDXGIKeyedMutex);
3484	}
3485	}
3486
3487	if (SUCCEEDED(hr))
3488	return VINF_SUCCESS;
3489
3490	AssertFailed();
3491	return VERR_NOT_SUPPORTED;
3492	}
3493
3494
3495	static void vmsvga3dHwScreenDestroy(PVMSVGA3DSTATE pState, VMSVGAHWSCREEN *p)
3496	{
3497	RT_NOREF(pState);
3498	D3D_RELEASE(p->pDXGIKeyedMutex);
3499	D3D_RELEASE(p->pDxgiResource);
3500	D3D_RELEASE(p->pTexture);
3501	p->SharedHandle = 0;
3502	p->sidScreenTarget = SVGA_ID_INVALID;
3503	}
3504
3505
3506	static DECLCALLBACK(int) vmsvga3dBackDefineScreen(PVGASTATE pThis, PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
3507	{
3508	RT_NOREF(pThis, pThisCC, pScreen);
3509
3510	LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: screen %u\n", pScreen->idScreen));
3511
3512	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3513	AssertReturn(pState, VERR_INVALID_STATE);
3514
3515	PVMSVGA3DBACKEND pBackend = pState->pBackend;
3516	AssertReturn(pBackend, VERR_INVALID_STATE);
3517
3518	Assert(pScreen->pHwScreen == NULL);
3519
3520	VMSVGAHWSCREEN p = (VMSVGAHWSCREEN )RTMemAllocZ(sizeof(VMSVGAHWSCREEN));
3521	AssertPtrReturn(p, VERR_NO_MEMORY);
3522
3523	p->sidScreenTarget = SVGA_ID_INVALID;
3524
3525	int rc = vmsvga3dDrvNotifyDefineScreen(pThisCC, pScreen);
3526	if (RT_SUCCESS(rc))
3527	{
3528	/* The frontend supports the screen. Create the actual resource. */
3529	rc = vmsvga3dHwScreenCreate(pState, pScreen->cWidth, pScreen->cHeight, p);
3530	if (RT_SUCCESS(rc))
3531	LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: created\n"));
3532	}
3533
3534	if (RT_SUCCESS(rc))
3535	{
3536	LogRel(("VMSVGA: Using HW accelerated screen %u\n", pScreen->idScreen));
3537	pScreen->pHwScreen = p;
3538	}
3539	else
3540	{
3541	LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: %Rrc\n", rc));
3542	vmsvga3dHwScreenDestroy(pState, p);
3543	RTMemFree(p);
3544	}
3545
3546	return rc;
3547	}
3548
3549
3550	static DECLCALLBACK(int) vmsvga3dBackDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
3551	{
3552	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3553	AssertReturn(pState, VERR_INVALID_STATE);
3554
3555	vmsvga3dDrvNotifyDestroyScreen(pThisCC, pScreen);
3556
3557	if (pScreen->pHwScreen)
3558	{
3559	vmsvga3dHwScreenDestroy(pState, pScreen->pHwScreen);
3560	RTMemFree(pScreen->pHwScreen);
3561	pScreen->pHwScreen = NULL;
3562	}
3563
3564	return VINF_SUCCESS;
3565	}
3566
3567
3568	static DECLCALLBACK(int) vmsvga3dBackSurfaceBlitToScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen,
3569	SVGASignedRect destRect, SVGA3dSurfaceImageId srcImage,
3570	SVGASignedRect srcRect, uint32_t cRects, SVGASignedRect *paRects)
3571	{
3572	RT_NOREF(pThisCC, pScreen, destRect, srcImage, srcRect, cRects, paRects);
3573
3574	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3575	AssertReturn(pState, VERR_INVALID_STATE);
3576
3577	PVMSVGA3DBACKEND pBackend = pState->pBackend;
3578	AssertReturn(pBackend, VERR_INVALID_STATE);
3579
3580	VMSVGAHWSCREEN *p = pScreen->pHwScreen;
3581	AssertReturn(p, VERR_NOT_SUPPORTED);
3582
3583	PVMSVGA3DSURFACE pSurface;
3584	int rc = vmsvga3dSurfaceFromSid(pState, srcImage.sid, &pSurface);
3585	AssertRCReturn(rc, rc);
3586
3587	/** @todo Implement. */
3588	AssertFailed();
3589	return VERR_NOT_IMPLEMENTED;
3590	}
3591
3592
3593	static DECLCALLBACK(int) vmsvga3dBackSurfaceMap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const pImage, SVGA3dBox const pBox,
3594	VMSVGA3D_SURFACE_MAP enmMapType, VMSVGA3D_MAPPED_SURFACE *pMap)
3595	{
3596	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3597	AssertReturn(pState, VERR_INVALID_STATE);
3598
3599	PVMSVGA3DBACKEND pBackend = pState->pBackend;
3600	AssertReturn(pBackend, VERR_INVALID_STATE);
3601
3602	PVMSVGA3DSURFACE pSurface;
3603	int rc = vmsvga3dSurfaceFromSid(pState, pImage->sid, &pSurface);
3604	AssertRCReturn(rc, rc);
3605
3606	PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
3607	AssertPtrReturn(pBackendSurface, VERR_INVALID_STATE);
3608
3609	PVMSVGA3DMIPMAPLEVEL pMipLevel;
3610	rc = vmsvga3dMipmapLevel(pSurface, pImage->face, pImage->mipmap, &pMipLevel);
3611	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
3612
3613	/* A surface is always mapped by the DX context which has created the surface. */
3614	DXDEVICE *pDevice = dxDeviceFromCid(pSurface->idAssociatedContext, pState);
3615	AssertReturn(pDevice && pDevice->pDevice, VERR_INVALID_STATE);
3616
3617	SVGA3dBox clipBox;
3618	if (pBox)
3619	{
3620	clipBox = *pBox;
3621	vmsvgaR3ClipBox(&pMipLevel->mipmapSize, &clipBox);
3622	ASSERT_GUEST_RETURN(clipBox.w && clipBox.h && clipBox.d, VERR_INVALID_PARAMETER);
3623	}
3624	else
3625	{
3626	clipBox.x = 0;
3627	clipBox.y = 0;
3628	clipBox.z = 0;
3629	clipBox.w = pMipLevel->mipmapSize.width;
3630	clipBox.h = pMipLevel->mipmapSize.height;
3631	clipBox.d = pMipLevel->mipmapSize.depth;
3632	}
3633
3634	D3D11_MAP d3d11MapType;
3635	switch (enmMapType)
3636	{
3637	case VMSVGA3D_SURFACE_MAP_READ: d3d11MapType = D3D11_MAP_READ; break;
3638	case VMSVGA3D_SURFACE_MAP_WRITE: d3d11MapType = D3D11_MAP_WRITE; break;
3639	case VMSVGA3D_SURFACE_MAP_READ_WRITE: d3d11MapType = D3D11_MAP_READ_WRITE; break;
3640	case VMSVGA3D_SURFACE_MAP_WRITE_DISCARD: d3d11MapType = D3D11_MAP_WRITE_DISCARD; break;
3641	default:
3642	AssertFailed();
3643	return VERR_INVALID_PARAMETER;
3644	}
3645
3646	D3D11_MAPPED_SUBRESOURCE mappedResource;
3647	RT_ZERO(mappedResource);
3648
3649	if ( pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_1D
3650	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_2D
3651	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_CUBE
3652	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
3653	{
3654	ID3D11Resource *pMappedResource;
3655	if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
3656	{
3657	pMappedResource = pBackendSurface->staging.pResource;
3658
3659	/* Copy the texture content to the staging texture.
3660	* The requested miplevel of the texture is copied to the miplevel 0 of the staging texture,
3661	* because the staging (and dynamic) structures do not have miplevels.
3662	* Always copy entire miplevel so all Dst are zero and pSrcBox is NULL, as D3D11 requires.
3663	*/
3664	ID3D11Resource *pDstResource = pMappedResource;
3665	UINT DstSubresource = 0;
3666	UINT DstX = 0;
3667	UINT DstY = 0;
3668	UINT DstZ = 0;
3669	ID3D11Resource *pSrcResource = pBackendSurface->u.pResource;
3670	UINT SrcSubresource = D3D11CalcSubresource(pImage->mipmap, pImage->face, pSurface->cLevels);
3671	D3D11_BOX *pSrcBox = NULL;
3672	//D3D11_BOX SrcBox;
3673	//SrcBox.left = 0;
3674	//SrcBox.top = 0;
3675	//SrcBox.front = 0;
3676	//SrcBox.right = pMipLevel->mipmapSize.width;
3677	//SrcBox.bottom = pMipLevel->mipmapSize.height;
3678	//SrcBox.back = pMipLevel->mipmapSize.depth;
3679	pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3680	pSrcResource, SrcSubresource, pSrcBox);
3681	}
3682	else if (enmMapType == VMSVGA3D_SURFACE_MAP_WRITE)
3683	pMappedResource = pBackendSurface->staging.pResource;
3684	else
3685	pMappedResource = pBackendSurface->dynamic.pResource;
3686
3687	UINT const Subresource = 0; /* Dynamic or staging textures have one subresource. */
3688	HRESULT hr = pDevice->pImmediateContext->Map(pMappedResource, Subresource,
3689	d3d11MapType, /* MapFlags = */ 0, &mappedResource);
3690	if (SUCCEEDED(hr))
3691	vmsvga3dSurfaceMapInit(pMap, enmMapType, &clipBox, pSurface,
3692	mappedResource.pData, mappedResource.RowPitch, mappedResource.DepthPitch);
3693	else
3694	AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
3695	}
3696	else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
3697	{
3698	#ifdef DX_COMMON_STAGING_BUFFER
3699	/* Map the staging buffer. */
3700	rc = dxStagingBufferRealloc(pDevice, pMipLevel->cbSurface);
3701	if (RT_SUCCESS(rc))
3702	{
3703	/* The staging buffer does not allow D3D11_MAP_WRITE_DISCARD, so replace it. */
3704	if (d3d11MapType == D3D11_MAP_WRITE_DISCARD)
3705	d3d11MapType = D3D11_MAP_WRITE;
3706
3707	if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
3708	{
3709	/* Copy from the buffer to the staging buffer. */
3710	ID3D11Resource *pDstResource = pDevice->pStagingBuffer;
3711	UINT DstSubresource = 0;
3712	UINT DstX = clipBox.x;
3713	UINT DstY = clipBox.y;
3714	UINT DstZ = clipBox.z;
3715	ID3D11Resource *pSrcResource = pBackendSurface->u.pResource;
3716	UINT SrcSubresource = 0;
3717	D3D11_BOX SrcBox;
3718	SrcBox.left = clipBox.x;
3719	SrcBox.top = clipBox.y;
3720	SrcBox.front = clipBox.z;
3721	SrcBox.right = clipBox.w;
3722	SrcBox.bottom = clipBox.h;
3723	SrcBox.back = clipBox.d;
3724	pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3725	pSrcResource, SrcSubresource, &SrcBox);
3726	}
3727
3728	UINT const Subresource = 0; /* Buffers have only one subresource. */
3729	HRESULT hr = pDevice->pImmediateContext->Map(pDevice->pStagingBuffer, Subresource,
3730	d3d11MapType, /* MapFlags = */ 0, &mappedResource);
3731	if (SUCCEEDED(hr))
3732	vmsvga3dSurfaceMapInit(pMap, enmMapType, &clipBox, pSurface,
3733	mappedResource.pData, mappedResource.RowPitch, mappedResource.DepthPitch);
3734	else
3735	AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
3736	}
3737	#else
3738	ID3D11Resource *pMappedResource;
3739	if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
3740	{
3741	pMappedResource = pBackendSurface->staging.pResource;
3742
3743	/* Copy the resource content to the staging resource. */
3744	ID3D11Resource *pDstResource = pMappedResource;
3745	UINT DstSubresource = 0;
3746	UINT DstX = clipBox.x;
3747	UINT DstY = clipBox.y;
3748	UINT DstZ = clipBox.z;
3749	ID3D11Resource *pSrcResource = pBackendSurface->u.pResource;
3750	UINT SrcSubresource = 0;
3751	D3D11_BOX SrcBox;
3752	SrcBox.left = clipBox.x;
3753	SrcBox.top = clipBox.y;
3754	SrcBox.front = clipBox.z;
3755	SrcBox.right = clipBox.w;
3756	SrcBox.bottom = clipBox.h;
3757	SrcBox.back = clipBox.d;
3758	pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3759	pSrcResource, SrcSubresource, &SrcBox);
3760	}
3761	else if (enmMapType == VMSVGA3D_SURFACE_MAP_WRITE)
3762	pMappedResource = pBackendSurface->staging.pResource;
3763	else
3764	pMappedResource = pBackendSurface->dynamic.pResource;
3765
3766	UINT const Subresource = 0; /* Dynamic or staging textures have one subresource. */
3767	HRESULT hr = pDevice->pImmediateContext->Map(pMappedResource, Subresource,
3768	d3d11MapType, /* MapFlags = */ 0, &mappedResource);
3769	if (SUCCEEDED(hr))
3770	vmsvga3dSurfaceMapInit(pMap, enmMapType, &clipBox, pSurface,
3771	mappedResource.pData, mappedResource.RowPitch, mappedResource.DepthPitch);
3772	else
3773	AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
3774	#endif
3775	}
3776	else
3777	{
3778	// UINT D3D11CalcSubresource(UINT MipSlice, UINT ArraySlice, UINT MipLevels);
3779	/** @todo Implement. */
3780	AssertFailed();
3781	rc = VERR_NOT_IMPLEMENTED;
3782	}
3783
3784	return rc;
3785	}
3786
3787
3788	static DECLCALLBACK(int) vmsvga3dBackSurfaceUnmap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const pImage, VMSVGA3D_MAPPED_SURFACE pMap, bool fWritten)
3789	{
3790	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3791	AssertReturn(pState, VERR_INVALID_STATE);
3792
3793	PVMSVGA3DBACKEND pBackend = pState->pBackend;
3794	AssertReturn(pBackend, VERR_INVALID_STATE);
3795
3796	PVMSVGA3DSURFACE pSurface;
3797	int rc = vmsvga3dSurfaceFromSid(pState, pImage->sid, &pSurface);
3798	AssertRCReturn(rc, rc);
3799
3800	/* The called should not use the function for system memory surfaces. */
3801	PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
3802	AssertReturn(pBackendSurface, VERR_INVALID_PARAMETER);
3803
3804	PVMSVGA3DMIPMAPLEVEL pMipLevel;
3805	rc = vmsvga3dMipmapLevel(pSurface, pImage->face, pImage->mipmap, &pMipLevel);
3806	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
3807
3808	/* A surface is always mapped by the DX context which has created the surface. */
3809	DXDEVICE *pDevice = dxDeviceFromCid(pSurface->idAssociatedContext, pState);
3810	AssertReturn(pDevice && pDevice->pDevice, VERR_INVALID_STATE);
3811
3812	if ( pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_1D
3813	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_2D
3814	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_CUBE
3815	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
3816	{
3817	ID3D11Resource *pMappedResource;
3818	if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ)
3819	pMappedResource = pBackendSurface->staging.pResource;
3820	else if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE)
3821	pMappedResource = pBackendSurface->staging.pResource;
3822	else
3823	pMappedResource = pBackendSurface->dynamic.pResource;
3824
3825	UINT const Subresource = 0; /* Staging or dynamic textures have one subresource. */
3826	pDevice->pImmediateContext->Unmap(pMappedResource, Subresource);
3827
3828	if ( fWritten
3829	&& ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
3830	\|\| pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
3831	\|\| pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
3832	{
3833	/* If entire resource must be copied then use pSrcBox = NULL and dst point (0,0,0)
3834	* Because DX11 insists on this for some resource types, for example DEPTH_STENCIL resources.
3835	*/
3836	uint32_t const cWidth0 = pSurface->paMipmapLevels[0].mipmapSize.width;
3837	uint32_t const cHeight0 = pSurface->paMipmapLevels[0].mipmapSize.height;
3838	uint32_t const cDepth0 = pSurface->paMipmapLevels[0].mipmapSize.depth;
3839	/** @todo Entire subresource is always mapped. So find a way to copy it back, important for DEPTH_STENCIL mipmaps. */
3840	bool const fEntireResource = pMap->box.x == 0 && pMap->box.y == 0 && pMap->box.z == 0
3841	&& pMap->box.w == cWidth0 && pMap->box.h == cHeight0 && pMap->box.d == cDepth0;
3842
3843	ID3D11Resource *pDstResource = pBackendSurface->u.pResource;
3844	UINT DstSubresource = D3D11CalcSubresource(pImage->mipmap, pImage->face, pSurface->cLevels);
3845	UINT DstX = (pMap->box.x / pSurface->cxBlock) * pSurface->cxBlock;
3846	UINT DstY = (pMap->box.y / pSurface->cyBlock) * pSurface->cyBlock;
3847	UINT DstZ = pMap->box.z;
3848	ID3D11Resource *pSrcResource = pMappedResource;
3849	UINT SrcSubresource = Subresource;
3850	D3D11_BOX *pSrcBox;
3851	D3D11_BOX SrcBox;
3852	if (fEntireResource)
3853	pSrcBox = NULL;
3854	else
3855	{
3856	uint32_t const cxBlocks = (pMap->box.w + pSurface->cxBlock - 1) / pSurface->cxBlock;
3857	uint32_t const cyBlocks = (pMap->box.h + pSurface->cyBlock - 1) / pSurface->cyBlock;
3858
3859	SrcBox.left = DstX;
3860	SrcBox.top = DstY;
3861	SrcBox.front = DstZ;
3862	SrcBox.right = DstX + cxBlocks * pSurface->cxBlock;
3863	SrcBox.bottom = DstY + cyBlocks * pSurface->cyBlock;
3864	SrcBox.back = DstZ + pMap->box.d;
3865	pSrcBox = &SrcBox;
3866	}
3867
3868	pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3869	pSrcResource, SrcSubresource, pSrcBox);
3870	}
3871	}
3872	else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
3873	{
3874	Log4(("Unmap buffer sid = %u:\n%.*Rhxd\n", pSurface->id, pMap->cbRow, pMap->pvData));
3875
3876	#ifdef DX_COMMON_STAGING_BUFFER
3877	/* Unmap the staging buffer. */
3878	UINT const Subresource = 0; /* Buffers have only one subresource. */
3879	pDevice->pImmediateContext->Unmap(pDevice->pStagingBuffer, Subresource);
3880
3881	/* Copy from the staging buffer to the actual buffer */
3882	if ( fWritten
3883	&& ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
3884	\|\| pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
3885	\|\| pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
3886	{
3887	ID3D11Resource *pDstResource = pBackendSurface->u.pResource;
3888	UINT DstSubresource = 0;
3889	UINT DstX = (pMap->box.x / pSurface->cxBlock) * pSurface->cxBlock;
3890	UINT DstY = (pMap->box.y / pSurface->cyBlock) * pSurface->cyBlock;
3891	UINT DstZ = pMap->box.z;
3892	ID3D11Resource *pSrcResource = pDevice->pStagingBuffer;
3893	UINT SrcSubresource = 0;
3894	D3D11_BOX SrcBox;
3895
3896	uint32_t const cxBlocks = (pMap->box.w + pSurface->cxBlock - 1) / pSurface->cxBlock;
3897	uint32_t const cyBlocks = (pMap->box.h + pSurface->cyBlock - 1) / pSurface->cyBlock;
3898
3899	SrcBox.left = DstX;
3900	SrcBox.top = DstY;
3901	SrcBox.front = DstZ;
3902	SrcBox.right = DstX + cxBlocks * pSurface->cxBlock;
3903	SrcBox.bottom = DstY + cyBlocks * pSurface->cyBlock;
3904	SrcBox.back = DstZ + pMap->box.d;
3905
3906	pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3907	pSrcResource, SrcSubresource, &SrcBox);
3908	}
3909	#else
3910	ID3D11Resource *pMappedResource;
3911	if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ)
3912	pMappedResource = pBackendSurface->staging.pResource;
3913	else if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE)
3914	pMappedResource = pBackendSurface->staging.pResource;
3915	else
3916	pMappedResource = pBackendSurface->dynamic.pResource;
3917
3918	UINT const Subresource = 0; /* Staging or dynamic textures have one subresource. */
3919	pDevice->pImmediateContext->Unmap(pMappedResource, Subresource);
3920
3921	if ( fWritten
3922	&& ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
3923	\|\| pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
3924	\|\| pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
3925	{
3926	ID3D11Resource *pDstResource = pBackendSurface->u.pResource;
3927	UINT DstSubresource = 0;
3928	UINT DstX = pMap->box.x;
3929	UINT DstY = pMap->box.y;
3930	UINT DstZ = pMap->box.z;
3931	ID3D11Resource *pSrcResource = pMappedResource;
3932	UINT SrcSubresource = 0;
3933	D3D11_BOX SrcBox;
3934	SrcBox.left = DstX;
3935	SrcBox.top = DstY;
3936	SrcBox.front = DstZ;
3937	SrcBox.right = DstX + pMap->box.w;
3938	SrcBox.bottom = DstY + pMap->box.h;
3939	SrcBox.back = DstZ + pMap->box.d;
3940	pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3941	pSrcResource, SrcSubresource, &SrcBox);
3942	}
3943	#endif
3944	}
3945	else
3946	{
3947	AssertFailed();
3948	rc = VERR_NOT_IMPLEMENTED;
3949	}
3950
3951	return rc;
3952	}
3953
3954
3955	static DECLCALLBACK(int) vmsvga3dScreenTargetBind(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, uint32_t sid)
3956	{
3957	int rc = VINF_SUCCESS;
3958
3959	PVMSVGA3DSURFACE pSurface;
3960	if (sid != SVGA_ID_INVALID)
3961	{
3962	/* Create the surface if does not yet exist. */
3963	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3964	AssertReturn(pState, VERR_INVALID_STATE);
3965
3966	rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
3967	AssertRCReturn(rc, rc);
3968
3969	if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
3970	{
3971	/* Create the actual texture. */
3972	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, NULL, pSurface);
3973	AssertRCReturn(rc, rc);
3974	}
3975	}
3976	else
3977	pSurface = NULL;
3978
3979	/* Notify the HW accelerated screen if it is used. */
3980	VMSVGAHWSCREEN *pHwScreen = pScreen->pHwScreen;
3981	if (!pHwScreen)
3982	return VINF_SUCCESS;
3983
3984	/* Same surface -> do nothing. */
3985	if (pHwScreen->sidScreenTarget == sid)
3986	return VINF_SUCCESS;
3987
3988	if (sid != SVGA_ID_INVALID)
3989	{
3990	AssertReturn( pSurface->pBackendSurface
3991	&& pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_2D
3992	&& RT_BOOL(pSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET), VERR_INVALID_PARAMETER);
3993
3994	HANDLE const hSharedSurface = pHwScreen->SharedHandle;
3995	rc = vmsvga3dDrvNotifyBindSurface(pThisCC, pScreen, hSharedSurface);
3996	}
3997
3998	if (RT_SUCCESS(rc))
3999	{
4000	pHwScreen->sidScreenTarget = sid;
4001	}
4002
4003	return rc;
4004	}
4005
4006
4007	static DECLCALLBACK(int) vmsvga3dScreenTargetUpdate(PVGASTATECC pThisCC, VMSVGASCREENOBJECT pScreen, SVGA3dRect const pRect)
4008	{
4009	VMSVGAHWSCREEN *pHwScreen = pScreen->pHwScreen;
4010	AssertReturn(pHwScreen, VERR_NOT_SUPPORTED);
4011
4012	if (pHwScreen->sidScreenTarget == SVGA_ID_INVALID)
4013	return VINF_SUCCESS; /* No surface bound. */
4014
4015	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4016	AssertReturn(pState, VERR_INVALID_STATE);
4017
4018	PVMSVGA3DBACKEND pBackend = pState->pBackend;
4019	AssertReturn(pBackend, VERR_INVALID_STATE);
4020
4021	PVMSVGA3DSURFACE pSurface;
4022	int rc = vmsvga3dSurfaceFromSid(pState, pHwScreen->sidScreenTarget, &pSurface);
4023	AssertRCReturn(rc, rc);
4024
4025	PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
4026	AssertReturn( pBackendSurface
4027	&& pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_2D
4028	&& RT_BOOL(pSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET),
4029	VERR_INVALID_PARAMETER);
4030
4031	SVGA3dRect boundRect;
4032	boundRect.x = 0;
4033	boundRect.y = 0;
4034	boundRect.w = pSurface->paMipmapLevels[0].mipmapSize.width;
4035	boundRect.h = pSurface->paMipmapLevels[0].mipmapSize.height;
4036	SVGA3dRect clipRect = *pRect;
4037	vmsvgaR3Clip3dRect(&boundRect, &clipRect);
4038	ASSERT_GUEST_RETURN(clipRect.w && clipRect.h, VERR_INVALID_PARAMETER);
4039
4040	/* Copy the screen texture to the shared surface. */
4041	DWORD result = pHwScreen->pDXGIKeyedMutex->AcquireSync(0, 10000);
4042	if (result == S_OK)
4043	{
4044	pBackend->dxDevice.pImmediateContext->CopyResource(pHwScreen->pTexture, pBackendSurface->u.pTexture2D);
4045
4046	dxDeviceFlush(&pBackend->dxDevice);
4047
4048	result = pHwScreen->pDXGIKeyedMutex->ReleaseSync(1);
4049	}
4050	else
4051	AssertFailed();
4052
4053	rc = vmsvga3dDrvNotifyUpdate(pThisCC, pScreen, pRect->x, pRect->y, pRect->w, pRect->h);
4054	return rc;
4055	}
4056
4057
4058	/*
4059	*
4060	* 3D interface.
4061	*
4062	*/
4063
4064	static DECLCALLBACK(int) vmsvga3dBackQueryCaps(PVGASTATECC pThisCC, SVGA3dDevCapIndex idx3dCaps, uint32_t *pu32Val)
4065	{
4066	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4067	AssertReturn(pState, VERR_INVALID_STATE);
4068
4069	int rc = VINF_SUCCESS;
4070
4071	*pu32Val = 0;
4072
4073	if (idx3dCaps > SVGA3D_DEVCAP_MAX)
4074	{
4075	LogRelMax(16, ("VMSVGA: unsupported SVGA3D_DEVCAP %d\n", idx3dCaps));
4076	return VERR_NOT_SUPPORTED;
4077	}
4078
4079	D3D_FEATURE_LEVEL const FeatureLevel = pState->pBackend->dxDevice.FeatureLevel;
4080
4081	/* Most values are taken from:
4082	* https://docs.microsoft.com/en-us/windows/win32/direct3d11/overviews-direct3d-11-devices-downlevel-intro
4083	*
4084	* Shader values are from
4085	* https://docs.microsoft.com/en-us/windows/win32/direct3dhlsl/dx-graphics-hlsl-models
4086	*/
4087
4088	switch (idx3dCaps)
4089	{
4090	case SVGA3D_DEVCAP_3D:
4091	*pu32Val = VBSVGA3D_CAP_3D;
4092	if (pState->pBackend->dxDevice.pVideoDevice)
4093	*pu32Val \|= VBSVGA3D_CAP_VIDEO;
4094	break;
4095
4096	case SVGA3D_DEVCAP_MAX_LIGHTS:
4097	pu32Val = SVGA3D_NUM_LIGHTS; / VGPU9. Not applicable to DX11. */
4098	break;
4099
4100	case SVGA3D_DEVCAP_MAX_TEXTURES:
4101	pu32Val = SVGA3D_NUM_TEXTURE_UNITS; / VGPU9. Not applicable to DX11. */
4102	break;
4103
4104	case SVGA3D_DEVCAP_MAX_CLIP_PLANES:
4105	*pu32Val = SVGA3D_NUM_CLIPPLANES;
4106	break;
4107
4108	case SVGA3D_DEVCAP_VERTEX_SHADER_VERSION:
4109	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4110	*pu32Val = SVGA3DVSVERSION_40;
4111	else
4112	*pu32Val = SVGA3DVSVERSION_30;
4113	break;
4114
4115	case SVGA3D_DEVCAP_VERTEX_SHADER:
4116	*pu32Val = 1;
4117	break;
4118
4119	case SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION:
4120	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4121	*pu32Val = SVGA3DPSVERSION_40;
4122	else
4123	*pu32Val = SVGA3DPSVERSION_30;
4124	break;
4125
4126	case SVGA3D_DEVCAP_FRAGMENT_SHADER:
4127	*pu32Val = 1;
4128	break;
4129
4130	case SVGA3D_DEVCAP_MAX_RENDER_TARGETS:
4131	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4132	*pu32Val = 8;
4133	else
4134	*pu32Val = 4;
4135	break;
4136
4137	case SVGA3D_DEVCAP_S23E8_TEXTURES:
4138	case SVGA3D_DEVCAP_S10E5_TEXTURES:
4139	/* Must be obsolete by now; surface format caps specify the same thing. */
4140	break;
4141
4142	case SVGA3D_DEVCAP_MAX_FIXED_VERTEXBLEND:
4143	/* Obsolete */
4144	break;
4145
4146	/*
4147	* 2. The BUFFER_FORMAT capabilities are deprecated, and they always
4148	* return TRUE. Even on physical hardware that does not support
4149	* these formats natively, the SVGA3D device will provide an emulation
4150	* which should be invisible to the guest OS.
4151	*/
4152	case SVGA3D_DEVCAP_D16_BUFFER_FORMAT:
4153	case SVGA3D_DEVCAP_D24S8_BUFFER_FORMAT:
4154	case SVGA3D_DEVCAP_D24X8_BUFFER_FORMAT:
4155	*pu32Val = 1;
4156	break;
4157
4158	case SVGA3D_DEVCAP_QUERY_TYPES:
4159	/* Obsolete */
4160	break;
4161
4162	case SVGA3D_DEVCAP_TEXTURE_GRADIENT_SAMPLING:
4163	/* Obsolete */
4164	break;
4165
4166	case SVGA3D_DEVCAP_MAX_POINT_SIZE:
4167	AssertCompile(sizeof(uint32_t) == sizeof(float));
4168	(float )pu32Val = 256.0f; /* VGPU9. Not applicable to DX11. */
4169	break;
4170
4171	case SVGA3D_DEVCAP_MAX_SHADER_TEXTURES:
4172	/* Obsolete */
4173	break;
4174
4175	case SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH:
4176	case SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT:
4177	if (FeatureLevel >= D3D_FEATURE_LEVEL_11_0)
4178	*pu32Val = 16384;
4179	else if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4180	*pu32Val = 8192;
4181	else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
4182	*pu32Val = 4096;
4183	else
4184	*pu32Val = 2048;
4185	break;
4186
4187	case SVGA3D_DEVCAP_MAX_VOLUME_EXTENT:
4188	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4189	*pu32Val = 2048;
4190	else
4191	*pu32Val = 256;
4192	break;
4193
4194	case SVGA3D_DEVCAP_MAX_TEXTURE_REPEAT:
4195	if (FeatureLevel >= D3D_FEATURE_LEVEL_11_0)
4196	*pu32Val = 16384;
4197	else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
4198	*pu32Val = 8192;
4199	else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
4200	*pu32Val = 2048;
4201	else
4202	*pu32Val = 128;
4203	break;
4204
4205	case SVGA3D_DEVCAP_MAX_TEXTURE_ASPECT_RATIO:
4206	/* Obsolete */
4207	break;
4208
4209	case SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY:
4210	if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
4211	*pu32Val = D3D11_REQ_MAXANISOTROPY;
4212	else
4213	*pu32Val = 2; // D3D_FL9_1_DEFAULT_MAX_ANISOTROPY;
4214	break;
4215
4216	case SVGA3D_DEVCAP_MAX_PRIMITIVE_COUNT:
4217	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4218	*pu32Val = UINT32_MAX;
4219	else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
4220	*pu32Val = 1048575; // D3D_FL9_2_IA_PRIMITIVE_MAX_COUNT;
4221	else
4222	*pu32Val = 65535; // D3D_FL9_1_IA_PRIMITIVE_MAX_COUNT;
4223	break;
4224
4225	case SVGA3D_DEVCAP_MAX_VERTEX_INDEX:
4226	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4227	*pu32Val = UINT32_MAX;
4228	else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
4229	*pu32Val = 1048575;
4230	else
4231	*pu32Val = 65534;
4232	break;
4233
4234	case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS:
4235	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4236	*pu32Val = UINT32_MAX;
4237	else
4238	*pu32Val = 512;
4239	break;
4240
4241	case SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_INSTRUCTIONS:
4242	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4243	*pu32Val = UINT32_MAX;
4244	else
4245	*pu32Val = 512;
4246	break;
4247
4248	case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS:
4249	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4250	*pu32Val = 4096;
4251	else
4252	*pu32Val = 32;
4253	break;
4254
4255	case SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS:
4256	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4257	*pu32Val = 4096;
4258	else
4259	*pu32Val = 32;
4260	break;
4261
4262	case SVGA3D_DEVCAP_TEXTURE_OPS:
4263	/* Obsolete */
4264	break;
4265
4266	case SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8:
4267	case SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8:
4268	case SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10:
4269	case SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5:
4270	case SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5:
4271	case SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4:
4272	case SVGA3D_DEVCAP_SURFACEFMT_R5G6B5:
4273	case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16:
4274	case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8:
4275	case SVGA3D_DEVCAP_SURFACEFMT_ALPHA8:
4276	case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8:
4277	case SVGA3D_DEVCAP_SURFACEFMT_Z_D16:
4278	case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8:
4279	case SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8:
4280	case SVGA3D_DEVCAP_SURFACEFMT_DXT1:
4281	case SVGA3D_DEVCAP_SURFACEFMT_DXT2:
4282	case SVGA3D_DEVCAP_SURFACEFMT_DXT3:
4283	case SVGA3D_DEVCAP_SURFACEFMT_DXT4:
4284	case SVGA3D_DEVCAP_SURFACEFMT_DXT5:
4285	case SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8:
4286	case SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10:
4287	case SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8:
4288	case SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8:
4289	case SVGA3D_DEVCAP_SURFACEFMT_CxV8U8:
4290	case SVGA3D_DEVCAP_SURFACEFMT_R_S10E5:
4291	case SVGA3D_DEVCAP_SURFACEFMT_R_S23E8:
4292	case SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5:
4293	case SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8:
4294	case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5:
4295	case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8:
4296	case SVGA3D_DEVCAP_SURFACEFMT_V16U16:
4297	case SVGA3D_DEVCAP_SURFACEFMT_G16R16:
4298	case SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16:
4299	case SVGA3D_DEVCAP_SURFACEFMT_UYVY:
4300	case SVGA3D_DEVCAP_SURFACEFMT_YUY2:
4301	case SVGA3D_DEVCAP_SURFACEFMT_NV12:
4302	case SVGA3D_DEVCAP_DEAD10: /* SVGA3D_DEVCAP_SURFACEFMT_AYUV */
4303	case SVGA3D_DEVCAP_SURFACEFMT_Z_DF16:
4304	case SVGA3D_DEVCAP_SURFACEFMT_Z_DF24:
4305	case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT:
4306	case SVGA3D_DEVCAP_SURFACEFMT_ATI1:
4307	case SVGA3D_DEVCAP_SURFACEFMT_ATI2:
4308	case SVGA3D_DEVCAP_SURFACEFMT_YV12:
4309	{
4310	SVGA3dSurfaceFormat const enmFormat = vmsvgaDXDevCapSurfaceFmt2Format(idx3dCaps);
4311	rc = vmsvgaDXCheckFormatSupportPreDX(pState, enmFormat, pu32Val);
4312	break;
4313	}
4314
4315	case SVGA3D_DEVCAP_MISSING62:
4316	/* Unused */
4317	break;
4318
4319	case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEXTURES:
4320	/* Obsolete */
4321	break;
4322
4323	case SVGA3D_DEVCAP_MAX_SIMULTANEOUS_RENDER_TARGETS:
4324	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4325	*pu32Val = 8;
4326	else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
4327	*pu32Val = 4; // D3D_FL9_3_SIMULTANEOUS_RENDER_TARGET_COUNT
4328	else
4329	*pu32Val = 1; // D3D_FL9_1_SIMULTANEOUS_RENDER_TARGET_COUNT
4330	break;
4331
4332	case SVGA3D_DEVCAP_DEAD4: /* SVGA3D_DEVCAP_MULTISAMPLE_NONMASKABLESAMPLES */
4333	case SVGA3D_DEVCAP_DEAD5: /* SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES */
4334	pu32Val = (1 << (2-1)) \| (1 << (4-1)) \| (1 << (8-1)); / 2x, 4x, 8x */
4335	break;
4336
4337	case SVGA3D_DEVCAP_DEAD7: /* SVGA3D_DEVCAP_ALPHATOCOVERAGE */
4338	/* Obsolete */
4339	break;
4340
4341	case SVGA3D_DEVCAP_DEAD6: /* SVGA3D_DEVCAP_SUPERSAMPLE */
4342	/* Obsolete */
4343	break;
4344
4345	case SVGA3D_DEVCAP_AUTOGENMIPMAPS:
4346	*pu32Val = 1;
4347	break;
4348
4349	case SVGA3D_DEVCAP_MAX_CONTEXT_IDS:
4350	*pu32Val = SVGA3D_MAX_CONTEXT_IDS;
4351	break;
4352
4353	case SVGA3D_DEVCAP_MAX_SURFACE_IDS:
4354	*pu32Val = SVGA3D_MAX_SURFACE_IDS;
4355	break;
4356
4357	case SVGA3D_DEVCAP_DEAD1:
4358	/* Obsolete */
4359	break;
4360
4361	case SVGA3D_DEVCAP_DEAD8: /* SVGA3D_DEVCAP_VIDEO_DECODE */
4362	/* Obsolete */
4363	break;
4364
4365	case SVGA3D_DEVCAP_DEAD9: /* SVGA3D_DEVCAP_VIDEO_PROCESS */
4366	/* Obsolete */
4367	break;
4368
4369	case SVGA3D_DEVCAP_LINE_AA:
4370	*pu32Val = 1;
4371	break;
4372
4373	case SVGA3D_DEVCAP_LINE_STIPPLE:
4374	pu32Val = 0; / DX11 does not seem to support this directly. */
4375	break;
4376
4377	case SVGA3D_DEVCAP_MAX_LINE_WIDTH:
4378	AssertCompile(sizeof(uint32_t) == sizeof(float));
4379	(float )pu32Val = 1.0f;
4380	break;
4381
4382	case SVGA3D_DEVCAP_MAX_AA_LINE_WIDTH:
4383	AssertCompile(sizeof(uint32_t) == sizeof(float));
4384	(float )pu32Val = 1.0f;
4385	break;
4386
4387	case SVGA3D_DEVCAP_DEAD3: /* Old SVGA3D_DEVCAP_LOGICOPS */
4388	/* Deprecated. */
4389	AssertCompile(SVGA3D_DEVCAP_DEAD3 == 92); /* Newer SVGA headers redefine this. */
4390	break;
4391
4392	case SVGA3D_DEVCAP_TS_COLOR_KEY:
4393	pu32Val = 0; / DX11 does not seem to support this directly. */
4394	break;
4395
4396	case SVGA3D_DEVCAP_DEAD2:
4397	break;
4398
4399	case SVGA3D_DEVCAP_DXCONTEXT:
4400	*pu32Val = 1;
4401	break;
4402
4403	case SVGA3D_DEVCAP_DEAD11: /* SVGA3D_DEVCAP_MAX_TEXTURE_ARRAY_SIZE */
4404	*pu32Val = D3D11_REQ_TEXTURE2D_ARRAY_AXIS_DIMENSION;
4405	break;
4406
4407	case SVGA3D_DEVCAP_DX_MAX_VERTEXBUFFERS:
4408	*pu32Val = D3D11_IA_VERTEX_INPUT_RESOURCE_SLOT_COUNT;
4409	break;
4410
4411	case SVGA3D_DEVCAP_DX_MAX_CONSTANT_BUFFERS:
4412	*pu32Val = D3D11_COMMONSHADER_CONSTANT_BUFFER_HW_SLOT_COUNT;
4413	break;
4414
4415	case SVGA3D_DEVCAP_DX_PROVOKING_VERTEX:
4416	pu32Val = 0; / boolean */
4417	break;
4418
4419	case SVGA3D_DEVCAP_DXFMT_X8R8G8B8:
4420	case SVGA3D_DEVCAP_DXFMT_A8R8G8B8:
4421	case SVGA3D_DEVCAP_DXFMT_R5G6B5:
4422	case SVGA3D_DEVCAP_DXFMT_X1R5G5B5:
4423	case SVGA3D_DEVCAP_DXFMT_A1R5G5B5:
4424	case SVGA3D_DEVCAP_DXFMT_A4R4G4B4:
4425	case SVGA3D_DEVCAP_DXFMT_Z_D32:
4426	case SVGA3D_DEVCAP_DXFMT_Z_D16:
4427	case SVGA3D_DEVCAP_DXFMT_Z_D24S8:
4428	case SVGA3D_DEVCAP_DXFMT_Z_D15S1:
4429	case SVGA3D_DEVCAP_DXFMT_LUMINANCE8:
4430	case SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4:
4431	case SVGA3D_DEVCAP_DXFMT_LUMINANCE16:
4432	case SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8:
4433	case SVGA3D_DEVCAP_DXFMT_DXT1:
4434	case SVGA3D_DEVCAP_DXFMT_DXT2:
4435	case SVGA3D_DEVCAP_DXFMT_DXT3:
4436	case SVGA3D_DEVCAP_DXFMT_DXT4:
4437	case SVGA3D_DEVCAP_DXFMT_DXT5:
4438	case SVGA3D_DEVCAP_DXFMT_BUMPU8V8:
4439	case SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5:
4440	case SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8:
4441	case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1:
4442	case SVGA3D_DEVCAP_DXFMT_ARGB_S10E5:
4443	case SVGA3D_DEVCAP_DXFMT_ARGB_S23E8:
4444	case SVGA3D_DEVCAP_DXFMT_A2R10G10B10:
4445	case SVGA3D_DEVCAP_DXFMT_V8U8:
4446	case SVGA3D_DEVCAP_DXFMT_Q8W8V8U8:
4447	case SVGA3D_DEVCAP_DXFMT_CxV8U8:
4448	case SVGA3D_DEVCAP_DXFMT_X8L8V8U8:
4449	case SVGA3D_DEVCAP_DXFMT_A2W10V10U10:
4450	case SVGA3D_DEVCAP_DXFMT_ALPHA8:
4451	case SVGA3D_DEVCAP_DXFMT_R_S10E5:
4452	case SVGA3D_DEVCAP_DXFMT_R_S23E8:
4453	case SVGA3D_DEVCAP_DXFMT_RG_S10E5:
4454	case SVGA3D_DEVCAP_DXFMT_RG_S23E8:
4455	case SVGA3D_DEVCAP_DXFMT_BUFFER:
4456	case SVGA3D_DEVCAP_DXFMT_Z_D24X8:
4457	case SVGA3D_DEVCAP_DXFMT_V16U16:
4458	case SVGA3D_DEVCAP_DXFMT_G16R16:
4459	case SVGA3D_DEVCAP_DXFMT_A16B16G16R16:
4460	case SVGA3D_DEVCAP_DXFMT_UYVY:
4461	case SVGA3D_DEVCAP_DXFMT_YUY2:
4462	case SVGA3D_DEVCAP_DXFMT_NV12:
4463	case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD2: /* SVGA3D_DEVCAP_DXFMT_AYUV */
4464	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS:
4465	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT:
4466	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT:
4467	case SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS:
4468	case SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT:
4469	case SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT:
4470	case SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT:
4471	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS:
4472	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT:
4473	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM:
4474	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT:
4475	case SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS:
4476	case SVGA3D_DEVCAP_DXFMT_R32G32_UINT:
4477	case SVGA3D_DEVCAP_DXFMT_R32G32_SINT:
4478	case SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS:
4479	case SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT:
4480	case SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24:
4481	case SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT:
4482	case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS:
4483	case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT:
4484	case SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT:
4485	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS:
4486	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM:
4487	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB:
4488	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT:
4489	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT:
4490	case SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS:
4491	case SVGA3D_DEVCAP_DXFMT_R16G16_UINT:
4492	case SVGA3D_DEVCAP_DXFMT_R16G16_SINT:
4493	case SVGA3D_DEVCAP_DXFMT_R32_TYPELESS:
4494	case SVGA3D_DEVCAP_DXFMT_D32_FLOAT:
4495	case SVGA3D_DEVCAP_DXFMT_R32_UINT:
4496	case SVGA3D_DEVCAP_DXFMT_R32_SINT:
4497	case SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS:
4498	case SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT:
4499	case SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8:
4500	case SVGA3D_DEVCAP_DXFMT_X24_G8_UINT:
4501	case SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS:
4502	case SVGA3D_DEVCAP_DXFMT_R8G8_UNORM:
4503	case SVGA3D_DEVCAP_DXFMT_R8G8_UINT:
4504	case SVGA3D_DEVCAP_DXFMT_R8G8_SINT:
4505	case SVGA3D_DEVCAP_DXFMT_R16_TYPELESS:
4506	case SVGA3D_DEVCAP_DXFMT_R16_UNORM:
4507	case SVGA3D_DEVCAP_DXFMT_R16_UINT:
4508	case SVGA3D_DEVCAP_DXFMT_R16_SNORM:
4509	case SVGA3D_DEVCAP_DXFMT_R16_SINT:
4510	case SVGA3D_DEVCAP_DXFMT_R8_TYPELESS:
4511	case SVGA3D_DEVCAP_DXFMT_R8_UNORM:
4512	case SVGA3D_DEVCAP_DXFMT_R8_UINT:
4513	case SVGA3D_DEVCAP_DXFMT_R8_SNORM:
4514	case SVGA3D_DEVCAP_DXFMT_R8_SINT:
4515	case SVGA3D_DEVCAP_DXFMT_P8:
4516	case SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP:
4517	case SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM:
4518	case SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM:
4519	case SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS:
4520	case SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB:
4521	case SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS:
4522	case SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB:
4523	case SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS:
4524	case SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB:
4525	case SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS:
4526	case SVGA3D_DEVCAP_DXFMT_ATI1:
4527	case SVGA3D_DEVCAP_DXFMT_BC4_SNORM:
4528	case SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS:
4529	case SVGA3D_DEVCAP_DXFMT_ATI2:
4530	case SVGA3D_DEVCAP_DXFMT_BC5_SNORM:
4531	case SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM:
4532	case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS:
4533	case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB:
4534	case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS:
4535	case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB:
4536	case SVGA3D_DEVCAP_DXFMT_Z_DF16:
4537	case SVGA3D_DEVCAP_DXFMT_Z_DF24:
4538	case SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT:
4539	case SVGA3D_DEVCAP_DXFMT_YV12:
4540	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT:
4541	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT:
4542	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM:
4543	case SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT:
4544	case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM:
4545	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM:
4546	case SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT:
4547	case SVGA3D_DEVCAP_DXFMT_R16G16_UNORM:
4548	case SVGA3D_DEVCAP_DXFMT_R16G16_SNORM:
4549	case SVGA3D_DEVCAP_DXFMT_R32_FLOAT:
4550	case SVGA3D_DEVCAP_DXFMT_R8G8_SNORM:
4551	case SVGA3D_DEVCAP_DXFMT_R16_FLOAT:
4552	case SVGA3D_DEVCAP_DXFMT_D16_UNORM:
4553	case SVGA3D_DEVCAP_DXFMT_A8_UNORM:
4554	case SVGA3D_DEVCAP_DXFMT_BC1_UNORM:
4555	case SVGA3D_DEVCAP_DXFMT_BC2_UNORM:
4556	case SVGA3D_DEVCAP_DXFMT_BC3_UNORM:
4557	case SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM:
4558	case SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM:
4559	case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM:
4560	case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM:
4561	case SVGA3D_DEVCAP_DXFMT_BC4_UNORM:
4562	case SVGA3D_DEVCAP_DXFMT_BC5_UNORM:
4563	case SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS:
4564	case SVGA3D_DEVCAP_DXFMT_BC6H_UF16:
4565	case SVGA3D_DEVCAP_DXFMT_BC6H_SF16:
4566	case SVGA3D_DEVCAP_DXFMT_BC7_TYPELESS:
4567	case SVGA3D_DEVCAP_DXFMT_BC7_UNORM:
4568	case SVGA3D_DEVCAP_DXFMT_BC7_UNORM_SRGB:
4569	{
4570	SVGA3dSurfaceFormat const enmFormat = vmsvgaDXDevCapDxfmt2Format(idx3dCaps);
4571	rc = vmsvgaDXCheckFormatSupport(pState, enmFormat, pu32Val);
4572	break;
4573	}
4574
4575	case SVGA3D_DEVCAP_SM41:
4576	pu32Val = 1; / boolean */
4577	break;
4578
4579	case SVGA3D_DEVCAP_MULTISAMPLE_2X:
4580	pu32Val = RT_BOOL(pState->pBackend->dxDevice.MultisampleCountMask & (1 << (2 - 1))); / boolean */
4581	break;
4582
4583	case SVGA3D_DEVCAP_MULTISAMPLE_4X:
4584	pu32Val = RT_BOOL(pState->pBackend->dxDevice.MultisampleCountMask & (1 << (4 - 1))); / boolean */
4585	break;
4586
4587	case SVGA3D_DEVCAP_MS_FULL_QUALITY:
4588	pu32Val = 0; / boolean */
4589	break;
4590
4591	case SVGA3D_DEVCAP_LOGICOPS:
4592	AssertCompile(SVGA3D_DEVCAP_LOGICOPS == 248);
4593	pu32Val = 0; / boolean */
4594	break;
4595
4596	case SVGA3D_DEVCAP_LOGIC_BLENDOPS:
4597	pu32Val = 0; / boolean */
4598	break;
4599
4600	case SVGA3D_DEVCAP_RESERVED_1:
4601	break;
4602
4603	case SVGA3D_DEVCAP_RESERVED_2:
4604	break;
4605
4606	case SVGA3D_DEVCAP_SM5:
4607	pu32Val = 1; / boolean */
4608	break;
4609
4610	case SVGA3D_DEVCAP_MULTISAMPLE_8X:
4611	pu32Val = RT_BOOL(pState->pBackend->dxDevice.MultisampleCountMask & (1 << (8 - 1))); / boolean */
4612	break;
4613
4614	case SVGA3D_DEVCAP_MAX:
4615	case SVGA3D_DEVCAP_INVALID:
4616	rc = VERR_NOT_SUPPORTED;
4617	break;
4618	}
4619
4620	return rc;
4621	}
4622
4623
4624	static DECLCALLBACK(int) vmsvga3dBackChangeMode(PVGASTATECC pThisCC)
4625	{
4626	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4627	AssertReturn(pState, VERR_INVALID_STATE);
4628
4629	return VINF_SUCCESS;
4630	}
4631
4632
4633	static DECLCALLBACK(int) vmsvga3dBackSurfaceCopy(PVGASTATECC pThisCC, SVGA3dSurfaceImageId dest, SVGA3dSurfaceImageId src,
4634	uint32_t cCopyBoxes, SVGA3dCopyBox *pBox)
4635	{
4636	RT_NOREF(cCopyBoxes, pBox);
4637
4638	LogFunc(("src sid %d -> dst sid %d\n", src.sid, dest.sid));
4639
4640	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4641	AssertReturn(pState, VERR_INVALID_STATE);
4642
4643	PVMSVGA3DBACKEND pBackend = pState->pBackend;
4644
4645	PVMSVGA3DSURFACE pSrcSurface;
4646	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, src.sid, &pSrcSurface);
4647	AssertRCReturn(rc, rc);
4648
4649	PVMSVGA3DSURFACE pDstSurface;
4650	rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, dest.sid, &pDstSurface);
4651	AssertRCReturn(rc, rc);
4652
4653	LogFunc(("src%s sid = %u -> dst%s sid = %u\n",
4654	pSrcSurface->pBackendSurface ? "" : " sysmem", pSrcSurface->id,
4655	pDstSurface->pBackendSurface ? "" : " sysmem", pDstSurface->id));
4656
4657	//DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
4658	//AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4659
4660	if (pSrcSurface->pBackendSurface)
4661	{
4662	if (pDstSurface->pBackendSurface == NULL)
4663	{
4664	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, NULL, pDstSurface);
4665	AssertRCReturn(rc, rc);
4666	}
4667
4668	if (pDstSurface->pBackendSurface)
4669	{
4670	/* Surface -> Surface. */
4671	DXDEVICE *pDXDevice = &pBackend->dxDevice;
4672
4673	/* Clip the box. */
4674	PVMSVGA3DMIPMAPLEVEL pSrcMipLevel;
4675	rc = vmsvga3dMipmapLevel(pSrcSurface, src.face, src.mipmap, &pSrcMipLevel);
4676	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
4677
4678	PVMSVGA3DMIPMAPLEVEL pDstMipLevel;
4679	rc = vmsvga3dMipmapLevel(pDstSurface, dest.face, dest.mipmap, &pDstMipLevel);
4680	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
4681
4682	SVGA3dCopyBox clipBox = *pBox;
4683	vmsvgaR3ClipCopyBox(&pSrcMipLevel->mipmapSize, &pDstMipLevel->mipmapSize, &clipBox);
4684
4685	UINT DstSubresource = vmsvga3dCalcSubresource(dest.mipmap, dest.face, pDstSurface->cLevels);
4686	UINT DstX = clipBox.x;
4687	UINT DstY = clipBox.y;
4688	UINT DstZ = clipBox.z;
4689
4690	UINT SrcSubresource = vmsvga3dCalcSubresource(src.mipmap, src.face, pSrcSurface->cLevels);
4691	D3D11_BOX SrcBox;
4692	SrcBox.left = clipBox.srcx;
4693	SrcBox.top = clipBox.srcy;
4694	SrcBox.front = clipBox.srcz;
4695	SrcBox.right = clipBox.srcx + clipBox.w;
4696	SrcBox.bottom = clipBox.srcy + clipBox.h;
4697	SrcBox.back = clipBox.srcz + clipBox.d;
4698
4699	Assert(cCopyBoxes == 1); /** @todo */
4700
4701	ID3D11Resource *pDstResource;
4702	ID3D11Resource *pSrcResource;
4703	pDstResource = dxResource(pState, pDstSurface, NULL);
4704	pSrcResource = dxResource(pState, pSrcSurface, NULL);
4705
4706	pDXDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
4707	pSrcResource, SrcSubresource, &SrcBox);
4708	}
4709	else
4710	{
4711	/* Surface -> Memory. */
4712	AssertFailed(); /** @todo implement */
4713	}
4714	}
4715	else
4716	{
4717	/* Memory -> Surface. */
4718	AssertFailed(); /** @todo implement */
4719	}
4720
4721	return rc;
4722	}
4723
4724
4725	static DECLCALLBACK(void) vmsvga3dBackUpdateHostScreenViewport(PVGASTATECC pThisCC, uint32_t idScreen, VMSVGAVIEWPORT const *pOldViewport)
4726	{
4727	RT_NOREF(pThisCC, idScreen, pOldViewport);
4728	/** @todo Scroll the screen content without requiring the guest to redraw. */
4729	}
4730
4731
4732	static DECLCALLBACK(int) vmsvga3dBackSurfaceUpdateHeapBuffers(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface)
4733	{
4734	/** @todo */
4735	RT_NOREF(pThisCC, pSurface);
4736	return VERR_NOT_IMPLEMENTED;
4737	}
4738
4739
4740	/*
4741	*
4742	* VGPU9 callbacks. Not implemented.
4743	*
4744	*/
4745	/** @todo later */
4746
4747	/**
4748	* Create a new 3d context
4749	*
4750	* @returns VBox status code.
4751	* @param pThisCC The VGA/VMSVGA state for ring-3.
4752	* @param cid Context id
4753	*/
4754	static DECLCALLBACK(int) vmsvga3dBackContextDefine(PVGASTATECC pThisCC, uint32_t cid)
4755	{
4756	RT_NOREF(cid);
4757
4758	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4759	AssertReturn(pState, VERR_INVALID_STATE);
4760
4761	DEBUG_BREAKPOINT_TEST();
4762	return VERR_NOT_IMPLEMENTED;
4763	}
4764
4765
4766	/**
4767	* Destroy an existing 3d context
4768	*
4769	* @returns VBox status code.
4770	* @param pThisCC The VGA/VMSVGA state for ring-3.
4771	* @param cid Context id
4772	*/
4773	static DECLCALLBACK(int) vmsvga3dBackContextDestroy(PVGASTATECC pThisCC, uint32_t cid)
4774	{
4775	RT_NOREF(cid);
4776
4777	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4778	AssertReturn(pState, VERR_INVALID_STATE);
4779
4780	DEBUG_BREAKPOINT_TEST();
4781	return VINF_SUCCESS;
4782	}
4783
4784
4785	static DECLCALLBACK(int) vmsvga3dBackSetTransform(PVGASTATECC pThisCC, uint32_t cid, SVGA3dTransformType type, float matrix[16])
4786	{
4787	RT_NOREF(cid, type, matrix);
4788
4789	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4790	AssertReturn(pState, VERR_INVALID_STATE);
4791
4792	DEBUG_BREAKPOINT_TEST();
4793	return VINF_SUCCESS;
4794	}
4795
4796
4797	static DECLCALLBACK(int) vmsvga3dBackSetZRange(PVGASTATECC pThisCC, uint32_t cid, SVGA3dZRange zRange)
4798	{
4799	RT_NOREF(cid, zRange);
4800
4801	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4802	AssertReturn(pState, VERR_INVALID_STATE);
4803
4804	DEBUG_BREAKPOINT_TEST();
4805	return VINF_SUCCESS;
4806	}
4807
4808
4809	static DECLCALLBACK(int) vmsvga3dBackSetRenderState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cRenderStates, SVGA3dRenderState *pRenderState)
4810	{
4811	RT_NOREF(cid, cRenderStates, pRenderState);
4812
4813	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4814	AssertReturn(pState, VERR_INVALID_STATE);
4815
4816	DEBUG_BREAKPOINT_TEST();
4817	return VINF_SUCCESS;
4818	}
4819
4820
4821	static DECLCALLBACK(int) vmsvga3dBackSetRenderTarget(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRenderTargetType type, SVGA3dSurfaceImageId target)
4822	{
4823	RT_NOREF(cid, type, target);
4824
4825	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4826	AssertReturn(pState, VERR_INVALID_STATE);
4827
4828	DEBUG_BREAKPOINT_TEST();
4829	return VINF_SUCCESS;
4830	}
4831
4832
4833	static DECLCALLBACK(int) vmsvga3dBackSetTextureState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cTextureStates, SVGA3dTextureState *pTextureState)
4834	{
4835	RT_NOREF(cid, cTextureStates, pTextureState);
4836
4837	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4838	AssertReturn(pState, VERR_INVALID_STATE);
4839
4840	DEBUG_BREAKPOINT_TEST();
4841	return VINF_SUCCESS;
4842	}
4843
4844
4845	static DECLCALLBACK(int) vmsvga3dBackSetMaterial(PVGASTATECC pThisCC, uint32_t cid, SVGA3dFace face, SVGA3dMaterial *pMaterial)
4846	{
4847	RT_NOREF(cid, face, pMaterial);
4848
4849	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4850	AssertReturn(pState, VERR_INVALID_STATE);
4851
4852	DEBUG_BREAKPOINT_TEST();
4853	return VINF_SUCCESS;
4854	}
4855
4856
4857	static DECLCALLBACK(int) vmsvga3dBackSetLightData(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, SVGA3dLightData *pData)
4858	{
4859	RT_NOREF(cid, index, pData);
4860
4861	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4862	AssertReturn(pState, VERR_INVALID_STATE);
4863
4864	DEBUG_BREAKPOINT_TEST();
4865	return VINF_SUCCESS;
4866	}
4867
4868
4869	static DECLCALLBACK(int) vmsvga3dBackSetLightEnabled(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, uint32_t enabled)
4870	{
4871	RT_NOREF(cid, index, enabled);
4872
4873	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4874	AssertReturn(pState, VERR_INVALID_STATE);
4875
4876	DEBUG_BREAKPOINT_TEST();
4877	return VINF_SUCCESS;
4878	}
4879
4880
4881	static DECLCALLBACK(int) vmsvga3dBackSetViewPort(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
4882	{
4883	RT_NOREF(cid, pRect);
4884
4885	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4886	AssertReturn(pState, VERR_INVALID_STATE);
4887
4888	DEBUG_BREAKPOINT_TEST();
4889	return VINF_SUCCESS;
4890	}
4891
4892
4893	static DECLCALLBACK(int) vmsvga3dBackSetClipPlane(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, float plane[4])
4894	{
4895	RT_NOREF(cid, index, plane);
4896
4897	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4898	AssertReturn(pState, VERR_INVALID_STATE);
4899
4900	DEBUG_BREAKPOINT_TEST();
4901	return VINF_SUCCESS;
4902	}
4903
4904
4905	static DECLCALLBACK(int) vmsvga3dBackCommandClear(PVGASTATECC pThisCC, uint32_t cid, SVGA3dClearFlag clearFlag, uint32_t color, float depth,
4906	uint32_t stencil, uint32_t cRects, SVGA3dRect *pRect)
4907	{
4908	/* From SVGA3D_BeginClear comments:
4909	*
4910	* Clear is not affected by clipping, depth test, or other
4911	* render state which affects the fragment pipeline.
4912	*
4913	* Therefore this code must ignore the current scissor rect.
4914	*/
4915
4916	RT_NOREF(cid, clearFlag, color, depth, stencil, cRects, pRect);
4917
4918	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4919	AssertReturn(pState, VERR_INVALID_STATE);
4920
4921	DEBUG_BREAKPOINT_TEST();
4922	return VINF_SUCCESS;
4923	}
4924
4925
4926	static DECLCALLBACK(int) vmsvga3dBackDrawPrimitives(PVGASTATECC pThisCC, uint32_t cid, uint32_t numVertexDecls, SVGA3dVertexDecl *pVertexDecl,
4927	uint32_t numRanges, SVGA3dPrimitiveRange *pRange,
4928	uint32_t cVertexDivisor, SVGA3dVertexDivisor *pVertexDivisor)
4929	{
4930	RT_NOREF(cid, numVertexDecls, pVertexDecl, numRanges, pRange, cVertexDivisor, pVertexDivisor);
4931
4932	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4933	AssertReturn(pState, VERR_INVALID_STATE);
4934
4935	DEBUG_BREAKPOINT_TEST();
4936	return VINF_SUCCESS;
4937	}
4938
4939
4940	static DECLCALLBACK(int) vmsvga3dBackSetScissorRect(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
4941	{
4942	RT_NOREF(cid, pRect);
4943
4944	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4945	AssertReturn(pState, VERR_INVALID_STATE);
4946
4947	DEBUG_BREAKPOINT_TEST();
4948	return VINF_SUCCESS;
4949	}
4950
4951
4952	static DECLCALLBACK(int) vmsvga3dBackGenerateMipmaps(PVGASTATECC pThisCC, uint32_t sid, SVGA3dTextureFilter filter)
4953	{
4954	RT_NOREF(sid, filter);
4955
4956	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4957	AssertReturn(pState, VERR_INVALID_STATE);
4958
4959	DEBUG_BREAKPOINT_TEST();
4960	return VINF_SUCCESS;
4961	}
4962
4963
4964	static DECLCALLBACK(int) vmsvga3dBackShaderDefine(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type,
4965	uint32_t cbData, uint32_t *pShaderData)
4966	{
4967	RT_NOREF(cid, shid, type, cbData, pShaderData);
4968
4969	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4970	AssertReturn(pState, VERR_INVALID_STATE);
4971
4972	DEBUG_BREAKPOINT_TEST();
4973	return VINF_SUCCESS;
4974	}
4975
4976
4977	static DECLCALLBACK(int) vmsvga3dBackShaderDestroy(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type)
4978	{
4979	RT_NOREF(cid, shid, type);
4980
4981	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4982	AssertReturn(pState, VERR_INVALID_STATE);
4983
4984	DEBUG_BREAKPOINT_TEST();
4985	return VINF_SUCCESS;
4986	}
4987
4988
4989	static DECLCALLBACK(int) vmsvga3dBackShaderSet(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext, uint32_t cid, SVGA3dShaderType type, uint32_t shid)
4990	{
4991	RT_NOREF(pContext, cid, type, shid);
4992
4993	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4994	AssertReturn(pState, VERR_INVALID_STATE);
4995
4996	DEBUG_BREAKPOINT_TEST();
4997	return VINF_SUCCESS;
4998	}
4999
5000
5001	static DECLCALLBACK(int) vmsvga3dBackShaderSetConst(PVGASTATECC pThisCC, uint32_t cid, uint32_t reg, SVGA3dShaderType type,
5002	SVGA3dShaderConstType ctype, uint32_t cRegisters, uint32_t *pValues)
5003	{
5004	RT_NOREF(cid, reg, type, ctype, cRegisters, pValues);
5005
5006	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
5007	AssertReturn(pState, VERR_INVALID_STATE);
5008
5009	DEBUG_BREAKPOINT_TEST();
5010	return VINF_SUCCESS;
5011	}
5012
5013	static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryCreate(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
5014	{
5015	RT_NOREF(pThisCC, pContext);
5016	DEBUG_BREAKPOINT_TEST();
5017	return VINF_SUCCESS;
5018	}
5019
5020	static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryDelete(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
5021	{
5022	RT_NOREF(pThisCC, pContext);
5023	DEBUG_BREAKPOINT_TEST();
5024	return VINF_SUCCESS;
5025	}
5026
5027	static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryBegin(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
5028	{
5029	RT_NOREF(pThisCC, pContext);
5030	DEBUG_BREAKPOINT_TEST();
5031	return VINF_SUCCESS;
5032	}
5033
5034	static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryEnd(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
5035	{
5036	RT_NOREF(pThisCC, pContext);
5037	DEBUG_BREAKPOINT_TEST();
5038	return VINF_SUCCESS;
5039	}
5040
5041	static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryGetData(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext, uint32_t *pu32Pixels)
5042	{
5043	RT_NOREF(pThisCC, pContext, pu32Pixels);
5044	DEBUG_BREAKPOINT_TEST();
5045	return VINF_SUCCESS;
5046	}
5047
5048
5049	/**
5050	* Destroy backend specific surface bits (part of SVGA_3D_CMD_SURFACE_DESTROY).
5051	*
5052	* @param pThisCC The device context.
5053	* @param fClearCOTableEntry Whether to clear the corresponding COTable entry.
5054	* @param pSurface The surface being destroyed.
5055	*/
5056	static DECLCALLBACK(void) vmsvga3dBackSurfaceDestroy(PVGASTATECC pThisCC, bool fClearCOTableEntry, PVMSVGA3DSURFACE pSurface)
5057	{
5058	RT_NOREF(pThisCC);
5059
5060	/* The caller should not use the function for system memory surfaces. */
5061	PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
5062	if (!pBackendSurface)
5063	return;
5064	pSurface->pBackendSurface = NULL;
5065
5066	LogFunc(("sid=%u\n", pSurface->id));
5067
5068	/* If any views have been created for this resource, then also release them. */
5069	DXVIEW pIter, pNext;
5070	RTListForEachSafe(&pBackendSurface->listView, pIter, pNext, DXVIEW, nodeSurfaceView)
5071	{
5072	LogFunc(("pIter=%p, pNext=%p\n", pIter, pNext));
5073
5074	/** @todo The common DX code should track the views and clean COTable on a surface destruction. */
5075	if (fClearCOTableEntry)
5076	{
5077	PVMSVGA3DDXCONTEXT pDXContext;
5078	int rc = vmsvga3dDXContextFromCid(pThisCC->svga.p3dState, pIter->cid, &pDXContext);
5079	AssertRC(rc);
5080	if (RT_SUCCESS(rc))
5081	{
5082	switch (pIter->enmViewType)
5083	{
5084	case VMSVGA3D_VIEWTYPE_RENDERTARGET:
5085	{
5086	SVGACOTableDXRTViewEntry *pEntry = &pDXContext->cot.paRTView[pIter->viewId];
5087	RT_ZERO(*pEntry);
5088	break;
5089	}
5090	case VMSVGA3D_VIEWTYPE_DEPTHSTENCIL:
5091	{
5092	SVGACOTableDXDSViewEntry *pEntry = &pDXContext->cot.paDSView[pIter->viewId];
5093	RT_ZERO(*pEntry);
5094	break;
5095	}
5096	case VMSVGA3D_VIEWTYPE_SHADERRESOURCE:
5097	{
5098	SVGACOTableDXSRViewEntry *pEntry = &pDXContext->cot.paSRView[pIter->viewId];
5099	RT_ZERO(*pEntry);
5100	break;
5101	}
5102	case VMSVGA3D_VIEWTYPE_UNORDEREDACCESS:
5103	{
5104	SVGACOTableDXUAViewEntry *pEntry = &pDXContext->cot.paUAView[pIter->viewId];
5105	RT_ZERO(*pEntry);
5106	break;
5107	}
5108	case VMSVGA3D_VIEWTYPE_VIDEODECODEROUTPUT:
5109	{
5110	VBSVGACOTableDXVideoDecoderOutputViewEntry *pEntry = &pDXContext->cot.paVideoDecoderOutputView[pIter->viewId];
5111	RT_ZERO(*pEntry);
5112	break;
5113	}
5114	case VMSVGA3D_VIEWTYPE_VIDEOPROCESSORINPUT:
5115	{
5116	VBSVGACOTableDXVideoProcessorInputViewEntry *pEntry = &pDXContext->cot.paVideoProcessorInputView[pIter->viewId];
5117	RT_ZERO(*pEntry);
5118	break;
5119	}
5120	case VMSVGA3D_VIEWTYPE_VIDEOPROCESSOROUTPUT:
5121	{
5122	VBSVGACOTableDXVideoProcessorOutputViewEntry *pEntry = &pDXContext->cot.paVideoProcessorOutputView[pIter->viewId];
5123	RT_ZERO(*pEntry);
5124	break;
5125	}
5126	case VMSVGA3D_VIEWTYPE_NONE:
5127	AssertFailed();
5128	break;
5129	}
5130	}
5131	}
5132
5133	dxViewDestroy(pIter);
5134	}
5135
5136	if ( pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_1D
5137	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_2D
5138	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_CUBE
5139	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
5140	{
5141	D3D_RELEASE(pBackendSurface->staging.pResource);
5142	D3D_RELEASE(pBackendSurface->dynamic.pResource);
5143	D3D_RELEASE(pBackendSurface->u.pResource);
5144	}
5145	else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
5146	{
5147	#ifndef DX_COMMON_STAGING_BUFFER
5148	D3D_RELEASE(pBackendSurface->staging.pBuffer);
5149	D3D_RELEASE(pBackendSurface->dynamic.pBuffer);
5150	#endif
5151	D3D_RELEASE(pBackendSurface->u.pBuffer);
5152	}
5153	else
5154	{
5155	AssertFailed();
5156	}
5157
5158	RTMemFree(pBackendSurface);
5159	}
5160
5161
5162	static DECLCALLBACK(void) vmsvga3dBackSurfaceInvalidateImage(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface, uint32_t uFace, uint32_t uMipmap)
5163	{
5164	RT_NOREF(pThisCC, uFace, uMipmap);
5165
5166	/* The caller should not use the function for system memory surfaces. */
5167	PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
5168	if (!pBackendSurface)
5169	return;
5170
5171	LogFunc(("sid=%u\n", pSurface->id));
5172
5173	/* The guest uses this to invalidate a buffer. */
5174	if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
5175	{
5176	Assert(uFace == 0 && uMipmap == 0); /* The caller ensures this. */
5177	/** @todo This causes flickering when a buffer is invalidated and re-created right before a draw call. */
5178	//vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
5179	}
5180	else
5181	{
5182	/** @todo Delete views that have been created for this mipmap.
5183	* For now just delete all views, they will be recte=reated if necessary.
5184	*/
5185	ASSERT_GUEST_FAILED();
5186	DXVIEW pIter, pNext;
5187	RTListForEachSafe(&pBackendSurface->listView, pIter, pNext, DXVIEW, nodeSurfaceView)
5188	{
5189	dxViewDestroy(pIter);
5190	}
5191	}
5192	}
5193
5194
5195	/**
5196	* Backend worker for implementing SVGA_3D_CMD_SURFACE_STRETCHBLT.
5197	*
5198	* @returns VBox status code.
5199	* @param pThis The VGA device instance.
5200	* @param pState The VMSVGA3d state.
5201	* @param pDstSurface The destination host surface.
5202	* @param uDstFace The destination face (valid).
5203	* @param uDstMipmap The destination mipmap level (valid).
5204	* @param pDstBox The destination box.
5205	* @param pSrcSurface The source host surface.
5206	* @param uSrcFace The destination face (valid).
5207	* @param uSrcMipmap The source mimap level (valid).
5208	* @param pSrcBox The source box.
5209	* @param enmMode The strecht blt mode .
5210	* @param pContext The VMSVGA3d context (already current for OGL).
5211	*/
5212	static DECLCALLBACK(int) vmsvga3dBackSurfaceStretchBlt(PVGASTATE pThis, PVMSVGA3DSTATE pState,
5213	PVMSVGA3DSURFACE pDstSurface, uint32_t uDstFace, uint32_t uDstMipmap, SVGA3dBox const *pDstBox,
5214	PVMSVGA3DSURFACE pSrcSurface, uint32_t uSrcFace, uint32_t uSrcMipmap, SVGA3dBox const *pSrcBox,
5215	SVGA3dStretchBltMode enmMode, PVMSVGA3DCONTEXT pContext)
5216	{
5217	RT_NOREF(pThis, pState, pDstSurface, uDstFace, uDstMipmap, pDstBox,
5218	pSrcSurface, uSrcFace, uSrcMipmap, pSrcBox, enmMode, pContext);
5219
5220	AssertFailed();
5221	return VINF_SUCCESS;
5222	}
5223
5224
5225	/**
5226	* Backend worker for implementing SVGA_3D_CMD_SURFACE_DMA that copies one box.
5227	*
5228	* @returns Failure status code or @a rc.
5229	* @param pThis The shared VGA/VMSVGA instance data.
5230	* @param pThisCC The VGA/VMSVGA state for ring-3.
5231	* @param pState The VMSVGA3d state.
5232	* @param pSurface The host surface.
5233	* @param pMipLevel Mipmap level. The caller knows it already.
5234	* @param uHostFace The host face (valid).
5235	* @param uHostMipmap The host mipmap level (valid).
5236	* @param GuestPtr The guest pointer.
5237	* @param cbGuestPitch The guest pitch.
5238	* @param transfer The transfer direction.
5239	* @param pBox The box to copy (clipped, valid, except for guest's srcx, srcy, srcz).
5240	* @param pContext The context (for OpenGL).
5241	* @param rc The current rc for all boxes.
5242	* @param iBox The current box number (for Direct 3D).
5243	*/
5244	static DECLCALLBACK(int) vmsvga3dBackSurfaceDMACopyBox(PVGASTATE pThis, PVGASTATECC pThisCC, PVMSVGA3DSTATE pState, PVMSVGA3DSURFACE pSurface,
5245	PVMSVGA3DMIPMAPLEVEL pMipLevel, uint32_t uHostFace, uint32_t uHostMipmap,
5246	SVGAGuestPtr GuestPtr, uint32_t cbGuestPitch, SVGA3dTransferType transfer,
5247	SVGA3dCopyBox const *pBox, PVMSVGA3DCONTEXT pContext, int rc, int iBox)
5248	{
5249	RT_NOREF(pState, pMipLevel, pContext, iBox);
5250
5251	/* The called should not use the function for system memory surfaces. */
5252	PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
5253	AssertReturn(pBackendSurface, VERR_INVALID_PARAMETER);
5254
5255	if ( pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_1D
5256	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_2D
5257	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_CUBE
5258	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
5259	{
5260	/** @todo This is generic code and should be in DevVGA-SVGA3d.cpp for backends which support Map/Unmap. */
5261	/** @todo Use vmsvga3dGetBoxDimensions because it does clipping and calculations. */
5262	uint32_t const u32GuestBlockX = pBox->srcx / pSurface->cxBlock;
5263	uint32_t const u32GuestBlockY = pBox->srcy / pSurface->cyBlock;
5264	Assert(u32GuestBlockX * pSurface->cxBlock == pBox->srcx);
5265	Assert(u32GuestBlockY * pSurface->cyBlock == pBox->srcy);
5266	uint32_t const cBlocksX = (pBox->w + pSurface->cxBlock - 1) / pSurface->cxBlock;
5267	uint32_t const cBlocksY = (pBox->h + pSurface->cyBlock - 1) / pSurface->cyBlock;
5268	AssertMsgReturn(cBlocksX && cBlocksY && pBox->d, ("Empty box %dx%dx%d\n", pBox->w, pBox->h, pBox->d), VERR_INTERNAL_ERROR);
5269
5270	/* vmsvgaR3GmrTransfer verifies uGuestOffset.
5271	* srcx(u32GuestBlockX) and srcy(u32GuestBlockY) have been verified in vmsvga3dSurfaceDMA
5272	* to not cause 32 bit overflow when multiplied by cbBlock and cbGuestPitch.
5273	*/
5274	uint64_t uGuestOffset = u32GuestBlockX * pSurface->cbBlock + u32GuestBlockY * cbGuestPitch;
5275	AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
5276
5277	/* 3D texture needs additional processing. */
5278	ASSERT_GUEST_RETURN( pBox->z < D3D11_REQ_TEXTURE3D_U_V_OR_W_DIMENSION
5279	&& pBox->d <= D3D11_REQ_TEXTURE3D_U_V_OR_W_DIMENSION
5280	&& pBox->d <= D3D11_REQ_TEXTURE3D_U_V_OR_W_DIMENSION - pBox->z,
5281	VERR_INVALID_PARAMETER);
5282	ASSERT_GUEST_RETURN( pBox->srcz < D3D11_REQ_TEXTURE3D_U_V_OR_W_DIMENSION
5283	&& pBox->d <= D3D11_REQ_TEXTURE3D_U_V_OR_W_DIMENSION
5284	&& pBox->d <= D3D11_REQ_TEXTURE3D_U_V_OR_W_DIMENSION - pBox->srcz,
5285	VERR_INVALID_PARAMETER);
5286
5287	uGuestOffset += pBox->srcz * pMipLevel->cbSurfacePlane;
5288
5289	SVGA3dSurfaceImageId image;
5290	image.sid = pSurface->id;
5291	image.face = uHostFace;
5292	image.mipmap = uHostMipmap;
5293
5294	SVGA3dBox box;
5295	box.x = pBox->x;
5296	box.y = pBox->y;
5297	box.z = pBox->z;
5298	box.w = pBox->w;
5299	box.h = pBox->h;
5300	box.d = pBox->d;
5301
5302	VMSVGA3D_SURFACE_MAP const enmMap = transfer == SVGA3D_WRITE_HOST_VRAM
5303	? VMSVGA3D_SURFACE_MAP_WRITE
5304	: VMSVGA3D_SURFACE_MAP_READ;
5305
5306	VMSVGA3D_MAPPED_SURFACE map;
5307	rc = vmsvga3dBackSurfaceMap(pThisCC, &image, &box, enmMap, &map);
5308	if (RT_SUCCESS(rc))
5309	{
5310	#if 0
5311	if (box.w == 250 && box.h == 250 && box.d == 1 && enmMap == VMSVGA3D_SURFACE_MAP_READ)
5312	{
5313	DEBUG_BREAKPOINT_TEST();
5314	vmsvga3dMapWriteBmpFile(&map, "P");
5315	}
5316	#endif
5317	/* Prepare parameters for vmsvgaR3GmrTransfer, which needs the host buffer address, size
5318	* and offset of the first scanline.
5319	*/
5320	uint32_t cbLockedBuf = map.cbRowPitch * cBlocksY;
5321	if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
5322	cbLockedBuf += map.cbDepthPitch * (pBox->d - 1); /// @todo why map does not compute this for 2D textures
5323	uint8_t pu8LockedBuf = (uint8_t )map.pvData;
5324	uint32_t offLockedBuf = 0;
5325
5326	for (uint32_t iPlane = 0; iPlane < pBox->d; ++iPlane)
5327	{
5328	AssertBreak(uGuestOffset < UINT32_MAX);
5329
5330	rc = vmsvgaR3GmrTransfer(pThis,
5331	pThisCC,
5332	transfer,
5333	pu8LockedBuf,
5334	cbLockedBuf,
5335	offLockedBuf,
5336	map.cbRowPitch,
5337	GuestPtr,
5338	(uint32_t)uGuestOffset,
5339	cbGuestPitch,
5340	cBlocksX * pSurface->cbBlock,
5341	cBlocksY);
5342	AssertRC(rc);
5343
5344	uGuestOffset += pMipLevel->cbSurfacePlane;
5345	offLockedBuf += map.cbDepthPitch;
5346	}
5347
5348	bool const fWritten = (transfer == SVGA3D_WRITE_HOST_VRAM);
5349	vmsvga3dBackSurfaceUnmap(pThisCC, &image, &map, fWritten);
5350	}
5351	}
5352	else
5353	{
5354	AssertMsgFailed(("Unsupported surface type %d\n", pBackendSurface->enmResType));
5355	rc = VERR_NOT_IMPLEMENTED;
5356	}
5357
5358	return rc;
5359	}
5360
5361
5362	/**
5363	* Create D3D/OpenGL texture object for the specified surface.
5364	*
5365	* Surfaces are created when needed.
5366	*
5367	* @param pThisCC The device context.
5368	* @param pContext The context.
5369	* @param idAssociatedContext Probably the same as pContext->id.
5370	* @param pSurface The surface to create the texture for.
5371	*/
5372	static DECLCALLBACK(int) vmsvga3dBackCreateTexture(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext, uint32_t idAssociatedContext,
5373	PVMSVGA3DSURFACE pSurface)
5374
5375	{
5376	RT_NOREF(pThisCC, pContext, idAssociatedContext, pSurface);
5377
5378	AssertFailed();
5379	return VINF_SUCCESS;
5380	}
5381
5382
5383	/*
5384	* DX callbacks.
5385	*/
5386
5387	static DECLCALLBACK(int) vmsvga3dBackDXDefineContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5388	{
5389	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5390
5391	/* Allocate a backend specific context structure. */
5392	PVMSVGA3DBACKENDDXCONTEXT pBackendDXContext = (PVMSVGA3DBACKENDDXCONTEXT)RTMemAllocZ(sizeof(VMSVGA3DBACKENDDXCONTEXT));
5393	AssertPtrReturn(pBackendDXContext, VERR_NO_MEMORY);
5394	pDXContext->pBackendDXContext = pBackendDXContext;
5395
5396	LogFunc(("cid %d\n", pDXContext->cid));
5397
5398	int rc = dxDeviceCreate(pBackend, &pBackendDXContext->dxDevice);
5399	return rc;
5400	}
5401
5402
5403	static DECLCALLBACK(int) vmsvga3dBackDXDestroyContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5404	{
5405	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5406
5407	LogFunc(("cid %d\n", pDXContext->cid));
5408
5409	if (pDXContext->pBackendDXContext)
5410	{
5411	/* Clean up context resources. */
5412	VMSVGA3DBACKENDDXCONTEXT *pBackendDXContext = pDXContext->pBackendDXContext;
5413
5414	for (uint32_t idxShaderState = 0; idxShaderState < RT_ELEMENTS(pBackendDXContext->resources.shaderState); ++idxShaderState)
5415	{
5416	ID3D11Buffer **papConstantBuffer = &pBackendDXContext->resources.shaderState[idxShaderState].constantBuffers[0];
5417	D3D_RELEASE_ARRAY(RT_ELEMENTS(pBackendDXContext->resources.shaderState[idxShaderState].constantBuffers), papConstantBuffer);
5418	}
5419
5420	if (pBackendDXContext->dxDevice.pImmediateContext)
5421	dxDeviceFlush(&pBackendDXContext->dxDevice); /* Make sure that any pending draw calls are finished. */
5422
5423	if (pBackendDXContext->paRenderTargetView)
5424	{
5425	for (uint32_t i = 0; i < pBackendDXContext->cRenderTargetView; ++i)
5426	D3D_RELEASE(pBackendDXContext->paRenderTargetView[i].u.pRenderTargetView);
5427	}
5428	if (pBackendDXContext->paDepthStencilView)
5429	{
5430	for (uint32_t i = 0; i < pBackendDXContext->cDepthStencilView; ++i)
5431	D3D_RELEASE(pBackendDXContext->paDepthStencilView[i].u.pDepthStencilView);
5432	}
5433	if (pBackendDXContext->paShaderResourceView)
5434	{
5435	for (uint32_t i = 0; i < pBackendDXContext->cShaderResourceView; ++i)
5436	D3D_RELEASE(pBackendDXContext->paShaderResourceView[i].u.pShaderResourceView);
5437	}
5438	if (pBackendDXContext->paElementLayout)
5439	{
5440	for (uint32_t i = 0; i < pBackendDXContext->cElementLayout; ++i)
5441	D3D_RELEASE(pBackendDXContext->paElementLayout[i].pElementLayout);
5442	}
5443	if (pBackendDXContext->papBlendState)
5444	D3D_RELEASE_ARRAY(pBackendDXContext->cBlendState, pBackendDXContext->papBlendState);
5445	if (pBackendDXContext->papDepthStencilState)
5446	D3D_RELEASE_ARRAY(pBackendDXContext->cDepthStencilState, pBackendDXContext->papDepthStencilState);
5447	if (pBackendDXContext->papRasterizerState)
5448	D3D_RELEASE_ARRAY(pBackendDXContext->cRasterizerState, pBackendDXContext->papRasterizerState);
5449	if (pBackendDXContext->papSamplerState)
5450	D3D_RELEASE_ARRAY(pBackendDXContext->cSamplerState, pBackendDXContext->papSamplerState);
5451	if (pBackendDXContext->paQuery)
5452	{
5453	for (uint32_t i = 0; i < pBackendDXContext->cQuery; ++i)
5454	dxDestroyQuery(&pBackendDXContext->paQuery[i]);
5455	}
5456	if (pBackendDXContext->paShader)
5457	{
5458	for (uint32_t i = 0; i < pBackendDXContext->cShader; ++i)
5459	dxDestroyShader(&pBackendDXContext->paShader[i]);
5460	}
5461	if (pBackendDXContext->paStreamOutput)
5462	{
5463	for (uint32_t i = 0; i < pBackendDXContext->cStreamOutput; ++i)
5464	dxDestroyStreamOutput(&pBackendDXContext->paStreamOutput[i]);
5465	}
5466	if (pBackendDXContext->paUnorderedAccessView)
5467	{
5468	for (uint32_t i = 0; i < pBackendDXContext->cUnorderedAccessView; ++i)
5469	D3D_RELEASE(pBackendDXContext->paUnorderedAccessView[i].u.pUnorderedAccessView);
5470	}
5471	if (pBackendDXContext->paVideoProcessor)
5472	{
5473	for (uint32_t i = 0; i < pBackendDXContext->cVideoProcessor; ++i)
5474	dxDestroyVideoProcessor(&pBackendDXContext->paVideoProcessor[i]);
5475	}
5476	if (pBackendDXContext->paVideoDecoderOutputView)
5477	{
5478	/** @todo dxViewDestroy? */
5479	for (uint32_t i = 0; i < pBackendDXContext->cVideoDecoderOutputView; ++i)
5480	D3D_RELEASE(pBackendDXContext->paVideoDecoderOutputView[i].u.pVideoDecoderOutputView);
5481	}
5482	if (pBackendDXContext->paVideoDecoder)
5483	{
5484	for (uint32_t i = 0; i < pBackendDXContext->cVideoDecoder; ++i)
5485	dxDestroyVideoDecoder(&pBackendDXContext->paVideoDecoder[i]);
5486	}
5487	if (pBackendDXContext->paVideoProcessorInputView)
5488	{
5489	for (uint32_t i = 0; i < pBackendDXContext->cVideoProcessorInputView; ++i)
5490	D3D_RELEASE(pBackendDXContext->paVideoProcessorInputView[i].u.pVideoProcessorInputView);
5491	}
5492	if (pBackendDXContext->paVideoProcessorOutputView)
5493	{
5494	for (uint32_t i = 0; i < pBackendDXContext->cVideoProcessorOutputView; ++i)
5495	D3D_RELEASE(pBackendDXContext->paVideoProcessorOutputView[i].u.pVideoProcessorOutputView);
5496	}
5497
5498	RTMemFreeZ(pBackendDXContext->papBlendState, sizeof(pBackendDXContext->papBlendState[0]) * pBackendDXContext->cBlendState);
5499	RTMemFreeZ(pBackendDXContext->papDepthStencilState, sizeof(pBackendDXContext->papDepthStencilState[0]) * pBackendDXContext->cDepthStencilState);
5500	RTMemFreeZ(pBackendDXContext->papSamplerState, sizeof(pBackendDXContext->papSamplerState[0]) * pBackendDXContext->cSamplerState);
5501	RTMemFreeZ(pBackendDXContext->papRasterizerState, sizeof(pBackendDXContext->papRasterizerState[0]) * pBackendDXContext->cRasterizerState);
5502	RTMemFreeZ(pBackendDXContext->paElementLayout, sizeof(pBackendDXContext->paElementLayout[0]) * pBackendDXContext->cElementLayout);
5503	RTMemFreeZ(pBackendDXContext->paRenderTargetView, sizeof(pBackendDXContext->paRenderTargetView[0]) * pBackendDXContext->cRenderTargetView);
5504	RTMemFreeZ(pBackendDXContext->paDepthStencilView, sizeof(pBackendDXContext->paDepthStencilView[0]) * pBackendDXContext->cDepthStencilView);
5505	RTMemFreeZ(pBackendDXContext->paShaderResourceView, sizeof(pBackendDXContext->paShaderResourceView[0]) * pBackendDXContext->cShaderResourceView);
5506	RTMemFreeZ(pBackendDXContext->paQuery, sizeof(pBackendDXContext->paQuery[0]) * pBackendDXContext->cQuery);
5507	RTMemFreeZ(pBackendDXContext->paShader, sizeof(pBackendDXContext->paShader[0]) * pBackendDXContext->cShader);
5508	RTMemFreeZ(pBackendDXContext->paStreamOutput, sizeof(pBackendDXContext->paStreamOutput[0]) * pBackendDXContext->cStreamOutput);
5509	RTMemFreeZ(pBackendDXContext->paUnorderedAccessView, sizeof(pBackendDXContext->paUnorderedAccessView[0]) * pBackendDXContext->cUnorderedAccessView);
5510	RTMemFreeZ(pBackendDXContext->paVideoProcessor, sizeof(pBackendDXContext->paVideoProcessor[0]) * pBackendDXContext->cVideoProcessor);
5511	RTMemFreeZ(pBackendDXContext->paVideoDecoderOutputView, sizeof(pBackendDXContext->paVideoDecoderOutputView[0]) * pBackendDXContext->cVideoDecoderOutputView);
5512	RTMemFreeZ(pBackendDXContext->paVideoDecoder, sizeof(pBackendDXContext->paVideoDecoder[0]) * pBackendDXContext->cVideoDecoder);
5513	RTMemFreeZ(pBackendDXContext->paVideoProcessorInputView, sizeof(pBackendDXContext->paVideoProcessorInputView[0]) * pBackendDXContext->cVideoProcessorInputView);
5514	RTMemFreeZ(pBackendDXContext->paVideoProcessorOutputView, sizeof(pBackendDXContext->paVideoProcessorOutputView[0]) * pBackendDXContext->cVideoProcessorOutputView);
5515
5516	dxDeviceDestroy(pBackend, &pBackendDXContext->dxDevice);
5517
5518	RTMemFreeZ(pBackendDXContext, sizeof(*pBackendDXContext));
5519	pDXContext->pBackendDXContext = NULL;
5520	}
5521	return VINF_SUCCESS;
5522	}
5523
5524
5525	static DECLCALLBACK(int) vmsvga3dBackDXBindContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5526	{
5527	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5528	RT_NOREF(pBackend, pDXContext);
5529	return VINF_SUCCESS;
5530	}
5531
5532
5533	static DECLCALLBACK(int) vmsvga3dBackDXSwitchContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5534	{
5535	/* The new context state will be applied by the generic DX code. */
5536	RT_NOREF(pThisCC, pDXContext);
5537	return VINF_SUCCESS;
5538	}
5539
5540
5541	static DECLCALLBACK(int) vmsvga3dBackDXReadbackContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5542	{
5543	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5544	RT_NOREF(pBackend, pDXContext);
5545	return VINF_SUCCESS;
5546	}
5547
5548
5549	static DECLCALLBACK(int) vmsvga3dBackDXInvalidateContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5550	{
5551	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5552
5553	RT_NOREF(pBackend, pDXContext);
5554	AssertFailed(); /** @todo Implement */
5555	return VERR_NOT_IMPLEMENTED;
5556	}
5557
5558
5559	static DECLCALLBACK(int) vmsvga3dBackDXSetSingleConstantBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t slot, SVGA3dShaderType type, SVGA3dSurfaceId sid, uint32_t offsetInBytes, uint32_t sizeInBytes)
5560	{
5561	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5562	RT_NOREF(pBackend);
5563
5564	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
5565	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5566
5567	if (sid == SVGA_ID_INVALID)
5568	{
5569	uint32_t const idxShaderState = type - SVGA3D_SHADERTYPE_MIN;
5570	D3D_RELEASE(pDXContext->pBackendDXContext->resources.shaderState[idxShaderState].constantBuffers[slot]);
5571	return VINF_SUCCESS;
5572	}
5573
5574	PVMSVGA3DSURFACE pSurface;
5575	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
5576	AssertRCReturn(rc, rc);
5577
5578	PVMSVGA3DMIPMAPLEVEL pMipLevel;
5579	rc = vmsvga3dMipmapLevel(pSurface, 0, 0, &pMipLevel);
5580	AssertRCReturn(rc, rc);
5581
5582	uint32_t const cbSurface = pMipLevel->cbSurface;
5583	ASSERT_GUEST_RETURN( offsetInBytes < cbSurface
5584	&& sizeInBytes <= cbSurface - offsetInBytes, VERR_INVALID_PARAMETER);
5585
5586	/* Constant buffers are created on demand. */
5587	Assert(pSurface->pBackendSurface == NULL);
5588
5589	/* Upload the current data, if any. */
5590	D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
5591	D3D11_SUBRESOURCE_DATA initialData;
5592	if (pMipLevel->pSurfaceData)
5593	{
5594	initialData.pSysMem = (uint8_t *)pMipLevel->pSurfaceData + offsetInBytes;
5595	initialData.SysMemPitch = sizeInBytes;
5596	initialData.SysMemSlicePitch = sizeInBytes;
5597
5598	pInitialData = &initialData;
5599
5600	#ifdef LOG_ENABLED
5601	if (LogIs8Enabled())
5602	{
5603	float pValuesF = (float )initialData.pSysMem;
5604	for (unsigned i = 0; i < sizeInBytes / sizeof(float) / 4; ++i)
5605	{
5606	Log8(("ConstF /%d/ " FLOAT_FMT_STR ", " FLOAT_FMT_STR ", " FLOAT_FMT_STR ", " FLOAT_FMT_STR ",\n",
5607	i, FLOAT_FMT_ARGS(pValuesF[i4 + 0]), FLOAT_FMT_ARGS(pValuesF[i4 + 1]), FLOAT_FMT_ARGS(pValuesF[i4 + 2]), FLOAT_FMT_ARGS(pValuesF[i4 + 3])));
5608	}
5609	}
5610	#endif
5611	}
5612
5613	D3D11_BUFFER_DESC bd;
5614	RT_ZERO(bd);
5615	bd.ByteWidth = sizeInBytes;
5616	bd.Usage = D3D11_USAGE_DEFAULT;
5617	bd.BindFlags = D3D11_BIND_CONSTANT_BUFFER;
5618	bd.CPUAccessFlags = 0;
5619	bd.MiscFlags = 0;
5620	bd.StructureByteStride = 0;
5621
5622	ID3D11Buffer *pBuffer = 0;
5623	HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBuffer);
5624	if (SUCCEEDED(hr))
5625	{
5626	uint32_t const idxShaderState = type - SVGA3D_SHADERTYPE_MIN;
5627	ID3D11Buffer **ppOldBuffer = &pDXContext->pBackendDXContext->resources.shaderState[idxShaderState].constantBuffers[slot];
5628	LogFunc(("constant buffer: [%u][%u]: sid = %u, %u, %u (%p -> %p)\n",
5629	idxShaderState, slot, sid, offsetInBytes, sizeInBytes, *ppOldBuffer, pBuffer));
5630	D3D_RELEASE(*ppOldBuffer);
5631	*ppOldBuffer = pBuffer;
5632	}
5633
5634	return VINF_SUCCESS;
5635	}
5636
5637	static int dxSetShaderResources(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderType type)
5638	{
5639	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
5640	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
5641
5642	AssertReturn(type >= SVGA3D_SHADERTYPE_MIN && type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
5643
5644	uint32_t const idxShaderState = type - SVGA3D_SHADERTYPE_MIN;
5645	uint32_t const *pSRIds = &pDXContext->svgaDXContext.shaderState[idxShaderState].shaderResources[0];
5646	ID3D11ShaderResourceView *papShaderResourceView[SVGA3D_DX_MAX_SRVIEWS];
5647	for (uint32_t i = 0; i < SVGA3D_DX_MAX_SRVIEWS; ++i)
5648	{
5649	SVGA3dShaderResourceViewId const shaderResourceViewId = pSRIds[i];
5650	if (shaderResourceViewId != SVGA3D_INVALID_ID)
5651	{
5652	ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->pBackendDXContext->cShaderResourceView, VERR_INVALID_PARAMETER);
5653
5654	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paShaderResourceView[shaderResourceViewId];
5655	Assert(pDXView->u.pShaderResourceView);
5656	papShaderResourceView[i] = pDXView->u.pShaderResourceView;
5657	}
5658	else
5659	papShaderResourceView[i] = NULL;
5660	}
5661
5662	dxShaderResourceViewSet(pDXDevice, type, 0, SVGA3D_DX_MAX_SRVIEWS, papShaderResourceView);
5663	return VINF_SUCCESS;
5664	}
5665
5666
5667	static DECLCALLBACK(int) vmsvga3dBackDXSetShaderResources(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startView, SVGA3dShaderType type, uint32_t cShaderResourceViewId, SVGA3dShaderResourceViewId const *paShaderResourceViewId)
5668	{
5669	/* Shader resources will be set in setupPipeline. */
5670	RT_NOREF(pThisCC, pDXContext, startView, type, cShaderResourceViewId, paShaderResourceViewId);
5671	return VINF_SUCCESS;
5672	}
5673
5674
5675	static DECLCALLBACK(int) vmsvga3dBackDXSetShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderId shaderId, SVGA3dShaderType type)
5676	{
5677	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5678	RT_NOREF(pBackend);
5679
5680	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
5681	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5682
5683	RT_NOREF(shaderId, type);
5684
5685	return VINF_SUCCESS;
5686	}
5687
5688
5689	static DECLCALLBACK(int) vmsvga3dBackDXSetSamplers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startSampler, SVGA3dShaderType type, uint32_t cSamplerId, SVGA3dSamplerId const *paSamplerId)
5690	{
5691	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5692	RT_NOREF(pBackend);
5693
5694	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
5695	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5696
5697	ID3D11SamplerState *papSamplerState[SVGA3D_DX_MAX_SAMPLERS];
5698	for (uint32_t i = 0; i < cSamplerId; ++i)
5699	{
5700	SVGA3dSamplerId samplerId = paSamplerId[i];
5701	if (samplerId != SVGA3D_INVALID_ID)
5702	{
5703	ASSERT_GUEST_RETURN(samplerId < pDXContext->pBackendDXContext->cSamplerState, VERR_INVALID_PARAMETER);
5704	papSamplerState[i] = pDXContext->pBackendDXContext->papSamplerState[samplerId];
5705	}
5706	else
5707	papSamplerState[i] = NULL;
5708	}
5709
5710	dxSamplerSet(pDevice, type, startSampler, cSamplerId, papSamplerState);
5711	return VINF_SUCCESS;
5712	}
5713
5714
5715	static void vboxDXMatchShaderInput(DXSHADER pDXShader, DXSHADER pDXShaderPrior)
5716	{
5717	/* For each input generic attribute of the shader find corresponding entry in the prior shader. */
5718	for (uint32_t i = 0; i < pDXShader->shaderInfo.cInputSignature; ++i)
5719	{
5720	SVGA3dDXSignatureEntry const *pSignatureEntry = &pDXShader->shaderInfo.aInputSignature[i];
5721	DXShaderAttributeSemantic *pSemantic = &pDXShader->shaderInfo.aInputSemantic[i];
5722
5723	if (pSignatureEntry->semanticName != SVGADX_SIGNATURE_SEMANTIC_NAME_UNDEFINED)
5724	continue;
5725
5726	int iMatch = -1;
5727	for (uint32_t iPrior = 0; iPrior < pDXShaderPrior->shaderInfo.cOutputSignature; ++iPrior)
5728	{
5729	SVGA3dDXSignatureEntry const *pPriorSignatureEntry = &pDXShaderPrior->shaderInfo.aOutputSignature[iPrior];
5730
5731	if (pPriorSignatureEntry->semanticName != SVGADX_SIGNATURE_SEMANTIC_NAME_UNDEFINED)
5732	continue;
5733
5734	if (pPriorSignatureEntry->registerIndex == pSignatureEntry->registerIndex)
5735	{
5736	iMatch = iPrior;
5737	if (pPriorSignatureEntry->mask == pSignatureEntry->mask)
5738	break; /* Exact match, no need to continue search. */
5739	}
5740	}
5741
5742	if (iMatch >= 0)
5743	{
5744	SVGA3dDXSignatureEntry const *pPriorSignatureEntry = &pDXShaderPrior->shaderInfo.aOutputSignature[iMatch];
5745	DXShaderAttributeSemantic const *pPriorSemantic = &pDXShaderPrior->shaderInfo.aOutputSemantic[iMatch];
5746
5747	Assert(pPriorSignatureEntry->registerIndex == pSignatureEntry->registerIndex);
5748	Assert((pPriorSignatureEntry->mask & pSignatureEntry->mask) == pSignatureEntry->mask);
5749	RT_NOREF(pPriorSignatureEntry);
5750
5751	pSemantic->SemanticIndex = pPriorSemantic->SemanticIndex;
5752	}
5753	}
5754	}
5755
5756
5757	static void vboxDXMatchShaderSignatures(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, DXSHADER *pDXShader)
5758	{
5759	SVGA3dShaderId const shaderIdVS = pDXContext->svgaDXContext.shaderState[SVGA3D_SHADERTYPE_VS - SVGA3D_SHADERTYPE_MIN].shaderId;
5760	SVGA3dShaderId const shaderIdHS = pDXContext->svgaDXContext.shaderState[SVGA3D_SHADERTYPE_HS - SVGA3D_SHADERTYPE_MIN].shaderId;
5761	SVGA3dShaderId const shaderIdDS = pDXContext->svgaDXContext.shaderState[SVGA3D_SHADERTYPE_DS - SVGA3D_SHADERTYPE_MIN].shaderId;
5762	SVGA3dShaderId const shaderIdGS = pDXContext->svgaDXContext.shaderState[SVGA3D_SHADERTYPE_GS - SVGA3D_SHADERTYPE_MIN].shaderId;
5763	SVGA3dShaderId const shaderIdPS = pDXContext->svgaDXContext.shaderState[SVGA3D_SHADERTYPE_PS - SVGA3D_SHADERTYPE_MIN].shaderId;
5764
5765	/* Try to fix the input semantic indices. Output is usually not changed. */
5766	switch (pDXShader->enmShaderType)
5767	{
5768	case SVGA3D_SHADERTYPE_VS:
5769	{
5770	/* Match input to input layout, which sets generic semantic indices to the source registerIndex (dxCreateInputLayout). */
5771	for (uint32_t i = 0; i < pDXShader->shaderInfo.cInputSignature; ++i)
5772	{
5773	SVGA3dDXSignatureEntry const *pSignatureEntry = &pDXShader->shaderInfo.aInputSignature[i];
5774	DXShaderAttributeSemantic *pSemantic = &pDXShader->shaderInfo.aInputSemantic[i];
5775
5776	if (pSignatureEntry->semanticName != SVGADX_SIGNATURE_SEMANTIC_NAME_UNDEFINED)
5777	continue;
5778
5779	pSemantic->SemanticIndex = pSignatureEntry->registerIndex;
5780	}
5781	break;
5782	}
5783	case SVGA3D_SHADERTYPE_HS:
5784	{
5785	/* Input of a HS shader is the output of VS. */
5786	DXSHADER *pDXShaderPrior;
5787	if (shaderIdVS != SVGA3D_INVALID_ID)
5788	pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdVS];
5789	else
5790	pDXShaderPrior = NULL;
5791
5792	if (pDXShaderPrior)
5793	vboxDXMatchShaderInput(pDXShader, pDXShaderPrior);
5794
5795	break;
5796	}
5797	case SVGA3D_SHADERTYPE_DS:
5798	{
5799	/* Input of a DS shader is the output of HS. */
5800	DXSHADER *pDXShaderPrior;
5801	if (shaderIdHS != SVGA3D_INVALID_ID)
5802	pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdHS];
5803	else
5804	pDXShaderPrior = NULL;
5805
5806	if (pDXShaderPrior)
5807	vboxDXMatchShaderInput(pDXShader, pDXShaderPrior);
5808
5809	break;
5810	}
5811	case SVGA3D_SHADERTYPE_GS:
5812	{
5813	/* Input signature of a GS shader is the output of DS or VS. */
5814	DXSHADER *pDXShaderPrior;
5815	if (shaderIdDS != SVGA3D_INVALID_ID)
5816	pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdDS];
5817	else if (shaderIdVS != SVGA3D_INVALID_ID)
5818	pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdVS];
5819	else
5820	pDXShaderPrior = NULL;
5821
5822	if (pDXShaderPrior)
5823	{
5824	/* If GS shader does not have input signature (Windows guest can do that),
5825	* then assign the prior shader signature as GS input.
5826	*/
5827	if (pDXShader->shaderInfo.cInputSignature == 0)
5828	{
5829	pDXShader->shaderInfo.cInputSignature = pDXShaderPrior->shaderInfo.cOutputSignature;
5830	memcpy(pDXShader->shaderInfo.aInputSignature,
5831	pDXShaderPrior->shaderInfo.aOutputSignature,
5832	pDXShaderPrior->shaderInfo.cOutputSignature * sizeof(SVGA3dDXSignatureEntry));
5833	memcpy(pDXShader->shaderInfo.aInputSemantic,
5834	pDXShaderPrior->shaderInfo.aOutputSemantic,
5835	pDXShaderPrior->shaderInfo.cOutputSignature * sizeof(DXShaderAttributeSemantic));
5836	}
5837	else
5838	vboxDXMatchShaderInput(pDXShader, pDXShaderPrior);
5839	}
5840
5841	/* Output signature of a GS shader is the input of the pixel shader. */
5842	if (shaderIdPS != SVGA3D_INVALID_ID)
5843	{
5844	/* If GS shader does not have output signature (Windows guest can do that),
5845	* then assign the PS shader signature as GS output.
5846	*/
5847	if (pDXShader->shaderInfo.cOutputSignature == 0)
5848	{
5849	DXSHADER const *pDXShaderPosterior = &pDXContext->pBackendDXContext->paShader[shaderIdPS];
5850	pDXShader->shaderInfo.cOutputSignature = pDXShaderPosterior->shaderInfo.cInputSignature;
5851	memcpy(pDXShader->shaderInfo.aOutputSignature,
5852	pDXShaderPosterior->shaderInfo.aInputSignature,
5853	pDXShaderPosterior->shaderInfo.cInputSignature * sizeof(SVGA3dDXSignatureEntry));
5854	memcpy(pDXShader->shaderInfo.aOutputSemantic,
5855	pDXShaderPosterior->shaderInfo.aInputSemantic,
5856	pDXShaderPosterior->shaderInfo.cInputSignature * sizeof(DXShaderAttributeSemantic));
5857	}
5858	}
5859
5860	SVGA3dStreamOutputId const soid = pDXContext->svgaDXContext.streamOut.soid;
5861	if (soid != SVGA3D_INVALID_ID)
5862	{
5863	ASSERT_GUEST_RETURN_VOID(soid < pDXContext->pBackendDXContext->cStreamOutput);
5864
5865	/* Set semantic names and indices for SO declaration entries according to the shader output. */
5866	SVGACOTableDXStreamOutputEntry const *pStreamOutputEntry = &pDXContext->cot.paStreamOutput[soid];
5867	DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[soid];
5868
5869	if (pDXStreamOutput->cDeclarationEntry == 0)
5870	{
5871	int rc = dxDefineStreamOutput(pThisCC, pDXContext, soid, pStreamOutputEntry, pDXShader);
5872	AssertRCReturnVoid(rc);
5873	#ifdef LOG_ENABLED
5874	Log6(("Stream output declaration:\n\n"));
5875	Log6(("Stream SemanticName SemanticIndex StartComponent ComponentCount OutputSlot\n"));
5876	Log6(("------ -------------- ------------- -------------- -------------- ----------\n"));
5877	for (unsigned i = 0; i < pDXStreamOutput->cDeclarationEntry; ++i)
5878	{
5879	D3D11_SO_DECLARATION_ENTRY *p = &pDXStreamOutput->aDeclarationEntry[i];
5880	Log6(("%d %-14s %d %d %d %d\n",
5881	p->Stream, p->SemanticName, p->SemanticIndex, p->StartComponent, p->ComponentCount, p->OutputSlot));
5882	}
5883	Log6(("\n"));
5884	#endif
5885
5886	}
5887	}
5888	break;
5889	}
5890	case SVGA3D_SHADERTYPE_PS:
5891	{
5892	/* Input of a PS shader is the output of GS, DS or VS. */
5893	DXSHADER *pDXShaderPrior;
5894	if (shaderIdGS != SVGA3D_INVALID_ID)
5895	pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdGS];
5896	else if (shaderIdDS != SVGA3D_INVALID_ID)
5897	pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdDS];
5898	else if (shaderIdVS != SVGA3D_INVALID_ID)
5899	pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdVS];
5900	else
5901	pDXShaderPrior = NULL;
5902
5903	if (pDXShaderPrior)
5904	vboxDXMatchShaderInput(pDXShader, pDXShaderPrior);
5905	break;
5906	}
5907	default:
5908	break;
5909	}
5910
5911	/* Intermediate shaders normally have both input and output signatures. However it is ok if they do not.
5912	* Just catch this unusual case in order to see if everything is fine.
5913	*/
5914	Assert( ( pDXShader->enmShaderType == SVGA3D_SHADERTYPE_VS
5915	\|\| pDXShader->enmShaderType == SVGA3D_SHADERTYPE_PS
5916	\|\| pDXShader->enmShaderType == SVGA3D_SHADERTYPE_CS)
5917	\|\| (pDXShader->shaderInfo.cInputSignature && pDXShader->shaderInfo.cOutputSignature));
5918	}
5919
5920
5921	static void vboxDXUpdateVSInputSignature(PVMSVGA3DDXCONTEXT pDXContext, DXSHADER *pDXShader)
5922	{
5923	SVGA3dElementLayoutId const elementLayoutId = pDXContext->svgaDXContext.inputAssembly.layoutId;
5924	if (elementLayoutId != SVGA3D_INVALID_ID)
5925	{
5926	SVGACOTableDXElementLayoutEntry const *pElementLayout = &pDXContext->cot.paElementLayout[elementLayoutId];
5927	for (uint32_t i = 0; i < RT_MIN(pElementLayout->numDescs, pDXShader->shaderInfo.cInputSignature); ++i)
5928	{
5929	SVGA3dInputElementDesc const *pElementDesc = &pElementLayout->descs[i];
5930	SVGA3dDXSignatureEntry *pSignatureEntry = &pDXShader->shaderInfo.aInputSignature[i];
5931	pSignatureEntry->componentType = DXShaderComponentTypeFromFormat(pElementDesc->format);
5932	}
5933	}
5934	}
5935
5936
5937	static void dxCreateInputLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId, DXSHADER *pDXShader)
5938	{
5939	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
5940	AssertReturnVoid(pDevice->pDevice);
5941
5942	SVGACOTableDXElementLayoutEntry const *pEntry = &pDXContext->cot.paElementLayout[elementLayoutId];
5943	DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
5944
5945	if (pDXElementLayout->cElementDesc == 0)
5946	{
5947	/* Semantic name is not interpreted by D3D, therefore arbitrary names can be used
5948	* if they are consistent between the element layout and shader input signature.
5949	* "In general, data passed between pipeline stages is completely generic and is not uniquely
5950	* interpreted by the system; arbitrary semantics are allowed ..."
5951	*
5952	* However D3D runtime insists that "SemanticName string ("POSITIO1") cannot end with a number."
5953	*
5954	* System-Value semantics ("SV_*") between shaders require proper names of course.
5955	* But they are irrelevant for input attributes.
5956	*/
5957	pDXElementLayout->cElementDesc = pEntry->numDescs;
5958	for (uint32_t i = 0; i < pEntry->numDescs; ++i)
5959	{
5960	D3D11_INPUT_ELEMENT_DESC *pDst = &pDXElementLayout->aElementDesc[i];
5961	SVGA3dInputElementDesc const *pSrc = &pEntry->descs[i];
5962	pDst->SemanticName = "ATTRIB";
5963	pDst->SemanticIndex = pSrc->inputRegister;
5964	pDst->Format = vmsvgaDXSurfaceFormat2Dxgi(pSrc->format);
5965	Assert(pDst->Format != DXGI_FORMAT_UNKNOWN);
5966	pDst->InputSlot = pSrc->inputSlot;
5967	pDst->AlignedByteOffset = pSrc->alignedByteOffset;
5968	pDst->InputSlotClass = (D3D11_INPUT_CLASSIFICATION)pSrc->inputSlotClass;
5969	pDst->InstanceDataStepRate = pSrc->instanceDataStepRate;
5970	}
5971	}
5972
5973	HRESULT hr = pDevice->pDevice->CreateInputLayout(pDXElementLayout->aElementDesc,
5974	pDXElementLayout->cElementDesc,
5975	pDXShader->pvDXBC,
5976	pDXShader->cbDXBC,
5977	&pDXElementLayout->pElementLayout);
5978	Assert(SUCCEEDED(hr)); RT_NOREF(hr);
5979	}
5980
5981
5982	static void dxSetConstantBuffers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5983	{
5984	//DEBUG_BREAKPOINT_TEST();
5985	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5986	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
5987	VMSVGA3DBACKENDDXCONTEXT *pBackendDXContext = pDXContext->pBackendDXContext;
5988
5989	AssertCompile(RT_ELEMENTS(pBackendDXContext->resources.shaderState[0].constantBuffers) == SVGA3D_DX_MAX_CONSTBUFFERS);
5990
5991	for (uint32_t idxShaderState = 0; idxShaderState < SVGA3D_NUM_SHADERTYPE; ++idxShaderState)
5992	{
5993	SVGA3dShaderType const shaderType = (SVGA3dShaderType)(idxShaderState + SVGA3D_SHADERTYPE_MIN);
5994	for (uint32_t idxSlot = 0; idxSlot < SVGA3D_DX_MAX_CONSTBUFFERS; ++idxSlot)
5995	{
5996	ID3D11Buffer **pBufferContext = &pBackendDXContext->resources.shaderState[idxShaderState].constantBuffers[idxSlot];
5997	ID3D11Buffer **pBufferPipeline = &pBackend->resources.shaderState[idxShaderState].constantBuffers[idxSlot];
5998	if (pBufferContext != pBufferPipeline)
5999	{
6000	LogFunc(("constant buffer: [%u][%u]: %p -> %p\n",
6001	idxShaderState, idxSlot, pBufferPipeline, pBufferContext));
6002	dxConstantBufferSet(pDXDevice, idxSlot, shaderType, *pBufferContext);
6003
6004	if (*pBufferContext)
6005	(*pBufferContext)->AddRef();
6006	D3D_RELEASE(*pBufferPipeline);
6007	pBufferPipeline = pBufferContext;
6008	}
6009	}
6010	}
6011	}
6012
6013	static void dxSetVertexBuffers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6014	{
6015	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6016
6017	ID3D11Buffer *paResources[SVGA3D_DX_MAX_VERTEXBUFFERS];
6018	UINT paStride[SVGA3D_DX_MAX_VERTEXBUFFERS];
6019	UINT paOffset[SVGA3D_DX_MAX_VERTEXBUFFERS];
6020
6021	int32_t idxMinSlot = SVGA3D_DX_MAX_VERTEXBUFFERS;
6022	int32_t idxMaxSlot = -1;
6023	for (int32_t i = 0; i < SVGA3D_DX_MAX_VERTEXBUFFERS; ++i)
6024	{
6025	SVGA3dBufferBinding const *pBufferContext = &pDXContext->svgaDXContext.inputAssembly.vertexBuffers[i];
6026	SVGA3dBufferBinding *pBufferPipeline = &pBackend->svgaDXContext.inputAssembly.vertexBuffers[i];
6027
6028	if ( pBufferContext->bufferId != pBufferPipeline->bufferId
6029	\|\| pBufferContext->stride != pBufferPipeline->stride
6030	\|\| pBufferContext->offset != pBufferPipeline->offset)
6031	{
6032	/* The slot has a new buffer. */
6033	LogFunc(("vb[%u]: sid = %u, stride %d, off %d -> sid = %u, stride %d, off %d\n",
6034	i, pBufferPipeline->bufferId, pBufferPipeline->stride, pBufferPipeline->offset,
6035	pBufferContext->bufferId, pBufferContext->stride, pBufferContext->offset));
6036
6037	pBufferPipeline = pBufferContext;
6038
6039	idxMaxSlot = RT_MAX(idxMaxSlot, i);
6040	idxMinSlot = RT_MIN(idxMinSlot, i);
6041	}
6042	#ifdef LOG_ENABLED
6043	else if (pBufferPipeline->bufferId != SVGA3D_INVALID_ID)
6044	{
6045	LogFunc(("vb[%u]: sid = %u, stride %d, off %d\n",
6046	i, pBufferPipeline->bufferId, pBufferPipeline->stride, pBufferPipeline->offset));
6047	}
6048	#endif
6049	ID3D11Buffer *pBuffer = NULL;
6050	if (pBufferPipeline->bufferId != SVGA3D_INVALID_ID)
6051	{
6052	PVMSVGA3DSURFACE pSurface;
6053	ID3D11Resource *pResource;
6054	int rc = dxEnsureResource(pThisCC, pDXContext, pBufferPipeline->bufferId, &pSurface, &pResource);
6055	if ( RT_SUCCESS(rc)
6056	&& pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
6057	pBuffer = (ID3D11Buffer *)pResource;
6058	else
6059	AssertMsgFailed(("%Rrc %p %d\n", rc, pSurface->pBackendSurface, pSurface->pBackendSurface ? pSurface->pBackendSurface->enmResType : VMSVGA3D_RESTYPE_NONE));
6060	}
6061
6062	paResources[i] = pBuffer;
6063	if (pBuffer)
6064	{
6065	LogFunc(("vb[%u]: %p\n", i, pBuffer));
6066	paStride[i] = pBufferPipeline->stride;
6067	paOffset[i] = pBufferPipeline->offset;
6068	}
6069	else
6070	{
6071	paStride[i] = 0;
6072	paOffset[i] = 0;
6073	}
6074	}
6075
6076	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
6077	LogFunc(("idxMinSlot = %d, idxMaxSlot = %d\n", idxMinSlot, idxMaxSlot));
6078	if (idxMaxSlot >= 0)
6079	pDXDevice->pImmediateContext->IASetVertexBuffers(idxMinSlot, (idxMaxSlot - idxMinSlot) + 1,
6080	&paResources[idxMinSlot], &paStride[idxMinSlot], &paOffset[idxMinSlot]);
6081	}
6082
6083	static void dxSetIndexBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6084	{
6085	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6086
6087	SVGADXContextMobFormat *pPipelineState = &pBackend->svgaDXContext;
6088	SVGADXContextMobFormat const *pContextState = &pDXContext->svgaDXContext;
6089
6090	if ( pPipelineState->inputAssembly.indexBufferSid != pContextState->inputAssembly.indexBufferSid
6091	\|\| pPipelineState->inputAssembly.indexBufferOffset != pContextState->inputAssembly.indexBufferOffset
6092	\|\| pPipelineState->inputAssembly.indexBufferFormat != pContextState->inputAssembly.indexBufferFormat)
6093	{
6094	LogFunc(("ib: sid = %u, offset %u, fmt %u -> sid = %u, offset %u, fmt %u\n",
6095	pPipelineState->inputAssembly.indexBufferSid, pPipelineState->inputAssembly.indexBufferOffset, pPipelineState->inputAssembly.indexBufferFormat,
6096	pContextState->inputAssembly.indexBufferSid, pContextState->inputAssembly.indexBufferOffset, pContextState->inputAssembly.indexBufferFormat));
6097
6098	pPipelineState->inputAssembly.indexBufferSid = pContextState->inputAssembly.indexBufferSid;
6099	pPipelineState->inputAssembly.indexBufferOffset = pContextState->inputAssembly.indexBufferOffset;
6100	pPipelineState->inputAssembly.indexBufferFormat = pContextState->inputAssembly.indexBufferFormat;
6101	}
6102	#ifdef LOG_ENABLED
6103	else if (pPipelineState->inputAssembly.indexBufferSid != SVGA3D_INVALID_ID)
6104	{
6105	LogFunc(("ib: sid = %u, offset %u, fmt %u\n",
6106	pPipelineState->inputAssembly.indexBufferSid, pPipelineState->inputAssembly.indexBufferOffset, pPipelineState->inputAssembly.indexBufferFormat));
6107	}
6108	#endif
6109
6110	ID3D11Buffer *pBuffer = NULL;
6111	if (pPipelineState->inputAssembly.indexBufferSid != SVGA3D_INVALID_ID)
6112	{
6113	PVMSVGA3DSURFACE pSurface;
6114	ID3D11Resource *pResource;
6115	int rc = dxEnsureResource(pThisCC, pDXContext, pPipelineState->inputAssembly.indexBufferSid, &pSurface, &pResource);
6116	if ( RT_SUCCESS(rc)
6117	&& pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
6118	pBuffer = (ID3D11Buffer *)pResource;
6119	else
6120	AssertMsgFailed(("%Rrc %p %d\n", rc, pSurface->pBackendSurface, pSurface->pBackendSurface ? pSurface->pBackendSurface->enmResType : VMSVGA3D_RESTYPE_NONE));
6121	}
6122
6123	DXGI_FORMAT enmDxgiFormat;
6124	UINT Offset;
6125	if (pBuffer)
6126	{
6127	enmDxgiFormat = vmsvgaDXSurfaceFormat2Dxgi((SVGA3dSurfaceFormat)pPipelineState->inputAssembly.indexBufferFormat);
6128	AssertReturnVoid(enmDxgiFormat == DXGI_FORMAT_R16_UINT \|\| enmDxgiFormat == DXGI_FORMAT_R32_UINT);
6129	Offset = pPipelineState->inputAssembly.indexBufferOffset;
6130	}
6131	else
6132	{
6133	enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
6134	Offset = 0;
6135	}
6136
6137	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
6138	pDXDevice->pImmediateContext->IASetIndexBuffer(pBuffer, enmDxgiFormat, Offset);
6139	}
6140
6141	#ifdef LOG_ENABLED
6142	static void dxDbgLogVertexElement(DXGI_FORMAT Format, void const *pvElementData)
6143	{
6144	switch (Format)
6145	{
6146	case DXGI_FORMAT_R32G32B32A32_FLOAT:
6147	{
6148	float const pValues = (float const )pvElementData;
6149	Log8(("{ " FLOAT_FMT_STR ", " FLOAT_FMT_STR ", " FLOAT_FMT_STR ", " FLOAT_FMT_STR " },",
6150	FLOAT_FMT_ARGS(pValues[0]), FLOAT_FMT_ARGS(pValues[1]), FLOAT_FMT_ARGS(pValues[2]), FLOAT_FMT_ARGS(pValues[3])));
6151	break;
6152	}
6153	case DXGI_FORMAT_R32G32B32_FLOAT:
6154	{
6155	float const pValues = (float const )pvElementData;
6156	Log8(("{ " FLOAT_FMT_STR ", " FLOAT_FMT_STR ", " FLOAT_FMT_STR " },",
6157	FLOAT_FMT_ARGS(pValues[0]), FLOAT_FMT_ARGS(pValues[1]), FLOAT_FMT_ARGS(pValues[2])));
6158	break;
6159	}
6160	case DXGI_FORMAT_R32G32_FLOAT:
6161	{
6162	float const pValues = (float const )pvElementData;
6163	Log8(("{ " FLOAT_FMT_STR ", " FLOAT_FMT_STR " },",
6164	FLOAT_FMT_ARGS(pValues[0]), FLOAT_FMT_ARGS(pValues[1])));
6165	break;
6166	}
6167	case DXGI_FORMAT_R32_FLOAT:
6168	{
6169	float const pValues = (float const )pvElementData;
6170	Log8(("{ " FLOAT_FMT_STR " },",
6171	FLOAT_FMT_ARGS(pValues[0])));
6172	break;
6173	}
6174	case DXGI_FORMAT_R16G16B16A16_FLOAT:
6175	{
6176	uint16_t const pValues = (uint16_t const )pvElementData;
6177	Log8(("{ /f16/ " FLOAT_FMT_STR ", " FLOAT_FMT_STR ", " FLOAT_FMT_STR ", " FLOAT_FMT_STR " },",
6178	FLOAT_FMT_ARGS(float16ToFloat(pValues[0])), FLOAT_FMT_ARGS(float16ToFloat(pValues[1])),
6179	FLOAT_FMT_ARGS(float16ToFloat(pValues[2])), FLOAT_FMT_ARGS(float16ToFloat(pValues[3]))));
6180	break;
6181	}
6182	case DXGI_FORMAT_R16G16_FLOAT:
6183	{
6184	uint16_t const pValues = (uint16_t const )pvElementData;
6185	Log8(("{ /f16/ " FLOAT_FMT_STR ", " FLOAT_FMT_STR " },",
6186	FLOAT_FMT_ARGS(float16ToFloat(pValues[0])), FLOAT_FMT_ARGS(float16ToFloat(pValues[1]))));
6187	break;
6188	}
6189	case DXGI_FORMAT_R32G32_SINT:
6190	{
6191	int32_t const pValues = (int32_t const )pvElementData;
6192	Log8(("{ %d, %d },",
6193	pValues[0], pValues[1]));
6194	break;
6195	}
6196	case DXGI_FORMAT_R32G32_UINT:
6197	{
6198	uint32_t const pValues = (uint32_t const )pvElementData;
6199	Log8(("{ %u, %u },",
6200	pValues[0], pValues[1]));
6201	break;
6202	}
6203	case DXGI_FORMAT_R32_SINT:
6204	{
6205	int32_t const pValues = (int32_t const )pvElementData;
6206	Log8(("{ %d },",
6207	pValues[0]));
6208	break;
6209	}
6210	case DXGI_FORMAT_R32_UINT:
6211	{
6212	uint32_t const pValues = (uint32_t const )pvElementData;
6213	Log8(("{ %u },",
6214	pValues[0]));
6215	break;
6216	}
6217	case DXGI_FORMAT_R16G16B16A16_SINT:
6218	{
6219	int16_t const pValues = (int16_t const )pvElementData;
6220	Log8(("{ /s16/ %d, %d, %d, %d },",
6221	pValues[0], pValues[1], pValues[2], pValues[3]));
6222	break;
6223	}
6224	case DXGI_FORMAT_R16G16_SINT:
6225	{
6226	int16_t const pValues = (int16_t const )pvElementData;
6227	Log8(("{ /s16/ %d, %d },",
6228	pValues[0], pValues[1]));
6229	break;
6230	}
6231	case DXGI_FORMAT_R16G16_UINT:
6232	{
6233	uint16_t const pValues = (uint16_t const )pvElementData;
6234	Log8(("{ /u16/ %u, %u },",
6235	pValues[0], pValues[1]));
6236	break;
6237	}
6238	case DXGI_FORMAT_R16G16_SNORM:
6239	{
6240	int16_t const pValues = (int16_t const )pvElementData;
6241	Log8(("{ /sn16/ 0x%x, 0x%x },",
6242	pValues[0], pValues[1]));
6243	break;
6244	}
6245	case DXGI_FORMAT_R16G16_UNORM:
6246	{
6247	uint16_t const pValues = (uint16_t const )pvElementData;
6248	Log8(("{ /un16/ 0x%x, 0x%x },",
6249	pValues[0], pValues[1]));
6250	break;
6251	}
6252	case DXGI_FORMAT_R16_UINT:
6253	{
6254	uint16_t const pValues = (uint16_t const )pvElementData;
6255	Log8(("{ /u16/ %u },",
6256	pValues[0]));
6257	break;
6258	}
6259	case DXGI_FORMAT_R8G8B8A8_SINT:
6260	{
6261	uint8_t const pValues = (uint8_t const )pvElementData;
6262	Log8(("{ /8sint/ %d, %d, %d, %d },",
6263	pValues[0], pValues[1], pValues[2], pValues[3]));
6264	break;
6265	}
6266	case DXGI_FORMAT_R8G8B8A8_UINT:
6267	{
6268	uint8_t const pValues = (uint8_t const )pvElementData;
6269	Log8(("{ /8uint/ %u, %u, %u, %u },",
6270	pValues[0], pValues[1], pValues[2], pValues[3]));
6271	break;
6272	}
6273	case DXGI_FORMAT_B8G8R8A8_UNORM:
6274	{
6275	uint8_t const pValues = (uint8_t const )pvElementData;
6276	Log8(("{ /8unorm/ %u, %u, %u, %u },",
6277	pValues[0], pValues[1], pValues[2], pValues[3]));
6278	break;
6279	}
6280	case DXGI_FORMAT_R8G8B8A8_UNORM:
6281	{
6282	uint8_t const pValues = (uint8_t const )pvElementData;
6283	Log8(("{ /8unorm/ %u, %u, %u, %u },",
6284	pValues[0], pValues[1], pValues[2], pValues[3]));
6285	break;
6286	}
6287	case DXGI_FORMAT_R8G8_UNORM:
6288	{
6289	uint8_t const pValues = (uint8_t const )pvElementData;
6290	Log8(("{ /8unorm/ %u, %u },",
6291	pValues[0], pValues[1]));
6292	break;
6293	}
6294	case DXGI_FORMAT_R8_UINT:
6295	{
6296	uint8_t const pValues = (uint8_t const )pvElementData;
6297	Log8(("{ /8unorm/ %u },",
6298	pValues[0]));
6299	break;
6300	}
6301	default:
6302	Log8(("{ ??? DXGI_FORMAT %d },",
6303	Format));
6304	AssertFailed();
6305	}
6306	}
6307
6308
6309	static void dxDbgDumpVertexData(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t vertexCount, uint32_t startVertexLocation)
6310	{
6311	for (uint32_t iSlot = 0; iSlot < SVGA3D_DX_MAX_VERTEXBUFFERS; ++iSlot)
6312	{
6313	SVGA3dBufferBinding const *pVBInfo = &pDXContext->svgaDXContext.inputAssembly.vertexBuffers[iSlot];
6314	if (pVBInfo->bufferId == SVGA3D_INVALID_ID)
6315	continue;
6316
6317	PVMSVGA3DSURFACE pSurface = NULL;
6318	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pVBInfo->bufferId, &pSurface);
6319	AssertContinue(RT_SUCCESS(rc));
6320	AssertContinue(pSurface->pBackendSurface->u.pBuffer && pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER);
6321
6322	SVGA3dSurfaceImageId image;
6323	image.sid = pVBInfo->bufferId;
6324	image.face = 0;
6325	image.mipmap = 0;
6326
6327	VMSVGA3D_MAPPED_SURFACE map;
6328	rc = vmsvga3dBackSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
6329	AssertRC(rc);
6330	if (RT_SUCCESS(rc))
6331	{
6332	uint8_t const pu8VertexData = (uint8_t )map.pvData;
6333	pu8VertexData += pVBInfo->offset;
6334	pu8VertexData += startVertexLocation * pVBInfo->stride;
6335
6336	SVGA3dElementLayoutId const elementLayoutId = pDXContext->svgaDXContext.inputAssembly.layoutId;
6337	DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
6338	Assert(pDXElementLayout->cElementDesc > 0);
6339
6340	Log8(("Vertex buffer dump: sid = %u, vertexCount %u, startVertexLocation %d, offset = %d, stride = %d:\n",
6341	pVBInfo->bufferId, vertexCount, startVertexLocation, pVBInfo->offset, pVBInfo->stride));
6342
6343	for (uint32_t v = 0; v < vertexCount; ++v)
6344	{
6345	Log8(("slot[%u] /* v%u */ { ", iSlot, startVertexLocation + v));
6346
6347	for (uint32_t iElement = 0; iElement < pDXElementLayout->cElementDesc; ++iElement)
6348	{
6349	D3D11_INPUT_ELEMENT_DESC *pElement = &pDXElementLayout->aElementDesc[iElement];
6350	if (pElement->InputSlot == iSlot)
6351	dxDbgLogVertexElement(pElement->Format, pu8VertexData + pElement->AlignedByteOffset);
6352	}
6353
6354	Log8((" },\n"));
6355
6356	if (pVBInfo->stride == 0)
6357	break;
6358
6359	pu8VertexData += pVBInfo->stride;
6360	}
6361
6362	vmsvga3dBackSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
6363	}
6364	}
6365	}
6366
6367
6368	static void dxDbgDumpIndexedVertexData(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t indexCount, uint32_t startIndexLocation, int32_t baseVertexLocation)
6369	{
6370	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
6371
6372	uint32_t const indexBufferSid = pDXContext->svgaDXContext.inputAssembly.indexBufferSid;
6373	if (indexBufferSid == SVGA3D_INVALID_ID)
6374	return;
6375	uint32_t const indexBufferFormat = pDXContext->svgaDXContext.inputAssembly.indexBufferFormat;
6376	uint32_t const indexBufferOffset = pDXContext->svgaDXContext.inputAssembly.indexBufferOffset;
6377
6378	PVMSVGA3DSURFACE pSurface = NULL;
6379	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, indexBufferSid, &pSurface);
6380	AssertReturnVoid(RT_SUCCESS(rc));
6381	AssertReturnVoid(pSurface->pBackendSurface->u.pBuffer && pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER);
6382
6383	UINT const BytesPerIndex = indexBufferFormat == SVGA3D_R16_UINT ? 2 : 4;
6384
6385	void *pvIndexBuffer;
6386	uint32_t cbIndexBuffer;
6387	rc = dxReadBuffer(pDXDevice, pSurface->pBackendSurface->u.pBuffer,
6388	indexBufferOffset + startIndexLocation * BytesPerIndex,
6389	indexCount * BytesPerIndex, &pvIndexBuffer, &cbIndexBuffer);
6390	AssertRC(rc);
6391	if (RT_SUCCESS(rc))
6392	{
6393	uint8_t const pu8IndexData = (uint8_t )pvIndexBuffer;
6394
6395	for (uint32_t iSlot = 0; iSlot < SVGA3D_DX_MAX_VERTEXBUFFERS; ++iSlot)
6396	{
6397	SVGA3dBufferBinding const *pVBInfo = &pDXContext->svgaDXContext.inputAssembly.vertexBuffers[iSlot];
6398	if (pVBInfo->bufferId == SVGA3D_INVALID_ID)
6399	continue;
6400
6401	pSurface = NULL;
6402	rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pVBInfo->bufferId, &pSurface);
6403	AssertContinue(RT_SUCCESS(rc));
6404	AssertContinue(pSurface->pBackendSurface->u.pBuffer && pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER);
6405
6406	SVGA3dSurfaceImageId image;
6407	image.sid = pVBInfo->bufferId;
6408	image.face = 0;
6409	image.mipmap = 0;
6410
6411	VMSVGA3D_MAPPED_SURFACE mapVB;
6412	rc = vmsvga3dBackSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &mapVB);
6413	AssertRC(rc);
6414	if (RT_SUCCESS(rc))
6415	{
6416	uint8_t const pu8VertexData = (uint8_t )mapVB.pvData;
6417	pu8VertexData += pVBInfo->offset;
6418	pu8VertexData += baseVertexLocation * pVBInfo->stride;
6419
6420	SVGA3dElementLayoutId const elementLayoutId = pDXContext->svgaDXContext.inputAssembly.layoutId;
6421	DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
6422	Assert(pDXElementLayout->cElementDesc > 0);
6423
6424	Log8(("Vertex buffer dump: sid = %u, indexCount %u, startIndexLocation %d, baseVertexLocation %d, offset = %d, stride = %d:\n",
6425	pVBInfo->bufferId, indexCount, startIndexLocation, baseVertexLocation, pVBInfo->offset, pVBInfo->stride));
6426
6427	for (uint32_t i = 0; i < indexCount; ++i)
6428	{
6429	uint32_t Index;
6430	if (BytesPerIndex == 2)
6431	Index = ((uint16_t *)pu8IndexData)[i];
6432	else
6433	Index = ((uint32_t *)pu8IndexData)[i];
6434
6435	Log8(("slot[%u] /* v%u */ { ", iSlot, Index));
6436
6437	for (uint32_t iElement = 0; iElement < pDXElementLayout->cElementDesc; ++iElement)
6438	{
6439	D3D11_INPUT_ELEMENT_DESC *pElement = &pDXElementLayout->aElementDesc[iElement];
6440	if (pElement->InputSlotClass != D3D11_INPUT_PER_VERTEX_DATA)
6441	continue;
6442
6443	if (pElement->InputSlot == iSlot)
6444	{
6445	uint8_t const pu8Vertex = pu8VertexData + Index pVBInfo->stride;
6446	dxDbgLogVertexElement(pElement->Format, pu8Vertex + pElement->AlignedByteOffset);
6447	}
6448	}
6449
6450	Log8((" },\n"));
6451
6452	if (pVBInfo->stride == 0)
6453	break;
6454	}
6455
6456	vmsvga3dBackSurfaceUnmap(pThisCC, &image, &mapVB, /* fWritten = */ false);
6457	}
6458	}
6459
6460	RTMemFree(pvIndexBuffer);
6461	}
6462	}
6463
6464
6465	static void dxDbgDumpInstanceData(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t instanceCount, uint32_t startInstanceLocation)
6466	{
6467	/*
6468	* Dump per-instance data.
6469	*/
6470	for (uint32_t iInstance = 0; iInstance < instanceCount; ++iInstance)
6471	{
6472	for (uint32_t iSlot = 0; iSlot < SVGA3D_DX_MAX_VERTEXBUFFERS; ++iSlot)
6473	{
6474	SVGA3dBufferBinding const *pVBInfo = &pDXContext->svgaDXContext.inputAssembly.vertexBuffers[iSlot];
6475	if (pVBInfo->bufferId == SVGA3D_INVALID_ID)
6476	continue;
6477
6478	PVMSVGA3DSURFACE pSurface = NULL;
6479	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pVBInfo->bufferId, &pSurface);
6480	AssertContinue(RT_SUCCESS(rc));
6481	AssertContinue(pSurface->pBackendSurface->u.pBuffer && pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER);
6482
6483	SVGA3dSurfaceImageId image;
6484	image.sid = pVBInfo->bufferId;
6485	image.face = 0;
6486	image.mipmap = 0;
6487
6488	VMSVGA3D_MAPPED_SURFACE mapVB;
6489	rc = vmsvga3dBackSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &mapVB);
6490	AssertRC(rc);
6491	if (RT_SUCCESS(rc))
6492	{
6493	uint8_t const pu8VertexData = (uint8_t )mapVB.pvData;
6494	pu8VertexData += pVBInfo->offset;
6495	pu8VertexData += startInstanceLocation * pVBInfo->stride;
6496
6497	SVGA3dElementLayoutId const elementLayoutId = pDXContext->svgaDXContext.inputAssembly.layoutId;
6498	DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
6499	Assert(pDXElementLayout->cElementDesc > 0);
6500
6501	Log8(("Instance data dump: sid = %u, iInstance %u, startInstanceLocation %d, offset = %d, stride = %d:\n",
6502	pVBInfo->bufferId, iInstance, startInstanceLocation, pVBInfo->offset, pVBInfo->stride));
6503
6504	Log8(("slot[%u] /* i%u */ { ", iSlot, iInstance));
6505	for (uint32_t iElement = 0; iElement < pDXElementLayout->cElementDesc; ++iElement)
6506	{
6507	D3D11_INPUT_ELEMENT_DESC *pElement = &pDXElementLayout->aElementDesc[iElement];
6508	if (pElement->InputSlotClass != D3D11_INPUT_PER_INSTANCE_DATA)
6509	continue;
6510
6511	if (pElement->InputSlot == iSlot)
6512	{
6513	uint8_t const pu8Vertex = pu8VertexData + iInstance pVBInfo->stride;
6514	dxDbgLogVertexElement(pElement->Format, pu8Vertex + pElement->AlignedByteOffset);
6515	}
6516	}
6517	Log8((" },\n"));
6518
6519	vmsvga3dBackSurfaceUnmap(pThisCC, &image, &mapVB, /* fWritten = */ false);
6520	}
6521	}
6522	}
6523	}
6524
6525	static void dxDbgDumpVertices_Draw(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t vertexCount, uint32_t startVertexLocation)
6526	{
6527	dxDbgDumpVertexData(pThisCC, pDXContext, vertexCount, startVertexLocation);
6528	}
6529
6530
6531	static void dxDbgDumpVertices_DrawIndexed(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t indexCount, uint32_t startIndexLocation, int32_t baseVertexLocation)
6532	{
6533	dxDbgDumpIndexedVertexData(pThisCC, pDXContext, indexCount, startIndexLocation, baseVertexLocation);
6534	}
6535
6536
6537	static void dxDbgDumpVertices_DrawInstanced(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
6538	uint32_t vertexCountPerInstance, uint32_t instanceCount,
6539	uint32_t startVertexLocation, uint32_t startInstanceLocation)
6540	{
6541	dxDbgDumpVertexData(pThisCC, pDXContext, vertexCountPerInstance, startVertexLocation);
6542	dxDbgDumpInstanceData(pThisCC, pDXContext, instanceCount, startInstanceLocation);
6543	}
6544
6545
6546	static void dxDbgDumpVertices_DrawIndexedInstanced(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
6547	uint32_t indexCountPerInstance, uint32_t instanceCount,
6548	uint32_t startIndexLocation, int32_t baseVertexLocation,
6549	uint32_t startInstanceLocation)
6550	{
6551	dxDbgDumpIndexedVertexData(pThisCC, pDXContext, indexCountPerInstance, startIndexLocation, baseVertexLocation);
6552	dxDbgDumpInstanceData(pThisCC, pDXContext, instanceCount, startInstanceLocation);
6553	}
6554	#endif
6555
6556
6557	static int dxCreateRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGACOTableDXRTViewEntry const *pEntry)
6558	{
6559	PVMSVGA3DSURFACE pSurface;
6560	ID3D11Resource *pResource;
6561	int rc = dxEnsureResource(pThisCC, pDXContext, pEntry->sid, &pSurface, &pResource);
6562	AssertRCReturn(rc, rc);
6563
6564	DXVIEW *pView = &pDXContext->pBackendDXContext->paRenderTargetView[renderTargetViewId];
6565	Assert(pView->u.pView == NULL);
6566
6567	ID3D11RenderTargetView *pRenderTargetView;
6568	HRESULT hr = dxRenderTargetViewCreate(pThisCC, pDXContext, pEntry, pSurface, &pRenderTargetView);
6569	AssertReturn(SUCCEEDED(hr), VERR_INVALID_STATE);
6570
6571	return dxViewInit(pView, pSurface, pDXContext, renderTargetViewId, VMSVGA3D_VIEWTYPE_RENDERTARGET, pRenderTargetView);
6572	}
6573
6574
6575	static int dxEnsureRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId viewId, DXVIEW **ppResult)
6576	{
6577	ASSERT_GUEST_RETURN(viewId < pDXContext->cot.cRTView, VERR_INVALID_PARAMETER);
6578
6579	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paRenderTargetView[viewId];
6580	if (!pDXView->u.pView)
6581	{
6582	SVGACOTableDXRTViewEntry const *pEntry = &pDXContext->cot.paRTView[viewId];
6583	int rc = dxCreateRenderTargetView(pThisCC, pDXContext, viewId, pEntry);
6584	AssertRCReturn(rc, rc);
6585	}
6586	*ppResult = pDXView;
6587	return VINF_SUCCESS;
6588	}
6589
6590
6591	static int dxCreateDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, SVGACOTableDXDSViewEntry const *pEntry)
6592	{
6593	PVMSVGA3DSURFACE pSurface;
6594	ID3D11Resource *pResource;
6595	int rc = dxEnsureResource(pThisCC, pDXContext, pEntry->sid, &pSurface, &pResource);
6596	AssertRCReturn(rc, rc);
6597
6598	DXVIEW *pView = &pDXContext->pBackendDXContext->paDepthStencilView[depthStencilViewId];
6599	Assert(pView->u.pView == NULL);
6600
6601	ID3D11DepthStencilView *pDepthStencilView;
6602	HRESULT hr = dxDepthStencilViewCreate(pThisCC, pDXContext, pEntry, pSurface, &pDepthStencilView);
6603	AssertReturn(SUCCEEDED(hr), VERR_INVALID_STATE);
6604
6605	return dxViewInit(pView, pSurface, pDXContext, depthStencilViewId, VMSVGA3D_VIEWTYPE_DEPTHSTENCIL, pDepthStencilView);
6606	}
6607
6608
6609	static int dxEnsureDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId viewId, DXVIEW **ppResult)
6610	{
6611	ASSERT_GUEST_RETURN(viewId < pDXContext->cot.cDSView, VERR_INVALID_PARAMETER);
6612
6613	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paDepthStencilView[viewId];
6614	if (!pDXView->u.pView)
6615	{
6616	SVGACOTableDXDSViewEntry const *pEntry = &pDXContext->cot.paDSView[viewId];
6617	int rc = dxCreateDepthStencilView(pThisCC, pDXContext, viewId, pEntry);
6618	AssertRCReturn(rc, rc);
6619	}
6620	*ppResult = pDXView;
6621	return VINF_SUCCESS;
6622	}
6623
6624
6625	static int dxCreateShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId, SVGACOTableDXSRViewEntry const *pEntry)
6626	{
6627	PVMSVGA3DSURFACE pSurface;
6628	ID3D11Resource *pResource;
6629	int rc = dxEnsureResource(pThisCC, pDXContext, pEntry->sid, &pSurface, &pResource);
6630	AssertRCReturn(rc, rc);
6631
6632	DXVIEW *pView = &pDXContext->pBackendDXContext->paShaderResourceView[shaderResourceViewId];
6633	Assert(pView->u.pView == NULL);
6634
6635	ID3D11ShaderResourceView *pShaderResourceView;
6636	HRESULT hr = dxShaderResourceViewCreate(pThisCC, pDXContext, pEntry, pSurface, &pShaderResourceView);
6637	AssertReturn(SUCCEEDED(hr), VERR_INVALID_STATE);
6638
6639	return dxViewInit(pView, pSurface, pDXContext, shaderResourceViewId, VMSVGA3D_VIEWTYPE_SHADERRESOURCE, pShaderResourceView);
6640	}
6641
6642
6643	static int dxEnsureShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId viewId, DXVIEW **ppResult)
6644	{
6645	ASSERT_GUEST_RETURN(viewId < pDXContext->cot.cSRView, VERR_INVALID_PARAMETER);
6646
6647	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paShaderResourceView[viewId];
6648	if (!pDXView->u.pView)
6649	{
6650	SVGACOTableDXSRViewEntry const *pEntry = &pDXContext->cot.paSRView[viewId];
6651	int rc = dxCreateShaderResourceView(pThisCC, pDXContext, viewId, pEntry);
6652	AssertRCReturn(rc, rc);
6653	}
6654	*ppResult = pDXView;
6655	return VINF_SUCCESS;
6656	}
6657
6658
6659	static int dxCreateUnorderedAccessView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId uaViewId, SVGACOTableDXUAViewEntry const *pEntry)
6660	{
6661	PVMSVGA3DSURFACE pSurface;
6662	ID3D11Resource *pResource;
6663	int rc = dxEnsureResource(pThisCC, pDXContext, pEntry->sid, &pSurface, &pResource);
6664	AssertRCReturn(rc, rc);
6665
6666	DXVIEW *pView = &pDXContext->pBackendDXContext->paUnorderedAccessView[uaViewId];
6667	Assert(pView->u.pView == NULL);
6668
6669	ID3D11UnorderedAccessView *pUnorderedAccessView;
6670	HRESULT hr = dxUnorderedAccessViewCreate(pThisCC, pDXContext, pEntry, pSurface, &pUnorderedAccessView);
6671	AssertReturn(SUCCEEDED(hr), VERR_INVALID_STATE);
6672
6673	return dxViewInit(pView, pSurface, pDXContext, uaViewId, VMSVGA3D_VIEWTYPE_UNORDEREDACCESS, pUnorderedAccessView);
6674	}
6675
6676
6677	static int dxEnsureUnorderedAccessView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId viewId, DXVIEW **ppResult)
6678	{
6679	ASSERT_GUEST_RETURN(viewId < pDXContext->cot.cUAView, VERR_INVALID_PARAMETER);
6680
6681	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paUnorderedAccessView[viewId];
6682	if (!pDXView->u.pView)
6683	{
6684	SVGACOTableDXUAViewEntry const *pEntry = &pDXContext->cot.paUAView[viewId];
6685	int rc = dxCreateUnorderedAccessView(pThisCC, pDXContext, viewId, pEntry);
6686	AssertRCReturn(rc, rc);
6687	}
6688	*ppResult = pDXView;
6689	return VINF_SUCCESS;
6690	}
6691
6692
6693	static void dxSetupPipeline(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6694	{
6695	/* Make sure that any draw operations on shader resource views have finished. */
6696	AssertCompile(RT_ELEMENTS(pDXContext->svgaDXContext.shaderState) == SVGA3D_NUM_SHADERTYPE);
6697	AssertCompile(RT_ELEMENTS(pDXContext->svgaDXContext.shaderState[0].shaderResources) == SVGA3D_DX_MAX_SRVIEWS);
6698
6699	int rc;
6700
6701	/* Unbind render target views because they mught be (re-)used as shader resource views. */
6702	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
6703	pDXDevice->pImmediateContext->OMSetRenderTargetsAndUnorderedAccessViews(0, NULL, NULL, 0, 0, NULL, NULL);
6704	for (unsigned i = 0; i < SVGA3D_DX11_1_MAX_UAVIEWS; ++i)
6705	{
6706	ID3D11UnorderedAccessView *pNullUA = 0;
6707	pDXDevice->pImmediateContext->CSSetUnorderedAccessViews(i, 1, &pNullUA, NULL);
6708	}
6709
6710	dxSetConstantBuffers(pThisCC, pDXContext);
6711	dxSetVertexBuffers(pThisCC, pDXContext);
6712	dxSetIndexBuffer(pThisCC, pDXContext);
6713
6714	/*
6715	* Shader resources
6716	*/
6717
6718	/* Make sure that the shader resource views exist. */
6719	for (uint32_t idxShaderState = 0; idxShaderState < SVGA3D_NUM_SHADERTYPE; ++idxShaderState)
6720	{
6721	for (uint32_t idxSR = 0; idxSR < SVGA3D_DX_MAX_SRVIEWS; ++idxSR)
6722	{
6723	SVGA3dShaderResourceViewId const shaderResourceViewId = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderResources[idxSR];
6724	if (shaderResourceViewId != SVGA3D_INVALID_ID)
6725	{
6726	DXVIEW *pDXView;
6727	rc = dxEnsureShaderResourceView(pThisCC, pDXContext, shaderResourceViewId, &pDXView);
6728	AssertContinue(RT_SUCCESS(rc));
6729
6730	#ifdef LOG_ENABLED
6731	SVGACOTableDXSRViewEntry const *pSRViewEntry = &pDXContext->cot.paSRView[shaderResourceViewId];
6732	PVMSVGA3DSURFACE pSurface = NULL;
6733	vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pDXView->sid, &pSurface);
6734	LogFunc(("srv[%d][%d] sid = %u, srvid = %u, format = %s(%d), %dx%d\n",
6735	idxShaderState, idxSR, pDXView->sid, shaderResourceViewId, vmsvgaLookupEnum((int)pSRViewEntry->format, &g_SVGA3dSurfaceFormat2String), pSRViewEntry->format,
6736	pSurface->paMipmapLevels[0].cBlocksX * pSurface->cxBlock, pSurface->paMipmapLevels[0].cBlocksY * pSurface->cyBlock));
6737	#endif
6738
6739	#ifdef DUMP_BITMAPS
6740	SVGA3dSurfaceImageId image;
6741	image.sid = pDXView->sid;
6742	image.face = 0;
6743	image.mipmap = 0;
6744	VMSVGA3D_MAPPED_SURFACE map;
6745	int rc2 = vmsvga3dSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
6746	if (RT_SUCCESS(rc2))
6747	{
6748	vmsvga3dMapWriteBmpFile(&map, "sr-");
6749	vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
6750	}
6751	else
6752	LogFunc(("Map failed %Rrc\n", rc));
6753	#endif
6754	}
6755	}
6756
6757	dxSetShaderResources(pThisCC, pDXContext, (SVGA3dShaderType)(idxShaderState + SVGA3D_SHADERTYPE_MIN));
6758	}
6759
6760	/*
6761	* Compute shader unordered access views
6762	*/
6763
6764	for (uint32_t idxUA = 0; idxUA < SVGA3D_DX11_1_MAX_UAVIEWS; ++idxUA)
6765	{
6766	SVGA3dUAViewId const viewId = pDXContext->svgaDXContext.csuaViewIds[idxUA];
6767	if (viewId != SVGA3D_INVALID_ID)
6768	{
6769	DXVIEW *pDXView;
6770	rc = dxEnsureUnorderedAccessView(pThisCC, pDXContext, viewId, &pDXView);
6771	AssertContinue(RT_SUCCESS(rc));
6772
6773	#ifdef LOG_ENABLED
6774	SVGACOTableDXUAViewEntry const *pUAViewEntry = &pDXContext->cot.paUAView[viewId];
6775	LogFunc(("csuav[%d] sid = %u, uaid = %u, format = %s(%d)\n", idxUA, pDXView->sid, viewId, vmsvgaLookupEnum((int)pUAViewEntry->format, &g_SVGA3dSurfaceFormat2String), pUAViewEntry->format));
6776	#endif
6777	}
6778	}
6779
6780	/* Set views. */
6781	rc = dxSetCSUnorderedAccessViews(pThisCC, pDXContext);
6782	AssertRC(rc);
6783
6784	/*
6785	* Render targets and unordered access views.
6786	*/
6787
6788	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
6789	AssertReturnVoid(pDevice->pDevice);
6790
6791	/* Make sure that the render target views exist. */
6792	if (pDXContext->svgaDXContext.renderState.depthStencilViewId != SVGA3D_INVALID_ID)
6793	{
6794	uint32_t const viewId = pDXContext->svgaDXContext.renderState.depthStencilViewId;
6795
6796	DXVIEW *pDXView;
6797	rc = dxEnsureDepthStencilView(pThisCC, pDXContext, viewId, &pDXView);
6798	AssertRC(rc);
6799
6800	#ifdef LOG_ENABLED
6801	SVGACOTableDXDSViewEntry const *pDSViewEntry = &pDXContext->cot.paDSView[viewId];
6802	LogFunc(("dsv sid = %u, dsvid = %u, format = %s(%d)\n", pDXView->sid, viewId, vmsvgaLookupEnum((int)pDSViewEntry->format, &g_SVGA3dSurfaceFormat2String), pDSViewEntry->format));
6803	#endif
6804	}
6805
6806	for (uint32_t i = 0; i < SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS; ++i)
6807	{
6808	uint32_t const viewId = pDXContext->svgaDXContext.renderState.renderTargetViewIds[i];
6809	if (viewId != SVGA3D_INVALID_ID)
6810	{
6811	DXVIEW *pDXView;
6812	rc = dxEnsureRenderTargetView(pThisCC, pDXContext, viewId, &pDXView);
6813	AssertContinue(RT_SUCCESS(rc));
6814
6815	#ifdef LOG_ENABLED
6816	SVGACOTableDXRTViewEntry const *pRTViewEntry = &pDXContext->cot.paRTView[viewId];
6817	LogFunc(("rtv sid = %u, rtvid = %u, format = %s(%d)\n", pDXView->sid, viewId, vmsvgaLookupEnum((int)pRTViewEntry->format, &g_SVGA3dSurfaceFormat2String), pRTViewEntry->format));
6818	#endif
6819	}
6820	}
6821
6822	for (uint32_t idxUA = 0; idxUA < SVGA3D_DX11_1_MAX_UAVIEWS; ++idxUA)
6823	{
6824	SVGA3dUAViewId const viewId = pDXContext->svgaDXContext.uaViewIds[idxUA];
6825	if (viewId != SVGA3D_INVALID_ID)
6826	{
6827	DXVIEW *pDXView;
6828	rc = dxEnsureUnorderedAccessView(pThisCC, pDXContext, viewId, &pDXView);
6829	AssertContinue(RT_SUCCESS(rc));
6830
6831	#ifdef LOG_ENABLED
6832	SVGACOTableDXUAViewEntry const *pUAViewEntry = &pDXContext->cot.paUAView[viewId];
6833	LogFunc(("uav[%d] sid = %u, uaid = %u, format = %s(%d)\n", idxUA, pDXView->sid, viewId, vmsvgaLookupEnum((int)pUAViewEntry->format, &g_SVGA3dSurfaceFormat2String), pUAViewEntry->format));
6834	#endif
6835	}
6836	}
6837
6838	/* Set render targets. */
6839	rc = dxSetRenderTargets(pThisCC, pDXContext);
6840	AssertRC(rc);
6841
6842	/*
6843	* Shaders
6844	*/
6845
6846	for (uint32_t idxShaderState = 0; idxShaderState < SVGA3D_NUM_SHADERTYPE; ++idxShaderState)
6847	{
6848	DXSHADER *pDXShader;
6849	SVGA3dShaderType const shaderType = (SVGA3dShaderType)(idxShaderState + SVGA3D_SHADERTYPE_MIN);
6850	SVGA3dShaderId const shaderId = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId;
6851
6852	if (shaderId != SVGA3D_INVALID_ID)
6853	{
6854	pDXShader = &pDXContext->pBackendDXContext->paShader[shaderId];
6855	if (pDXShader->pShader == NULL)
6856	{
6857	/* Create a new shader. */
6858
6859	/* Apply resource types to a pixel shader. */
6860	if (shaderType == SVGA3D_SHADERTYPE_PS) /* Others too? */
6861	{
6862	VGPU10_RESOURCE_DIMENSION aResourceDimension[SVGA3D_DX_MAX_SRVIEWS];
6863	RT_ZERO(aResourceDimension);
6864	VGPU10_RESOURCE_RETURN_TYPE aResourceReturnType[SVGA3D_DX_MAX_SRVIEWS];
6865	RT_ZERO(aResourceReturnType);
6866	uint32_t cResources = 0;
6867
6868	for (uint32_t idxSR = 0; idxSR < SVGA3D_DX_MAX_SRVIEWS; ++idxSR)
6869	{
6870	SVGA3dShaderResourceViewId const shaderResourceViewId = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderResources[idxSR];
6871	if (shaderResourceViewId != SVGA3D_INVALID_ID)
6872	{
6873	ASSERT_GUEST_CONTINUE(shaderResourceViewId < pDXContext->cot.cSRView);
6874	SVGACOTableDXSRViewEntry const *pSRViewEntry = &pDXContext->cot.paSRView[shaderResourceViewId];
6875
6876	PVMSVGA3DSURFACE pSurface;
6877	rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pSRViewEntry->sid, &pSurface);
6878	AssertRCReturnVoid(rc);
6879
6880	aResourceReturnType[idxSR] = DXShaderResourceReturnTypeFromFormat(pSRViewEntry->format);
6881
6882	switch (pSRViewEntry->resourceDimension)
6883	{
6884	case SVGA3D_RESOURCE_BUFFEREX:
6885	case SVGA3D_RESOURCE_BUFFER:
6886	aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_BUFFER;
6887	break;
6888	case SVGA3D_RESOURCE_TEXTURE1D:
6889	if (pSurface->surfaceDesc.numArrayElements <= 1)
6890	aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURE1D;
6891	else
6892	aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURE1DARRAY;
6893	break;
6894	case SVGA3D_RESOURCE_TEXTURE2D:
6895	if (pSurface->surfaceDesc.numArrayElements <= 1)
6896	aResourceDimension[idxSR] = pSurface->surfaceDesc.multisampleCount > 1
6897	? VGPU10_RESOURCE_DIMENSION_TEXTURE2DMS
6898	: VGPU10_RESOURCE_DIMENSION_TEXTURE2D;
6899	else
6900	aResourceDimension[idxSR] = pSurface->surfaceDesc.multisampleCount > 1
6901	? VGPU10_RESOURCE_DIMENSION_TEXTURE2DMSARRAY
6902	: VGPU10_RESOURCE_DIMENSION_TEXTURE2DARRAY;
6903	break;
6904	case SVGA3D_RESOURCE_TEXTURE3D:
6905	aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURE3D;
6906	break;
6907	case SVGA3D_RESOURCE_TEXTURECUBE:
6908	if (pSurface->surfaceDesc.numArrayElements <= 6)
6909	aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURECUBE;
6910	else
6911	aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURECUBEARRAY;
6912	break;
6913	default:
6914	ASSERT_GUEST_FAILED();
6915	aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURE2D;
6916	}
6917
6918	cResources = idxSR + 1;
6919
6920	/* Update componentType of the pixel shader output signature to correspond to the bound resources. */
6921	if (idxSR < pDXShader->shaderInfo.cOutputSignature)
6922	{
6923	SVGA3dDXSignatureEntry *pSignatureEntry = &pDXShader->shaderInfo.aOutputSignature[idxSR];
6924	pSignatureEntry->componentType = DXShaderComponentTypeFromFormat(pSRViewEntry->format);
6925	}
6926	}
6927	}
6928
6929	rc = DXShaderUpdateResources(&pDXShader->shaderInfo, aResourceDimension, aResourceReturnType, cResources);
6930	AssertRC(rc); /* Ignore rc because the shader will most likely work anyway. */
6931	}
6932
6933	if (shaderType == SVGA3D_SHADERTYPE_VS)
6934	{
6935	/* Update componentType of the vertex shader input signature to correspond to the input declaration. */
6936	vboxDXUpdateVSInputSignature(pDXContext, pDXShader);
6937	}
6938
6939	vboxDXMatchShaderSignatures(pThisCC, pDXContext, pDXShader);
6940
6941	rc = DXShaderCreateDXBC(&pDXShader->shaderInfo, &pDXShader->pvDXBC, &pDXShader->cbDXBC);
6942	if (RT_SUCCESS(rc))
6943	{
6944	#ifdef LOG_ENABLED
6945	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6946	if (pBackend->pfnD3DDisassemble && LogIs6Enabled())
6947	{
6948	ID3D10Blob *pBlob = 0;
6949	HRESULT hr2 = pBackend->pfnD3DDisassemble(pDXShader->pvDXBC, pDXShader->cbDXBC, 0, NULL, &pBlob);
6950	if (SUCCEEDED(hr2) && pBlob && pBlob->GetBufferSize())
6951	Log6(("%s\n", pBlob->GetBufferPointer()));
6952	else
6953	AssertFailed();
6954	D3D_RELEASE(pBlob);
6955	}
6956	LogFunc(("Shader: set cid=%u shid=%u type=%d, GuestSignatures %d\n", pDXContext->cid, shaderId, pDXShader->enmShaderType, pDXShader->shaderInfo.fGuestSignatures));
6957	#endif
6958
6959	HRESULT hr = dxShaderCreate(pThisCC, pDXContext, pDXShader);
6960	if (FAILED(hr))
6961	rc = VERR_INVALID_STATE;
6962	}
6963	}
6964
6965	LogFunc(("Shader: cid=%u shid=%u type=%d, GuestSignatures %d, %Rrc\n", pDXContext->cid, shaderId, pDXShader->enmShaderType, pDXShader->shaderInfo.fGuestSignatures, rc));
6966	}
6967	else
6968	pDXShader = NULL;
6969
6970	if (RT_SUCCESS(rc))
6971	dxShaderSet(pThisCC, pDXContext, shaderType, pDXShader);
6972
6973	AssertRC(rc);
6974	}
6975
6976	/*
6977	* InputLayout
6978	*/
6979	SVGA3dElementLayoutId const elementLayoutId = pDXContext->svgaDXContext.inputAssembly.layoutId;
6980	ID3D11InputLayout *pInputLayout = NULL;
6981	if (elementLayoutId != SVGA3D_INVALID_ID)
6982	{
6983	DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
6984	if (!pDXElementLayout->pElementLayout)
6985	{
6986	uint32_t const idxShaderState = SVGA3D_SHADERTYPE_VS - SVGA3D_SHADERTYPE_MIN;
6987	uint32_t const shid = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId;
6988	if (shid < pDXContext->pBackendDXContext->cShader)
6989	{
6990	DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[shid];
6991	if (pDXShader->pvDXBC)
6992	dxCreateInputLayout(pThisCC, pDXContext, elementLayoutId, pDXShader);
6993	else
6994	LogRelMax(16, ("VMSVGA: DX shader bytecode is not available in DXSetInputLayout: shid = %u\n", shid));
6995	}
6996	else
6997	LogRelMax(16, ("VMSVGA: DX shader is not set in DXSetInputLayout: shid = 0x%x\n", shid));
6998	}
6999
7000	pInputLayout = pDXElementLayout->pElementLayout;
7001
7002	LogFunc(("Input layout id %u\n", elementLayoutId));
7003	}
7004
7005	pDevice->pImmediateContext->IASetInputLayout(pInputLayout);
7006
7007	LogFunc(("Topology %u\n", pDXContext->svgaDXContext.inputAssembly.topology));
7008	LogFunc(("Blend id %u\n", pDXContext->svgaDXContext.renderState.blendStateId));
7009	}
7010
7011
7012	static DECLCALLBACK(int) vmsvga3dBackDXDraw(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t vertexCount, uint32_t startVertexLocation)
7013	{
7014	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7015	RT_NOREF(pBackend);
7016
7017	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7018	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7019
7020	dxSetupPipeline(pThisCC, pDXContext);
7021
7022	#ifdef LOG_ENABLED
7023	if (LogIs8Enabled())
7024	dxDbgDumpVertices_Draw(pThisCC, pDXContext, vertexCount, startVertexLocation);
7025	#endif
7026
7027	if (pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN)
7028	pDevice->pImmediateContext->Draw(vertexCount, startVertexLocation);
7029	else
7030	{
7031	/*
7032	* Emulate SVGA3D_PRIMITIVE_TRIANGLEFAN using an indexed draw of a triangle list.
7033	*/
7034
7035	/* Make sure that 16 bit indices are enough. */
7036	if (vertexCount > 65535)
7037	{
7038	LogRelMax(1, ("VMSVGA: ignore Draw(TRIANGLEFAN, %u)\n", vertexCount));
7039	return VERR_NOT_SUPPORTED;
7040	}
7041
7042	/* Generate indices. */
7043	UINT const IndexCount = 3 * (vertexCount - 2); /* 3_per_triangle * num_triangles */
7044	UINT const cbAlloc = IndexCount * sizeof(USHORT);
7045	USHORT paIndices = (USHORT )RTMemAlloc(cbAlloc);
7046	AssertReturn(paIndices, VERR_NO_MEMORY);
7047	USHORT iVertex = 1;
7048	for (UINT i = 0; i < IndexCount; i+= 3)
7049	{
7050	paIndices[i] = 0;
7051	paIndices[i + 1] = iVertex;
7052	++iVertex;
7053	paIndices[i + 2] = iVertex;
7054	}
7055
7056	D3D11_SUBRESOURCE_DATA InitData;
7057	InitData.pSysMem = paIndices;
7058	InitData.SysMemPitch = cbAlloc;
7059	InitData.SysMemSlicePitch = cbAlloc;
7060
7061	D3D11_BUFFER_DESC bd;
7062	RT_ZERO(bd);
7063	bd.ByteWidth = cbAlloc;
7064	bd.Usage = D3D11_USAGE_IMMUTABLE;
7065	bd.BindFlags = D3D11_BIND_INDEX_BUFFER;
7066	//bd.CPUAccessFlags = 0;
7067	//bd.MiscFlags = 0;
7068	//bd.StructureByteStride = 0;
7069
7070	ID3D11Buffer *pIndexBuffer = 0;
7071	HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, &InitData, &pIndexBuffer);
7072	Assert(SUCCEEDED(hr));RT_NOREF(hr);
7073
7074	/* Save the current index buffer. */
7075	ID3D11Buffer *pSavedIndexBuffer = 0;
7076	DXGI_FORMAT SavedFormat = DXGI_FORMAT_UNKNOWN;
7077	UINT SavedOffset = 0;
7078	pDevice->pImmediateContext->IAGetIndexBuffer(&pSavedIndexBuffer, &SavedFormat, &SavedOffset);
7079
7080	/* Set up the device state. */
7081	pDevice->pImmediateContext->IASetIndexBuffer(pIndexBuffer, DXGI_FORMAT_R16_UINT, 0);
7082	pDevice->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST);
7083
7084	UINT const StartIndexLocation = 0;
7085	INT const BaseVertexLocation = startVertexLocation;
7086	pDevice->pImmediateContext->DrawIndexed(IndexCount, StartIndexLocation, BaseVertexLocation);
7087
7088	/* Restore the device state. */
7089	pDevice->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP);
7090	pDevice->pImmediateContext->IASetIndexBuffer(pSavedIndexBuffer, SavedFormat, SavedOffset);
7091	D3D_RELEASE(pSavedIndexBuffer);
7092
7093	/* Cleanup. */
7094	D3D_RELEASE(pIndexBuffer);
7095	RTMemFree(paIndices);
7096	}
7097
7098	#ifdef DX_FLUSH_AFTER_DRAW
7099	dxDeviceFlush(pDevice);
7100	#endif
7101
7102	return VINF_SUCCESS;
7103	}
7104
7105	static int dxReadBuffer(DXDEVICE pDevice, ID3D11Buffer pBuffer, UINT Offset, UINT Bytes, void *ppvData, uint32_t pcbData)
7106	{
7107	D3D11_BUFFER_DESC desc;
7108	RT_ZERO(desc);
7109	pBuffer->GetDesc(&desc);
7110
7111	AssertReturn( Offset < desc.ByteWidth
7112	&& Bytes <= desc.ByteWidth - Offset, VERR_INVALID_STATE);
7113
7114	void *pvData = RTMemAlloc(Bytes);
7115	if (!pvData)
7116	return VERR_NO_MEMORY;
7117
7118	*ppvData = pvData;
7119	*pcbData = Bytes;
7120
7121	#ifdef DX_COMMON_STAGING_BUFFER
7122	int rc = dxStagingBufferRealloc(pDevice, Bytes);
7123	if (RT_SUCCESS(rc))
7124	{
7125	/* Copy 'Bytes' bytes starting at 'Offset' from the buffer to the start of staging buffer. */
7126	ID3D11Resource *pDstResource = pDevice->pStagingBuffer;
7127	UINT DstSubresource = 0;
7128	UINT DstX = 0;
7129	UINT DstY = 0;
7130	UINT DstZ = 0;
7131	ID3D11Resource *pSrcResource = pBuffer;
7132	UINT SrcSubresource = 0;
7133	D3D11_BOX SrcBox;
7134	SrcBox.left = Offset;
7135	SrcBox.top = 0;
7136	SrcBox.front = 0;
7137	SrcBox.right = Offset + Bytes;
7138	SrcBox.bottom = 1;
7139	SrcBox.back = 1;
7140	pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
7141	pSrcResource, SrcSubresource, &SrcBox);
7142
7143	D3D11_MAPPED_SUBRESOURCE mappedResource;
7144	UINT const Subresource = 0; /* Buffers have only one subresource. */
7145	HRESULT hr = pDevice->pImmediateContext->Map(pDevice->pStagingBuffer, Subresource,
7146	D3D11_MAP_READ, /* MapFlags = */ 0, &mappedResource);
7147	if (SUCCEEDED(hr))
7148	{
7149	memcpy(pvData, mappedResource.pData, Bytes);
7150
7151	/* Unmap the staging buffer. */
7152	pDevice->pImmediateContext->Unmap(pDevice->pStagingBuffer, Subresource);
7153	}
7154	else
7155	AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
7156
7157	}
7158	#else
7159	uint32_t const cbAlloc = Bytes;
7160
7161	D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
7162	D3D11_BUFFER_DESC bd;
7163	RT_ZERO(bd);
7164	bd.ByteWidth = Bytes;
7165	bd.Usage = D3D11_USAGE_STAGING;
7166	//bd.BindFlags = 0; /* No bind flags are allowed for staging resources. */
7167	bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE \| D3D11_CPU_ACCESS_READ;
7168
7169	int rc = VINF_SUCCESS;
7170	ID3D11Buffer *pStagingBuffer;
7171	HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pStagingBuffer);
7172	if (SUCCEEDED(hr))
7173	{
7174	/* Copy from the buffer to the staging buffer. */
7175	ID3D11Resource *pDstResource = pStagingBuffer;
7176	UINT DstSubresource = 0;
7177	UINT DstX = 0;
7178	UINT DstY = 0;
7179	UINT DstZ = 0;
7180	ID3D11Resource *pSrcResource = pBuffer;
7181	UINT SrcSubresource = 0;
7182	D3D11_BOX SrcBox;
7183	SrcBox.left = Offset;
7184	SrcBox.top = 0;
7185	SrcBox.front = 0;
7186	SrcBox.right = Offset + Bytes;
7187	SrcBox.bottom = 1;
7188	SrcBox.back = 1;
7189	pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
7190	pSrcResource, SrcSubresource, &SrcBox);
7191
7192	D3D11_MAPPED_SUBRESOURCE mappedResource;
7193	UINT const Subresource = 0; /* Buffers have only one subresource. */
7194	hr = pDevice->pImmediateContext->Map(pStagingBuffer, Subresource,
7195	D3D11_MAP_READ, /* MapFlags = */ 0, &mappedResource);
7196	if (SUCCEEDED(hr))
7197	{
7198	memcpy(pvData, mappedResource.pData, Bytes);
7199
7200	/* Unmap the staging buffer. */
7201	pDevice->pImmediateContext->Unmap(pStagingBuffer, Subresource);
7202	}
7203	else
7204	AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
7205
7206	D3D_RELEASE(pStagingBuffer);
7207	}
7208	else
7209	{
7210	rc = VERR_NO_MEMORY;
7211	}
7212	#endif
7213
7214	if (RT_FAILURE(rc))
7215	{
7216	RTMemFree(*ppvData);
7217	*ppvData = NULL;
7218	*pcbData = 0;
7219	}
7220
7221	return rc;
7222	}
7223
7224
7225	static int dxDrawIndexedTriangleFan(DXDEVICE *pDevice, uint32_t IndexCountTF, uint32_t StartIndexLocationTF, int32_t BaseVertexLocationTF)
7226	{
7227	/*
7228	* Emulate an indexed SVGA3D_PRIMITIVE_TRIANGLEFAN using an indexed draw of triangle list.
7229	*/
7230
7231	/* Make sure that 16 bit indices are enough. */
7232	if (IndexCountTF > 65535)
7233	{
7234	LogRelMax(1, ("VMSVGA: ignore DrawIndexed(TRIANGLEFAN, %u)\n", IndexCountTF));
7235	return VERR_NOT_SUPPORTED;
7236	}
7237
7238	/* Save the current index buffer. */
7239	ID3D11Buffer *pSavedIndexBuffer = 0;
7240	DXGI_FORMAT SavedFormat = DXGI_FORMAT_UNKNOWN;
7241	UINT SavedOffset = 0;
7242	pDevice->pImmediateContext->IAGetIndexBuffer(&pSavedIndexBuffer, &SavedFormat, &SavedOffset);
7243
7244	AssertReturn( SavedFormat == DXGI_FORMAT_R16_UINT
7245	\|\| SavedFormat == DXGI_FORMAT_R32_UINT, VERR_NOT_SUPPORTED);
7246
7247	/* How many bytes are used by triangle fan indices. */
7248	UINT const BytesPerIndexTF = SavedFormat == DXGI_FORMAT_R16_UINT ? 2 : 4;
7249	UINT const BytesTF = BytesPerIndexTF * IndexCountTF;
7250
7251	/* Read the current index buffer content to obtain indices. */
7252	void *pvDataTF;
7253	uint32_t cbDataTF;
7254	int rc = dxReadBuffer(pDevice, pSavedIndexBuffer, StartIndexLocationTF, BytesTF, &pvDataTF, &cbDataTF);
7255	AssertRCReturn(rc, rc);
7256	AssertReturnStmt(cbDataTF >= BytesPerIndexTF, RTMemFree(pvDataTF), VERR_INVALID_STATE);
7257
7258	/* Generate indices for triangle list. */
7259	UINT const IndexCount = 3 * (IndexCountTF - 2); /* 3_per_triangle * num_triangles */
7260	UINT const cbAlloc = IndexCount * sizeof(USHORT);
7261	USHORT paIndices = (USHORT )RTMemAlloc(cbAlloc);
7262	AssertReturnStmt(paIndices, RTMemFree(pvDataTF), VERR_NO_MEMORY);
7263
7264	USHORT iVertex = 1;
7265	if (BytesPerIndexTF == 2)
7266	{
7267	USHORT paIndicesTF = (USHORT )pvDataTF;
7268	for (UINT i = 0; i < IndexCount; i+= 3)
7269	{
7270	paIndices[i] = paIndicesTF[0];
7271	AssertBreakStmt(iVertex < IndexCountTF, rc = VERR_INVALID_STATE);
7272	paIndices[i + 1] = paIndicesTF[iVertex];
7273	++iVertex;
7274	AssertBreakStmt(iVertex < IndexCountTF, rc = VERR_INVALID_STATE);
7275	paIndices[i + 2] = paIndicesTF[iVertex];
7276	}
7277	}
7278	else
7279	{
7280	UINT paIndicesTF = (UINT )pvDataTF;
7281	for (UINT i = 0; i < IndexCount; i+= 3)
7282	{
7283	paIndices[i] = paIndicesTF[0];
7284	AssertBreakStmt(iVertex < IndexCountTF, rc = VERR_INVALID_STATE);
7285	paIndices[i + 1] = paIndicesTF[iVertex];
7286	++iVertex;
7287	AssertBreakStmt(iVertex < IndexCountTF, rc = VERR_INVALID_STATE);
7288	paIndices[i + 2] = paIndicesTF[iVertex];
7289	}
7290	}
7291
7292	D3D11_SUBRESOURCE_DATA InitData;
7293	InitData.pSysMem = paIndices;
7294	InitData.SysMemPitch = cbAlloc;
7295	InitData.SysMemSlicePitch = cbAlloc;
7296
7297	D3D11_BUFFER_DESC bd;
7298	RT_ZERO(bd);
7299	bd.ByteWidth = cbAlloc;
7300	bd.Usage = D3D11_USAGE_IMMUTABLE;
7301	bd.BindFlags = D3D11_BIND_INDEX_BUFFER;
7302	//bd.CPUAccessFlags = 0;
7303	//bd.MiscFlags = 0;
7304	//bd.StructureByteStride = 0;
7305
7306	ID3D11Buffer *pIndexBuffer = 0;
7307	HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, &InitData, &pIndexBuffer);
7308	Assert(SUCCEEDED(hr));RT_NOREF(hr);
7309
7310	/* Set up the device state. */
7311	pDevice->pImmediateContext->IASetIndexBuffer(pIndexBuffer, DXGI_FORMAT_R16_UINT, 0);
7312	pDevice->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST);
7313
7314	UINT const StartIndexLocation = 0;
7315	INT const BaseVertexLocation = BaseVertexLocationTF;
7316	pDevice->pImmediateContext->DrawIndexed(IndexCount, StartIndexLocation, BaseVertexLocation);
7317
7318	/* Restore the device state. */
7319	pDevice->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP);
7320	pDevice->pImmediateContext->IASetIndexBuffer(pSavedIndexBuffer, SavedFormat, SavedOffset);
7321	D3D_RELEASE(pSavedIndexBuffer);
7322
7323	/* Cleanup. */
7324	D3D_RELEASE(pIndexBuffer);
7325	RTMemFree(paIndices);
7326	RTMemFree(pvDataTF);
7327
7328	return VINF_SUCCESS;
7329	}
7330
7331
7332	static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexed(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t indexCount, uint32_t startIndexLocation, int32_t baseVertexLocation)
7333	{
7334	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7335	RT_NOREF(pBackend);
7336
7337	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7338	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7339
7340	dxSetupPipeline(pThisCC, pDXContext);
7341
7342	#ifdef LOG_ENABLED
7343	if (LogIs8Enabled())
7344	dxDbgDumpVertices_DrawIndexed(pThisCC, pDXContext, indexCount, startIndexLocation, baseVertexLocation);
7345	#endif
7346
7347	if (pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN)
7348	pDevice->pImmediateContext->DrawIndexed(indexCount, startIndexLocation, baseVertexLocation);
7349	else
7350	{
7351	dxDrawIndexedTriangleFan(pDevice, indexCount, startIndexLocation, baseVertexLocation);
7352	}
7353
7354	#ifdef DX_FLUSH_AFTER_DRAW
7355	dxDeviceFlush(pDevice);
7356	#endif
7357
7358	return VINF_SUCCESS;
7359	}
7360
7361
7362	static DECLCALLBACK(int) vmsvga3dBackDXDrawInstanced(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
7363	uint32_t vertexCountPerInstance, uint32_t instanceCount, uint32_t startVertexLocation, uint32_t startInstanceLocation)
7364	{
7365	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7366	RT_NOREF(pBackend);
7367
7368	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7369	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7370
7371	dxSetupPipeline(pThisCC, pDXContext);
7372
7373	#ifdef LOG_ENABLED
7374	if (LogIs8Enabled())
7375	dxDbgDumpVertices_DrawInstanced(pThisCC, pDXContext, vertexCountPerInstance, instanceCount, startVertexLocation, startInstanceLocation);
7376	#endif
7377
7378	Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
7379
7380	pDevice->pImmediateContext->DrawInstanced(vertexCountPerInstance, instanceCount, startVertexLocation, startInstanceLocation);
7381
7382	#ifdef DX_FLUSH_AFTER_DRAW
7383	dxDeviceFlush(pDevice);
7384	#endif
7385
7386	return VINF_SUCCESS;
7387	}
7388
7389
7390	static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexedInstanced(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
7391	uint32_t indexCountPerInstance, uint32_t instanceCount, uint32_t startIndexLocation, int32_t baseVertexLocation, uint32_t startInstanceLocation)
7392	{
7393	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7394	RT_NOREF(pBackend);
7395
7396	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7397	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7398
7399	dxSetupPipeline(pThisCC, pDXContext);
7400
7401	#ifdef LOG_ENABLED
7402	if (LogIs8Enabled())
7403	dxDbgDumpVertices_DrawIndexedInstanced(pThisCC, pDXContext, indexCountPerInstance, instanceCount, startIndexLocation, baseVertexLocation, startInstanceLocation);
7404	#endif
7405
7406	Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
7407
7408	pDevice->pImmediateContext->DrawIndexedInstanced(indexCountPerInstance, instanceCount, startIndexLocation, baseVertexLocation, startInstanceLocation);
7409
7410	#ifdef DX_FLUSH_AFTER_DRAW
7411	dxDeviceFlush(pDevice);
7412	#endif
7413
7414	return VINF_SUCCESS;
7415	}
7416
7417
7418	static DECLCALLBACK(int) vmsvga3dBackDXDrawAuto(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
7419	{
7420	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7421	RT_NOREF(pBackend);
7422
7423	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7424	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7425
7426	dxSetupPipeline(pThisCC, pDXContext);
7427
7428	Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
7429
7430	pDevice->pImmediateContext->DrawAuto();
7431
7432	#ifdef DX_FLUSH_AFTER_DRAW
7433	dxDeviceFlush(pDevice);
7434	#endif
7435
7436	return VINF_SUCCESS;
7437	}
7438
7439
7440	static DECLCALLBACK(int) vmsvga3dBackDXSetInputLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId)
7441	{
7442	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7443	RT_NOREF(pBackend);
7444
7445	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7446	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7447
7448	RT_NOREF(elementLayoutId);
7449
7450	return VINF_SUCCESS;
7451	}
7452
7453
7454	static DECLCALLBACK(int) vmsvga3dBackDXSetVertexBuffers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startBuffer, uint32_t cVertexBuffer, SVGA3dVertexBuffer const *paVertexBuffer)
7455	{
7456	/* Will be set in setupPipeline. */
7457	RT_NOREF(pThisCC, pDXContext, startBuffer, cVertexBuffer, paVertexBuffer);
7458	return VINF_SUCCESS;
7459	}
7460
7461
7462	static DECLCALLBACK(int) vmsvga3dBackDXSetIndexBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId sid, SVGA3dSurfaceFormat format, uint32_t offset)
7463	{
7464	/* Will be set in setupPipeline. */
7465	RT_NOREF(pThisCC, pDXContext, sid, format, offset);
7466	return VINF_SUCCESS;
7467	}
7468
7469	static D3D11_PRIMITIVE_TOPOLOGY dxTopology(SVGA3dPrimitiveType primitiveType)
7470	{
7471	ASSERT_GUEST_RETURN(primitiveType < SVGA3D_PRIMITIVE_MAX, D3D11_PRIMITIVE_TOPOLOGY_UNDEFINED);
7472
7473	static D3D11_PRIMITIVE_TOPOLOGY const aD3D11PrimitiveTopology[SVGA3D_PRIMITIVE_MAX] =
7474	{
7475	D3D11_PRIMITIVE_TOPOLOGY_UNDEFINED,
7476	D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST,
7477	D3D11_PRIMITIVE_TOPOLOGY_POINTLIST,
7478	D3D11_PRIMITIVE_TOPOLOGY_LINELIST,
7479	D3D11_PRIMITIVE_TOPOLOGY_LINESTRIP,
7480	D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP,
7481	D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP, /* SVGA3D_PRIMITIVE_TRIANGLEFAN: No FAN in D3D11. */
7482	D3D11_PRIMITIVE_TOPOLOGY_LINELIST_ADJ,
7483	D3D11_PRIMITIVE_TOPOLOGY_LINESTRIP_ADJ,
7484	D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST_ADJ,
7485	D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP_ADJ,
7486	D3D11_PRIMITIVE_TOPOLOGY_1_CONTROL_POINT_PATCHLIST,
7487	D3D11_PRIMITIVE_TOPOLOGY_2_CONTROL_POINT_PATCHLIST,
7488	D3D11_PRIMITIVE_TOPOLOGY_3_CONTROL_POINT_PATCHLIST,
7489	D3D11_PRIMITIVE_TOPOLOGY_4_CONTROL_POINT_PATCHLIST,
7490	D3D11_PRIMITIVE_TOPOLOGY_5_CONTROL_POINT_PATCHLIST,
7491	D3D11_PRIMITIVE_TOPOLOGY_6_CONTROL_POINT_PATCHLIST,
7492	D3D11_PRIMITIVE_TOPOLOGY_7_CONTROL_POINT_PATCHLIST,
7493	D3D11_PRIMITIVE_TOPOLOGY_8_CONTROL_POINT_PATCHLIST,
7494	D3D11_PRIMITIVE_TOPOLOGY_9_CONTROL_POINT_PATCHLIST,
7495	D3D11_PRIMITIVE_TOPOLOGY_10_CONTROL_POINT_PATCHLIST,
7496	D3D11_PRIMITIVE_TOPOLOGY_11_CONTROL_POINT_PATCHLIST,
7497	D3D11_PRIMITIVE_TOPOLOGY_12_CONTROL_POINT_PATCHLIST,
7498	D3D11_PRIMITIVE_TOPOLOGY_13_CONTROL_POINT_PATCHLIST,
7499	D3D11_PRIMITIVE_TOPOLOGY_14_CONTROL_POINT_PATCHLIST,
7500	D3D11_PRIMITIVE_TOPOLOGY_15_CONTROL_POINT_PATCHLIST,
7501	D3D11_PRIMITIVE_TOPOLOGY_16_CONTROL_POINT_PATCHLIST,
7502	D3D11_PRIMITIVE_TOPOLOGY_17_CONTROL_POINT_PATCHLIST,
7503	D3D11_PRIMITIVE_TOPOLOGY_18_CONTROL_POINT_PATCHLIST,
7504	D3D11_PRIMITIVE_TOPOLOGY_19_CONTROL_POINT_PATCHLIST,
7505	D3D11_PRIMITIVE_TOPOLOGY_20_CONTROL_POINT_PATCHLIST,
7506	D3D11_PRIMITIVE_TOPOLOGY_21_CONTROL_POINT_PATCHLIST,
7507	D3D11_PRIMITIVE_TOPOLOGY_22_CONTROL_POINT_PATCHLIST,
7508	D3D11_PRIMITIVE_TOPOLOGY_23_CONTROL_POINT_PATCHLIST,
7509	D3D11_PRIMITIVE_TOPOLOGY_24_CONTROL_POINT_PATCHLIST,
7510	D3D11_PRIMITIVE_TOPOLOGY_25_CONTROL_POINT_PATCHLIST,
7511	D3D11_PRIMITIVE_TOPOLOGY_26_CONTROL_POINT_PATCHLIST,
7512	D3D11_PRIMITIVE_TOPOLOGY_27_CONTROL_POINT_PATCHLIST,
7513	D3D11_PRIMITIVE_TOPOLOGY_28_CONTROL_POINT_PATCHLIST,
7514	D3D11_PRIMITIVE_TOPOLOGY_29_CONTROL_POINT_PATCHLIST,
7515	D3D11_PRIMITIVE_TOPOLOGY_30_CONTROL_POINT_PATCHLIST,
7516	D3D11_PRIMITIVE_TOPOLOGY_31_CONTROL_POINT_PATCHLIST,
7517	D3D11_PRIMITIVE_TOPOLOGY_32_CONTROL_POINT_PATCHLIST,
7518	};
7519	return aD3D11PrimitiveTopology[primitiveType];
7520	}
7521
7522	static DECLCALLBACK(int) vmsvga3dBackDXSetTopology(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dPrimitiveType topology)
7523	{
7524	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7525	RT_NOREF(pBackend);
7526
7527	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7528	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7529
7530	D3D11_PRIMITIVE_TOPOLOGY const enmTopology = dxTopology(topology);
7531	pDevice->pImmediateContext->IASetPrimitiveTopology(enmTopology);
7532	return VINF_SUCCESS;
7533	}
7534
7535
7536	static int dxSetRenderTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
7537	{
7538	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7539	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7540
7541	UINT UAVStartSlot = 0;
7542	UINT NumUAVs = 0;
7543	ID3D11UnorderedAccessView *apUnorderedAccessViews[SVGA3D_DX11_1_MAX_UAVIEWS];
7544	UINT aUAVInitialCounts[SVGA3D_DX11_1_MAX_UAVIEWS];
7545	for (uint32_t idxUA = 0; idxUA < SVGA3D_DX11_1_MAX_UAVIEWS; ++idxUA)
7546	{
7547	apUnorderedAccessViews[idxUA] = NULL;
7548	aUAVInitialCounts[idxUA] = (UINT)-1;
7549
7550	SVGA3dUAViewId const uaViewId = pDXContext->svgaDXContext.uaViewIds[idxUA];
7551	if (uaViewId != SVGA3D_INVALID_ID)
7552	{
7553	ASSERT_GUEST_CONTINUE(uaViewId < pDXContext->cot.cUAView);
7554
7555	if (NumUAVs == 0)
7556	UAVStartSlot = idxUA;
7557	NumUAVs = idxUA - UAVStartSlot + 1;
7558	apUnorderedAccessViews[idxUA] = pDXContext->pBackendDXContext->paUnorderedAccessView[uaViewId].u.pUnorderedAccessView;
7559
7560	SVGACOTableDXUAViewEntry const *pEntry = &pDXContext->cot.paUAView[uaViewId];
7561	aUAVInitialCounts[idxUA] = pEntry->structureCount;
7562	}
7563	}
7564
7565	UINT NumRTVs = 0;
7566	ID3D11RenderTargetView *apRenderTargetViews[SVGA3D_MAX_RENDER_TARGETS];
7567	RT_ZERO(apRenderTargetViews);
7568	for (uint32_t i = 0; i < pDXContext->cRenderTargets; ++i)
7569	{
7570	SVGA3dRenderTargetViewId const renderTargetViewId = pDXContext->svgaDXContext.renderState.renderTargetViewIds[i];
7571	if (renderTargetViewId != SVGA3D_INVALID_ID)
7572	{
7573	ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->pBackendDXContext->cRenderTargetView, VERR_INVALID_PARAMETER);
7574	apRenderTargetViews[i] = pDXContext->pBackendDXContext->paRenderTargetView[renderTargetViewId].u.pRenderTargetView;
7575	++NumRTVs;
7576	}
7577	}
7578
7579	/* RTVs are followed by UAVs. */
7580	Assert(NumUAVs == 0 \|\| NumRTVs <= pDXContext->svgaDXContext.uavSpliceIndex);
7581
7582	ID3D11DepthStencilView *pDepthStencilView = NULL;
7583	SVGA3dDepthStencilViewId const depthStencilViewId = pDXContext->svgaDXContext.renderState.depthStencilViewId;
7584	if (depthStencilViewId != SVGA_ID_INVALID)
7585	pDepthStencilView = pDXContext->pBackendDXContext->paDepthStencilView[depthStencilViewId].u.pDepthStencilView;
7586
7587	pDevice->pImmediateContext->OMSetRenderTargetsAndUnorderedAccessViews(NumRTVs,
7588	apRenderTargetViews,
7589	pDepthStencilView,
7590	pDXContext->svgaDXContext.uavSpliceIndex,
7591	NumUAVs,
7592	apUnorderedAccessViews,
7593	aUAVInitialCounts);
7594	return VINF_SUCCESS;
7595	}
7596
7597
7598	static DECLCALLBACK(int) vmsvga3dBackDXSetRenderTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, uint32_t cRenderTargetViewId, SVGA3dRenderTargetViewId const *paRenderTargetViewId)
7599	{
7600	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7601	RT_NOREF(pBackend);
7602
7603	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7604	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7605
7606	RT_NOREF(depthStencilViewId, cRenderTargetViewId, paRenderTargetViewId);
7607
7608	return VINF_SUCCESS;
7609	}
7610
7611
7612	static DECLCALLBACK(int) vmsvga3dBackDXSetBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dBlendStateId blendId, float const blendFactor[4], uint32_t sampleMask)
7613	{
7614	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7615	RT_NOREF(pBackend);
7616
7617	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7618	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7619
7620	if (blendId != SVGA3D_INVALID_ID)
7621	{
7622	ID3D11BlendState1 *pBlendState = pDXContext->pBackendDXContext->papBlendState[blendId];
7623	pDevice->pImmediateContext->OMSetBlendState(pBlendState, blendFactor, sampleMask);
7624	}
7625	else
7626	pDevice->pImmediateContext->OMSetBlendState(NULL, NULL, 0);
7627
7628	return VINF_SUCCESS;
7629	}
7630
7631
7632	static DECLCALLBACK(int) vmsvga3dBackDXSetDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, uint32_t stencilRef)
7633	{
7634	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7635	RT_NOREF(pBackend);
7636
7637	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7638	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7639
7640	if (depthStencilId != SVGA3D_INVALID_ID)
7641	{
7642	ID3D11DepthStencilState *pDepthStencilState = pDXContext->pBackendDXContext->papDepthStencilState[depthStencilId];
7643	pDevice->pImmediateContext->OMSetDepthStencilState(pDepthStencilState, stencilRef);
7644	}
7645	else
7646	pDevice->pImmediateContext->OMSetDepthStencilState(NULL, 0);
7647
7648	return VINF_SUCCESS;
7649	}
7650
7651
7652	static DECLCALLBACK(int) vmsvga3dBackDXSetRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId)
7653	{
7654	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7655	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7656	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7657
7658	RT_NOREF(pBackend);
7659
7660	if (rasterizerId != SVGA3D_INVALID_ID)
7661	{
7662	ID3D11RasterizerState1 *pRasterizerState = pDXContext->pBackendDXContext->papRasterizerState[rasterizerId];
7663	pDevice->pImmediateContext->RSSetState(pRasterizerState);
7664	}
7665	else
7666	pDevice->pImmediateContext->RSSetState(NULL);
7667
7668	return VINF_SUCCESS;
7669	}
7670
7671
7672	typedef struct VGPU10QUERYINFO
7673	{
7674	SVGA3dQueryType svgaQueryType;
7675	uint32_t cbDataVMSVGA;
7676	D3D11_QUERY dxQueryType;
7677	uint32_t cbDataD3D11;
7678	} VGPU10QUERYINFO;
7679
7680	static VGPU10QUERYINFO const *dxQueryInfo(SVGA3dQueryType type)
7681	{
7682	static VGPU10QUERYINFO const aQueryInfo[SVGA3D_QUERYTYPE_MAX] =
7683	{
7684	{ SVGA3D_QUERYTYPE_OCCLUSION, sizeof(SVGADXOcclusionQueryResult),
7685	D3D11_QUERY_OCCLUSION, sizeof(UINT64) },
7686	{ SVGA3D_QUERYTYPE_TIMESTAMP, sizeof(SVGADXTimestampQueryResult),
7687	D3D11_QUERY_TIMESTAMP, sizeof(UINT64) },
7688	{ SVGA3D_QUERYTYPE_TIMESTAMPDISJOINT, sizeof(SVGADXTimestampDisjointQueryResult),
7689	D3D11_QUERY_TIMESTAMP_DISJOINT, sizeof(D3D11_QUERY_DATA_TIMESTAMP_DISJOINT) },
7690	{ SVGA3D_QUERYTYPE_PIPELINESTATS, sizeof(SVGADXPipelineStatisticsQueryResult),
7691	D3D11_QUERY_PIPELINE_STATISTICS, sizeof(D3D11_QUERY_DATA_PIPELINE_STATISTICS) },
7692	{ SVGA3D_QUERYTYPE_OCCLUSIONPREDICATE, sizeof(SVGADXOcclusionPredicateQueryResult),
7693	D3D11_QUERY_OCCLUSION_PREDICATE, sizeof(BOOL) },
7694	{ SVGA3D_QUERYTYPE_STREAMOUTPUTSTATS, sizeof(SVGADXStreamOutStatisticsQueryResult),
7695	D3D11_QUERY_SO_STATISTICS, sizeof(D3D11_QUERY_DATA_SO_STATISTICS) },
7696	{ SVGA3D_QUERYTYPE_STREAMOVERFLOWPREDICATE, sizeof(SVGADXStreamOutPredicateQueryResult),
7697	D3D11_QUERY_SO_OVERFLOW_PREDICATE, sizeof(BOOL) },
7698	{ SVGA3D_QUERYTYPE_OCCLUSION64, sizeof(SVGADXOcclusion64QueryResult),
7699	D3D11_QUERY_OCCLUSION, sizeof(UINT64) },
7700	{ SVGA3D_QUERYTYPE_SOSTATS_STREAM0, sizeof(SVGADXStreamOutStatisticsQueryResult),
7701	D3D11_QUERY_SO_STATISTICS_STREAM0, sizeof(D3D11_QUERY_DATA_SO_STATISTICS) },
7702	{ SVGA3D_QUERYTYPE_SOSTATS_STREAM1, sizeof(SVGADXStreamOutStatisticsQueryResult),
7703	D3D11_QUERY_SO_STATISTICS_STREAM1, sizeof(D3D11_QUERY_DATA_SO_STATISTICS) },
7704	{ SVGA3D_QUERYTYPE_SOSTATS_STREAM2, sizeof(SVGADXStreamOutStatisticsQueryResult),
7705	D3D11_QUERY_SO_STATISTICS_STREAM2, sizeof(D3D11_QUERY_DATA_SO_STATISTICS) },
7706	{ SVGA3D_QUERYTYPE_SOSTATS_STREAM3, sizeof(SVGADXStreamOutStatisticsQueryResult),
7707	D3D11_QUERY_SO_STATISTICS_STREAM3, sizeof(D3D11_QUERY_DATA_SO_STATISTICS) },
7708	{ SVGA3D_QUERYTYPE_SOP_STREAM0, sizeof(SVGADXStreamOutPredicateQueryResult),
7709	D3D11_QUERY_SO_OVERFLOW_PREDICATE_STREAM0, sizeof(BOOL) },
7710	{ SVGA3D_QUERYTYPE_SOP_STREAM1, sizeof(SVGADXStreamOutPredicateQueryResult),
7711	D3D11_QUERY_SO_OVERFLOW_PREDICATE_STREAM1, sizeof(BOOL) },
7712	{ SVGA3D_QUERYTYPE_SOP_STREAM2, sizeof(SVGADXStreamOutPredicateQueryResult),
7713	D3D11_QUERY_SO_OVERFLOW_PREDICATE_STREAM2, sizeof(BOOL) },
7714	{ SVGA3D_QUERYTYPE_SOP_STREAM3, sizeof(SVGADXStreamOutPredicateQueryResult),
7715	D3D11_QUERY_SO_OVERFLOW_PREDICATE_STREAM3, sizeof(BOOL) },
7716	};
7717
7718	ASSERT_GUEST_RETURN(type < RT_ELEMENTS(aQueryInfo), NULL);
7719	return &aQueryInfo[type];
7720	}
7721
7722	static int dxDefineQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId, SVGACOTableDXQueryEntry const *pEntry)
7723	{
7724	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7725	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
7726
7727	DXQUERY *pDXQuery = &pDXContext->pBackendDXContext->paQuery[queryId];
7728	VGPU10QUERYINFO const *pQueryInfo = dxQueryInfo((SVGA3dQueryType)pEntry->type);
7729	if (!pQueryInfo)
7730	return VERR_INVALID_PARAMETER;
7731
7732	D3D11_QUERY_DESC desc;
7733	desc.Query = pQueryInfo->dxQueryType;
7734	desc.MiscFlags = 0;
7735	if (pEntry->flags & SVGA3D_DXQUERY_FLAG_PREDICATEHINT)
7736	desc.MiscFlags \|= (UINT)D3D11_QUERY_MISC_PREDICATEHINT;
7737
7738	HRESULT hr = pDXDevice->pDevice->CreateQuery(&desc, &pDXQuery->pQuery);
7739	AssertReturn(SUCCEEDED(hr), VERR_INVALID_STATE);
7740
7741	return VINF_SUCCESS;
7742	}
7743
7744
7745	static int dxDestroyQuery(DXQUERY *pDXQuery)
7746	{
7747	D3D_RELEASE(pDXQuery->pQuery);
7748	return VINF_SUCCESS;
7749	}
7750
7751
7752	static DECLCALLBACK(int) vmsvga3dBackDXDefineQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId, SVGACOTableDXQueryEntry const *pEntry)
7753	{
7754	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7755	RT_NOREF(pBackend);
7756
7757	return dxDefineQuery(pThisCC, pDXContext, queryId, pEntry);
7758	}
7759
7760
7761	static DECLCALLBACK(int) vmsvga3dBackDXDestroyQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId)
7762	{
7763	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7764	RT_NOREF(pBackend);
7765
7766	DXQUERY *pDXQuery = &pDXContext->pBackendDXContext->paQuery[queryId];
7767	dxDestroyQuery(pDXQuery);
7768
7769	return VINF_SUCCESS;
7770	}
7771
7772
7773	/** @todo queryId makes pDXQuery redundant */
7774	static int dxBeginQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId, DXQUERY *pDXQuery)
7775	{
7776	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7777	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
7778
7779	/* Begin is disabled for some queries. */
7780	SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
7781	if (pEntry->type == SVGA3D_QUERYTYPE_TIMESTAMP)
7782	return VINF_SUCCESS;
7783
7784	pDXDevice->pImmediateContext->Begin(pDXQuery->pQuery);
7785	return VINF_SUCCESS;
7786	}
7787
7788
7789	static DECLCALLBACK(int) vmsvga3dBackDXBeginQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId)
7790	{
7791	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7792	RT_NOREF(pBackend);
7793
7794	DXQUERY *pDXQuery = &pDXContext->pBackendDXContext->paQuery[queryId];
7795	int rc = dxBeginQuery(pThisCC, pDXContext, queryId, pDXQuery);
7796	return rc;
7797	}
7798
7799
7800	static int dxGetQueryResult(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId,
7801	SVGADXQueryResultUnion pQueryResult, uint32_t pcbOut)
7802	{
7803	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7804	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
7805
7806	typedef union _DXQUERYRESULT
7807	{
7808	UINT64 occlusion;
7809	UINT64 timestamp;
7810	D3D11_QUERY_DATA_TIMESTAMP_DISJOINT timestampDisjoint;
7811	D3D11_QUERY_DATA_PIPELINE_STATISTICS pipelineStatistics;
7812	BOOL occlusionPredicate;
7813	D3D11_QUERY_DATA_SO_STATISTICS soStatistics;
7814	BOOL soOverflowPredicate;
7815	} DXQUERYRESULT;
7816
7817	DXQUERY *pDXQuery = &pDXContext->pBackendDXContext->paQuery[queryId];
7818	SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
7819	VGPU10QUERYINFO const *pQueryInfo = dxQueryInfo((SVGA3dQueryType)pEntry->type);
7820	if (!pQueryInfo)
7821	return VERR_INVALID_PARAMETER;
7822
7823	DXQUERYRESULT dxQueryResult;
7824	while (pDXDevice->pImmediateContext->GetData(pDXQuery->pQuery, &dxQueryResult, pQueryInfo->cbDataD3D11, 0) != S_OK)
7825	{
7826	RTThreadYield();
7827	}
7828
7829	/* Copy back the result. */
7830	switch (pEntry->type)
7831	{
7832	case SVGA3D_QUERYTYPE_OCCLUSION:
7833	pQueryResult->occ.samplesRendered = (uint32_t)dxQueryResult.occlusion;
7834	break;
7835	case SVGA3D_QUERYTYPE_TIMESTAMP:
7836	pQueryResult->ts.timestamp = dxQueryResult.timestamp;
7837	break;
7838	case SVGA3D_QUERYTYPE_TIMESTAMPDISJOINT:
7839	pQueryResult->tsDisjoint.realFrequency = dxQueryResult.timestampDisjoint.Frequency;
7840	pQueryResult->tsDisjoint.disjoint = dxQueryResult.timestampDisjoint.Disjoint;
7841	break;
7842	case SVGA3D_QUERYTYPE_PIPELINESTATS:
7843	pQueryResult->pipelineStats.inputAssemblyVertices = dxQueryResult.pipelineStatistics.IAVertices;
7844	pQueryResult->pipelineStats.inputAssemblyPrimitives = dxQueryResult.pipelineStatistics.IAPrimitives;
7845	pQueryResult->pipelineStats.vertexShaderInvocations = dxQueryResult.pipelineStatistics.VSInvocations;
7846	pQueryResult->pipelineStats.geometryShaderInvocations = dxQueryResult.pipelineStatistics.GSInvocations;
7847	pQueryResult->pipelineStats.geometryShaderPrimitives = dxQueryResult.pipelineStatistics.GSPrimitives;
7848	pQueryResult->pipelineStats.clipperInvocations = dxQueryResult.pipelineStatistics.CInvocations;
7849	pQueryResult->pipelineStats.clipperPrimitives = dxQueryResult.pipelineStatistics.CPrimitives;
7850	pQueryResult->pipelineStats.pixelShaderInvocations = dxQueryResult.pipelineStatistics.PSInvocations;
7851	pQueryResult->pipelineStats.hullShaderInvocations = dxQueryResult.pipelineStatistics.HSInvocations;
7852	pQueryResult->pipelineStats.domainShaderInvocations = dxQueryResult.pipelineStatistics.DSInvocations;
7853	pQueryResult->pipelineStats.computeShaderInvocations = dxQueryResult.pipelineStatistics.CSInvocations;
7854	break;
7855	case SVGA3D_QUERYTYPE_OCCLUSIONPREDICATE:
7856	pQueryResult->occPred.anySamplesRendered = dxQueryResult.occlusionPredicate;
7857	break;
7858	case SVGA3D_QUERYTYPE_STREAMOUTPUTSTATS:
7859	case SVGA3D_QUERYTYPE_SOSTATS_STREAM0:
7860	case SVGA3D_QUERYTYPE_SOSTATS_STREAM1:
7861	case SVGA3D_QUERYTYPE_SOSTATS_STREAM2:
7862	case SVGA3D_QUERYTYPE_SOSTATS_STREAM3:
7863	pQueryResult->soStats.numPrimitivesWritten = dxQueryResult.soStatistics.NumPrimitivesWritten;
7864	pQueryResult->soStats.numPrimitivesRequired = dxQueryResult.soStatistics.PrimitivesStorageNeeded;
7865	break;
7866	case SVGA3D_QUERYTYPE_STREAMOVERFLOWPREDICATE:
7867	case SVGA3D_QUERYTYPE_SOP_STREAM0:
7868	case SVGA3D_QUERYTYPE_SOP_STREAM1:
7869	case SVGA3D_QUERYTYPE_SOP_STREAM2:
7870	case SVGA3D_QUERYTYPE_SOP_STREAM3:
7871	pQueryResult->soPred.overflowed = dxQueryResult.soOverflowPredicate;
7872	break;
7873	case SVGA3D_QUERYTYPE_OCCLUSION64:
7874	pQueryResult->occ64.samplesRendered = dxQueryResult.occlusion;
7875	break;
7876	}
7877
7878	*pcbOut = pQueryInfo->cbDataVMSVGA;
7879	return VINF_SUCCESS;
7880	}
7881
7882	static int dxEndQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId,
7883	SVGADXQueryResultUnion pQueryResult, uint32_t pcbOut)
7884	{
7885	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7886	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
7887
7888	DXQUERY *pDXQuery = &pDXContext->pBackendDXContext->paQuery[queryId];
7889	pDXDevice->pImmediateContext->End(pDXQuery->pQuery);
7890
7891	/** @todo Consider issuing QueryEnd and getting data later in FIFO thread loop. */
7892	return dxGetQueryResult(pThisCC, pDXContext, queryId, pQueryResult, pcbOut);
7893	}
7894
7895
7896	static DECLCALLBACK(int) vmsvga3dBackDXEndQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
7897	SVGA3dQueryId queryId, SVGADXQueryResultUnion pQueryResult, uint32_t pcbOut)
7898	{
7899	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7900	RT_NOREF(pBackend);
7901
7902	int rc = dxEndQuery(pThisCC, pDXContext, queryId, pQueryResult, pcbOut);
7903	return rc;
7904	}
7905
7906
7907	static DECLCALLBACK(int) vmsvga3dBackDXSetPredication(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId, uint32_t predicateValue)
7908	{
7909	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7910	RT_NOREF(pBackend);
7911
7912	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7913	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
7914
7915	if (queryId != SVGA3D_INVALID_ID)
7916	{
7917	DEBUG_BREAKPOINT_TEST();
7918	DXQUERY *pDXQuery = &pDXContext->pBackendDXContext->paQuery[queryId];
7919	SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
7920
7921	VGPU10QUERYINFO const *pQueryInfo = dxQueryInfo((SVGA3dQueryType)pEntry->type);
7922	if (!pQueryInfo)
7923	return VERR_INVALID_PARAMETER;
7924
7925	D3D_RELEASE(pDXQuery->pQuery);
7926
7927	D3D11_QUERY_DESC desc;
7928	desc.Query = pQueryInfo->dxQueryType;
7929	desc.MiscFlags = 0;
7930	if (pEntry->flags & SVGA3D_DXQUERY_FLAG_PREDICATEHINT)
7931	desc.MiscFlags \|= (UINT)D3D11_QUERY_MISC_PREDICATEHINT;
7932
7933	HRESULT hr = pDXDevice->pDevice->CreatePredicate(&desc, &pDXQuery->pPredicate);
7934	AssertReturn(SUCCEEDED(hr), VERR_INVALID_STATE);
7935
7936	pDXDevice->pImmediateContext->SetPredication(pDXQuery->pPredicate, RT_BOOL(predicateValue));
7937	}
7938	else
7939	pDXDevice->pImmediateContext->SetPredication(NULL, FALSE);
7940
7941	return VINF_SUCCESS;
7942	}
7943
7944
7945	static DECLCALLBACK(int) vmsvga3dBackDXSetSOTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t cSOTarget, SVGA3dSoTarget const *paSoTarget)
7946	{
7947	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7948	RT_NOREF(pBackend);
7949
7950	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
7951	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7952
7953	/* For each paSoTarget[i]:
7954	* If the stream outout buffer object does not exist then create it.
7955	* If the surface has been updated by the guest then update the buffer object.
7956	* Use SOSetTargets to set the buffers.
7957	*/
7958
7959	ID3D11Buffer *paResource[SVGA3D_DX_MAX_SOTARGETS];
7960	UINT paOffset[SVGA3D_DX_MAX_SOTARGETS];
7961
7962	/* Always re-bind all 4 SO targets. They can be NULL. */
7963	for (uint32_t i = 0; i < SVGA3D_DX_MAX_SOTARGETS; ++i)
7964	{
7965	/* Get corresponding resource. Create the buffer if does not yet exist. */
7966	if (i < cSOTarget && paSoTarget[i].sid != SVGA_ID_INVALID)
7967	{
7968	PVMSVGA3DSURFACE pSurface;
7969	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, paSoTarget[i].sid, &pSurface);
7970	AssertRCReturn(rc, rc);
7971
7972	if (pSurface->pBackendSurface == NULL)
7973	{
7974	/* Create the resource. */
7975	rc = vmsvga3dBackSurfaceCreateSoBuffer(pThisCC, pDXContext, pSurface);
7976	AssertRCReturn(rc, rc);
7977	}
7978
7979	/** @todo How paSoTarget[i].sizeInBytes is used? Maybe when the buffer is created? */
7980	paResource[i] = pSurface->pBackendSurface->u.pBuffer;
7981	paOffset[i] = paSoTarget[i].offset;
7982	}
7983	else
7984	{
7985	paResource[i] = NULL;
7986	paOffset[i] = 0;
7987	}
7988	}
7989
7990	pDevice->pImmediateContext->SOSetTargets(SVGA3D_DX_MAX_SOTARGETS, paResource, paOffset);
7991
7992	pDXContext->pBackendDXContext->cSOTarget = cSOTarget;
7993
7994	return VINF_SUCCESS;
7995	}
7996
7997
7998	static DECLCALLBACK(int) vmsvga3dBackDXSetViewports(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t cViewport, SVGA3dViewport const *paViewport)
7999	{
8000	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8001	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8002	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8003
8004	RT_NOREF(pBackend);
8005
8006	/* D3D11_VIEWPORT is identical to SVGA3dViewport. */
8007	D3D11_VIEWPORT pViewports = (D3D11_VIEWPORT )paViewport;
8008
8009	pDevice->pImmediateContext->RSSetViewports(cViewport, pViewports);
8010	return VINF_SUCCESS;
8011	}
8012
8013
8014	static DECLCALLBACK(int) vmsvga3dBackDXSetScissorRects(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t cRect, SVGASignedRect const *paRect)
8015	{
8016	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8017	RT_NOREF(pBackend);
8018
8019	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8020	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8021
8022	/* D3D11_RECT is identical to SVGASignedRect. */
8023	D3D11_RECT pRects = (D3D11_RECT )paRect;
8024
8025	pDevice->pImmediateContext->RSSetScissorRects(cRect, pRects);
8026	return VINF_SUCCESS;
8027	}
8028
8029
8030	static DECLCALLBACK(int) vmsvga3dBackDXClearRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGA3dRGBAFloat const *pRGBA)
8031	{
8032	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8033	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
8034
8035	DXVIEW *pDXView;
8036	int rc = dxEnsureRenderTargetView(pThisCC, pDXContext, renderTargetViewId, &pDXView);
8037	AssertRCReturn(rc, rc);
8038
8039	pDXDevice->pImmediateContext->ClearRenderTargetView(pDXView->u.pRenderTargetView, pRGBA->value);
8040	return VINF_SUCCESS;
8041	}
8042
8043
8044	static DECLCALLBACK(int) vmsvga3dBackVBDXClearRenderTargetViewRegion(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId,
8045	SVGA3dRGBAFloat const pColor, uint32_t cRect, SVGASignedRect const paRect)
8046	{
8047	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8048	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
8049
8050	DXVIEW *pDXView;
8051	int rc = dxEnsureRenderTargetView(pThisCC, pDXContext, renderTargetViewId, &pDXView);
8052	AssertRCReturn(rc, rc);
8053
8054	pDXDevice->pImmediateContext->ClearView(pDXView->u.pRenderTargetView, pColor->value, (D3D11_RECT *)paRect, cRect);
8055	return VINF_SUCCESS;
8056	}
8057
8058
8059	static DECLCALLBACK(int) vmsvga3dBackDXClearDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t flags, SVGA3dDepthStencilViewId depthStencilViewId, float depth, uint8_t stencil)
8060	{
8061	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8062	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8063
8064	DXVIEW *pDXView;
8065	int rc = dxEnsureDepthStencilView(pThisCC, pDXContext, depthStencilViewId, &pDXView);
8066	AssertRCReturn(rc, rc);
8067
8068	UINT ClearFlags = 0;
8069	if (flags & SVGA3D_CLEAR_DEPTH)
8070	ClearFlags \|= D3D11_CLEAR_DEPTH;
8071	if (flags & SVGA3D_CLEAR_STENCIL)
8072	ClearFlags \|= D3D11_CLEAR_STENCIL;
8073
8074	pDevice->pImmediateContext->ClearDepthStencilView(pDXView->u.pDepthStencilView, ClearFlags, depth, stencil);
8075	return VINF_SUCCESS;
8076	}
8077
8078
8079	static DECLCALLBACK(int) vmsvga3dBackDXPredCopyRegion(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId dstSid, uint32_t dstSubResource, SVGA3dSurfaceId srcSid, uint32_t srcSubResource, SVGA3dCopyBox const *pBox)
8080	{
8081	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8082	RT_NOREF(pBackend);
8083
8084	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8085	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8086
8087	PVMSVGA3DSURFACE pSrcSurface;
8088	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, srcSid, &pSrcSurface);
8089	AssertRCReturn(rc, rc);
8090
8091	PVMSVGA3DSURFACE pDstSurface;
8092	rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, dstSid, &pDstSurface);
8093	AssertRCReturn(rc, rc);
8094
8095	if (pSrcSurface->pBackendSurface == NULL)
8096	{
8097	/* Create the resource. */
8098	if (pSrcSurface->format != SVGA3D_BUFFER)
8099	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pSrcSurface);
8100	else
8101	rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pSrcSurface);
8102	AssertRCReturn(rc, rc);
8103	}
8104
8105	if (pDstSurface->pBackendSurface == NULL)
8106	{
8107	/* Create the resource. */
8108	if (pSrcSurface->format != SVGA3D_BUFFER)
8109	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pDstSurface);
8110	else
8111	rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pDstSurface);
8112	AssertRCReturn(rc, rc);
8113	}
8114
8115	LogFunc(("src%s sid = %u -> dst%s sid = %u\n",
8116	(pSrcSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : "", pSrcSurface->id,
8117	(pDstSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : "", pDstSurface->id));
8118
8119	/* Clip the box. */
8120	/** @todo Use [src\|dst]SubResource to index p[Src\|Dst]Surface->paMipmapLevels array directly. */
8121	uint32_t iSrcFace;
8122	uint32_t iSrcMipmap;
8123	vmsvga3dCalcMipmapAndFace(pSrcSurface->cLevels, srcSubResource, &iSrcMipmap, &iSrcFace);
8124
8125	uint32_t iDstFace;
8126	uint32_t iDstMipmap;
8127	vmsvga3dCalcMipmapAndFace(pDstSurface->cLevels, dstSubResource, &iDstMipmap, &iDstFace);
8128
8129	PVMSVGA3DMIPMAPLEVEL pSrcMipLevel;
8130	rc = vmsvga3dMipmapLevel(pSrcSurface, iSrcFace, iSrcMipmap, &pSrcMipLevel);
8131	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
8132
8133	PVMSVGA3DMIPMAPLEVEL pDstMipLevel;
8134	rc = vmsvga3dMipmapLevel(pDstSurface, iDstFace, iDstMipmap, &pDstMipLevel);
8135	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
8136
8137	SVGA3dCopyBox clipBox = *pBox;
8138	vmsvgaR3ClipCopyBox(&pSrcMipLevel->mipmapSize, &pDstMipLevel->mipmapSize, &clipBox);
8139
8140	UINT DstSubresource = dstSubResource;
8141	UINT DstX = clipBox.x;
8142	UINT DstY = clipBox.y;
8143	UINT DstZ = clipBox.z;
8144
8145	UINT SrcSubresource = srcSubResource;
8146	D3D11_BOX SrcBox;
8147	SrcBox.left = clipBox.srcx;
8148	SrcBox.top = clipBox.srcy;
8149	SrcBox.front = clipBox.srcz;
8150	SrcBox.right = clipBox.srcx + clipBox.w;
8151	SrcBox.bottom = clipBox.srcy + clipBox.h;
8152	SrcBox.back = clipBox.srcz + clipBox.d;
8153
8154	ID3D11Resource *pDstResource;
8155	ID3D11Resource *pSrcResource;
8156
8157	pDstResource = dxResource(pThisCC->svga.p3dState, pDstSurface, pDXContext);
8158	pSrcResource = dxResource(pThisCC->svga.p3dState, pSrcSurface, pDXContext);
8159
8160	pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
8161	pSrcResource, SrcSubresource, &SrcBox);
8162
8163	#ifdef DUMP_BITMAPS
8164	SVGA3dSurfaceImageId image;
8165	image.sid = pDstSurface->id;
8166	image.face = 0;
8167	image.mipmap = 0;
8168	VMSVGA3D_MAPPED_SURFACE map;
8169	int rc2 = vmsvga3dSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
8170	if (RT_SUCCESS(rc2))
8171	{
8172	vmsvga3dMapWriteBmpFile(&map, "copyregion-");
8173	vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
8174	}
8175	else
8176	Log(("Map failed %Rrc\n", rc));
8177	#endif
8178
8179	return VINF_SUCCESS;
8180	}
8181
8182
8183	static DECLCALLBACK(int) vmsvga3dBackDXPredCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId dstSid, SVGA3dSurfaceId srcSid)
8184	{
8185	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8186	RT_NOREF(pBackend);
8187
8188	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8189	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8190
8191	PVMSVGA3DSURFACE pSrcSurface;
8192	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, srcSid, &pSrcSurface);
8193	AssertRCReturn(rc, rc);
8194
8195	PVMSVGA3DSURFACE pDstSurface;
8196	rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, dstSid, &pDstSurface);
8197	AssertRCReturn(rc, rc);
8198
8199	if (pSrcSurface->pBackendSurface == NULL)
8200	{
8201	/* Create the resource. */
8202	if (pSrcSurface->format != SVGA3D_BUFFER)
8203	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pSrcSurface);
8204	else
8205	rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pSrcSurface);
8206	AssertRCReturn(rc, rc);
8207	}
8208
8209	if (pDstSurface->pBackendSurface == NULL)
8210	{
8211	/* Create the resource. */
8212	if (pSrcSurface->format != SVGA3D_BUFFER)
8213	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pDstSurface);
8214	else
8215	rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pDstSurface);
8216	AssertRCReturn(rc, rc);
8217	}
8218
8219	LogFunc(("src%s sid = %u -> dst%s sid = %u\n",
8220	(pSrcSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : "", pSrcSurface->id,
8221	(pDstSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : "", pDstSurface->id));
8222
8223	ID3D11Resource *pDstResource = dxResource(pThisCC->svga.p3dState, pDstSurface, pDXContext);
8224	ID3D11Resource *pSrcResource = dxResource(pThisCC->svga.p3dState, pSrcSurface, pDXContext);
8225
8226	pDevice->pImmediateContext->CopyResource(pDstResource, pSrcResource);
8227
8228	return VINF_SUCCESS;
8229	}
8230
8231
8232	#include "shaders/d3d11blitter.hlsl.vs.h"
8233	#include "shaders/d3d11blitter.hlsl.ps.h"
8234
8235	#define HTEST(stmt) \
8236	hr = stmt; \
8237	AssertReturn(SUCCEEDED(hr), hr)
8238
8239
8240	static void BlitRelease(D3D11BLITTER *pBlitter)
8241	{
8242	D3D_RELEASE(pBlitter->pVertexShader);
8243	D3D_RELEASE(pBlitter->pPixelShader);
8244	D3D_RELEASE(pBlitter->pSamplerState);
8245	D3D_RELEASE(pBlitter->pRasterizerState);
8246	D3D_RELEASE(pBlitter->pBlendState);
8247	RT_ZERO(*pBlitter);
8248	}
8249
8250
8251	static HRESULT BlitInit(D3D11BLITTER pBlitter, ID3D11Device1 pDevice, ID3D11DeviceContext1 *pImmediateContext)
8252	{
8253	HRESULT hr;
8254
8255	RT_ZERO(*pBlitter);
8256
8257	pBlitter->pDevice = pDevice;
8258	pBlitter->pImmediateContext = pImmediateContext;
8259
8260	HTEST(pBlitter->pDevice->CreateVertexShader(g_vs_blitter, sizeof(g_vs_blitter), NULL, &pBlitter->pVertexShader));
8261	HTEST(pBlitter->pDevice->CreatePixelShader(g_ps_blitter, sizeof(g_ps_blitter), NULL, &pBlitter->pPixelShader));
8262
8263	D3D11_SAMPLER_DESC SamplerDesc;
8264	SamplerDesc.Filter = D3D11_FILTER_ANISOTROPIC;
8265	SamplerDesc.AddressU = D3D11_TEXTURE_ADDRESS_WRAP;
8266	SamplerDesc.AddressV = D3D11_TEXTURE_ADDRESS_WRAP;
8267	SamplerDesc.AddressW = D3D11_TEXTURE_ADDRESS_WRAP;
8268	SamplerDesc.MipLODBias = 0.0f;
8269	SamplerDesc.MaxAnisotropy = 4;
8270	SamplerDesc.ComparisonFunc = D3D11_COMPARISON_ALWAYS;
8271	SamplerDesc.BorderColor[0] = 0.0f;
8272	SamplerDesc.BorderColor[1] = 0.0f;
8273	SamplerDesc.BorderColor[2] = 0.0f;
8274	SamplerDesc.BorderColor[3] = 0.0f;
8275	SamplerDesc.MinLOD = 0.0f;
8276	SamplerDesc.MaxLOD = 0.0f;
8277	HTEST(pBlitter->pDevice->CreateSamplerState(&SamplerDesc, &pBlitter->pSamplerState));
8278
8279	D3D11_RASTERIZER_DESC1 RasterizerDesc;
8280	RasterizerDesc.FillMode = D3D11_FILL_SOLID;
8281	RasterizerDesc.CullMode = D3D11_CULL_NONE;
8282	RasterizerDesc.FrontCounterClockwise = FALSE;
8283	RasterizerDesc.DepthBias = 0;
8284	RasterizerDesc.DepthBiasClamp = 0.0f;
8285	RasterizerDesc.SlopeScaledDepthBias = 0.0f;
8286	RasterizerDesc.DepthClipEnable = FALSE;
8287	RasterizerDesc.ScissorEnable = FALSE;
8288	RasterizerDesc.MultisampleEnable = FALSE;
8289	RasterizerDesc.AntialiasedLineEnable = FALSE;
8290	RasterizerDesc.ForcedSampleCount = 0;
8291	HTEST(pBlitter->pDevice->CreateRasterizerState1(&RasterizerDesc, &pBlitter->pRasterizerState));
8292
8293	D3D11_BLEND_DESC1 BlendDesc;
8294	BlendDesc.AlphaToCoverageEnable = FALSE;
8295	BlendDesc.IndependentBlendEnable = FALSE;
8296	for (unsigned i = 0; i < RT_ELEMENTS(BlendDesc.RenderTarget); ++i)
8297	{
8298	BlendDesc.RenderTarget[i].BlendEnable = FALSE;
8299	BlendDesc.RenderTarget[i].LogicOpEnable = FALSE;
8300	BlendDesc.RenderTarget[i].SrcBlend = D3D11_BLEND_SRC_COLOR;
8301	BlendDesc.RenderTarget[i].DestBlend = D3D11_BLEND_ZERO;
8302	BlendDesc.RenderTarget[i].BlendOp = D3D11_BLEND_OP_ADD;
8303	BlendDesc.RenderTarget[i].SrcBlendAlpha = D3D11_BLEND_SRC_ALPHA;
8304	BlendDesc.RenderTarget[i].DestBlendAlpha = D3D11_BLEND_ZERO;
8305	BlendDesc.RenderTarget[i].BlendOpAlpha = D3D11_BLEND_OP_ADD;
8306	BlendDesc.RenderTarget[i].LogicOp = D3D11_LOGIC_OP_CLEAR;
8307	BlendDesc.RenderTarget[i].RenderTargetWriteMask = 0xF;
8308	}
8309	HTEST(pBlitter->pDevice->CreateBlendState1(&BlendDesc, &pBlitter->pBlendState));
8310
8311	return S_OK;
8312	}
8313
8314
8315	static HRESULT BlitFromTexture(D3D11BLITTER pBlitter, ID3D11RenderTargetView pDstRenderTargetView,
8316	float cDstWidth, float cDstHeight, D3D11_RECT const &rectDst,
8317	ID3D11ShaderResourceView *pSrcShaderResourceView)
8318	{
8319	HRESULT hr;
8320
8321	/*
8322	* Save pipeline state.
8323	*/
8324	struct
8325	{
8326	D3D11_PRIMITIVE_TOPOLOGY Topology;
8327	ID3D11InputLayout *pInputLayout;
8328	ID3D11Buffer *pConstantBuffer;
8329	ID3D11VertexShader *pVertexShader;
8330	ID3D11HullShader *pHullShader;
8331	ID3D11DomainShader *pDomainShader;
8332	ID3D11GeometryShader *pGeometryShader;
8333	ID3D11ShaderResourceView *pShaderResourceView;
8334	ID3D11PixelShader *pPixelShader;
8335	ID3D11SamplerState *pSamplerState;
8336	ID3D11RasterizerState *pRasterizerState;
8337	ID3D11BlendState *pBlendState;
8338	FLOAT BlendFactor[4];
8339	UINT SampleMask;
8340	ID3D11RenderTargetView *apRenderTargetView[D3D11_SIMULTANEOUS_RENDER_TARGET_COUNT];
8341	ID3D11DepthStencilView *pDepthStencilView;
8342	UINT NumViewports;
8343	D3D11_VIEWPORT aViewport[D3D11_VIEWPORT_AND_SCISSORRECT_OBJECT_COUNT_PER_PIPELINE];
8344	} SavedState;
8345
8346	pBlitter->pImmediateContext->IAGetPrimitiveTopology(&SavedState.Topology);
8347	pBlitter->pImmediateContext->IAGetInputLayout(&SavedState.pInputLayout);
8348	pBlitter->pImmediateContext->VSGetConstantBuffers(0, 1, &SavedState.pConstantBuffer);
8349	pBlitter->pImmediateContext->VSGetShader(&SavedState.pVertexShader, NULL, NULL);
8350	pBlitter->pImmediateContext->HSGetShader(&SavedState.pHullShader, NULL, NULL);
8351	pBlitter->pImmediateContext->DSGetShader(&SavedState.pDomainShader, NULL, NULL);
8352	pBlitter->pImmediateContext->GSGetShader(&SavedState.pGeometryShader, NULL, NULL);
8353	pBlitter->pImmediateContext->PSGetShaderResources(0, 1, &SavedState.pShaderResourceView);
8354	pBlitter->pImmediateContext->PSGetShader(&SavedState.pPixelShader, NULL, NULL);
8355	pBlitter->pImmediateContext->PSGetSamplers(0, 1, &SavedState.pSamplerState);
8356	pBlitter->pImmediateContext->RSGetState(&SavedState.pRasterizerState);
8357	pBlitter->pImmediateContext->OMGetBlendState(&SavedState.pBlendState, SavedState.BlendFactor, &SavedState.SampleMask);
8358	pBlitter->pImmediateContext->OMGetRenderTargets(RT_ELEMENTS(SavedState.apRenderTargetView), SavedState.apRenderTargetView, &SavedState.pDepthStencilView);
8359	SavedState.NumViewports = RT_ELEMENTS(SavedState.aViewport);
8360	pBlitter->pImmediateContext->RSGetViewports(&SavedState.NumViewports, &SavedState.aViewport[0]);
8361
8362	/*
8363	* Setup pipeline for the blitter.
8364	*/
8365
8366	/* Render target is first.
8367	* If the source texture is bound as a render target, then this call will unbind it
8368	* and allow to use it as the shader resource.
8369	*/
8370	pBlitter->pImmediateContext->OMSetRenderTargets(1, &pDstRenderTargetView, NULL);
8371
8372	/* Input assembler. */
8373	pBlitter->pImmediateContext->IASetInputLayout(NULL);
8374	pBlitter->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP);
8375
8376	/* Constant buffer. */
8377	struct
8378	{
8379	float scaleX;
8380	float scaleY;
8381	float offsetX;
8382	float offsetY;
8383	} VSConstantBuffer;
8384	VSConstantBuffer.scaleX = (float)(rectDst.right - rectDst.left) / cDstWidth;
8385	VSConstantBuffer.scaleY = (float)(rectDst.bottom - rectDst.top) / cDstHeight;
8386	VSConstantBuffer.offsetX = (float)(rectDst.right + rectDst.left) / cDstWidth - 1.0f;
8387	VSConstantBuffer.offsetY = -((float)(rectDst.bottom + rectDst.top) / cDstHeight - 1.0f);
8388
8389	D3D11_SUBRESOURCE_DATA initialData;
8390	initialData.pSysMem = &VSConstantBuffer;
8391	initialData.SysMemPitch = sizeof(VSConstantBuffer);
8392	initialData.SysMemSlicePitch = sizeof(VSConstantBuffer);
8393
8394	D3D11_BUFFER_DESC bd;
8395	RT_ZERO(bd);
8396	bd.ByteWidth = sizeof(VSConstantBuffer);
8397	bd.Usage = D3D11_USAGE_IMMUTABLE;
8398	bd.BindFlags = D3D11_BIND_CONSTANT_BUFFER;
8399
8400	ID3D11Buffer *pConstantBuffer;
8401	HTEST(pBlitter->pDevice->CreateBuffer(&bd, &initialData, &pConstantBuffer));
8402	pBlitter->pImmediateContext->VSSetConstantBuffers(0, 1, &pConstantBuffer);
8403	D3D_RELEASE(pConstantBuffer); /* xSSetConstantBuffers "will hold a reference to the interfaces passed in." */
8404
8405	/* Vertex shader. */
8406	pBlitter->pImmediateContext->VSSetShader(pBlitter->pVertexShader, NULL, 0);
8407
8408	/* Unused shaders. */
8409	pBlitter->pImmediateContext->HSSetShader(NULL, NULL, 0);
8410	pBlitter->pImmediateContext->DSSetShader(NULL, NULL, 0);
8411	pBlitter->pImmediateContext->GSSetShader(NULL, NULL, 0);
8412
8413	/* Shader resource view. */
8414	pBlitter->pImmediateContext->PSSetShaderResources(0, 1, &pSrcShaderResourceView);
8415
8416	/* Pixel shader. */
8417	pBlitter->pImmediateContext->PSSetShader(pBlitter->pPixelShader, NULL, 0);
8418
8419	/* Sampler. */
8420	pBlitter->pImmediateContext->PSSetSamplers(0, 1, &pBlitter->pSamplerState);
8421
8422	/* Rasterizer. */
8423	pBlitter->pImmediateContext->RSSetState(pBlitter->pRasterizerState);
8424
8425	/* Blend state. */
8426	static FLOAT const BlendFactor[4] = { 0.0f, 0.0f, 0.0f, 0.0f };
8427	pBlitter->pImmediateContext->OMSetBlendState(pBlitter->pBlendState, BlendFactor, 0xffffffff);
8428
8429	/* Viewport. */
8430	D3D11_VIEWPORT Viewport;
8431	Viewport.TopLeftX = 0;
8432	Viewport.TopLeftY = 0;
8433	Viewport.Width = cDstWidth;
8434	Viewport.Height = cDstHeight;
8435	Viewport.MinDepth = 0.0f;
8436	Viewport.MaxDepth = 1.0f;
8437	pBlitter->pImmediateContext->RSSetViewports(1, &Viewport);
8438
8439	/* Draw. */
8440	pBlitter->pImmediateContext->Draw(4, 0);
8441
8442	/*
8443	* Restore pipeline state.
8444	*/
8445	pBlitter->pImmediateContext->IASetPrimitiveTopology(SavedState.Topology);
8446	pBlitter->pImmediateContext->IASetInputLayout(SavedState.pInputLayout);
8447	D3D_RELEASE(SavedState.pInputLayout);
8448	pBlitter->pImmediateContext->VSSetConstantBuffers(0, 1, &SavedState.pConstantBuffer);
8449	D3D_RELEASE(SavedState.pConstantBuffer);
8450	pBlitter->pImmediateContext->VSSetShader(SavedState.pVertexShader, NULL, 0);
8451	D3D_RELEASE(SavedState.pVertexShader);
8452
8453	pBlitter->pImmediateContext->HSSetShader(SavedState.pHullShader, NULL, 0);
8454	D3D_RELEASE(SavedState.pHullShader);
8455	pBlitter->pImmediateContext->DSSetShader(SavedState.pDomainShader, NULL, 0);
8456	D3D_RELEASE(SavedState.pDomainShader);
8457	pBlitter->pImmediateContext->GSSetShader(SavedState.pGeometryShader, NULL, 0);
8458	D3D_RELEASE(SavedState.pGeometryShader);
8459
8460	pBlitter->pImmediateContext->PSSetShaderResources(0, 1, &SavedState.pShaderResourceView);
8461	D3D_RELEASE(SavedState.pShaderResourceView);
8462	pBlitter->pImmediateContext->PSSetShader(SavedState.pPixelShader, NULL, 0);
8463	D3D_RELEASE(SavedState.pPixelShader);
8464	pBlitter->pImmediateContext->PSSetSamplers(0, 1, &SavedState.pSamplerState);
8465	D3D_RELEASE(SavedState.pSamplerState);
8466	pBlitter->pImmediateContext->RSSetState(SavedState.pRasterizerState);
8467	D3D_RELEASE(SavedState.pRasterizerState);
8468	pBlitter->pImmediateContext->OMSetBlendState(SavedState.pBlendState, SavedState.BlendFactor, SavedState.SampleMask);
8469	D3D_RELEASE(SavedState.pBlendState);
8470	pBlitter->pImmediateContext->OMSetRenderTargets(RT_ELEMENTS(SavedState.apRenderTargetView), SavedState.apRenderTargetView, SavedState.pDepthStencilView);
8471	D3D_RELEASE_ARRAY(RT_ELEMENTS(SavedState.apRenderTargetView), SavedState.apRenderTargetView);
8472	D3D_RELEASE(SavedState.pDepthStencilView);
8473	pBlitter->pImmediateContext->RSSetViewports(SavedState.NumViewports, &SavedState.aViewport[0]);
8474
8475	return S_OK;
8476	}
8477
8478
8479	static DECLCALLBACK(int) vmsvga3dBackDXPresentBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
8480	SVGA3dSurfaceId dstSid, uint32_t dstSubResource, SVGA3dBox const *pBoxDst,
8481	SVGA3dSurfaceId srcSid, uint32_t srcSubResource, SVGA3dBox const *pBoxSrc,
8482	SVGA3dDXPresentBltMode mode)
8483	{
8484	RT_NOREF(mode);
8485
8486	ASSERT_GUEST_RETURN(pBoxDst->z == 0 && pBoxDst->d == 1, VERR_INVALID_PARAMETER);
8487	ASSERT_GUEST_RETURN(pBoxSrc->z == 0 && pBoxSrc->d == 1, VERR_INVALID_PARAMETER);
8488
8489	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8490	RT_NOREF(pBackend);
8491
8492	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8493	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8494
8495	PVMSVGA3DSURFACE pSrcSurface;
8496	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, srcSid, &pSrcSurface);
8497	AssertRCReturn(rc, rc);
8498
8499	PVMSVGA3DSURFACE pDstSurface;
8500	rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, dstSid, &pDstSurface);
8501	AssertRCReturn(rc, rc);
8502
8503	if (pSrcSurface->pBackendSurface == NULL)
8504	{
8505	/* Create the resource. */
8506	if (pSrcSurface->format != SVGA3D_BUFFER)
8507	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pSrcSurface);
8508	else
8509	rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pSrcSurface);
8510	AssertRCReturn(rc, rc);
8511	}
8512
8513	if (pDstSurface->pBackendSurface == NULL)
8514	{
8515	/* Create the resource. */
8516	if (pSrcSurface->format != SVGA3D_BUFFER)
8517	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pDstSurface);
8518	else
8519	rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDXContext, pDstSurface);
8520	AssertRCReturn(rc, rc);
8521	}
8522
8523	#ifdef DEBUG_sunlover
8524	if (pSrcSurface->surfaceDesc.multisampleCount > 1 \|\| pDstSurface->surfaceDesc.multisampleCount > 1)
8525	DEBUG_BREAKPOINT_TEST();
8526	#endif
8527
8528	LogFunc(("src%s sid = %u -> dst%s sid = %u\n",
8529	(pSrcSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : "", pSrcSurface->id,
8530	(pDstSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : "", pDstSurface->id));
8531
8532	/* Clip the box. */
8533	/** @todo Use [src\|dst]SubResource to index p[Src\|Dst]Surface->paMipmapLevels array directly. */
8534	uint32_t iSrcFace;
8535	uint32_t iSrcMipmap;
8536	vmsvga3dCalcMipmapAndFace(pSrcSurface->cLevels, srcSubResource, &iSrcMipmap, &iSrcFace);
8537
8538	uint32_t iDstFace;
8539	uint32_t iDstMipmap;
8540	vmsvga3dCalcMipmapAndFace(pDstSurface->cLevels, dstSubResource, &iDstMipmap, &iDstFace);
8541
8542	PVMSVGA3DMIPMAPLEVEL pSrcMipLevel;
8543	rc = vmsvga3dMipmapLevel(pSrcSurface, iSrcFace, iSrcMipmap, &pSrcMipLevel);
8544	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
8545
8546	PVMSVGA3DMIPMAPLEVEL pDstMipLevel;
8547	rc = vmsvga3dMipmapLevel(pDstSurface, iDstFace, iDstMipmap, &pDstMipLevel);
8548	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
8549
8550	SVGA3dBox clipBoxSrc = *pBoxSrc;
8551	vmsvgaR3ClipBox(&pSrcMipLevel->mipmapSize, &clipBoxSrc);
8552
8553	SVGA3dBox clipBoxDst = *pBoxDst;
8554	vmsvgaR3ClipBox(&pDstMipLevel->mipmapSize, &clipBoxDst);
8555
8556	ID3D11Resource *pDstResource = dxResource(pThisCC->svga.p3dState, pDstSurface, pDXContext);
8557	ID3D11Resource *pSrcResource = dxResource(pThisCC->svga.p3dState, pSrcSurface, pDXContext);
8558
8559	D3D11_RENDER_TARGET_VIEW_DESC RTVDesc;
8560	RT_ZERO(RTVDesc);
8561	RTVDesc.Format = vmsvgaDXSurfaceFormat2Dxgi(pDstSurface->format);;
8562	RTVDesc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2D;
8563	RTVDesc.Texture2D.MipSlice = dstSubResource;
8564
8565	ID3D11RenderTargetView *pDstRenderTargetView;
8566	HRESULT hr = pDevice->pDevice->CreateRenderTargetView(pDstResource, &RTVDesc, &pDstRenderTargetView);
8567	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
8568
8569	D3D11_SHADER_RESOURCE_VIEW_DESC SRVDesc;
8570	RT_ZERO(SRVDesc);
8571	SRVDesc.Format = vmsvgaDXSurfaceFormat2Dxgi(pSrcSurface->format);
8572	SRVDesc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE2D;
8573	SRVDesc.Texture2D.MostDetailedMip = srcSubResource;
8574	SRVDesc.Texture2D.MipLevels = 1;
8575
8576	ID3D11ShaderResourceView *pSrcShaderResourceView;
8577	hr = pDevice->pDevice->CreateShaderResourceView(pSrcResource, &SRVDesc, &pSrcShaderResourceView);
8578	AssertReturnStmt(SUCCEEDED(hr), D3D_RELEASE(pDstRenderTargetView), VERR_NOT_SUPPORTED);
8579
8580	D3D11_RECT rectDst;
8581	rectDst.left = pBoxDst->x;
8582	rectDst.top = pBoxDst->y;
8583	rectDst.right = pBoxDst->x + pBoxDst->w;
8584	rectDst.bottom = pBoxDst->y + pBoxDst->h;
8585
8586	BlitFromTexture(&pDevice->Blitter, pDstRenderTargetView, (float)pDstMipLevel->mipmapSize.width, (float)pDstMipLevel->mipmapSize.height,
8587	rectDst, pSrcShaderResourceView);
8588
8589	D3D_RELEASE(pSrcShaderResourceView);
8590	D3D_RELEASE(pDstRenderTargetView);
8591
8592	return VINF_SUCCESS;
8593	}
8594
8595
8596	static DECLCALLBACK(int) vmsvga3dBackDXGenMips(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId)
8597	{
8598	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8599	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
8600
8601	DXVIEW *pDXView;
8602	int rc = dxEnsureShaderResourceView(pThisCC, pDXContext, shaderResourceViewId, &pDXView);
8603	AssertRCReturn(rc, rc);
8604
8605	pDXDevice->pImmediateContext->GenerateMips(pDXView->u.pShaderResourceView);
8606	return VINF_SUCCESS;
8607	}
8608
8609
8610	static DECLCALLBACK(int) vmsvga3dBackDXDefineShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId, SVGACOTableDXSRViewEntry const *pEntry)
8611	{
8612	/* The view is created when it is used in setupPipeline. */
8613	RT_NOREF(pThisCC, pDXContext, shaderResourceViewId, pEntry);
8614	return VINF_SUCCESS;
8615	}
8616
8617
8618	static DECLCALLBACK(int) vmsvga3dBackDXDestroyShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId)
8619	{
8620	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8621	RT_NOREF(pBackend);
8622
8623	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paShaderResourceView[shaderResourceViewId];
8624	return dxViewDestroy(pDXView);
8625	}
8626
8627
8628	static DECLCALLBACK(int) vmsvga3dBackDXDefineRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGACOTableDXRTViewEntry const *pEntry)
8629	{
8630	/* The view is created when it is used in setupPipeline or ClearView. */
8631	RT_NOREF(pThisCC, pDXContext, renderTargetViewId, pEntry);
8632	return VINF_SUCCESS;
8633	}
8634
8635
8636	static DECLCALLBACK(int) vmsvga3dBackDXDestroyRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId)
8637	{
8638	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8639	RT_NOREF(pBackend);
8640
8641	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paRenderTargetView[renderTargetViewId];
8642	return dxViewDestroy(pDXView);
8643	}
8644
8645
8646	static DECLCALLBACK(int) vmsvga3dBackDXDefineDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, SVGACOTableDXDSViewEntry const *pEntry)
8647	{
8648	/* The view is created when it is used in setupPipeline or ClearView. */
8649	RT_NOREF(pThisCC, pDXContext, depthStencilViewId, pEntry);
8650	return VINF_SUCCESS;
8651	}
8652
8653
8654	static DECLCALLBACK(int) vmsvga3dBackDXDestroyDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId)
8655	{
8656	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8657	RT_NOREF(pBackend);
8658
8659	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paDepthStencilView[depthStencilViewId];
8660	return dxViewDestroy(pDXView);
8661	}
8662
8663
8664	static int dxDefineElementLayout(PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId, SVGACOTableDXElementLayoutEntry const *pEntry)
8665	{
8666	DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
8667	D3D_RELEASE(pDXElementLayout->pElementLayout);
8668	pDXElementLayout->cElementDesc = 0;
8669	RT_ZERO(pDXElementLayout->aElementDesc);
8670
8671	RT_NOREF(pEntry);
8672
8673	return VINF_SUCCESS;
8674	}
8675
8676
8677	static int dxDestroyElementLayout(DXELEMENTLAYOUT *pDXElementLayout)
8678	{
8679	D3D_RELEASE(pDXElementLayout->pElementLayout);
8680	pDXElementLayout->cElementDesc = 0;
8681	RT_ZERO(pDXElementLayout->aElementDesc);
8682	return VINF_SUCCESS;
8683	}
8684
8685
8686	static DECLCALLBACK(int) vmsvga3dBackDXDefineElementLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId, SVGACOTableDXElementLayoutEntry const *pEntry)
8687	{
8688	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8689	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8690	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8691
8692	RT_NOREF(pBackend);
8693
8694	/* Not much can be done here because ID3D11Device::CreateInputLayout requires
8695	* a pShaderBytecodeWithInputSignature which is not known at this moment.
8696	* InputLayout object will be created in setupPipeline.
8697	*/
8698
8699	Assert(elementLayoutId == pEntry->elid);
8700
8701	return dxDefineElementLayout(pDXContext, elementLayoutId, pEntry);
8702	}
8703
8704
8705	static DECLCALLBACK(int) vmsvga3dBackDXDestroyElementLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId)
8706	{
8707	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8708	RT_NOREF(pBackend);
8709
8710	DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
8711	dxDestroyElementLayout(pDXElementLayout);
8712
8713	return VINF_SUCCESS;
8714	}
8715
8716
8717	static int dxDefineBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
8718	SVGA3dBlendStateId blendId, SVGACOTableDXBlendStateEntry const *pEntry)
8719	{
8720	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8721	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8722
8723	HRESULT hr = dxBlendStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papBlendState[blendId]);
8724	if (SUCCEEDED(hr))
8725	return VINF_SUCCESS;
8726	return VERR_INVALID_STATE;
8727	}
8728
8729
8730	static DECLCALLBACK(int) vmsvga3dBackDXDefineBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
8731	SVGA3dBlendStateId blendId, SVGACOTableDXBlendStateEntry const *pEntry)
8732	{
8733	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8734	RT_NOREF(pBackend);
8735
8736	return dxDefineBlendState(pThisCC, pDXContext, blendId, pEntry);
8737	}
8738
8739
8740	static DECLCALLBACK(int) vmsvga3dBackDXDestroyBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dBlendStateId blendId)
8741	{
8742	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8743	RT_NOREF(pBackend);
8744
8745	D3D_RELEASE(pDXContext->pBackendDXContext->papBlendState[blendId]);
8746	return VINF_SUCCESS;
8747	}
8748
8749
8750	static int dxDefineDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, SVGACOTableDXDepthStencilEntry const *pEntry)
8751	{
8752	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8753	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8754
8755	HRESULT hr = dxDepthStencilStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papDepthStencilState[depthStencilId]);
8756	if (SUCCEEDED(hr))
8757	return VINF_SUCCESS;
8758	return VERR_INVALID_STATE;
8759	}
8760
8761
8762	static DECLCALLBACK(int) vmsvga3dBackDXDefineDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, SVGACOTableDXDepthStencilEntry const *pEntry)
8763	{
8764	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8765	RT_NOREF(pBackend);
8766
8767	return dxDefineDepthStencilState(pThisCC, pDXContext, depthStencilId, pEntry);
8768	}
8769
8770
8771	static DECLCALLBACK(int) vmsvga3dBackDXDestroyDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId)
8772	{
8773	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8774	RT_NOREF(pBackend);
8775
8776	D3D_RELEASE(pDXContext->pBackendDXContext->papDepthStencilState[depthStencilId]);
8777	return VINF_SUCCESS;
8778	}
8779
8780
8781	static int dxDefineRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId, SVGACOTableDXRasterizerStateEntry const *pEntry)
8782	{
8783	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8784	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8785
8786	HRESULT hr = dxRasterizerStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papRasterizerState[rasterizerId]);
8787	if (SUCCEEDED(hr))
8788	return VINF_SUCCESS;
8789	return VERR_INVALID_STATE;
8790	}
8791
8792
8793	static DECLCALLBACK(int) vmsvga3dBackDXDefineRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId, SVGACOTableDXRasterizerStateEntry const *pEntry)
8794	{
8795	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8796	RT_NOREF(pBackend);
8797
8798	return dxDefineRasterizerState(pThisCC, pDXContext, rasterizerId, pEntry);
8799	}
8800
8801
8802	static DECLCALLBACK(int) vmsvga3dBackDXDestroyRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId)
8803	{
8804	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8805	RT_NOREF(pBackend);
8806
8807	D3D_RELEASE(pDXContext->pBackendDXContext->papRasterizerState[rasterizerId]);
8808	return VINF_SUCCESS;
8809	}
8810
8811
8812	static int dxDefineSamplerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSamplerId samplerId, SVGACOTableDXSamplerEntry const *pEntry)
8813	{
8814	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8815	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8816
8817	HRESULT hr = dxSamplerStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papSamplerState[samplerId]);
8818	if (SUCCEEDED(hr))
8819	return VINF_SUCCESS;
8820	return VERR_INVALID_STATE;
8821	}
8822
8823
8824	static DECLCALLBACK(int) vmsvga3dBackDXDefineSamplerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSamplerId samplerId, SVGACOTableDXSamplerEntry const *pEntry)
8825	{
8826	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8827	RT_NOREF(pBackend);
8828
8829	return dxDefineSamplerState(pThisCC, pDXContext, samplerId, pEntry);
8830	}
8831
8832
8833	static DECLCALLBACK(int) vmsvga3dBackDXDestroySamplerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSamplerId samplerId)
8834	{
8835	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8836	RT_NOREF(pBackend);
8837
8838	D3D_RELEASE(pDXContext->pBackendDXContext->papSamplerState[samplerId]);
8839	return VINF_SUCCESS;
8840	}
8841
8842
8843	static int dxDefineShader(PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderId shaderId, SVGACOTableDXShaderEntry const *pEntry)
8844	{
8845	/** @todo A common approach for creation of COTable backend objects: runtime, empty DX COTable, live DX COTable. */
8846	DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[shaderId];
8847	Assert(pDXShader->enmShaderType == SVGA3D_SHADERTYPE_INVALID);
8848
8849	/* Init the backend shader structure, if the shader has not been created yet. */
8850	pDXShader->enmShaderType = pEntry->type;
8851	pDXShader->pShader = NULL;
8852	pDXShader->soid = SVGA_ID_INVALID;
8853
8854	return VINF_SUCCESS;
8855	}
8856
8857
8858	static int dxDestroyShader(DXSHADER *pDXShader)
8859	{
8860	pDXShader->enmShaderType = SVGA3D_SHADERTYPE_INVALID;
8861	DXShaderFree(&pDXShader->shaderInfo);
8862	D3D_RELEASE(pDXShader->pShader);
8863	RTMemFree(pDXShader->pvDXBC);
8864	pDXShader->pvDXBC = NULL;
8865	pDXShader->cbDXBC = 0;
8866	pDXShader->soid = SVGA_ID_INVALID;
8867	return VINF_SUCCESS;
8868	}
8869
8870
8871	static DECLCALLBACK(int) vmsvga3dBackDXDefineShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderId shaderId, SVGACOTableDXShaderEntry const *pEntry)
8872	{
8873	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8874	RT_NOREF(pBackend);
8875
8876	return dxDefineShader(pDXContext, shaderId, pEntry);
8877	}
8878
8879
8880	static DECLCALLBACK(int) vmsvga3dBackDXDestroyShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderId shaderId)
8881	{
8882	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8883	RT_NOREF(pBackend);
8884
8885	DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[shaderId];
8886	dxDestroyShader(pDXShader);
8887
8888	return VINF_SUCCESS;
8889	}
8890
8891
8892	static DECLCALLBACK(int) vmsvga3dBackDXBindShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderId shaderId, DXShaderInfo const *pShaderInfo)
8893	{
8894	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8895	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
8896	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8897
8898	RT_NOREF(pBackend);
8899
8900	DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[shaderId];
8901	if (pDXShader->pvDXBC)
8902	{
8903	/* New DXBC code and new shader must be created. */
8904	D3D_RELEASE(pDXShader->pShader);
8905	RTMemFree(pDXShader->pvDXBC);
8906	pDXShader->pvDXBC = NULL;
8907	pDXShader->cbDXBC = 0;
8908	}
8909
8910	pDXShader->shaderInfo = *pShaderInfo;
8911
8912	return VINF_SUCCESS;
8913	}
8914
8915
8916	static DECLCALLBACK(int) vmsvga3dBackDXDefineStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dStreamOutputId soid, SVGACOTableDXStreamOutputEntry const *pEntry)
8917	{
8918	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8919	RT_NOREF(pBackend);
8920
8921	DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[soid];
8922	dxDestroyStreamOutput(pDXStreamOutput);
8923
8924	RT_NOREF(pEntry);
8925	return VINF_SUCCESS;
8926	}
8927
8928
8929	static DECLCALLBACK(int) vmsvga3dBackDXDestroyStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dStreamOutputId soid)
8930	{
8931	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8932	RT_NOREF(pBackend);
8933
8934	DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[soid];
8935	dxDestroyStreamOutput(pDXStreamOutput);
8936
8937	return VINF_SUCCESS;
8938	}
8939
8940
8941	static DECLCALLBACK(int) vmsvga3dBackDXSetStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dStreamOutputId soid)
8942	{
8943	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8944	RT_NOREF(pBackend, pDXContext, soid);
8945
8946	return VINF_SUCCESS;
8947	}
8948
8949
8950	static int dxCOTableRealloc(void *ppvCOTable, uint32_t pcCOTable, uint32_t cbEntry, uint32_t cEntries, uint32_t cValidEntries)
8951	{
8952	uint32_t const cCOTableCurrent = *pcCOTable;
8953
8954	if (*pcCOTable != cEntries)
8955	{
8956	/* Grow/shrink the array. */
8957	if (cEntries)
8958	{
8959	void pvNew = RTMemRealloc(ppvCOTable, cEntries * cbEntry);
8960	AssertReturn(pvNew, VERR_NO_MEMORY);
8961	*ppvCOTable = pvNew;
8962	}
8963	else
8964	{
8965	RTMemFree(*ppvCOTable);
8966	*ppvCOTable = NULL;
8967	}
8968
8969	*pcCOTable = cEntries;
8970	}
8971
8972	if (*ppvCOTable)
8973	{
8974	uint32_t const cEntriesToKeep = RT_MIN(cCOTableCurrent, cValidEntries);
8975	memset((uint8_t )(ppvCOTable) + cEntriesToKeep * cbEntry, 0, (cEntries - cEntriesToKeep) * cbEntry);
8976	}
8977
8978	return VINF_SUCCESS;
8979	}
8980
8981	static DECLCALLBACK(int) vmsvga3dBackDXSetCOTable(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableType type, uint32_t cValidEntries)
8982	{
8983	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8984	RT_NOREF(pBackend);
8985
8986	VMSVGA3DBACKENDDXCONTEXT *pBackendDXContext = pDXContext->pBackendDXContext;
8987
8988	int rc = VINF_SUCCESS;
8989
8990	/*
8991	* 1) Release current backend table, if exists;
8992	* 2) Reallocate memory for the new backend table;
8993	* 3) If cValidEntries is not zero, then re-define corresponding backend table elements.
8994	*/
8995	switch (type)
8996	{
8997	case SVGA_COTABLE_RTVIEW:
8998	/* Clear current entries. */
8999	if (pBackendDXContext->paRenderTargetView)
9000	{
9001	for (uint32_t i = 0; i < pBackendDXContext->cRenderTargetView; ++i)
9002	{
9003	DXVIEW *pDXView = &pBackendDXContext->paRenderTargetView[i];
9004	if (i < cValidEntries)
9005	dxViewRemoveFromList(pDXView); /* Remove from list because DXVIEW array will be reallocated. */
9006	else
9007	dxViewDestroy(pDXView);
9008	}
9009	}
9010
9011	rc = dxCOTableRealloc((void **)&pBackendDXContext->paRenderTargetView, &pBackendDXContext->cRenderTargetView,
9012	sizeof(pBackendDXContext->paRenderTargetView[0]), pDXContext->cot.cRTView, cValidEntries);
9013	AssertRCBreak(rc);
9014
9015	for (uint32_t i = 0; i < cValidEntries; ++i)
9016	{
9017	SVGACOTableDXRTViewEntry const *pEntry = &pDXContext->cot.paRTView[i];
9018	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9019	continue; /* Skip uninitialized entry. */
9020
9021	/* Define views which were not defined yet in backend. */
9022	DXVIEW *pDXView = &pBackendDXContext->paRenderTargetView[i];
9023	/** @todo Verify that the pEntry content still corresponds to the view. */
9024	if (pDXView->u.pView)
9025	dxViewAddToList(pThisCC, pDXView);
9026	}
9027	break;
9028	case SVGA_COTABLE_DSVIEW:
9029	if (pBackendDXContext->paDepthStencilView)
9030	{
9031	for (uint32_t i = 0; i < pBackendDXContext->cDepthStencilView; ++i)
9032	{
9033	DXVIEW *pDXView = &pBackendDXContext->paDepthStencilView[i];
9034	if (i < cValidEntries)
9035	dxViewRemoveFromList(pDXView); /* Remove from list because DXVIEW array will be reallocated. */
9036	else
9037	dxViewDestroy(pDXView);
9038	}
9039	}
9040
9041	rc = dxCOTableRealloc((void **)&pBackendDXContext->paDepthStencilView, &pBackendDXContext->cDepthStencilView,
9042	sizeof(pBackendDXContext->paDepthStencilView[0]), pDXContext->cot.cDSView, cValidEntries);
9043	AssertRCBreak(rc);
9044
9045	for (uint32_t i = 0; i < cValidEntries; ++i)
9046	{
9047	SVGACOTableDXDSViewEntry const *pEntry = &pDXContext->cot.paDSView[i];
9048	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9049	continue; /* Skip uninitialized entry. */
9050
9051	/* Define views which were not defined yet in backend. */
9052	DXVIEW *pDXView = &pBackendDXContext->paDepthStencilView[i];
9053	/** @todo Verify that the pEntry content still corresponds to the view. */
9054	if (pDXView->u.pView)
9055	dxViewAddToList(pThisCC, pDXView);
9056	}
9057	break;
9058	case SVGA_COTABLE_SRVIEW:
9059	if (pBackendDXContext->paShaderResourceView)
9060	{
9061	for (uint32_t i = 0; i < pBackendDXContext->cShaderResourceView; ++i)
9062	{
9063	/* Destroy the no longer used entries. */
9064	DXVIEW *pDXView = &pBackendDXContext->paShaderResourceView[i];
9065	if (i < cValidEntries)
9066	dxViewRemoveFromList(pDXView); /* Remove from list because DXVIEW array will be reallocated. */
9067	else
9068	dxViewDestroy(pDXView);
9069	}
9070	}
9071
9072	rc = dxCOTableRealloc((void **)&pBackendDXContext->paShaderResourceView, &pBackendDXContext->cShaderResourceView,
9073	sizeof(pBackendDXContext->paShaderResourceView[0]), pDXContext->cot.cSRView, cValidEntries);
9074	AssertRCBreak(rc);
9075
9076	for (uint32_t i = 0; i < cValidEntries; ++i)
9077	{
9078	SVGACOTableDXSRViewEntry const *pEntry = &pDXContext->cot.paSRView[i];
9079	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9080	continue; /* Skip uninitialized entry. */
9081
9082	DXVIEW *pDXView = &pBackendDXContext->paShaderResourceView[i];
9083	/** @todo Verify that the pEntry content still corresponds to the view. */
9084	if (pDXView->u.pView)
9085	dxViewAddToList(pThisCC, pDXView);
9086	}
9087	break;
9088	case SVGA_COTABLE_ELEMENTLAYOUT:
9089	if (pBackendDXContext->paElementLayout)
9090	{
9091	for (uint32_t i = cValidEntries; i < pBackendDXContext->cElementLayout; ++i)
9092	D3D_RELEASE(pBackendDXContext->paElementLayout[i].pElementLayout);
9093	}
9094
9095	rc = dxCOTableRealloc((void **)&pBackendDXContext->paElementLayout, &pBackendDXContext->cElementLayout,
9096	sizeof(pBackendDXContext->paElementLayout[0]), pDXContext->cot.cElementLayout, cValidEntries);
9097	AssertRCBreak(rc);
9098
9099	for (uint32_t i = 0; i < cValidEntries; ++i)
9100	{
9101	SVGACOTableDXElementLayoutEntry const *pEntry = &pDXContext->cot.paElementLayout[i];
9102	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9103	continue; /* Skip uninitialized entry. */
9104
9105	dxDefineElementLayout(pDXContext, i, pEntry);
9106	}
9107	break;
9108	case SVGA_COTABLE_BLENDSTATE:
9109	if (pBackendDXContext->papBlendState)
9110	{
9111	for (uint32_t i = cValidEntries; i < pBackendDXContext->cBlendState; ++i)
9112	D3D_RELEASE(pBackendDXContext->papBlendState[i]);
9113	}
9114
9115	rc = dxCOTableRealloc((void **)&pBackendDXContext->papBlendState, &pBackendDXContext->cBlendState,
9116	sizeof(pBackendDXContext->papBlendState[0]), pDXContext->cot.cBlendState, cValidEntries);
9117	AssertRCBreak(rc);
9118
9119	for (uint32_t i = 0; i < cValidEntries; ++i)
9120	{
9121	SVGACOTableDXBlendStateEntry const *pEntry = &pDXContext->cot.paBlendState[i];
9122	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9123	continue; /* Skip uninitialized entry. */
9124
9125	dxDefineBlendState(pThisCC, pDXContext, i, pEntry);
9126	}
9127	break;
9128	case SVGA_COTABLE_DEPTHSTENCIL:
9129	if (pBackendDXContext->papDepthStencilState)
9130	{
9131	for (uint32_t i = cValidEntries; i < pBackendDXContext->cDepthStencilState; ++i)
9132	D3D_RELEASE(pBackendDXContext->papDepthStencilState[i]);
9133	}
9134
9135	rc = dxCOTableRealloc((void **)&pBackendDXContext->papDepthStencilState, &pBackendDXContext->cDepthStencilState,
9136	sizeof(pBackendDXContext->papDepthStencilState[0]), pDXContext->cot.cDepthStencil, cValidEntries);
9137	AssertRCBreak(rc);
9138
9139	for (uint32_t i = 0; i < cValidEntries; ++i)
9140	{
9141	SVGACOTableDXDepthStencilEntry const *pEntry = &pDXContext->cot.paDepthStencil[i];
9142	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9143	continue; /* Skip uninitialized entry. */
9144
9145	dxDefineDepthStencilState(pThisCC, pDXContext, i, pEntry);
9146	}
9147	break;
9148	case SVGA_COTABLE_RASTERIZERSTATE:
9149	if (pBackendDXContext->papRasterizerState)
9150	{
9151	for (uint32_t i = cValidEntries; i < pBackendDXContext->cRasterizerState; ++i)
9152	D3D_RELEASE(pBackendDXContext->papRasterizerState[i]);
9153	}
9154
9155	rc = dxCOTableRealloc((void **)&pBackendDXContext->papRasterizerState, &pBackendDXContext->cRasterizerState,
9156	sizeof(pBackendDXContext->papRasterizerState[0]), pDXContext->cot.cRasterizerState, cValidEntries);
9157	AssertRCBreak(rc);
9158
9159	for (uint32_t i = 0; i < cValidEntries; ++i)
9160	{
9161	SVGACOTableDXRasterizerStateEntry const *pEntry = &pDXContext->cot.paRasterizerState[i];
9162	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9163	continue; /* Skip uninitialized entry. */
9164
9165	dxDefineRasterizerState(pThisCC, pDXContext, i, pEntry);
9166	}
9167	break;
9168	case SVGA_COTABLE_SAMPLER:
9169	if (pBackendDXContext->papSamplerState)
9170	{
9171	for (uint32_t i = cValidEntries; i < pBackendDXContext->cSamplerState; ++i)
9172	D3D_RELEASE(pBackendDXContext->papSamplerState[i]);
9173	}
9174
9175	rc = dxCOTableRealloc((void **)&pBackendDXContext->papSamplerState, &pBackendDXContext->cSamplerState,
9176	sizeof(pBackendDXContext->papSamplerState[0]), pDXContext->cot.cSampler, cValidEntries);
9177	AssertRCBreak(rc);
9178
9179	for (uint32_t i = 0; i < cValidEntries; ++i)
9180	{
9181	SVGACOTableDXSamplerEntry const *pEntry = &pDXContext->cot.paSampler[i];
9182	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9183	continue; /* Skip uninitialized entry. */
9184
9185	dxDefineSamplerState(pThisCC, pDXContext, i, pEntry);
9186	}
9187	break;
9188	case SVGA_COTABLE_STREAMOUTPUT:
9189	if (pBackendDXContext->paStreamOutput)
9190	{
9191	for (uint32_t i = cValidEntries; i < pBackendDXContext->cStreamOutput; ++i)
9192	dxDestroyStreamOutput(&pBackendDXContext->paStreamOutput[i]);
9193	}
9194
9195	rc = dxCOTableRealloc((void **)&pBackendDXContext->paStreamOutput, &pBackendDXContext->cStreamOutput,
9196	sizeof(pBackendDXContext->paStreamOutput[0]), pDXContext->cot.cStreamOutput, cValidEntries);
9197	AssertRCBreak(rc);
9198
9199	for (uint32_t i = 0; i < cValidEntries; ++i)
9200	{
9201	SVGACOTableDXStreamOutputEntry const *pEntry = &pDXContext->cot.paStreamOutput[i];
9202	/** @todo The caller must verify the COTable content using same rules as when a new entry is defined. */
9203	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9204	continue; /* Skip uninitialized entry. */
9205
9206	/* Reset the stream output backend data. It will be re-created when a GS shader with this streamoutput
9207	* will be set in setupPipeline.
9208	*/
9209	DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[i];
9210	dxDestroyStreamOutput(pDXStreamOutput);
9211	}
9212	break;
9213	case SVGA_COTABLE_DXQUERY:
9214	if (pBackendDXContext->paQuery)
9215	{
9216	/* Destroy the no longer used entries. */
9217	for (uint32_t i = cValidEntries; i < pBackendDXContext->cQuery; ++i)
9218	dxDestroyQuery(&pBackendDXContext->paQuery[i]);
9219	}
9220
9221	rc = dxCOTableRealloc((void **)&pBackendDXContext->paQuery, &pBackendDXContext->cQuery,
9222	sizeof(pBackendDXContext->paQuery[0]), pDXContext->cot.cQuery, cValidEntries);
9223	AssertRCBreak(rc);
9224
9225	for (uint32_t i = 0; i < cValidEntries; ++i)
9226	{
9227	SVGACOTableDXQueryEntry const *pEntry = &pDXContext->cot.paQuery[i];
9228	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9229	continue; /* Skip uninitialized entry. */
9230
9231	/* Define queries which were not defined yet in backend. */
9232	DXQUERY *pDXQuery = &pBackendDXContext->paQuery[i];
9233	if ( pEntry->type != SVGA3D_QUERYTYPE_INVALID
9234	&& pDXQuery->pQuery == NULL)
9235	dxDefineQuery(pThisCC, pDXContext, i, pEntry);
9236	else
9237	Assert(pEntry->type == SVGA3D_QUERYTYPE_INVALID \|\| pDXQuery->pQuery);
9238	}
9239	break;
9240	case SVGA_COTABLE_DXSHADER:
9241	if (pBackendDXContext->paShader)
9242	{
9243	/* Destroy the no longer used entries. */
9244	for (uint32_t i = cValidEntries; i < pBackendDXContext->cShader; ++i)
9245	dxDestroyShader(&pBackendDXContext->paShader[i]);
9246	}
9247
9248	rc = dxCOTableRealloc((void **)&pBackendDXContext->paShader, &pBackendDXContext->cShader,
9249	sizeof(pBackendDXContext->paShader[0]), pDXContext->cot.cShader, cValidEntries);
9250	AssertRCBreak(rc);
9251
9252	for (uint32_t i = 0; i < cValidEntries; ++i)
9253	{
9254	SVGACOTableDXShaderEntry const *pEntry = &pDXContext->cot.paShader[i];
9255	/** @todo The caller must verify the COTable content using same rules as when a new entry is defined. */
9256	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9257	continue; /* Skip uninitialized entry. */
9258
9259	/* Define shaders which were not defined yet in backend. */
9260	DXSHADER *pDXShader = &pBackendDXContext->paShader[i];
9261	if ( pEntry->type != SVGA3D_SHADERTYPE_INVALID
9262	&& pDXShader->enmShaderType == SVGA3D_SHADERTYPE_INVALID)
9263	dxDefineShader(pDXContext, i, pEntry);
9264	else
9265	Assert(pEntry->type == pDXShader->enmShaderType);
9266
9267	}
9268	break;
9269	case SVGA_COTABLE_UAVIEW:
9270	if (pBackendDXContext->paUnorderedAccessView)
9271	{
9272	for (uint32_t i = 0; i < pBackendDXContext->cUnorderedAccessView; ++i)
9273	{
9274	DXVIEW *pDXView = &pBackendDXContext->paUnorderedAccessView[i];
9275	if (i < cValidEntries)
9276	dxViewRemoveFromList(pDXView); /* Remove from list because DXVIEW array will be reallocated. */
9277	else
9278	dxViewDestroy(pDXView);
9279	}
9280	}
9281
9282	rc = dxCOTableRealloc((void **)&pBackendDXContext->paUnorderedAccessView, &pBackendDXContext->cUnorderedAccessView,
9283	sizeof(pBackendDXContext->paUnorderedAccessView[0]), pDXContext->cot.cUAView, cValidEntries);
9284	AssertRCBreak(rc);
9285
9286	for (uint32_t i = 0; i < cValidEntries; ++i)
9287	{
9288	SVGACOTableDXUAViewEntry const *pEntry = &pDXContext->cot.paUAView[i];
9289	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9290	continue; /* Skip uninitialized entry. */
9291
9292	/* Define views which were not defined yet in backend. */
9293	DXVIEW *pDXView = &pBackendDXContext->paUnorderedAccessView[i];
9294	/** @todo Verify that the pEntry content still corresponds to the view. */
9295	if (pDXView->u.pView)
9296	dxViewAddToList(pThisCC, pDXView);
9297	}
9298	break;
9299	case SVGA_COTABLE_MAX: break; /* Compiler warning */
9300	case VBSVGA_COTABLE_VIDEOPROCESSOR:
9301	if (pBackendDXContext->paVideoProcessor)
9302	{
9303	/* Destroy the no longer used entries. */
9304	for (uint32_t i = cValidEntries; i < pBackendDXContext->cVideoProcessor; ++i)
9305	dxDestroyVideoProcessor(&pBackendDXContext->paVideoProcessor[i]);
9306	}
9307
9308	rc = dxCOTableRealloc((void **)&pBackendDXContext->paVideoProcessor, &pBackendDXContext->cVideoProcessor,
9309	sizeof(pBackendDXContext->paVideoProcessor[0]), pDXContext->cot.cVideoProcessor, cValidEntries);
9310	AssertRCBreak(rc);
9311
9312	for (uint32_t i = 0; i < cValidEntries; ++i)
9313	{
9314	VBSVGACOTableDXVideoProcessorEntry const *pEntry = &pDXContext->cot.paVideoProcessor[i];
9315	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9316	continue; /* Skip uninitialized entry. */
9317
9318	DXVIDEOPROCESSOR *pDXVideoProcessor = &pBackendDXContext->paVideoProcessor[i];
9319	if (pDXVideoProcessor->pVideoProcessor == NULL)
9320	dxCreateVideoProcessor(pThisCC, pDXContext, i, pEntry);
9321	}
9322	break;
9323	case VBSVGA_COTABLE_VDOV:
9324	if (pBackendDXContext->paVideoDecoderOutputView)
9325	{
9326	/* Destroy the no longer used entries. */
9327	for (uint32_t i = 0; i < pBackendDXContext->cVideoDecoderOutputView; ++i)
9328	{
9329	DXVIEW *pDXView = &pBackendDXContext->paVideoDecoderOutputView[i];
9330	if (i < cValidEntries)
9331	dxViewRemoveFromList(pDXView); /* Remove from list because DXVIEW array will be reallocated. */
9332	else
9333	dxViewDestroy(pDXView);
9334	}
9335	}
9336
9337	rc = dxCOTableRealloc((void **)&pBackendDXContext->paVideoDecoderOutputView, &pBackendDXContext->cVideoDecoderOutputView,
9338	sizeof(pBackendDXContext->paVideoDecoderOutputView[0]), pDXContext->cot.cVideoDecoderOutputView, cValidEntries);
9339	AssertRCBreak(rc);
9340
9341	for (uint32_t i = 0; i < cValidEntries; ++i)
9342	{
9343	VBSVGACOTableDXVideoDecoderOutputViewEntry const *pEntry = &pDXContext->cot.paVideoDecoderOutputView[i];
9344	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9345	continue; /* Skip uninitialized entry. */
9346
9347	DXVIEW *pDXView = &pBackendDXContext->paVideoDecoderOutputView[i];
9348	if (pDXView->u.pView)
9349	dxViewAddToList(pThisCC, pDXView);
9350	}
9351	break;
9352	case VBSVGA_COTABLE_VIDEODECODER:
9353	if (pBackendDXContext->paVideoDecoder)
9354	{
9355	/* Destroy the no longer used entries. */
9356	for (uint32_t i = cValidEntries; i < pBackendDXContext->cVideoDecoder; ++i)
9357	dxDestroyVideoDecoder(&pBackendDXContext->paVideoDecoder[i]);
9358	}
9359
9360	rc = dxCOTableRealloc((void **)&pBackendDXContext->paVideoDecoder, &pBackendDXContext->cVideoDecoder,
9361	sizeof(pBackendDXContext->paVideoDecoder[0]), pDXContext->cot.cVideoDecoder, cValidEntries);
9362	AssertRCBreak(rc);
9363
9364	for (uint32_t i = 0; i < cValidEntries; ++i)
9365	{
9366	VBSVGACOTableDXVideoDecoderEntry const *pEntry = &pDXContext->cot.paVideoDecoder[i];
9367	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9368	continue; /* Skip uninitialized entry. */
9369
9370	DXVIDEODECODER *pDXVideoDecoder = &pBackendDXContext->paVideoDecoder[i];
9371	if (pDXVideoDecoder->pVideoDecoder == NULL)
9372	dxCreateVideoDecoder(pThisCC, pDXContext, i, pEntry);
9373	}
9374	break;
9375	case VBSVGA_COTABLE_VPIV:
9376	if (pBackendDXContext->paVideoProcessorInputView)
9377	{
9378	/* Destroy the no longer used entries. */
9379	for (uint32_t i = 0; i < pBackendDXContext->cVideoProcessorInputView; ++i)
9380	{
9381	DXVIEW *pDXView = &pBackendDXContext->paVideoProcessorInputView[i];
9382	if (i < cValidEntries)
9383	dxViewRemoveFromList(pDXView); /* Remove from list because DXVIEW array will be reallocated. */
9384	else
9385	dxViewDestroy(pDXView);
9386	}
9387	}
9388
9389	rc = dxCOTableRealloc((void **)&pBackendDXContext->paVideoProcessorInputView, &pBackendDXContext->cVideoProcessorInputView,
9390	sizeof(pBackendDXContext->paVideoProcessorInputView[0]), pDXContext->cot.cVideoProcessorInputView, cValidEntries);
9391	AssertRCBreak(rc);
9392
9393	for (uint32_t i = 0; i < cValidEntries; ++i)
9394	{
9395	VBSVGACOTableDXVideoProcessorInputViewEntry const *pEntry = &pDXContext->cot.paVideoProcessorInputView[i];
9396	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9397	continue; /* Skip uninitialized entry. */
9398
9399	DXVIEW *pDXView = &pBackendDXContext->paVideoProcessorInputView[i];
9400	if (pDXView->u.pView)
9401	dxViewAddToList(pThisCC, pDXView);
9402	}
9403	break;
9404	case VBSVGA_COTABLE_VPOV:
9405	if (pBackendDXContext->paVideoProcessorOutputView)
9406	{
9407	/* Destroy the no longer used entries. */
9408	for (uint32_t i = 0; i < pBackendDXContext->cVideoProcessorOutputView; ++i)
9409	{
9410	DXVIEW *pDXView = &pBackendDXContext->paVideoProcessorOutputView[i];
9411	if (i < cValidEntries)
9412	dxViewRemoveFromList(pDXView); /* Remove from list because DXVIEW array will be reallocated. */
9413	else
9414	dxViewDestroy(pDXView);
9415	}
9416	}
9417
9418	rc = dxCOTableRealloc((void **)&pBackendDXContext->paVideoProcessorOutputView, &pBackendDXContext->cVideoProcessorOutputView,
9419	sizeof(pBackendDXContext->paVideoProcessorOutputView[0]), pDXContext->cot.cVideoProcessorOutputView, cValidEntries);
9420	AssertRCBreak(rc);
9421
9422	for (uint32_t i = 0; i < cValidEntries; ++i)
9423	{
9424	VBSVGACOTableDXVideoProcessorOutputViewEntry const *pEntry = &pDXContext->cot.paVideoProcessorOutputView[i];
9425	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9426	continue; /* Skip uninitialized entry. */
9427
9428	DXVIEW *pDXView = &pBackendDXContext->paVideoProcessorOutputView[i];
9429	if (pDXView->u.pView)
9430	dxViewAddToList(pThisCC, pDXView);
9431	}
9432	break;
9433	case VBSVGA_COTABLE_MAX: break; /* Compiler warning */
9434	#ifndef DEBUG_sunlover
9435	default: break; /* Compiler warning. */
9436	#endif
9437	}
9438	return rc;
9439	}
9440
9441
9442	static DECLCALLBACK(int) vmsvga3dBackDXBufferCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9443	{
9444	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9445
9446	RT_NOREF(pBackend, pDXContext);
9447	AssertFailed(); /** @todo Implement */
9448	return VERR_NOT_IMPLEMENTED;
9449	}
9450
9451
9452	static DECLCALLBACK(int) vmsvga3dBackDXSurfaceCopyAndReadback(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9453	{
9454	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9455
9456	RT_NOREF(pBackend, pDXContext);
9457	AssertFailed(); /** @todo Implement */
9458	return VERR_NOT_IMPLEMENTED;
9459	}
9460
9461
9462	static DECLCALLBACK(int) vmsvga3dBackDXMoveQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9463	{
9464	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9465
9466	RT_NOREF(pBackend, pDXContext);
9467	AssertFailed(); /** @todo Implement */
9468	return VERR_NOT_IMPLEMENTED;
9469	}
9470
9471
9472	static DECLCALLBACK(int) vmsvga3dBackDXBindAllShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9473	{
9474	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9475
9476	RT_NOREF(pBackend, pDXContext);
9477	AssertFailed(); /** @todo Implement */
9478	return VERR_NOT_IMPLEMENTED;
9479	}
9480
9481
9482	static DECLCALLBACK(int) vmsvga3dBackDXHint(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9483	{
9484	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9485
9486	RT_NOREF(pBackend, pDXContext);
9487	AssertFailed(); /** @todo Implement */
9488	return VERR_NOT_IMPLEMENTED;
9489	}
9490
9491
9492	static DECLCALLBACK(int) vmsvga3dBackDXBufferUpdate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9493	{
9494	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9495
9496	RT_NOREF(pBackend, pDXContext);
9497	AssertFailed(); /** @todo Implement */
9498	return VERR_NOT_IMPLEMENTED;
9499	}
9500
9501
9502	static DECLCALLBACK(int) vmsvga3dBackDXCondBindAllShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9503	{
9504	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9505
9506	RT_NOREF(pBackend, pDXContext);
9507	AssertFailed(); /** @todo Implement */
9508	return VERR_NOT_IMPLEMENTED;
9509	}
9510
9511
9512	static DECLCALLBACK(int) vmsvga3dBackScreenCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9513	{
9514	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9515
9516	RT_NOREF(pBackend, pDXContext);
9517	AssertFailed(); /** @todo Implement */
9518	return VERR_NOT_IMPLEMENTED;
9519	}
9520
9521
9522	static DECLCALLBACK(int) vmsvga3dBackIntraSurfaceCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceImageId const &surface, SVGA3dCopyBox const &box)
9523	{
9524	RT_NOREF(pDXContext);
9525
9526	LogFunc(("sid %u\n", surface.sid));
9527
9528	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
9529	AssertReturn(pState, VERR_INVALID_STATE);
9530
9531	PVMSVGA3DBACKEND pBackend = pState->pBackend;
9532
9533	PVMSVGA3DSURFACE pSurface;
9534	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, surface.sid, &pSurface);
9535	AssertRCReturn(rc, rc);
9536
9537	PVMSVGA3DMIPMAPLEVEL pMipLevel;
9538	rc = vmsvga3dMipmapLevel(pSurface, surface.face, surface.mipmap, &pMipLevel);
9539	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
9540
9541	/* Clip the box. */
9542	SVGA3dCopyBox clipBox = box;
9543	vmsvgaR3ClipCopyBox(&pMipLevel->mipmapSize, &pMipLevel->mipmapSize, &clipBox);
9544
9545	LogFunc(("surface%s sid = %u\n",
9546	pSurface->pBackendSurface ? "" : " sysmem", pSurface->id));
9547
9548	if (pSurface->pBackendSurface)
9549	{
9550	/* Surface -> Surface. */
9551	DXDEVICE *pDXDevice = &pBackend->dxDevice;
9552
9553	UINT DstSubresource = vmsvga3dCalcSubresource(surface.mipmap, surface.face, pSurface->cLevels);
9554	UINT DstX = clipBox.x;
9555	UINT DstY = clipBox.y;
9556	UINT DstZ = clipBox.z;
9557
9558	UINT SrcSubresource = DstSubresource;
9559	D3D11_BOX SrcBox;
9560	SrcBox.left = clipBox.srcx;
9561	SrcBox.top = clipBox.srcy;
9562	SrcBox.front = clipBox.srcz;
9563	SrcBox.right = clipBox.srcx + clipBox.w;
9564	SrcBox.bottom = clipBox.srcy + clipBox.h;
9565	SrcBox.back = clipBox.srcz + clipBox.d;
9566
9567	ID3D11Resource *pDstResource;
9568	ID3D11Resource *pSrcResource;
9569	pDstResource = dxResource(pState, pSurface, NULL);
9570	pSrcResource = pDstResource;
9571
9572	pDXDevice->pImmediateContext->CopySubresourceRegion1(pDstResource, DstSubresource, DstX, DstY, DstZ,
9573	pSrcResource, SrcSubresource, &SrcBox, 0);
9574	}
9575	else
9576	{
9577	/* Memory -> Memory. */
9578	uint32_t const cxBlocks = (clipBox.w + pSurface->cxBlock - 1) / pSurface->cxBlock;
9579	uint32_t const cyBlocks = (clipBox.h + pSurface->cyBlock - 1) / pSurface->cyBlock;
9580	uint32_t const cbRow = cxBlocks * pSurface->cbBlock;
9581
9582	uint8_t const pu8Src = (uint8_t )pMipLevel->pSurfaceData
9583	+ (clipBox.srcx / pSurface->cxBlock) * pSurface->cbBlock
9584	+ (clipBox.srcy / pSurface->cyBlock) * pMipLevel->cbSurfacePitch
9585	+ clipBox.srcz * pMipLevel->cbSurfacePlane;
9586
9587	uint8_t pu8Dst = (uint8_t )pMipLevel->pSurfaceData
9588	+ (clipBox.x / pSurface->cxBlock) * pSurface->cbBlock
9589	+ (clipBox.y / pSurface->cyBlock) * pMipLevel->cbSurfacePitch
9590	+ clipBox.z * pMipLevel->cbSurfacePlane;
9591
9592	for (uint32_t z = 0; z < clipBox.d; ++z)
9593	{
9594	uint8_t const *pu8PlaneSrc = pu8Src;
9595	uint8_t *pu8PlaneDst = pu8Dst;
9596
9597	for (uint32_t y = 0; y < cyBlocks; ++y)
9598	{
9599	memmove(pu8PlaneDst, pu8PlaneSrc, cbRow);
9600	pu8PlaneDst += pMipLevel->cbSurfacePitch;
9601	pu8PlaneSrc += pMipLevel->cbSurfacePitch;
9602	}
9603
9604	pu8Src += pMipLevel->cbSurfacePlane;
9605	pu8Dst += pMipLevel->cbSurfacePlane;
9606	}
9607	}
9608
9609	return rc;
9610	}
9611
9612
9613	static DECLCALLBACK(int) vmsvga3dBackDXResolveCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
9614	SVGA3dSurfaceId dstSid, uint32_t dstSubResource,
9615	SVGA3dSurfaceId srcSid, uint32_t srcSubResource, SVGA3dSurfaceFormat copyFormat)
9616	{
9617	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
9618	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
9619
9620	PVMSVGA3DSURFACE pSrcSurface;
9621	ID3D11Resource *pSrcResource;
9622	int rc = dxEnsureResource(pThisCC, pDXContext, srcSid, &pSrcSurface, &pSrcResource);
9623	AssertRCReturn(rc, rc);
9624
9625	PVMSVGA3DSURFACE pDstSurface;
9626	ID3D11Resource *pDstResource;
9627	rc = dxEnsureResource(pThisCC, pDXContext, dstSid, &pDstSurface, &pDstResource);
9628	AssertRCReturn(rc, rc);
9629
9630	LogFunc(("cid %d: src sid = %u -> dst sid = %u\n", pDXContext->cid, srcSid, dstSid));
9631
9632	DXGI_FORMAT const dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(copyFormat);
9633	pDXDevice->pImmediateContext->ResolveSubresource(pDstResource, dstSubResource, pSrcResource, srcSubResource, dxgiFormat);
9634
9635	return VINF_SUCCESS;
9636	}
9637
9638
9639	static DECLCALLBACK(int) vmsvga3dBackDXPredResolveCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9640	{
9641	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9642
9643	RT_NOREF(pBackend, pDXContext);
9644	AssertFailed(); /** @todo Implement */
9645	return VERR_NOT_IMPLEMENTED;
9646	}
9647
9648
9649	static DECLCALLBACK(int) vmsvga3dBackDXPredConvertRegion(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9650	{
9651	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9652
9653	RT_NOREF(pBackend, pDXContext);
9654	AssertFailed(); /** @todo Implement */
9655	return VERR_NOT_IMPLEMENTED;
9656	}
9657
9658
9659	static DECLCALLBACK(int) vmsvga3dBackDXPredConvert(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9660	{
9661	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9662
9663	RT_NOREF(pBackend, pDXContext);
9664	AssertFailed(); /** @todo Implement */
9665	return VERR_NOT_IMPLEMENTED;
9666	}
9667
9668
9669	static DECLCALLBACK(int) vmsvga3dBackWholeSurfaceCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9670	{
9671	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9672
9673	RT_NOREF(pBackend, pDXContext);
9674	AssertFailed(); /** @todo Implement */
9675	return VERR_NOT_IMPLEMENTED;
9676	}
9677
9678
9679	static DECLCALLBACK(int) vmsvga3dBackDXDefineUAView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId uaViewId, SVGACOTableDXUAViewEntry const *pEntry)
9680	{
9681	/* The view is created in setupPipeline or ClearView. */
9682	RT_NOREF(pThisCC, pDXContext, uaViewId, pEntry);
9683	return VINF_SUCCESS;
9684	}
9685
9686
9687	static DECLCALLBACK(int) vmsvga3dBackDXDestroyUAView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId uaViewId)
9688	{
9689	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9690	RT_NOREF(pBackend);
9691
9692	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paUnorderedAccessView[uaViewId];
9693	return dxViewDestroy(pDXView);
9694	}
9695
9696
9697	static DECLCALLBACK(int) vmsvga3dBackDXClearUAViewUint(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId uaViewId, uint32_t const aValues[4])
9698	{
9699	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
9700	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
9701
9702	DXVIEW *pDXView;
9703	int rc = dxEnsureUnorderedAccessView(pThisCC, pDXContext, uaViewId, &pDXView);
9704	AssertRCReturn(rc, rc);
9705
9706	pDXDevice->pImmediateContext->ClearUnorderedAccessViewUint(pDXView->u.pUnorderedAccessView, aValues);
9707	return VINF_SUCCESS;
9708	}
9709
9710
9711	static DECLCALLBACK(int) vmsvga3dBackDXClearUAViewFloat(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId uaViewId, float const aValues[4])
9712	{
9713	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
9714	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
9715
9716	DXVIEW *pDXView;
9717	int rc = dxEnsureUnorderedAccessView(pThisCC, pDXContext, uaViewId, &pDXView);
9718	AssertRCReturn(rc, rc);
9719
9720	pDXDevice->pImmediateContext->ClearUnorderedAccessViewFloat(pDXView->u.pUnorderedAccessView, aValues);
9721	return VINF_SUCCESS;
9722	}
9723
9724
9725	static DECLCALLBACK(int) vmsvga3dBackDXCopyStructureCount(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId srcUAViewId, SVGA3dSurfaceId destSid, uint32_t destByteOffset)
9726	{
9727	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
9728	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
9729
9730	/* Get corresponding resource. Create the buffer if does not yet exist. */
9731	ID3D11Buffer *pDstBuffer;
9732	if (destSid != SVGA3D_INVALID_ID)
9733	{
9734	PVMSVGA3DSURFACE pSurface;
9735	ID3D11Resource *pResource;
9736	int rc = dxEnsureResource(pThisCC, pDXContext, destSid, &pSurface, &pResource);
9737	AssertRCReturn(rc, rc);
9738	AssertReturn(pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER, VERR_INVALID_STATE);
9739
9740	pDstBuffer = (ID3D11Buffer *)pResource;
9741	}
9742	else
9743	pDstBuffer = NULL;
9744
9745	ID3D11UnorderedAccessView *pSrcView;
9746	if (srcUAViewId != SVGA3D_INVALID_ID)
9747	{
9748	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paUnorderedAccessView[srcUAViewId];
9749	AssertReturn(pDXView->u.pUnorderedAccessView, VERR_INVALID_STATE);
9750	pSrcView = pDXView->u.pUnorderedAccessView;
9751	}
9752	else
9753	pSrcView = NULL;
9754
9755	pDXDevice->pImmediateContext->CopyStructureCount(pDstBuffer, destByteOffset, pSrcView);
9756	return VINF_SUCCESS;
9757	}
9758
9759
9760	static DECLCALLBACK(int) vmsvga3dBackDXSetUAViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t uavSpliceIndex, uint32_t cUAViewId, SVGA3dUAViewId const *paUAViewId)
9761	{
9762	/* Views are set in setupPipeline. */
9763	RT_NOREF(pThisCC, pDXContext, uavSpliceIndex, cUAViewId, paUAViewId);
9764	return VINF_SUCCESS;
9765	}
9766
9767
9768	static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexedInstancedIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId argsBufferSid, uint32_t byteOffsetForArgs)
9769	{
9770	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9771	RT_NOREF(pBackend);
9772
9773	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
9774	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9775
9776	/* Get corresponding resource. Create the buffer if does not yet exist. */
9777	ID3D11Buffer *pBufferForArgs;
9778	if (argsBufferSid != SVGA_ID_INVALID)
9779	{
9780	PVMSVGA3DSURFACE pSurface;
9781	ID3D11Resource *pResource;
9782	int rc = dxEnsureResource(pThisCC, pDXContext, argsBufferSid, &pSurface, &pResource);
9783	AssertRCReturn(rc, rc);
9784	AssertReturn(pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER, VERR_INVALID_STATE);
9785
9786	pBufferForArgs = (ID3D11Buffer *)pResource;
9787	}
9788	else
9789	pBufferForArgs = NULL;
9790
9791	dxSetupPipeline(pThisCC, pDXContext);
9792
9793	Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
9794
9795	pDevice->pImmediateContext->DrawIndexedInstancedIndirect(pBufferForArgs, byteOffsetForArgs);
9796
9797	#ifdef DX_FLUSH_AFTER_DRAW
9798	dxDeviceFlush(pDevice);
9799	#endif
9800
9801	return VINF_SUCCESS;
9802	}
9803
9804
9805	static DECLCALLBACK(int) vmsvga3dBackDXDrawInstancedIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId argsBufferSid, uint32_t byteOffsetForArgs)
9806	{
9807	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9808	RT_NOREF(pBackend);
9809
9810	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
9811	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9812
9813	/* Get corresponding resource. Create the buffer if does not yet exist. */
9814	ID3D11Buffer *pBufferForArgs;
9815	if (argsBufferSid != SVGA_ID_INVALID)
9816	{
9817	PVMSVGA3DSURFACE pSurface;
9818	ID3D11Resource *pResource;
9819	int rc = dxEnsureResource(pThisCC, pDXContext, argsBufferSid, &pSurface, &pResource);
9820	AssertRCReturn(rc, rc);
9821	AssertReturn(pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER, VERR_INVALID_STATE);
9822
9823	pBufferForArgs = (ID3D11Buffer *)pResource;
9824	}
9825	else
9826	pBufferForArgs = NULL;
9827
9828	dxSetupPipeline(pThisCC, pDXContext);
9829
9830	Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
9831
9832	pDevice->pImmediateContext->DrawInstancedIndirect(pBufferForArgs, byteOffsetForArgs);
9833
9834	#ifdef DX_FLUSH_AFTER_DRAW
9835	dxDeviceFlush(pDevice);
9836	#endif
9837
9838	return VINF_SUCCESS;
9839	}
9840
9841
9842	static DECLCALLBACK(int) vmsvga3dBackDXDispatch(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t threadGroupCountX, uint32_t threadGroupCountY, uint32_t threadGroupCountZ)
9843	{
9844	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9845	RT_NOREF(pBackend);
9846
9847	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
9848	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9849
9850	dxSetupPipeline(pThisCC, pDXContext);
9851
9852	pDevice->pImmediateContext->Dispatch(threadGroupCountX, threadGroupCountY, threadGroupCountZ);
9853
9854	#ifdef DX_FLUSH_AFTER_DRAW
9855	dxDeviceFlush(pDevice);
9856	#endif
9857
9858	return VINF_SUCCESS;
9859	}
9860
9861
9862	static DECLCALLBACK(int) vmsvga3dBackDXDispatchIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9863	{
9864	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9865
9866	RT_NOREF(pBackend, pDXContext);
9867	AssertFailed(); /** @todo Implement */
9868	return VERR_NOT_IMPLEMENTED;
9869	}
9870
9871
9872	static DECLCALLBACK(int) vmsvga3dBackWriteZeroSurface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9873	{
9874	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9875
9876	RT_NOREF(pBackend, pDXContext);
9877	AssertFailed(); /** @todo Implement */
9878	return VERR_NOT_IMPLEMENTED;
9879	}
9880
9881
9882	static DECLCALLBACK(int) vmsvga3dBackHintZeroSurface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9883	{
9884	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9885
9886	RT_NOREF(pBackend, pDXContext);
9887	AssertFailed(); /** @todo Implement */
9888	return VERR_NOT_IMPLEMENTED;
9889	}
9890
9891
9892	static DECLCALLBACK(int) vmsvga3dBackDXTransferToBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9893	{
9894	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9895
9896	RT_NOREF(pBackend, pDXContext);
9897	AssertFailed(); /** @todo Implement */
9898	return VERR_NOT_IMPLEMENTED;
9899	}
9900
9901
9902	static DECLCALLBACK(int) vmsvga3dBackLogicOpsBitBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9903	{
9904	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9905
9906	RT_NOREF(pBackend, pDXContext);
9907	AssertFailed(); /** @todo Implement */
9908	return VERR_NOT_IMPLEMENTED;
9909	}
9910
9911
9912	static DECLCALLBACK(int) vmsvga3dBackLogicOpsTransBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9913	{
9914	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9915
9916	RT_NOREF(pBackend, pDXContext);
9917	AssertFailed(); /** @todo Implement */
9918	return VERR_NOT_IMPLEMENTED;
9919	}
9920
9921
9922	static DECLCALLBACK(int) vmsvga3dBackLogicOpsStretchBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9923	{
9924	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9925
9926	RT_NOREF(pBackend, pDXContext);
9927	AssertFailed(); /** @todo Implement */
9928	return VERR_NOT_IMPLEMENTED;
9929	}
9930
9931
9932	static DECLCALLBACK(int) vmsvga3dBackLogicOpsColorFill(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9933	{
9934	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9935
9936	RT_NOREF(pBackend, pDXContext);
9937	AssertFailed(); /** @todo Implement */
9938	return VERR_NOT_IMPLEMENTED;
9939	}
9940
9941
9942	static DECLCALLBACK(int) vmsvga3dBackLogicOpsAlphaBlend(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9943	{
9944	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9945
9946	RT_NOREF(pBackend, pDXContext);
9947	AssertFailed(); /** @todo Implement */
9948	return VERR_NOT_IMPLEMENTED;
9949	}
9950
9951
9952	static DECLCALLBACK(int) vmsvga3dBackLogicOpsClearTypeBlend(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9953	{
9954	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9955
9956	RT_NOREF(pBackend, pDXContext);
9957	AssertFailed(); /** @todo Implement */
9958	return VERR_NOT_IMPLEMENTED;
9959	}
9960
9961
9962	static int dxSetCSUnorderedAccessViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9963	{
9964	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
9965	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9966
9967	//DEBUG_BREAKPOINT_TEST();
9968	uint32_t const *pUAIds = &pDXContext->svgaDXContext.csuaViewIds[0];
9969	ID3D11UnorderedAccessView *papUnorderedAccessView[SVGA3D_DX11_1_MAX_UAVIEWS];
9970	UINT aUAVInitialCounts[SVGA3D_DX11_1_MAX_UAVIEWS];
9971	for (uint32_t i = 0; i < SVGA3D_DX11_1_MAX_UAVIEWS; ++i)
9972	{
9973	papUnorderedAccessView[i] = NULL;
9974	aUAVInitialCounts[i] = (UINT)-1;
9975
9976	SVGA3dUAViewId const uaViewId = pUAIds[i];
9977	if (uaViewId != SVGA3D_INVALID_ID)
9978	{
9979	ASSERT_GUEST_CONTINUE(uaViewId < pDXContext->cot.cUAView);
9980
9981	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paUnorderedAccessView[uaViewId];
9982	Assert(pDXView->u.pUnorderedAccessView);
9983	papUnorderedAccessView[i] = pDXView->u.pUnorderedAccessView;
9984
9985	SVGACOTableDXUAViewEntry const *pEntry = &pDXContext->cot.paUAView[uaViewId];
9986	aUAVInitialCounts[i] = pEntry->structureCount;
9987	}
9988	}
9989
9990	dxCSUnorderedAccessViewSet(pDevice, 0, SVGA3D_DX11_1_MAX_UAVIEWS, papUnorderedAccessView, aUAVInitialCounts);
9991	return VINF_SUCCESS;
9992	}
9993
9994
9995	static DECLCALLBACK(int) vmsvga3dBackDXSetCSUAViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startIndex, uint32_t cUAViewId, SVGA3dUAViewId const *paUAViewId)
9996	{
9997	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9998	RT_NOREF(pBackend);
9999
10000	DXDEVICE *pDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
10001	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
10002
10003	RT_NOREF(startIndex, cUAViewId, paUAViewId);
10004
10005	return VINF_SUCCESS;
10006	}
10007
10008
10009	static DECLCALLBACK(int) vmsvga3dBackDXSetMinLOD(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
10010	{
10011	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
10012
10013	RT_NOREF(pBackend, pDXContext);
10014	AssertFailed(); /** @todo Implement */
10015	return VERR_NOT_IMPLEMENTED;
10016	}
10017
10018
10019	static DECLCALLBACK(int) vmsvga3dBackDXSetShaderIface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
10020	{
10021	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
10022
10023	RT_NOREF(pBackend, pDXContext);
10024	AssertFailed(); /** @todo Implement */
10025	return VERR_NOT_IMPLEMENTED;
10026	}
10027
10028
10029	static DECLCALLBACK(int) vmsvga3dBackSurfaceStretchBltNonMSToMS(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
10030	{
10031	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
10032
10033	RT_NOREF(pBackend, pDXContext);
10034	AssertFailed(); /** @todo Implement */
10035	return VERR_NOT_IMPLEMENTED;
10036	}
10037
10038
10039	static DECLCALLBACK(int) vmsvga3dBackDXBindShaderIface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
10040	{
10041	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
10042
10043	RT_NOREF(pBackend, pDXContext);
10044	AssertFailed(); /** @todo Implement */
10045	return VERR_NOT_IMPLEMENTED;
10046	}
10047
10048
10049	/*
10050	*
10051	* Video decoding and processing callbacks.
10052	*
10053	*/
10054
10055	/*
10056	* Conversion between the device and D3D11 constants.
10057	*/
10058
10059	static D3D11_VIDEO_FRAME_FORMAT dxVideoFrameFormat(VBSVGA3dVideoFrameFormat FrameFormat)
10060	{
10061	switch (FrameFormat)
10062	{
10063	case VBSVGA3D_VIDEO_FRAME_FORMAT_PROGRESSIVE: return D3D11_VIDEO_FRAME_FORMAT_PROGRESSIVE;
10064	case VBSVGA3D_VIDEO_FRAME_FORMAT_INTERLACED_TOP_FIELD_FIRST: return D3D11_VIDEO_FRAME_FORMAT_INTERLACED_TOP_FIELD_FIRST;
10065	case VBSVGA3D_VIDEO_FRAME_FORMAT_INTERLACED_BOTTOM_FIELD_FIRST: return D3D11_VIDEO_FRAME_FORMAT_INTERLACED_BOTTOM_FIELD_FIRST;
10066	default:
10067	ASSERT_GUEST_FAILED();
10068	break;
10069	}
10070	return D3D11_VIDEO_FRAME_FORMAT_PROGRESSIVE;
10071	}
10072
10073
10074	static D3D11_VIDEO_USAGE dxVideoUsage(VBSVGA3dVideoUsage Usage)
10075	{
10076	switch (Usage)
10077	{
10078	case VBSVGA3D_VIDEO_USAGE_PLAYBACK_NORMAL: return D3D11_VIDEO_USAGE_PLAYBACK_NORMAL;
10079	case VBSVGA3D_VIDEO_USAGE_OPTIMAL_SPEED: return D3D11_VIDEO_USAGE_OPTIMAL_SPEED;
10080	case VBSVGA3D_VIDEO_USAGE_OPTIMAL_QUALITY: return D3D11_VIDEO_USAGE_OPTIMAL_QUALITY;
10081	default:
10082	ASSERT_GUEST_FAILED();
10083	break;
10084	}
10085	return D3D11_VIDEO_USAGE_PLAYBACK_NORMAL;
10086	}
10087
10088
10089	static D3D11_VDOV_DIMENSION dxVDOVDimension(VBSVGA3dVDOVDimension ViewDimension)
10090	{
10091	switch (ViewDimension)
10092	{
10093	case VBSVGA3D_VDOV_DIMENSION_UNKNOWN: return D3D11_VDOV_DIMENSION_UNKNOWN;
10094	case VBSVGA3D_VDOV_DIMENSION_TEXTURE2D: return D3D11_VDOV_DIMENSION_TEXTURE2D;
10095	default:
10096	ASSERT_GUEST_FAILED();
10097	break;
10098	}
10099	return D3D11_VDOV_DIMENSION_UNKNOWN;
10100	}
10101
10102
10103	static D3D11_VPIV_DIMENSION dxVPIVDimension(VBSVGA3dVPIVDimension ViewDimension)
10104	{
10105	switch (ViewDimension)
10106	{
10107	case VBSVGA3D_VPIV_DIMENSION_UNKNOWN: return D3D11_VPIV_DIMENSION_UNKNOWN;
10108	case VBSVGA3D_VPIV_DIMENSION_TEXTURE2D: return D3D11_VPIV_DIMENSION_TEXTURE2D;
10109	default:
10110	ASSERT_GUEST_FAILED();
10111	break;
10112	}
10113	return D3D11_VPIV_DIMENSION_UNKNOWN;
10114	}
10115
10116
10117	static D3D11_VPOV_DIMENSION dxVPOVDimension(VBSVGA3dVPOVDimension ViewDimension)
10118	{
10119	switch (ViewDimension)
10120	{
10121	case VBSVGA3D_VPOV_DIMENSION_UNKNOWN: return D3D11_VPOV_DIMENSION_UNKNOWN;
10122	case VBSVGA3D_VPOV_DIMENSION_TEXTURE2D: return D3D11_VPOV_DIMENSION_TEXTURE2D;
10123	case VBSVGA3D_VPOV_DIMENSION_TEXTURE2DARRAY: return D3D11_VPOV_DIMENSION_TEXTURE2DARRAY;
10124	default:
10125	ASSERT_GUEST_FAILED();
10126	break;
10127	}
10128	return D3D11_VPOV_DIMENSION_UNKNOWN;
10129	}
10130
10131
10132	static D3D11_VIDEO_DECODER_BUFFER_TYPE dxVideoDecoderBufferType(VBSVGA3dVideoDecoderBufferType BufferType)
10133	{
10134	switch (BufferType)
10135	{
10136	case VBSVGA3D_VD_BUFFER_PICTURE_PARAMETERS: return D3D11_VIDEO_DECODER_BUFFER_PICTURE_PARAMETERS;
10137	case VBSVGA3D_VD_BUFFER_MACROBLOCK_CONTROL: return D3D11_VIDEO_DECODER_BUFFER_MACROBLOCK_CONTROL;
10138	case VBSVGA3D_VD_BUFFER_RESIDUAL_DIFFERENCE: return D3D11_VIDEO_DECODER_BUFFER_RESIDUAL_DIFFERENCE;
10139	case VBSVGA3D_VD_BUFFER_DEBLOCKING_CONTROL: return D3D11_VIDEO_DECODER_BUFFER_DEBLOCKING_CONTROL;
10140	case VBSVGA3D_VD_BUFFER_INVERSE_QUANTIZATION_MATRIX: return D3D11_VIDEO_DECODER_BUFFER_INVERSE_QUANTIZATION_MATRIX;
10141	case VBSVGA3D_VD_BUFFER_SLICE_CONTROL: return D3D11_VIDEO_DECODER_BUFFER_SLICE_CONTROL;
10142	case VBSVGA3D_VD_BUFFER_BITSTREAM: return D3D11_VIDEO_DECODER_BUFFER_BITSTREAM;
10143	case VBSVGA3D_VD_BUFFER_MOTION_VECTOR: return D3D11_VIDEO_DECODER_BUFFER_MOTION_VECTOR;
10144	case VBSVGA3D_VD_BUFFER_FILM_GRAIN: return D3D11_VIDEO_DECODER_BUFFER_FILM_GRAIN;
10145	default:
10146	ASSERT_GUEST_FAILED();
10147	break;
10148	}
10149	return D3D11_VIDEO_DECODER_BUFFER_BITSTREAM;
10150	}
10151
10152
10153	/*
10154	* D3D11 wrappers.
10155	*/
10156
10157	static void dxVideoProcessorSetOutputTargetRect(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor, uint8 enable, SVGASignedRect const &outputRect)
10158	{
10159	RECT OutputRect;
10160	OutputRect.left = outputRect.left;
10161	OutputRect.top = outputRect.top;
10162	OutputRect.right = outputRect.right;
10163	OutputRect.bottom = outputRect.bottom;
10164
10165	pDXDevice->pVideoContext->VideoProcessorSetOutputTargetRect(pDXVideoProcessor->pVideoProcessor, RT_BOOL(enable), &OutputRect);
10166	}
10167
10168
10169	static void dxVideoProcessorSetOutputBackgroundColor(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor, uint32 YCbCr, VBSVGA3dVideoColor const &color)
10170	{
10171	D3D11_VIDEO_COLOR Color;
10172	Color.RGBA.R = color.r;
10173	Color.RGBA.G = color.g;
10174	Color.RGBA.B = color.b;
10175	Color.RGBA.A = color.a;
10176
10177	pDXDevice->pVideoContext->VideoProcessorSetOutputBackgroundColor(pDXVideoProcessor->pVideoProcessor, RT_BOOL(YCbCr), &Color);
10178	}
10179
10180
10181	static void dxVideoProcessorSetOutputColorSpace(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor, VBSVGA3dVideoProcessorColorSpace const &colorSpace)
10182	{
10183	D3D11_VIDEO_PROCESSOR_COLOR_SPACE ColorSpace;
10184	ColorSpace.Usage = colorSpace.Usage;
10185	ColorSpace.RGB_Range = colorSpace.RGB_Range;
10186	ColorSpace.YCbCr_Matrix = colorSpace.YCbCr_Matrix;
10187	ColorSpace.YCbCr_xvYCC = colorSpace.YCbCr_xvYCC;
10188	ColorSpace.Nominal_Range = colorSpace.Nominal_Range;
10189	ColorSpace.Reserved = colorSpace.Reserved;
10190
10191	pDXDevice->pVideoContext->VideoProcessorSetOutputColorSpace(pDXVideoProcessor->pVideoProcessor, &ColorSpace);
10192	}
10193
10194
10195	static void dxVideoProcessorSetOutputAlphaFillMode(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor, VBSVGA3dVideoProcessorAlphaFillMode fillMode, uint32 streamIndex)
10196	{
10197	D3D11_VIDEO_PROCESSOR_ALPHA_FILL_MODE AlphaFillMode = (D3D11_VIDEO_PROCESSOR_ALPHA_FILL_MODE)fillMode;
10198
10199	pDXDevice->pVideoContext->VideoProcessorSetOutputAlphaFillMode(pDXVideoProcessor->pVideoProcessor, AlphaFillMode, streamIndex);
10200	}
10201
10202
10203	static void dxVideoProcessorSetOutputConstriction(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor, uint32 enable, uint32 width, uint32 height)
10204	{
10205	SIZE Size;
10206	Size.cx = width;
10207	Size.cy = height;
10208
10209	pDXDevice->pVideoContext->VideoProcessorSetOutputConstriction(pDXVideoProcessor->pVideoProcessor, RT_BOOL(enable), Size);
10210	}
10211
10212
10213	static void dxVideoProcessorSetOutputStereoMode(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor, uint32 enable)
10214	{
10215	pDXDevice->pVideoContext->VideoProcessorSetOutputStereoMode(pDXVideoProcessor->pVideoProcessor, RT_BOOL(enable));
10216	}
10217
10218
10219	static void dxVideoProcessorSetStreamFrameFormat(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor, uint32 streamIndex, VBSVGA3dVideoFrameFormat format)
10220	{
10221	D3D11_VIDEO_FRAME_FORMAT FrameFormat = (D3D11_VIDEO_FRAME_FORMAT)format;
10222
10223	pDXDevice->pVideoContext->VideoProcessorSetStreamFrameFormat(pDXVideoProcessor->pVideoProcessor, streamIndex, FrameFormat);
10224	}
10225
10226
10227	static void dxVideoProcessorSetStreamColorSpace(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor, uint32 streamIndex, VBSVGA3dVideoProcessorColorSpace colorSpace)
10228	{
10229	D3D11_VIDEO_PROCESSOR_COLOR_SPACE ColorSpace;
10230	ColorSpace.Usage = colorSpace.Usage;
10231	ColorSpace.RGB_Range = colorSpace.RGB_Range;
10232	ColorSpace.YCbCr_Matrix = colorSpace.YCbCr_Matrix;
10233	ColorSpace.YCbCr_xvYCC = colorSpace.YCbCr_xvYCC;
10234	ColorSpace.Nominal_Range = colorSpace.Nominal_Range;
10235	ColorSpace.Reserved = colorSpace.Reserved;
10236
10237	pDXDevice->pVideoContext->VideoProcessorSetStreamColorSpace(pDXVideoProcessor->pVideoProcessor, streamIndex, &ColorSpace);
10238	}
10239
10240
10241	static void dxVideoProcessorSetStreamOutputRate(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor,
10242	uint32 streamIndex, VBSVGA3dVideoProcessorOutputRate outputRate, uint32 repeatFrame, SVGA3dFraction64 const &customRate)
10243	{
10244	D3D11_VIDEO_PROCESSOR_OUTPUT_RATE OutputRate = (D3D11_VIDEO_PROCESSOR_OUTPUT_RATE)outputRate;
10245	DXGI_RATIONAL CustomRate;
10246	CustomRate.Numerator = customRate.numerator;
10247	CustomRate.Denominator = customRate.denominator;
10248
10249	pDXDevice->pVideoContext->VideoProcessorSetStreamOutputRate(pDXVideoProcessor->pVideoProcessor, streamIndex, OutputRate, RT_BOOL(repeatFrame), &CustomRate);
10250	}
10251
10252
10253	static void dxVideoProcessorSetStreamSourceRect(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor,
10254	uint32 streamIndex, uint32 enable, SVGASignedRect const &sourceRect)
10255	{
10256	RECT Rect;
10257	Rect.left = sourceRect.left;
10258	Rect.top = sourceRect.top;
10259	Rect.right = sourceRect.right;
10260	Rect.bottom = sourceRect.bottom;
10261
10262	pDXDevice->pVideoContext->VideoProcessorSetStreamSourceRect(pDXVideoProcessor->pVideoProcessor, streamIndex, RT_BOOL(enable), &Rect);
10263	}
10264
10265
10266	static void dxVideoProcessorSetStreamDestRect(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor,
10267	uint32 streamIndex, uint32 enable, SVGASignedRect const &destRect)
10268	{
10269	RECT Rect;
10270	Rect.left = destRect.left;
10271	Rect.top = destRect.top;
10272	Rect.right = destRect.right;
10273	Rect.bottom = destRect.bottom;
10274
10275	pDXDevice->pVideoContext->VideoProcessorSetStreamDestRect(pDXVideoProcessor->pVideoProcessor, streamIndex, RT_BOOL(enable), &Rect);
10276	}
10277
10278
10279	static void dxVideoProcessorSetStreamAlpha(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor,
10280	uint32 streamIndex, uint32 enable, float alpha)
10281	{
10282	pDXDevice->pVideoContext->VideoProcessorSetStreamAlpha(pDXVideoProcessor->pVideoProcessor, streamIndex, RT_BOOL(enable), alpha);
10283	}
10284
10285
10286	static void dxVideoProcessorSetStreamPalette(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor,
10287	uint32 streamIndex, uint32_t cEntries, uint32_t const *paEntries)
10288	{
10289	pDXDevice->pVideoContext->VideoProcessorSetStreamPalette(pDXVideoProcessor->pVideoProcessor, streamIndex, cEntries, paEntries);
10290	}
10291
10292
10293	static void dxVideoProcessorSetStreamPixelAspectRatio(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor,
10294	uint32 streamIndex, uint32 enable, SVGA3dFraction64 const &sourceRatio, SVGA3dFraction64 const &destRatio)
10295	{
10296	DXGI_RATIONAL SourceAspectRatio;
10297	SourceAspectRatio.Numerator = sourceRatio.numerator;
10298	SourceAspectRatio.Denominator = sourceRatio.denominator;
10299
10300	DXGI_RATIONAL DestinationAspectRatio;
10301	DestinationAspectRatio.Numerator = destRatio.numerator;
10302	DestinationAspectRatio.Denominator = destRatio.denominator;
10303
10304	pDXDevice->pVideoContext->VideoProcessorSetStreamPixelAspectRatio(pDXVideoProcessor->pVideoProcessor, streamIndex, RT_BOOL(enable), &SourceAspectRatio, &DestinationAspectRatio);
10305	}
10306
10307
10308	static void dxVideoProcessorSetStreamLumaKey(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor,
10309	uint32 streamIndex, uint32 enable, float lower, float upper)
10310	{
10311	pDXDevice->pVideoContext->VideoProcessorSetStreamLumaKey(pDXVideoProcessor->pVideoProcessor, streamIndex, RT_BOOL(enable), lower, upper);
10312	}
10313
10314
10315	static void dxVideoProcessorSetStreamStereoFormat(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor,
10316	uint32 streamIndex, uint32 enable, VBSVGA3dVideoProcessorStereoFormat stereoFormat,
10317	uint8 leftViewFrame0, uint8 baseViewFrame0, VBSVGA3dVideoProcessorStereoFlipMode flipMode, int32 monoOffset)
10318	{
10319	D3D11_VIDEO_PROCESSOR_STEREO_FORMAT Format = (D3D11_VIDEO_PROCESSOR_STEREO_FORMAT)stereoFormat;
10320	D3D11_VIDEO_PROCESSOR_STEREO_FLIP_MODE FlipMode = (D3D11_VIDEO_PROCESSOR_STEREO_FLIP_MODE)flipMode;
10321
10322	pDXDevice->pVideoContext->VideoProcessorSetStreamStereoFormat(pDXVideoProcessor->pVideoProcessor, streamIndex, RT_BOOL(enable), Format, RT_BOOL(leftViewFrame0), RT_BOOL(baseViewFrame0), FlipMode, monoOffset);
10323	}
10324
10325
10326	static void dxVideoProcessorSetStreamAutoProcessingMode(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor,
10327	uint32 streamIndex, uint32 enable)
10328	{
10329	pDXDevice->pVideoContext->VideoProcessorSetStreamAutoProcessingMode(pDXVideoProcessor->pVideoProcessor, streamIndex, RT_BOOL(enable));
10330	}
10331
10332
10333	static void dxVideoProcessorSetStreamFilter(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor,
10334	uint32 streamIndex, uint32 enable, VBSVGA3dVideoProcessorFilter filter, int32 level)
10335	{
10336	D3D11_VIDEO_PROCESSOR_FILTER Filter = (D3D11_VIDEO_PROCESSOR_FILTER)filter;
10337
10338	pDXDevice->pVideoContext->VideoProcessorSetStreamFilter(pDXVideoProcessor->pVideoProcessor, streamIndex, Filter, RT_BOOL(enable), level);
10339	}
10340
10341
10342	static void dxVideoProcessorSetStreamRotation(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor,
10343	uint32 streamIndex, uint32 enable, VBSVGA3dVideoProcessorRotation rotation)
10344	{
10345	D3D11_VIDEO_PROCESSOR_ROTATION Rotation = (D3D11_VIDEO_PROCESSOR_ROTATION)rotation;
10346
10347	pDXDevice->pVideoContext->VideoProcessorSetStreamRotation(pDXVideoProcessor->pVideoProcessor, streamIndex, RT_BOOL(enable), Rotation);
10348	}
10349
10350
10351	static int dxCreateVideoDecoderOutputView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoDecoderOutputViewId videoDecoderOutputViewId, VBSVGACOTableDXVideoDecoderOutputViewEntry const *pEntry)
10352	{
10353	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
10354	AssertReturn(pDXDevice->pVideoDevice, VERR_INVALID_STATE);
10355
10356	PVMSVGA3DSURFACE pSurface;
10357	ID3D11Resource *pResource;
10358	int rc = dxEnsureResource(pThisCC, pDXContext, pEntry->sid, &pSurface, &pResource);
10359	AssertRCReturn(rc, rc);
10360
10361	DXVIEW *pView = &pDXContext->pBackendDXContext->paVideoDecoderOutputView[videoDecoderOutputViewId];
10362	Assert(pView->u.pView == NULL);
10363
10364	D3D11_VIDEO_DECODER_OUTPUT_VIEW_DESC Desc;
10365	RT_ZERO(Desc);
10366	memcpy(&Desc.DecodeProfile, &pEntry->desc.DecodeProfile, sizeof(GUID));
10367	Desc.ViewDimension = dxVDOVDimension(pEntry->desc.ViewDimension);
10368	Desc.Texture2D.ArraySlice = pEntry->desc.Texture2D.ArraySlice;
10369
10370	ID3D11VideoDecoderOutputView *pVDOView;
10371	HRESULT hr = pDXDevice->pVideoDevice->CreateVideoDecoderOutputView(pResource, &Desc, &pVDOView);
10372	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
10373
10374	return dxViewInit(pView, pSurface, pDXContext, videoDecoderOutputViewId, VMSVGA3D_VIEWTYPE_VIDEODECODEROUTPUT, pVDOView);
10375	}
10376
10377
10378	static int dxCreateVideoProcessorInputView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorInputViewId videoProcessorInputViewId, VBSVGACOTableDXVideoProcessorInputViewEntry const *pEntry)
10379	{
10380	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
10381	AssertReturn(pDXDevice->pVideoDevice, VERR_INVALID_STATE);
10382
10383	PVMSVGA3DSURFACE pSurface;
10384	ID3D11Resource *pResource;
10385	int rc = dxEnsureResource(pThisCC, pDXContext, pEntry->sid, &pSurface, &pResource);
10386	AssertRCReturn(rc, rc);
10387
10388	DXVIEW *pView = &pDXContext->pBackendDXContext->paVideoProcessorInputView[videoProcessorInputViewId];
10389	Assert(pView->u.pView == NULL);
10390
10391	D3D11_VIDEO_PROCESSOR_CONTENT_DESC ContentDesc;
10392	RT_ZERO(ContentDesc);
10393	ContentDesc.InputFrameFormat = dxVideoFrameFormat(pEntry->contentDesc.InputFrameFormat);
10394	ContentDesc.InputFrameRate.Numerator = pEntry->contentDesc.InputFrameRate.numerator;
10395	ContentDesc.InputFrameRate.Denominator = pEntry->contentDesc.InputFrameRate.denominator;
10396	ContentDesc.InputWidth = pEntry->contentDesc.InputWidth;
10397	ContentDesc.InputHeight = pEntry->contentDesc.InputHeight;
10398	ContentDesc.OutputFrameRate.Numerator = pEntry->contentDesc.OutputFrameRate.numerator;
10399	ContentDesc.OutputFrameRate.Denominator = pEntry->contentDesc.OutputFrameRate.denominator;
10400	ContentDesc.OutputWidth = pEntry->contentDesc.OutputWidth;
10401	ContentDesc.OutputHeight = pEntry->contentDesc.OutputHeight;
10402	ContentDesc.Usage = dxVideoUsage(pEntry->contentDesc.Usage);
10403
10404	ID3D11VideoProcessorEnumerator *pEnum;
10405	HRESULT hr = pDXDevice->pVideoDevice->CreateVideoProcessorEnumerator(&ContentDesc, &pEnum);
10406	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
10407
10408	D3D11_VIDEO_PROCESSOR_INPUT_VIEW_DESC Desc;
10409	RT_ZERO(Desc);
10410	Desc.FourCC = pEntry->desc.FourCC;
10411	Desc.ViewDimension = dxVPIVDimension(pEntry->desc.ViewDimension);
10412	Desc.Texture2D.MipSlice = pEntry->desc.Texture2D.MipSlice;
10413	Desc.Texture2D.ArraySlice = pEntry->desc.Texture2D.ArraySlice;
10414
10415	ID3D11VideoProcessorInputView *pVPIView;
10416	hr = pDXDevice->pVideoDevice->CreateVideoProcessorInputView(pResource, pEnum, &Desc, &pVPIView);
10417	D3D_RELEASE(pEnum);
10418	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
10419
10420	return dxViewInit(pView, pSurface, pDXContext, videoProcessorInputViewId, VMSVGA3D_VIEWTYPE_VIDEOPROCESSORINPUT, pVPIView);
10421	}
10422
10423
10424	static int dxCreateVideoProcessorOutputView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorOutputViewId videoProcessorOutputViewId, VBSVGACOTableDXVideoProcessorOutputViewEntry const *pEntry)
10425	{
10426	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
10427	AssertReturn(pDXDevice->pVideoDevice, VERR_INVALID_STATE);
10428
10429	PVMSVGA3DSURFACE pSurface;
10430	ID3D11Resource *pResource;
10431	int rc = dxEnsureResource(pThisCC, pDXContext, pEntry->sid, &pSurface, &pResource);
10432	AssertRCReturn(rc, rc);
10433
10434	DXVIEW *pView = &pDXContext->pBackendDXContext->paVideoProcessorOutputView[videoProcessorOutputViewId];
10435	Assert(pView->u.pView == NULL);
10436
10437	D3D11_VIDEO_PROCESSOR_CONTENT_DESC ContentDesc;
10438	RT_ZERO(ContentDesc);
10439	ContentDesc.InputFrameFormat = dxVideoFrameFormat(pEntry->contentDesc.InputFrameFormat);
10440	ContentDesc.InputFrameRate.Numerator = pEntry->contentDesc.InputFrameRate.numerator;
10441	ContentDesc.InputFrameRate.Denominator = pEntry->contentDesc.InputFrameRate.denominator;
10442	ContentDesc.InputWidth = pEntry->contentDesc.InputWidth;
10443	ContentDesc.InputHeight = pEntry->contentDesc.InputHeight;
10444	ContentDesc.OutputFrameRate.Numerator = pEntry->contentDesc.OutputFrameRate.numerator;
10445	ContentDesc.OutputFrameRate.Denominator = pEntry->contentDesc.OutputFrameRate.denominator;
10446	ContentDesc.OutputWidth = pEntry->contentDesc.OutputWidth;
10447	ContentDesc.OutputHeight = pEntry->contentDesc.OutputHeight;
10448	ContentDesc.Usage = dxVideoUsage(pEntry->contentDesc.Usage);
10449
10450	ID3D11VideoProcessorEnumerator *pEnum;
10451	HRESULT hr = pDXDevice->pVideoDevice->CreateVideoProcessorEnumerator(&ContentDesc, &pEnum);
10452	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
10453
10454	D3D11_VIDEO_PROCESSOR_OUTPUT_VIEW_DESC Desc;
10455	RT_ZERO(Desc);
10456	Desc.ViewDimension = dxVPOVDimension(pEntry->desc.ViewDimension);
10457	if (Desc.ViewDimension == D3D11_VPOV_DIMENSION_TEXTURE2D)
10458	{
10459	Desc.Texture2D.MipSlice = pEntry->desc.Texture2D.MipSlice;
10460	}
10461	else if (Desc.ViewDimension == D3D11_VPOV_DIMENSION_TEXTURE2DARRAY)
10462	{
10463	Desc.Texture2DArray.MipSlice = pEntry->desc.Texture2DArray.MipSlice;
10464	Desc.Texture2DArray.FirstArraySlice = pEntry->desc.Texture2DArray.FirstArraySlice;
10465	Desc.Texture2DArray.ArraySize = pEntry->desc.Texture2DArray.ArraySize;
10466	}
10467
10468	ID3D11VideoProcessorOutputView *pVPOView;
10469	hr = pDXDevice->pVideoDevice->CreateVideoProcessorOutputView(pResource, pEnum, &Desc, &pVPOView);
10470	D3D_RELEASE(pEnum);
10471	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
10472
10473	return dxViewInit(pView, pSurface, pDXContext, videoProcessorOutputViewId, VMSVGA3D_VIEWTYPE_VIDEOPROCESSOROUTPUT, pVPOView);
10474	}
10475
10476
10477	static int dxEnsureVideoDecoderOutputView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoDecoderOutputViewId viewId, DXVIEW **ppResult)
10478	{
10479	ASSERT_GUEST_RETURN(viewId < pDXContext->cot.cVideoDecoderOutputView, VERR_INVALID_PARAMETER);
10480
10481	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paVideoDecoderOutputView[viewId];
10482	if (!pDXView->u.pView)
10483	{
10484	VBSVGACOTableDXVideoDecoderOutputViewEntry const *pEntry = &pDXContext->cot.paVideoDecoderOutputView[viewId];
10485	int rc = dxCreateVideoDecoderOutputView(pThisCC, pDXContext, viewId, pEntry);
10486	AssertRCReturn(rc, rc);
10487	}
10488	*ppResult = pDXView;
10489	return VINF_SUCCESS;
10490	}
10491
10492
10493	static int dxEnsureVideoProcessorInputView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorInputViewId viewId, DXVIEW **ppResult)
10494	{
10495	ASSERT_GUEST_RETURN(viewId < pDXContext->cot.cVideoProcessorInputView, VERR_INVALID_PARAMETER);
10496
10497	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paVideoProcessorInputView[viewId];
10498	if (!pDXView->u.pView)
10499	{
10500	VBSVGACOTableDXVideoProcessorInputViewEntry const *pEntry = &pDXContext->cot.paVideoProcessorInputView[viewId];
10501	int rc = dxCreateVideoProcessorInputView(pThisCC, pDXContext, viewId, pEntry);
10502	AssertRCReturn(rc, rc);
10503	}
10504	*ppResult = pDXView;
10505	return VINF_SUCCESS;
10506	}
10507
10508
10509	static int dxEnsureVideoProcessorOutputView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorOutputViewId viewId, DXVIEW **ppResult)
10510	{
10511	ASSERT_GUEST_RETURN(viewId < pDXContext->cot.cVideoProcessorOutputView, VERR_INVALID_PARAMETER);
10512
10513	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paVideoProcessorOutputView[viewId];
10514	if (!pDXView->u.pView)
10515	{
10516	VBSVGACOTableDXVideoProcessorOutputViewEntry const *pEntry = &pDXContext->cot.paVideoProcessorOutputView[viewId];
10517	int rc = dxCreateVideoProcessorOutputView(pThisCC, pDXContext, viewId, pEntry);
10518	AssertRCReturn(rc, rc);
10519	}
10520	*ppResult = pDXView;
10521	return VINF_SUCCESS;
10522	}
10523
10524
10525	static int dxVideoDecoderBeginFrame(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
10526	VBSVGA3dVideoDecoderId videoDecoderId,
10527	VBSVGA3dVideoDecoderOutputViewId videoDecoderOutputViewId)
10528	{
10529	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
10530	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
10531
10532	DXVIDEODECODER *pDXVideoDecoder = &pDXContext->pBackendDXContext->paVideoDecoder[videoDecoderId];
10533
10534	DXVIEW *pDXView;
10535	int rc = dxEnsureVideoDecoderOutputView(pThisCC, pDXContext, videoDecoderOutputViewId, &pDXView);
10536	AssertRCReturn(rc, rc);
10537
10538	HRESULT hr = pDXDevice->pVideoContext->DecoderBeginFrame(pDXVideoDecoder->pVideoDecoder,
10539	pDXView->u.pVideoDecoderOutputView,
10540	0, NULL);
10541	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
10542
10543	return VINF_SUCCESS;
10544	}
10545
10546
10547	static void dxSetupVideoProcessor(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor, VBSVGACOTableDXVideoProcessorEntry const *pEntry)
10548	{
10549	if (pEntry->output.SetMask & VBSVGA3D_VP_SET_OUTPUT_TARGET_RECT)
10550	dxVideoProcessorSetOutputTargetRect(pDXDevice, pDXVideoProcessor, pEntry->output.TargetRectEnable, pEntry->output.TargetRect);
10551
10552	if (pEntry->output.SetMask & VBSVGA3D_VP_SET_OUTPUT_BACKGROUND_COLOR)
10553	dxVideoProcessorSetOutputBackgroundColor(pDXDevice, pDXVideoProcessor, pEntry->output.BackgroundColorYCbCr, pEntry->output.BackgroundColor);
10554
10555	if (pEntry->output.SetMask & VBSVGA3D_VP_SET_OUTPUT_COLOR_SPACE)
10556	dxVideoProcessorSetOutputColorSpace(pDXDevice, pDXVideoProcessor, pEntry->output.ColorSpace);
10557
10558	if (pEntry->output.SetMask & VBSVGA3D_VP_SET_OUTPUT_ALPHA_FILL_MODE)
10559	dxVideoProcessorSetOutputAlphaFillMode(pDXDevice, pDXVideoProcessor, pEntry->output.AlphaFillMode, pEntry->output.AlphaFillStreamIndex);
10560
10561	if (pEntry->output.SetMask & VBSVGA3D_VP_SET_OUTPUT_CONSTRICTION)
10562	dxVideoProcessorSetOutputConstriction(pDXDevice, pDXVideoProcessor, pEntry->output.ConstrictionEnable, pEntry->output.ConstrictionWidth, pEntry->output.ConstrictionHeight);
10563
10564	if (pEntry->output.SetMask & VBSVGA3D_VP_SET_OUTPUT_STEREO_MODE)
10565	dxVideoProcessorSetOutputStereoMode(pDXDevice, pDXVideoProcessor, pEntry->output.StereoModeEnable);
10566
10567	for (uint32_t i = 0; i < RT_ELEMENTS(pEntry->aStreamState); ++i)
10568	{
10569	VBSVGA3dVideoProcessorStreamState const *pStreamState = &pEntry->aStreamState[i];
10570	if (pStreamState->SetMask & VBSVGA3D_VP_SET_STREAM_FRAME_FORMAT)
10571	dxVideoProcessorSetStreamFrameFormat(pDXDevice, pDXVideoProcessor, i, pStreamState->FrameFormat);
10572
10573	if (pStreamState->SetMask & VBSVGA3D_VP_SET_STREAM_COLOR_SPACE)
10574	dxVideoProcessorSetStreamColorSpace(pDXDevice, pDXVideoProcessor, i, pStreamState->ColorSpace);
10575
10576	if (pStreamState->SetMask & VBSVGA3D_VP_SET_STREAM_OUTPUT_RATE)
10577	dxVideoProcessorSetStreamOutputRate(pDXDevice, pDXVideoProcessor, i, pStreamState->OutputRate, pStreamState->RepeatFrame, pStreamState->CustomRate);
10578
10579	if (pStreamState->SetMask & VBSVGA3D_VP_SET_STREAM_SOURCE_RECT)
10580	dxVideoProcessorSetStreamSourceRect(pDXDevice, pDXVideoProcessor, i, pStreamState->SourceRectEnable, pStreamState->SourceRect);
10581
10582	if (pStreamState->SetMask & VBSVGA3D_VP_SET_STREAM_DEST_RECT)
10583	dxVideoProcessorSetStreamDestRect(pDXDevice, pDXVideoProcessor, i, pStreamState->DestRectEnable, pStreamState->DestRect);
10584
10585	if (pStreamState->SetMask & VBSVGA3D_VP_SET_STREAM_ALPHA)
10586	dxVideoProcessorSetStreamAlpha(pDXDevice, pDXVideoProcessor, i, pStreamState->AlphaEnable, pStreamState->Alpha);
10587
10588	if (pStreamState->SetMask & VBSVGA3D_VP_SET_STREAM_PALETTE)
10589	dxVideoProcessorSetStreamPalette(pDXDevice, pDXVideoProcessor, i, pStreamState->PaletteCount, &pStreamState->aPalette[0]);\
10590
10591	if (pStreamState->SetMask & VBSVGA3D_VP_SET_STREAM_ASPECT_RATIO)
10592	dxVideoProcessorSetStreamPixelAspectRatio(pDXDevice, pDXVideoProcessor, i, pStreamState->AspectRatioEnable, pStreamState->AspectSourceRatio, pStreamState->AspectDestRatio);
10593
10594	if (pStreamState->SetMask & VBSVGA3D_VP_SET_STREAM_LUMA_KEY)
10595	dxVideoProcessorSetStreamLumaKey(pDXDevice, pDXVideoProcessor, i, pStreamState->LumaKeyEnable, pStreamState->LumaKeyLower, pStreamState->LumaKeyUpper);
10596
10597	if (pStreamState->SetMask & VBSVGA3D_VP_SET_STREAM_STEREO_FORMAT)
10598	dxVideoProcessorSetStreamStereoFormat(pDXDevice, pDXVideoProcessor, i, pStreamState->StereoFormatEnable, pStreamState->StereoFormat,
10599	pStreamState->LeftViewFrame0, pStreamState->BaseViewFrame0, pStreamState->FlipMode, pStreamState->MonoOffset);
10600
10601	if (pStreamState->SetMask & VBSVGA3D_VP_SET_STREAM_AUTO_PROCESSING_MODE)
10602	dxVideoProcessorSetStreamAutoProcessingMode(pDXDevice, pDXVideoProcessor, i, pStreamState->AutoProcessingModeEnable);
10603
10604	if (pStreamState->SetMask & VBSVGA3D_VP_SET_STREAM_FILTER)
10605	{
10606	for (uint32_t idxFilter = 0; idxFilter < VBSVGA3D_VP_MAX_FILTER_COUNT; ++idxFilter)
10607	{
10608	uint32_t const enable = pStreamState->FilterEnableMask & ~(1 << idxFilter);
10609	int32 const level = pStreamState->aFilter[idxFilter].Level;
10610	dxVideoProcessorSetStreamFilter(pDXDevice, pDXVideoProcessor, i, enable, (VBSVGA3dVideoProcessorFilter)idxFilter, level);
10611	}
10612	}
10613
10614	if (pStreamState->SetMask & VBSVGA3D_VP_SET_STREAM_ROTATION)
10615	dxVideoProcessorSetStreamRotation(pDXDevice, pDXVideoProcessor, i, pStreamState->RotationEnable, pStreamState->Rotation);
10616	}
10617	}
10618
10619
10620	static int dxCreateVideoProcessor(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId, VBSVGACOTableDXVideoProcessorEntry const *pEntry)
10621	{
10622	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
10623	AssertReturn(pDXDevice->pVideoDevice, VERR_INVALID_STATE);
10624
10625	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
10626
10627	D3D11_VIDEO_PROCESSOR_CONTENT_DESC Desc;
10628	RT_ZERO(Desc);
10629	Desc.InputFrameFormat = dxVideoFrameFormat(pEntry->desc.InputFrameFormat);
10630	Desc.InputFrameRate.Numerator = pEntry->desc.InputFrameRate.numerator;
10631	Desc.InputFrameRate.Denominator = pEntry->desc.InputFrameRate.denominator;
10632	Desc.InputWidth = pEntry->desc.InputWidth;
10633	Desc.InputHeight = pEntry->desc.InputHeight;
10634	Desc.OutputFrameRate.Numerator = pEntry->desc.OutputFrameRate.numerator;
10635	Desc.OutputFrameRate.Denominator = pEntry->desc.OutputFrameRate.denominator;
10636	Desc.OutputWidth = pEntry->desc.OutputWidth;
10637	Desc.OutputHeight = pEntry->desc.OutputHeight;
10638	Desc.Usage = dxVideoUsage(pEntry->desc.Usage);
10639
10640	HRESULT hr = pDXDevice->pVideoDevice->CreateVideoProcessorEnumerator(&Desc, &pDXVideoProcessor->pEnum);
10641	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
10642
10643	hr = pDXDevice->pVideoDevice->CreateVideoProcessor(pDXVideoProcessor->pEnum, 0, &pDXVideoProcessor->pVideoProcessor);
10644	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
10645
10646	dxSetupVideoProcessor(pDXDevice, pDXVideoProcessor, pEntry);
10647	return VINF_SUCCESS;
10648	}
10649
10650
10651	static void dxDestroyVideoProcessor(DXVIDEOPROCESSOR *pDXVideoProcessor)
10652	{
10653	D3D_RELEASE(pDXVideoProcessor->pEnum);
10654	D3D_RELEASE(pDXVideoProcessor->pVideoProcessor);
10655	}
10656
10657
10658	static int dxCreateVideoDecoder(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoDecoderId videoDecoderId, VBSVGACOTableDXVideoDecoderEntry const *pEntry)
10659	{
10660	HRESULT hr;
10661
10662	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
10663	AssertReturn(pDXDevice->pVideoDevice, VERR_INVALID_STATE);
10664
10665	DXVIDEODECODER *pDXVideoDecoder = &pDXContext->pBackendDXContext->paVideoDecoder[videoDecoderId];
10666
10667	D3D11_VIDEO_DECODER_DESC VideoDesc;
10668	RT_ZERO(VideoDesc);
10669	memcpy(&VideoDesc.Guid, &pEntry->desc.DecodeProfile, sizeof(GUID));
10670	VideoDesc.SampleWidth = pEntry->desc.SampleWidth;
10671	VideoDesc.SampleHeight = pEntry->desc.SampleHeight;
10672	VideoDesc.OutputFormat = vmsvgaDXSurfaceFormat2Dxgi(pEntry->desc.OutputFormat);
10673
10674	D3D11_VIDEO_DECODER_CONFIG Config;
10675	RT_ZERO(Config);
10676	memcpy(&Config.guidConfigBitstreamEncryption, &pEntry->config.guidConfigBitstreamEncryption, sizeof(GUID));
10677	memcpy(&Config.guidConfigMBcontrolEncryption, &pEntry->config.guidConfigMBcontrolEncryption, sizeof(GUID));
10678	memcpy(&Config.guidConfigResidDiffEncryption, &pEntry->config.guidConfigResidDiffEncryption, sizeof(GUID));
10679	Config.ConfigBitstreamRaw = pEntry->config.ConfigBitstreamRaw;
10680	Config.ConfigMBcontrolRasterOrder = pEntry->config.ConfigMBcontrolRasterOrder;
10681	Config.ConfigResidDiffHost = pEntry->config.ConfigResidDiffHost;
10682	Config.ConfigSpatialResid8 = pEntry->config.ConfigSpatialResid8;
10683	Config.ConfigResid8Subtraction = pEntry->config.ConfigResid8Subtraction;
10684	Config.ConfigSpatialHost8or9Clipping = pEntry->config.ConfigSpatialHost8or9Clipping;
10685	Config.ConfigSpatialResidInterleaved = pEntry->config.ConfigSpatialResidInterleaved;
10686	Config.ConfigIntraResidUnsigned = pEntry->config.ConfigIntraResidUnsigned;
10687	Config.ConfigResidDiffAccelerator = pEntry->config.ConfigResidDiffAccelerator;
10688	Config.ConfigHostInverseScan = pEntry->config.ConfigHostInverseScan;
10689	Config.ConfigSpecificIDCT = pEntry->config.ConfigSpecificIDCT;
10690	Config.Config4GroupedCoefs = pEntry->config.Config4GroupedCoefs;
10691	Config.ConfigMinRenderTargetBuffCount = pEntry->config.ConfigMinRenderTargetBuffCount;
10692	Config.ConfigDecoderSpecific = pEntry->config.ConfigDecoderSpecific;
10693
10694	hr = pDXDevice->pVideoDevice->CreateVideoDecoder(&VideoDesc, &Config, &pDXVideoDecoder->pVideoDecoder);
10695	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
10696	LogFlowFunc(("Using DecodeProfile %RTuuid\n", &VideoDesc.Guid));
10697
10698	/* COTables are restored from saved state in ascending order. Output View must be created before Decoder. */
10699	AssertCompile(VBSVGA_COTABLE_VDOV < VBSVGA_COTABLE_VIDEODECODER);
10700	if (pEntry->vdovId != SVGA3D_INVALID_ID)
10701	{
10702	int rc = dxVideoDecoderBeginFrame(pThisCC, pDXContext, videoDecoderId, pEntry->vdovId);
10703	AssertRC(rc); RT_NOREF(rc);
10704	}
10705
10706	return VINF_SUCCESS;
10707	}
10708
10709
10710	static void dxDestroyVideoDecoder(DXVIDEODECODER *pDXVideoDecoder)
10711	{
10712	D3D_RELEASE(pDXVideoDecoder->pVideoDecoder);
10713	}
10714
10715
10716	/*
10717	* Backend callbacks.
10718	*/
10719
10720	static DECLCALLBACK(int) vmsvga3dBackVBDXDefineVideoProcessor(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId, VBSVGACOTableDXVideoProcessorEntry const *pEntry)
10721	{
10722	return dxCreateVideoProcessor(pThisCC, pDXContext, videoProcessorId, pEntry);
10723	}
10724
10725
10726	static DECLCALLBACK(int) vmsvga3dBackVBDXDefineVideoDecoderOutputView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoDecoderOutputViewId videoDecoderOutputViewId, VBSVGACOTableDXVideoDecoderOutputViewEntry const *pEntry)
10727	{
10728	/* The view is created when it is used: either in BeginFrame or ClearView. */
10729	RT_NOREF(pThisCC, pDXContext, videoDecoderOutputViewId, pEntry);
10730	return VINF_SUCCESS;
10731	}
10732
10733
10734	static DECLCALLBACK(int) vmsvga3dBackVBDXDefineVideoDecoder(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoDecoderId videoDecoderId, VBSVGACOTableDXVideoDecoderEntry const *pEntry)
10735	{
10736	return dxCreateVideoDecoder(pThisCC, pDXContext, videoDecoderId, pEntry);
10737	}
10738
10739
10740	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoDecoderBeginFrame(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoDecoderId videoDecoderId, VBSVGA3dVideoDecoderOutputViewId videoDecoderOutputViewId)
10741	{
10742	return dxVideoDecoderBeginFrame(pThisCC, pDXContext, videoDecoderId, videoDecoderOutputViewId);
10743	}
10744
10745
10746	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoDecoderSubmitBuffers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoDecoderId videoDecoderId, uint32_t cBuffer, VBSVGA3dVideoDecoderBufferDesc const *paBufferDesc)
10747	{
10748	HRESULT hr;
10749
10750	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
10751	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
10752
10753	DXVIDEODECODER *pDXVideoDecoder = &pDXContext->pBackendDXContext->paVideoDecoder[videoDecoderId];
10754
10755	D3D11_VIDEO_DECODER_BUFFER_DESC paDesc = (D3D11_VIDEO_DECODER_BUFFER_DESC )RTMemTmpAllocZ(cBuffer * sizeof(D3D11_VIDEO_DECODER_BUFFER_DESC));
10756	AssertReturn(paDesc, VERR_NO_MEMORY);
10757
10758	for (uint32_t i = 0; i < cBuffer; ++i)
10759	{
10760	VBSVGA3dVideoDecoderBufferDesc const *s = &paBufferDesc[i];
10761
10762	PVMSVGA3DSURFACE pSurface;
10763	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, s->sidBuffer, &pSurface);
10764	ASSERT_GUEST_CONTINUE(RT_SUCCESS(rc));
10765
10766	uint32_t const cbSurface = pSurface->paMipmapLevels[0].cbSurface;
10767	ASSERT_GUEST_CONTINUE( s->dataSize <= cbSurface
10768	&& s->dataOffset <= cbSurface - s->dataSize);
10769
10770	D3D11_VIDEO_DECODER_BUFFER_DESC *d = &paDesc[i];
10771	d->BufferType = dxVideoDecoderBufferType(s->bufferType);
10772	d->DataOffset = 0;
10773	d->DataSize = s->dataSize;
10774	d->FirstMBaddress = s->firstMBaddress;
10775	d->NumMBsInBuffer = s->numMBsInBuffer;
10776
10777	UINT DecoderBufferSize;
10778	void *pDecoderBuffer;
10779	hr = pDXDevice->pVideoContext->GetDecoderBuffer(pDXVideoDecoder->pVideoDecoder, d->BufferType,
10780	&DecoderBufferSize, &pDecoderBuffer);
10781	AssertReturnStmt(SUCCEEDED(hr), RTMemTmpFree(paDesc), VERR_NOT_SUPPORTED);
10782
10783	ASSERT_GUEST_CONTINUE(DecoderBufferSize >= s->dataSize);
10784
10785	if (pSurface->pBackendSurface)
10786	{
10787	void *pvGuestBuffer;
10788	uint32_t cbGuestBuffer;
10789	rc = dxReadBuffer(pDXDevice, pSurface->pBackendSurface->u.pBuffer, s->dataOffset, s->dataSize,
10790	&pvGuestBuffer, &cbGuestBuffer);
10791	AssertRC(rc);
10792	if (RT_SUCCESS(rc))
10793	{
10794	memcpy(pDecoderBuffer, pvGuestBuffer, cbGuestBuffer);
10795	RTMemFree(pvGuestBuffer);
10796	}
10797	}
10798	else
10799	memcpy(pDecoderBuffer, (uint8_t *)pSurface->paMipmapLevels[0].pSurfaceData + s->dataOffset, s->dataSize);
10800
10801	hr = pDXDevice->pVideoContext->ReleaseDecoderBuffer(pDXVideoDecoder->pVideoDecoder, d->BufferType);
10802	AssertReturnStmt(SUCCEEDED(hr), RTMemTmpFree(paDesc), VERR_NOT_SUPPORTED);
10803	}
10804
10805	hr = pDXDevice->pVideoContext->SubmitDecoderBuffers(pDXVideoDecoder->pVideoDecoder, cBuffer, paDesc);
10806	AssertReturnStmt(SUCCEEDED(hr), RTMemTmpFree(paDesc), VERR_NOT_SUPPORTED);
10807
10808	RTMemTmpFree(paDesc);
10809	return VINF_SUCCESS;
10810	}
10811
10812
10813	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoDecoderEndFrame(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoDecoderId videoDecoderId)
10814	{
10815	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
10816	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
10817
10818	DXVIDEODECODER *pDXVideoDecoder = &pDXContext->pBackendDXContext->paVideoDecoder[videoDecoderId];
10819
10820	HRESULT hr = pDXDevice->pVideoContext->DecoderEndFrame(pDXVideoDecoder->pVideoDecoder);
10821	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
10822
10823	return VINF_SUCCESS;
10824	}
10825
10826
10827	static DECLCALLBACK(int) vmsvga3dBackVBDXDefineVideoProcessorInputView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorInputViewId videoProcessorInputViewId, VBSVGACOTableDXVideoProcessorInputViewEntry const *pEntry)
10828	{
10829	/* The view is created when it is used: either in VideoProcessorBlt or ClearView. */
10830	RT_NOREF(pThisCC, pDXContext, videoProcessorInputViewId, pEntry);
10831	return VINF_SUCCESS;
10832	}
10833
10834
10835	static DECLCALLBACK(int) vmsvga3dBackVBDXDefineVideoProcessorOutputView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorOutputViewId videoProcessorOutputViewId, VBSVGACOTableDXVideoProcessorOutputViewEntry const *pEntry)
10836	{
10837	/* The view is created when it is used: either in VideoProcessorBlt or ClearView. */
10838	RT_NOREF(pThisCC, pDXContext, videoProcessorOutputViewId, pEntry);
10839	return VINF_SUCCESS;
10840	}
10841
10842
10843	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId, VBSVGA3dVideoProcessorOutputViewId videoProcessorOutputViewId,
10844	uint32_t OutputFrame, uint32_t StreamCount, VBSVGA3dVideoProcessorStream const *pVideoProcessorStreams)
10845	{
10846	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
10847	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
10848
10849	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
10850
10851	DXVIEW *pVPOView;
10852	int rc = dxEnsureVideoProcessorOutputView(pThisCC, pDXContext, videoProcessorOutputViewId, &pVPOView);
10853	AssertRCReturn(rc, rc);
10854
10855	uint32_t cbStreams = StreamCount * sizeof(D3D11_VIDEO_PROCESSOR_STREAM);
10856
10857	/* ID3D11VideoProcessorInputView arrays for past and future frames. */
10858	VBSVGA3dVideoProcessorStream const *pVPS = pVideoProcessorStreams;
10859	for (uint32_t i = 0; i < StreamCount; ++i)
10860	{
10861	uint32_t const cIds = (pVPS->StereoFormatSeparate == 0 ? 1 : 2) * (pVPS->PastFrames + 1 + pVPS->FutureFrames);
10862
10863	uint32_t const cPastFutureViews = (pVPS->StereoFormatSeparate == 0 ? 1 : 2) * (pVPS->PastFrames + pVPS->FutureFrames);
10864	cbStreams += cPastFutureViews * sizeof(ID3D11VideoProcessorInputView *);
10865
10866	pVPS = (VBSVGA3dVideoProcessorStream )((uint8_t )&pVPS[1] + cIds * sizeof(VBSVGA3dVideoProcessorInputViewId));
10867	}
10868
10869	D3D11_VIDEO_PROCESSOR_STREAM paStreams = (D3D11_VIDEO_PROCESSOR_STREAM )RTMemTmpAllocZ(cbStreams);
10870	AssertReturn(paStreams, VERR_NO_MEMORY);
10871	ID3D11VideoProcessorInputView ppSurfaces = (ID3D11VideoProcessorInputView )&paStreams[StreamCount];
10872
10873	pVPS = pVideoProcessorStreams;
10874	for (uint32_t i = 0; i < StreamCount; ++i)
10875	{
10876	D3D11_VIDEO_PROCESSOR_STREAM *d = &paStreams[i];
10877	d->Enable = pVPS->Enable;
10878	d->OutputIndex = pVPS->OutputIndex;
10879	d->InputFrameOrField = pVPS->InputFrameOrField;
10880	d->PastFrames = pVPS->PastFrames;
10881	d->FutureFrames = pVPS->FutureFrames;
10882
10883	/*
10884	* Fetch input frames.
10885	*/
10886	uint32_t const cIds = (pVPS->StereoFormatSeparate == 0 ? 1 : 2) * (pVPS->PastFrames + 1 + pVPS->FutureFrames);
10887	VBSVGA3dVideoProcessorInputViewId const pId = (VBSVGA3dVideoProcessorInputViewId )&pVPS[1];
10888	DXVIEW *pVPIView;
10889
10890	/* Past frames. */
10891	if (pVPS->PastFrames)
10892	{
10893	DEBUG_BREAKPOINT_TEST();
10894	d->ppPastSurfaces = ppSurfaces;
10895	for (UINT j = 0; j < pVPS->PastFrames; ++j, ++ppSurfaces)
10896	{
10897	rc = dxEnsureVideoProcessorInputView(pThisCC, pDXContext, *pId++, &pVPIView);
10898	AssertRCReturnStmt(rc, RTMemTmpFree(paStreams), rc);
10899	d->ppPastSurfaces[j] = pVPIView->u.pVideoProcessorInputView;
10900	}
10901	}
10902
10903	/* CurrentFrame */
10904	rc = dxEnsureVideoProcessorInputView(pThisCC, pDXContext, *pId++, &pVPIView);
10905	AssertRCReturnStmt(rc, RTMemTmpFree(paStreams), rc);
10906	d->pInputSurface = pVPIView->u.pVideoProcessorInputView;
10907
10908	/* Future frames. */
10909	if (pVPS->FutureFrames)
10910	{
10911	d->ppFutureSurfaces = ppSurfaces;
10912	for (UINT j = 0; j < pVPS->FutureFrames; ++j, ++ppSurfaces)
10913	{
10914	rc = dxEnsureVideoProcessorInputView(pThisCC, pDXContext, *pId++, &pVPIView);
10915	AssertRCReturnStmt(rc, RTMemTmpFree(paStreams), rc);
10916	d->ppFutureSurfaces[j] = pVPIView->u.pVideoProcessorInputView;
10917	}
10918	}
10919
10920	/* Right frames for stereo. */
10921	if (pVPS->StereoFormatSeparate)
10922	{
10923	/* Past frames. */
10924	if (pVPS->PastFrames)
10925	{
10926	d->ppPastSurfacesRight = ppSurfaces;
10927	for (UINT j = 0; j < pVPS->PastFrames; ++j, ++ppSurfaces)
10928	{
10929	rc = dxEnsureVideoProcessorInputView(pThisCC, pDXContext, *pId++, &pVPIView);
10930	AssertRCReturnStmt(rc, RTMemTmpFree(paStreams), rc);
10931	d->ppPastSurfacesRight[j] = pVPIView->u.pVideoProcessorInputView;
10932	}
10933	}
10934
10935	/* CurrentFrame */
10936	rc = dxEnsureVideoProcessorInputView(pThisCC, pDXContext, *pId++, &pVPIView);
10937	AssertRCReturnStmt(rc, RTMemTmpFree(paStreams), rc);
10938	d->pInputSurfaceRight = pVPIView->u.pVideoProcessorInputView;
10939
10940	/* Future frames. */
10941	if (pVPS->FutureFrames)
10942	{
10943	d->ppFutureSurfacesRight = ppSurfaces;
10944	for (UINT j = 0; j < pVPS->FutureFrames; ++j, ++ppSurfaces)
10945	{
10946	rc = dxEnsureVideoProcessorInputView(pThisCC, pDXContext, *pId++, &pVPIView);
10947	AssertRCReturnStmt(rc, RTMemTmpFree(paStreams), rc);
10948	d->ppFutureSurfacesRight[j] = pVPIView->u.pVideoProcessorInputView;
10949	}
10950	}
10951	}
10952
10953	pVPS = (VBSVGA3dVideoProcessorStream )((uint8_t )&pVPS[1] + cIds * sizeof(VBSVGA3dVideoProcessorInputViewId));
10954	}
10955
10956	HRESULT hr = pDXDevice->pVideoContext->VideoProcessorBlt(pDXVideoProcessor->pVideoProcessor, pVPOView->u.pVideoProcessorOutputView,
10957	OutputFrame, StreamCount, paStreams);
10958	RTMemTmpFree(paStreams);
10959	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
10960
10961	return VINF_SUCCESS;
10962	}
10963
10964
10965	static DECLCALLBACK(int) vmsvga3dBackVBDXDestroyVideoDecoder(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoDecoderId videoDecoderId)
10966	{
10967	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
10968	RT_NOREF(pBackend);
10969
10970	DXVIDEODECODER *pDXVideoDecoder = &pDXContext->pBackendDXContext->paVideoDecoder[videoDecoderId];
10971	dxDestroyVideoDecoder(pDXVideoDecoder);
10972
10973	return VINF_SUCCESS;
10974	}
10975
10976
10977	static DECLCALLBACK(int) vmsvga3dBackVBDXDestroyVideoDecoderOutputView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoDecoderOutputViewId videoDecoderOutputViewId)
10978	{
10979	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
10980	RT_NOREF(pBackend);
10981
10982	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paVideoDecoderOutputView[videoDecoderOutputViewId];
10983	dxViewDestroy(pDXView);
10984
10985	return VINF_SUCCESS;
10986	}
10987
10988
10989	static DECLCALLBACK(int) vmsvga3dBackVBDXDestroyVideoProcessor(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId)
10990	{
10991	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
10992	RT_NOREF(pBackend);
10993
10994	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
10995	dxDestroyVideoProcessor(pDXVideoProcessor);
10996
10997	return VINF_SUCCESS;
10998	}
10999
11000
11001	static DECLCALLBACK(int) vmsvga3dBackVBDXDestroyVideoProcessorInputView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorInputViewId videoProcessorInputViewId)
11002	{
11003	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
11004	RT_NOREF(pBackend);
11005
11006	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paVideoProcessorInputView[videoProcessorInputViewId];
11007	dxViewDestroy(pDXView);
11008
11009	return VINF_SUCCESS;
11010	}
11011
11012
11013	static DECLCALLBACK(int) vmsvga3dBackVBDXDestroyVideoProcessorOutputView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorOutputViewId videoProcessorOutputViewId)
11014	{
11015	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
11016	RT_NOREF(pBackend);
11017
11018	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paVideoProcessorOutputView[videoProcessorOutputViewId];
11019	dxViewDestroy(pDXView);
11020
11021	return VINF_SUCCESS;
11022	}
11023
11024
11025	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetOutputTargetRect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId, uint8 enable, SVGASignedRect const &outputRect)
11026	{
11027	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
11028	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11029
11030	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11031	dxVideoProcessorSetOutputTargetRect(pDXDevice, pDXVideoProcessor, enable, outputRect);
11032	return VINF_SUCCESS;
11033	}
11034
11035
11036	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetOutputBackgroundColor(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId, uint32 YCbCr, VBSVGA3dVideoColor const &color)
11037	{
11038	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
11039	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11040
11041	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11042	dxVideoProcessorSetOutputBackgroundColor(pDXDevice, pDXVideoProcessor, YCbCr, color);
11043	return VINF_SUCCESS;
11044	}
11045
11046
11047	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetOutputColorSpace(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId, VBSVGA3dVideoProcessorColorSpace const &colorSpace)
11048	{
11049	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
11050	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11051
11052	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11053	dxVideoProcessorSetOutputColorSpace(pDXDevice, pDXVideoProcessor, colorSpace);
11054	return VINF_SUCCESS;
11055	}
11056
11057
11058	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetOutputAlphaFillMode(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId, VBSVGA3dVideoProcessorAlphaFillMode fillMode, uint32 streamIndex)
11059	{
11060	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
11061	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11062
11063	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11064	dxVideoProcessorSetOutputAlphaFillMode(pDXDevice, pDXVideoProcessor, fillMode, streamIndex);
11065	return VINF_SUCCESS;
11066	}
11067
11068
11069	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetOutputConstriction(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId, uint32 enabled, uint32 width, uint32 height)
11070	{
11071	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
11072	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11073
11074	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11075	dxVideoProcessorSetOutputConstriction(pDXDevice, pDXVideoProcessor, enabled, width, height);
11076	return VINF_SUCCESS;
11077	}
11078
11079
11080	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetOutputStereoMode(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId, uint32 enable)
11081	{
11082	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
11083	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11084
11085	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11086	dxVideoProcessorSetOutputStereoMode(pDXDevice, pDXVideoProcessor, enable);
11087	return VINF_SUCCESS;
11088	}
11089
11090
11091	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetStreamFrameFormat(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId, uint32 streamIndex, VBSVGA3dVideoFrameFormat format)
11092	{
11093	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
11094	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11095
11096	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11097	dxVideoProcessorSetStreamFrameFormat(pDXDevice, pDXVideoProcessor, streamIndex, format);
11098	return VINF_SUCCESS;
11099	}
11100
11101
11102	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetStreamColorSpace(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId, uint32 streamIndex, VBSVGA3dVideoProcessorColorSpace colorSpace)
11103	{
11104	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
11105	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11106
11107	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11108	dxVideoProcessorSetStreamColorSpace(pDXDevice, pDXVideoProcessor, streamIndex, colorSpace);
11109	return VINF_SUCCESS;
11110	}
11111
11112
11113	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetStreamOutputRate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId,
11114	uint32 streamIndex, VBSVGA3dVideoProcessorOutputRate outputRate, uint32 repeatFrame, SVGA3dFraction64 const &customRate)
11115	{
11116	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
11117	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11118
11119	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11120	dxVideoProcessorSetStreamOutputRate(pDXDevice, pDXVideoProcessor, streamIndex, outputRate, repeatFrame, customRate);
11121	return VINF_SUCCESS;
11122	}
11123
11124
11125	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetStreamSourceRect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId,
11126	uint32 streamIndex, uint32 enable, SVGASignedRect const &sourceRect)
11127	{
11128	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
11129	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11130
11131	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11132	dxVideoProcessorSetStreamSourceRect(pDXDevice, pDXVideoProcessor, streamIndex, enable, sourceRect);
11133	return VINF_SUCCESS;
11134	}
11135
11136
11137	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetStreamDestRect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId,
11138	uint32 streamIndex, uint32 enable, SVGASignedRect const &destRect)
11139	{
11140	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
11141	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11142
11143	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11144	dxVideoProcessorSetStreamDestRect(pDXDevice, pDXVideoProcessor, streamIndex, enable, destRect);
11145	return VINF_SUCCESS;
11146	}
11147
11148
11149	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetStreamAlpha(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId,
11150	uint32 streamIndex, uint32 enable, float alpha)
11151	{
11152	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
11153	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11154
11155	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11156	dxVideoProcessorSetStreamAlpha(pDXDevice, pDXVideoProcessor, streamIndex, enable, alpha);
11157	return VINF_SUCCESS;
11158	}
11159
11160
11161	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetStreamPalette(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId,
11162	uint32 streamIndex, uint32_t cEntries, uint32_t const *paEntries)
11163	{
11164	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
11165	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11166
11167	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11168	dxVideoProcessorSetStreamPalette(pDXDevice, pDXVideoProcessor, streamIndex, cEntries, paEntries);
11169	return VINF_SUCCESS;
11170	}
11171
11172
11173	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetStreamPixelAspectRatio(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId,
11174	uint32 streamIndex, uint32 enable, SVGA3dFraction64 const &sourceRatio, SVGA3dFraction64 const &destRatio)
11175	{
11176	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
11177	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11178
11179	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11180	dxVideoProcessorSetStreamPixelAspectRatio(pDXDevice, pDXVideoProcessor, streamIndex, enable, sourceRatio, destRatio);
11181	return VINF_SUCCESS;
11182	}
11183
11184
11185	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetStreamLumaKey(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId,
11186	uint32 streamIndex, uint32 enable, float lower, float upper)
11187	{
11188	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
11189	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11190
11191	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11192	dxVideoProcessorSetStreamLumaKey(pDXDevice, pDXVideoProcessor, streamIndex, enable, lower, upper);
11193	return VINF_SUCCESS;
11194	}
11195
11196
11197	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetStreamStereoFormat(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId,
11198	uint32 streamIndex, uint32 enable, VBSVGA3dVideoProcessorStereoFormat stereoFormat,
11199	uint8 leftViewFrame0, uint8 baseViewFrame0, VBSVGA3dVideoProcessorStereoFlipMode flipMode, int32 monoOffset)
11200	{
11201	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
11202	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11203
11204	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11205	dxVideoProcessorSetStreamStereoFormat(pDXDevice, pDXVideoProcessor, streamIndex, enable, stereoFormat,
11206	leftViewFrame0, baseViewFrame0, flipMode, monoOffset);
11207	return VINF_SUCCESS;
11208	}
11209
11210
11211	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetStreamAutoProcessingMode(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId,
11212	uint32 streamIndex, uint32 enable)
11213	{
11214	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
11215	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11216
11217	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11218	dxVideoProcessorSetStreamAutoProcessingMode(pDXDevice, pDXVideoProcessor, streamIndex, enable);
11219	return VINF_SUCCESS;
11220	}
11221
11222
11223	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetStreamFilter(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId,
11224	uint32 streamIndex, uint32 enable, VBSVGA3dVideoProcessorFilter filter, int32 level)
11225	{
11226	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
11227	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11228
11229	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11230	dxVideoProcessorSetStreamFilter(pDXDevice, pDXVideoProcessor, streamIndex, enable, filter, level);
11231	return VINF_SUCCESS;
11232	}
11233
11234
11235	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetStreamRotation(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId,
11236	uint32 streamIndex, uint32 enable, VBSVGA3dVideoProcessorRotation rotation)
11237	{
11238	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
11239	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11240
11241	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11242	dxVideoProcessorSetStreamRotation(pDXDevice, pDXVideoProcessor, streamIndex, enable, rotation);
11243	return VINF_SUCCESS;
11244	}
11245
11246
11247	static int dxGetVideoCapDecodeProfile(PVGASTATECC pThisCC, DXDEVICE pDXDevice, void pvData, uint32 cbData, uint32 *pcbOut)
11248	{
11249	VBSVGA3dDecodeProfileInfo paDecodeProfileInfo = (VBSVGA3dDecodeProfileInfo )pvData;
11250
11251	UINT ProfileCount = pDXDevice->pVideoDevice->GetVideoDecoderProfileCount();
11252	ProfileCount = RT_MIN(ProfileCount, cbData / sizeof(paDecodeProfileInfo[0]));
11253
11254	#ifndef DEBUG_sunlover
11255	/** @todo Allocation of video decoder output texture often fails on NVidia. Disable video decoding for now. */
11256	if (pThisCC->svga.p3dState->pBackend->VendorId == 0x10de)
11257	ProfileCount = 0;
11258	#else
11259	RT_NOREF(pThisCC);
11260	#endif
11261
11262	for (UINT i = 0; i < ProfileCount; ++i)
11263	{
11264	VBSVGA3dDecodeProfileInfo *d = &paDecodeProfileInfo[i];
11265
11266	/* GUID and VBSVGA3dGuid are identical. */
11267	GUID pGuid = (GUID )&d->DecodeProfile;
11268	HRESULT hr = pDXDevice->pVideoDevice->GetVideoDecoderProfile(i, pGuid);
11269	Assert(SUCCEEDED(hr));
11270	if (SUCCEEDED(hr))
11271	{
11272	struct
11273	{
11274	DXGI_FORMAT format;
11275	uint8 *pSupported;
11276	} aFormats[] =
11277	{
11278	{ DXGI_FORMAT_AYUV, &d->fAYUV },
11279	{ DXGI_FORMAT_NV12, &d->fNV12 },
11280	{ DXGI_FORMAT_YUY2, &d->fYUY2 },
11281	};
11282
11283	for (unsigned idxFormat = 0; idxFormat < RT_ELEMENTS(aFormats); ++idxFormat)
11284	{
11285	BOOL Supported = FALSE;
11286	pDXDevice->pVideoDevice->CheckVideoDecoderFormat(pGuid, aFormats[idxFormat].format, &Supported);
11287	*aFormats[idxFormat].pSupported = RT_BOOL(Supported);
11288	}
11289	}
11290
11291	if (FAILED(hr))
11292	RT_ZERO(*d);
11293	}
11294
11295	pcbOut = ProfileCount sizeof(VBSVGA3dDecodeProfileInfo);
11296	return VINF_SUCCESS;
11297	}
11298
11299
11300	static int dxGetVideoCapDecodeConfig(DXDEVICE pDXDevice, void pvData, uint32 cbData, uint32 *pcbOut)
11301	{
11302	ASSERT_GUEST_RETURN(cbData >= sizeof(VBSVGA3dVideoDecoderDesc), VERR_INVALID_PARAMETER);
11303	VBSVGA3dDecodeConfigInfo pConfigInfo = (VBSVGA3dDecodeConfigInfo )pvData;
11304
11305	D3D11_VIDEO_DECODER_DESC Desc;
11306	RT_ZERO(Desc);
11307	memcpy(&Desc.Guid, &pConfigInfo->desc.DecodeProfile, sizeof(GUID));
11308	Desc.SampleWidth = pConfigInfo->desc.SampleWidth;
11309	Desc.SampleHeight = pConfigInfo->desc.SampleHeight;
11310	Desc.OutputFormat = vmsvgaDXSurfaceFormat2Dxgi(pConfigInfo->desc.OutputFormat);
11311
11312	UINT ConfigCount;
11313	HRESULT hr = pDXDevice->pVideoDevice->GetVideoDecoderConfigCount(&Desc, &ConfigCount);
11314	if (FAILED(hr))
11315	ConfigCount = 0;
11316	ConfigCount = RT_MIN(ConfigCount, (cbData - sizeof(pConfigInfo->desc)) / sizeof(pConfigInfo->aConfig[0]));
11317
11318	UINT cConfigOut = 0;
11319	for (UINT i = 0; i < ConfigCount; ++i)
11320	{
11321	D3D11_VIDEO_DECODER_CONFIG Config;
11322	hr = pDXDevice->pVideoDevice->GetVideoDecoderConfig(&Desc, i, &Config);
11323	Assert(SUCCEEDED(hr));
11324	if (SUCCEEDED(hr))
11325	{
11326	/* Filter out configs with encryption. */
11327	static GUID const NoEncrypt = { 0x1b81beD0, 0xa0c7,0x11d3,0xb9,0x84,0x00,0xc0,0x4f,0x2e,0x73,0xc5 };
11328	if ( memcmp(&NoEncrypt, &Config.guidConfigBitstreamEncryption, sizeof(GUID)) == 0
11329	&& memcmp(&NoEncrypt, &Config.guidConfigMBcontrolEncryption, sizeof(GUID)) == 0
11330	&& memcmp(&NoEncrypt, &Config.guidConfigResidDiffEncryption, sizeof(GUID)) == 0)
11331	{
11332	VBSVGA3dVideoDecoderConfig *d = &pConfigInfo->aConfig[cConfigOut++];
11333
11334	memcpy(&d->guidConfigBitstreamEncryption, &Config.guidConfigBitstreamEncryption, sizeof(VBSVGA3dGuid));
11335	memcpy(&d->guidConfigMBcontrolEncryption, &Config.guidConfigMBcontrolEncryption, sizeof(VBSVGA3dGuid));
11336	memcpy(&d->guidConfigResidDiffEncryption, &Config.guidConfigResidDiffEncryption, sizeof(VBSVGA3dGuid));
11337	d->ConfigBitstreamRaw = Config.ConfigBitstreamRaw;
11338	d->ConfigMBcontrolRasterOrder = Config.ConfigMBcontrolRasterOrder;
11339	d->ConfigResidDiffHost = Config.ConfigResidDiffHost;
11340	d->ConfigSpatialResid8 = Config.ConfigSpatialResid8;
11341	d->ConfigResid8Subtraction = Config.ConfigResid8Subtraction;
11342	d->ConfigSpatialHost8or9Clipping = Config.ConfigSpatialHost8or9Clipping;
11343	d->ConfigSpatialResidInterleaved = Config.ConfigSpatialResidInterleaved;
11344	d->ConfigIntraResidUnsigned = Config.ConfigIntraResidUnsigned;
11345	d->ConfigResidDiffAccelerator = Config.ConfigResidDiffAccelerator;
11346	d->ConfigHostInverseScan = Config.ConfigHostInverseScan;
11347	d->ConfigSpecificIDCT = Config.ConfigSpecificIDCT;
11348	d->Config4GroupedCoefs = Config.Config4GroupedCoefs;
11349	d->ConfigMinRenderTargetBuffCount = Config.ConfigMinRenderTargetBuffCount;
11350	d->ConfigDecoderSpecific = Config.ConfigDecoderSpecific;
11351	}
11352	}
11353	}
11354
11355	//DEBUG_BREAKPOINT_TEST();
11356	pcbOut = sizeof(VBSVGA3dVideoDecoderDesc) + cConfigOut sizeof(VBSVGA3dVideoDecoderConfig);
11357	return VINF_SUCCESS;
11358	}
11359
11360
11361	static int dxGetVideoCapProcessorEnum(DXDEVICE pDXDevice, void pvData, uint32 cbData, uint32 *pcbOut)
11362	{
11363	ASSERT_GUEST_RETURN(cbData >= sizeof(VBSVGA3dProcessorEnumInfo), VERR_INVALID_PARAMETER);
11364
11365	VBSVGA3dProcessorEnumInfo pInfo = (VBSVGA3dProcessorEnumInfo )pvData;
11366	RT_ZERO(pInfo->info);
11367
11368	D3D11_VIDEO_PROCESSOR_CONTENT_DESC ContentDesc;
11369	RT_ZERO(ContentDesc);
11370	ContentDesc.InputFrameFormat = dxVideoFrameFormat(pInfo->desc.InputFrameFormat);
11371	ContentDesc.InputFrameRate.Numerator = pInfo->desc.InputFrameRate.numerator;
11372	ContentDesc.InputFrameRate.Denominator = pInfo->desc.InputFrameRate.denominator;
11373	ContentDesc.InputWidth = pInfo->desc.InputWidth;
11374	ContentDesc.InputHeight = pInfo->desc.InputHeight;
11375	ContentDesc.OutputFrameRate.Numerator = pInfo->desc.OutputFrameRate.numerator;
11376	ContentDesc.OutputFrameRate.Denominator = pInfo->desc.OutputFrameRate.denominator;
11377	ContentDesc.OutputWidth = pInfo->desc.OutputWidth;
11378	ContentDesc.OutputHeight = pInfo->desc.OutputHeight;
11379	ContentDesc.Usage = dxVideoUsage(pInfo->desc.Usage);
11380
11381	ID3D11VideoProcessorEnumerator *pEnum;
11382	HRESULT hr = pDXDevice->pVideoDevice->CreateVideoProcessorEnumerator(&ContentDesc, &pEnum);
11383	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
11384
11385	struct
11386	{
11387	DXGI_FORMAT format;
11388	uint8 *pFlags;
11389	} aFormats[] =
11390	{
11391	{ DXGI_FORMAT_R8_UNORM, &pInfo->info.fR8_UNORM },
11392	{ DXGI_FORMAT_R16_UNORM, &pInfo->info.fR16_UNORM },
11393	{ DXGI_FORMAT_NV12, &pInfo->info.fNV12 },
11394	{ DXGI_FORMAT_YUY2, &pInfo->info.fYUY2 },
11395	{ DXGI_FORMAT_R16G16B16A16_FLOAT, &pInfo->info.fR16G16B16A16_FLOAT },
11396	{ DXGI_FORMAT_B8G8R8X8_UNORM, &pInfo->info.fB8G8R8X8_UNORM },
11397	{ DXGI_FORMAT_B8G8R8A8_UNORM, &pInfo->info.fB8G8R8A8_UNORM },
11398	{ DXGI_FORMAT_R8G8B8A8_UNORM, &pInfo->info.fR8G8B8A8_UNORM },
11399	{ DXGI_FORMAT_R10G10B10A2_UNORM, &pInfo->info.fR10G10B10A2_UNORM },
11400	{ DXGI_FORMAT_R10G10B10_XR_BIAS_A2_UNORM, &pInfo->info.fR10G10B10_XR_BIAS_A2_UNORM },
11401	{ DXGI_FORMAT_R8G8B8A8_UNORM_SRGB, &pInfo->info.fR8G8B8A8_UNORM_SRGB },
11402	{ DXGI_FORMAT_B8G8R8A8_UNORM_SRGB, &pInfo->info.fB8G8R8A8_UNORM_SRGB },
11403	};
11404
11405	for (unsigned idxFormat = 0; idxFormat < RT_ELEMENTS(aFormats); ++idxFormat)
11406	{
11407	UINT Flags = 0;
11408	hr = pEnum->CheckVideoProcessorFormat(aFormats[idxFormat].format, &Flags);
11409	if (SUCCEEDED(hr))
11410	*aFormats[idxFormat].pFlags = Flags;
11411	}
11412
11413	D3D11_VIDEO_PROCESSOR_CAPS Caps;
11414	hr = pEnum->GetVideoProcessorCaps(&Caps);
11415	if (SUCCEEDED(hr))
11416	{
11417	pInfo->info.Caps.DeviceCaps = Caps.DeviceCaps;
11418	pInfo->info.Caps.FeatureCaps = Caps.FeatureCaps;
11419	pInfo->info.Caps.FilterCaps = Caps.FilterCaps;
11420	pInfo->info.Caps.InputFormatCaps = Caps.InputFormatCaps;
11421	pInfo->info.Caps.AutoStreamCaps = Caps.AutoStreamCaps;
11422	pInfo->info.Caps.StereoCaps = Caps.StereoCaps;
11423	pInfo->info.Caps.RateConversionCapsCount = RT_MIN(Caps.RateConversionCapsCount, VBSVGA3D_MAX_VIDEO_RATE_CONVERSION_CAPS);
11424	pInfo->info.Caps.MaxInputStreams = RT_MIN(Caps.MaxInputStreams, VBSVGA3D_MAX_VIDEO_STREAMS);
11425	pInfo->info.Caps.MaxStreamStates = RT_MIN(Caps.MaxStreamStates, VBSVGA3D_MAX_VIDEO_STREAMS);
11426	}
11427
11428	D3D11_VIDEO_PROCESSOR_RATE_CONVERSION_CAPS RateCaps;
11429	hr = pEnum->GetVideoProcessorRateConversionCaps(0, &RateCaps);
11430	if (SUCCEEDED(hr))
11431	{
11432	pInfo->info.RateCaps.PastFrames = RateCaps.PastFrames;
11433	pInfo->info.RateCaps.FutureFrames = RateCaps.FutureFrames;
11434	pInfo->info.RateCaps.ProcessorCaps = RateCaps.ProcessorCaps;
11435	pInfo->info.RateCaps.ITelecineCaps = RateCaps.ITelecineCaps;
11436	pInfo->info.RateCaps.CustomRateCount = RT_MIN(RateCaps.CustomRateCount, VBSVGA3D_MAX_VIDEO_CUSTOM_RATE_CAPS);
11437	}
11438
11439	for (unsigned i = 0; i < pInfo->info.RateCaps.CustomRateCount; ++i)
11440	{
11441	D3D11_VIDEO_PROCESSOR_CUSTOM_RATE Rate;
11442	hr = pEnum->GetVideoProcessorCustomRate(0, i, &Rate);
11443	if (SUCCEEDED(hr))
11444	{
11445	pInfo->info.aCustomRateCaps[i].CustomRate.numerator = Rate.CustomRate.Numerator;
11446	pInfo->info.aCustomRateCaps[i].CustomRate.denominator = Rate.CustomRate.Denominator;
11447	pInfo->info.aCustomRateCaps[i].OutputFrames = Rate.OutputFrames;
11448	pInfo->info.aCustomRateCaps[i].InputInterlaced = Rate.InputInterlaced;
11449	pInfo->info.aCustomRateCaps[i].InputFramesOrFields = Rate.InputFramesOrFields;
11450	}
11451	}
11452
11453	for (unsigned i = 0; i < VBSVGA3D_VP_MAX_FILTER_COUNT; ++i)
11454	{
11455	if (pInfo->info.Caps.FilterCaps & (1 << i))
11456	{
11457	D3D11_VIDEO_PROCESSOR_FILTER_RANGE Range;
11458	hr = pEnum->GetVideoProcessorFilterRange((D3D11_VIDEO_PROCESSOR_FILTER)i, &Range);
11459	if (SUCCEEDED(hr))
11460	{
11461	pInfo->info.aFilterRange[i].Minimum = Range.Minimum;
11462	pInfo->info.aFilterRange[i].Maximum = Range.Maximum;
11463	pInfo->info.aFilterRange[i].Default = Range.Default;
11464	pInfo->info.aFilterRange[i].Multiplier = Range.Multiplier;
11465	}
11466	}
11467	}
11468
11469	//DEBUG_BREAKPOINT_TEST();
11470	D3D_RELEASE(pEnum);
11471
11472	*pcbOut = sizeof(VBSVGA3dProcessorEnumInfo);
11473	return VINF_SUCCESS;
11474	}
11475
11476
11477	static DECLCALLBACK(int) vmsvga3dBackVBDXGetVideoCapability(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoCapability capability, void pvData, uint32 cbData, uint32 pcbOut)
11478	{
11479	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
11480	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11481
11482	switch (capability)
11483	{
11484	case VBSVGA3D_VIDEO_CAPABILITY_DECODE_PROFILE:
11485	return dxGetVideoCapDecodeProfile(pThisCC, pDXDevice, pvData, cbData, pcbOut);
11486	case VBSVGA3D_VIDEO_CAPABILITY_DECODE_CONFIG:
11487	return dxGetVideoCapDecodeConfig(pDXDevice, pvData, cbData, pcbOut);
11488	case VBSVGA3D_VIDEO_CAPABILITY_PROCESSOR_ENUM:
11489	return dxGetVideoCapProcessorEnum(pDXDevice, pvData, cbData, pcbOut);
11490	default:
11491	break;
11492	}
11493
11494	return VERR_NOT_SUPPORTED;
11495	}
11496
11497
11498	static DECLCALLBACK(int) vmsvga3dBackVBDXClearUAV(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId viewId,
11499	SVGA3dRGBAFloat const pColor, uint32_t cRect, SVGASignedRect const paRect)
11500	{
11501	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
11502	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
11503
11504	DXVIEW *pDXView;
11505	int rc = dxEnsureUnorderedAccessView(pThisCC, pDXContext, viewId, &pDXView);
11506	AssertRCReturn(rc, rc);
11507
11508	pDXDevice->pImmediateContext->ClearView(pDXView->u.pView, pColor->value, (D3D11_RECT *)paRect, cRect);
11509	return VINF_SUCCESS;
11510	}
11511
11512
11513	static DECLCALLBACK(int) vmsvga3dBackVBDXClearVDOV(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoDecoderOutputViewId viewId,
11514	SVGA3dRGBAFloat const pColor, uint32_t cRect, SVGASignedRect const paRect)
11515	{
11516	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
11517	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
11518
11519	DXVIEW *pDXView;
11520	int rc = dxEnsureVideoDecoderOutputView(pThisCC, pDXContext, viewId, &pDXView);
11521	AssertRCReturn(rc, rc);
11522
11523	pDXDevice->pImmediateContext->ClearView(pDXView->u.pView, pColor->value, (D3D11_RECT *)paRect, cRect);
11524	return VINF_SUCCESS;
11525	}
11526
11527
11528	static DECLCALLBACK(int) vmsvga3dBackVBDXClearVPIV(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorInputViewId viewId,
11529	SVGA3dRGBAFloat const pColor, uint32_t cRect, SVGASignedRect const paRect)
11530	{
11531	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
11532	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
11533
11534	DXVIEW *pDXView;
11535	int rc = dxEnsureVideoProcessorInputView(pThisCC, pDXContext, viewId, &pDXView);
11536	AssertRCReturn(rc, rc);
11537
11538	pDXDevice->pImmediateContext->ClearView(pDXView->u.pView, pColor->value, (D3D11_RECT *)paRect, cRect);
11539	return VINF_SUCCESS;
11540	}
11541
11542
11543	static DECLCALLBACK(int) vmsvga3dBackVBDXClearVPOV(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorOutputViewId viewId,
11544	SVGA3dRGBAFloat const pColor, uint32_t cRect, SVGASignedRect const paRect)
11545	{
11546	DXDEVICE *pDXDevice = dxDeviceFromContext(pThisCC->svga.p3dState, pDXContext);
11547	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
11548
11549	DXVIEW *pDXView;
11550	int rc = dxEnsureVideoProcessorOutputView(pThisCC, pDXContext, viewId, &pDXView);
11551	AssertRCReturn(rc, rc);
11552
11553	pDXDevice->pImmediateContext->ClearView(pDXView->u.pView, pColor->value, (D3D11_RECT *)paRect, cRect);
11554	return VINF_SUCCESS;
11555	}
11556
11557
11558	static DECLCALLBACK(int) vmsvga3dBackDXLoadState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PCPDMDEVHLPR3 pHlp, PSSMHANDLE pSSM)
11559	{
11560	RT_NOREF(pThisCC);
11561	uint32_t u32;
11562	int rc;
11563
11564	rc = pHlp->pfnSSMGetU32(pSSM, &u32);
11565	AssertLogRelRCReturn(rc, rc);
11566	AssertLogRelRCReturn(u32 == pDXContext->pBackendDXContext->cShader, VERR_INVALID_STATE);
11567
11568	for (uint32_t i = 0; i < pDXContext->pBackendDXContext->cShader; ++i)
11569	{
11570	DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[i];
11571
11572	rc = pHlp->pfnSSMGetU32(pSSM, &u32);
11573	AssertLogRelRCReturn(rc, rc);
11574	AssertLogRelReturn((SVGA3dShaderType)u32 == pDXShader->enmShaderType, VERR_INVALID_STATE);
11575
11576	if (pDXShader->enmShaderType == SVGA3D_SHADERTYPE_INVALID)
11577	continue;
11578
11579	pHlp->pfnSSMGetU32(pSSM, &pDXShader->soid);
11580
11581	pHlp->pfnSSMGetU32(pSSM, &u32);
11582	pDXShader->shaderInfo.enmProgramType = (VGPU10_PROGRAM_TYPE)u32;
11583
11584	rc = pHlp->pfnSSMGetU32(pSSM, &pDXShader->shaderInfo.cbBytecode);
11585	AssertLogRelRCReturn(rc, rc);
11586	AssertLogRelReturn(pDXShader->shaderInfo.cbBytecode <= 2 * SVGA3D_MAX_SHADER_MEMORY_BYTES, VERR_INVALID_STATE);
11587
11588	if (pDXShader->shaderInfo.cbBytecode)
11589	{
11590	pDXShader->shaderInfo.pvBytecode = RTMemAlloc(pDXShader->shaderInfo.cbBytecode);
11591	AssertPtrReturn(pDXShader->shaderInfo.pvBytecode, VERR_NO_MEMORY);
11592	pHlp->pfnSSMGetMem(pSSM, pDXShader->shaderInfo.pvBytecode, pDXShader->shaderInfo.cbBytecode);
11593	}
11594
11595	rc = pHlp->pfnSSMGetU32(pSSM, &pDXShader->shaderInfo.cInputSignature);
11596	AssertLogRelRCReturn(rc, rc);
11597	AssertLogRelReturn(pDXShader->shaderInfo.cInputSignature <= 32, VERR_INVALID_STATE);
11598	if (pDXShader->shaderInfo.cInputSignature)
11599	pHlp->pfnSSMGetMem(pSSM, pDXShader->shaderInfo.aInputSignature, pDXShader->shaderInfo.cInputSignature * sizeof(SVGA3dDXSignatureEntry));
11600
11601	rc = pHlp->pfnSSMGetU32(pSSM, &pDXShader->shaderInfo.cOutputSignature);
11602	AssertLogRelRCReturn(rc, rc);
11603	AssertLogRelReturn(pDXShader->shaderInfo.cOutputSignature <= 32, VERR_INVALID_STATE);
11604	if (pDXShader->shaderInfo.cOutputSignature)
11605	pHlp->pfnSSMGetMem(pSSM, pDXShader->shaderInfo.aOutputSignature, pDXShader->shaderInfo.cOutputSignature * sizeof(SVGA3dDXSignatureEntry));
11606
11607	rc = pHlp->pfnSSMGetU32(pSSM, &pDXShader->shaderInfo.cPatchConstantSignature);
11608	AssertLogRelRCReturn(rc, rc);
11609	AssertLogRelReturn(pDXShader->shaderInfo.cPatchConstantSignature <= 32, VERR_INVALID_STATE);
11610	if (pDXShader->shaderInfo.cPatchConstantSignature)
11611	pHlp->pfnSSMGetMem(pSSM, pDXShader->shaderInfo.aPatchConstantSignature, pDXShader->shaderInfo.cPatchConstantSignature * sizeof(SVGA3dDXSignatureEntry));
11612
11613	rc = pHlp->pfnSSMGetU32(pSSM, &pDXShader->shaderInfo.cDclResource);
11614	AssertLogRelRCReturn(rc, rc);
11615	AssertLogRelReturn(pDXShader->shaderInfo.cDclResource <= SVGA3D_DX_MAX_SRVIEWS, VERR_INVALID_STATE);
11616	if (pDXShader->shaderInfo.cDclResource)
11617	pHlp->pfnSSMGetMem(pSSM, pDXShader->shaderInfo.aOffDclResource, pDXShader->shaderInfo.cDclResource * sizeof(uint32_t));
11618
11619	DXShaderGenerateSemantics(&pDXShader->shaderInfo);
11620	}
11621
11622	rc = pHlp->pfnSSMGetU32(pSSM, &pDXContext->pBackendDXContext->cSOTarget);
11623	AssertLogRelRCReturn(rc, rc);
11624
11625	return VINF_SUCCESS;
11626	}
11627
11628
11629	static DECLCALLBACK(int) vmsvga3dBackDXSaveState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PCPDMDEVHLPR3 pHlp, PSSMHANDLE pSSM)
11630	{
11631	RT_NOREF(pThisCC);
11632	int rc;
11633
11634	pHlp->pfnSSMPutU32(pSSM, pDXContext->pBackendDXContext->cShader);
11635	for (uint32_t i = 0; i < pDXContext->pBackendDXContext->cShader; ++i)
11636	{
11637	DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[i];
11638
11639	pHlp->pfnSSMPutU32(pSSM, (uint32_t)pDXShader->enmShaderType);
11640	if (pDXShader->enmShaderType == SVGA3D_SHADERTYPE_INVALID)
11641	continue;
11642
11643	pHlp->pfnSSMPutU32(pSSM, pDXShader->soid);
11644
11645	pHlp->pfnSSMPutU32(pSSM, (uint32_t)pDXShader->shaderInfo.enmProgramType);
11646
11647	pHlp->pfnSSMPutU32(pSSM, pDXShader->shaderInfo.cbBytecode);
11648	if (pDXShader->shaderInfo.cbBytecode)
11649	pHlp->pfnSSMPutMem(pSSM, pDXShader->shaderInfo.pvBytecode, pDXShader->shaderInfo.cbBytecode);
11650
11651	pHlp->pfnSSMPutU32(pSSM, pDXShader->shaderInfo.cInputSignature);
11652	if (pDXShader->shaderInfo.cInputSignature)
11653	pHlp->pfnSSMPutMem(pSSM, pDXShader->shaderInfo.aInputSignature, pDXShader->shaderInfo.cInputSignature * sizeof(SVGA3dDXSignatureEntry));
11654
11655	pHlp->pfnSSMPutU32(pSSM, pDXShader->shaderInfo.cOutputSignature);
11656	if (pDXShader->shaderInfo.cOutputSignature)
11657	pHlp->pfnSSMPutMem(pSSM, pDXShader->shaderInfo.aOutputSignature, pDXShader->shaderInfo.cOutputSignature * sizeof(SVGA3dDXSignatureEntry));
11658
11659	pHlp->pfnSSMPutU32(pSSM, pDXShader->shaderInfo.cPatchConstantSignature);
11660	if (pDXShader->shaderInfo.cPatchConstantSignature)
11661	pHlp->pfnSSMPutMem(pSSM, pDXShader->shaderInfo.aPatchConstantSignature, pDXShader->shaderInfo.cPatchConstantSignature * sizeof(SVGA3dDXSignatureEntry));
11662
11663	pHlp->pfnSSMPutU32(pSSM, pDXShader->shaderInfo.cDclResource);
11664	if (pDXShader->shaderInfo.cDclResource)
11665	pHlp->pfnSSMPutMem(pSSM, pDXShader->shaderInfo.aOffDclResource, pDXShader->shaderInfo.cDclResource * sizeof(uint32_t));
11666	}
11667	rc = pHlp->pfnSSMPutU32(pSSM, pDXContext->pBackendDXContext->cSOTarget);
11668	AssertLogRelRCReturn(rc, rc);
11669
11670	return VINF_SUCCESS;
11671	}
11672
11673
11674	static DECLCALLBACK(int) vmsvga3dBackQueryInterface(PVGASTATECC pThisCC, char const pszInterfaceName, void pvInterfaceFuncs, size_t cbInterfaceFuncs)
11675	{
11676	RT_NOREF(pThisCC);
11677
11678	int rc = VINF_SUCCESS;
11679	if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_DX) == 0)
11680	{
11681	if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSDX))
11682	{
11683	if (pvInterfaceFuncs)
11684	{
11685	VMSVGA3DBACKENDFUNCSDX p = (VMSVGA3DBACKENDFUNCSDX )pvInterfaceFuncs;
11686	p->pfnDXSaveState = vmsvga3dBackDXSaveState;
11687	p->pfnDXLoadState = vmsvga3dBackDXLoadState;
11688	p->pfnDXDefineContext = vmsvga3dBackDXDefineContext;
11689	p->pfnDXDestroyContext = vmsvga3dBackDXDestroyContext;
11690	p->pfnDXBindContext = vmsvga3dBackDXBindContext;
11691	p->pfnDXSwitchContext = vmsvga3dBackDXSwitchContext;
11692	p->pfnDXReadbackContext = vmsvga3dBackDXReadbackContext;
11693	p->pfnDXInvalidateContext = vmsvga3dBackDXInvalidateContext;
11694	p->pfnDXSetSingleConstantBuffer = vmsvga3dBackDXSetSingleConstantBuffer;
11695	p->pfnDXSetShaderResources = vmsvga3dBackDXSetShaderResources;
11696	p->pfnDXSetShader = vmsvga3dBackDXSetShader;
11697	p->pfnDXSetSamplers = vmsvga3dBackDXSetSamplers;
11698	p->pfnDXDraw = vmsvga3dBackDXDraw;
11699	p->pfnDXDrawIndexed = vmsvga3dBackDXDrawIndexed;
11700	p->pfnDXDrawInstanced = vmsvga3dBackDXDrawInstanced;
11701	p->pfnDXDrawIndexedInstanced = vmsvga3dBackDXDrawIndexedInstanced;
11702	p->pfnDXDrawAuto = vmsvga3dBackDXDrawAuto;
11703	p->pfnDXSetInputLayout = vmsvga3dBackDXSetInputLayout;
11704	p->pfnDXSetVertexBuffers = vmsvga3dBackDXSetVertexBuffers;
11705	p->pfnDXSetIndexBuffer = vmsvga3dBackDXSetIndexBuffer;
11706	p->pfnDXSetTopology = vmsvga3dBackDXSetTopology;
11707	p->pfnDXSetRenderTargets = vmsvga3dBackDXSetRenderTargets;
11708	p->pfnDXSetBlendState = vmsvga3dBackDXSetBlendState;
11709	p->pfnDXSetDepthStencilState = vmsvga3dBackDXSetDepthStencilState;
11710	p->pfnDXSetRasterizerState = vmsvga3dBackDXSetRasterizerState;
11711	p->pfnDXDefineQuery = vmsvga3dBackDXDefineQuery;
11712	p->pfnDXDestroyQuery = vmsvga3dBackDXDestroyQuery;
11713	p->pfnDXBeginQuery = vmsvga3dBackDXBeginQuery;
11714	p->pfnDXEndQuery = vmsvga3dBackDXEndQuery;
11715	p->pfnDXSetPredication = vmsvga3dBackDXSetPredication;
11716	p->pfnDXSetSOTargets = vmsvga3dBackDXSetSOTargets;
11717	p->pfnDXSetViewports = vmsvga3dBackDXSetViewports;
11718	p->pfnDXSetScissorRects = vmsvga3dBackDXSetScissorRects;
11719	p->pfnDXClearRenderTargetView = vmsvga3dBackDXClearRenderTargetView;
11720	p->pfnDXClearDepthStencilView = vmsvga3dBackDXClearDepthStencilView;
11721	p->pfnDXPredCopyRegion = vmsvga3dBackDXPredCopyRegion;
11722	p->pfnDXPredCopy = vmsvga3dBackDXPredCopy;
11723	p->pfnDXPresentBlt = vmsvga3dBackDXPresentBlt;
11724	p->pfnDXGenMips = vmsvga3dBackDXGenMips;
11725	p->pfnDXDefineShaderResourceView = vmsvga3dBackDXDefineShaderResourceView;
11726	p->pfnDXDestroyShaderResourceView = vmsvga3dBackDXDestroyShaderResourceView;
11727	p->pfnDXDefineRenderTargetView = vmsvga3dBackDXDefineRenderTargetView;
11728	p->pfnDXDestroyRenderTargetView = vmsvga3dBackDXDestroyRenderTargetView;
11729	p->pfnDXDefineDepthStencilView = vmsvga3dBackDXDefineDepthStencilView;
11730	p->pfnDXDestroyDepthStencilView = vmsvga3dBackDXDestroyDepthStencilView;
11731	p->pfnDXDefineElementLayout = vmsvga3dBackDXDefineElementLayout;
11732	p->pfnDXDestroyElementLayout = vmsvga3dBackDXDestroyElementLayout;
11733	p->pfnDXDefineBlendState = vmsvga3dBackDXDefineBlendState;
11734	p->pfnDXDestroyBlendState = vmsvga3dBackDXDestroyBlendState;
11735	p->pfnDXDefineDepthStencilState = vmsvga3dBackDXDefineDepthStencilState;
11736	p->pfnDXDestroyDepthStencilState = vmsvga3dBackDXDestroyDepthStencilState;
11737	p->pfnDXDefineRasterizerState = vmsvga3dBackDXDefineRasterizerState;
11738	p->pfnDXDestroyRasterizerState = vmsvga3dBackDXDestroyRasterizerState;
11739	p->pfnDXDefineSamplerState = vmsvga3dBackDXDefineSamplerState;
11740	p->pfnDXDestroySamplerState = vmsvga3dBackDXDestroySamplerState;
11741	p->pfnDXDefineShader = vmsvga3dBackDXDefineShader;
11742	p->pfnDXDestroyShader = vmsvga3dBackDXDestroyShader;
11743	p->pfnDXBindShader = vmsvga3dBackDXBindShader;
11744	p->pfnDXDefineStreamOutput = vmsvga3dBackDXDefineStreamOutput;
11745	p->pfnDXDestroyStreamOutput = vmsvga3dBackDXDestroyStreamOutput;
11746	p->pfnDXSetStreamOutput = vmsvga3dBackDXSetStreamOutput;
11747	p->pfnDXSetCOTable = vmsvga3dBackDXSetCOTable;
11748	p->pfnDXBufferCopy = vmsvga3dBackDXBufferCopy;
11749	p->pfnDXSurfaceCopyAndReadback = vmsvga3dBackDXSurfaceCopyAndReadback;
11750	p->pfnDXMoveQuery = vmsvga3dBackDXMoveQuery;
11751	p->pfnDXBindAllShader = vmsvga3dBackDXBindAllShader;
11752	p->pfnDXHint = vmsvga3dBackDXHint;
11753	p->pfnDXBufferUpdate = vmsvga3dBackDXBufferUpdate;
11754	p->pfnDXCondBindAllShader = vmsvga3dBackDXCondBindAllShader;
11755	p->pfnScreenCopy = vmsvga3dBackScreenCopy;
11756	p->pfnIntraSurfaceCopy = vmsvga3dBackIntraSurfaceCopy;
11757	p->pfnDXResolveCopy = vmsvga3dBackDXResolveCopy;
11758	p->pfnDXPredResolveCopy = vmsvga3dBackDXPredResolveCopy;
11759	p->pfnDXPredConvertRegion = vmsvga3dBackDXPredConvertRegion;
11760	p->pfnDXPredConvert = vmsvga3dBackDXPredConvert;
11761	p->pfnWholeSurfaceCopy = vmsvga3dBackWholeSurfaceCopy;
11762	p->pfnDXDefineUAView = vmsvga3dBackDXDefineUAView;
11763	p->pfnDXDestroyUAView = vmsvga3dBackDXDestroyUAView;
11764	p->pfnDXClearUAViewUint = vmsvga3dBackDXClearUAViewUint;
11765	p->pfnDXClearUAViewFloat = vmsvga3dBackDXClearUAViewFloat;
11766	p->pfnDXCopyStructureCount = vmsvga3dBackDXCopyStructureCount;
11767	p->pfnDXSetUAViews = vmsvga3dBackDXSetUAViews;
11768	p->pfnDXDrawIndexedInstancedIndirect = vmsvga3dBackDXDrawIndexedInstancedIndirect;
11769	p->pfnDXDrawInstancedIndirect = vmsvga3dBackDXDrawInstancedIndirect;
11770	p->pfnDXDispatch = vmsvga3dBackDXDispatch;
11771	p->pfnDXDispatchIndirect = vmsvga3dBackDXDispatchIndirect;
11772	p->pfnWriteZeroSurface = vmsvga3dBackWriteZeroSurface;
11773	p->pfnHintZeroSurface = vmsvga3dBackHintZeroSurface;
11774	p->pfnDXTransferToBuffer = vmsvga3dBackDXTransferToBuffer;
11775	p->pfnLogicOpsBitBlt = vmsvga3dBackLogicOpsBitBlt;
11776	p->pfnLogicOpsTransBlt = vmsvga3dBackLogicOpsTransBlt;
11777	p->pfnLogicOpsStretchBlt = vmsvga3dBackLogicOpsStretchBlt;
11778	p->pfnLogicOpsColorFill = vmsvga3dBackLogicOpsColorFill;
11779	p->pfnLogicOpsAlphaBlend = vmsvga3dBackLogicOpsAlphaBlend;
11780	p->pfnLogicOpsClearTypeBlend = vmsvga3dBackLogicOpsClearTypeBlend;
11781	p->pfnDXSetCSUAViews = vmsvga3dBackDXSetCSUAViews;
11782	p->pfnDXSetMinLOD = vmsvga3dBackDXSetMinLOD;
11783	p->pfnDXSetShaderIface = vmsvga3dBackDXSetShaderIface;
11784	p->pfnSurfaceStretchBltNonMSToMS = vmsvga3dBackSurfaceStretchBltNonMSToMS;
11785	p->pfnDXBindShaderIface = vmsvga3dBackDXBindShaderIface;
11786	p->pfnVBDXClearRenderTargetViewRegion = vmsvga3dBackVBDXClearRenderTargetViewRegion;
11787	p->pfnVBDXClearUAV = vmsvga3dBackVBDXClearUAV;
11788	}
11789	}
11790	else
11791	{
11792	AssertFailed();
11793	rc = VERR_INVALID_PARAMETER;
11794	}
11795	}
11796	else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_DXVIDEO) == 0)
11797	{
11798	if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSDXVIDEO))
11799	{
11800	if (pvInterfaceFuncs)
11801	{
11802	VMSVGA3DBACKENDFUNCSDXVIDEO p = (VMSVGA3DBACKENDFUNCSDXVIDEO )pvInterfaceFuncs;
11803	p->pfnVBDXDefineVideoProcessor = vmsvga3dBackVBDXDefineVideoProcessor;
11804	p->pfnVBDXDefineVideoDecoderOutputView = vmsvga3dBackVBDXDefineVideoDecoderOutputView;
11805	p->pfnVBDXDefineVideoDecoder = vmsvga3dBackVBDXDefineVideoDecoder;
11806	p->pfnVBDXVideoDecoderBeginFrame = vmsvga3dBackVBDXVideoDecoderBeginFrame;
11807	p->pfnVBDXVideoDecoderSubmitBuffers = vmsvga3dBackVBDXVideoDecoderSubmitBuffers;
11808	p->pfnVBDXVideoDecoderEndFrame = vmsvga3dBackVBDXVideoDecoderEndFrame;
11809	p->pfnVBDXDefineVideoProcessorInputView = vmsvga3dBackVBDXDefineVideoProcessorInputView;
11810	p->pfnVBDXDefineVideoProcessorOutputView = vmsvga3dBackVBDXDefineVideoProcessorOutputView;
11811	p->pfnVBDXVideoProcessorBlt = vmsvga3dBackVBDXVideoProcessorBlt;
11812	p->pfnVBDXDestroyVideoDecoder = vmsvga3dBackVBDXDestroyVideoDecoder;
11813	p->pfnVBDXDestroyVideoDecoderOutputView = vmsvga3dBackVBDXDestroyVideoDecoderOutputView;
11814	p->pfnVBDXDestroyVideoProcessor = vmsvga3dBackVBDXDestroyVideoProcessor;
11815	p->pfnVBDXDestroyVideoProcessorInputView = vmsvga3dBackVBDXDestroyVideoProcessorInputView;
11816	p->pfnVBDXDestroyVideoProcessorOutputView = vmsvga3dBackVBDXDestroyVideoProcessorOutputView;
11817	p->pfnVBDXVideoProcessorSetOutputTargetRect = vmsvga3dBackVBDXVideoProcessorSetOutputTargetRect;
11818	p->pfnVBDXVideoProcessorSetOutputBackgroundColor = vmsvga3dBackVBDXVideoProcessorSetOutputBackgroundColor;
11819	p->pfnVBDXVideoProcessorSetOutputColorSpace = vmsvga3dBackVBDXVideoProcessorSetOutputColorSpace;
11820	p->pfnVBDXVideoProcessorSetOutputAlphaFillMode = vmsvga3dBackVBDXVideoProcessorSetOutputAlphaFillMode;
11821	p->pfnVBDXVideoProcessorSetOutputConstriction = vmsvga3dBackVBDXVideoProcessorSetOutputConstriction;
11822	p->pfnVBDXVideoProcessorSetOutputStereoMode = vmsvga3dBackVBDXVideoProcessorSetOutputStereoMode;
11823	p->pfnVBDXVideoProcessorSetStreamFrameFormat = vmsvga3dBackVBDXVideoProcessorSetStreamFrameFormat;
11824	p->pfnVBDXVideoProcessorSetStreamColorSpace = vmsvga3dBackVBDXVideoProcessorSetStreamColorSpace;
11825	p->pfnVBDXVideoProcessorSetStreamOutputRate = vmsvga3dBackVBDXVideoProcessorSetStreamOutputRate;
11826	p->pfnVBDXVideoProcessorSetStreamSourceRect = vmsvga3dBackVBDXVideoProcessorSetStreamSourceRect;
11827	p->pfnVBDXVideoProcessorSetStreamDestRect = vmsvga3dBackVBDXVideoProcessorSetStreamDestRect;
11828	p->pfnVBDXVideoProcessorSetStreamAlpha = vmsvga3dBackVBDXVideoProcessorSetStreamAlpha;
11829	p->pfnVBDXVideoProcessorSetStreamPalette = vmsvga3dBackVBDXVideoProcessorSetStreamPalette;
11830	p->pfnVBDXVideoProcessorSetStreamPixelAspectRatio = vmsvga3dBackVBDXVideoProcessorSetStreamPixelAspectRatio;
11831	p->pfnVBDXVideoProcessorSetStreamLumaKey = vmsvga3dBackVBDXVideoProcessorSetStreamLumaKey;
11832	p->pfnVBDXVideoProcessorSetStreamStereoFormat = vmsvga3dBackVBDXVideoProcessorSetStreamStereoFormat;
11833	p->pfnVBDXVideoProcessorSetStreamAutoProcessingMode = vmsvga3dBackVBDXVideoProcessorSetStreamAutoProcessingMode;
11834	p->pfnVBDXVideoProcessorSetStreamFilter = vmsvga3dBackVBDXVideoProcessorSetStreamFilter;
11835	p->pfnVBDXVideoProcessorSetStreamRotation = vmsvga3dBackVBDXVideoProcessorSetStreamRotation;
11836	p->pfnVBDXGetVideoCapability = vmsvga3dBackVBDXGetVideoCapability;
11837	p->pfnVBDXClearVDOV = vmsvga3dBackVBDXClearVDOV;
11838	p->pfnVBDXClearVPIV = vmsvga3dBackVBDXClearVPIV;
11839	p->pfnVBDXClearVPOV = vmsvga3dBackVBDXClearVPOV;
11840	}
11841	}
11842	else
11843	{
11844	AssertFailed();
11845	rc = VERR_INVALID_PARAMETER;
11846	}
11847	}
11848	else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_MAP) == 0)
11849	{
11850	if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSMAP))
11851	{
11852	if (pvInterfaceFuncs)
11853	{
11854	VMSVGA3DBACKENDFUNCSMAP p = (VMSVGA3DBACKENDFUNCSMAP )pvInterfaceFuncs;
11855	p->pfnSurfaceMap = vmsvga3dBackSurfaceMap;
11856	p->pfnSurfaceUnmap = vmsvga3dBackSurfaceUnmap;
11857	}
11858	}
11859	else
11860	{
11861	AssertFailed();
11862	rc = VERR_INVALID_PARAMETER;
11863	}
11864	}
11865	else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_GBO) == 0)
11866	{
11867	if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSGBO))
11868	{
11869	if (pvInterfaceFuncs)
11870	{
11871	VMSVGA3DBACKENDFUNCSGBO p = (VMSVGA3DBACKENDFUNCSGBO )pvInterfaceFuncs;
11872	p->pfnScreenTargetBind = vmsvga3dScreenTargetBind;
11873	p->pfnScreenTargetUpdate = vmsvga3dScreenTargetUpdate;
11874	}
11875	}
11876	else
11877	{
11878	AssertFailed();
11879	rc = VERR_INVALID_PARAMETER;
11880	}
11881	}
11882	else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_3D) == 0)
11883	{
11884	if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCS3D))
11885	{
11886	if (pvInterfaceFuncs)
11887	{
11888	VMSVGA3DBACKENDFUNCS3D p = (VMSVGA3DBACKENDFUNCS3D )pvInterfaceFuncs;
11889	p->pfnInit = vmsvga3dBackInit;
11890	p->pfnPowerOn = vmsvga3dBackPowerOn;
11891	p->pfnTerminate = vmsvga3dBackTerminate;
11892	p->pfnReset = vmsvga3dBackReset;
11893	p->pfnQueryCaps = vmsvga3dBackQueryCaps;
11894	p->pfnChangeMode = vmsvga3dBackChangeMode;
11895	p->pfnCreateTexture = vmsvga3dBackCreateTexture;
11896	p->pfnSurfaceDestroy = vmsvga3dBackSurfaceDestroy;
11897	p->pfnSurfaceInvalidateImage = vmsvga3dBackSurfaceInvalidateImage;
11898	p->pfnSurfaceCopy = vmsvga3dBackSurfaceCopy;
11899	p->pfnSurfaceDMACopyBox = vmsvga3dBackSurfaceDMACopyBox;
11900	p->pfnSurfaceStretchBlt = vmsvga3dBackSurfaceStretchBlt;
11901	p->pfnUpdateHostScreenViewport = vmsvga3dBackUpdateHostScreenViewport;
11902	p->pfnDefineScreen = vmsvga3dBackDefineScreen;
11903	p->pfnDestroyScreen = vmsvga3dBackDestroyScreen;
11904	p->pfnSurfaceBlitToScreen = vmsvga3dBackSurfaceBlitToScreen;
11905	p->pfnSurfaceUpdateHeapBuffers = vmsvga3dBackSurfaceUpdateHeapBuffers;
11906	}
11907	}
11908	else
11909	{
11910	AssertFailed();
11911	rc = VERR_INVALID_PARAMETER;
11912	}
11913	}
11914	else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_VGPU9) == 0)
11915	{
11916	if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSVGPU9))
11917	{
11918	if (pvInterfaceFuncs)
11919	{
11920	VMSVGA3DBACKENDFUNCSVGPU9 p = (VMSVGA3DBACKENDFUNCSVGPU9 )pvInterfaceFuncs;
11921	p->pfnContextDefine = vmsvga3dBackContextDefine;
11922	p->pfnContextDestroy = vmsvga3dBackContextDestroy;
11923	p->pfnSetTransform = vmsvga3dBackSetTransform;
11924	p->pfnSetZRange = vmsvga3dBackSetZRange;
11925	p->pfnSetRenderState = vmsvga3dBackSetRenderState;
11926	p->pfnSetRenderTarget = vmsvga3dBackSetRenderTarget;
11927	p->pfnSetTextureState = vmsvga3dBackSetTextureState;
11928	p->pfnSetMaterial = vmsvga3dBackSetMaterial;
11929	p->pfnSetLightData = vmsvga3dBackSetLightData;
11930	p->pfnSetLightEnabled = vmsvga3dBackSetLightEnabled;
11931	p->pfnSetViewPort = vmsvga3dBackSetViewPort;
11932	p->pfnSetClipPlane = vmsvga3dBackSetClipPlane;
11933	p->pfnCommandClear = vmsvga3dBackCommandClear;
11934	p->pfnDrawPrimitives = vmsvga3dBackDrawPrimitives;
11935	p->pfnSetScissorRect = vmsvga3dBackSetScissorRect;
11936	p->pfnGenerateMipmaps = vmsvga3dBackGenerateMipmaps;
11937	p->pfnShaderDefine = vmsvga3dBackShaderDefine;
11938	p->pfnShaderDestroy = vmsvga3dBackShaderDestroy;
11939	p->pfnShaderSet = vmsvga3dBackShaderSet;
11940	p->pfnShaderSetConst = vmsvga3dBackShaderSetConst;
11941	p->pfnOcclusionQueryCreate = vmsvga3dBackOcclusionQueryCreate;
11942	p->pfnOcclusionQueryDelete = vmsvga3dBackOcclusionQueryDelete;
11943	p->pfnOcclusionQueryBegin = vmsvga3dBackOcclusionQueryBegin;
11944	p->pfnOcclusionQueryEnd = vmsvga3dBackOcclusionQueryEnd;
11945	p->pfnOcclusionQueryGetData = vmsvga3dBackOcclusionQueryGetData;
11946	}
11947	}
11948	else
11949	{
11950	AssertFailed();
11951	rc = VERR_INVALID_PARAMETER;
11952	}
11953	}
11954	else
11955	rc = VERR_NOT_IMPLEMENTED;
11956	return rc;
11957	}
11958
11959
11960	extern VMSVGA3DBACKENDDESC const g_BackendDX =
11961	{
11962	"DX",
11963	vmsvga3dBackQueryInterface
11964	};

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source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-dx-dx11.cpp@ 104811

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