DevVGA-SVGA3d-dx-dx11.cpp@ 105681

Last change on this file since 105681 was 105644, checked in by vboxsync, 9 months ago
Devices/Graphics: clamp vertex buffer stride
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 504.1 KB

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1	/* $Id: DevVGA-SVGA3d-dx-dx11.cpp 105644 2024-08-09 23:24:24Z vboxsync $ */
2	/** @file
3	* DevVMWare - VMWare SVGA device
4	*/
5
6	/*
7	* Copyright (C) 2020-2024 Oracle and/or its affiliates.
8	*
9	* This file is part of VirtualBox base platform packages, as
10	* available from https://www.virtualbox.org.
11	*
12	* This program is free software; you can redistribute it and/or
13	* modify it under the terms of the GNU General Public License
14	* as published by the Free Software Foundation, in version 3 of the
15	* License.
16	*
17	* This program is distributed in the hope that it will be useful, but
18	* WITHOUT ANY WARRANTY; without even the implied warranty of
19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20	* General Public License for more details.
21	*
22	* You should have received a copy of the GNU General Public License
23	* along with this program; if not, see <https://www.gnu.org/licenses>.
24	*
25	* SPDX-License-Identifier: GPL-3.0-only
26	*/
27
28
29	/*********************************************************************************************************************************
30	* Header Files *
31	*********************************************************************************************************************************/
32	#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
33	#include <VBox/AssertGuest.h>
34	#include <VBox/log.h>
35	#include <VBox/vmm/pdmdev.h>
36	#include <VBox/vmm/pgm.h>
37
38	#include <iprt/asm-mem.h>
39	#include <iprt/assert.h>
40	#include <iprt/errcore.h>
41	#include <iprt/mem.h>
42
43	#include <VBoxVideo.h> /* required by DevVGA.h */
44	#include <VBoxVideo3D.h>
45
46	/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
47	#include "DevVGA.h"
48
49	#include "DevVGA-SVGA.h"
50	#include "DevVGA-SVGA3d.h"
51	#include "DevVGA-SVGA3d-internal.h"
52	#include "DevVGA-SVGA3d-dx-shader.h"
53
54	/* d3d11_1.h has a structure field named 'Status' but Status is defined as int on Linux host */
55	#if defined(Status)
56	#undef Status
57	#endif
58	#ifndef RT_OS_WINDOWS
59	# pragma GCC diagnostic push
60	# pragma GCC diagnostic ignored "-Wpedantic"
61	#endif
62	#include <d3d11_1.h>
63	#ifndef RT_OS_WINDOWS
64	# pragma GCC diagnostic pop
65	#endif
66
67
68	#ifdef RT_OS_WINDOWS
69	# define VBOX_D3D11_LIBRARY_NAME "d3d11"
70	#else
71	# define VBOX_D3D11_LIBRARY_NAME "VBoxDxVk"
72	#endif
73
74	/* One ID3D11Device object is used for all VMSVGA guest contexts because the VGPU design makes resources
75	* independent from rendering contexts. I.e. multiple guest contexts freely access a surface.
76	*
77	* The initial implementation of this backend has used separate ID3D11Devices for each VMSVGA context
78	* and created shared resources to allow one ID3D11Device to access a resource which was rendered to by
79	* another ID3D11Device. This synchronization of access to shared resources kills performance actually.
80	*/
81
82	/* A single staging ID3D11Buffer is used for uploading data to other buffers. */
83	#define DX_COMMON_STAGING_BUFFER
84	/* Always flush after submitting a draw call for debugging. */
85	//#define DX_FLUSH_AFTER_DRAW
86
87	#define D3D_RELEASE_ARRAY(a_Count, a_papArray) do { \
88	for (uint32_t i = 0; i < (a_Count); ++i) \
89	D3D_RELEASE((a_papArray)[i]); \
90	} while (0)
91
92	typedef struct D3D11BLITTER
93	{
94	ID3D11Device1 *pDevice;
95	ID3D11DeviceContext1 *pImmediateContext;
96
97	ID3D11VertexShader *pVertexShader;
98	ID3D11PixelShader *pPixelShader;
99	ID3D11SamplerState *pSamplerState;
100	ID3D11RasterizerState1 *pRasterizerState;
101	ID3D11BlendState1 *pBlendState;
102	} D3D11BLITTER;
103
104	typedef struct DXDEVICE
105	{
106	ID3D11Device1 pDevice; / Device. */
107	ID3D11DeviceContext1 pImmediateContext; / Corresponding context. */
108	IDXGIFactory pDxgiFactory; / DXGI Factory. */
109	D3D_FEATURE_LEVEL FeatureLevel;
110
111	uint32_t MultisampleCountMask; /* 1 << (MSCount - 1) for MSCount = 2, 4, 8, 16, 32 */
112
113	ID3D11VideoDevice *pVideoDevice;
114	ID3D11VideoContext *pVideoContext;
115	#ifdef DX_COMMON_STAGING_BUFFER
116	/* Staging buffer for transfer to surface buffers. */
117	ID3D11Buffer pStagingBuffer; / The staging buffer resource. */
118	uint32_t cbStagingBuffer; /* Current size of the staging buffer resource. */
119	#endif
120
121	D3D11BLITTER Blitter; /* Blits one texture to another. */
122	} DXDEVICE;
123
124	/* Kind of a texture view. */
125	typedef enum VMSVGA3DBACKVIEWTYPE
126	{
127	VMSVGA3D_VIEWTYPE_NONE = 0,
128	VMSVGA3D_VIEWTYPE_RENDERTARGET = 1,
129	VMSVGA3D_VIEWTYPE_DEPTHSTENCIL = 2,
130	VMSVGA3D_VIEWTYPE_SHADERRESOURCE = 3,
131	VMSVGA3D_VIEWTYPE_UNORDEREDACCESS = 4,
132	VMSVGA3D_VIEWTYPE_VIDEODECODEROUTPUT = 5,
133	VMSVGA3D_VIEWTYPE_VIDEOPROCESSORINPUT = 6,
134	VMSVGA3D_VIEWTYPE_VIDEOPROCESSOROUTPUT = 7
135	} VMSVGA3DBACKVIEWTYPE;
136
137	/* Information about a texture view to track all created views:.
138	* when a surface is invalidated, then all views must deleted;
139	* when a view is deleted, then the view must be unlinked from the surface.
140	*/
141	typedef struct DXVIEWINFO
142	{
143	uint32_t sid; /* Surface which the view was created for. */
144	uint32_t cid; /* DX context which created the view. */
145	uint32_t viewId; /* View id assigned by the guest. */
146	VMSVGA3DBACKVIEWTYPE enmViewType;
147	} DXVIEWINFO;
148
149	/* Context Object Table element for a texture view. */
150	typedef struct DXVIEW
151	{
152	uint32_t cid; /* DX context which created the view. */
153	uint32_t sid; /* Surface which the view was created for. */
154	uint32_t viewId; /* View id assigned by the guest. */
155	VMSVGA3DBACKVIEWTYPE enmViewType;
156
157	union
158	{
159	ID3D11View pView; / The view object. */
160	ID3D11RenderTargetView *pRenderTargetView;
161	ID3D11DepthStencilView *pDepthStencilView;
162	ID3D11ShaderResourceView *pShaderResourceView;
163	ID3D11UnorderedAccessView *pUnorderedAccessView;
164	ID3D11VideoDecoderOutputView *pVideoDecoderOutputView;
165	ID3D11VideoProcessorInputView *pVideoProcessorInputView;
166	ID3D11VideoProcessorOutputView *pVideoProcessorOutputView;
167	} u;
168
169	RTLISTNODE nodeSurfaceView; /* Views are linked to the surface. */
170	} DXVIEW;
171
172	/* What kind of resource has been created for the VMSVGA3D surface. */
173	typedef enum VMSVGA3DBACKRESTYPE
174	{
175	VMSVGA3D_RESTYPE_NONE = 0,
176	VMSVGA3D_RESTYPE_TEXTURE_1D = 1,
177	VMSVGA3D_RESTYPE_TEXTURE_2D = 2,
178	VMSVGA3D_RESTYPE_TEXTURE_CUBE = 3,
179	VMSVGA3D_RESTYPE_TEXTURE_3D = 4,
180	VMSVGA3D_RESTYPE_BUFFER = 5,
181	} VMSVGA3DBACKRESTYPE;
182
183	typedef struct VMSVGA3DBACKENDSURFACE
184	{
185	VMSVGA3DBACKRESTYPE enmResType;
186	DXGI_FORMAT enmDxgiFormat;
187	union
188	{
189	ID3D11Resource *pResource;
190	ID3D11Texture1D *pTexture1D;
191	ID3D11Texture2D *pTexture2D;
192	ID3D11Texture3D *pTexture3D;
193	ID3D11Buffer *pBuffer;
194	} u;
195
196	/* For updates from memory. */
197	union /** @todo One per format. */
198	{
199	ID3D11Resource *pResource;
200	ID3D11Texture1D *pTexture1D;
201	ID3D11Texture2D *pTexture2D;
202	ID3D11Texture3D *pTexture3D;
203	#ifndef DX_COMMON_STAGING_BUFFER
204	ID3D11Buffer *pBuffer;
205	#endif
206	} dynamic;
207
208	/* For reading the texture content. */
209	union /** @todo One per format. */
210	{
211	ID3D11Resource *pResource;
212	ID3D11Texture1D *pTexture1D;
213	ID3D11Texture2D *pTexture2D;
214	ID3D11Texture3D *pTexture3D;
215	#ifndef DX_COMMON_STAGING_BUFFER
216	ID3D11Buffer *pBuffer;
217	#endif
218	} staging;
219
220	/* Render target views, depth stencil views and shader resource views created for this texture or buffer. */
221	RTLISTANCHOR listView; /* DXVIEW */
222
223	} VMSVGA3DBACKENDSURFACE;
224
225
226	typedef struct VMSVGAHWSCREEN
227	{
228	ID3D11Texture2D pTexture; / Shared texture for the screen content. Only used as CopyResource target. */
229	IDXGIResource pDxgiResource; / Interface of the texture. */
230	IDXGIKeyedMutex pDXGIKeyedMutex; / Synchronization interface for the render device. */
231	HANDLE SharedHandle; /* The shared handle of this structure. */
232	uint32_t sidScreenTarget; /* The source surface for this screen. */
233	} VMSVGAHWSCREEN;
234
235
236	typedef struct DXELEMENTLAYOUT
237	{
238	ID3D11InputLayout *pElementLayout;
239	uint32_t cElementDesc;
240	D3D11_INPUT_ELEMENT_DESC aElementDesc[32];
241	} DXELEMENTLAYOUT;
242
243	typedef struct DXSHADER
244	{
245	SVGA3dShaderType enmShaderType;
246	union
247	{
248	ID3D11DeviceChild pShader; / All. */
249	ID3D11VertexShader pVertexShader; / SVGA3D_SHADERTYPE_VS */
250	ID3D11PixelShader pPixelShader; / SVGA3D_SHADERTYPE_PS */
251	ID3D11GeometryShader pGeometryShader; / SVGA3D_SHADERTYPE_GS */
252	ID3D11HullShader pHullShader; / SVGA3D_SHADERTYPE_HS */
253	ID3D11DomainShader pDomainShader; / SVGA3D_SHADERTYPE_DS */
254	ID3D11ComputeShader pComputeShader; / SVGA3D_SHADERTYPE_CS */
255	};
256	void *pvDXBC;
257	uint32_t cbDXBC;
258
259	uint32_t soid; /* Stream output declarations for geometry shaders. */
260
261	DXShaderInfo shaderInfo;
262	} DXSHADER;
263
264	typedef struct DXQUERY
265	{
266	union
267	{
268	ID3D11Query *pQuery;
269	ID3D11Predicate *pPredicate;
270	};
271	} DXQUERY;
272
273	typedef struct DXVIDEOPROCESSOR
274	{
275	ID3D11VideoProcessorEnumerator *pEnum;
276	ID3D11VideoProcessor *pVideoProcessor;
277	} DXVIDEOPROCESSOR;
278
279	typedef struct DXVIDEODECODER
280	{
281	ID3D11VideoDecoder *pVideoDecoder;
282	} DXVIDEODECODER;
283
284	typedef struct DXSTREAMOUTPUT
285	{
286	UINT cDeclarationEntry;
287	D3D11_SO_DECLARATION_ENTRY aDeclarationEntry[SVGA3D_MAX_STREAMOUT_DECLS];
288	} DXSTREAMOUTPUT;
289
290	typedef struct DXBOUNDVERTEXBUFFER
291	{
292	ID3D11Buffer *pBuffer;
293	uint32_t stride;
294	uint32_t offset;
295	} DXBOUNDVERTEXBUFFER;
296
297	typedef struct DXBOUNDINDEXBUFFER
298	{
299	ID3D11Buffer *pBuffer;
300	DXGI_FORMAT indexBufferFormat;
301	uint32_t indexBufferOffset;
302	} DXBOUNDINDEXBUFFER;
303
304	typedef struct DXBOUNDRESOURCES /* Currently bound resources. Mirror SVGADXContextMobFormat structure. */
305	{
306	struct
307	{
308	ID3D11Buffer *constantBuffers[SVGA3D_DX_MAX_CONSTBUFFERS];
309	} shaderState[SVGA3D_NUM_SHADERTYPE];
310	} DXBOUNDRESOURCES;
311
312
313	typedef struct VMSVGA3DBACKENDDXCONTEXT
314	{
315	/* Arrays for Context-Object Tables. Number of entries depends on COTable size. */
316	uint32_t cBlendState; /* Number of entries in the papBlendState array. */
317	uint32_t cDepthStencilState; /* papDepthStencilState */
318	uint32_t cSamplerState; /* papSamplerState */
319	uint32_t cRasterizerState; /* papRasterizerState */
320	uint32_t cElementLayout; /* paElementLayout */
321	uint32_t cRenderTargetView; /* paRenderTargetView */
322	uint32_t cDepthStencilView; /* paDepthStencilView */
323	uint32_t cShaderResourceView; /* paShaderResourceView */
324	uint32_t cQuery; /* paQuery */
325	uint32_t cShader; /* paShader */
326	uint32_t cStreamOutput; /* paStreamOutput */
327	uint32_t cUnorderedAccessView; /* paUnorderedAccessView */
328	ID3D11BlendState1 **papBlendState;
329	ID3D11DepthStencilState **papDepthStencilState;
330	ID3D11SamplerState **papSamplerState;
331	ID3D11RasterizerState1 **papRasterizerState;
332	DXELEMENTLAYOUT *paElementLayout;
333	DXVIEW *paRenderTargetView;
334	DXVIEW *paDepthStencilView;
335	DXVIEW *paShaderResourceView;
336	DXQUERY *paQuery;
337	DXSHADER *paShader;
338	DXSTREAMOUTPUT *paStreamOutput;
339	DXVIEW *paUnorderedAccessView;
340
341	uint32_t cVideoProcessor; /* paVideoProcessor */
342	uint32_t cVideoDecoderOutputView; /* paVideoDecoderOutputView */
343	uint32_t cVideoDecoder; /* paVideoDecoder */
344	uint32_t cVideoProcessorInputView; /* paVideoProcessorInputView */
345	uint32_t cVideoProcessorOutputView; /* paVideoProcessorOutputView */
346	DXVIDEOPROCESSOR *paVideoProcessor;
347	DXVIEW *paVideoDecoderOutputView;
348	DXVIDEODECODER *paVideoDecoder;
349	DXVIEW *paVideoProcessorInputView;
350	DXVIEW *paVideoProcessorOutputView;
351
352	uint32_t cSOTarget; /* How many SO targets are currently set (SetSOTargets) */
353
354	DXBOUNDRESOURCES resources;
355	} VMSVGA3DBACKENDDXCONTEXT;
356
357	/* Shader disassembler function. Optional. */
358	typedef HRESULT FN_D3D_DISASSEMBLE(LPCVOID pSrcData, SIZE_T SrcDataSize, UINT Flags, LPCSTR szComments, ID3D10Blob **ppDisassembly);
359	typedef FN_D3D_DISASSEMBLE *PFN_D3D_DISASSEMBLE;
360
361	typedef struct VMSVGA3DBACKEND
362	{
363	RTLDRMOD hD3D11;
364	PFN_D3D11_CREATE_DEVICE pfnD3D11CreateDevice;
365
366	RTLDRMOD hD3DCompiler;
367	PFN_D3D_DISASSEMBLE pfnD3DDisassemble;
368
369	DXDEVICE dxDevice;
370	UINT VendorId;
371	UINT DeviceId;
372
373	SVGADXContextMobFormat svgaDXContext; /* Current state of pipeline. */
374
375	DXBOUNDRESOURCES resources; /* What is currently applied to the pipeline. */
376	} VMSVGA3DBACKEND;
377
378
379	/* Static function prototypes. */
380	static int dxDeviceFlush(DXDEVICE *pDevice);
381	static int dxSetRenderTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext);
382	static int dxSetCSUnorderedAccessViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext);
383	static DECLCALLBACK(void) vmsvga3dBackSurfaceDestroy(PVGASTATECC pThisCC, bool fClearCOTableEntry, PVMSVGA3DSURFACE pSurface);
384	static int dxDestroyShader(DXSHADER *pDXShader);
385	static int dxDestroyQuery(DXQUERY *pDXQuery);
386	static int dxReadBuffer(DXDEVICE pDevice, ID3D11Buffer pBuffer, UINT Offset, UINT Bytes, void *ppvData, uint32_t pcbData);
387
388	static int dxCreateVideoProcessor(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId, VBSVGACOTableDXVideoProcessorEntry const *pEntry);
389	static void dxDestroyVideoProcessor(DXVIDEOPROCESSOR *pDXVideoProcessor);
390	static int dxCreateVideoDecoder(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoDecoderId videoDecoderId, VBSVGACOTableDXVideoDecoderEntry const *pEntry);
391	static void dxDestroyVideoDecoder(DXVIDEODECODER *pDXVideoDecoder);
392
393	static HRESULT BlitInit(D3D11BLITTER pBlitter, ID3D11Device1 pDevice, ID3D11DeviceContext1 *pImmediateContext);
394	static void BlitRelease(D3D11BLITTER *pBlitter);
395
396
397	/* This is not available with the DXVK headers for some reason. */
398	#ifndef RT_OS_WINDOWS
399	typedef enum D3D11_TEXTURECUBE_FACE {
400	D3D11_TEXTURECUBE_FACE_POSITIVE_X,
401	D3D11_TEXTURECUBE_FACE_NEGATIVE_X,
402	D3D11_TEXTURECUBE_FACE_POSITIVE_Y,
403	D3D11_TEXTURECUBE_FACE_NEGATIVE_Y,
404	D3D11_TEXTURECUBE_FACE_POSITIVE_Z,
405	D3D11_TEXTURECUBE_FACE_NEGATIVE_Z
406	} D3D11_TEXTURECUBE_FACE;
407	#endif
408
409
410	#if 0 /* unused */
411	DECLINLINE(D3D11_TEXTURECUBE_FACE) vmsvga3dCubemapFaceFromIndex(uint32_t iFace)
412	{
413	D3D11_TEXTURECUBE_FACE Face;
414	switch (iFace)
415	{
416	case 0: Face = D3D11_TEXTURECUBE_FACE_POSITIVE_X; break;
417	case 1: Face = D3D11_TEXTURECUBE_FACE_NEGATIVE_X; break;
418	case 2: Face = D3D11_TEXTURECUBE_FACE_POSITIVE_Y; break;
419	case 3: Face = D3D11_TEXTURECUBE_FACE_NEGATIVE_Y; break;
420	case 4: Face = D3D11_TEXTURECUBE_FACE_POSITIVE_Z; break;
421	default:
422	case 5: Face = D3D11_TEXTURECUBE_FACE_NEGATIVE_Z; break;
423	}
424	return Face;
425	}
426	#endif
427
428	/* This is to workaround issues with X8 formats, because they can't be used in some operations. */
429	#define DX_REPLACE_X8_WITH_A8
430	static DXGI_FORMAT vmsvgaDXSurfaceFormat2Dxgi(SVGA3dSurfaceFormat format)
431	{
432	/* Ensure that correct headers are used.
433	* SVGA3D_AYUV was equal to 45, then replaced with SVGA3D_FORMAT_DEAD2 = 45, and redefined as SVGA3D_AYUV = 152.
434	*/
435	AssertCompile(SVGA3D_AYUV == 152);
436
437	#define DXGI_FORMAT_ DXGI_FORMAT_UNKNOWN
438	/** @todo More formats. */
439	switch (format)
440	{
441	#ifdef DX_REPLACE_X8_WITH_A8
442	case SVGA3D_X8R8G8B8: return DXGI_FORMAT_B8G8R8A8_UNORM;
443	#else
444	case SVGA3D_X8R8G8B8: return DXGI_FORMAT_B8G8R8X8_UNORM;
445	#endif
446	case SVGA3D_A8R8G8B8: return DXGI_FORMAT_B8G8R8A8_UNORM;
447	case SVGA3D_R5G6B5: return DXGI_FORMAT_B5G6R5_UNORM;
448	case SVGA3D_X1R5G5B5: return DXGI_FORMAT_B5G5R5A1_UNORM;
449	case SVGA3D_A1R5G5B5: return DXGI_FORMAT_B5G5R5A1_UNORM;
450	case SVGA3D_A4R4G4B4: break; // 11.1 return DXGI_FORMAT_B4G4R4A4_UNORM;
451	case SVGA3D_Z_D32: break;
452	case SVGA3D_Z_D16: return DXGI_FORMAT_D16_UNORM;
453	case SVGA3D_Z_D24S8: return DXGI_FORMAT_D24_UNORM_S8_UINT;
454	case SVGA3D_Z_D15S1: break;
455	case SVGA3D_LUMINANCE8: return DXGI_FORMAT_;
456	case SVGA3D_LUMINANCE4_ALPHA4: return DXGI_FORMAT_;
457	case SVGA3D_LUMINANCE16: return DXGI_FORMAT_;
458	case SVGA3D_LUMINANCE8_ALPHA8: return DXGI_FORMAT_;
459	case SVGA3D_DXT1: return DXGI_FORMAT_;
460	case SVGA3D_DXT2: return DXGI_FORMAT_;
461	case SVGA3D_DXT3: return DXGI_FORMAT_;
462	case SVGA3D_DXT4: return DXGI_FORMAT_;
463	case SVGA3D_DXT5: return DXGI_FORMAT_;
464	case SVGA3D_BUMPU8V8: return DXGI_FORMAT_;
465	case SVGA3D_BUMPL6V5U5: return DXGI_FORMAT_;
466	case SVGA3D_BUMPX8L8V8U8: return DXGI_FORMAT_;
467	case SVGA3D_FORMAT_DEAD1: break;
468	case SVGA3D_ARGB_S10E5: return DXGI_FORMAT_;
469	case SVGA3D_ARGB_S23E8: return DXGI_FORMAT_;
470	case SVGA3D_A2R10G10B10: return DXGI_FORMAT_;
471	case SVGA3D_V8U8: return DXGI_FORMAT_;
472	case SVGA3D_Q8W8V8U8: return DXGI_FORMAT_;
473	case SVGA3D_CxV8U8: return DXGI_FORMAT_;
474	case SVGA3D_X8L8V8U8: return DXGI_FORMAT_;
475	case SVGA3D_A2W10V10U10: return DXGI_FORMAT_;
476	case SVGA3D_ALPHA8: return DXGI_FORMAT_;
477	case SVGA3D_R_S10E5: return DXGI_FORMAT_;
478	case SVGA3D_R_S23E8: return DXGI_FORMAT_;
479	case SVGA3D_RG_S10E5: return DXGI_FORMAT_;
480	case SVGA3D_RG_S23E8: return DXGI_FORMAT_;
481	case SVGA3D_BUFFER: return DXGI_FORMAT_;
482	case SVGA3D_Z_D24X8: return DXGI_FORMAT_;
483	case SVGA3D_V16U16: return DXGI_FORMAT_;
484	case SVGA3D_G16R16: return DXGI_FORMAT_;
485	case SVGA3D_A16B16G16R16: return DXGI_FORMAT_;
486	case SVGA3D_UYVY: return DXGI_FORMAT_;
487	case SVGA3D_YUY2: return DXGI_FORMAT_YUY2;
488	case SVGA3D_NV12: return DXGI_FORMAT_NV12;
489	case SVGA3D_FORMAT_DEAD2: break; /* Old SVGA3D_AYUV */
490	case SVGA3D_R32G32B32A32_TYPELESS: return DXGI_FORMAT_R32G32B32A32_TYPELESS;
491	case SVGA3D_R32G32B32A32_UINT: return DXGI_FORMAT_R32G32B32A32_UINT;
492	case SVGA3D_R32G32B32A32_SINT: return DXGI_FORMAT_R32G32B32A32_SINT;
493	case SVGA3D_R32G32B32_TYPELESS: return DXGI_FORMAT_R32G32B32_TYPELESS;
494	case SVGA3D_R32G32B32_FLOAT: return DXGI_FORMAT_R32G32B32_FLOAT;
495	case SVGA3D_R32G32B32_UINT: return DXGI_FORMAT_R32G32B32_UINT;
496	case SVGA3D_R32G32B32_SINT: return DXGI_FORMAT_R32G32B32_SINT;
497	case SVGA3D_R16G16B16A16_TYPELESS: return DXGI_FORMAT_R16G16B16A16_TYPELESS;
498	case SVGA3D_R16G16B16A16_UINT: return DXGI_FORMAT_R16G16B16A16_UINT;
499	case SVGA3D_R16G16B16A16_SNORM: return DXGI_FORMAT_R16G16B16A16_SNORM;
500	case SVGA3D_R16G16B16A16_SINT: return DXGI_FORMAT_R16G16B16A16_SINT;
501	case SVGA3D_R32G32_TYPELESS: return DXGI_FORMAT_R32G32_TYPELESS;
502	case SVGA3D_R32G32_UINT: return DXGI_FORMAT_R32G32_UINT;
503	case SVGA3D_R32G32_SINT: return DXGI_FORMAT_R32G32_SINT;
504	case SVGA3D_R32G8X24_TYPELESS: return DXGI_FORMAT_R32G8X24_TYPELESS;
505	case SVGA3D_D32_FLOAT_S8X24_UINT: return DXGI_FORMAT_D32_FLOAT_S8X24_UINT;
506	case SVGA3D_R32_FLOAT_X8X24: return DXGI_FORMAT_R32_FLOAT_X8X24_TYPELESS;
507	case SVGA3D_X32_G8X24_UINT: return DXGI_FORMAT_X32_TYPELESS_G8X24_UINT;
508	case SVGA3D_R10G10B10A2_TYPELESS: return DXGI_FORMAT_R10G10B10A2_TYPELESS;
509	case SVGA3D_R10G10B10A2_UINT: return DXGI_FORMAT_R10G10B10A2_UINT;
510	case SVGA3D_R11G11B10_FLOAT: return DXGI_FORMAT_R11G11B10_FLOAT;
511	case SVGA3D_R8G8B8A8_TYPELESS: return DXGI_FORMAT_R8G8B8A8_TYPELESS;
512	case SVGA3D_R8G8B8A8_UNORM: return DXGI_FORMAT_R8G8B8A8_UNORM;
513	case SVGA3D_R8G8B8A8_UNORM_SRGB: return DXGI_FORMAT_R8G8B8A8_UNORM_SRGB;
514	case SVGA3D_R8G8B8A8_UINT: return DXGI_FORMAT_R8G8B8A8_UINT;
515	case SVGA3D_R8G8B8A8_SINT: return DXGI_FORMAT_R8G8B8A8_SINT;
516	case SVGA3D_R16G16_TYPELESS: return DXGI_FORMAT_R16G16_TYPELESS;
517	case SVGA3D_R16G16_UINT: return DXGI_FORMAT_R16G16_UINT;
518	case SVGA3D_R16G16_SINT: return DXGI_FORMAT_R16G16_SINT;
519	case SVGA3D_R32_TYPELESS: return DXGI_FORMAT_R32_TYPELESS;
520	case SVGA3D_D32_FLOAT: return DXGI_FORMAT_D32_FLOAT;
521	case SVGA3D_R32_UINT: return DXGI_FORMAT_R32_UINT;
522	case SVGA3D_R32_SINT: return DXGI_FORMAT_R32_SINT;
523	case SVGA3D_R24G8_TYPELESS: return DXGI_FORMAT_R24G8_TYPELESS;
524	case SVGA3D_D24_UNORM_S8_UINT: return DXGI_FORMAT_D24_UNORM_S8_UINT;
525	case SVGA3D_R24_UNORM_X8: return DXGI_FORMAT_R24_UNORM_X8_TYPELESS;
526	case SVGA3D_X24_G8_UINT: return DXGI_FORMAT_X24_TYPELESS_G8_UINT;
527	case SVGA3D_R8G8_TYPELESS: return DXGI_FORMAT_R8G8_TYPELESS;
528	case SVGA3D_R8G8_UNORM: return DXGI_FORMAT_R8G8_UNORM;
529	case SVGA3D_R8G8_UINT: return DXGI_FORMAT_R8G8_UINT;
530	case SVGA3D_R8G8_SINT: return DXGI_FORMAT_R8G8_SINT;
531	case SVGA3D_R16_TYPELESS: return DXGI_FORMAT_R16_TYPELESS;
532	case SVGA3D_R16_UNORM: return DXGI_FORMAT_R16_UNORM;
533	case SVGA3D_R16_UINT: return DXGI_FORMAT_R16_UINT;
534	case SVGA3D_R16_SNORM: return DXGI_FORMAT_R16_SNORM;
535	case SVGA3D_R16_SINT: return DXGI_FORMAT_R16_SINT;
536	case SVGA3D_R8_TYPELESS: return DXGI_FORMAT_R8_TYPELESS;
537	case SVGA3D_R8_UNORM: return DXGI_FORMAT_R8_UNORM;
538	case SVGA3D_R8_UINT: return DXGI_FORMAT_R8_UINT;
539	case SVGA3D_R8_SNORM: return DXGI_FORMAT_R8_SNORM;
540	case SVGA3D_R8_SINT: return DXGI_FORMAT_R8_SINT;
541	case SVGA3D_P8: break;
542	case SVGA3D_R9G9B9E5_SHAREDEXP: return DXGI_FORMAT_R9G9B9E5_SHAREDEXP;
543	case SVGA3D_R8G8_B8G8_UNORM: return DXGI_FORMAT_R8G8_B8G8_UNORM;
544	case SVGA3D_G8R8_G8B8_UNORM: return DXGI_FORMAT_G8R8_G8B8_UNORM;
545	case SVGA3D_BC1_TYPELESS: return DXGI_FORMAT_BC1_TYPELESS;
546	case SVGA3D_BC1_UNORM_SRGB: return DXGI_FORMAT_BC1_UNORM_SRGB;
547	case SVGA3D_BC2_TYPELESS: return DXGI_FORMAT_BC2_TYPELESS;
548	case SVGA3D_BC2_UNORM_SRGB: return DXGI_FORMAT_BC2_UNORM_SRGB;
549	case SVGA3D_BC3_TYPELESS: return DXGI_FORMAT_BC3_TYPELESS;
550	case SVGA3D_BC3_UNORM_SRGB: return DXGI_FORMAT_BC3_UNORM_SRGB;
551	case SVGA3D_BC4_TYPELESS: return DXGI_FORMAT_BC4_TYPELESS;
552	case SVGA3D_ATI1: break;
553	case SVGA3D_BC4_SNORM: return DXGI_FORMAT_BC4_SNORM;
554	case SVGA3D_BC5_TYPELESS: return DXGI_FORMAT_BC5_TYPELESS;
555	case SVGA3D_ATI2: break;
556	case SVGA3D_BC5_SNORM: return DXGI_FORMAT_BC5_SNORM;
557	case SVGA3D_R10G10B10_XR_BIAS_A2_UNORM: return DXGI_FORMAT_R10G10B10_XR_BIAS_A2_UNORM;
558	case SVGA3D_B8G8R8A8_TYPELESS: return DXGI_FORMAT_B8G8R8A8_TYPELESS;
559	case SVGA3D_B8G8R8A8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8A8_UNORM_SRGB;
560	#ifdef DX_REPLACE_X8_WITH_A8
561	case SVGA3D_B8G8R8X8_TYPELESS: return DXGI_FORMAT_B8G8R8A8_TYPELESS;
562	case SVGA3D_B8G8R8X8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8A8_UNORM_SRGB;
563	#else
564	case SVGA3D_B8G8R8X8_TYPELESS: return DXGI_FORMAT_B8G8R8X8_TYPELESS;
565	case SVGA3D_B8G8R8X8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8X8_UNORM_SRGB;
566	#endif
567	case SVGA3D_Z_DF16: break;
568	case SVGA3D_Z_DF24: break;
569	case SVGA3D_Z_D24S8_INT: return DXGI_FORMAT_D24_UNORM_S8_UINT;
570	case SVGA3D_YV12: break;
571	case SVGA3D_R32G32B32A32_FLOAT: return DXGI_FORMAT_R32G32B32A32_FLOAT;
572	case SVGA3D_R16G16B16A16_FLOAT: return DXGI_FORMAT_R16G16B16A16_FLOAT;
573	case SVGA3D_R16G16B16A16_UNORM: return DXGI_FORMAT_R16G16B16A16_UNORM;
574	case SVGA3D_R32G32_FLOAT: return DXGI_FORMAT_R32G32_FLOAT;
575	case SVGA3D_R10G10B10A2_UNORM: return DXGI_FORMAT_R10G10B10A2_UNORM;
576	case SVGA3D_R8G8B8A8_SNORM: return DXGI_FORMAT_R8G8B8A8_SNORM;
577	case SVGA3D_R16G16_FLOAT: return DXGI_FORMAT_R16G16_FLOAT;
578	case SVGA3D_R16G16_UNORM: return DXGI_FORMAT_R16G16_UNORM;
579	case SVGA3D_R16G16_SNORM: return DXGI_FORMAT_R16G16_SNORM;
580	case SVGA3D_R32_FLOAT: return DXGI_FORMAT_R32_FLOAT;
581	case SVGA3D_R8G8_SNORM: return DXGI_FORMAT_R8G8_SNORM;
582	case SVGA3D_R16_FLOAT: return DXGI_FORMAT_R16_FLOAT;
583	case SVGA3D_D16_UNORM: return DXGI_FORMAT_D16_UNORM;
584	case SVGA3D_A8_UNORM: return DXGI_FORMAT_A8_UNORM;
585	case SVGA3D_BC1_UNORM: return DXGI_FORMAT_BC1_UNORM;
586	case SVGA3D_BC2_UNORM: return DXGI_FORMAT_BC2_UNORM;
587	case SVGA3D_BC3_UNORM: return DXGI_FORMAT_BC3_UNORM;
588	case SVGA3D_B5G6R5_UNORM: return DXGI_FORMAT_B5G6R5_UNORM;
589	case SVGA3D_B5G5R5A1_UNORM: return DXGI_FORMAT_B5G5R5A1_UNORM;
590	case SVGA3D_B8G8R8A8_UNORM: return DXGI_FORMAT_B8G8R8A8_UNORM;
591	#ifdef DX_REPLACE_X8_WITH_A8
592	case SVGA3D_B8G8R8X8_UNORM: return DXGI_FORMAT_B8G8R8A8_UNORM;
593	#else
594	case SVGA3D_B8G8R8X8_UNORM: return DXGI_FORMAT_B8G8R8X8_UNORM;
595	#endif
596	case SVGA3D_BC4_UNORM: return DXGI_FORMAT_BC4_UNORM;
597	case SVGA3D_BC5_UNORM: return DXGI_FORMAT_BC5_UNORM;
598
599	case SVGA3D_B4G4R4A4_UNORM: return DXGI_FORMAT_;
600	case SVGA3D_BC6H_TYPELESS: return DXGI_FORMAT_BC6H_TYPELESS;
601	case SVGA3D_BC6H_UF16: return DXGI_FORMAT_BC6H_UF16;
602	case SVGA3D_BC6H_SF16: return DXGI_FORMAT_BC6H_SF16;
603	case SVGA3D_BC7_TYPELESS: return DXGI_FORMAT_BC7_TYPELESS;
604	case SVGA3D_BC7_UNORM: return DXGI_FORMAT_BC7_UNORM;
605	case SVGA3D_BC7_UNORM_SRGB: return DXGI_FORMAT_BC7_UNORM_SRGB;
606	case SVGA3D_AYUV: return DXGI_FORMAT_AYUV;
607
608	case SVGA3D_FORMAT_INVALID:
609	case SVGA3D_FORMAT_MAX: break;
610	}
611	// AssertFailed();
612	return DXGI_FORMAT_UNKNOWN;
613	#undef DXGI_FORMAT_
614	}
615
616
617	static SVGA3dSurfaceFormat vmsvgaDXDevCapSurfaceFmt2Format(SVGA3dDevCapIndex enmDevCap)
618	{
619	switch (enmDevCap)
620	{
621	case SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8: return SVGA3D_X8R8G8B8;
622	case SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8: return SVGA3D_A8R8G8B8;
623	case SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10: return SVGA3D_A2R10G10B10;
624	case SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5: return SVGA3D_X1R5G5B5;
625	case SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5: return SVGA3D_A1R5G5B5;
626	case SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4: return SVGA3D_A4R4G4B4;
627	case SVGA3D_DEVCAP_SURFACEFMT_R5G6B5: return SVGA3D_R5G6B5;
628	case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16: return SVGA3D_LUMINANCE16;
629	case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8: return SVGA3D_LUMINANCE8_ALPHA8;
630	case SVGA3D_DEVCAP_SURFACEFMT_ALPHA8: return SVGA3D_ALPHA8;
631	case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8: return SVGA3D_LUMINANCE8;
632	case SVGA3D_DEVCAP_SURFACEFMT_Z_D16: return SVGA3D_Z_D16;
633	case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8: return SVGA3D_Z_D24S8;
634	case SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8: return SVGA3D_Z_D24X8;
635	case SVGA3D_DEVCAP_SURFACEFMT_DXT1: return SVGA3D_DXT1;
636	case SVGA3D_DEVCAP_SURFACEFMT_DXT2: return SVGA3D_DXT2;
637	case SVGA3D_DEVCAP_SURFACEFMT_DXT3: return SVGA3D_DXT3;
638	case SVGA3D_DEVCAP_SURFACEFMT_DXT4: return SVGA3D_DXT4;
639	case SVGA3D_DEVCAP_SURFACEFMT_DXT5: return SVGA3D_DXT5;
640	case SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8: return SVGA3D_BUMPX8L8V8U8;
641	case SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10: return SVGA3D_A2W10V10U10;
642	case SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8: return SVGA3D_BUMPU8V8;
643	case SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8: return SVGA3D_Q8W8V8U8;
644	case SVGA3D_DEVCAP_SURFACEFMT_CxV8U8: return SVGA3D_CxV8U8;
645	case SVGA3D_DEVCAP_SURFACEFMT_R_S10E5: return SVGA3D_R_S10E5;
646	case SVGA3D_DEVCAP_SURFACEFMT_R_S23E8: return SVGA3D_R_S23E8;
647	case SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5: return SVGA3D_RG_S10E5;
648	case SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8: return SVGA3D_RG_S23E8;
649	case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5: return SVGA3D_ARGB_S10E5;
650	case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8: return SVGA3D_ARGB_S23E8;
651	case SVGA3D_DEVCAP_SURFACEFMT_V16U16: return SVGA3D_V16U16;
652	case SVGA3D_DEVCAP_SURFACEFMT_G16R16: return SVGA3D_G16R16;
653	case SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16: return SVGA3D_A16B16G16R16;
654	case SVGA3D_DEVCAP_SURFACEFMT_UYVY: return SVGA3D_UYVY;
655	case SVGA3D_DEVCAP_SURFACEFMT_YUY2: return SVGA3D_YUY2;
656	case SVGA3D_DEVCAP_SURFACEFMT_NV12: return SVGA3D_NV12;
657	case SVGA3D_DEVCAP_DEAD10: return SVGA3D_FORMAT_DEAD2; /* SVGA3D_DEVCAP_SURFACEFMT_AYUV -> SVGA3D_AYUV */
658	case SVGA3D_DEVCAP_SURFACEFMT_Z_DF16: return SVGA3D_Z_DF16;
659	case SVGA3D_DEVCAP_SURFACEFMT_Z_DF24: return SVGA3D_Z_DF24;
660	case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT: return SVGA3D_Z_D24S8_INT;
661	case SVGA3D_DEVCAP_SURFACEFMT_ATI1: return SVGA3D_ATI1;
662	case SVGA3D_DEVCAP_SURFACEFMT_ATI2: return SVGA3D_ATI2;
663	case SVGA3D_DEVCAP_SURFACEFMT_YV12: return SVGA3D_YV12;
664	default:
665	AssertFailed();
666	break;
667	}
668	return SVGA3D_FORMAT_INVALID;
669	}
670
671
672	static SVGA3dSurfaceFormat vmsvgaDXDevCapDxfmt2Format(SVGA3dDevCapIndex enmDevCap)
673	{
674	switch (enmDevCap)
675	{
676	case SVGA3D_DEVCAP_DXFMT_X8R8G8B8: return SVGA3D_X8R8G8B8;
677	case SVGA3D_DEVCAP_DXFMT_A8R8G8B8: return SVGA3D_A8R8G8B8;
678	case SVGA3D_DEVCAP_DXFMT_R5G6B5: return SVGA3D_R5G6B5;
679	case SVGA3D_DEVCAP_DXFMT_X1R5G5B5: return SVGA3D_X1R5G5B5;
680	case SVGA3D_DEVCAP_DXFMT_A1R5G5B5: return SVGA3D_A1R5G5B5;
681	case SVGA3D_DEVCAP_DXFMT_A4R4G4B4: return SVGA3D_A4R4G4B4;
682	case SVGA3D_DEVCAP_DXFMT_Z_D32: return SVGA3D_Z_D32;
683	case SVGA3D_DEVCAP_DXFMT_Z_D16: return SVGA3D_Z_D16;
684	case SVGA3D_DEVCAP_DXFMT_Z_D24S8: return SVGA3D_Z_D24S8;
685	case SVGA3D_DEVCAP_DXFMT_Z_D15S1: return SVGA3D_Z_D15S1;
686	case SVGA3D_DEVCAP_DXFMT_LUMINANCE8: return SVGA3D_LUMINANCE8;
687	case SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4: return SVGA3D_LUMINANCE4_ALPHA4;
688	case SVGA3D_DEVCAP_DXFMT_LUMINANCE16: return SVGA3D_LUMINANCE16;
689	case SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8: return SVGA3D_LUMINANCE8_ALPHA8;
690	case SVGA3D_DEVCAP_DXFMT_DXT1: return SVGA3D_DXT1;
691	case SVGA3D_DEVCAP_DXFMT_DXT2: return SVGA3D_DXT2;
692	case SVGA3D_DEVCAP_DXFMT_DXT3: return SVGA3D_DXT3;
693	case SVGA3D_DEVCAP_DXFMT_DXT4: return SVGA3D_DXT4;
694	case SVGA3D_DEVCAP_DXFMT_DXT5: return SVGA3D_DXT5;
695	case SVGA3D_DEVCAP_DXFMT_BUMPU8V8: return SVGA3D_BUMPU8V8;
696	case SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5: return SVGA3D_BUMPL6V5U5;
697	case SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8: return SVGA3D_BUMPX8L8V8U8;
698	case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1: return SVGA3D_FORMAT_DEAD1;
699	case SVGA3D_DEVCAP_DXFMT_ARGB_S10E5: return SVGA3D_ARGB_S10E5;
700	case SVGA3D_DEVCAP_DXFMT_ARGB_S23E8: return SVGA3D_ARGB_S23E8;
701	case SVGA3D_DEVCAP_DXFMT_A2R10G10B10: return SVGA3D_A2R10G10B10;
702	case SVGA3D_DEVCAP_DXFMT_V8U8: return SVGA3D_V8U8;
703	case SVGA3D_DEVCAP_DXFMT_Q8W8V8U8: return SVGA3D_Q8W8V8U8;
704	case SVGA3D_DEVCAP_DXFMT_CxV8U8: return SVGA3D_CxV8U8;
705	case SVGA3D_DEVCAP_DXFMT_X8L8V8U8: return SVGA3D_X8L8V8U8;
706	case SVGA3D_DEVCAP_DXFMT_A2W10V10U10: return SVGA3D_A2W10V10U10;
707	case SVGA3D_DEVCAP_DXFMT_ALPHA8: return SVGA3D_ALPHA8;
708	case SVGA3D_DEVCAP_DXFMT_R_S10E5: return SVGA3D_R_S10E5;
709	case SVGA3D_DEVCAP_DXFMT_R_S23E8: return SVGA3D_R_S23E8;
710	case SVGA3D_DEVCAP_DXFMT_RG_S10E5: return SVGA3D_RG_S10E5;
711	case SVGA3D_DEVCAP_DXFMT_RG_S23E8: return SVGA3D_RG_S23E8;
712	case SVGA3D_DEVCAP_DXFMT_BUFFER: return SVGA3D_BUFFER;
713	case SVGA3D_DEVCAP_DXFMT_Z_D24X8: return SVGA3D_Z_D24X8;
714	case SVGA3D_DEVCAP_DXFMT_V16U16: return SVGA3D_V16U16;
715	case SVGA3D_DEVCAP_DXFMT_G16R16: return SVGA3D_G16R16;
716	case SVGA3D_DEVCAP_DXFMT_A16B16G16R16: return SVGA3D_A16B16G16R16;
717	case SVGA3D_DEVCAP_DXFMT_UYVY: return SVGA3D_UYVY;
718	case SVGA3D_DEVCAP_DXFMT_YUY2: return SVGA3D_YUY2;
719	case SVGA3D_DEVCAP_DXFMT_NV12: return SVGA3D_NV12;
720	case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD2: return SVGA3D_FORMAT_DEAD2; /* SVGA3D_DEVCAP_DXFMT_AYUV -> SVGA3D_AYUV */
721	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS: return SVGA3D_R32G32B32A32_TYPELESS;
722	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT: return SVGA3D_R32G32B32A32_UINT;
723	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT: return SVGA3D_R32G32B32A32_SINT;
724	case SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS: return SVGA3D_R32G32B32_TYPELESS;
725	case SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT: return SVGA3D_R32G32B32_FLOAT;
726	case SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT: return SVGA3D_R32G32B32_UINT;
727	case SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT: return SVGA3D_R32G32B32_SINT;
728	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS: return SVGA3D_R16G16B16A16_TYPELESS;
729	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT: return SVGA3D_R16G16B16A16_UINT;
730	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM: return SVGA3D_R16G16B16A16_SNORM;
731	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT: return SVGA3D_R16G16B16A16_SINT;
732	case SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS: return SVGA3D_R32G32_TYPELESS;
733	case SVGA3D_DEVCAP_DXFMT_R32G32_UINT: return SVGA3D_R32G32_UINT;
734	case SVGA3D_DEVCAP_DXFMT_R32G32_SINT: return SVGA3D_R32G32_SINT;
735	case SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS: return SVGA3D_R32G8X24_TYPELESS;
736	case SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT: return SVGA3D_D32_FLOAT_S8X24_UINT;
737	case SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24: return SVGA3D_R32_FLOAT_X8X24;
738	case SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT: return SVGA3D_X32_G8X24_UINT;
739	case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS: return SVGA3D_R10G10B10A2_TYPELESS;
740	case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT: return SVGA3D_R10G10B10A2_UINT;
741	case SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT: return SVGA3D_R11G11B10_FLOAT;
742	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS: return SVGA3D_R8G8B8A8_TYPELESS;
743	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM: return SVGA3D_R8G8B8A8_UNORM;
744	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB: return SVGA3D_R8G8B8A8_UNORM_SRGB;
745	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT: return SVGA3D_R8G8B8A8_UINT;
746	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT: return SVGA3D_R8G8B8A8_SINT;
747	case SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS: return SVGA3D_R16G16_TYPELESS;
748	case SVGA3D_DEVCAP_DXFMT_R16G16_UINT: return SVGA3D_R16G16_UINT;
749	case SVGA3D_DEVCAP_DXFMT_R16G16_SINT: return SVGA3D_R16G16_SINT;
750	case SVGA3D_DEVCAP_DXFMT_R32_TYPELESS: return SVGA3D_R32_TYPELESS;
751	case SVGA3D_DEVCAP_DXFMT_D32_FLOAT: return SVGA3D_D32_FLOAT;
752	case SVGA3D_DEVCAP_DXFMT_R32_UINT: return SVGA3D_R32_UINT;
753	case SVGA3D_DEVCAP_DXFMT_R32_SINT: return SVGA3D_R32_SINT;
754	case SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS: return SVGA3D_R24G8_TYPELESS;
755	case SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT: return SVGA3D_D24_UNORM_S8_UINT;
756	case SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8: return SVGA3D_R24_UNORM_X8;
757	case SVGA3D_DEVCAP_DXFMT_X24_G8_UINT: return SVGA3D_X24_G8_UINT;
758	case SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS: return SVGA3D_R8G8_TYPELESS;
759	case SVGA3D_DEVCAP_DXFMT_R8G8_UNORM: return SVGA3D_R8G8_UNORM;
760	case SVGA3D_DEVCAP_DXFMT_R8G8_UINT: return SVGA3D_R8G8_UINT;
761	case SVGA3D_DEVCAP_DXFMT_R8G8_SINT: return SVGA3D_R8G8_SINT;
762	case SVGA3D_DEVCAP_DXFMT_R16_TYPELESS: return SVGA3D_R16_TYPELESS;
763	case SVGA3D_DEVCAP_DXFMT_R16_UNORM: return SVGA3D_R16_UNORM;
764	case SVGA3D_DEVCAP_DXFMT_R16_UINT: return SVGA3D_R16_UINT;
765	case SVGA3D_DEVCAP_DXFMT_R16_SNORM: return SVGA3D_R16_SNORM;
766	case SVGA3D_DEVCAP_DXFMT_R16_SINT: return SVGA3D_R16_SINT;
767	case SVGA3D_DEVCAP_DXFMT_R8_TYPELESS: return SVGA3D_R8_TYPELESS;
768	case SVGA3D_DEVCAP_DXFMT_R8_UNORM: return SVGA3D_R8_UNORM;
769	case SVGA3D_DEVCAP_DXFMT_R8_UINT: return SVGA3D_R8_UINT;
770	case SVGA3D_DEVCAP_DXFMT_R8_SNORM: return SVGA3D_R8_SNORM;
771	case SVGA3D_DEVCAP_DXFMT_R8_SINT: return SVGA3D_R8_SINT;
772	case SVGA3D_DEVCAP_DXFMT_P8: return SVGA3D_P8;
773	case SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP: return SVGA3D_R9G9B9E5_SHAREDEXP;
774	case SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM: return SVGA3D_R8G8_B8G8_UNORM;
775	case SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM: return SVGA3D_G8R8_G8B8_UNORM;
776	case SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS: return SVGA3D_BC1_TYPELESS;
777	case SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB: return SVGA3D_BC1_UNORM_SRGB;
778	case SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS: return SVGA3D_BC2_TYPELESS;
779	case SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB: return SVGA3D_BC2_UNORM_SRGB;
780	case SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS: return SVGA3D_BC3_TYPELESS;
781	case SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB: return SVGA3D_BC3_UNORM_SRGB;
782	case SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS: return SVGA3D_BC4_TYPELESS;
783	case SVGA3D_DEVCAP_DXFMT_ATI1: return SVGA3D_ATI1;
784	case SVGA3D_DEVCAP_DXFMT_BC4_SNORM: return SVGA3D_BC4_SNORM;
785	case SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS: return SVGA3D_BC5_TYPELESS;
786	case SVGA3D_DEVCAP_DXFMT_ATI2: return SVGA3D_ATI2;
787	case SVGA3D_DEVCAP_DXFMT_BC5_SNORM: return SVGA3D_BC5_SNORM;
788	case SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM: return SVGA3D_R10G10B10_XR_BIAS_A2_UNORM;
789	case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS: return SVGA3D_B8G8R8A8_TYPELESS;
790	case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB: return SVGA3D_B8G8R8A8_UNORM_SRGB;
791	case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS: return SVGA3D_B8G8R8X8_TYPELESS;
792	case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB: return SVGA3D_B8G8R8X8_UNORM_SRGB;
793	case SVGA3D_DEVCAP_DXFMT_Z_DF16: return SVGA3D_Z_DF16;
794	case SVGA3D_DEVCAP_DXFMT_Z_DF24: return SVGA3D_Z_DF24;
795	case SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT: return SVGA3D_Z_D24S8_INT;
796	case SVGA3D_DEVCAP_DXFMT_YV12: return SVGA3D_YV12;
797	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT: return SVGA3D_R32G32B32A32_FLOAT;
798	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT: return SVGA3D_R16G16B16A16_FLOAT;
799	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM: return SVGA3D_R16G16B16A16_UNORM;
800	case SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT: return SVGA3D_R32G32_FLOAT;
801	case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM: return SVGA3D_R10G10B10A2_UNORM;
802	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM: return SVGA3D_R8G8B8A8_SNORM;
803	case SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT: return SVGA3D_R16G16_FLOAT;
804	case SVGA3D_DEVCAP_DXFMT_R16G16_UNORM: return SVGA3D_R16G16_UNORM;
805	case SVGA3D_DEVCAP_DXFMT_R16G16_SNORM: return SVGA3D_R16G16_SNORM;
806	case SVGA3D_DEVCAP_DXFMT_R32_FLOAT: return SVGA3D_R32_FLOAT;
807	case SVGA3D_DEVCAP_DXFMT_R8G8_SNORM: return SVGA3D_R8G8_SNORM;
808	case SVGA3D_DEVCAP_DXFMT_R16_FLOAT: return SVGA3D_R16_FLOAT;
809	case SVGA3D_DEVCAP_DXFMT_D16_UNORM: return SVGA3D_D16_UNORM;
810	case SVGA3D_DEVCAP_DXFMT_A8_UNORM: return SVGA3D_A8_UNORM;
811	case SVGA3D_DEVCAP_DXFMT_BC1_UNORM: return SVGA3D_BC1_UNORM;
812	case SVGA3D_DEVCAP_DXFMT_BC2_UNORM: return SVGA3D_BC2_UNORM;
813	case SVGA3D_DEVCAP_DXFMT_BC3_UNORM: return SVGA3D_BC3_UNORM;
814	case SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM: return SVGA3D_B5G6R5_UNORM;
815	case SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM: return SVGA3D_B5G5R5A1_UNORM;
816	case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM: return SVGA3D_B8G8R8A8_UNORM;
817	case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM: return SVGA3D_B8G8R8X8_UNORM;
818	case SVGA3D_DEVCAP_DXFMT_BC4_UNORM: return SVGA3D_BC4_UNORM;
819	case SVGA3D_DEVCAP_DXFMT_BC5_UNORM: return SVGA3D_BC5_UNORM;
820	case SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS: return SVGA3D_BC6H_TYPELESS;
821	case SVGA3D_DEVCAP_DXFMT_BC6H_UF16: return SVGA3D_BC6H_UF16;
822	case SVGA3D_DEVCAP_DXFMT_BC6H_SF16: return SVGA3D_BC6H_SF16;
823	case SVGA3D_DEVCAP_DXFMT_BC7_TYPELESS: return SVGA3D_BC7_TYPELESS;
824	case SVGA3D_DEVCAP_DXFMT_BC7_UNORM: return SVGA3D_BC7_UNORM;
825	case SVGA3D_DEVCAP_DXFMT_BC7_UNORM_SRGB: return SVGA3D_BC7_UNORM_SRGB;
826	default:
827	AssertFailed();
828	break;
829	}
830	return SVGA3D_FORMAT_INVALID;
831	}
832
833
834	static int vmsvgaDXCheckFormatSupportPreDX(PVMSVGA3DSTATE pState, SVGA3dSurfaceFormat enmFormat, uint32_t *pu32DevCap)
835	{
836	int rc = VINF_SUCCESS;
837
838	*pu32DevCap = 0;
839
840	DXGI_FORMAT const dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(enmFormat);
841	if (dxgiFormat != DXGI_FORMAT_UNKNOWN)
842	{
843	RT_NOREF(pState);
844	/** @todo Implement */
845	}
846	else
847	rc = VERR_NOT_SUPPORTED;
848	return rc;
849	}
850
851	static int dxFormatAllowMultisample(DXGI_FORMAT dxgiFormat)
852	{
853	/* Windows 11 guest does not allow multisample flag for a number of formats.
854	* D3D11 implementation on non-Windows hosts might return such flag.
855	*/
856	switch (dxgiFormat)
857	{
858	case DXGI_FORMAT_R32_FLOAT_X8X24_TYPELESS:
859	case DXGI_FORMAT_X32_TYPELESS_G8X24_UINT:
860	case DXGI_FORMAT_R24_UNORM_X8_TYPELESS:
861	case DXGI_FORMAT_X24_TYPELESS_G8_UINT:
862	return false;
863	default: break;
864	}
865	return true;
866	}
867
868	static int vmsvgaDXCheckFormatSupport(PVMSVGA3DSTATE pState, SVGA3dSurfaceFormat enmFormat, uint32_t *pu32DevCap)
869	{
870	int rc = VINF_SUCCESS;
871
872	*pu32DevCap = 0;
873
874	DXGI_FORMAT const dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(enmFormat);
875	if (dxgiFormat != DXGI_FORMAT_UNKNOWN)
876	{
877	ID3D11Device *pDevice = pState->pBackend->dxDevice.pDevice;
878	UINT FormatSupport = 0;
879	HRESULT hr = pDevice->CheckFormatSupport(dxgiFormat, &FormatSupport);
880	if (SUCCEEDED(hr))
881	{
882	*pu32DevCap \|= SVGA3D_DXFMT_SUPPORTED;
883
884	if (FormatSupport & D3D11_FORMAT_SUPPORT_SHADER_SAMPLE)
885	*pu32DevCap \|= SVGA3D_DXFMT_SHADER_SAMPLE;
886
887	if (FormatSupport & D3D11_FORMAT_SUPPORT_RENDER_TARGET)
888	*pu32DevCap \|= SVGA3D_DXFMT_COLOR_RENDERTARGET;
889
890	if (FormatSupport & D3D11_FORMAT_SUPPORT_DEPTH_STENCIL)
891	*pu32DevCap \|= SVGA3D_DXFMT_DEPTH_RENDERTARGET;
892
893	if (FormatSupport & D3D11_FORMAT_SUPPORT_BLENDABLE)
894	*pu32DevCap \|= SVGA3D_DXFMT_BLENDABLE;
895
896	if (FormatSupport & D3D11_FORMAT_SUPPORT_MIP)
897	*pu32DevCap \|= SVGA3D_DXFMT_MIPS;
898
899	if (FormatSupport & D3D11_FORMAT_SUPPORT_TEXTURECUBE)
900	*pu32DevCap \|= SVGA3D_DXFMT_ARRAY;
901
902	if (FormatSupport & D3D11_FORMAT_SUPPORT_TEXTURE3D)
903	*pu32DevCap \|= SVGA3D_DXFMT_VOLUME;
904
905	if (FormatSupport & D3D11_FORMAT_SUPPORT_IA_VERTEX_BUFFER)
906	*pu32DevCap \|= SVGA3D_DXFMT_DX_VERTEX_BUFFER;
907
908	if (pState->pBackend->dxDevice.MultisampleCountMask != 0)
909	{
910	UINT NumQualityLevels;
911	hr = pDevice->CheckMultisampleQualityLevels(dxgiFormat, 2, &NumQualityLevels);
912	if (SUCCEEDED(hr) && NumQualityLevels != 0 && dxFormatAllowMultisample(dxgiFormat))
913	*pu32DevCap \|= SVGA3D_DXFMT_MULTISAMPLE;
914	}
915	}
916	else
917	{
918	LogFunc(("CheckFormatSupport failed for 0x%08x, hr = 0x%08x\n", dxgiFormat, hr));
919	rc = VERR_NOT_SUPPORTED;
920	}
921	}
922	else
923	rc = VERR_NOT_SUPPORTED;
924	return rc;
925	}
926
927
928	static void dxLogRelVideoCaps(ID3D11VideoDevice *pVideoDevice)
929	{
930	#define FORMAT_ELEMENT(aFormat) { aFormat, #aFormat }
931	static const struct {
932	DXGI_FORMAT format;
933	char const *pszFormat;
934	} aVDFormats[] =
935	{
936	FORMAT_ELEMENT(DXGI_FORMAT_NV12),
937	FORMAT_ELEMENT(DXGI_FORMAT_YUY2),
938	FORMAT_ELEMENT(DXGI_FORMAT_AYUV),
939	};
940
941	static const struct {
942	DXGI_FORMAT format;
943	char const *pszFormat;
944	} aVPFormats[] =
945	{
946	// Queried from driver
947	FORMAT_ELEMENT(DXGI_FORMAT_R8_UNORM),
948	FORMAT_ELEMENT(DXGI_FORMAT_R16_UNORM),
949	FORMAT_ELEMENT(DXGI_FORMAT_NV12),
950	FORMAT_ELEMENT(DXGI_FORMAT_420_OPAQUE),
951	FORMAT_ELEMENT(DXGI_FORMAT_P010),
952	FORMAT_ELEMENT(DXGI_FORMAT_P016),
953	FORMAT_ELEMENT(DXGI_FORMAT_YUY2),
954	FORMAT_ELEMENT(DXGI_FORMAT_NV11),
955	FORMAT_ELEMENT(DXGI_FORMAT_AYUV),
956	FORMAT_ELEMENT(DXGI_FORMAT_R16G16B16A16_FLOAT),
957	FORMAT_ELEMENT(DXGI_FORMAT_Y216),
958	FORMAT_ELEMENT(DXGI_FORMAT_B8G8R8X8_UNORM),
959	FORMAT_ELEMENT(DXGI_FORMAT_B8G8R8A8_UNORM),
960	FORMAT_ELEMENT(DXGI_FORMAT_R8G8B8A8_UNORM),
961	FORMAT_ELEMENT(DXGI_FORMAT_R10G10B10A2_UNORM),
962
963	// From format table
964	FORMAT_ELEMENT(DXGI_FORMAT_R10G10B10_XR_BIAS_A2_UNORM),
965	FORMAT_ELEMENT(DXGI_FORMAT_R8G8B8A8_UNORM_SRGB),
966	FORMAT_ELEMENT(DXGI_FORMAT_B8G8R8A8_UNORM_SRGB),
967	FORMAT_ELEMENT(DXGI_FORMAT_Y410),
968	FORMAT_ELEMENT(DXGI_FORMAT_Y416),
969	FORMAT_ELEMENT(DXGI_FORMAT_Y210),
970	FORMAT_ELEMENT(DXGI_FORMAT_AI44),
971	FORMAT_ELEMENT(DXGI_FORMAT_IA44),
972	FORMAT_ELEMENT(DXGI_FORMAT_P8),
973	FORMAT_ELEMENT(DXGI_FORMAT_A8P8),
974	};
975	#undef FORMAT_ELEMENT
976
977	static char const *apszFilterName[] =
978	{
979	"BRIGHTNESS",
980	"CONTRAST",
981	"HUE",
982	"SATURATION",
983	"NOISE_REDUCTION",
984	"EDGE_ENHANCEMENT",
985	"ANAMORPHIC_SCALING",
986	"STEREO_ADJUSTMENT",
987	};
988
989	HRESULT hr;
990
991	UINT cProfiles = pVideoDevice->GetVideoDecoderProfileCount();
992	for (UINT i = 0; i < cProfiles; ++i)
993	{
994	GUID DecodeProfile;
995	hr = pVideoDevice->GetVideoDecoderProfile(i, &DecodeProfile);
996	if (SUCCEEDED(hr))
997	LogRel(("VMSVGA: DecodeProfile[%d]: %RTuuid\n", i, &DecodeProfile));
998	}
999
1000	D3D11_VIDEO_DECODER_DESC DecoderDesc;
1001	// Commonly used D3D11_DECODER_PROFILE_H264_VLD_NOFGT
1002	DecoderDesc.Guid = { 0x1b81be68, 0xa0c7,0x11d3,0xb9,0x84,0x00,0xc0,0x4f,0x2e,0x73,0xc5 };
1003	DecoderDesc.SampleWidth = 1920;
1004	DecoderDesc.SampleHeight = 1080;
1005	DecoderDesc.OutputFormat = DXGI_FORMAT_NV12;
1006
1007	UINT cConfigs = 0;
1008	hr = pVideoDevice->GetVideoDecoderConfigCount(&DecoderDesc, &cConfigs);
1009	for (UINT i = 0; i < cConfigs; ++i)
1010	{
1011	D3D11_VIDEO_DECODER_CONFIG DecoderConfig;
1012	hr = pVideoDevice->GetVideoDecoderConfig(&DecoderDesc, i, &DecoderConfig);
1013	if (SUCCEEDED(hr))
1014	{
1015	LogRel2(("VMSVGA: Config[%d]:\n"
1016	"VMSVGA: %RTuuid\n"
1017	"VMSVGA: %RTuuid\n"
1018	"VMSVGA: %RTuuid\n"
1019	"VMSVGA: BitstreamRaw 0x%x\n"
1020	"VMSVGA: MBCRO 0x%x\n"
1021	"VMSVGA: RDH 0x%x\n"
1022	"VMSVGA: SR8 0x%x\n"
1023	"VMSVGA: R8Sub 0x%x\n"
1024	"VMSVGA: SH8or9C 0x%x\n"
1025	"VMSVGA: SRInterlea 0x%x\n"
1026	"VMSVGA: IRUnsigned 0x%x\n"
1027	"VMSVGA: RDAccel 0x%x\n"
1028	"VMSVGA: HInvScan 0x%x\n"
1029	"VMSVGA: SpecIDCT 0x%x\n"
1030	"VMSVGA: 4GCoefs 0x%x\n"
1031	"VMSVGA: MinRTBC 0x%x\n"
1032	"VMSVGA: DecSpec 0x%x\n"
1033	,
1034	i, &DecoderConfig.guidConfigBitstreamEncryption,
1035	&DecoderConfig.guidConfigMBcontrolEncryption,
1036	&DecoderConfig.guidConfigResidDiffEncryption,
1037	DecoderConfig.ConfigBitstreamRaw,
1038	DecoderConfig.ConfigMBcontrolRasterOrder,
1039	DecoderConfig.ConfigResidDiffHost,
1040	DecoderConfig.ConfigSpatialResid8,
1041	DecoderConfig.ConfigResid8Subtraction,
1042	DecoderConfig.ConfigSpatialHost8or9Clipping,
1043	DecoderConfig.ConfigSpatialResidInterleaved,
1044	DecoderConfig.ConfigIntraResidUnsigned,
1045	DecoderConfig.ConfigResidDiffAccelerator,
1046	DecoderConfig.ConfigHostInverseScan,
1047	DecoderConfig.ConfigSpecificIDCT,
1048	DecoderConfig.Config4GroupedCoefs,
1049	DecoderConfig.ConfigMinRenderTargetBuffCount,
1050	DecoderConfig.ConfigDecoderSpecific
1051	));
1052	}
1053	}
1054
1055	for (UINT idxFormat = 0; idxFormat < RT_ELEMENTS(aVDFormats); ++idxFormat)
1056	{
1057	BOOL Supported;
1058	hr = pVideoDevice->CheckVideoDecoderFormat(&DecoderDesc.Guid, aVDFormats[idxFormat].format, &Supported);
1059	if (FAILED(hr))
1060	Supported = FALSE;
1061	LogRel(("VMSVGA: %s: %s\n", aVDFormats[idxFormat].pszFormat, Supported ? "supported" : "-"));
1062	}
1063
1064	/* An arbitrary common video content. */
1065	D3D11_VIDEO_PROCESSOR_CONTENT_DESC Desc;
1066	Desc.InputFrameFormat = D3D11_VIDEO_FRAME_FORMAT_PROGRESSIVE;
1067	Desc.InputFrameRate.Numerator = 25;
1068	Desc.InputFrameRate.Denominator = 1;
1069	Desc.InputWidth = 1920;
1070	Desc.InputHeight = 1080;
1071	Desc.OutputFrameRate.Numerator = 30;
1072	Desc.OutputFrameRate.Denominator = 1;
1073	Desc.OutputWidth = 864;
1074	Desc.OutputHeight = 486;
1075	Desc.Usage = D3D11_VIDEO_USAGE_OPTIMAL_QUALITY;
1076
1077	ID3D11VideoProcessorEnumerator *pEnum = 0;
1078	hr = pVideoDevice->CreateVideoProcessorEnumerator(&Desc, &pEnum);
1079	if (SUCCEEDED(hr))
1080	{
1081	for (unsigned i = 0; i < RT_ELEMENTS(aVPFormats); ++i)
1082	{
1083	UINT Flags;
1084	hr = pEnum->CheckVideoProcessorFormat(aVPFormats[i].format, &Flags);
1085	if (FAILED(hr))
1086	Flags = 0;
1087	LogRel(("VMSVGA: %s: flags %x\n", aVPFormats[i].pszFormat, Flags));
1088	}
1089
1090	D3D11_VIDEO_PROCESSOR_CAPS Caps;
1091	hr = pEnum->GetVideoProcessorCaps(&Caps);
1092	if (SUCCEEDED(hr))
1093	{
1094	LogRel(("VMSVGA: VideoProcessorCaps:\n"
1095	"VMSVGA: DeviceCaps %x\n"
1096	"VMSVGA: FeatureCaps %x\n"
1097	"VMSVGA: FilterCaps %x\n"
1098	"VMSVGA: InputFormatCaps %x\n"
1099	"VMSVGA: AutoStreamCaps %x\n"
1100	"VMSVGA: StereoCaps %x\n"
1101	"VMSVGA: RateConversionCapsCount %d\n"
1102	"VMSVGA: MaxInputStreams %d\n"
1103	"VMSVGA: MaxStreamStates %d\n"
1104	"",
1105	Caps.DeviceCaps,
1106	Caps.FeatureCaps,
1107	Caps.FilterCaps,
1108	Caps.InputFormatCaps,
1109	Caps.AutoStreamCaps,
1110	Caps.StereoCaps,
1111	Caps.RateConversionCapsCount,
1112	Caps.MaxInputStreams,
1113	Caps.MaxStreamStates
1114	));
1115
1116	for (unsigned i = 0; i < RT_ELEMENTS(apszFilterName); ++i)
1117	{
1118	if (Caps.FilterCaps & (1 << i))
1119	{
1120	D3D11_VIDEO_PROCESSOR_FILTER_RANGE Range;
1121	hr = pEnum->GetVideoProcessorFilterRange((D3D11_VIDEO_PROCESSOR_FILTER)i, &Range);
1122	if (SUCCEEDED(hr))
1123	{
1124	LogRel(("VMSVGA: Filter[%s]: Min %d, Max %d, Default %d, Multiplier " FLOAT_FMT_STR "\n",
1125	apszFilterName[i],
1126	Range.Minimum,
1127	Range.Maximum,
1128	Range.Default,
1129	FLOAT_FMT_ARGS(Range.Multiplier)
1130	));
1131	}
1132	}
1133	}
1134
1135	for (unsigned idxRateCaps = 0; idxRateCaps < Caps.RateConversionCapsCount; ++idxRateCaps)
1136	{
1137	D3D11_VIDEO_PROCESSOR_RATE_CONVERSION_CAPS RateCaps;
1138	hr = pEnum->GetVideoProcessorRateConversionCaps(idxRateCaps, &RateCaps);
1139	if (SUCCEEDED(hr))
1140	{
1141	LogRel(("VMSVGA: RateConversionCaps[%u]:\n"
1142	"VMSVGA: PastFrames %d\n"
1143	"VMSVGA: FutureFrames %d\n"
1144	"VMSVGA: ProcessorCaps %x\n"
1145	"VMSVGA: ITelecineCaps %x\n"
1146	"VMSVGA: CustomRateCount %d\n"
1147	"",
1148	idxRateCaps,
1149	RateCaps.PastFrames,
1150	RateCaps.FutureFrames,
1151	RateCaps.ProcessorCaps,
1152	RateCaps.ITelecineCaps,
1153	RateCaps.CustomRateCount
1154	));
1155
1156	for (unsigned idxCustomRateCap = 0; idxCustomRateCap < RateCaps.CustomRateCount; ++idxCustomRateCap)
1157	{
1158	D3D11_VIDEO_PROCESSOR_CUSTOM_RATE Rate;
1159	hr = pEnum->GetVideoProcessorCustomRate(idxRateCaps, idxCustomRateCap, &Rate);
1160	if (SUCCEEDED(hr))
1161	{
1162	LogRel(("VMSVGA: CustomRate[%u][%u]:\n"
1163	"VMSVGA: CustomRate %d/%d\n"
1164	"VMSVGA: OutputFrames %d\n"
1165	"VMSVGA: InputInterlaced %d\n"
1166	"VMSVGA: InputFramesOrFields %d\n"
1167	"",
1168	idxRateCaps, idxCustomRateCap,
1169	Rate.CustomRate.Numerator,
1170	Rate.CustomRate.Denominator,
1171	Rate.OutputFrames,
1172	Rate.InputInterlaced,
1173	Rate.InputFramesOrFields
1174	));
1175	}
1176	}
1177	}
1178	}
1179	}
1180
1181	D3D_RELEASE(pEnum);
1182	}
1183	}
1184
1185
1186	static int dxDeviceCreate(PVMSVGA3DBACKEND pBackend, DXDEVICE *pDXDevice)
1187	{
1188	int rc = VINF_SUCCESS;
1189
1190	IDXGIAdapter pAdapter = NULL; / Default adapter. */
1191	static D3D_FEATURE_LEVEL const s_aFeatureLevels[] =
1192	{
1193	D3D_FEATURE_LEVEL_11_1,
1194	D3D_FEATURE_LEVEL_11_0
1195	};
1196	UINT Flags = D3D11_CREATE_DEVICE_BGRA_SUPPORT;
1197	#ifdef DEBUG
1198	Flags \|= D3D11_CREATE_DEVICE_DEBUG;
1199	#endif
1200
1201	ID3D11Device *pDevice = 0;
1202	ID3D11DeviceContext *pImmediateContext = 0;
1203	HRESULT hr = pBackend->pfnD3D11CreateDevice(pAdapter,
1204	D3D_DRIVER_TYPE_HARDWARE,
1205	NULL,
1206	Flags,
1207	s_aFeatureLevels,
1208	RT_ELEMENTS(s_aFeatureLevels),
1209	D3D11_SDK_VERSION,
1210	&pDevice,
1211	&pDXDevice->FeatureLevel,
1212	&pImmediateContext);
1213	#ifdef DEBUG
1214	if (FAILED(hr))
1215	{
1216	/* Device creation may fail because _DEBUG flag requires "D3D11 SDK Layers for Windows 10" ("Graphics Tools"):
1217	* Settings/System/Apps/Optional features/Add a feature/Graphics Tools
1218	* Retry without the flag.
1219	*/
1220	Flags &= ~D3D11_CREATE_DEVICE_DEBUG;
1221	hr = pBackend->pfnD3D11CreateDevice(pAdapter,
1222	D3D_DRIVER_TYPE_HARDWARE,
1223	NULL,
1224	Flags,
1225	s_aFeatureLevels,
1226	RT_ELEMENTS(s_aFeatureLevels),
1227	D3D11_SDK_VERSION,
1228	&pDevice,
1229	&pDXDevice->FeatureLevel,
1230	&pImmediateContext);
1231	}
1232	#endif
1233
1234	if (SUCCEEDED(hr))
1235	{
1236	LogRel(("VMSVGA: Feature level %#x\n", pDXDevice->FeatureLevel));
1237
1238	hr = pDevice->QueryInterface(__uuidof(ID3D11Device1), (void**)&pDXDevice->pDevice);
1239	AssertReturnStmt(SUCCEEDED(hr),
1240	D3D_RELEASE(pImmediateContext); D3D_RELEASE(pDevice),
1241	VERR_NOT_SUPPORTED);
1242
1243	hr = pImmediateContext->QueryInterface(__uuidof(ID3D11DeviceContext1), (void**)&pDXDevice->pImmediateContext);
1244	AssertReturnStmt(SUCCEEDED(hr),
1245	D3D_RELEASE(pImmediateContext); D3D_RELEASE(pDXDevice->pDevice); D3D_RELEASE(pDevice),
1246	VERR_NOT_SUPPORTED);
1247
1248	HRESULT hr2;
1249	#ifdef DEBUG
1250	/* Break into debugger when DX runtime detects anything unusual. */
1251	ID3D11Debug *pDebug = 0;
1252	hr2 = pDXDevice->pDevice->QueryInterface(__uuidof(ID3D11Debug), (void**)&pDebug);
1253	if (SUCCEEDED(hr2))
1254	{
1255	ID3D11InfoQueue *pInfoQueue = 0;
1256	hr2 = pDebug->QueryInterface(__uuidof(ID3D11InfoQueue), (void**)&pInfoQueue);
1257	if (SUCCEEDED(hr2))
1258	{
1259	pInfoQueue->SetBreakOnSeverity(D3D11_MESSAGE_SEVERITY_CORRUPTION, true);
1260	// pInfoQueue->SetBreakOnSeverity(D3D11_MESSAGE_SEVERITY_ERROR, true);
1261	// pInfoQueue->SetBreakOnSeverity(D3D11_MESSAGE_SEVERITY_WARNING, true);
1262
1263	/* No breakpoints for the following messages. */
1264	D3D11_MESSAGE_ID saIgnoredMessageIds[] =
1265	{
1266	/* Message ID: Caused by: */
1267	D3D11_MESSAGE_ID_CREATEINPUTLAYOUT_TYPE_MISMATCH, /* Autogenerated input signatures. */
1268	D3D11_MESSAGE_ID_LIVE_DEVICE, /* Live object report. Does not seem to prevent a breakpoint. */
1269	(D3D11_MESSAGE_ID)3146081 /DEVICE_DRAW_RENDERTARGETVIEW_NOT_SET/, /* U. */
1270	D3D11_MESSAGE_ID_DEVICE_DRAW_SAMPLER_NOT_SET, /* U. */
1271	D3D11_MESSAGE_ID_DEVICE_DRAW_SAMPLER_MISMATCH, /* U. */
1272	D3D11_MESSAGE_ID_CREATEINPUTLAYOUT_EMPTY_LAYOUT, /* P. */
1273	D3D11_MESSAGE_ID_DEVICE_SHADER_LINKAGE_REGISTERMASK, /* S. */
1274	};
1275
1276	D3D11_INFO_QUEUE_FILTER filter;
1277	RT_ZERO(filter);
1278	filter.DenyList.NumIDs = RT_ELEMENTS(saIgnoredMessageIds);
1279	filter.DenyList.pIDList = saIgnoredMessageIds;
1280	pInfoQueue->AddStorageFilterEntries(&filter);
1281
1282	D3D_RELEASE(pInfoQueue);
1283	}
1284	D3D_RELEASE(pDebug);
1285	}
1286	#endif
1287
1288	IDXGIDevice *pDxgiDevice = 0;
1289	hr = pDXDevice->pDevice->QueryInterface(__uuidof(IDXGIDevice), (void**)&pDxgiDevice);
1290	if (SUCCEEDED(hr))
1291	{
1292	IDXGIAdapter *pDxgiAdapter = 0;
1293	hr = pDxgiDevice->GetParent(__uuidof(IDXGIAdapter), (void**)&pDxgiAdapter);
1294	if (SUCCEEDED(hr))
1295	{
1296	hr = pDxgiAdapter->GetParent(__uuidof(IDXGIFactory), (void**)&pDXDevice->pDxgiFactory);
1297	D3D_RELEASE(pDxgiAdapter);
1298	}
1299
1300	D3D_RELEASE(pDxgiDevice);
1301	}
1302
1303	/* Failure to query VideoDevice should be ignored. */
1304	hr2 = pDXDevice->pDevice->QueryInterface(__uuidof(ID3D11VideoDevice), (void**)&pDXDevice->pVideoDevice);
1305	Assert(SUCCEEDED(hr2));
1306	if (SUCCEEDED(hr2))
1307	{
1308	hr2 = pDXDevice->pImmediateContext->QueryInterface(__uuidof(ID3D11VideoContext), (void**)&pDXDevice->pVideoContext);
1309	Assert(SUCCEEDED(hr2));
1310	if (SUCCEEDED(hr2))
1311	{
1312	LogRel(("VMSVGA: VideoDevice available\n"));
1313	}
1314	else
1315	{
1316	D3D_RELEASE(pDXDevice->pVideoDevice);
1317	pDXDevice->pVideoContext = NULL;
1318	}
1319	}
1320	else
1321	pDXDevice->pVideoDevice = NULL;
1322	}
1323
1324	if (SUCCEEDED(hr))
1325	BlitInit(&pDXDevice->Blitter, pDXDevice->pDevice, pDXDevice->pImmediateContext);
1326	else
1327	rc = VERR_NOT_SUPPORTED;
1328
1329	if (SUCCEEDED(hr))
1330	{
1331	/* Query multisample support for a common format. */
1332	DXGI_FORMAT const dxgiFormat = DXGI_FORMAT_B8G8R8A8_UNORM;
1333
1334	for (uint32_t i = 2; i <= D3D11_MAX_MULTISAMPLE_SAMPLE_COUNT; i *= 2)
1335	{
1336	UINT NumQualityLevels = 0;
1337	HRESULT hr2 = pDXDevice->pDevice->CheckMultisampleQualityLevels(dxgiFormat, i, &NumQualityLevels);
1338	if (SUCCEEDED(hr2) && NumQualityLevels > 0)
1339	pDXDevice->MultisampleCountMask \|= UINT32_C(1) << (i - 1);
1340	}
1341	}
1342	return rc;
1343	}
1344
1345
1346	static void dxDeviceDestroy(PVMSVGA3DBACKEND pBackend, DXDEVICE *pDevice)
1347	{
1348	RT_NOREF(pBackend);
1349
1350	BlitRelease(&pDevice->Blitter);
1351
1352	#ifdef DX_COMMON_STAGING_BUFFER
1353	D3D_RELEASE(pDevice->pStagingBuffer);
1354	#endif
1355
1356	D3D_RELEASE(pDevice->pVideoDevice);
1357	D3D_RELEASE(pDevice->pVideoContext);
1358
1359	D3D_RELEASE(pDevice->pDxgiFactory);
1360	D3D_RELEASE(pDevice->pImmediateContext);
1361
1362	#ifdef DEBUG
1363	HRESULT hr2;
1364	ID3D11Debug *pDebug = 0;
1365	hr2 = pDevice->pDevice->QueryInterface(__uuidof(ID3D11Debug), (void**)&pDebug);
1366	if (SUCCEEDED(hr2))
1367	{
1368	/// @todo Use this to see whether all resources have been properly released.
1369	//DEBUG_BREAKPOINT_TEST();
1370	//pDebug->ReportLiveDeviceObjects(D3D11_RLDO_DETAIL \| (D3D11_RLDO_FLAGS)0x4 /D3D11_RLDO_IGNORE_INTERNAL/);
1371	D3D_RELEASE(pDebug);
1372	}
1373	#endif
1374
1375	D3D_RELEASE(pDevice->pDevice);
1376	RT_ZERO(*pDevice);
1377	}
1378
1379
1380	static void dxViewAddToList(PVGASTATECC pThisCC, DXVIEW *pDXView)
1381	{
1382	LogFunc(("cid = %u, sid = %u, viewId = %u, type = %u\n",
1383	pDXView->cid, pDXView->sid, pDXView->viewId, pDXView->enmViewType));
1384
1385	Assert(pDXView->u.pView); /* Only already created views should be added. Guard against mis-use by callers. */
1386
1387	PVMSVGA3DSURFACE pSurface;
1388	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pDXView->sid, &pSurface);
1389	AssertRCReturnVoid(rc);
1390
1391	RTListAppend(&pSurface->pBackendSurface->listView, &pDXView->nodeSurfaceView);
1392	}
1393
1394
1395	static void dxViewRemoveFromList(DXVIEW *pDXView)
1396	{
1397	LogFunc(("cid = %u, sid = %u, viewId = %u, type = %u\n",
1398	pDXView->cid, pDXView->sid, pDXView->viewId, pDXView->enmViewType));
1399	/* pView can be NULL, if COT entry is already empty. */
1400	if (pDXView->u.pView)
1401	{
1402	Assert(pDXView->nodeSurfaceView.pNext && pDXView->nodeSurfaceView.pPrev);
1403	RTListNodeRemove(&pDXView->nodeSurfaceView);
1404	}
1405	}
1406
1407
1408	static int dxViewDestroy(DXVIEW *pDXView)
1409	{
1410	LogFunc(("cid = %u, sid = %u, viewId = %u, type = %u\n",
1411	pDXView->cid, pDXView->sid, pDXView->viewId, pDXView->enmViewType));
1412	if (pDXView->u.pView)
1413	{
1414	D3D_RELEASE(pDXView->u.pView);
1415	RTListNodeRemove(&pDXView->nodeSurfaceView);
1416	RT_ZERO(*pDXView);
1417	}
1418
1419	return VINF_SUCCESS;
1420	}
1421
1422
1423	static int dxViewInit(DXVIEW pDXView, PVMSVGA3DSURFACE pSurface, VMSVGA3DDXCONTEXT pDXContext, uint32_t viewId, VMSVGA3DBACKVIEWTYPE enmViewType, ID3D11View *pView)
1424	{
1425	pDXView->cid = pDXContext->cid;
1426	pDXView->sid = pSurface->id;
1427	pDXView->viewId = viewId;
1428	pDXView->enmViewType = enmViewType;
1429	pDXView->u.pView = pView;
1430	RTListAppend(&pSurface->pBackendSurface->listView, &pDXView->nodeSurfaceView);
1431
1432	LogFunc(("cid = %u, sid = %u, viewId = %u, type = %u\n",
1433	pDXView->cid, pDXView->sid, pDXView->viewId, pDXView->enmViewType));
1434
1435	DXVIEW pIter, pNext;
1436	RTListForEachSafe(&pSurface->pBackendSurface->listView, pIter, pNext, DXVIEW, nodeSurfaceView)
1437	{
1438	AssertPtr(pNext);
1439	LogFunc(("pIter=%p, pNext=%p\n", pIter, pNext));
1440	}
1441
1442	return VINF_SUCCESS;
1443	}
1444
1445
1446	static DXDEVICE *dxDeviceGet(PVMSVGA3DSTATE p3dState)
1447	{
1448	DXDEVICE *pDXDevice = &p3dState->pBackend->dxDevice;
1449	#ifdef DEBUG
1450	HRESULT hr = pDXDevice->pDevice->GetDeviceRemovedReason();
1451	Assert(SUCCEEDED(hr));
1452	#endif
1453	return pDXDevice;
1454	}
1455
1456
1457	static int dxDeviceFlush(DXDEVICE *pDevice)
1458	{
1459	/** @todo Should the flush follow the query submission? */
1460	pDevice->pImmediateContext->Flush();
1461
1462	ID3D11Query *pQuery = 0;
1463	D3D11_QUERY_DESC qd;
1464	RT_ZERO(qd);
1465	qd.Query = D3D11_QUERY_EVENT;
1466
1467	HRESULT hr = pDevice->pDevice->CreateQuery(&qd, &pQuery);
1468	Assert(hr == S_OK); RT_NOREF(hr);
1469	pDevice->pImmediateContext->End(pQuery);
1470
1471	BOOL queryData;
1472	while (pDevice->pImmediateContext->GetData(pQuery, &queryData, sizeof(queryData), 0) != S_OK)
1473	RTThreadYield();
1474
1475	D3D_RELEASE(pQuery);
1476
1477	return VINF_SUCCESS;
1478	}
1479
1480
1481	static ID3D11Resource *dxResource(PVMSVGA3DSURFACE pSurface)
1482	{
1483	VMSVGA3DBACKENDSURFACE *pBackendSurface = pSurface->pBackendSurface;
1484	if (!pBackendSurface)
1485	AssertFailedReturn(NULL);
1486	return pBackendSurface->u.pResource;
1487	}
1488
1489	// Not used
1490	#if 0
1491	static uint32_t dxGetRenderTargetViewSid(PVMSVGA3DDXCONTEXT pDXContext, uint32_t renderTargetViewId)
1492	{
1493	ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, SVGA_ID_INVALID);
1494
1495	SVGACOTableDXRTViewEntry const *pRTViewEntry = &pDXContext->cot.paRTView[renderTargetViewId];
1496	return pRTViewEntry->sid;
1497	}
1498	#endif
1499
1500	static int dxDefineStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dStreamOutputId soid, SVGACOTableDXStreamOutputEntry const pEntry, DXSHADER pDXShader)
1501	{
1502	PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1503	DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[soid];
1504
1505	/* Make D3D11_SO_DECLARATION_ENTRY array from SVGA3dStreamOutputDeclarationEntry. */
1506	SVGA3dStreamOutputDeclarationEntry const *paDecls;
1507	PVMSVGAMOB pMob = NULL;
1508	if (pEntry->usesMob)
1509	{
1510	pMob = vmsvgaR3MobGet(pSvgaR3State, pEntry->mobid);
1511	ASSERT_GUEST_RETURN(pMob, VERR_INVALID_PARAMETER);
1512
1513	/* Create a memory pointer for the MOB, which is accessible by host. */
1514	int rc = vmsvgaR3MobBackingStoreCreate(pSvgaR3State, pMob, vmsvgaR3MobSize(pMob));
1515	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
1516
1517	/* Get pointer to the shader bytecode. This will also verify the offset. */
1518	paDecls = (SVGA3dStreamOutputDeclarationEntry const *)vmsvgaR3MobBackingStorePtr(pMob, pEntry->offsetInBytes);
1519	AssertReturnStmt(paDecls, vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob), VERR_INTERNAL_ERROR);
1520	}
1521	else
1522	paDecls = &pEntry->decl[0];
1523
1524	pDXStreamOutput->cDeclarationEntry = pEntry->numOutputStreamEntries;
1525	for (uint32_t i = 0; i < pDXStreamOutput->cDeclarationEntry; ++i)
1526	{
1527	D3D11_SO_DECLARATION_ENTRY *pDst = &pDXStreamOutput->aDeclarationEntry[i];
1528	SVGA3dStreamOutputDeclarationEntry const *pSrc = &paDecls[i];
1529
1530	uint32_t const registerMask = pSrc->registerMask & 0xF;
1531	unsigned const iFirstBit = ASMBitFirstSetU32(registerMask);
1532	unsigned const iLastBit = ASMBitLastSetU32(registerMask);
1533
1534	pDst->Stream = pSrc->stream;
1535	pDst->SemanticName = NULL; /* Semantic name and index will be taken from the shader output declaration. */
1536	pDst->SemanticIndex = 0;
1537	pDst->StartComponent = iFirstBit > 0 ? iFirstBit - 1 : 0;
1538	pDst->ComponentCount = iFirstBit > 0 ? iLastBit - (iFirstBit - 1) : 0;
1539	pDst->OutputSlot = pSrc->outputSlot;
1540	}
1541
1542	uint32_t MaxSemanticIndex = 0;
1543	for (uint32_t i = 0; i < pDXStreamOutput->cDeclarationEntry; ++i)
1544	{
1545	D3D11_SO_DECLARATION_ENTRY *pDeclarationEntry = &pDXStreamOutput->aDeclarationEntry[i];
1546	SVGA3dStreamOutputDeclarationEntry const *decl = &paDecls[i];
1547
1548	/* Find the corresponding register and mask in the GS shader output. */
1549	int idxFound = -1;
1550	for (uint32_t iOutputEntry = 0; iOutputEntry < pDXShader->shaderInfo.cOutputSignature; ++iOutputEntry)
1551	{
1552	SVGA3dDXSignatureEntry const *pOutputEntry = &pDXShader->shaderInfo.aOutputSignature[iOutputEntry];
1553	if ( pOutputEntry->registerIndex == decl->registerIndex
1554	&& (decl->registerMask & ~pOutputEntry->mask) == 0) /* SO decl mask is a subset of shader output mask. */
1555	{
1556	idxFound = iOutputEntry;
1557	break;
1558	}
1559	}
1560
1561	if (idxFound >= 0)
1562	{
1563	DXShaderAttributeSemantic const *pOutputSemantic = &pDXShader->shaderInfo.aOutputSemantic[idxFound];
1564	pDeclarationEntry->SemanticName = pOutputSemantic->pcszSemanticName;
1565	pDeclarationEntry->SemanticIndex = pOutputSemantic->SemanticIndex;
1566	MaxSemanticIndex = RT_MAX(MaxSemanticIndex, pOutputSemantic->SemanticIndex);
1567	}
1568	else
1569	AssertFailed();
1570	}
1571
1572	/* A geometry shader may return components of the same register as different attributes:
1573	*
1574	* Output signature
1575	* Name Index Mask Register
1576	* ATTRIB 2 xy 2
1577	* ATTRIB 3 z 2
1578	*
1579	* For ATTRIB 3 the stream output declaration expects StartComponent = 0 and ComponentCount = 1
1580	* (not StartComponent = 2 and ComponentCount = 1):
1581	*
1582	* Stream output declaration
1583	* SemanticName SemanticIndex StartComponent ComponentCount
1584	* ATTRIB 2 0 2
1585	* ATTRIB 3 0 1
1586	*
1587	* Stream output declaration can have multiple entries for the same attribute.
1588	* In this case StartComponent is the offset within the attribute.
1589	*
1590	* Output signature
1591	* Name Index Mask Register
1592	* ATTRIB 0 xyzw 0
1593	*
1594	* Stream output declaration
1595	* SemanticName SemanticIndex StartComponent ComponentCount
1596	* ATTRIB 0 0 1
1597	* ATTRIB 0 1 1
1598	*
1599	* StartComponent has been computed as the component offset in a register:
1600	* 'StartComponent = iFirstBit > 0 ? iFirstBit - 1 : 0;'.
1601	*
1602	* StartComponent must be the offset in an attribute.
1603	*/
1604	for (uint32_t SemanticIndex = 0; SemanticIndex <= MaxSemanticIndex; ++SemanticIndex)
1605	{
1606	/* Find minimum StartComponent value for this attribute. */
1607	uint32_t MinStartComponent = UINT32_MAX;
1608	for (uint32_t i = 0; i < pDXStreamOutput->cDeclarationEntry; ++i)
1609	{
1610	D3D11_SO_DECLARATION_ENTRY *pDeclarationEntry = &pDXStreamOutput->aDeclarationEntry[i];
1611	if (pDeclarationEntry->SemanticIndex == SemanticIndex)
1612	MinStartComponent = RT_MIN(MinStartComponent, pDeclarationEntry->StartComponent);
1613	}
1614
1615	AssertContinue(MinStartComponent != UINT32_MAX);
1616
1617	/* Adjust the StartComponent to start from 0 for this attribute. */
1618	for (uint32_t i = 0; i < pDXStreamOutput->cDeclarationEntry; ++i)
1619	{
1620	D3D11_SO_DECLARATION_ENTRY *pDeclarationEntry = &pDXStreamOutput->aDeclarationEntry[i];
1621	if (pDeclarationEntry->SemanticIndex == SemanticIndex)
1622	pDeclarationEntry->StartComponent -= MinStartComponent;
1623	}
1624	}
1625
1626	if (pMob)
1627	vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
1628
1629	return VINF_SUCCESS;
1630	}
1631
1632	static void dxDestroyStreamOutput(DXSTREAMOUTPUT *pDXStreamOutput)
1633	{
1634	RT_ZERO(*pDXStreamOutput);
1635	}
1636
1637	static D3D11_BLEND dxBlendFactorAlpha(uint8_t svgaBlend)
1638	{
1639	/* "Blend options that end in _COLOR are not allowed." but the guest sometimes sends them. */
1640	switch (svgaBlend)
1641	{
1642	case SVGA3D_BLENDOP_ZERO: return D3D11_BLEND_ZERO;
1643	case SVGA3D_BLENDOP_ONE: return D3D11_BLEND_ONE;
1644	case SVGA3D_BLENDOP_SRCCOLOR: return D3D11_BLEND_SRC_ALPHA;
1645	case SVGA3D_BLENDOP_INVSRCCOLOR: return D3D11_BLEND_INV_SRC_ALPHA;
1646	case SVGA3D_BLENDOP_SRCALPHA: return D3D11_BLEND_SRC_ALPHA;
1647	case SVGA3D_BLENDOP_INVSRCALPHA: return D3D11_BLEND_INV_SRC_ALPHA;
1648	case SVGA3D_BLENDOP_DESTALPHA: return D3D11_BLEND_DEST_ALPHA;
1649	case SVGA3D_BLENDOP_INVDESTALPHA: return D3D11_BLEND_INV_DEST_ALPHA;
1650	case SVGA3D_BLENDOP_DESTCOLOR: return D3D11_BLEND_DEST_ALPHA;
1651	case SVGA3D_BLENDOP_INVDESTCOLOR: return D3D11_BLEND_INV_DEST_ALPHA;
1652	case SVGA3D_BLENDOP_SRCALPHASAT: return D3D11_BLEND_SRC_ALPHA_SAT;
1653	case SVGA3D_BLENDOP_BLENDFACTOR: return D3D11_BLEND_BLEND_FACTOR;
1654	case SVGA3D_BLENDOP_INVBLENDFACTOR: return D3D11_BLEND_INV_BLEND_FACTOR;
1655	case SVGA3D_BLENDOP_SRC1COLOR: return D3D11_BLEND_SRC1_ALPHA;
1656	case SVGA3D_BLENDOP_INVSRC1COLOR: return D3D11_BLEND_INV_SRC1_ALPHA;
1657	case SVGA3D_BLENDOP_SRC1ALPHA: return D3D11_BLEND_SRC1_ALPHA;
1658	case SVGA3D_BLENDOP_INVSRC1ALPHA: return D3D11_BLEND_INV_SRC1_ALPHA;
1659	case SVGA3D_BLENDOP_BLENDFACTORALPHA: return D3D11_BLEND_BLEND_FACTOR;
1660	case SVGA3D_BLENDOP_INVBLENDFACTORALPHA: return D3D11_BLEND_INV_BLEND_FACTOR;
1661	default:
1662	break;
1663	}
1664	return D3D11_BLEND_ZERO;
1665	}
1666
1667
1668	static D3D11_BLEND dxBlendFactorColor(uint8_t svgaBlend)
1669	{
1670	switch (svgaBlend)
1671	{
1672	case SVGA3D_BLENDOP_ZERO: return D3D11_BLEND_ZERO;
1673	case SVGA3D_BLENDOP_ONE: return D3D11_BLEND_ONE;
1674	case SVGA3D_BLENDOP_SRCCOLOR: return D3D11_BLEND_SRC_COLOR;
1675	case SVGA3D_BLENDOP_INVSRCCOLOR: return D3D11_BLEND_INV_SRC_COLOR;
1676	case SVGA3D_BLENDOP_SRCALPHA: return D3D11_BLEND_SRC_ALPHA;
1677	case SVGA3D_BLENDOP_INVSRCALPHA: return D3D11_BLEND_INV_SRC_ALPHA;
1678	case SVGA3D_BLENDOP_DESTALPHA: return D3D11_BLEND_DEST_ALPHA;
1679	case SVGA3D_BLENDOP_INVDESTALPHA: return D3D11_BLEND_INV_DEST_ALPHA;
1680	case SVGA3D_BLENDOP_DESTCOLOR: return D3D11_BLEND_DEST_COLOR;
1681	case SVGA3D_BLENDOP_INVDESTCOLOR: return D3D11_BLEND_INV_DEST_COLOR;
1682	case SVGA3D_BLENDOP_SRCALPHASAT: return D3D11_BLEND_SRC_ALPHA_SAT;
1683	case SVGA3D_BLENDOP_BLENDFACTOR: return D3D11_BLEND_BLEND_FACTOR;
1684	case SVGA3D_BLENDOP_INVBLENDFACTOR: return D3D11_BLEND_INV_BLEND_FACTOR;
1685	case SVGA3D_BLENDOP_SRC1COLOR: return D3D11_BLEND_SRC1_COLOR;
1686	case SVGA3D_BLENDOP_INVSRC1COLOR: return D3D11_BLEND_INV_SRC1_COLOR;
1687	case SVGA3D_BLENDOP_SRC1ALPHA: return D3D11_BLEND_SRC1_ALPHA;
1688	case SVGA3D_BLENDOP_INVSRC1ALPHA: return D3D11_BLEND_INV_SRC1_ALPHA;
1689	case SVGA3D_BLENDOP_BLENDFACTORALPHA: return D3D11_BLEND_BLEND_FACTOR;
1690	case SVGA3D_BLENDOP_INVBLENDFACTORALPHA: return D3D11_BLEND_INV_BLEND_FACTOR;
1691	default:
1692	break;
1693	}
1694	return D3D11_BLEND_ZERO;
1695	}
1696
1697
1698	static D3D11_BLEND_OP dxBlendOp(uint8_t svgaBlendEq)
1699	{
1700	return (D3D11_BLEND_OP)svgaBlendEq;
1701	}
1702
1703
1704	static D3D11_LOGIC_OP dxLogicOp(uint8_t svgaLogicEq)
1705	{
1706	return (D3D11_LOGIC_OP)svgaLogicEq;
1707	}
1708
1709
1710	/** @todo AssertCompile for types like D3D11_COMPARISON_FUNC and SVGA3dComparisonFunc */
1711	static HRESULT dxBlendStateCreate(DXDEVICE pDevice, SVGACOTableDXBlendStateEntry const pEntry, ID3D11BlendState1 **pp)
1712	{
1713	D3D11_BLEND_DESC1 BlendDesc;
1714	BlendDesc.AlphaToCoverageEnable = RT_BOOL(pEntry->alphaToCoverageEnable);
1715	BlendDesc.IndependentBlendEnable = RT_BOOL(pEntry->independentBlendEnable);
1716	for (int i = 0; i < SVGA3D_MAX_RENDER_TARGETS; ++i)
1717	{
1718	BlendDesc.RenderTarget[i].BlendEnable = RT_BOOL(pEntry->perRT[i].blendEnable);
1719	BlendDesc.RenderTarget[i].LogicOpEnable = RT_BOOL(pEntry->perRT[i].logicOpEnable);
1720	BlendDesc.RenderTarget[i].SrcBlend = dxBlendFactorColor(pEntry->perRT[i].srcBlend);
1721	BlendDesc.RenderTarget[i].DestBlend = dxBlendFactorColor(pEntry->perRT[i].destBlend);
1722	BlendDesc.RenderTarget[i].BlendOp = dxBlendOp (pEntry->perRT[i].blendOp);
1723	BlendDesc.RenderTarget[i].SrcBlendAlpha = dxBlendFactorAlpha(pEntry->perRT[i].srcBlendAlpha);
1724	BlendDesc.RenderTarget[i].DestBlendAlpha = dxBlendFactorAlpha(pEntry->perRT[i].destBlendAlpha);
1725	BlendDesc.RenderTarget[i].BlendOpAlpha = dxBlendOp (pEntry->perRT[i].blendOpAlpha);
1726	BlendDesc.RenderTarget[i].LogicOp = dxLogicOp (pEntry->perRT[i].logicOp);
1727	BlendDesc.RenderTarget[i].RenderTargetWriteMask = pEntry->perRT[i].renderTargetWriteMask;
1728	}
1729
1730	HRESULT hr = pDevice->pDevice->CreateBlendState1(&BlendDesc, pp);
1731	Assert(SUCCEEDED(hr));
1732	return hr;
1733	}
1734
1735
1736	static HRESULT dxDepthStencilStateCreate(DXDEVICE pDevice, SVGACOTableDXDepthStencilEntry const pEntry, ID3D11DepthStencilState **pp)
1737	{
1738	D3D11_DEPTH_STENCIL_DESC desc;
1739	desc.DepthEnable = pEntry->depthEnable;
1740	desc.DepthWriteMask = (D3D11_DEPTH_WRITE_MASK)pEntry->depthWriteMask;
1741	desc.DepthFunc = (D3D11_COMPARISON_FUNC)pEntry->depthFunc;
1742	desc.StencilEnable = pEntry->stencilEnable;
1743	desc.StencilReadMask = pEntry->stencilReadMask;
1744	desc.StencilWriteMask = pEntry->stencilWriteMask;
1745	desc.FrontFace.StencilFailOp = (D3D11_STENCIL_OP)pEntry->frontStencilFailOp;
1746	desc.FrontFace.StencilDepthFailOp = (D3D11_STENCIL_OP)pEntry->frontStencilDepthFailOp;
1747	desc.FrontFace.StencilPassOp = (D3D11_STENCIL_OP)pEntry->frontStencilPassOp;
1748	desc.FrontFace.StencilFunc = (D3D11_COMPARISON_FUNC)pEntry->frontStencilFunc;
1749	desc.BackFace.StencilFailOp = (D3D11_STENCIL_OP)pEntry->backStencilFailOp;
1750	desc.BackFace.StencilDepthFailOp = (D3D11_STENCIL_OP)pEntry->backStencilDepthFailOp;
1751	desc.BackFace.StencilPassOp = (D3D11_STENCIL_OP)pEntry->backStencilPassOp;
1752	desc.BackFace.StencilFunc = (D3D11_COMPARISON_FUNC)pEntry->backStencilFunc;
1753	/** @todo frontEnable, backEnable */
1754
1755	HRESULT hr = pDevice->pDevice->CreateDepthStencilState(&desc, pp);
1756	Assert(SUCCEEDED(hr));
1757	return hr;
1758	}
1759
1760
1761	static HRESULT dxSamplerStateCreate(DXDEVICE pDevice, SVGACOTableDXSamplerEntry const pEntry, ID3D11SamplerState **pp)
1762	{
1763	D3D11_SAMPLER_DESC desc;
1764	/* Guest sometimes sends inconsistent (from D3D11 point of view) set of filter flags. */
1765	if (pEntry->filter & SVGA3D_FILTER_ANISOTROPIC)
1766	desc.Filter = (pEntry->filter & SVGA3D_FILTER_COMPARE)
1767	? D3D11_FILTER_COMPARISON_ANISOTROPIC
1768	: D3D11_FILTER_ANISOTROPIC;
1769	else
1770	desc.Filter = (D3D11_FILTER)pEntry->filter;
1771	desc.AddressU = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressU;
1772	desc.AddressV = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressV;
1773	desc.AddressW = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressW;
1774	desc.MipLODBias = pEntry->mipLODBias;
1775	desc.MaxAnisotropy = RT_CLAMP(pEntry->maxAnisotropy, 1, 16); /* "Valid values are between 1 and 16" */
1776	desc.ComparisonFunc = (D3D11_COMPARISON_FUNC)pEntry->comparisonFunc;
1777	desc.BorderColor[0] = pEntry->borderColor.value[0];
1778	desc.BorderColor[1] = pEntry->borderColor.value[1];
1779	desc.BorderColor[2] = pEntry->borderColor.value[2];
1780	desc.BorderColor[3] = pEntry->borderColor.value[3];
1781	desc.MinLOD = pEntry->minLOD;
1782	desc.MaxLOD = pEntry->maxLOD;
1783
1784	HRESULT hr = pDevice->pDevice->CreateSamplerState(&desc, pp);
1785	Assert(SUCCEEDED(hr));
1786	return hr;
1787	}
1788
1789
1790	static D3D11_FILL_MODE dxFillMode(uint8_t svgaFillMode)
1791	{
1792	if (svgaFillMode == SVGA3D_FILLMODE_POINT)
1793	return D3D11_FILL_WIREFRAME;
1794	return (D3D11_FILL_MODE)svgaFillMode;
1795	}
1796
1797
1798	static D3D11_CULL_MODE dxCullMode(uint8_t svgaCullMode)
1799	{
1800	return (D3D11_CULL_MODE)svgaCullMode;
1801	}
1802
1803
1804	static HRESULT dxRasterizerStateCreate(DXDEVICE pDevice, SVGACOTableDXRasterizerStateEntry const pEntry, ID3D11RasterizerState1 **pp)
1805	{
1806	D3D11_RASTERIZER_DESC1 desc;
1807	desc.FillMode = dxFillMode(pEntry->fillMode);
1808	desc.CullMode = dxCullMode(pEntry->cullMode);
1809	desc.FrontCounterClockwise = pEntry->frontCounterClockwise;
1810	/** @todo provokingVertexLast */
1811	desc.DepthBias = pEntry->depthBias;
1812	desc.DepthBiasClamp = pEntry->depthBiasClamp;
1813	desc.SlopeScaledDepthBias = pEntry->slopeScaledDepthBias;
1814	desc.DepthClipEnable = pEntry->depthClipEnable;
1815	desc.ScissorEnable = pEntry->scissorEnable;
1816	desc.MultisampleEnable = pEntry->multisampleEnable;
1817	desc.AntialiasedLineEnable = pEntry->antialiasedLineEnable;
1818	desc.ForcedSampleCount = pEntry->forcedSampleCount;
1819	/** @todo lineWidth lineStippleEnable lineStippleFactor lineStipplePattern */
1820
1821	HRESULT hr = pDevice->pDevice->CreateRasterizerState1(&desc, pp);
1822	Assert(SUCCEEDED(hr));
1823	return hr;
1824	}
1825
1826
1827	static HRESULT dxRenderTargetViewCreate(PVGASTATECC pThisCC, SVGACOTableDXRTViewEntry const pEntry, VMSVGA3DSURFACE pSurface, ID3D11RenderTargetView **pp)
1828	{
1829	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
1830
1831	ID3D11Resource *pResource = dxResource(pSurface);
1832
1833	D3D11_RENDER_TARGET_VIEW_DESC desc;
1834	RT_ZERO(desc);
1835	desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
1836	AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN \|\| pEntry->format == SVGA3D_BUFFER, E_FAIL);
1837	switch (pEntry->resourceDimension)
1838	{
1839	case SVGA3D_RESOURCE_BUFFER:
1840	desc.ViewDimension = D3D11_RTV_DIMENSION_BUFFER;
1841	desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
1842	desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
1843	break;
1844	case SVGA3D_RESOURCE_TEXTURE1D:
1845	if (pSurface->surfaceDesc.numArrayElements <= 1)
1846	{
1847	desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE1D;
1848	desc.Texture1D.MipSlice = pEntry->desc.tex.mipSlice;
1849	}
1850	else
1851	{
1852	desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE1DARRAY;
1853	desc.Texture1DArray.MipSlice = pEntry->desc.tex.mipSlice;
1854	desc.Texture1DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1855	desc.Texture1DArray.ArraySize = pEntry->desc.tex.arraySize;
1856	}
1857	break;
1858	case SVGA3D_RESOURCE_TEXTURE2D:
1859	if (pSurface->surfaceDesc.numArrayElements <= 1)
1860	{
1861	desc.ViewDimension = pSurface->surfaceDesc.multisampleCount > 1
1862	? D3D11_RTV_DIMENSION_TEXTURE2DMS
1863	: D3D11_RTV_DIMENSION_TEXTURE2D;
1864	desc.Texture2D.MipSlice = pEntry->desc.tex.mipSlice;
1865	}
1866	else
1867	{
1868	desc.ViewDimension = pSurface->surfaceDesc.multisampleCount > 1
1869	? D3D11_RTV_DIMENSION_TEXTURE2DMSARRAY
1870	: D3D11_RTV_DIMENSION_TEXTURE2DARRAY;
1871	desc.Texture2DArray.MipSlice = pEntry->desc.tex.mipSlice;
1872	desc.Texture2DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1873	desc.Texture2DArray.ArraySize = pEntry->desc.tex.arraySize;
1874	}
1875	break;
1876	case SVGA3D_RESOURCE_TEXTURE3D:
1877	desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE3D;
1878	desc.Texture3D.MipSlice = pEntry->desc.tex3D.mipSlice;
1879	desc.Texture3D.FirstWSlice = pEntry->desc.tex3D.firstW;
1880	desc.Texture3D.WSize = pEntry->desc.tex3D.wSize;
1881	break;
1882	case SVGA3D_RESOURCE_TEXTURECUBE:
1883	desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2DARRAY;
1884	desc.Texture2DArray.MipSlice = pEntry->desc.tex.mipSlice;
1885	desc.Texture2DArray.FirstArraySlice = 0;
1886	desc.Texture2DArray.ArraySize = 6;
1887	break;
1888	case SVGA3D_RESOURCE_BUFFEREX:
1889	AssertFailed(); /** @todo test. Probably not applicable to a render target view. */
1890	desc.ViewDimension = D3D11_RTV_DIMENSION_BUFFER;
1891	desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
1892	desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
1893	break;
1894	default:
1895	ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
1896	}
1897
1898	HRESULT hr = pDevice->pDevice->CreateRenderTargetView(pResource, &desc, pp);
1899	Assert(SUCCEEDED(hr));
1900	return hr;
1901	}
1902
1903
1904	static HRESULT dxShaderResourceViewCreate(PVGASTATECC pThisCC, SVGACOTableDXSRViewEntry const pEntry, VMSVGA3DSURFACE pSurface, ID3D11ShaderResourceView **pp)
1905	{
1906	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
1907
1908	ID3D11Resource *pResource = dxResource(pSurface);
1909
1910	D3D11_SHADER_RESOURCE_VIEW_DESC desc;
1911	RT_ZERO(desc);
1912	desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
1913	AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN \|\| pEntry->format == SVGA3D_BUFFER, E_FAIL);
1914
1915	switch (pEntry->resourceDimension)
1916	{
1917	case SVGA3D_RESOURCE_BUFFER:
1918	desc.ViewDimension = D3D11_SRV_DIMENSION_BUFFER;
1919	desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
1920	desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
1921	break;
1922	case SVGA3D_RESOURCE_TEXTURE1D:
1923	if (pSurface->surfaceDesc.numArrayElements <= 1)
1924	{
1925	desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE1D;
1926	desc.Texture1D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1927	desc.Texture1D.MipLevels = pEntry->desc.tex.mipLevels;
1928	}
1929	else
1930	{
1931	desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE1DARRAY;
1932	desc.Texture1DArray.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1933	desc.Texture1DArray.MipLevels = pEntry->desc.tex.mipLevels;
1934	desc.Texture1DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1935	desc.Texture1DArray.ArraySize = pEntry->desc.tex.arraySize;
1936	}
1937	break;
1938	case SVGA3D_RESOURCE_TEXTURE2D:
1939	if (pSurface->surfaceDesc.numArrayElements <= 1)
1940	{
1941	desc.ViewDimension = pSurface->surfaceDesc.multisampleCount > 1
1942	? D3D11_SRV_DIMENSION_TEXTURE2DMS
1943	: D3D11_SRV_DIMENSION_TEXTURE2D;
1944	desc.Texture2D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1945	desc.Texture2D.MipLevels = pEntry->desc.tex.mipLevels;
1946	}
1947	else
1948	{
1949	desc.ViewDimension = pSurface->surfaceDesc.multisampleCount > 1
1950	? D3D11_SRV_DIMENSION_TEXTURE2DMSARRAY
1951	: D3D11_SRV_DIMENSION_TEXTURE2DARRAY;
1952	desc.Texture2DArray.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1953	desc.Texture2DArray.MipLevels = pEntry->desc.tex.mipLevels;
1954	desc.Texture2DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1955	desc.Texture2DArray.ArraySize = pEntry->desc.tex.arraySize;
1956	}
1957	break;
1958	case SVGA3D_RESOURCE_TEXTURE3D:
1959	desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE3D;
1960	desc.Texture3D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1961	desc.Texture3D.MipLevels = pEntry->desc.tex.mipLevels;
1962	break;
1963	case SVGA3D_RESOURCE_TEXTURECUBE:
1964	if (pSurface->surfaceDesc.numArrayElements <= 6)
1965	{
1966	desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURECUBE;
1967	desc.TextureCube.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1968	desc.TextureCube.MipLevels = pEntry->desc.tex.mipLevels;
1969	}
1970	else
1971	{
1972	desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURECUBEARRAY;
1973	desc.TextureCubeArray.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1974	desc.TextureCubeArray.MipLevels = pEntry->desc.tex.mipLevels;
1975	desc.TextureCubeArray.First2DArrayFace = pEntry->desc.tex.firstArraySlice;
1976	desc.TextureCubeArray.NumCubes = pEntry->desc.tex.arraySize / 6;
1977	}
1978	break;
1979	case SVGA3D_RESOURCE_BUFFEREX:
1980	AssertFailed(); /** @todo test. */
1981	desc.ViewDimension = D3D11_SRV_DIMENSION_BUFFEREX;
1982	desc.BufferEx.FirstElement = pEntry->desc.bufferex.firstElement;
1983	desc.BufferEx.NumElements = pEntry->desc.bufferex.numElements;
1984	desc.BufferEx.Flags = pEntry->desc.bufferex.flags;
1985	break;
1986	default:
1987	ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
1988	}
1989
1990	HRESULT hr = pDevice->pDevice->CreateShaderResourceView(pResource, &desc, pp);
1991	Assert(SUCCEEDED(hr));
1992	return hr;
1993	}
1994
1995
1996	static HRESULT dxUnorderedAccessViewCreate(PVGASTATECC pThisCC, SVGACOTableDXUAViewEntry const pEntry, VMSVGA3DSURFACE pSurface, ID3D11UnorderedAccessView **pp)
1997	{
1998	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
1999
2000	ID3D11Resource *pResource = dxResource(pSurface);
2001
2002	D3D11_UNORDERED_ACCESS_VIEW_DESC desc;
2003	RT_ZERO(desc);
2004	desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
2005	AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN \|\| pEntry->format == SVGA3D_BUFFER, E_FAIL);
2006
2007	switch (pEntry->resourceDimension)
2008	{
2009	case SVGA3D_RESOURCE_BUFFER:
2010	desc.ViewDimension = D3D11_UAV_DIMENSION_BUFFER;
2011	desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
2012	desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
2013	desc.Buffer.Flags = pEntry->desc.buffer.flags;
2014	break;
2015	case SVGA3D_RESOURCE_TEXTURE1D:
2016	if (pSurface->surfaceDesc.numArrayElements <= 1)
2017	{
2018	desc.ViewDimension = D3D11_UAV_DIMENSION_TEXTURE1D;
2019	desc.Texture1D.MipSlice = pEntry->desc.tex.mipSlice;
2020	}
2021	else
2022	{
2023	desc.ViewDimension = D3D11_UAV_DIMENSION_TEXTURE1DARRAY;
2024	desc.Texture1DArray.MipSlice = pEntry->desc.tex.mipSlice;
2025	desc.Texture1DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
2026	desc.Texture1DArray.ArraySize = pEntry->desc.tex.arraySize;
2027	}
2028	break;
2029	case SVGA3D_RESOURCE_TEXTURE2D:
2030	if (pSurface->surfaceDesc.numArrayElements <= 1)
2031	{
2032	desc.ViewDimension = D3D11_UAV_DIMENSION_TEXTURE2D;
2033	desc.Texture2D.MipSlice = pEntry->desc.tex.mipSlice;
2034	}
2035	else
2036	{
2037	desc.ViewDimension = D3D11_UAV_DIMENSION_TEXTURE2DARRAY;
2038	desc.Texture2DArray.MipSlice = pEntry->desc.tex.mipSlice;
2039	desc.Texture2DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
2040	desc.Texture2DArray.ArraySize = pEntry->desc.tex.arraySize;
2041	}
2042	break;
2043	case SVGA3D_RESOURCE_TEXTURE3D:
2044	desc.Texture3D.MipSlice = pEntry->desc.tex3D.mipSlice;
2045	desc.Texture3D.FirstWSlice = pEntry->desc.tex3D.firstW;
2046	desc.Texture3D.WSize = pEntry->desc.tex3D.wSize;
2047	break;
2048	default:
2049	ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
2050	}
2051
2052	HRESULT hr = pDevice->pDevice->CreateUnorderedAccessView(pResource, &desc, pp);
2053	Assert(SUCCEEDED(hr));
2054	return hr;
2055	}
2056
2057
2058	static HRESULT dxDepthStencilViewCreate(PVGASTATECC pThisCC, SVGACOTableDXDSViewEntry const pEntry, VMSVGA3DSURFACE pSurface, ID3D11DepthStencilView **pp)
2059	{
2060	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
2061
2062	ID3D11Resource *pResource = dxResource(pSurface);
2063
2064	D3D11_DEPTH_STENCIL_VIEW_DESC desc;
2065	RT_ZERO(desc);
2066	desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
2067	AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN \|\| pEntry->format == SVGA3D_BUFFER, E_FAIL);
2068	desc.Flags = pEntry->flags;
2069	switch (pEntry->resourceDimension)
2070	{
2071	case SVGA3D_RESOURCE_TEXTURE1D:
2072	if (pSurface->surfaceDesc.numArrayElements <= 1)
2073	{
2074	desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE1D;
2075	desc.Texture1D.MipSlice = pEntry->mipSlice;
2076	}
2077	else
2078	{
2079	desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE1DARRAY;
2080	desc.Texture1DArray.MipSlice = pEntry->mipSlice;
2081	desc.Texture1DArray.FirstArraySlice = pEntry->firstArraySlice;
2082	desc.Texture1DArray.ArraySize = pEntry->arraySize;
2083	}
2084	break;
2085	case SVGA3D_RESOURCE_TEXTURE2D:
2086	if (pSurface->surfaceDesc.numArrayElements <= 1)
2087	{
2088	desc.ViewDimension = pSurface->surfaceDesc.multisampleCount > 1
2089	? D3D11_DSV_DIMENSION_TEXTURE2DMS
2090	: D3D11_DSV_DIMENSION_TEXTURE2D;
2091	desc.Texture2D.MipSlice = pEntry->mipSlice;
2092	}
2093	else
2094	{
2095	desc.ViewDimension = pSurface->surfaceDesc.multisampleCount > 1
2096	? D3D11_DSV_DIMENSION_TEXTURE2DMSARRAY
2097	: D3D11_DSV_DIMENSION_TEXTURE2DARRAY;
2098	desc.Texture2DArray.MipSlice = pEntry->mipSlice;
2099	desc.Texture2DArray.FirstArraySlice = pEntry->firstArraySlice;
2100	desc.Texture2DArray.ArraySize = pEntry->arraySize;
2101	}
2102	break;
2103	default:
2104	ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
2105	}
2106
2107	HRESULT hr = pDevice->pDevice->CreateDepthStencilView(pResource, &desc, pp);
2108	Assert(SUCCEEDED(hr));
2109	return hr;
2110	}
2111
2112
2113	static HRESULT dxShaderCreate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, DXSHADER *pDXShader)
2114	{
2115	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
2116
2117	HRESULT hr = S_OK;
2118
2119	switch (pDXShader->enmShaderType)
2120	{
2121	case SVGA3D_SHADERTYPE_VS:
2122	hr = pDevice->pDevice->CreateVertexShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pVertexShader);
2123	Assert(SUCCEEDED(hr));
2124	break;
2125	case SVGA3D_SHADERTYPE_PS:
2126	hr = pDevice->pDevice->CreatePixelShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pPixelShader);
2127	Assert(SUCCEEDED(hr));
2128	break;
2129	case SVGA3D_SHADERTYPE_GS:
2130	{
2131	SVGA3dStreamOutputId const soid = pDXContext->svgaDXContext.streamOut.soid;
2132	if (soid == SVGA_ID_INVALID)
2133	{
2134	hr = pDevice->pDevice->CreateGeometryShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pGeometryShader);
2135	Assert(SUCCEEDED(hr));
2136	}
2137	else
2138	{
2139	ASSERT_GUEST_RETURN(soid < pDXContext->pBackendDXContext->cStreamOutput, E_INVALIDARG);
2140
2141	SVGACOTableDXStreamOutputEntry const *pEntry = &pDXContext->cot.paStreamOutput[soid];
2142	DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[soid];
2143
2144	hr = pDevice->pDevice->CreateGeometryShaderWithStreamOutput(pDXShader->pvDXBC, pDXShader->cbDXBC,
2145	pDXStreamOutput->aDeclarationEntry, pDXStreamOutput->cDeclarationEntry,
2146	pEntry->numOutputStreamStrides ? pEntry->streamOutputStrideInBytes : NULL, pEntry->numOutputStreamStrides,
2147	pEntry->rasterizedStream,
2148	/pClassLinkage=/ NULL, &pDXShader->pGeometryShader);
2149	AssertBreak(SUCCEEDED(hr));
2150
2151	pDXShader->soid = soid;
2152	}
2153	break;
2154	}
2155	case SVGA3D_SHADERTYPE_HS:
2156	hr = pDevice->pDevice->CreateHullShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pHullShader);
2157	Assert(SUCCEEDED(hr));
2158	break;
2159	case SVGA3D_SHADERTYPE_DS:
2160	hr = pDevice->pDevice->CreateDomainShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pDomainShader);
2161	Assert(SUCCEEDED(hr));
2162	break;
2163	case SVGA3D_SHADERTYPE_CS:
2164	hr = pDevice->pDevice->CreateComputeShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pComputeShader);
2165	Assert(SUCCEEDED(hr));
2166	break;
2167	default:
2168	ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
2169	}
2170
2171	return hr;
2172	}
2173
2174
2175	static void dxShaderSet(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderType type, DXSHADER *pDXShader)
2176	{
2177	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
2178
2179	switch (type)
2180	{
2181	case SVGA3D_SHADERTYPE_VS:
2182	pDevice->pImmediateContext->VSSetShader(pDXShader ? pDXShader->pVertexShader : NULL, NULL, 0);
2183	break;
2184	case SVGA3D_SHADERTYPE_PS:
2185	pDevice->pImmediateContext->PSSetShader(pDXShader ? pDXShader->pPixelShader : NULL, NULL, 0);
2186	break;
2187	case SVGA3D_SHADERTYPE_GS:
2188	{
2189	Assert(!pDXShader \|\| (pDXShader->soid == pDXContext->svgaDXContext.streamOut.soid));
2190	RT_NOREF(pDXContext);
2191	pDevice->pImmediateContext->GSSetShader(pDXShader ? pDXShader->pGeometryShader : NULL, NULL, 0);
2192	} break;
2193	case SVGA3D_SHADERTYPE_HS:
2194	pDevice->pImmediateContext->HSSetShader(pDXShader ? pDXShader->pHullShader : NULL, NULL, 0);
2195	break;
2196	case SVGA3D_SHADERTYPE_DS:
2197	pDevice->pImmediateContext->DSSetShader(pDXShader ? pDXShader->pDomainShader : NULL, NULL, 0);
2198	break;
2199	case SVGA3D_SHADERTYPE_CS:
2200	pDevice->pImmediateContext->CSSetShader(pDXShader ? pDXShader->pComputeShader : NULL, NULL, 0);
2201	break;
2202	default:
2203	ASSERT_GUEST_FAILED_RETURN_VOID();
2204	}
2205	}
2206
2207
2208	static void dxConstantBufferSet(DXDEVICE pDevice, uint32_t slot, SVGA3dShaderType type, ID3D11Buffer pConstantBuffer)
2209	{
2210	switch (type)
2211	{
2212	case SVGA3D_SHADERTYPE_VS:
2213	pDevice->pImmediateContext->VSSetConstantBuffers(slot, 1, &pConstantBuffer);
2214	break;
2215	case SVGA3D_SHADERTYPE_PS:
2216	pDevice->pImmediateContext->PSSetConstantBuffers(slot, 1, &pConstantBuffer);
2217	break;
2218	case SVGA3D_SHADERTYPE_GS:
2219	pDevice->pImmediateContext->GSSetConstantBuffers(slot, 1, &pConstantBuffer);
2220	break;
2221	case SVGA3D_SHADERTYPE_HS:
2222	pDevice->pImmediateContext->HSSetConstantBuffers(slot, 1, &pConstantBuffer);
2223	break;
2224	case SVGA3D_SHADERTYPE_DS:
2225	pDevice->pImmediateContext->DSSetConstantBuffers(slot, 1, &pConstantBuffer);
2226	break;
2227	case SVGA3D_SHADERTYPE_CS:
2228	pDevice->pImmediateContext->CSSetConstantBuffers(slot, 1, &pConstantBuffer);
2229	break;
2230	default:
2231	ASSERT_GUEST_FAILED_RETURN_VOID();
2232	}
2233	}
2234
2235
2236	static void dxSamplerSet(DXDEVICE pDevice, SVGA3dShaderType type, uint32_t startSampler, uint32_t cSampler, ID3D11SamplerState const *papSampler)
2237	{
2238	switch (type)
2239	{
2240	case SVGA3D_SHADERTYPE_VS:
2241	pDevice->pImmediateContext->VSSetSamplers(startSampler, cSampler, papSampler);
2242	break;
2243	case SVGA3D_SHADERTYPE_PS:
2244	pDevice->pImmediateContext->PSSetSamplers(startSampler, cSampler, papSampler);
2245	break;
2246	case SVGA3D_SHADERTYPE_GS:
2247	pDevice->pImmediateContext->GSSetSamplers(startSampler, cSampler, papSampler);
2248	break;
2249	case SVGA3D_SHADERTYPE_HS:
2250	pDevice->pImmediateContext->HSSetSamplers(startSampler, cSampler, papSampler);
2251	break;
2252	case SVGA3D_SHADERTYPE_DS:
2253	pDevice->pImmediateContext->DSSetSamplers(startSampler, cSampler, papSampler);
2254	break;
2255	case SVGA3D_SHADERTYPE_CS:
2256	pDevice->pImmediateContext->CSSetSamplers(startSampler, cSampler, papSampler);
2257	break;
2258	default:
2259	ASSERT_GUEST_FAILED_RETURN_VOID();
2260	}
2261	}
2262
2263
2264	static void dxShaderResourceViewSet(DXDEVICE pDevice, SVGA3dShaderType type, uint32_t startView, uint32_t cShaderResourceView, ID3D11ShaderResourceView const *papShaderResourceView)
2265	{
2266	switch (type)
2267	{
2268	case SVGA3D_SHADERTYPE_VS:
2269	pDevice->pImmediateContext->VSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2270	break;
2271	case SVGA3D_SHADERTYPE_PS:
2272	pDevice->pImmediateContext->PSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2273	break;
2274	case SVGA3D_SHADERTYPE_GS:
2275	pDevice->pImmediateContext->GSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2276	break;
2277	case SVGA3D_SHADERTYPE_HS:
2278	pDevice->pImmediateContext->HSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2279	break;
2280	case SVGA3D_SHADERTYPE_DS:
2281	pDevice->pImmediateContext->DSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2282	break;
2283	case SVGA3D_SHADERTYPE_CS:
2284	pDevice->pImmediateContext->CSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
2285	break;
2286	default:
2287	ASSERT_GUEST_FAILED_RETURN_VOID();
2288	}
2289	}
2290
2291
2292	static void dxCSUnorderedAccessViewSet(DXDEVICE pDevice, uint32_t startView, uint32_t cView, ID3D11UnorderedAccessView const papUnorderedAccessView, UINT pUAVInitialCounts)
2293	{
2294	pDevice->pImmediateContext->CSSetUnorderedAccessViews(startView, cView, papUnorderedAccessView, pUAVInitialCounts);
2295	}
2296
2297
2298	static int dxBackendSurfaceAlloc(PVMSVGA3DBACKENDSURFACE *ppBackendSurface)
2299	{
2300	PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
2301	AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
2302	RTListInit(&pBackendSurface->listView);
2303	*ppBackendSurface = pBackendSurface;
2304	return VINF_SUCCESS;
2305	}
2306
2307
2308	static UINT dxBindFlags(SVGA3dSurfaceAllFlags surfaceFlags)
2309	{
2310	/* Catch unimplemented flags. */
2311	Assert(!RT_BOOL(surfaceFlags & (SVGA3D_SURFACE_BIND_LOGICOPS \| SVGA3D_SURFACE_BIND_RAW_VIEWS)));
2312
2313	UINT BindFlags = 0;
2314
2315	if (surfaceFlags & (SVGA3D_SURFACE_BIND_VERTEX_BUFFER \| SVGA3D_SURFACE_HINT_VERTEXBUFFER))
2316	BindFlags \|= D3D11_BIND_VERTEX_BUFFER;
2317	if (surfaceFlags & (SVGA3D_SURFACE_BIND_INDEX_BUFFER \| SVGA3D_SURFACE_HINT_INDEXBUFFER))
2318	BindFlags \|= D3D11_BIND_INDEX_BUFFER;
2319	if (surfaceFlags & SVGA3D_SURFACE_BIND_CONSTANT_BUFFER) BindFlags \|= D3D11_BIND_CONSTANT_BUFFER;
2320	if (surfaceFlags & SVGA3D_SURFACE_BIND_SHADER_RESOURCE) BindFlags \|= D3D11_BIND_SHADER_RESOURCE;
2321	if (surfaceFlags & SVGA3D_SURFACE_BIND_RENDER_TARGET) BindFlags \|= D3D11_BIND_RENDER_TARGET;
2322	if (surfaceFlags & SVGA3D_SURFACE_BIND_DEPTH_STENCIL) BindFlags \|= D3D11_BIND_DEPTH_STENCIL;
2323	if (surfaceFlags & SVGA3D_SURFACE_BIND_STREAM_OUTPUT) BindFlags \|= D3D11_BIND_STREAM_OUTPUT;
2324	if (surfaceFlags & SVGA3D_SURFACE_BIND_UAVIEW) BindFlags \|= D3D11_BIND_UNORDERED_ACCESS;
2325	if (surfaceFlags & SVGA3D_SURFACE_RESERVED1) BindFlags \|= D3D11_BIND_DECODER;
2326
2327	return BindFlags;
2328	}
2329
2330
2331	static DXGI_FORMAT dxGetDxgiTypelessFormat(DXGI_FORMAT dxgiFormat)
2332	{
2333	switch (dxgiFormat)
2334	{
2335	case DXGI_FORMAT_R32G32B32A32_FLOAT:
2336	case DXGI_FORMAT_R32G32B32A32_UINT:
2337	case DXGI_FORMAT_R32G32B32A32_SINT:
2338	return DXGI_FORMAT_R32G32B32A32_TYPELESS; /* 1 */
2339	case DXGI_FORMAT_R32G32B32_FLOAT:
2340	case DXGI_FORMAT_R32G32B32_UINT:
2341	case DXGI_FORMAT_R32G32B32_SINT:
2342	return DXGI_FORMAT_R32G32B32_TYPELESS; /* 5 */
2343	case DXGI_FORMAT_R16G16B16A16_FLOAT:
2344	case DXGI_FORMAT_R16G16B16A16_UNORM:
2345	case DXGI_FORMAT_R16G16B16A16_UINT:
2346	case DXGI_FORMAT_R16G16B16A16_SNORM:
2347	case DXGI_FORMAT_R16G16B16A16_SINT:
2348	return DXGI_FORMAT_R16G16B16A16_TYPELESS; /* 9 */
2349	case DXGI_FORMAT_R32G32_FLOAT:
2350	case DXGI_FORMAT_R32G32_UINT:
2351	case DXGI_FORMAT_R32G32_SINT:
2352	return DXGI_FORMAT_R32G32_TYPELESS; /* 15 */
2353	case DXGI_FORMAT_D32_FLOAT_S8X24_UINT:
2354	case DXGI_FORMAT_R32_FLOAT_X8X24_TYPELESS:
2355	case DXGI_FORMAT_X32_TYPELESS_G8X24_UINT:
2356	return DXGI_FORMAT_R32G8X24_TYPELESS; /* 19 */
2357	case DXGI_FORMAT_R10G10B10A2_UNORM:
2358	case DXGI_FORMAT_R10G10B10A2_UINT:
2359	return DXGI_FORMAT_R10G10B10A2_TYPELESS; /* 23 */
2360	case DXGI_FORMAT_R8G8B8A8_UNORM:
2361	case DXGI_FORMAT_R8G8B8A8_UNORM_SRGB:
2362	case DXGI_FORMAT_R8G8B8A8_UINT:
2363	case DXGI_FORMAT_R8G8B8A8_SNORM:
2364	case DXGI_FORMAT_R8G8B8A8_SINT:
2365	return DXGI_FORMAT_R8G8B8A8_TYPELESS; /* 27 */
2366	case DXGI_FORMAT_R16G16_FLOAT:
2367	case DXGI_FORMAT_R16G16_UNORM:
2368	case DXGI_FORMAT_R16G16_UINT:
2369	case DXGI_FORMAT_R16G16_SNORM:
2370	case DXGI_FORMAT_R16G16_SINT:
2371	return DXGI_FORMAT_R16G16_TYPELESS; /* 33 */
2372	case DXGI_FORMAT_D32_FLOAT:
2373	case DXGI_FORMAT_R32_FLOAT:
2374	case DXGI_FORMAT_R32_UINT:
2375	case DXGI_FORMAT_R32_SINT:
2376	return DXGI_FORMAT_R32_TYPELESS; /* 39 */
2377	case DXGI_FORMAT_D24_UNORM_S8_UINT:
2378	case DXGI_FORMAT_R24_UNORM_X8_TYPELESS:
2379	case DXGI_FORMAT_X24_TYPELESS_G8_UINT:
2380	return DXGI_FORMAT_R24G8_TYPELESS; /* 44 */
2381	case DXGI_FORMAT_R8G8_UNORM:
2382	case DXGI_FORMAT_R8G8_UINT:
2383	case DXGI_FORMAT_R8G8_SNORM:
2384	case DXGI_FORMAT_R8G8_SINT:
2385	return DXGI_FORMAT_R8G8_TYPELESS; /* 48*/
2386	case DXGI_FORMAT_R16_FLOAT:
2387	case DXGI_FORMAT_D16_UNORM:
2388	case DXGI_FORMAT_R16_UNORM:
2389	case DXGI_FORMAT_R16_UINT:
2390	case DXGI_FORMAT_R16_SNORM:
2391	case DXGI_FORMAT_R16_SINT:
2392	return DXGI_FORMAT_R16_TYPELESS; /* 53 */
2393	case DXGI_FORMAT_R8_UNORM:
2394	case DXGI_FORMAT_R8_UINT:
2395	case DXGI_FORMAT_R8_SNORM:
2396	case DXGI_FORMAT_R8_SINT:
2397	return DXGI_FORMAT_R8_TYPELESS; /* 60*/
2398	case DXGI_FORMAT_BC1_UNORM:
2399	case DXGI_FORMAT_BC1_UNORM_SRGB:
2400	return DXGI_FORMAT_BC1_TYPELESS; /* 70 */
2401	case DXGI_FORMAT_BC2_UNORM:
2402	case DXGI_FORMAT_BC2_UNORM_SRGB:
2403	return DXGI_FORMAT_BC2_TYPELESS; /* 73 */
2404	case DXGI_FORMAT_BC3_UNORM:
2405	case DXGI_FORMAT_BC3_UNORM_SRGB:
2406	return DXGI_FORMAT_BC3_TYPELESS; /* 76 */
2407	case DXGI_FORMAT_BC4_UNORM:
2408	case DXGI_FORMAT_BC4_SNORM:
2409	return DXGI_FORMAT_BC4_TYPELESS; /* 79 */
2410	case DXGI_FORMAT_BC5_UNORM:
2411	case DXGI_FORMAT_BC5_SNORM:
2412	return DXGI_FORMAT_BC5_TYPELESS; /* 82 */
2413	case DXGI_FORMAT_B8G8R8A8_UNORM:
2414	case DXGI_FORMAT_B8G8R8A8_UNORM_SRGB:
2415	return DXGI_FORMAT_B8G8R8A8_TYPELESS; /* 90 */
2416	case DXGI_FORMAT_B8G8R8X8_UNORM:
2417	case DXGI_FORMAT_B8G8R8X8_UNORM_SRGB:
2418	return DXGI_FORMAT_B8G8R8X8_TYPELESS; /* 92 */
2419	case DXGI_FORMAT_BC6H_UF16:
2420	case DXGI_FORMAT_BC6H_SF16:
2421	return DXGI_FORMAT_BC6H_TYPELESS; /* 94 */
2422	case DXGI_FORMAT_BC7_UNORM:
2423	case DXGI_FORMAT_BC7_UNORM_SRGB:
2424	return DXGI_FORMAT_BC7_TYPELESS; /* 97 */
2425	default:
2426	break;
2427	}
2428
2429	return dxgiFormat;
2430	}
2431
2432
2433	static bool dxIsDepthStencilFormat(DXGI_FORMAT dxgiFormat)
2434	{
2435	switch (dxgiFormat)
2436	{
2437	case DXGI_FORMAT_D32_FLOAT_S8X24_UINT:
2438	case DXGI_FORMAT_D32_FLOAT:
2439	case DXGI_FORMAT_D24_UNORM_S8_UINT:
2440	case DXGI_FORMAT_D16_UNORM:
2441	return true;
2442	default:
2443	break;
2444	}
2445
2446	return false;
2447	}
2448
2449
2450	static int vmsvga3dBackSurfaceCreateTexture(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface)
2451	{
2452	PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2453	AssertReturn(p3dState, VERR_INVALID_STATE);
2454
2455	PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2456	AssertReturn(pBackend, VERR_INVALID_STATE);
2457
2458	UINT MiscFlags = 0;
2459	DXDEVICE *pDXDevice = &p3dState->pBackend->dxDevice;
2460	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
2461
2462	if (pSurface->pBackendSurface != NULL)
2463	{
2464	AssertFailed(); /** @todo Should the function not be used like that? */
2465	vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
2466	}
2467
2468	PVMSVGA3DBACKENDSURFACE pBackendSurface;
2469	int rc = dxBackendSurfaceAlloc(&pBackendSurface);
2470	AssertRCReturn(rc, rc);
2471
2472	uint32_t const cWidth = pSurface->paMipmapLevels[0].cBlocksX * pSurface->cxBlock;
2473	uint32_t const cHeight = pSurface->paMipmapLevels[0].cBlocksY * pSurface->cyBlock;
2474	uint32_t const cDepth = pSurface->paMipmapLevels[0].mipmapSize.depth;
2475	uint32_t const numMipLevels = pSurface->cLevels;
2476
2477	DXGI_FORMAT dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(pSurface->format);
2478	AssertReturn(dxgiFormat != DXGI_FORMAT_UNKNOWN, E_FAIL);
2479
2480	/* Create typeless textures, unless it is a depth/stencil resource,
2481	* because D3D11_BIND_DEPTH_STENCIL requires a depth/stencil format.
2482	* Always use typeless format for staging/dynamic resources.
2483	* Use explicit format for screen targets. For example they can be used
2484	* for video processor output view, which does not allow a typeless format.
2485	*/
2486	DXGI_FORMAT const dxgiFormatTypeless = dxGetDxgiTypelessFormat(dxgiFormat);
2487	if ( !dxIsDepthStencilFormat(dxgiFormat)
2488	&& !RT_BOOL(pSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET))
2489	dxgiFormat = dxgiFormatTypeless;
2490
2491	/* Format for staging resource is always the typeless one. */
2492	DXGI_FORMAT const dxgiFormatStaging = dxgiFormatTypeless;
2493
2494	DXGI_FORMAT dxgiFormatDynamic;
2495	/* Some drivers do not allow to use depth typeless formats for dynamic resources.
2496	* Create a placeholder texture (it does not work with CopySubresource).
2497	*/
2498	/** @todo Implement upload from such textures. */
2499	if (dxgiFormatTypeless == DXGI_FORMAT_R24G8_TYPELESS)
2500	dxgiFormatDynamic = DXGI_FORMAT_R32_UINT;
2501	else if (dxgiFormatTypeless == DXGI_FORMAT_R32G8X24_TYPELESS)
2502	dxgiFormatDynamic = DXGI_FORMAT_R32G32_UINT;
2503	else
2504	dxgiFormatDynamic = dxgiFormatTypeless;
2505
2506	/*
2507	* Create D3D11 texture object.
2508	*/
2509	D3D11_SUBRESOURCE_DATA *paInitialData = NULL;
2510	if (pSurface->paMipmapLevels[0].pSurfaceData && pSurface->surfaceDesc.multisampleCount <= 1)
2511	{
2512	/* Can happen for a non GBO surface or if GBO texture was updated prior to creation of the hardware resource. */
2513	uint32_t const cSubresource = numMipLevels * pSurface->surfaceDesc.numArrayElements;
2514	paInitialData = (D3D11_SUBRESOURCE_DATA )RTMemAlloc(cSubresource sizeof(D3D11_SUBRESOURCE_DATA));
2515	AssertPtrReturn(paInitialData, VERR_NO_MEMORY);
2516
2517	for (uint32_t i = 0; i < cSubresource; ++i)
2518	{
2519	PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
2520	D3D11_SUBRESOURCE_DATA *p = &paInitialData[i];
2521	p->pSysMem = pMipmapLevel->pSurfaceData;
2522	p->SysMemPitch = pMipmapLevel->cbSurfacePitch;
2523	p->SysMemSlicePitch = pMipmapLevel->cbSurfacePlane;
2524	}
2525	}
2526
2527	HRESULT hr = S_OK;
2528	if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_CUBEMAP)
2529	{
2530	Assert(pSurface->cFaces == 6);
2531	Assert(cWidth == cHeight);
2532	Assert(cDepth == 1);
2533	//DEBUG_BREAKPOINT_TEST();
2534
2535	D3D11_TEXTURE2D_DESC td;
2536	RT_ZERO(td);
2537	td.Width = cWidth;
2538	td.Height = cHeight;
2539	td.MipLevels = numMipLevels;
2540	td.ArraySize = pSurface->surfaceDesc.numArrayElements; /* This is 6 * numCubes */
2541	td.Format = dxgiFormat;
2542	td.SampleDesc.Count = 1;
2543	td.SampleDesc.Quality = 0;
2544	td.Usage = D3D11_USAGE_DEFAULT;
2545	td.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
2546	td.CPUAccessFlags = 0; /** @todo */
2547	td.MiscFlags = MiscFlags \| D3D11_RESOURCE_MISC_TEXTURECUBE; /** @todo */
2548	if ( numMipLevels > 1
2549	&& (td.BindFlags & (D3D11_BIND_SHADER_RESOURCE \| D3D11_BIND_RENDER_TARGET)) == (D3D11_BIND_SHADER_RESOURCE \| D3D11_BIND_RENDER_TARGET))
2550	td.MiscFlags \|= D3D11_RESOURCE_MISC_GENERATE_MIPS; /* Required for GenMips. */
2551
2552	hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->u.pTexture2D);
2553	Assert(SUCCEEDED(hr));
2554	if (SUCCEEDED(hr))
2555	{
2556	/* Map-able texture. */
2557	td.Format = dxgiFormatDynamic;
2558	td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2559	td.ArraySize = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2560	td.Usage = D3D11_USAGE_DYNAMIC;
2561	td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2562	td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2563	td.MiscFlags = 0;
2564	hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->dynamic.pTexture2D);
2565	Assert(SUCCEEDED(hr));
2566	}
2567
2568	if (SUCCEEDED(hr))
2569	{
2570	/* Staging texture. */
2571	td.Format = dxgiFormatStaging;
2572	td.Usage = D3D11_USAGE_STAGING;
2573	td.BindFlags = 0; /* No flags allowed. */
2574	td.CPUAccessFlags = D3D11_CPU_ACCESS_READ \| D3D11_CPU_ACCESS_WRITE;
2575	td.MiscFlags = 0;
2576	hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->staging.pTexture2D);
2577	Assert(SUCCEEDED(hr));
2578	}
2579
2580	if (SUCCEEDED(hr))
2581	{
2582	pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE_CUBE;
2583	}
2584	}
2585	else if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_1D)
2586	{
2587	/*
2588	* 1D texture.
2589	*/
2590	Assert(pSurface->cFaces == 1);
2591
2592	D3D11_TEXTURE1D_DESC td;
2593	RT_ZERO(td);
2594	td.Width = cWidth;
2595	td.MipLevels = numMipLevels;
2596	td.ArraySize = pSurface->surfaceDesc.numArrayElements;
2597	td.Format = dxgiFormat;
2598	td.Usage = D3D11_USAGE_DEFAULT;
2599	td.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
2600	td.CPUAccessFlags = 0;
2601	td.MiscFlags = MiscFlags; /** @todo */
2602	if ( numMipLevels > 1
2603	&& (td.BindFlags & (D3D11_BIND_SHADER_RESOURCE \| D3D11_BIND_RENDER_TARGET)) == (D3D11_BIND_SHADER_RESOURCE \| D3D11_BIND_RENDER_TARGET))
2604	td.MiscFlags \|= D3D11_RESOURCE_MISC_GENERATE_MIPS; /* Required for GenMips. */
2605
2606	hr = pDXDevice->pDevice->CreateTexture1D(&td, paInitialData, &pBackendSurface->u.pTexture1D);
2607	Assert(SUCCEEDED(hr));
2608	if (SUCCEEDED(hr))
2609	{
2610	/* Map-able texture. */
2611	td.Format = dxgiFormatDynamic;
2612	td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2613	td.ArraySize = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2614	td.Usage = D3D11_USAGE_DYNAMIC;
2615	td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2616	td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2617	td.MiscFlags = 0;
2618	hr = pDXDevice->pDevice->CreateTexture1D(&td, paInitialData, &pBackendSurface->dynamic.pTexture1D);
2619	Assert(SUCCEEDED(hr));
2620	}
2621
2622	if (SUCCEEDED(hr))
2623	{
2624	/* Staging texture. */
2625	td.Format = dxgiFormatStaging;
2626	td.Usage = D3D11_USAGE_STAGING;
2627	td.BindFlags = 0; /* No flags allowed. */
2628	td.CPUAccessFlags = D3D11_CPU_ACCESS_READ \| D3D11_CPU_ACCESS_WRITE;
2629	td.MiscFlags = 0;
2630	hr = pDXDevice->pDevice->CreateTexture1D(&td, paInitialData, &pBackendSurface->staging.pTexture1D);
2631	Assert(SUCCEEDED(hr));
2632	}
2633
2634	if (SUCCEEDED(hr))
2635	{
2636	pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE_1D;
2637	}
2638	}
2639	else
2640	{
2641	if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_VOLUME)
2642	{
2643	/*
2644	* Volume texture.
2645	*/
2646	Assert(pSurface->cFaces == 1);
2647	Assert(pSurface->surfaceDesc.numArrayElements == 1);
2648
2649	D3D11_TEXTURE3D_DESC td;
2650	RT_ZERO(td);
2651	td.Width = cWidth;
2652	td.Height = cHeight;
2653	td.Depth = cDepth;
2654	td.MipLevels = numMipLevels;
2655	td.Format = dxgiFormat;
2656	td.Usage = D3D11_USAGE_DEFAULT;
2657	td.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
2658	td.CPUAccessFlags = 0; /** @todo */
2659	td.MiscFlags = MiscFlags; /** @todo */
2660	if ( numMipLevels > 1
2661	&& (td.BindFlags & (D3D11_BIND_SHADER_RESOURCE \| D3D11_BIND_RENDER_TARGET)) == (D3D11_BIND_SHADER_RESOURCE \| D3D11_BIND_RENDER_TARGET))
2662	td.MiscFlags \|= D3D11_RESOURCE_MISC_GENERATE_MIPS; /* Required for GenMips. */
2663
2664	hr = pDXDevice->pDevice->CreateTexture3D(&td, paInitialData, &pBackendSurface->u.pTexture3D);
2665	Assert(SUCCEEDED(hr));
2666	if (SUCCEEDED(hr))
2667	{
2668	/* Map-able texture. */
2669	td.Format = dxgiFormatDynamic;
2670	td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2671	td.Usage = D3D11_USAGE_DYNAMIC;
2672	td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2673	td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2674	td.MiscFlags = 0;
2675	hr = pDXDevice->pDevice->CreateTexture3D(&td, paInitialData, &pBackendSurface->dynamic.pTexture3D);
2676	Assert(SUCCEEDED(hr));
2677	}
2678
2679	if (SUCCEEDED(hr))
2680	{
2681	/* Staging texture. */
2682	td.Format = dxgiFormatStaging;
2683	td.Usage = D3D11_USAGE_STAGING;
2684	td.BindFlags = 0; /* No flags allowed. */
2685	td.CPUAccessFlags = D3D11_CPU_ACCESS_READ \| D3D11_CPU_ACCESS_WRITE;
2686	td.MiscFlags = 0;
2687	hr = pDXDevice->pDevice->CreateTexture3D(&td, paInitialData, &pBackendSurface->staging.pTexture3D);
2688	Assert(SUCCEEDED(hr));
2689	}
2690
2691	if (SUCCEEDED(hr))
2692	{
2693	pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE_3D;
2694	}
2695	}
2696	else
2697	{
2698	/*
2699	* 2D texture.
2700	*/
2701	Assert(cDepth == 1);
2702	Assert(pSurface->cFaces == 1);
2703
2704	D3D11_TEXTURE2D_DESC td;
2705	RT_ZERO(td);
2706	td.Width = cWidth;
2707	td.Height = cHeight;
2708	td.MipLevels = numMipLevels;
2709	td.ArraySize = pSurface->surfaceDesc.numArrayElements;
2710	td.Format = dxgiFormat;
2711	td.SampleDesc.Count = pSurface->surfaceDesc.multisampleCount;
2712	td.SampleDesc.Quality = 0;
2713	td.Usage = D3D11_USAGE_DEFAULT;
2714	td.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
2715	td.CPUAccessFlags = 0; /** @todo */
2716	td.MiscFlags = MiscFlags; /** @todo */
2717	if ( numMipLevels > 1
2718	&& (td.BindFlags & (D3D11_BIND_SHADER_RESOURCE \| D3D11_BIND_RENDER_TARGET)) == (D3D11_BIND_SHADER_RESOURCE \| D3D11_BIND_RENDER_TARGET))
2719	td.MiscFlags \|= D3D11_RESOURCE_MISC_GENERATE_MIPS; /* Required for GenMips. */
2720
2721	hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->u.pTexture2D);
2722	Assert(SUCCEEDED(hr));
2723	if (SUCCEEDED(hr))
2724	{
2725	/* Map-able texture. */
2726	td.Format = dxgiFormatDynamic;
2727	td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2728	td.ArraySize = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2729	td.SampleDesc.Count = 1;
2730	td.SampleDesc.Quality = 0;
2731	td.Usage = D3D11_USAGE_DYNAMIC;
2732	td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2733	td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2734	td.MiscFlags = 0;
2735	hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->dynamic.pTexture2D);
2736	Assert(SUCCEEDED(hr));
2737	}
2738
2739	if (SUCCEEDED(hr))
2740	{
2741	/* Staging texture. */
2742	td.Format = dxgiFormatStaging;
2743	td.Usage = D3D11_USAGE_STAGING;
2744	td.BindFlags = 0; /* No flags allowed. */
2745	td.CPUAccessFlags = D3D11_CPU_ACCESS_READ \| D3D11_CPU_ACCESS_WRITE;
2746	td.MiscFlags = 0;
2747	hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->staging.pTexture2D);
2748	Assert(SUCCEEDED(hr));
2749	}
2750
2751	if (SUCCEEDED(hr))
2752	{
2753	pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE_2D;
2754	}
2755	}
2756	}
2757
2758	if (hr == DXGI_ERROR_DEVICE_REMOVED)
2759	{
2760	DEBUG_BREAKPOINT_TEST();
2761	hr = pDXDevice->pDevice->GetDeviceRemovedReason();
2762	}
2763
2764	Assert(hr == S_OK);
2765
2766	RTMemFree(paInitialData);
2767
2768	if (pSurface->autogenFilter != SVGA3D_TEX_FILTER_NONE)
2769	{
2770	}
2771
2772	if (SUCCEEDED(hr))
2773	{
2774	/*
2775	* Success.
2776	*/
2777	LogFunc(("sid = %u\n", pSurface->id));
2778	pBackendSurface->enmDxgiFormat = dxgiFormat;
2779	pSurface->pBackendSurface = pBackendSurface;
2780	return VINF_SUCCESS;
2781	}
2782
2783	D3D_RELEASE(pBackendSurface->staging.pResource);
2784	D3D_RELEASE(pBackendSurface->dynamic.pResource);
2785	D3D_RELEASE(pBackendSurface->u.pResource);
2786	RTMemFree(pBackendSurface);
2787	return VERR_NO_MEMORY;
2788	}
2789
2790	#if 0
2791	static int vmsvga3dBackSurfaceCreateBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
2792	{
2793	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
2794	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
2795
2796	/* Buffers should be created as such. */
2797	AssertReturn(RT_BOOL(pSurface->f.surfaceFlags & ( SVGA3D_SURFACE_HINT_INDEXBUFFER
2798	\| SVGA3D_SURFACE_HINT_VERTEXBUFFER
2799	\| SVGA3D_SURFACE_BIND_VERTEX_BUFFER
2800	\| SVGA3D_SURFACE_BIND_INDEX_BUFFER
2801	)), VERR_INVALID_PARAMETER);
2802
2803	if (pSurface->pBackendSurface != NULL)
2804	{
2805	AssertFailed(); /** @todo Should the function not be used like that? */
2806	vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
2807	}
2808
2809	PVMSVGA3DMIPMAPLEVEL pMipLevel;
2810	int rc = vmsvga3dMipmapLevel(pSurface, 0, 0, &pMipLevel);
2811	AssertRCReturn(rc, rc);
2812
2813	PVMSVGA3DBACKENDSURFACE pBackendSurface;
2814	rc = dxBackendSurfaceAlloc(&pBackendSurface);
2815	AssertRCReturn(rc, rc);
2816
2817	LogFunc(("sid = %u, size = %u\n", pSurface->id, pMipLevel->cbSurface));
2818
2819	/* Upload the current data, if any. */
2820	D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
2821	D3D11_SUBRESOURCE_DATA initialData;
2822	if (pMipLevel->pSurfaceData)
2823	{
2824	initialData.pSysMem = pMipLevel->pSurfaceData;
2825	initialData.SysMemPitch = pMipLevel->cbSurface;
2826	initialData.SysMemSlicePitch = pMipLevel->cbSurface;
2827
2828	pInitialData = &initialData;
2829	}
2830
2831	D3D11_BUFFER_DESC bd;
2832	RT_ZERO(bd);
2833	bd.ByteWidth = pMipLevel->cbSurface;
2834	bd.Usage = D3D11_USAGE_DEFAULT;
2835	bd.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
2836
2837	HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->u.pBuffer);
2838	Assert(SUCCEEDED(hr));
2839	#ifndef DX_COMMON_STAGING_BUFFER
2840	if (SUCCEEDED(hr))
2841	{
2842	/* Map-able Buffer. */
2843	bd.Usage = D3D11_USAGE_DYNAMIC;
2844	bd.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2845	bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2846	hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->dynamic.pBuffer);
2847	Assert(SUCCEEDED(hr));
2848	}
2849
2850	if (SUCCEEDED(hr))
2851	{
2852	/* Staging texture. */
2853	bd.Usage = D3D11_USAGE_STAGING;
2854	bd.BindFlags = 0; /* No flags allowed. */
2855	bd.CPUAccessFlags = D3D11_CPU_ACCESS_READ \| D3D11_CPU_ACCESS_WRITE;
2856	hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->staging.pBuffer);
2857	Assert(SUCCEEDED(hr));
2858	}
2859	#endif
2860
2861	if (SUCCEEDED(hr))
2862	{
2863	/*
2864	* Success.
2865	*/
2866	pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
2867	pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
2868	pSurface->pBackendSurface = pBackendSurface;
2869	return VINF_SUCCESS;
2870	}
2871
2872	/* Failure. */
2873	D3D_RELEASE(pBackendSurface->u.pBuffer);
2874	#ifndef DX_COMMON_STAGING_BUFFER
2875	D3D_RELEASE(pBackendSurface->dynamic.pBuffer);
2876	D3D_RELEASE(pBackendSurface->staging.pBuffer);
2877	#endif
2878	RTMemFree(pBackendSurface);
2879	return VERR_NO_MEMORY;
2880	}
2881	#endif
2882
2883	static int vmsvga3dBackSurfaceCreateSoBuffer(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface)
2884	{
2885	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
2886	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
2887
2888	/* Buffers should be created as such. */
2889	AssertReturn(RT_BOOL(pSurface->f.surfaceFlags & SVGA3D_SURFACE_BIND_STREAM_OUTPUT), VERR_INVALID_PARAMETER);
2890
2891	if (pSurface->pBackendSurface != NULL)
2892	{
2893	AssertFailed(); /** @todo Should the function not be used like that? */
2894	vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
2895	}
2896
2897	PVMSVGA3DBACKENDSURFACE pBackendSurface;
2898	int rc = dxBackendSurfaceAlloc(&pBackendSurface);
2899	AssertRCReturn(rc, rc);
2900
2901	D3D11_BUFFER_DESC bd;
2902	RT_ZERO(bd);
2903	bd.ByteWidth = pSurface->paMipmapLevels[0].cbSurface;
2904	bd.Usage = D3D11_USAGE_DEFAULT;
2905	bd.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
2906	bd.CPUAccessFlags = 0; /// @todo ? D3D11_CPU_ACCESS_READ;
2907	bd.MiscFlags = 0;
2908	bd.StructureByteStride = 0;
2909
2910	HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, 0, &pBackendSurface->u.pBuffer);
2911	#ifndef DX_COMMON_STAGING_BUFFER
2912	if (SUCCEEDED(hr))
2913	{
2914	/* Map-able Buffer. */
2915	bd.Usage = D3D11_USAGE_DYNAMIC;
2916	bd.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2917	bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2918	hr = pDevice->pDevice->CreateBuffer(&bd, 0, &pBackendSurface->dynamic.pBuffer);
2919	Assert(SUCCEEDED(hr));
2920	}
2921
2922	if (SUCCEEDED(hr))
2923	{
2924	/* Staging texture. */
2925	bd.Usage = D3D11_USAGE_STAGING;
2926	bd.BindFlags = 0; /* No flags allowed. */
2927	bd.CPUAccessFlags = D3D11_CPU_ACCESS_READ \| D3D11_CPU_ACCESS_WRITE;
2928	hr = pDevice->pDevice->CreateBuffer(&bd, 0, &pBackendSurface->staging.pBuffer);
2929	Assert(SUCCEEDED(hr));
2930	}
2931	#endif
2932
2933	if (SUCCEEDED(hr))
2934	{
2935	/*
2936	* Success.
2937	*/
2938	pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
2939	pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
2940	pSurface->pBackendSurface = pBackendSurface;
2941	return VINF_SUCCESS;
2942	}
2943
2944	/* Failure. */
2945	D3D_RELEASE(pBackendSurface->u.pBuffer);
2946	#ifndef DX_COMMON_STAGING_BUFFER
2947	D3D_RELEASE(pBackendSurface->dynamic.pBuffer);
2948	D3D_RELEASE(pBackendSurface->staging.pBuffer);
2949	#endif
2950	RTMemFree(pBackendSurface);
2951	return VERR_NO_MEMORY;
2952	}
2953
2954	#if 0
2955	static int vmsvga3dBackSurfaceCreateConstantBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface, uint32_t offsetInBytes, uint32_t sizeInBytes)
2956	{
2957	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
2958	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
2959
2960	/* Buffers should be created as such. */
2961	AssertReturn(RT_BOOL(pSurface->f.surfaceFlags & ( SVGA3D_SURFACE_BIND_CONSTANT_BUFFER)), VERR_INVALID_PARAMETER);
2962
2963	if (pSurface->pBackendSurface != NULL)
2964	{
2965	AssertFailed(); /** @todo Should the function not be used like that? */
2966	vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
2967	}
2968
2969	PVMSVGA3DMIPMAPLEVEL pMipLevel;
2970	int rc = vmsvga3dMipmapLevel(pSurface, 0, 0, &pMipLevel);
2971	AssertRCReturn(rc, rc);
2972
2973	ASSERT_GUEST_RETURN( offsetInBytes < pMipLevel->cbSurface
2974	&& sizeInBytes <= pMipLevel->cbSurface - offsetInBytes, VERR_INVALID_PARAMETER);
2975
2976	PVMSVGA3DBACKENDSURFACE pBackendSurface;
2977	rc = dxBackendSurfaceAlloc(&pBackendSurface);
2978	AssertRCReturn(rc, rc);
2979
2980	/* Upload the current data, if any. */
2981	D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
2982	D3D11_SUBRESOURCE_DATA initialData;
2983	if (pMipLevel->pSurfaceData)
2984	{
2985	initialData.pSysMem = (uint8_t *)pMipLevel->pSurfaceData + offsetInBytes;
2986	initialData.SysMemPitch = pMipLevel->cbSurface;
2987	initialData.SysMemSlicePitch = pMipLevel->cbSurface;
2988
2989	pInitialData = &initialData;
2990
2991	// Log(("%.*Rhxd\n", sizeInBytes, initialData.pSysMem));
2992	}
2993
2994	D3D11_BUFFER_DESC bd;
2995	RT_ZERO(bd);
2996	bd.ByteWidth = sizeInBytes;
2997	bd.Usage = D3D11_USAGE_DYNAMIC;
2998	bd.BindFlags = D3D11_BIND_CONSTANT_BUFFER;
2999	bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
3000	bd.MiscFlags = 0;
3001	bd.StructureByteStride = 0;
3002
3003	HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->u.pBuffer);
3004	if (SUCCEEDED(hr))
3005	{
3006	/*
3007	* Success.
3008	*/
3009	pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
3010	pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
3011	pSurface->pBackendSurface = pBackendSurface;
3012	return VINF_SUCCESS;
3013	}
3014
3015	/* Failure. */
3016	D3D_RELEASE(pBackendSurface->u.pBuffer);
3017	RTMemFree(pBackendSurface);
3018	return VERR_NO_MEMORY;
3019	}
3020	#endif
3021
3022	static int vmsvga3dBackSurfaceCreateResource(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface)
3023	{
3024	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
3025	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3026
3027	if (pSurface->pBackendSurface != NULL)
3028	{
3029	AssertFailed(); /** @todo Should the function not be used like that? */
3030	vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
3031	}
3032
3033	PVMSVGA3DMIPMAPLEVEL pMipLevel;
3034	int rc = vmsvga3dMipmapLevel(pSurface, 0, 0, &pMipLevel);
3035	AssertRCReturn(rc, rc);
3036
3037	PVMSVGA3DBACKENDSURFACE pBackendSurface;
3038	rc = dxBackendSurfaceAlloc(&pBackendSurface);
3039	AssertRCReturn(rc, rc);
3040
3041	HRESULT hr;
3042
3043	/*
3044	* Figure out the type of the surface.
3045	*/
3046	if (pSurface->format == SVGA3D_BUFFER)
3047	{
3048	/* Upload the current data, if any. */
3049	D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
3050	D3D11_SUBRESOURCE_DATA initialData;
3051	if (pMipLevel->pSurfaceData)
3052	{
3053	initialData.pSysMem = pMipLevel->pSurfaceData;
3054	initialData.SysMemPitch = pMipLevel->cbSurface;
3055	initialData.SysMemSlicePitch = pMipLevel->cbSurface;
3056
3057	pInitialData = &initialData;
3058	}
3059
3060	D3D11_BUFFER_DESC bd;
3061	RT_ZERO(bd);
3062	bd.ByteWidth = pMipLevel->cbSurface;
3063
3064	if (pSurface->f.surfaceFlags & (SVGA3D_SURFACE_STAGING_UPLOAD \| SVGA3D_SURFACE_STAGING_DOWNLOAD))
3065	bd.Usage = D3D11_USAGE_STAGING;
3066	else if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_HINT_DYNAMIC)
3067	bd.Usage = D3D11_USAGE_DYNAMIC;
3068	else if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_HINT_STATIC)
3069	{
3070	/* Use D3D11_USAGE_DEFAULT instead of D3D11_USAGE_IMMUTABLE to let the guest the guest update
3071	* the buffer later.
3072	*
3073	* The guest issues SVGA_3D_CMD_INVALIDATE_GB_IMAGE followed by SVGA_3D_CMD_UPDATE_GB_IMAGE
3074	* when the data in SVGA3D_SURFACE_HINT_STATIC surface is updated.
3075	* D3D11_USAGE_IMMUTABLE would work if the device destroys the D3D buffer on INVALIDATE
3076	* and re-creates it in setupPipeline with initial data from the backing guest MOB.
3077	* Currently the device does not destroy the buffer on INVALIDATE. So just use D3D11_USAGE_DEFAULT.
3078	*/
3079	bd.Usage = D3D11_USAGE_DEFAULT;
3080	}
3081	else if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_HINT_INDIRECT_UPDATE)
3082	bd.Usage = D3D11_USAGE_DEFAULT;
3083
3084	bd.BindFlags = dxBindFlags(pSurface->f.surfaceFlags);
3085
3086	if (bd.Usage == D3D11_USAGE_STAGING)
3087	bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE \| D3D11_CPU_ACCESS_READ;
3088	else if (bd.Usage == D3D11_USAGE_DYNAMIC)
3089	bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
3090
3091	if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_DRAWINDIRECT_ARGS)
3092	bd.MiscFlags \|= D3D11_RESOURCE_MISC_DRAWINDIRECT_ARGS;
3093	if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_BIND_RAW_VIEWS)
3094	bd.MiscFlags \|= D3D11_RESOURCE_MISC_BUFFER_ALLOW_RAW_VIEWS;
3095	if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_BUFFER_STRUCTURED)
3096	bd.MiscFlags \|= D3D11_RESOURCE_MISC_BUFFER_STRUCTURED;
3097	if (pSurface->f.surfaceFlags & SVGA3D_SURFACE_RESOURCE_CLAMP)
3098	bd.MiscFlags \|= D3D11_RESOURCE_MISC_RESOURCE_CLAMP;
3099
3100	if (bd.MiscFlags & D3D11_RESOURCE_MISC_BUFFER_STRUCTURED)
3101	{
3102	SVGAOTableSurfaceEntry entrySurface;
3103	rc = vmsvgaR3OTableReadSurface(pThisCC->svga.pSvgaR3State, pSurface->id, &entrySurface);
3104	AssertRCReturn(rc, rc);
3105
3106	bd.StructureByteStride = entrySurface.bufferByteStride;
3107	}
3108
3109	hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->u.pBuffer);
3110	Assert(SUCCEEDED(hr));
3111	#ifndef DX_COMMON_STAGING_BUFFER
3112	if (SUCCEEDED(hr))
3113	{
3114	/* Map-able Buffer. */
3115	bd.Usage = D3D11_USAGE_DYNAMIC;
3116	bd.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
3117	bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
3118	hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->dynamic.pBuffer);
3119	Assert(SUCCEEDED(hr));
3120	}
3121
3122	if (SUCCEEDED(hr))
3123	{
3124	/* Staging texture. */
3125	bd.Usage = D3D11_USAGE_STAGING;
3126	bd.BindFlags = 0; /* No flags allowed. */
3127	bd.CPUAccessFlags = D3D11_CPU_ACCESS_READ \| D3D11_CPU_ACCESS_WRITE;
3128	hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->staging.pBuffer);
3129	Assert(SUCCEEDED(hr));
3130	}
3131	#endif
3132	if (SUCCEEDED(hr))
3133	{
3134	pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
3135	pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
3136	}
3137	}
3138	else
3139	{
3140	/** @todo Texture. Currently vmsvga3dBackSurfaceCreateTexture is called for textures. */
3141	AssertFailed();
3142	hr = E_FAIL;
3143	}
3144
3145	if (SUCCEEDED(hr))
3146	{
3147	/*
3148	* Success.
3149	*/
3150	pSurface->pBackendSurface = pBackendSurface;
3151	return VINF_SUCCESS;
3152	}
3153
3154	/* Failure. */
3155	D3D_RELEASE(pBackendSurface->u.pResource);
3156	D3D_RELEASE(pBackendSurface->dynamic.pResource);
3157	D3D_RELEASE(pBackendSurface->staging.pResource);
3158	RTMemFree(pBackendSurface);
3159	return VERR_NO_MEMORY;
3160	}
3161
3162
3163	static int dxEnsureResource(PVGASTATECC pThisCC, uint32_t sid,
3164	PVMSVGA3DSURFACE ppSurface, ID3D11Resource *ppResource)
3165	{
3166	/* Get corresponding resource for sid. Create the surface if does not yet exist. */
3167	PVMSVGA3DSURFACE pSurface;
3168	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
3169	AssertRCReturn(rc, rc);
3170
3171	if (pSurface->pBackendSurface == NULL)
3172	{
3173	/* Create the actual texture or buffer. */
3174	/** @todo One function to create all resources from surfaces. */
3175	if (pSurface->format != SVGA3D_BUFFER)
3176	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pSurface);
3177	else
3178	rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pSurface);
3179
3180	AssertRCReturn(rc, rc);
3181	LogFunc(("Created for sid = %u\n", sid));
3182	}
3183
3184	ID3D11Resource *pResource = dxResource(pSurface);
3185	AssertReturn(pResource, VERR_INVALID_STATE);
3186
3187	*ppSurface = pSurface;
3188	*ppResource = pResource;
3189	return VINF_SUCCESS;
3190	}
3191
3192
3193	#ifdef DX_COMMON_STAGING_BUFFER
3194	static int dxStagingBufferRealloc(DXDEVICE *pDXDevice, uint32_t cbRequiredSize)
3195	{
3196	AssertReturn(cbRequiredSize < SVGA3D_MAX_SURFACE_MEM_SIZE, VERR_INVALID_PARAMETER);
3197
3198	if (RT_LIKELY(cbRequiredSize <= pDXDevice->cbStagingBuffer))
3199	return VINF_SUCCESS;
3200
3201	D3D_RELEASE(pDXDevice->pStagingBuffer);
3202
3203	uint32_t const cbAlloc = RT_ALIGN_32(cbRequiredSize, _64K);
3204
3205	D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
3206	D3D11_BUFFER_DESC bd;
3207	RT_ZERO(bd);
3208	bd.ByteWidth = cbAlloc;
3209	bd.Usage = D3D11_USAGE_STAGING;
3210	//bd.BindFlags = 0; /* No bind flags are allowed for staging resources. */
3211	bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE \| D3D11_CPU_ACCESS_READ;
3212
3213	int rc = VINF_SUCCESS;
3214	ID3D11Buffer *pBuffer;
3215	HRESULT hr = pDXDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBuffer);
3216	if (SUCCEEDED(hr))
3217	{
3218	pDXDevice->pStagingBuffer = pBuffer;
3219	pDXDevice->cbStagingBuffer = cbAlloc;
3220	}
3221	else
3222	{
3223	pDXDevice->cbStagingBuffer = 0;
3224	rc = VERR_NO_MEMORY;
3225	}
3226
3227	return rc;
3228	}
3229	#endif
3230
3231
3232	static DECLCALLBACK(int) vmsvga3dBackInit(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC)
3233	{
3234	RT_NOREF(pDevIns, pThis);
3235
3236	int rc;
3237	#ifdef RT_OS_LINUX /** @todo Remove, this is currently needed for loading the X11 library in order to call XInitThreads(). */
3238	rc = glLdrInit(pDevIns);
3239	if (RT_FAILURE(rc))
3240	{
3241	LogRel(("VMSVGA3d: Error loading OpenGL library and resolving necessary functions: %Rrc\n", rc));
3242	return rc;
3243	}
3244	#endif
3245
3246	PVMSVGA3DBACKEND pBackend = (PVMSVGA3DBACKEND)RTMemAllocZ(sizeof(VMSVGA3DBACKEND));
3247	AssertReturn(pBackend, VERR_NO_MEMORY);
3248	pThisCC->svga.p3dState->pBackend = pBackend;
3249
3250	rc = RTLdrLoadSystem(VBOX_D3D11_LIBRARY_NAME, /* fNoUnload = */ true, &pBackend->hD3D11);
3251	AssertRC(rc);
3252	if (RT_SUCCESS(rc))
3253	{
3254	rc = RTLdrGetSymbol(pBackend->hD3D11, "D3D11CreateDevice", (void **)&pBackend->pfnD3D11CreateDevice);
3255	AssertRC(rc);
3256	}
3257
3258	if (RT_SUCCESS(rc))
3259	{
3260	/* Failure to load the shader disassembler is ignored. */
3261	int rc2 = RTLdrLoadSystem("D3DCompiler_47", /* fNoUnload = */ true, &pBackend->hD3DCompiler);
3262	if (RT_SUCCESS(rc2))
3263	rc2 = RTLdrGetSymbol(pBackend->hD3DCompiler, "D3DDisassemble", (void **)&pBackend->pfnD3DDisassemble);
3264	Log6Func(("Load D3DDisassemble: %Rrc\n", rc2));
3265	}
3266
3267	vmsvga3dDXInitContextMobData(&pBackend->svgaDXContext);
3268	//DEBUG_BREAKPOINT_TEST();
3269	return rc;
3270	}
3271
3272
3273	static DECLCALLBACK(int) vmsvga3dBackPowerOn(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC)
3274	{
3275	RT_NOREF(pDevIns, pThis);
3276
3277	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3278	AssertReturn(pState, VERR_INVALID_STATE);
3279
3280	PVMSVGA3DBACKEND pBackend = pState->pBackend;
3281	AssertReturn(pBackend, VERR_INVALID_STATE);
3282
3283	int rc = dxDeviceCreate(pBackend, &pBackend->dxDevice);
3284	if (RT_SUCCESS(rc))
3285	{
3286	IDXGIAdapter *pAdapter = NULL;
3287	HRESULT hr = pBackend->dxDevice.pDxgiFactory->EnumAdapters(0, &pAdapter);
3288	if (SUCCEEDED(hr))
3289	{
3290	DXGI_ADAPTER_DESC desc;
3291	hr = pAdapter->GetDesc(&desc);
3292	if (SUCCEEDED(hr))
3293	{
3294	pBackend->VendorId = desc.VendorId;
3295	pBackend->DeviceId = desc.DeviceId;
3296
3297	char sz[RT_ELEMENTS(desc.Description)];
3298	for (unsigned i = 0; i < RT_ELEMENTS(desc.Description); ++i)
3299	sz[i] = (char)desc.Description[i];
3300	LogRelMax(1, ("VMSVGA: Adapter %04x:%04x [%s]\n", pBackend->VendorId, pBackend->DeviceId, sz));
3301	}
3302
3303	pAdapter->Release();
3304	}
3305
3306	if (pBackend->dxDevice.pVideoDevice)
3307	dxLogRelVideoCaps(pBackend->dxDevice.pVideoDevice);
3308
3309	if (!pThis->svga.fVMSVGA3dMSAA)
3310	pBackend->dxDevice.MultisampleCountMask = 0;
3311	}
3312	return rc;
3313	}
3314
3315
3316	static DECLCALLBACK(int) vmsvga3dBackReset(PVGASTATECC pThisCC)
3317	{
3318	RT_NOREF(pThisCC);
3319	return VINF_SUCCESS;
3320	}
3321
3322
3323	static DECLCALLBACK(int) vmsvga3dBackTerminate(PVGASTATECC pThisCC)
3324	{
3325	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3326	AssertReturn(pState, VERR_INVALID_STATE);
3327
3328	if (pState->pBackend)
3329	dxDeviceDestroy(pState->pBackend, &pState->pBackend->dxDevice);
3330
3331	return VINF_SUCCESS;
3332	}
3333
3334
3335	/** @todo Such structures must be in VBoxVideo3D.h */
3336	typedef struct VBOX3DNOTIFYDEFINESCREEN
3337	{
3338	VBOX3DNOTIFY Core;
3339	uint32_t cWidth;
3340	uint32_t cHeight;
3341	int32_t xRoot;
3342	int32_t yRoot;
3343	uint32_t fPrimary;
3344	uint32_t cDpi;
3345	} VBOX3DNOTIFYDEFINESCREEN;
3346
3347
3348	static int vmsvga3dDrvNotifyDefineScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
3349	{
3350	VBOX3DNOTIFYDEFINESCREEN n;
3351	n.Core.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_CREATED;
3352	n.Core.iDisplay = pScreen->idScreen;
3353	n.Core.u32Reserved = 0;
3354	n.Core.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
3355	RT_ZERO(n.Core.au8Data);
3356	n.cWidth = pScreen->cWidth;
3357	n.cHeight = pScreen->cHeight;
3358	n.xRoot = pScreen->xOrigin;
3359	n.yRoot = pScreen->yOrigin;
3360	n.fPrimary = RT_BOOL(pScreen->fuScreen & SVGA_SCREEN_IS_PRIMARY);
3361	n.cDpi = pScreen->cDpi;
3362
3363	return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n.Core);
3364	}
3365
3366
3367	static int vmsvga3dDrvNotifyDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
3368	{
3369	VBOX3DNOTIFY n;
3370	n.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_DESTROYED;
3371	n.iDisplay = pScreen->idScreen;
3372	n.u32Reserved = 0;
3373	n.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
3374	RT_ZERO(n.au8Data);
3375
3376	return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n);
3377	}
3378
3379
3380	static int vmsvga3dDrvNotifyBindSurface(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, HANDLE hSharedSurface)
3381	{
3382	VBOX3DNOTIFY n;
3383	n.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_BIND_SURFACE;
3384	n.iDisplay = pScreen->idScreen;
3385	n.u32Reserved = 0;
3386	n.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
3387	(uint64_t )&n.au8Data[0] = (uint64_t)hSharedSurface;
3388
3389	return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n);
3390	}
3391
3392
3393	typedef struct VBOX3DNOTIFYUPDATE
3394	{
3395	VBOX3DNOTIFY Core;
3396	uint32_t x;
3397	uint32_t y;
3398	uint32_t w;
3399	uint32_t h;
3400	} VBOX3DNOTIFYUPDATE;
3401
3402
3403	static int vmsvga3dDrvNotifyUpdate(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen,
3404	uint32_t x, uint32_t y, uint32_t w, uint32_t h)
3405	{
3406	VBOX3DNOTIFYUPDATE n;
3407	n.Core.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_UPDATE_END;
3408	n.Core.iDisplay = pScreen->idScreen;
3409	n.Core.u32Reserved = 0;
3410	n.Core.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
3411	RT_ZERO(n.Core.au8Data);
3412	n.x = x;
3413	n.y = y;
3414	n.w = w;
3415	n.h = h;
3416
3417	return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n.Core);
3418	}
3419
3420	static int vmsvga3dHwScreenCreate(PVMSVGA3DSTATE pState, uint32_t cWidth, uint32_t cHeight, VMSVGAHWSCREEN *p)
3421	{
3422	PVMSVGA3DBACKEND pBackend = pState->pBackend;
3423
3424	DXDEVICE *pDXDevice = &pBackend->dxDevice;
3425	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
3426
3427	D3D11_TEXTURE2D_DESC td;
3428	RT_ZERO(td);
3429	td.Width = cWidth;
3430	td.Height = cHeight;
3431	td.MipLevels = 1;
3432	td.ArraySize = 1;
3433	td.Format = DXGI_FORMAT_B8G8R8A8_UNORM;
3434	td.SampleDesc.Count = 1;
3435	td.SampleDesc.Quality = 0;
3436	td.Usage = D3D11_USAGE_DEFAULT;
3437	td.BindFlags = D3D11_BIND_RENDER_TARGET \| D3D11_BIND_SHADER_RESOURCE;
3438	td.CPUAccessFlags = 0;
3439	td.MiscFlags = D3D11_RESOURCE_MISC_SHARED_KEYEDMUTEX;
3440
3441	HRESULT hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &p->pTexture);
3442	if (SUCCEEDED(hr))
3443	{
3444	/* Get the shared handle. */
3445	hr = p->pTexture->QueryInterface(__uuidof(IDXGIResource), (void**)&p->pDxgiResource);
3446	if (SUCCEEDED(hr))
3447	{
3448	hr = p->pDxgiResource->GetSharedHandle(&p->SharedHandle);
3449	if (SUCCEEDED(hr))
3450	hr = p->pTexture->QueryInterface(__uuidof(IDXGIKeyedMutex), (void**)&p->pDXGIKeyedMutex);
3451	}
3452	}
3453
3454	if (SUCCEEDED(hr))
3455	return VINF_SUCCESS;
3456
3457	AssertFailed();
3458	return VERR_NOT_SUPPORTED;
3459	}
3460
3461
3462	static void vmsvga3dHwScreenDestroy(PVMSVGA3DSTATE pState, VMSVGAHWSCREEN *p)
3463	{
3464	RT_NOREF(pState);
3465	D3D_RELEASE(p->pDXGIKeyedMutex);
3466	D3D_RELEASE(p->pDxgiResource);
3467	D3D_RELEASE(p->pTexture);
3468	p->SharedHandle = 0;
3469	p->sidScreenTarget = SVGA_ID_INVALID;
3470	}
3471
3472
3473	static DECLCALLBACK(int) vmsvga3dBackDefineScreen(PVGASTATE pThis, PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
3474	{
3475	RT_NOREF(pThis, pThisCC, pScreen);
3476
3477	LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: screen %u\n", pScreen->idScreen));
3478
3479	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3480	AssertReturn(pState, VERR_INVALID_STATE);
3481
3482	PVMSVGA3DBACKEND pBackend = pState->pBackend;
3483	AssertReturn(pBackend, VERR_INVALID_STATE);
3484
3485	Assert(pScreen->pHwScreen == NULL);
3486
3487	VMSVGAHWSCREEN p = (VMSVGAHWSCREEN )RTMemAllocZ(sizeof(VMSVGAHWSCREEN));
3488	AssertPtrReturn(p, VERR_NO_MEMORY);
3489
3490	p->sidScreenTarget = SVGA_ID_INVALID;
3491
3492	int rc = vmsvga3dDrvNotifyDefineScreen(pThisCC, pScreen);
3493	if (RT_SUCCESS(rc))
3494	{
3495	/* The frontend supports the screen. Create the actual resource. */
3496	rc = vmsvga3dHwScreenCreate(pState, pScreen->cWidth, pScreen->cHeight, p);
3497	if (RT_SUCCESS(rc))
3498	LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: created\n"));
3499	}
3500
3501	if (RT_SUCCESS(rc))
3502	{
3503	LogRel(("VMSVGA: Using HW accelerated screen %u\n", pScreen->idScreen));
3504	pScreen->pHwScreen = p;
3505	}
3506	else
3507	{
3508	LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: %Rrc\n", rc));
3509	vmsvga3dHwScreenDestroy(pState, p);
3510	RTMemFree(p);
3511	}
3512
3513	return rc;
3514	}
3515
3516
3517	static DECLCALLBACK(int) vmsvga3dBackDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
3518	{
3519	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3520	AssertReturn(pState, VERR_INVALID_STATE);
3521
3522	vmsvga3dDrvNotifyDestroyScreen(pThisCC, pScreen);
3523
3524	if (pScreen->pHwScreen)
3525	{
3526	vmsvga3dHwScreenDestroy(pState, pScreen->pHwScreen);
3527	RTMemFree(pScreen->pHwScreen);
3528	pScreen->pHwScreen = NULL;
3529	}
3530
3531	return VINF_SUCCESS;
3532	}
3533
3534
3535	static DECLCALLBACK(int) vmsvga3dBackSurfaceBlitToScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen,
3536	SVGASignedRect destRect, SVGA3dSurfaceImageId srcImage,
3537	SVGASignedRect srcRect, uint32_t cRects, SVGASignedRect *paRects)
3538	{
3539	RT_NOREF(pThisCC, pScreen, destRect, srcImage, srcRect, cRects, paRects);
3540
3541	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3542	AssertReturn(pState, VERR_INVALID_STATE);
3543
3544	PVMSVGA3DBACKEND pBackend = pState->pBackend;
3545	AssertReturn(pBackend, VERR_INVALID_STATE);
3546
3547	VMSVGAHWSCREEN *p = pScreen->pHwScreen;
3548	AssertReturn(p, VERR_NOT_SUPPORTED);
3549
3550	PVMSVGA3DSURFACE pSurface;
3551	int rc = vmsvga3dSurfaceFromSid(pState, srcImage.sid, &pSurface);
3552	AssertRCReturn(rc, rc);
3553
3554	/** @todo Implement. */
3555	AssertFailed();
3556	return VERR_NOT_IMPLEMENTED;
3557	}
3558
3559
3560	static DECLCALLBACK(int) vmsvga3dBackSurfaceMap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const pImage, SVGA3dBox const pBox,
3561	VMSVGA3D_SURFACE_MAP enmMapType, VMSVGA3D_MAPPED_SURFACE *pMap)
3562	{
3563	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3564	AssertReturn(pState, VERR_INVALID_STATE);
3565
3566	PVMSVGA3DBACKEND pBackend = pState->pBackend;
3567	AssertReturn(pBackend, VERR_INVALID_STATE);
3568
3569	PVMSVGA3DSURFACE pSurface;
3570	int rc = vmsvga3dSurfaceFromSid(pState, pImage->sid, &pSurface);
3571	AssertRCReturn(rc, rc);
3572
3573	PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
3574	AssertPtrReturn(pBackendSurface, VERR_INVALID_STATE);
3575
3576	PVMSVGA3DMIPMAPLEVEL pMipLevel;
3577	rc = vmsvga3dMipmapLevel(pSurface, pImage->face, pImage->mipmap, &pMipLevel);
3578	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
3579
3580	DXDEVICE *pDevice = &pBackend->dxDevice;
3581	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3582
3583	SVGA3dBox clipBox;
3584	if (pBox)
3585	{
3586	clipBox = *pBox;
3587	vmsvgaR3ClipBox(&pMipLevel->mipmapSize, &clipBox);
3588	ASSERT_GUEST_RETURN(clipBox.w && clipBox.h && clipBox.d, VERR_INVALID_PARAMETER);
3589	}
3590	else
3591	{
3592	clipBox.x = 0;
3593	clipBox.y = 0;
3594	clipBox.z = 0;
3595	clipBox.w = pMipLevel->mipmapSize.width;
3596	clipBox.h = pMipLevel->mipmapSize.height;
3597	clipBox.d = pMipLevel->mipmapSize.depth;
3598	}
3599
3600	D3D11_MAP d3d11MapType;
3601	switch (enmMapType)
3602	{
3603	case VMSVGA3D_SURFACE_MAP_READ: d3d11MapType = D3D11_MAP_READ; break;
3604	case VMSVGA3D_SURFACE_MAP_WRITE: d3d11MapType = D3D11_MAP_WRITE; break;
3605	case VMSVGA3D_SURFACE_MAP_READ_WRITE: d3d11MapType = D3D11_MAP_READ_WRITE; break;
3606	case VMSVGA3D_SURFACE_MAP_WRITE_DISCARD: d3d11MapType = D3D11_MAP_WRITE_DISCARD; break;
3607	default:
3608	AssertFailed();
3609	return VERR_INVALID_PARAMETER;
3610	}
3611
3612	D3D11_MAPPED_SUBRESOURCE mappedResource;
3613	RT_ZERO(mappedResource);
3614
3615	if ( pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_1D
3616	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_2D
3617	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_CUBE
3618	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
3619	{
3620	ID3D11Resource *pMappedResource;
3621	if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
3622	{
3623	pMappedResource = pBackendSurface->staging.pResource;
3624
3625	/* Copy the texture content to the staging texture.
3626	* The requested miplevel of the texture is copied to the miplevel 0 of the staging texture,
3627	* because the staging (and dynamic) structures do not have miplevels.
3628	* Always copy entire miplevel so all Dst are zero and pSrcBox is NULL, as D3D11 requires.
3629	*/
3630	ID3D11Resource *pDstResource = pMappedResource;
3631	UINT DstSubresource = 0;
3632	UINT DstX = 0;
3633	UINT DstY = 0;
3634	UINT DstZ = 0;
3635	ID3D11Resource *pSrcResource = pBackendSurface->u.pResource;
3636	UINT SrcSubresource = D3D11CalcSubresource(pImage->mipmap, pImage->face, pSurface->cLevels);
3637	D3D11_BOX *pSrcBox = NULL;
3638	//D3D11_BOX SrcBox;
3639	//SrcBox.left = 0;
3640	//SrcBox.top = 0;
3641	//SrcBox.front = 0;
3642	//SrcBox.right = pMipLevel->mipmapSize.width;
3643	//SrcBox.bottom = pMipLevel->mipmapSize.height;
3644	//SrcBox.back = pMipLevel->mipmapSize.depth;
3645	pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3646	pSrcResource, SrcSubresource, pSrcBox);
3647	}
3648	else if (enmMapType == VMSVGA3D_SURFACE_MAP_WRITE)
3649	pMappedResource = pBackendSurface->staging.pResource;
3650	else
3651	pMappedResource = pBackendSurface->dynamic.pResource;
3652
3653	UINT const Subresource = 0; /* Dynamic or staging textures have one subresource. */
3654	HRESULT hr = pDevice->pImmediateContext->Map(pMappedResource, Subresource,
3655	d3d11MapType, /* MapFlags = */ 0, &mappedResource);
3656	if (SUCCEEDED(hr))
3657	vmsvga3dSurfaceMapInit(pMap, enmMapType, &clipBox, pSurface,
3658	mappedResource.pData, mappedResource.RowPitch, mappedResource.DepthPitch);
3659	else
3660	AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
3661	}
3662	else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
3663	{
3664	#ifdef DX_COMMON_STAGING_BUFFER
3665	/* Map the staging buffer. */
3666	rc = dxStagingBufferRealloc(pDevice, pMipLevel->cbSurface);
3667	if (RT_SUCCESS(rc))
3668	{
3669	/* The staging buffer does not allow D3D11_MAP_WRITE_DISCARD, so replace it. */
3670	if (d3d11MapType == D3D11_MAP_WRITE_DISCARD)
3671	d3d11MapType = D3D11_MAP_WRITE;
3672
3673	if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
3674	{
3675	/* Copy from the buffer to the staging buffer. */
3676	ID3D11Resource *pDstResource = pDevice->pStagingBuffer;
3677	UINT DstSubresource = 0;
3678	UINT DstX = clipBox.x;
3679	UINT DstY = clipBox.y;
3680	UINT DstZ = clipBox.z;
3681	ID3D11Resource *pSrcResource = pBackendSurface->u.pResource;
3682	UINT SrcSubresource = 0;
3683	D3D11_BOX SrcBox;
3684	SrcBox.left = clipBox.x;
3685	SrcBox.top = clipBox.y;
3686	SrcBox.front = clipBox.z;
3687	SrcBox.right = clipBox.w;
3688	SrcBox.bottom = clipBox.h;
3689	SrcBox.back = clipBox.d;
3690	pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3691	pSrcResource, SrcSubresource, &SrcBox);
3692	}
3693
3694	UINT const Subresource = 0; /* Buffers have only one subresource. */
3695	HRESULT hr = pDevice->pImmediateContext->Map(pDevice->pStagingBuffer, Subresource,
3696	d3d11MapType, /* MapFlags = */ 0, &mappedResource);
3697	if (SUCCEEDED(hr))
3698	vmsvga3dSurfaceMapInit(pMap, enmMapType, &clipBox, pSurface,
3699	mappedResource.pData, mappedResource.RowPitch, mappedResource.DepthPitch);
3700	else
3701	AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
3702	}
3703	#else
3704	ID3D11Resource *pMappedResource;
3705	if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
3706	{
3707	pMappedResource = pBackendSurface->staging.pResource;
3708
3709	/* Copy the resource content to the staging resource. */
3710	ID3D11Resource *pDstResource = pMappedResource;
3711	UINT DstSubresource = 0;
3712	UINT DstX = clipBox.x;
3713	UINT DstY = clipBox.y;
3714	UINT DstZ = clipBox.z;
3715	ID3D11Resource *pSrcResource = pBackendSurface->u.pResource;
3716	UINT SrcSubresource = 0;
3717	D3D11_BOX SrcBox;
3718	SrcBox.left = clipBox.x;
3719	SrcBox.top = clipBox.y;
3720	SrcBox.front = clipBox.z;
3721	SrcBox.right = clipBox.w;
3722	SrcBox.bottom = clipBox.h;
3723	SrcBox.back = clipBox.d;
3724	pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3725	pSrcResource, SrcSubresource, &SrcBox);
3726	}
3727	else if (enmMapType == VMSVGA3D_SURFACE_MAP_WRITE)
3728	pMappedResource = pBackendSurface->staging.pResource;
3729	else
3730	pMappedResource = pBackendSurface->dynamic.pResource;
3731
3732	UINT const Subresource = 0; /* Dynamic or staging textures have one subresource. */
3733	HRESULT hr = pDevice->pImmediateContext->Map(pMappedResource, Subresource,
3734	d3d11MapType, /* MapFlags = */ 0, &mappedResource);
3735	if (SUCCEEDED(hr))
3736	vmsvga3dSurfaceMapInit(pMap, enmMapType, &clipBox, pSurface,
3737	mappedResource.pData, mappedResource.RowPitch, mappedResource.DepthPitch);
3738	else
3739	AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
3740	#endif
3741	}
3742	else
3743	{
3744	// UINT D3D11CalcSubresource(UINT MipSlice, UINT ArraySlice, UINT MipLevels);
3745	/** @todo Implement. */
3746	AssertFailed();
3747	rc = VERR_NOT_IMPLEMENTED;
3748	}
3749
3750	return rc;
3751	}
3752
3753
3754	static DECLCALLBACK(int) vmsvga3dBackSurfaceUnmap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const pImage, VMSVGA3D_MAPPED_SURFACE pMap, bool fWritten)
3755	{
3756	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3757	AssertReturn(pState, VERR_INVALID_STATE);
3758
3759	PVMSVGA3DBACKEND pBackend = pState->pBackend;
3760	AssertReturn(pBackend, VERR_INVALID_STATE);
3761
3762	PVMSVGA3DSURFACE pSurface;
3763	int rc = vmsvga3dSurfaceFromSid(pState, pImage->sid, &pSurface);
3764	AssertRCReturn(rc, rc);
3765
3766	/* The called should not use the function for system memory surfaces. */
3767	PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
3768	AssertReturn(pBackendSurface, VERR_INVALID_PARAMETER);
3769
3770	PVMSVGA3DMIPMAPLEVEL pMipLevel;
3771	rc = vmsvga3dMipmapLevel(pSurface, pImage->face, pImage->mipmap, &pMipLevel);
3772	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
3773
3774	DXDEVICE *pDevice = &pBackend->dxDevice;
3775	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3776
3777	if ( pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_1D
3778	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_2D
3779	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_CUBE
3780	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
3781	{
3782	ID3D11Resource *pMappedResource;
3783	if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ)
3784	pMappedResource = pBackendSurface->staging.pResource;
3785	else if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE)
3786	pMappedResource = pBackendSurface->staging.pResource;
3787	else
3788	pMappedResource = pBackendSurface->dynamic.pResource;
3789
3790	UINT const Subresource = 0; /* Staging or dynamic textures have one subresource. */
3791	pDevice->pImmediateContext->Unmap(pMappedResource, Subresource);
3792
3793	if ( fWritten
3794	&& ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
3795	\|\| pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
3796	\|\| pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
3797	{
3798	/* If entire resource must be copied then use pSrcBox = NULL and dst point (0,0,0)
3799	* Because DX11 insists on this for some resource types, for example DEPTH_STENCIL resources.
3800	*/
3801	uint32_t const cWidth0 = pSurface->paMipmapLevels[0].mipmapSize.width;
3802	uint32_t const cHeight0 = pSurface->paMipmapLevels[0].mipmapSize.height;
3803	uint32_t const cDepth0 = pSurface->paMipmapLevels[0].mipmapSize.depth;
3804	/** @todo Entire subresource is always mapped. So find a way to copy it back, important for DEPTH_STENCIL mipmaps. */
3805	bool const fEntireResource = pMap->box.x == 0 && pMap->box.y == 0 && pMap->box.z == 0
3806	&& pMap->box.w == cWidth0 && pMap->box.h == cHeight0 && pMap->box.d == cDepth0;
3807
3808	ID3D11Resource *pDstResource = pBackendSurface->u.pResource;
3809	UINT DstSubresource = D3D11CalcSubresource(pImage->mipmap, pImage->face, pSurface->cLevels);
3810	UINT DstX = (pMap->box.x / pSurface->cxBlock) * pSurface->cxBlock;
3811	UINT DstY = (pMap->box.y / pSurface->cyBlock) * pSurface->cyBlock;
3812	UINT DstZ = pMap->box.z;
3813	ID3D11Resource *pSrcResource = pMappedResource;
3814	UINT SrcSubresource = Subresource;
3815	D3D11_BOX *pSrcBox;
3816	D3D11_BOX SrcBox;
3817	if (fEntireResource)
3818	pSrcBox = NULL;
3819	else
3820	{
3821	uint32_t const cxBlocks = (pMap->box.w + pSurface->cxBlock - 1) / pSurface->cxBlock;
3822	uint32_t const cyBlocks = (pMap->box.h + pSurface->cyBlock - 1) / pSurface->cyBlock;
3823
3824	SrcBox.left = DstX;
3825	SrcBox.top = DstY;
3826	SrcBox.front = DstZ;
3827	SrcBox.right = DstX + cxBlocks * pSurface->cxBlock;
3828	SrcBox.bottom = DstY + cyBlocks * pSurface->cyBlock;
3829	SrcBox.back = DstZ + pMap->box.d;
3830	pSrcBox = &SrcBox;
3831	}
3832
3833	pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3834	pSrcResource, SrcSubresource, pSrcBox);
3835	}
3836	}
3837	else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
3838	{
3839	Log4(("Unmap buffer sid = %u:\n%.*Rhxd\n", pSurface->id, pMap->cbRow, pMap->pvData));
3840
3841	#ifdef DX_COMMON_STAGING_BUFFER
3842	/* Unmap the staging buffer. */
3843	UINT const Subresource = 0; /* Buffers have only one subresource. */
3844	pDevice->pImmediateContext->Unmap(pDevice->pStagingBuffer, Subresource);
3845
3846	/* Copy from the staging buffer to the actual buffer */
3847	if ( fWritten
3848	&& ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
3849	\|\| pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
3850	\|\| pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
3851	{
3852	ID3D11Resource *pDstResource = pBackendSurface->u.pResource;
3853	UINT DstSubresource = 0;
3854	UINT DstX = (pMap->box.x / pSurface->cxBlock) * pSurface->cxBlock;
3855	UINT DstY = (pMap->box.y / pSurface->cyBlock) * pSurface->cyBlock;
3856	UINT DstZ = pMap->box.z;
3857	ID3D11Resource *pSrcResource = pDevice->pStagingBuffer;
3858	UINT SrcSubresource = 0;
3859	D3D11_BOX SrcBox;
3860
3861	uint32_t const cxBlocks = (pMap->box.w + pSurface->cxBlock - 1) / pSurface->cxBlock;
3862	uint32_t const cyBlocks = (pMap->box.h + pSurface->cyBlock - 1) / pSurface->cyBlock;
3863
3864	SrcBox.left = DstX;
3865	SrcBox.top = DstY;
3866	SrcBox.front = DstZ;
3867	SrcBox.right = DstX + cxBlocks * pSurface->cxBlock;
3868	SrcBox.bottom = DstY + cyBlocks * pSurface->cyBlock;
3869	SrcBox.back = DstZ + pMap->box.d;
3870
3871	pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3872	pSrcResource, SrcSubresource, &SrcBox);
3873	}
3874	#else
3875	ID3D11Resource *pMappedResource;
3876	if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ)
3877	pMappedResource = pBackendSurface->staging.pResource;
3878	else if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE)
3879	pMappedResource = pBackendSurface->staging.pResource;
3880	else
3881	pMappedResource = pBackendSurface->dynamic.pResource;
3882
3883	UINT const Subresource = 0; /* Staging or dynamic textures have one subresource. */
3884	pDevice->pImmediateContext->Unmap(pMappedResource, Subresource);
3885
3886	if ( fWritten
3887	&& ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
3888	\|\| pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
3889	\|\| pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
3890	{
3891	ID3D11Resource *pDstResource = pBackendSurface->u.pResource;
3892	UINT DstSubresource = 0;
3893	UINT DstX = pMap->box.x;
3894	UINT DstY = pMap->box.y;
3895	UINT DstZ = pMap->box.z;
3896	ID3D11Resource *pSrcResource = pMappedResource;
3897	UINT SrcSubresource = 0;
3898	D3D11_BOX SrcBox;
3899	SrcBox.left = DstX;
3900	SrcBox.top = DstY;
3901	SrcBox.front = DstZ;
3902	SrcBox.right = DstX + pMap->box.w;
3903	SrcBox.bottom = DstY + pMap->box.h;
3904	SrcBox.back = DstZ + pMap->box.d;
3905	pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3906	pSrcResource, SrcSubresource, &SrcBox);
3907	}
3908	#endif
3909	}
3910	else
3911	{
3912	AssertFailed();
3913	rc = VERR_NOT_IMPLEMENTED;
3914	}
3915
3916	return rc;
3917	}
3918
3919
3920	static DECLCALLBACK(int) vmsvga3dScreenTargetBind(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, uint32_t sid)
3921	{
3922	int rc = VINF_SUCCESS;
3923
3924	PVMSVGA3DSURFACE pSurface;
3925	if (sid != SVGA_ID_INVALID)
3926	{
3927	/* Create the surface if does not yet exist. */
3928	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3929	AssertReturn(pState, VERR_INVALID_STATE);
3930
3931	rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
3932	AssertRCReturn(rc, rc);
3933
3934	if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
3935	{
3936	/* Create the actual texture. */
3937	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pSurface);
3938	AssertRCReturn(rc, rc);
3939	}
3940	}
3941	else
3942	pSurface = NULL;
3943
3944	/* Notify the HW accelerated screen if it is used. */
3945	VMSVGAHWSCREEN *pHwScreen = pScreen->pHwScreen;
3946	if (!pHwScreen)
3947	return VINF_SUCCESS;
3948
3949	/* Same surface -> do nothing. */
3950	if (pHwScreen->sidScreenTarget == sid)
3951	return VINF_SUCCESS;
3952
3953	if (sid != SVGA_ID_INVALID)
3954	{
3955	AssertReturn( pSurface->pBackendSurface
3956	&& pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_2D
3957	&& RT_BOOL(pSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET), VERR_INVALID_PARAMETER);
3958
3959	HANDLE const hSharedSurface = pHwScreen->SharedHandle;
3960	rc = vmsvga3dDrvNotifyBindSurface(pThisCC, pScreen, hSharedSurface);
3961	}
3962
3963	if (RT_SUCCESS(rc))
3964	{
3965	pHwScreen->sidScreenTarget = sid;
3966	}
3967
3968	return rc;
3969	}
3970
3971
3972	static DECLCALLBACK(int) vmsvga3dScreenTargetUpdate(PVGASTATECC pThisCC, VMSVGASCREENOBJECT pScreen, SVGA3dRect const pRect)
3973	{
3974	VMSVGAHWSCREEN *pHwScreen = pScreen->pHwScreen;
3975	AssertReturn(pHwScreen, VERR_NOT_SUPPORTED);
3976
3977	if (pHwScreen->sidScreenTarget == SVGA_ID_INVALID)
3978	return VINF_SUCCESS; /* No surface bound. */
3979
3980	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3981	AssertReturn(pState, VERR_INVALID_STATE);
3982
3983	PVMSVGA3DBACKEND pBackend = pState->pBackend;
3984	AssertReturn(pBackend, VERR_INVALID_STATE);
3985
3986	PVMSVGA3DSURFACE pSurface;
3987	int rc = vmsvga3dSurfaceFromSid(pState, pHwScreen->sidScreenTarget, &pSurface);
3988	AssertRCReturn(rc, rc);
3989
3990	PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
3991	AssertReturn( pBackendSurface
3992	&& pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_2D
3993	&& RT_BOOL(pSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET),
3994	VERR_INVALID_PARAMETER);
3995
3996	SVGA3dRect boundRect;
3997	boundRect.x = 0;
3998	boundRect.y = 0;
3999	boundRect.w = pSurface->paMipmapLevels[0].mipmapSize.width;
4000	boundRect.h = pSurface->paMipmapLevels[0].mipmapSize.height;
4001	SVGA3dRect clipRect = *pRect;
4002	vmsvgaR3Clip3dRect(&boundRect, &clipRect);
4003	ASSERT_GUEST_RETURN(clipRect.w && clipRect.h, VERR_INVALID_PARAMETER);
4004
4005	/* Copy the screen texture to the shared surface. */
4006	DWORD result = pHwScreen->pDXGIKeyedMutex->AcquireSync(0, 10000);
4007	if (result == S_OK)
4008	{
4009	pBackend->dxDevice.pImmediateContext->CopyResource(pHwScreen->pTexture, pBackendSurface->u.pTexture2D);
4010
4011	dxDeviceFlush(&pBackend->dxDevice);
4012
4013	result = pHwScreen->pDXGIKeyedMutex->ReleaseSync(1);
4014	}
4015	else
4016	AssertFailed();
4017
4018	rc = vmsvga3dDrvNotifyUpdate(pThisCC, pScreen, pRect->x, pRect->y, pRect->w, pRect->h);
4019	return rc;
4020	}
4021
4022
4023	/*
4024	*
4025	* 3D interface.
4026	*
4027	*/
4028
4029	static DECLCALLBACK(int) vmsvga3dBackQueryCaps(PVGASTATECC pThisCC, SVGA3dDevCapIndex idx3dCaps, uint32_t *pu32Val)
4030	{
4031	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4032	AssertReturn(pState, VERR_INVALID_STATE);
4033
4034	int rc = VINF_SUCCESS;
4035
4036	*pu32Val = 0;
4037
4038	if (idx3dCaps > SVGA3D_DEVCAP_MAX)
4039	{
4040	LogRelMax(16, ("VMSVGA: unsupported SVGA3D_DEVCAP %d\n", idx3dCaps));
4041	return VERR_NOT_SUPPORTED;
4042	}
4043
4044	D3D_FEATURE_LEVEL const FeatureLevel = pState->pBackend->dxDevice.FeatureLevel;
4045
4046	/* Most values are taken from:
4047	* https://docs.microsoft.com/en-us/windows/win32/direct3d11/overviews-direct3d-11-devices-downlevel-intro
4048	*
4049	* Shader values are from
4050	* https://docs.microsoft.com/en-us/windows/win32/direct3dhlsl/dx-graphics-hlsl-models
4051	*/
4052
4053	switch (idx3dCaps)
4054	{
4055	case SVGA3D_DEVCAP_3D:
4056	*pu32Val = VBSVGA3D_CAP_3D;
4057	if (pState->pBackend->dxDevice.pVideoDevice)
4058	*pu32Val \|= VBSVGA3D_CAP_VIDEO;
4059	*pu32Val \|= VBSVGA3D_CAP_RASTERIZER_STATE_V2;
4060	break;
4061
4062	case SVGA3D_DEVCAP_MAX_LIGHTS:
4063	pu32Val = SVGA3D_NUM_LIGHTS; / VGPU9. Not applicable to DX11. */
4064	break;
4065
4066	case SVGA3D_DEVCAP_MAX_TEXTURES:
4067	pu32Val = SVGA3D_NUM_TEXTURE_UNITS; / VGPU9. Not applicable to DX11. */
4068	break;
4069
4070	case SVGA3D_DEVCAP_MAX_CLIP_PLANES:
4071	*pu32Val = SVGA3D_NUM_CLIPPLANES;
4072	break;
4073
4074	case SVGA3D_DEVCAP_VERTEX_SHADER_VERSION:
4075	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4076	*pu32Val = SVGA3DVSVERSION_40;
4077	else
4078	*pu32Val = SVGA3DVSVERSION_30;
4079	break;
4080
4081	case SVGA3D_DEVCAP_VERTEX_SHADER:
4082	*pu32Val = 1;
4083	break;
4084
4085	case SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION:
4086	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4087	*pu32Val = SVGA3DPSVERSION_40;
4088	else
4089	*pu32Val = SVGA3DPSVERSION_30;
4090	break;
4091
4092	case SVGA3D_DEVCAP_FRAGMENT_SHADER:
4093	*pu32Val = 1;
4094	break;
4095
4096	case SVGA3D_DEVCAP_MAX_RENDER_TARGETS:
4097	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4098	*pu32Val = 8;
4099	else
4100	*pu32Val = 4;
4101	break;
4102
4103	case SVGA3D_DEVCAP_S23E8_TEXTURES:
4104	case SVGA3D_DEVCAP_S10E5_TEXTURES:
4105	/* Must be obsolete by now; surface format caps specify the same thing. */
4106	break;
4107
4108	case SVGA3D_DEVCAP_MAX_FIXED_VERTEXBLEND:
4109	/* Obsolete */
4110	break;
4111
4112	/*
4113	* 2. The BUFFER_FORMAT capabilities are deprecated, and they always
4114	* return TRUE. Even on physical hardware that does not support
4115	* these formats natively, the SVGA3D device will provide an emulation
4116	* which should be invisible to the guest OS.
4117	*/
4118	case SVGA3D_DEVCAP_D16_BUFFER_FORMAT:
4119	case SVGA3D_DEVCAP_D24S8_BUFFER_FORMAT:
4120	case SVGA3D_DEVCAP_D24X8_BUFFER_FORMAT:
4121	*pu32Val = 1;
4122	break;
4123
4124	case SVGA3D_DEVCAP_QUERY_TYPES:
4125	/* Obsolete */
4126	break;
4127
4128	case SVGA3D_DEVCAP_TEXTURE_GRADIENT_SAMPLING:
4129	/* Obsolete */
4130	break;
4131
4132	case SVGA3D_DEVCAP_MAX_POINT_SIZE:
4133	AssertCompile(sizeof(uint32_t) == sizeof(float));
4134	(float )pu32Val = 256.0f; /* VGPU9. Not applicable to DX11. */
4135	break;
4136
4137	case SVGA3D_DEVCAP_MAX_SHADER_TEXTURES:
4138	/* Obsolete */
4139	break;
4140
4141	case SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH:
4142	case SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT:
4143	if (FeatureLevel >= D3D_FEATURE_LEVEL_11_0)
4144	*pu32Val = 16384;
4145	else if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4146	*pu32Val = 8192;
4147	else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
4148	*pu32Val = 4096;
4149	else
4150	*pu32Val = 2048;
4151	break;
4152
4153	case SVGA3D_DEVCAP_MAX_VOLUME_EXTENT:
4154	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4155	*pu32Val = 2048;
4156	else
4157	*pu32Val = 256;
4158	break;
4159
4160	case SVGA3D_DEVCAP_MAX_TEXTURE_REPEAT:
4161	if (FeatureLevel >= D3D_FEATURE_LEVEL_11_0)
4162	*pu32Val = 16384;
4163	else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
4164	*pu32Val = 8192;
4165	else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
4166	*pu32Val = 2048;
4167	else
4168	*pu32Val = 128;
4169	break;
4170
4171	case SVGA3D_DEVCAP_MAX_TEXTURE_ASPECT_RATIO:
4172	/* Obsolete */
4173	break;
4174
4175	case SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY:
4176	if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
4177	*pu32Val = D3D11_REQ_MAXANISOTROPY;
4178	else
4179	*pu32Val = 2; // D3D_FL9_1_DEFAULT_MAX_ANISOTROPY;
4180	break;
4181
4182	case SVGA3D_DEVCAP_MAX_PRIMITIVE_COUNT:
4183	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4184	*pu32Val = UINT32_MAX;
4185	else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
4186	*pu32Val = 1048575; // D3D_FL9_2_IA_PRIMITIVE_MAX_COUNT;
4187	else
4188	*pu32Val = 65535; // D3D_FL9_1_IA_PRIMITIVE_MAX_COUNT;
4189	break;
4190
4191	case SVGA3D_DEVCAP_MAX_VERTEX_INDEX:
4192	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4193	*pu32Val = UINT32_MAX;
4194	else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
4195	*pu32Val = 1048575;
4196	else
4197	*pu32Val = 65534;
4198	break;
4199
4200	case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS:
4201	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4202	*pu32Val = UINT32_MAX;
4203	else
4204	*pu32Val = 512;
4205	break;
4206
4207	case SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_INSTRUCTIONS:
4208	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4209	*pu32Val = UINT32_MAX;
4210	else
4211	*pu32Val = 512;
4212	break;
4213
4214	case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS:
4215	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4216	*pu32Val = 4096;
4217	else
4218	*pu32Val = 32;
4219	break;
4220
4221	case SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS:
4222	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4223	*pu32Val = 4096;
4224	else
4225	*pu32Val = 32;
4226	break;
4227
4228	case SVGA3D_DEVCAP_TEXTURE_OPS:
4229	/* Obsolete */
4230	break;
4231
4232	case SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8:
4233	case SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8:
4234	case SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10:
4235	case SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5:
4236	case SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5:
4237	case SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4:
4238	case SVGA3D_DEVCAP_SURFACEFMT_R5G6B5:
4239	case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16:
4240	case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8:
4241	case SVGA3D_DEVCAP_SURFACEFMT_ALPHA8:
4242	case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8:
4243	case SVGA3D_DEVCAP_SURFACEFMT_Z_D16:
4244	case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8:
4245	case SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8:
4246	case SVGA3D_DEVCAP_SURFACEFMT_DXT1:
4247	case SVGA3D_DEVCAP_SURFACEFMT_DXT2:
4248	case SVGA3D_DEVCAP_SURFACEFMT_DXT3:
4249	case SVGA3D_DEVCAP_SURFACEFMT_DXT4:
4250	case SVGA3D_DEVCAP_SURFACEFMT_DXT5:
4251	case SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8:
4252	case SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10:
4253	case SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8:
4254	case SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8:
4255	case SVGA3D_DEVCAP_SURFACEFMT_CxV8U8:
4256	case SVGA3D_DEVCAP_SURFACEFMT_R_S10E5:
4257	case SVGA3D_DEVCAP_SURFACEFMT_R_S23E8:
4258	case SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5:
4259	case SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8:
4260	case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5:
4261	case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8:
4262	case SVGA3D_DEVCAP_SURFACEFMT_V16U16:
4263	case SVGA3D_DEVCAP_SURFACEFMT_G16R16:
4264	case SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16:
4265	case SVGA3D_DEVCAP_SURFACEFMT_UYVY:
4266	case SVGA3D_DEVCAP_SURFACEFMT_YUY2:
4267	case SVGA3D_DEVCAP_SURFACEFMT_NV12:
4268	case SVGA3D_DEVCAP_DEAD10: /* SVGA3D_DEVCAP_SURFACEFMT_AYUV */
4269	case SVGA3D_DEVCAP_SURFACEFMT_Z_DF16:
4270	case SVGA3D_DEVCAP_SURFACEFMT_Z_DF24:
4271	case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT:
4272	case SVGA3D_DEVCAP_SURFACEFMT_ATI1:
4273	case SVGA3D_DEVCAP_SURFACEFMT_ATI2:
4274	case SVGA3D_DEVCAP_SURFACEFMT_YV12:
4275	{
4276	SVGA3dSurfaceFormat const enmFormat = vmsvgaDXDevCapSurfaceFmt2Format(idx3dCaps);
4277	rc = vmsvgaDXCheckFormatSupportPreDX(pState, enmFormat, pu32Val);
4278	break;
4279	}
4280
4281	case SVGA3D_DEVCAP_MISSING62:
4282	/* Unused */
4283	break;
4284
4285	case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEXTURES:
4286	/* Obsolete */
4287	break;
4288
4289	case SVGA3D_DEVCAP_MAX_SIMULTANEOUS_RENDER_TARGETS:
4290	if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
4291	*pu32Val = 8;
4292	else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
4293	*pu32Val = 4; // D3D_FL9_3_SIMULTANEOUS_RENDER_TARGET_COUNT
4294	else
4295	*pu32Val = 1; // D3D_FL9_1_SIMULTANEOUS_RENDER_TARGET_COUNT
4296	break;
4297
4298	case SVGA3D_DEVCAP_DEAD4: /* SVGA3D_DEVCAP_MULTISAMPLE_NONMASKABLESAMPLES */
4299	case SVGA3D_DEVCAP_DEAD5: /* SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES */
4300	pu32Val = (1 << (2-1)) \| (1 << (4-1)) \| (1 << (8-1)); / 2x, 4x, 8x */
4301	break;
4302
4303	case SVGA3D_DEVCAP_DEAD7: /* SVGA3D_DEVCAP_ALPHATOCOVERAGE */
4304	/* Obsolete */
4305	break;
4306
4307	case SVGA3D_DEVCAP_DEAD6: /* SVGA3D_DEVCAP_SUPERSAMPLE */
4308	/* Obsolete */
4309	break;
4310
4311	case SVGA3D_DEVCAP_AUTOGENMIPMAPS:
4312	*pu32Val = 1;
4313	break;
4314
4315	case SVGA3D_DEVCAP_MAX_CONTEXT_IDS:
4316	*pu32Val = SVGA3D_MAX_CONTEXT_IDS;
4317	break;
4318
4319	case SVGA3D_DEVCAP_MAX_SURFACE_IDS:
4320	*pu32Val = SVGA3D_MAX_SURFACE_IDS;
4321	break;
4322
4323	case SVGA3D_DEVCAP_DEAD1:
4324	/* Obsolete */
4325	break;
4326
4327	case SVGA3D_DEVCAP_DEAD8: /* SVGA3D_DEVCAP_VIDEO_DECODE */
4328	/* Obsolete */
4329	break;
4330
4331	case SVGA3D_DEVCAP_DEAD9: /* SVGA3D_DEVCAP_VIDEO_PROCESS */
4332	/* Obsolete */
4333	break;
4334
4335	case SVGA3D_DEVCAP_LINE_AA:
4336	*pu32Val = 1;
4337	break;
4338
4339	case SVGA3D_DEVCAP_LINE_STIPPLE:
4340	pu32Val = 0; / DX11 does not seem to support this directly. */
4341	break;
4342
4343	case SVGA3D_DEVCAP_MAX_LINE_WIDTH:
4344	AssertCompile(sizeof(uint32_t) == sizeof(float));
4345	(float )pu32Val = 1.0f;
4346	break;
4347
4348	case SVGA3D_DEVCAP_MAX_AA_LINE_WIDTH:
4349	AssertCompile(sizeof(uint32_t) == sizeof(float));
4350	(float )pu32Val = 1.0f;
4351	break;
4352
4353	case SVGA3D_DEVCAP_DEAD3: /* Old SVGA3D_DEVCAP_LOGICOPS */
4354	/* Deprecated. */
4355	AssertCompile(SVGA3D_DEVCAP_DEAD3 == 92); /* Newer SVGA headers redefine this. */
4356	break;
4357
4358	case SVGA3D_DEVCAP_TS_COLOR_KEY:
4359	pu32Val = 0; / DX11 does not seem to support this directly. */
4360	break;
4361
4362	case SVGA3D_DEVCAP_DEAD2:
4363	break;
4364
4365	case SVGA3D_DEVCAP_DXCONTEXT:
4366	*pu32Val = 1;
4367	break;
4368
4369	case SVGA3D_DEVCAP_DEAD11: /* SVGA3D_DEVCAP_MAX_TEXTURE_ARRAY_SIZE */
4370	*pu32Val = D3D11_REQ_TEXTURE2D_ARRAY_AXIS_DIMENSION;
4371	break;
4372
4373	case SVGA3D_DEVCAP_DX_MAX_VERTEXBUFFERS:
4374	*pu32Val = D3D11_IA_VERTEX_INPUT_RESOURCE_SLOT_COUNT;
4375	break;
4376
4377	case SVGA3D_DEVCAP_DX_MAX_CONSTANT_BUFFERS:
4378	*pu32Val = D3D11_COMMONSHADER_CONSTANT_BUFFER_HW_SLOT_COUNT;
4379	break;
4380
4381	case SVGA3D_DEVCAP_DX_PROVOKING_VERTEX:
4382	pu32Val = 0; / boolean */
4383	break;
4384
4385	case SVGA3D_DEVCAP_DXFMT_X8R8G8B8:
4386	case SVGA3D_DEVCAP_DXFMT_A8R8G8B8:
4387	case SVGA3D_DEVCAP_DXFMT_R5G6B5:
4388	case SVGA3D_DEVCAP_DXFMT_X1R5G5B5:
4389	case SVGA3D_DEVCAP_DXFMT_A1R5G5B5:
4390	case SVGA3D_DEVCAP_DXFMT_A4R4G4B4:
4391	case SVGA3D_DEVCAP_DXFMT_Z_D32:
4392	case SVGA3D_DEVCAP_DXFMT_Z_D16:
4393	case SVGA3D_DEVCAP_DXFMT_Z_D24S8:
4394	case SVGA3D_DEVCAP_DXFMT_Z_D15S1:
4395	case SVGA3D_DEVCAP_DXFMT_LUMINANCE8:
4396	case SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4:
4397	case SVGA3D_DEVCAP_DXFMT_LUMINANCE16:
4398	case SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8:
4399	case SVGA3D_DEVCAP_DXFMT_DXT1:
4400	case SVGA3D_DEVCAP_DXFMT_DXT2:
4401	case SVGA3D_DEVCAP_DXFMT_DXT3:
4402	case SVGA3D_DEVCAP_DXFMT_DXT4:
4403	case SVGA3D_DEVCAP_DXFMT_DXT5:
4404	case SVGA3D_DEVCAP_DXFMT_BUMPU8V8:
4405	case SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5:
4406	case SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8:
4407	case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1:
4408	case SVGA3D_DEVCAP_DXFMT_ARGB_S10E5:
4409	case SVGA3D_DEVCAP_DXFMT_ARGB_S23E8:
4410	case SVGA3D_DEVCAP_DXFMT_A2R10G10B10:
4411	case SVGA3D_DEVCAP_DXFMT_V8U8:
4412	case SVGA3D_DEVCAP_DXFMT_Q8W8V8U8:
4413	case SVGA3D_DEVCAP_DXFMT_CxV8U8:
4414	case SVGA3D_DEVCAP_DXFMT_X8L8V8U8:
4415	case SVGA3D_DEVCAP_DXFMT_A2W10V10U10:
4416	case SVGA3D_DEVCAP_DXFMT_ALPHA8:
4417	case SVGA3D_DEVCAP_DXFMT_R_S10E5:
4418	case SVGA3D_DEVCAP_DXFMT_R_S23E8:
4419	case SVGA3D_DEVCAP_DXFMT_RG_S10E5:
4420	case SVGA3D_DEVCAP_DXFMT_RG_S23E8:
4421	case SVGA3D_DEVCAP_DXFMT_BUFFER:
4422	case SVGA3D_DEVCAP_DXFMT_Z_D24X8:
4423	case SVGA3D_DEVCAP_DXFMT_V16U16:
4424	case SVGA3D_DEVCAP_DXFMT_G16R16:
4425	case SVGA3D_DEVCAP_DXFMT_A16B16G16R16:
4426	case SVGA3D_DEVCAP_DXFMT_UYVY:
4427	case SVGA3D_DEVCAP_DXFMT_YUY2:
4428	case SVGA3D_DEVCAP_DXFMT_NV12:
4429	case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD2: /* SVGA3D_DEVCAP_DXFMT_AYUV */
4430	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS:
4431	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT:
4432	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT:
4433	case SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS:
4434	case SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT:
4435	case SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT:
4436	case SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT:
4437	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS:
4438	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT:
4439	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM:
4440	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT:
4441	case SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS:
4442	case SVGA3D_DEVCAP_DXFMT_R32G32_UINT:
4443	case SVGA3D_DEVCAP_DXFMT_R32G32_SINT:
4444	case SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS:
4445	case SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT:
4446	case SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24:
4447	case SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT:
4448	case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS:
4449	case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT:
4450	case SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT:
4451	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS:
4452	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM:
4453	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB:
4454	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT:
4455	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT:
4456	case SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS:
4457	case SVGA3D_DEVCAP_DXFMT_R16G16_UINT:
4458	case SVGA3D_DEVCAP_DXFMT_R16G16_SINT:
4459	case SVGA3D_DEVCAP_DXFMT_R32_TYPELESS:
4460	case SVGA3D_DEVCAP_DXFMT_D32_FLOAT:
4461	case SVGA3D_DEVCAP_DXFMT_R32_UINT:
4462	case SVGA3D_DEVCAP_DXFMT_R32_SINT:
4463	case SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS:
4464	case SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT:
4465	case SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8:
4466	case SVGA3D_DEVCAP_DXFMT_X24_G8_UINT:
4467	case SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS:
4468	case SVGA3D_DEVCAP_DXFMT_R8G8_UNORM:
4469	case SVGA3D_DEVCAP_DXFMT_R8G8_UINT:
4470	case SVGA3D_DEVCAP_DXFMT_R8G8_SINT:
4471	case SVGA3D_DEVCAP_DXFMT_R16_TYPELESS:
4472	case SVGA3D_DEVCAP_DXFMT_R16_UNORM:
4473	case SVGA3D_DEVCAP_DXFMT_R16_UINT:
4474	case SVGA3D_DEVCAP_DXFMT_R16_SNORM:
4475	case SVGA3D_DEVCAP_DXFMT_R16_SINT:
4476	case SVGA3D_DEVCAP_DXFMT_R8_TYPELESS:
4477	case SVGA3D_DEVCAP_DXFMT_R8_UNORM:
4478	case SVGA3D_DEVCAP_DXFMT_R8_UINT:
4479	case SVGA3D_DEVCAP_DXFMT_R8_SNORM:
4480	case SVGA3D_DEVCAP_DXFMT_R8_SINT:
4481	case SVGA3D_DEVCAP_DXFMT_P8:
4482	case SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP:
4483	case SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM:
4484	case SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM:
4485	case SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS:
4486	case SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB:
4487	case SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS:
4488	case SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB:
4489	case SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS:
4490	case SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB:
4491	case SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS:
4492	case SVGA3D_DEVCAP_DXFMT_ATI1:
4493	case SVGA3D_DEVCAP_DXFMT_BC4_SNORM:
4494	case SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS:
4495	case SVGA3D_DEVCAP_DXFMT_ATI2:
4496	case SVGA3D_DEVCAP_DXFMT_BC5_SNORM:
4497	case SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM:
4498	case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS:
4499	case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB:
4500	case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS:
4501	case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB:
4502	case SVGA3D_DEVCAP_DXFMT_Z_DF16:
4503	case SVGA3D_DEVCAP_DXFMT_Z_DF24:
4504	case SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT:
4505	case SVGA3D_DEVCAP_DXFMT_YV12:
4506	case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT:
4507	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT:
4508	case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM:
4509	case SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT:
4510	case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM:
4511	case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM:
4512	case SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT:
4513	case SVGA3D_DEVCAP_DXFMT_R16G16_UNORM:
4514	case SVGA3D_DEVCAP_DXFMT_R16G16_SNORM:
4515	case SVGA3D_DEVCAP_DXFMT_R32_FLOAT:
4516	case SVGA3D_DEVCAP_DXFMT_R8G8_SNORM:
4517	case SVGA3D_DEVCAP_DXFMT_R16_FLOAT:
4518	case SVGA3D_DEVCAP_DXFMT_D16_UNORM:
4519	case SVGA3D_DEVCAP_DXFMT_A8_UNORM:
4520	case SVGA3D_DEVCAP_DXFMT_BC1_UNORM:
4521	case SVGA3D_DEVCAP_DXFMT_BC2_UNORM:
4522	case SVGA3D_DEVCAP_DXFMT_BC3_UNORM:
4523	case SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM:
4524	case SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM:
4525	case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM:
4526	case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM:
4527	case SVGA3D_DEVCAP_DXFMT_BC4_UNORM:
4528	case SVGA3D_DEVCAP_DXFMT_BC5_UNORM:
4529	case SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS:
4530	case SVGA3D_DEVCAP_DXFMT_BC6H_UF16:
4531	case SVGA3D_DEVCAP_DXFMT_BC6H_SF16:
4532	case SVGA3D_DEVCAP_DXFMT_BC7_TYPELESS:
4533	case SVGA3D_DEVCAP_DXFMT_BC7_UNORM:
4534	case SVGA3D_DEVCAP_DXFMT_BC7_UNORM_SRGB:
4535	{
4536	SVGA3dSurfaceFormat const enmFormat = vmsvgaDXDevCapDxfmt2Format(idx3dCaps);
4537	rc = vmsvgaDXCheckFormatSupport(pState, enmFormat, pu32Val);
4538	break;
4539	}
4540
4541	case SVGA3D_DEVCAP_SM41:
4542	pu32Val = 1; / boolean */
4543	break;
4544
4545	case SVGA3D_DEVCAP_MULTISAMPLE_2X:
4546	pu32Val = RT_BOOL(pState->pBackend->dxDevice.MultisampleCountMask & (1 << (2 - 1))); / boolean */
4547	break;
4548
4549	case SVGA3D_DEVCAP_MULTISAMPLE_4X:
4550	pu32Val = RT_BOOL(pState->pBackend->dxDevice.MultisampleCountMask & (1 << (4 - 1))); / boolean */
4551	break;
4552
4553	case SVGA3D_DEVCAP_MS_FULL_QUALITY:
4554	pu32Val = 0; / boolean */
4555	break;
4556
4557	case SVGA3D_DEVCAP_LOGICOPS:
4558	AssertCompile(SVGA3D_DEVCAP_LOGICOPS == 248);
4559	pu32Val = 0; / boolean */
4560	break;
4561
4562	case SVGA3D_DEVCAP_LOGIC_BLENDOPS:
4563	pu32Val = 0; / boolean */
4564	break;
4565
4566	case SVGA3D_DEVCAP_RESERVED_1:
4567	break;
4568
4569	case SVGA3D_DEVCAP_RESERVED_2:
4570	break;
4571
4572	case SVGA3D_DEVCAP_SM5:
4573	pu32Val = 1; / boolean */
4574	break;
4575
4576	case SVGA3D_DEVCAP_MULTISAMPLE_8X:
4577	pu32Val = RT_BOOL(pState->pBackend->dxDevice.MultisampleCountMask & (1 << (8 - 1))); / boolean */
4578	break;
4579
4580	case SVGA3D_DEVCAP_MAX:
4581	case SVGA3D_DEVCAP_INVALID:
4582	rc = VERR_NOT_SUPPORTED;
4583	break;
4584	}
4585
4586	return rc;
4587	}
4588
4589
4590	static DECLCALLBACK(int) vmsvga3dBackChangeMode(PVGASTATECC pThisCC)
4591	{
4592	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4593	AssertReturn(pState, VERR_INVALID_STATE);
4594
4595	return VINF_SUCCESS;
4596	}
4597
4598
4599	static DECLCALLBACK(int) vmsvga3dBackSurfaceCopy(PVGASTATECC pThisCC, SVGA3dSurfaceImageId dest, SVGA3dSurfaceImageId src,
4600	uint32_t cCopyBoxes, SVGA3dCopyBox *pBox)
4601	{
4602	RT_NOREF(cCopyBoxes);
4603	AssertReturn(pBox, VERR_INVALID_PARAMETER);
4604
4605	LogFunc(("src sid %d -> dst sid %d\n", src.sid, dest.sid));
4606
4607	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4608	AssertReturn(pState, VERR_INVALID_STATE);
4609
4610	PVMSVGA3DBACKEND pBackend = pState->pBackend;
4611
4612	PVMSVGA3DSURFACE pSrcSurface;
4613	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, src.sid, &pSrcSurface);
4614	AssertRCReturn(rc, rc);
4615
4616	PVMSVGA3DSURFACE pDstSurface;
4617	rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, dest.sid, &pDstSurface);
4618	AssertRCReturn(rc, rc);
4619
4620	/** @todo Implement a separate code paths for memory->texture, texture->memory and memory->memory transfers */
4621	LogFunc(("src%s sid = %u -> dst%s sid = %u\n",
4622	pSrcSurface->pBackendSurface ? "" : " sysmem", pSrcSurface->id,
4623	pDstSurface->pBackendSurface ? "" : " sysmem", pDstSurface->id));
4624
4625	//DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
4626	//AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4627
4628	if (pSrcSurface->pBackendSurface == NULL)
4629	{
4630	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pSrcSurface);
4631	AssertRCReturn(rc, rc);
4632	}
4633
4634	if (pDstSurface->pBackendSurface == NULL)
4635	{
4636	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDstSurface);
4637	AssertRCReturn(rc, rc);
4638	}
4639
4640	DXDEVICE *pDXDevice = &pBackend->dxDevice;
4641
4642	/* Clip the box. */
4643	PVMSVGA3DMIPMAPLEVEL pSrcMipLevel;
4644	rc = vmsvga3dMipmapLevel(pSrcSurface, src.face, src.mipmap, &pSrcMipLevel);
4645	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
4646
4647	PVMSVGA3DMIPMAPLEVEL pDstMipLevel;
4648	rc = vmsvga3dMipmapLevel(pDstSurface, dest.face, dest.mipmap, &pDstMipLevel);
4649	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
4650
4651	SVGA3dCopyBox clipBox = *pBox;
4652	vmsvgaR3ClipCopyBox(&pSrcMipLevel->mipmapSize, &pDstMipLevel->mipmapSize, &clipBox);
4653
4654	UINT DstSubresource = vmsvga3dCalcSubresource(dest.mipmap, dest.face, pDstSurface->cLevels);
4655	UINT DstX = clipBox.x;
4656	UINT DstY = clipBox.y;
4657	UINT DstZ = clipBox.z;
4658
4659	UINT SrcSubresource = vmsvga3dCalcSubresource(src.mipmap, src.face, pSrcSurface->cLevels);
4660	D3D11_BOX SrcBox;
4661	SrcBox.left = clipBox.srcx;
4662	SrcBox.top = clipBox.srcy;
4663	SrcBox.front = clipBox.srcz;
4664	SrcBox.right = clipBox.srcx + clipBox.w;
4665	SrcBox.bottom = clipBox.srcy + clipBox.h;
4666	SrcBox.back = clipBox.srcz + clipBox.d;
4667
4668	Assert(cCopyBoxes == 1); /** @todo */
4669
4670	ID3D11Resource *pDstResource;
4671	ID3D11Resource *pSrcResource;
4672	pDstResource = dxResource(pDstSurface);
4673	pSrcResource = dxResource(pSrcSurface);
4674
4675	pDXDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
4676	pSrcResource, SrcSubresource, &SrcBox);
4677
4678	return rc;
4679	}
4680
4681
4682	static DECLCALLBACK(void) vmsvga3dBackUpdateHostScreenViewport(PVGASTATECC pThisCC, uint32_t idScreen, VMSVGAVIEWPORT const *pOldViewport)
4683	{
4684	RT_NOREF(pThisCC, idScreen, pOldViewport);
4685	/** @todo Scroll the screen content without requiring the guest to redraw. */
4686	}
4687
4688
4689	static DECLCALLBACK(int) vmsvga3dBackSurfaceUpdateHeapBuffers(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface)
4690	{
4691	/** @todo */
4692	RT_NOREF(pThisCC, pSurface);
4693	return VERR_NOT_IMPLEMENTED;
4694	}
4695
4696
4697	/*
4698	*
4699	* VGPU9 callbacks. Not implemented.
4700	*
4701	*/
4702	/** @todo later */
4703
4704	/**
4705	* Create a new 3d context
4706	*
4707	* @returns VBox status code.
4708	* @param pThisCC The VGA/VMSVGA state for ring-3.
4709	* @param cid Context id
4710	*/
4711	static DECLCALLBACK(int) vmsvga3dBackContextDefine(PVGASTATECC pThisCC, uint32_t cid)
4712	{
4713	RT_NOREF(cid);
4714
4715	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4716	AssertReturn(pState, VERR_INVALID_STATE);
4717
4718	DEBUG_BREAKPOINT_TEST();
4719	return VERR_NOT_IMPLEMENTED;
4720	}
4721
4722
4723	/**
4724	* Destroy an existing 3d context
4725	*
4726	* @returns VBox status code.
4727	* @param pThisCC The VGA/VMSVGA state for ring-3.
4728	* @param cid Context id
4729	*/
4730	static DECLCALLBACK(int) vmsvga3dBackContextDestroy(PVGASTATECC pThisCC, uint32_t cid)
4731	{
4732	RT_NOREF(cid);
4733
4734	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4735	AssertReturn(pState, VERR_INVALID_STATE);
4736
4737	DEBUG_BREAKPOINT_TEST();
4738	return VINF_SUCCESS;
4739	}
4740
4741
4742	static DECLCALLBACK(int) vmsvga3dBackSetTransform(PVGASTATECC pThisCC, uint32_t cid, SVGA3dTransformType type, float matrix[16])
4743	{
4744	RT_NOREF(cid, type, matrix);
4745
4746	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4747	AssertReturn(pState, VERR_INVALID_STATE);
4748
4749	DEBUG_BREAKPOINT_TEST();
4750	return VINF_SUCCESS;
4751	}
4752
4753
4754	static DECLCALLBACK(int) vmsvga3dBackSetZRange(PVGASTATECC pThisCC, uint32_t cid, SVGA3dZRange zRange)
4755	{
4756	RT_NOREF(cid, zRange);
4757
4758	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4759	AssertReturn(pState, VERR_INVALID_STATE);
4760
4761	DEBUG_BREAKPOINT_TEST();
4762	return VINF_SUCCESS;
4763	}
4764
4765
4766	static DECLCALLBACK(int) vmsvga3dBackSetRenderState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cRenderStates, SVGA3dRenderState *pRenderState)
4767	{
4768	RT_NOREF(cid, cRenderStates, pRenderState);
4769
4770	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4771	AssertReturn(pState, VERR_INVALID_STATE);
4772
4773	DEBUG_BREAKPOINT_TEST();
4774	return VINF_SUCCESS;
4775	}
4776
4777
4778	static DECLCALLBACK(int) vmsvga3dBackSetRenderTarget(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRenderTargetType type, SVGA3dSurfaceImageId target)
4779	{
4780	RT_NOREF(cid, type, target);
4781
4782	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4783	AssertReturn(pState, VERR_INVALID_STATE);
4784
4785	DEBUG_BREAKPOINT_TEST();
4786	return VINF_SUCCESS;
4787	}
4788
4789
4790	static DECLCALLBACK(int) vmsvga3dBackSetTextureState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cTextureStates, SVGA3dTextureState *pTextureState)
4791	{
4792	RT_NOREF(cid, cTextureStates, pTextureState);
4793
4794	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4795	AssertReturn(pState, VERR_INVALID_STATE);
4796
4797	DEBUG_BREAKPOINT_TEST();
4798	return VINF_SUCCESS;
4799	}
4800
4801
4802	static DECLCALLBACK(int) vmsvga3dBackSetMaterial(PVGASTATECC pThisCC, uint32_t cid, SVGA3dFace face, SVGA3dMaterial *pMaterial)
4803	{
4804	RT_NOREF(cid, face, pMaterial);
4805
4806	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4807	AssertReturn(pState, VERR_INVALID_STATE);
4808
4809	DEBUG_BREAKPOINT_TEST();
4810	return VINF_SUCCESS;
4811	}
4812
4813
4814	static DECLCALLBACK(int) vmsvga3dBackSetLightData(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, SVGA3dLightData *pData)
4815	{
4816	RT_NOREF(cid, index, pData);
4817
4818	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4819	AssertReturn(pState, VERR_INVALID_STATE);
4820
4821	DEBUG_BREAKPOINT_TEST();
4822	return VINF_SUCCESS;
4823	}
4824
4825
4826	static DECLCALLBACK(int) vmsvga3dBackSetLightEnabled(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, uint32_t enabled)
4827	{
4828	RT_NOREF(cid, index, enabled);
4829
4830	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4831	AssertReturn(pState, VERR_INVALID_STATE);
4832
4833	DEBUG_BREAKPOINT_TEST();
4834	return VINF_SUCCESS;
4835	}
4836
4837
4838	static DECLCALLBACK(int) vmsvga3dBackSetViewPort(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
4839	{
4840	RT_NOREF(cid, pRect);
4841
4842	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4843	AssertReturn(pState, VERR_INVALID_STATE);
4844
4845	DEBUG_BREAKPOINT_TEST();
4846	return VINF_SUCCESS;
4847	}
4848
4849
4850	static DECLCALLBACK(int) vmsvga3dBackSetClipPlane(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, float plane[4])
4851	{
4852	RT_NOREF(cid, index, plane);
4853
4854	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4855	AssertReturn(pState, VERR_INVALID_STATE);
4856
4857	DEBUG_BREAKPOINT_TEST();
4858	return VINF_SUCCESS;
4859	}
4860
4861
4862	static DECLCALLBACK(int) vmsvga3dBackCommandClear(PVGASTATECC pThisCC, uint32_t cid, SVGA3dClearFlag clearFlag, uint32_t color, float depth,
4863	uint32_t stencil, uint32_t cRects, SVGA3dRect *pRect)
4864	{
4865	/* From SVGA3D_BeginClear comments:
4866	*
4867	* Clear is not affected by clipping, depth test, or other
4868	* render state which affects the fragment pipeline.
4869	*
4870	* Therefore this code must ignore the current scissor rect.
4871	*/
4872
4873	RT_NOREF(cid, clearFlag, color, depth, stencil, cRects, pRect);
4874
4875	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4876	AssertReturn(pState, VERR_INVALID_STATE);
4877
4878	DEBUG_BREAKPOINT_TEST();
4879	return VINF_SUCCESS;
4880	}
4881
4882
4883	static DECLCALLBACK(int) vmsvga3dBackDrawPrimitives(PVGASTATECC pThisCC, uint32_t cid, uint32_t numVertexDecls, SVGA3dVertexDecl *pVertexDecl,
4884	uint32_t numRanges, SVGA3dPrimitiveRange *pRange,
4885	uint32_t cVertexDivisor, SVGA3dVertexDivisor *pVertexDivisor)
4886	{
4887	RT_NOREF(cid, numVertexDecls, pVertexDecl, numRanges, pRange, cVertexDivisor, pVertexDivisor);
4888
4889	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4890	AssertReturn(pState, VERR_INVALID_STATE);
4891
4892	DEBUG_BREAKPOINT_TEST();
4893	return VINF_SUCCESS;
4894	}
4895
4896
4897	static DECLCALLBACK(int) vmsvga3dBackSetScissorRect(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
4898	{
4899	RT_NOREF(cid, pRect);
4900
4901	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4902	AssertReturn(pState, VERR_INVALID_STATE);
4903
4904	DEBUG_BREAKPOINT_TEST();
4905	return VINF_SUCCESS;
4906	}
4907
4908
4909	static DECLCALLBACK(int) vmsvga3dBackGenerateMipmaps(PVGASTATECC pThisCC, uint32_t sid, SVGA3dTextureFilter filter)
4910	{
4911	RT_NOREF(sid, filter);
4912
4913	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4914	AssertReturn(pState, VERR_INVALID_STATE);
4915
4916	DEBUG_BREAKPOINT_TEST();
4917	return VINF_SUCCESS;
4918	}
4919
4920
4921	static DECLCALLBACK(int) vmsvga3dBackShaderDefine(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type,
4922	uint32_t cbData, uint32_t *pShaderData)
4923	{
4924	RT_NOREF(cid, shid, type, cbData, pShaderData);
4925
4926	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4927	AssertReturn(pState, VERR_INVALID_STATE);
4928
4929	DEBUG_BREAKPOINT_TEST();
4930	return VINF_SUCCESS;
4931	}
4932
4933
4934	static DECLCALLBACK(int) vmsvga3dBackShaderDestroy(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type)
4935	{
4936	RT_NOREF(cid, shid, type);
4937
4938	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4939	AssertReturn(pState, VERR_INVALID_STATE);
4940
4941	DEBUG_BREAKPOINT_TEST();
4942	return VINF_SUCCESS;
4943	}
4944
4945
4946	static DECLCALLBACK(int) vmsvga3dBackShaderSet(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext, uint32_t cid, SVGA3dShaderType type, uint32_t shid)
4947	{
4948	RT_NOREF(pContext, cid, type, shid);
4949
4950	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4951	AssertReturn(pState, VERR_INVALID_STATE);
4952
4953	DEBUG_BREAKPOINT_TEST();
4954	return VINF_SUCCESS;
4955	}
4956
4957
4958	static DECLCALLBACK(int) vmsvga3dBackShaderSetConst(PVGASTATECC pThisCC, uint32_t cid, uint32_t reg, SVGA3dShaderType type,
4959	SVGA3dShaderConstType ctype, uint32_t cRegisters, uint32_t *pValues)
4960	{
4961	RT_NOREF(cid, reg, type, ctype, cRegisters, pValues);
4962
4963	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4964	AssertReturn(pState, VERR_INVALID_STATE);
4965
4966	DEBUG_BREAKPOINT_TEST();
4967	return VINF_SUCCESS;
4968	}
4969
4970	static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryCreate(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
4971	{
4972	RT_NOREF(pThisCC, pContext);
4973	DEBUG_BREAKPOINT_TEST();
4974	return VINF_SUCCESS;
4975	}
4976
4977	static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryDelete(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
4978	{
4979	RT_NOREF(pThisCC, pContext);
4980	DEBUG_BREAKPOINT_TEST();
4981	return VINF_SUCCESS;
4982	}
4983
4984	static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryBegin(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
4985	{
4986	RT_NOREF(pThisCC, pContext);
4987	DEBUG_BREAKPOINT_TEST();
4988	return VINF_SUCCESS;
4989	}
4990
4991	static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryEnd(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
4992	{
4993	RT_NOREF(pThisCC, pContext);
4994	DEBUG_BREAKPOINT_TEST();
4995	return VINF_SUCCESS;
4996	}
4997
4998	static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryGetData(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext, uint32_t *pu32Pixels)
4999	{
5000	RT_NOREF(pThisCC, pContext, pu32Pixels);
5001	DEBUG_BREAKPOINT_TEST();
5002	return VINF_SUCCESS;
5003	}
5004
5005
5006	/**
5007	* Destroy backend specific surface bits (part of SVGA_3D_CMD_SURFACE_DESTROY).
5008	*
5009	* @param pThisCC The device context.
5010	* @param fClearCOTableEntry Whether to clear the corresponding COTable entry.
5011	* @param pSurface The surface being destroyed.
5012	*/
5013	static DECLCALLBACK(void) vmsvga3dBackSurfaceDestroy(PVGASTATECC pThisCC, bool fClearCOTableEntry, PVMSVGA3DSURFACE pSurface)
5014	{
5015	RT_NOREF(pThisCC);
5016
5017	/* The caller should not use the function for system memory surfaces. */
5018	PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
5019	if (!pBackendSurface)
5020	return;
5021	pSurface->pBackendSurface = NULL;
5022
5023	LogFunc(("sid=%u\n", pSurface->id));
5024
5025	/* If any views have been created for this resource, then also release them. */
5026	DXVIEW pIter, pNext;
5027	RTListForEachSafe(&pBackendSurface->listView, pIter, pNext, DXVIEW, nodeSurfaceView)
5028	{
5029	LogFunc(("pIter=%p, pNext=%p\n", pIter, pNext));
5030
5031	/** @todo The common DX code should track the views and clean COTable on a surface destruction. */
5032	if (fClearCOTableEntry)
5033	{
5034	PVMSVGA3DDXCONTEXT pDXContext;
5035	int rc = vmsvga3dDXContextFromCid(pThisCC->svga.p3dState, pIter->cid, &pDXContext);
5036	AssertRC(rc);
5037	if (RT_SUCCESS(rc))
5038	{
5039	switch (pIter->enmViewType)
5040	{
5041	case VMSVGA3D_VIEWTYPE_RENDERTARGET:
5042	{
5043	SVGACOTableDXRTViewEntry *pEntry = &pDXContext->cot.paRTView[pIter->viewId];
5044	RT_ZERO(*pEntry);
5045	break;
5046	}
5047	case VMSVGA3D_VIEWTYPE_DEPTHSTENCIL:
5048	{
5049	SVGACOTableDXDSViewEntry *pEntry = &pDXContext->cot.paDSView[pIter->viewId];
5050	RT_ZERO(*pEntry);
5051	break;
5052	}
5053	case VMSVGA3D_VIEWTYPE_SHADERRESOURCE:
5054	{
5055	SVGACOTableDXSRViewEntry *pEntry = &pDXContext->cot.paSRView[pIter->viewId];
5056	RT_ZERO(*pEntry);
5057	break;
5058	}
5059	case VMSVGA3D_VIEWTYPE_UNORDEREDACCESS:
5060	{
5061	SVGACOTableDXUAViewEntry *pEntry = &pDXContext->cot.paUAView[pIter->viewId];
5062	RT_ZERO(*pEntry);
5063	break;
5064	}
5065	case VMSVGA3D_VIEWTYPE_VIDEODECODEROUTPUT:
5066	{
5067	VBSVGACOTableDXVideoDecoderOutputViewEntry *pEntry = &pDXContext->cot.paVideoDecoderOutputView[pIter->viewId];
5068	RT_ZERO(*pEntry);
5069	break;
5070	}
5071	case VMSVGA3D_VIEWTYPE_VIDEOPROCESSORINPUT:
5072	{
5073	VBSVGACOTableDXVideoProcessorInputViewEntry *pEntry = &pDXContext->cot.paVideoProcessorInputView[pIter->viewId];
5074	RT_ZERO(*pEntry);
5075	break;
5076	}
5077	case VMSVGA3D_VIEWTYPE_VIDEOPROCESSOROUTPUT:
5078	{
5079	VBSVGACOTableDXVideoProcessorOutputViewEntry *pEntry = &pDXContext->cot.paVideoProcessorOutputView[pIter->viewId];
5080	RT_ZERO(*pEntry);
5081	break;
5082	}
5083	case VMSVGA3D_VIEWTYPE_NONE:
5084	AssertFailed();
5085	break;
5086	}
5087	}
5088	}
5089
5090	dxViewDestroy(pIter);
5091	}
5092
5093	if ( pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_1D
5094	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_2D
5095	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_CUBE
5096	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
5097	{
5098	D3D_RELEASE(pBackendSurface->staging.pResource);
5099	D3D_RELEASE(pBackendSurface->dynamic.pResource);
5100	D3D_RELEASE(pBackendSurface->u.pResource);
5101	}
5102	else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
5103	{
5104	#ifndef DX_COMMON_STAGING_BUFFER
5105	D3D_RELEASE(pBackendSurface->staging.pBuffer);
5106	D3D_RELEASE(pBackendSurface->dynamic.pBuffer);
5107	#endif
5108	D3D_RELEASE(pBackendSurface->u.pBuffer);
5109	}
5110	else
5111	{
5112	AssertFailed();
5113	}
5114
5115	RTMemFree(pBackendSurface);
5116	}
5117
5118
5119	static DECLCALLBACK(void) vmsvga3dBackSurfaceInvalidateImage(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface, uint32_t uFace, uint32_t uMipmap)
5120	{
5121	RT_NOREF(pThisCC, uFace, uMipmap);
5122
5123	/* The caller should not use the function for system memory surfaces. */
5124	PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
5125	if (!pBackendSurface)
5126	return;
5127
5128	LogFunc(("sid=%u\n", pSurface->id));
5129
5130	/* The guest uses this to invalidate a buffer. */
5131	if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
5132	{
5133	Assert(uFace == 0 && uMipmap == 0); /* The caller ensures this. */
5134	/** @todo This causes flickering when a buffer is invalidated and re-created right before a draw call. */
5135	//vmsvga3dBackSurfaceDestroy(pThisCC, false, pSurface);
5136	}
5137	else
5138	{
5139	/** @todo Delete views that have been created for this mipmap.
5140	* For now just delete all views, they will be recte=reated if necessary.
5141	*/
5142	ASSERT_GUEST_FAILED();
5143	DXVIEW pIter, pNext;
5144	RTListForEachSafe(&pBackendSurface->listView, pIter, pNext, DXVIEW, nodeSurfaceView)
5145	{
5146	dxViewDestroy(pIter);
5147	}
5148	}
5149	}
5150
5151
5152	/**
5153	* Backend worker for implementing SVGA_3D_CMD_SURFACE_STRETCHBLT.
5154	*
5155	* @returns VBox status code.
5156	* @param pThis The VGA device instance.
5157	* @param pState The VMSVGA3d state.
5158	* @param pDstSurface The destination host surface.
5159	* @param uDstFace The destination face (valid).
5160	* @param uDstMipmap The destination mipmap level (valid).
5161	* @param pDstBox The destination box.
5162	* @param pSrcSurface The source host surface.
5163	* @param uSrcFace The destination face (valid).
5164	* @param uSrcMipmap The source mimap level (valid).
5165	* @param pSrcBox The source box.
5166	* @param enmMode The strecht blt mode .
5167	* @param pContext The VMSVGA3d context (already current for OGL).
5168	*/
5169	static DECLCALLBACK(int) vmsvga3dBackSurfaceStretchBlt(PVGASTATE pThis, PVMSVGA3DSTATE pState,
5170	PVMSVGA3DSURFACE pDstSurface, uint32_t uDstFace, uint32_t uDstMipmap, SVGA3dBox const *pDstBox,
5171	PVMSVGA3DSURFACE pSrcSurface, uint32_t uSrcFace, uint32_t uSrcMipmap, SVGA3dBox const *pSrcBox,
5172	SVGA3dStretchBltMode enmMode, PVMSVGA3DCONTEXT pContext)
5173	{
5174	RT_NOREF(pThis, pState, pDstSurface, uDstFace, uDstMipmap, pDstBox,
5175	pSrcSurface, uSrcFace, uSrcMipmap, pSrcBox, enmMode, pContext);
5176
5177	AssertFailed();
5178	return VINF_SUCCESS;
5179	}
5180
5181
5182	/**
5183	* Backend worker for implementing SVGA_3D_CMD_SURFACE_DMA that copies one box.
5184	*
5185	* @returns Failure status code or @a rc.
5186	* @param pThis The shared VGA/VMSVGA instance data.
5187	* @param pThisCC The VGA/VMSVGA state for ring-3.
5188	* @param pState The VMSVGA3d state.
5189	* @param pSurface The host surface.
5190	* @param pMipLevel Mipmap level. The caller knows it already.
5191	* @param uHostFace The host face (valid).
5192	* @param uHostMipmap The host mipmap level (valid).
5193	* @param GuestPtr The guest pointer.
5194	* @param cbGuestPitch The guest pitch.
5195	* @param transfer The transfer direction.
5196	* @param pBox The box to copy (clipped, valid, except for guest's srcx, srcy, srcz).
5197	* @param pContext The context (for OpenGL).
5198	* @param rc The current rc for all boxes.
5199	* @param iBox The current box number (for Direct 3D).
5200	*/
5201	static DECLCALLBACK(int) vmsvga3dBackSurfaceDMACopyBox(PVGASTATE pThis, PVGASTATECC pThisCC, PVMSVGA3DSTATE pState, PVMSVGA3DSURFACE pSurface,
5202	PVMSVGA3DMIPMAPLEVEL pMipLevel, uint32_t uHostFace, uint32_t uHostMipmap,
5203	SVGAGuestPtr GuestPtr, uint32_t cbGuestPitch, SVGA3dTransferType transfer,
5204	SVGA3dCopyBox const *pBox, PVMSVGA3DCONTEXT pContext, int rc, int iBox)
5205	{
5206	RT_NOREF(pState, pMipLevel, pContext, iBox);
5207
5208	/* The called should not use the function for system memory surfaces. */
5209	PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
5210	AssertReturn(pBackendSurface, VERR_INVALID_PARAMETER);
5211
5212	if ( pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_1D
5213	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_2D
5214	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_CUBE
5215	\|\| pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
5216	{
5217	/** @todo This is generic code and should be in DevVGA-SVGA3d.cpp for backends which support Map/Unmap. */
5218	/** @todo Use vmsvga3dGetBoxDimensions because it does clipping and calculations. */
5219	uint32_t const u32GuestBlockX = pBox->srcx / pSurface->cxBlock;
5220	uint32_t const u32GuestBlockY = pBox->srcy / pSurface->cyBlock;
5221	Assert(u32GuestBlockX * pSurface->cxBlock == pBox->srcx);
5222	Assert(u32GuestBlockY * pSurface->cyBlock == pBox->srcy);
5223	uint32_t const cBlocksX = (pBox->w + pSurface->cxBlock - 1) / pSurface->cxBlock;
5224	uint32_t const cBlocksY = (pBox->h + pSurface->cyBlock - 1) / pSurface->cyBlock;
5225	AssertMsgReturn(cBlocksX && cBlocksY && pBox->d, ("Empty box %dx%dx%d\n", pBox->w, pBox->h, pBox->d), VERR_INTERNAL_ERROR);
5226
5227	/* vmsvgaR3GmrTransfer verifies uGuestOffset.
5228	* srcx(u32GuestBlockX) and srcy(u32GuestBlockY) have been verified in vmsvga3dSurfaceDMA
5229	* to not cause 32 bit overflow when multiplied by cbBlock and cbGuestPitch.
5230	*/
5231	uint64_t uGuestOffset = u32GuestBlockX * pSurface->cbBlock + u32GuestBlockY * cbGuestPitch;
5232	AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
5233
5234	/* 3D texture needs additional processing. */
5235	ASSERT_GUEST_RETURN( pBox->z < D3D11_REQ_TEXTURE3D_U_V_OR_W_DIMENSION
5236	&& pBox->d <= D3D11_REQ_TEXTURE3D_U_V_OR_W_DIMENSION
5237	&& pBox->d <= D3D11_REQ_TEXTURE3D_U_V_OR_W_DIMENSION - pBox->z,
5238	VERR_INVALID_PARAMETER);
5239	ASSERT_GUEST_RETURN( pBox->srcz < D3D11_REQ_TEXTURE3D_U_V_OR_W_DIMENSION
5240	&& pBox->d <= D3D11_REQ_TEXTURE3D_U_V_OR_W_DIMENSION
5241	&& pBox->d <= D3D11_REQ_TEXTURE3D_U_V_OR_W_DIMENSION - pBox->srcz,
5242	VERR_INVALID_PARAMETER);
5243
5244	uGuestOffset += pBox->srcz * pMipLevel->cbSurfacePlane;
5245
5246	SVGA3dSurfaceImageId image;
5247	image.sid = pSurface->id;
5248	image.face = uHostFace;
5249	image.mipmap = uHostMipmap;
5250
5251	SVGA3dBox box;
5252	box.x = pBox->x;
5253	box.y = pBox->y;
5254	box.z = pBox->z;
5255	box.w = pBox->w;
5256	box.h = pBox->h;
5257	box.d = pBox->d;
5258
5259	VMSVGA3D_SURFACE_MAP const enmMap = transfer == SVGA3D_WRITE_HOST_VRAM
5260	? VMSVGA3D_SURFACE_MAP_WRITE
5261	: VMSVGA3D_SURFACE_MAP_READ;
5262
5263	VMSVGA3D_MAPPED_SURFACE map;
5264	rc = vmsvga3dBackSurfaceMap(pThisCC, &image, &box, enmMap, &map);
5265	if (RT_SUCCESS(rc))
5266	{
5267	#if 0
5268	if (box.w == 250 && box.h == 250 && box.d == 1 && enmMap == VMSVGA3D_SURFACE_MAP_READ)
5269	{
5270	DEBUG_BREAKPOINT_TEST();
5271	vmsvga3dMapWriteBmpFile(&map, "P");
5272	}
5273	#endif
5274	/* Prepare parameters for vmsvgaR3GmrTransfer, which needs the host buffer address, size
5275	* and offset of the first scanline.
5276	*/
5277	uint32_t cbLockedBuf = map.cbRowPitch * cBlocksY;
5278	if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
5279	cbLockedBuf += map.cbDepthPitch * (pBox->d - 1); /// @todo why map does not compute this for 2D textures
5280	uint8_t pu8LockedBuf = (uint8_t )map.pvData;
5281	uint32_t offLockedBuf = 0;
5282
5283	for (uint32_t iPlane = 0; iPlane < pBox->d; ++iPlane)
5284	{
5285	AssertBreak(uGuestOffset < UINT32_MAX);
5286
5287	rc = vmsvgaR3GmrTransfer(pThis,
5288	pThisCC,
5289	transfer,
5290	pu8LockedBuf,
5291	cbLockedBuf,
5292	offLockedBuf,
5293	map.cbRowPitch,
5294	GuestPtr,
5295	(uint32_t)uGuestOffset,
5296	cbGuestPitch,
5297	cBlocksX * pSurface->cbBlock,
5298	cBlocksY);
5299	AssertRC(rc);
5300
5301	uGuestOffset += pMipLevel->cbSurfacePlane;
5302	offLockedBuf += map.cbDepthPitch;
5303	}
5304
5305	bool const fWritten = (transfer == SVGA3D_WRITE_HOST_VRAM);
5306	vmsvga3dBackSurfaceUnmap(pThisCC, &image, &map, fWritten);
5307	}
5308	}
5309	else
5310	{
5311	AssertMsgFailed(("Unsupported surface type %d\n", pBackendSurface->enmResType));
5312	rc = VERR_NOT_IMPLEMENTED;
5313	}
5314
5315	return rc;
5316	}
5317
5318
5319	/**
5320	* Create D3D/OpenGL texture object for the specified surface.
5321	*
5322	* Surfaces are created when needed.
5323	*
5324	* @param pThisCC The device context.
5325	* @param pContext The context.
5326	* @param idAssociatedContext Probably the same as pContext->id.
5327	* @param pSurface The surface to create the texture for.
5328	*/
5329	static DECLCALLBACK(int) vmsvga3dBackCreateTexture(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext, uint32_t idAssociatedContext,
5330	PVMSVGA3DSURFACE pSurface)
5331
5332	{
5333	RT_NOREF(pThisCC, pContext, idAssociatedContext, pSurface);
5334
5335	AssertFailed();
5336	return VINF_SUCCESS;
5337	}
5338
5339
5340	/*
5341	* DX callbacks.
5342	*/
5343
5344	static DECLCALLBACK(int) vmsvga3dBackDXDefineContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5345	{
5346	RT_NOREF(pThisCC);
5347
5348	/* Allocate a backend specific context structure. */
5349	PVMSVGA3DBACKENDDXCONTEXT pBackendDXContext = (PVMSVGA3DBACKENDDXCONTEXT)RTMemAllocZ(sizeof(VMSVGA3DBACKENDDXCONTEXT));
5350	AssertPtrReturn(pBackendDXContext, VERR_NO_MEMORY);
5351	pDXContext->pBackendDXContext = pBackendDXContext;
5352
5353	LogFunc(("cid %d\n", pDXContext->cid));
5354	return VINF_SUCCESS;
5355	}
5356
5357
5358	static DECLCALLBACK(int) vmsvga3dBackDXDestroyContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5359	{
5360	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5361
5362	LogFunc(("cid %d\n", pDXContext->cid));
5363
5364	if (pDXContext->pBackendDXContext)
5365	{
5366	/* Make sure that any pending draw calls are finished. */
5367	dxDeviceFlush(&pBackend->dxDevice);
5368
5369	/* Clean up context resources. */
5370	VMSVGA3DBACKENDDXCONTEXT *pBackendDXContext = pDXContext->pBackendDXContext;
5371
5372	for (uint32_t idxShaderState = 0; idxShaderState < RT_ELEMENTS(pBackendDXContext->resources.shaderState); ++idxShaderState)
5373	{
5374	ID3D11Buffer **papConstantBuffer = &pBackendDXContext->resources.shaderState[idxShaderState].constantBuffers[0];
5375	D3D_RELEASE_ARRAY(RT_ELEMENTS(pBackendDXContext->resources.shaderState[idxShaderState].constantBuffers), papConstantBuffer);
5376	}
5377
5378	if (pBackendDXContext->paRenderTargetView)
5379	{
5380	for (uint32_t i = 0; i < pBackendDXContext->cRenderTargetView; ++i)
5381	D3D_RELEASE(pBackendDXContext->paRenderTargetView[i].u.pRenderTargetView);
5382	}
5383	if (pBackendDXContext->paDepthStencilView)
5384	{
5385	for (uint32_t i = 0; i < pBackendDXContext->cDepthStencilView; ++i)
5386	D3D_RELEASE(pBackendDXContext->paDepthStencilView[i].u.pDepthStencilView);
5387	}
5388	if (pBackendDXContext->paShaderResourceView)
5389	{
5390	for (uint32_t i = 0; i < pBackendDXContext->cShaderResourceView; ++i)
5391	D3D_RELEASE(pBackendDXContext->paShaderResourceView[i].u.pShaderResourceView);
5392	}
5393	if (pBackendDXContext->paElementLayout)
5394	{
5395	for (uint32_t i = 0; i < pBackendDXContext->cElementLayout; ++i)
5396	D3D_RELEASE(pBackendDXContext->paElementLayout[i].pElementLayout);
5397	}
5398	if (pBackendDXContext->papBlendState)
5399	D3D_RELEASE_ARRAY(pBackendDXContext->cBlendState, pBackendDXContext->papBlendState);
5400	if (pBackendDXContext->papDepthStencilState)
5401	D3D_RELEASE_ARRAY(pBackendDXContext->cDepthStencilState, pBackendDXContext->papDepthStencilState);
5402	if (pBackendDXContext->papRasterizerState)
5403	D3D_RELEASE_ARRAY(pBackendDXContext->cRasterizerState, pBackendDXContext->papRasterizerState);
5404	if (pBackendDXContext->papSamplerState)
5405	D3D_RELEASE_ARRAY(pBackendDXContext->cSamplerState, pBackendDXContext->papSamplerState);
5406	if (pBackendDXContext->paQuery)
5407	{
5408	for (uint32_t i = 0; i < pBackendDXContext->cQuery; ++i)
5409	dxDestroyQuery(&pBackendDXContext->paQuery[i]);
5410	}
5411	if (pBackendDXContext->paShader)
5412	{
5413	for (uint32_t i = 0; i < pBackendDXContext->cShader; ++i)
5414	dxDestroyShader(&pBackendDXContext->paShader[i]);
5415	}
5416	if (pBackendDXContext->paStreamOutput)
5417	{
5418	for (uint32_t i = 0; i < pBackendDXContext->cStreamOutput; ++i)
5419	dxDestroyStreamOutput(&pBackendDXContext->paStreamOutput[i]);
5420	}
5421	if (pBackendDXContext->paUnorderedAccessView)
5422	{
5423	for (uint32_t i = 0; i < pBackendDXContext->cUnorderedAccessView; ++i)
5424	D3D_RELEASE(pBackendDXContext->paUnorderedAccessView[i].u.pUnorderedAccessView);
5425	}
5426	if (pBackendDXContext->paVideoProcessor)
5427	{
5428	for (uint32_t i = 0; i < pBackendDXContext->cVideoProcessor; ++i)
5429	dxDestroyVideoProcessor(&pBackendDXContext->paVideoProcessor[i]);
5430	}
5431	if (pBackendDXContext->paVideoDecoderOutputView)
5432	{
5433	/** @todo dxViewDestroy? */
5434	for (uint32_t i = 0; i < pBackendDXContext->cVideoDecoderOutputView; ++i)
5435	D3D_RELEASE(pBackendDXContext->paVideoDecoderOutputView[i].u.pVideoDecoderOutputView);
5436	}
5437	if (pBackendDXContext->paVideoDecoder)
5438	{
5439	for (uint32_t i = 0; i < pBackendDXContext->cVideoDecoder; ++i)
5440	dxDestroyVideoDecoder(&pBackendDXContext->paVideoDecoder[i]);
5441	}
5442	if (pBackendDXContext->paVideoProcessorInputView)
5443	{
5444	for (uint32_t i = 0; i < pBackendDXContext->cVideoProcessorInputView; ++i)
5445	D3D_RELEASE(pBackendDXContext->paVideoProcessorInputView[i].u.pVideoProcessorInputView);
5446	}
5447	if (pBackendDXContext->paVideoProcessorOutputView)
5448	{
5449	for (uint32_t i = 0; i < pBackendDXContext->cVideoProcessorOutputView; ++i)
5450	D3D_RELEASE(pBackendDXContext->paVideoProcessorOutputView[i].u.pVideoProcessorOutputView);
5451	}
5452
5453	RTMemFreeZ(pBackendDXContext->papBlendState, sizeof(pBackendDXContext->papBlendState[0]) * pBackendDXContext->cBlendState);
5454	RTMemFreeZ(pBackendDXContext->papDepthStencilState, sizeof(pBackendDXContext->papDepthStencilState[0]) * pBackendDXContext->cDepthStencilState);
5455	RTMemFreeZ(pBackendDXContext->papSamplerState, sizeof(pBackendDXContext->papSamplerState[0]) * pBackendDXContext->cSamplerState);
5456	RTMemFreeZ(pBackendDXContext->papRasterizerState, sizeof(pBackendDXContext->papRasterizerState[0]) * pBackendDXContext->cRasterizerState);
5457	RTMemFreeZ(pBackendDXContext->paElementLayout, sizeof(pBackendDXContext->paElementLayout[0]) * pBackendDXContext->cElementLayout);
5458	RTMemFreeZ(pBackendDXContext->paRenderTargetView, sizeof(pBackendDXContext->paRenderTargetView[0]) * pBackendDXContext->cRenderTargetView);
5459	RTMemFreeZ(pBackendDXContext->paDepthStencilView, sizeof(pBackendDXContext->paDepthStencilView[0]) * pBackendDXContext->cDepthStencilView);
5460	RTMemFreeZ(pBackendDXContext->paShaderResourceView, sizeof(pBackendDXContext->paShaderResourceView[0]) * pBackendDXContext->cShaderResourceView);
5461	RTMemFreeZ(pBackendDXContext->paQuery, sizeof(pBackendDXContext->paQuery[0]) * pBackendDXContext->cQuery);
5462	RTMemFreeZ(pBackendDXContext->paShader, sizeof(pBackendDXContext->paShader[0]) * pBackendDXContext->cShader);
5463	RTMemFreeZ(pBackendDXContext->paStreamOutput, sizeof(pBackendDXContext->paStreamOutput[0]) * pBackendDXContext->cStreamOutput);
5464	RTMemFreeZ(pBackendDXContext->paUnorderedAccessView, sizeof(pBackendDXContext->paUnorderedAccessView[0]) * pBackendDXContext->cUnorderedAccessView);
5465	RTMemFreeZ(pBackendDXContext->paVideoProcessor, sizeof(pBackendDXContext->paVideoProcessor[0]) * pBackendDXContext->cVideoProcessor);
5466	RTMemFreeZ(pBackendDXContext->paVideoDecoderOutputView, sizeof(pBackendDXContext->paVideoDecoderOutputView[0]) * pBackendDXContext->cVideoDecoderOutputView);
5467	RTMemFreeZ(pBackendDXContext->paVideoDecoder, sizeof(pBackendDXContext->paVideoDecoder[0]) * pBackendDXContext->cVideoDecoder);
5468	RTMemFreeZ(pBackendDXContext->paVideoProcessorInputView, sizeof(pBackendDXContext->paVideoProcessorInputView[0]) * pBackendDXContext->cVideoProcessorInputView);
5469	RTMemFreeZ(pBackendDXContext->paVideoProcessorOutputView, sizeof(pBackendDXContext->paVideoProcessorOutputView[0]) * pBackendDXContext->cVideoProcessorOutputView);
5470
5471	RTMemFreeZ(pBackendDXContext, sizeof(*pBackendDXContext));
5472	pDXContext->pBackendDXContext = NULL;
5473	}
5474	return VINF_SUCCESS;
5475	}
5476
5477
5478	static DECLCALLBACK(int) vmsvga3dBackDXBindContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5479	{
5480	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5481	RT_NOREF(pBackend, pDXContext);
5482	return VINF_SUCCESS;
5483	}
5484
5485
5486	static DECLCALLBACK(int) vmsvga3dBackDXSwitchContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5487	{
5488	/* The new context state will be applied by the generic DX code. */
5489	RT_NOREF(pThisCC, pDXContext);
5490	return VINF_SUCCESS;
5491	}
5492
5493
5494	static DECLCALLBACK(int) vmsvga3dBackDXReadbackContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5495	{
5496	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5497	RT_NOREF(pBackend, pDXContext);
5498	return VINF_SUCCESS;
5499	}
5500
5501
5502	static DECLCALLBACK(int) vmsvga3dBackDXInvalidateContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5503	{
5504	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5505
5506	RT_NOREF(pBackend, pDXContext);
5507	AssertFailed(); /** @todo Implement */
5508	return VERR_NOT_IMPLEMENTED;
5509	}
5510
5511
5512	static DECLCALLBACK(int) vmsvga3dBackDXSetSingleConstantBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t slot, SVGA3dShaderType type, SVGA3dSurfaceId sid, uint32_t offsetInBytes, uint32_t sizeInBytes)
5513	{
5514	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5515	RT_NOREF(pBackend);
5516
5517	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
5518	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5519
5520	if (sid == SVGA_ID_INVALID)
5521	{
5522	uint32_t const idxShaderState = type - SVGA3D_SHADERTYPE_MIN;
5523	D3D_RELEASE(pDXContext->pBackendDXContext->resources.shaderState[idxShaderState].constantBuffers[slot]);
5524	return VINF_SUCCESS;
5525	}
5526
5527	PVMSVGA3DSURFACE pSurface;
5528	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
5529	AssertRCReturn(rc, rc);
5530
5531	PVMSVGA3DMIPMAPLEVEL pMipLevel;
5532	rc = vmsvga3dMipmapLevel(pSurface, 0, 0, &pMipLevel);
5533	AssertRCReturn(rc, rc);
5534
5535	uint32_t const cbSurface = pMipLevel->cbSurface;
5536	ASSERT_GUEST_RETURN( offsetInBytes < cbSurface
5537	&& sizeInBytes <= cbSurface - offsetInBytes, VERR_INVALID_PARAMETER);
5538
5539	/* Constant buffers are created on demand. */
5540	Assert(pSurface->pBackendSurface == NULL);
5541
5542	/* Upload the current data, if any. */
5543	D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
5544	D3D11_SUBRESOURCE_DATA initialData;
5545	if (pMipLevel->pSurfaceData)
5546	{
5547	initialData.pSysMem = (uint8_t *)pMipLevel->pSurfaceData + offsetInBytes;
5548	initialData.SysMemPitch = sizeInBytes;
5549	initialData.SysMemSlicePitch = sizeInBytes;
5550
5551	pInitialData = &initialData;
5552
5553	#ifdef LOG_ENABLED
5554	if (LogIs8Enabled())
5555	{
5556	float pValuesF = (float )initialData.pSysMem;
5557	for (unsigned i = 0; i < sizeInBytes / sizeof(float) / 4; ++i)
5558	{
5559	Log8(("ConstF /%d/ " FLOAT_FMT_STR ", " FLOAT_FMT_STR ", " FLOAT_FMT_STR ", " FLOAT_FMT_STR ",\n",
5560	i, FLOAT_FMT_ARGS(pValuesF[i4 + 0]), FLOAT_FMT_ARGS(pValuesF[i4 + 1]), FLOAT_FMT_ARGS(pValuesF[i4 + 2]), FLOAT_FMT_ARGS(pValuesF[i4 + 3])));
5561	}
5562	}
5563	#endif
5564	}
5565
5566	D3D11_BUFFER_DESC bd;
5567	RT_ZERO(bd);
5568	bd.ByteWidth = sizeInBytes;
5569	bd.Usage = D3D11_USAGE_DEFAULT;
5570	bd.BindFlags = D3D11_BIND_CONSTANT_BUFFER;
5571	bd.CPUAccessFlags = 0;
5572	bd.MiscFlags = 0;
5573	bd.StructureByteStride = 0;
5574
5575	ID3D11Buffer *pBuffer = 0;
5576	HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBuffer);
5577	if (SUCCEEDED(hr))
5578	{
5579	uint32_t const idxShaderState = type - SVGA3D_SHADERTYPE_MIN;
5580	ID3D11Buffer **ppOldBuffer = &pDXContext->pBackendDXContext->resources.shaderState[idxShaderState].constantBuffers[slot];
5581	LogFunc(("constant buffer: [%u][%u]: sid = %u, %u, %u (%p -> %p)\n",
5582	idxShaderState, slot, sid, offsetInBytes, sizeInBytes, *ppOldBuffer, pBuffer));
5583	D3D_RELEASE(*ppOldBuffer);
5584	*ppOldBuffer = pBuffer;
5585	}
5586
5587	return VINF_SUCCESS;
5588	}
5589
5590	static int dxSetShaderResources(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderType type)
5591	{
5592	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
5593	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
5594
5595	AssertReturn(type >= SVGA3D_SHADERTYPE_MIN && type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
5596
5597	uint32_t const idxShaderState = type - SVGA3D_SHADERTYPE_MIN;
5598	uint32_t const *pSRIds = &pDXContext->svgaDXContext.shaderState[idxShaderState].shaderResources[0];
5599	ID3D11ShaderResourceView *papShaderResourceView[SVGA3D_DX_MAX_SRVIEWS];
5600	for (uint32_t i = 0; i < SVGA3D_DX_MAX_SRVIEWS; ++i)
5601	{
5602	SVGA3dShaderResourceViewId const shaderResourceViewId = pSRIds[i];
5603	if (shaderResourceViewId != SVGA3D_INVALID_ID)
5604	{
5605	ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->pBackendDXContext->cShaderResourceView, VERR_INVALID_PARAMETER);
5606
5607	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paShaderResourceView[shaderResourceViewId];
5608	Assert(pDXView->u.pShaderResourceView);
5609	papShaderResourceView[i] = pDXView->u.pShaderResourceView;
5610	}
5611	else
5612	papShaderResourceView[i] = NULL;
5613	}
5614
5615	dxShaderResourceViewSet(pDXDevice, type, 0, SVGA3D_DX_MAX_SRVIEWS, papShaderResourceView);
5616	return VINF_SUCCESS;
5617	}
5618
5619
5620	static DECLCALLBACK(int) vmsvga3dBackDXSetShaderResources(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startView, SVGA3dShaderType type, uint32_t cShaderResourceViewId, SVGA3dShaderResourceViewId const *paShaderResourceViewId)
5621	{
5622	/* Shader resources will be set in setupPipeline. */
5623	RT_NOREF(pThisCC, pDXContext, startView, type, cShaderResourceViewId, paShaderResourceViewId);
5624	return VINF_SUCCESS;
5625	}
5626
5627
5628	static DECLCALLBACK(int) vmsvga3dBackDXSetShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderId shaderId, SVGA3dShaderType type)
5629	{
5630	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5631	RT_NOREF(pBackend, pDXContext);
5632
5633	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
5634	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5635
5636	RT_NOREF(shaderId, type);
5637
5638	return VINF_SUCCESS;
5639	}
5640
5641
5642	static DECLCALLBACK(int) vmsvga3dBackDXSetSamplers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startSampler, SVGA3dShaderType type, uint32_t cSamplerId, SVGA3dSamplerId const *paSamplerId)
5643	{
5644	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5645	RT_NOREF(pBackend);
5646
5647	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
5648	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5649
5650	ID3D11SamplerState *papSamplerState[SVGA3D_DX_MAX_SAMPLERS];
5651	for (uint32_t i = 0; i < cSamplerId; ++i)
5652	{
5653	SVGA3dSamplerId samplerId = paSamplerId[i];
5654	if (samplerId != SVGA3D_INVALID_ID)
5655	{
5656	ASSERT_GUEST_RETURN(samplerId < pDXContext->pBackendDXContext->cSamplerState, VERR_INVALID_PARAMETER);
5657	papSamplerState[i] = pDXContext->pBackendDXContext->papSamplerState[samplerId];
5658	}
5659	else
5660	papSamplerState[i] = NULL;
5661	}
5662
5663	dxSamplerSet(pDevice, type, startSampler, cSamplerId, papSamplerState);
5664	return VINF_SUCCESS;
5665	}
5666
5667
5668	static void vboxDXMatchShaderInput(DXSHADER pDXShader, DXSHADER pDXShaderPrior)
5669	{
5670	/* For each input generic attribute of the shader find corresponding entry in the prior shader. */
5671	for (uint32_t i = 0; i < pDXShader->shaderInfo.cInputSignature; ++i)
5672	{
5673	SVGA3dDXSignatureEntry const *pSignatureEntry = &pDXShader->shaderInfo.aInputSignature[i];
5674	DXShaderAttributeSemantic *pSemantic = &pDXShader->shaderInfo.aInputSemantic[i];
5675
5676	if (pSignatureEntry->semanticName != SVGADX_SIGNATURE_SEMANTIC_NAME_UNDEFINED)
5677	continue;
5678
5679	int iMatch = -1;
5680	for (uint32_t iPrior = 0; iPrior < pDXShaderPrior->shaderInfo.cOutputSignature; ++iPrior)
5681	{
5682	SVGA3dDXSignatureEntry const *pPriorSignatureEntry = &pDXShaderPrior->shaderInfo.aOutputSignature[iPrior];
5683
5684	if (pPriorSignatureEntry->semanticName != SVGADX_SIGNATURE_SEMANTIC_NAME_UNDEFINED)
5685	continue;
5686
5687	if (pPriorSignatureEntry->registerIndex == pSignatureEntry->registerIndex)
5688	{
5689	iMatch = iPrior;
5690	if (pPriorSignatureEntry->mask == pSignatureEntry->mask)
5691	break; /* Exact match, no need to continue search. */
5692	}
5693	}
5694
5695	if (iMatch >= 0)
5696	{
5697	SVGA3dDXSignatureEntry const *pPriorSignatureEntry = &pDXShaderPrior->shaderInfo.aOutputSignature[iMatch];
5698	DXShaderAttributeSemantic const *pPriorSemantic = &pDXShaderPrior->shaderInfo.aOutputSemantic[iMatch];
5699
5700	Assert(pPriorSignatureEntry->registerIndex == pSignatureEntry->registerIndex);
5701	Assert((pPriorSignatureEntry->mask & pSignatureEntry->mask) == pSignatureEntry->mask);
5702	RT_NOREF(pPriorSignatureEntry);
5703
5704	pSemantic->SemanticIndex = pPriorSemantic->SemanticIndex;
5705	}
5706	}
5707	}
5708
5709
5710	static void vboxDXMatchShaderSignatures(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, DXSHADER *pDXShader)
5711	{
5712	SVGA3dShaderId const shaderIdVS = pDXContext->svgaDXContext.shaderState[SVGA3D_SHADERTYPE_VS - SVGA3D_SHADERTYPE_MIN].shaderId;
5713	SVGA3dShaderId const shaderIdHS = pDXContext->svgaDXContext.shaderState[SVGA3D_SHADERTYPE_HS - SVGA3D_SHADERTYPE_MIN].shaderId;
5714	SVGA3dShaderId const shaderIdDS = pDXContext->svgaDXContext.shaderState[SVGA3D_SHADERTYPE_DS - SVGA3D_SHADERTYPE_MIN].shaderId;
5715	SVGA3dShaderId const shaderIdGS = pDXContext->svgaDXContext.shaderState[SVGA3D_SHADERTYPE_GS - SVGA3D_SHADERTYPE_MIN].shaderId;
5716	SVGA3dShaderId const shaderIdPS = pDXContext->svgaDXContext.shaderState[SVGA3D_SHADERTYPE_PS - SVGA3D_SHADERTYPE_MIN].shaderId;
5717
5718	/* Try to fix the input semantic indices. Output is usually not changed. */
5719	switch (pDXShader->enmShaderType)
5720	{
5721	case SVGA3D_SHADERTYPE_VS:
5722	{
5723	/* Match input to input layout, which sets generic semantic indices to the source registerIndex (dxCreateInputLayout). */
5724	for (uint32_t i = 0; i < pDXShader->shaderInfo.cInputSignature; ++i)
5725	{
5726	SVGA3dDXSignatureEntry const *pSignatureEntry = &pDXShader->shaderInfo.aInputSignature[i];
5727	DXShaderAttributeSemantic *pSemantic = &pDXShader->shaderInfo.aInputSemantic[i];
5728
5729	if (pSignatureEntry->semanticName != SVGADX_SIGNATURE_SEMANTIC_NAME_UNDEFINED)
5730	continue;
5731
5732	pSemantic->SemanticIndex = pSignatureEntry->registerIndex;
5733	}
5734	break;
5735	}
5736	case SVGA3D_SHADERTYPE_HS:
5737	{
5738	/* Input of a HS shader is the output of VS. */
5739	DXSHADER *pDXShaderPrior;
5740	if (shaderIdVS != SVGA3D_INVALID_ID)
5741	pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdVS];
5742	else
5743	pDXShaderPrior = NULL;
5744
5745	if (pDXShaderPrior)
5746	vboxDXMatchShaderInput(pDXShader, pDXShaderPrior);
5747
5748	break;
5749	}
5750	case SVGA3D_SHADERTYPE_DS:
5751	{
5752	/* Input of a DS shader is the output of HS. */
5753	DXSHADER *pDXShaderPrior;
5754	if (shaderIdHS != SVGA3D_INVALID_ID)
5755	pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdHS];
5756	else
5757	pDXShaderPrior = NULL;
5758
5759	if (pDXShaderPrior)
5760	vboxDXMatchShaderInput(pDXShader, pDXShaderPrior);
5761
5762	break;
5763	}
5764	case SVGA3D_SHADERTYPE_GS:
5765	{
5766	/* Input signature of a GS shader is the output of DS or VS. */
5767	DXSHADER *pDXShaderPrior;
5768	if (shaderIdDS != SVGA3D_INVALID_ID)
5769	pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdDS];
5770	else if (shaderIdVS != SVGA3D_INVALID_ID)
5771	pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdVS];
5772	else
5773	pDXShaderPrior = NULL;
5774
5775	if (pDXShaderPrior)
5776	{
5777	/* If GS shader does not have input signature (Windows guest can do that),
5778	* then assign the prior shader signature as GS input.
5779	*/
5780	if (pDXShader->shaderInfo.cInputSignature == 0)
5781	{
5782	pDXShader->shaderInfo.cInputSignature = pDXShaderPrior->shaderInfo.cOutputSignature;
5783	memcpy(pDXShader->shaderInfo.aInputSignature,
5784	pDXShaderPrior->shaderInfo.aOutputSignature,
5785	pDXShaderPrior->shaderInfo.cOutputSignature * sizeof(SVGA3dDXSignatureEntry));
5786	memcpy(pDXShader->shaderInfo.aInputSemantic,
5787	pDXShaderPrior->shaderInfo.aOutputSemantic,
5788	pDXShaderPrior->shaderInfo.cOutputSignature * sizeof(DXShaderAttributeSemantic));
5789	}
5790	else
5791	vboxDXMatchShaderInput(pDXShader, pDXShaderPrior);
5792	}
5793
5794	/* Output signature of a GS shader is the input of the pixel shader. */
5795	if (shaderIdPS != SVGA3D_INVALID_ID)
5796	{
5797	/* If GS shader does not have output signature (Windows guest can do that),
5798	* then assign the PS shader signature as GS output.
5799	*/
5800	if (pDXShader->shaderInfo.cOutputSignature == 0)
5801	{
5802	DXSHADER const *pDXShaderPosterior = &pDXContext->pBackendDXContext->paShader[shaderIdPS];
5803	pDXShader->shaderInfo.cOutputSignature = pDXShaderPosterior->shaderInfo.cInputSignature;
5804	memcpy(pDXShader->shaderInfo.aOutputSignature,
5805	pDXShaderPosterior->shaderInfo.aInputSignature,
5806	pDXShaderPosterior->shaderInfo.cInputSignature * sizeof(SVGA3dDXSignatureEntry));
5807	memcpy(pDXShader->shaderInfo.aOutputSemantic,
5808	pDXShaderPosterior->shaderInfo.aInputSemantic,
5809	pDXShaderPosterior->shaderInfo.cInputSignature * sizeof(DXShaderAttributeSemantic));
5810	}
5811	}
5812
5813	SVGA3dStreamOutputId const soid = pDXContext->svgaDXContext.streamOut.soid;
5814	if (soid != SVGA3D_INVALID_ID)
5815	{
5816	ASSERT_GUEST_RETURN_VOID(soid < pDXContext->pBackendDXContext->cStreamOutput);
5817
5818	/* Set semantic names and indices for SO declaration entries according to the shader output. */
5819	SVGACOTableDXStreamOutputEntry const *pStreamOutputEntry = &pDXContext->cot.paStreamOutput[soid];
5820	DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[soid];
5821
5822	if (pDXStreamOutput->cDeclarationEntry == 0)
5823	{
5824	int rc = dxDefineStreamOutput(pThisCC, pDXContext, soid, pStreamOutputEntry, pDXShader);
5825	AssertRCReturnVoid(rc);
5826	#ifdef LOG_ENABLED
5827	Log6(("Stream output declaration:\n\n"));
5828	Log6(("Stream SemanticName SemanticIndex StartComponent ComponentCount OutputSlot\n"));
5829	Log6(("------ -------------- ------------- -------------- -------------- ----------\n"));
5830	for (unsigned i = 0; i < pDXStreamOutput->cDeclarationEntry; ++i)
5831	{
5832	D3D11_SO_DECLARATION_ENTRY *p = &pDXStreamOutput->aDeclarationEntry[i];
5833	Log6(("%d %-14s %d %d %d %d\n",
5834	p->Stream, p->SemanticName, p->SemanticIndex, p->StartComponent, p->ComponentCount, p->OutputSlot));
5835	}
5836	Log6(("\n"));
5837	#endif
5838
5839	}
5840	}
5841	break;
5842	}
5843	case SVGA3D_SHADERTYPE_PS:
5844	{
5845	/* Input of a PS shader is the output of GS, DS or VS. */
5846	DXSHADER *pDXShaderPrior;
5847	if (shaderIdGS != SVGA3D_INVALID_ID)
5848	pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdGS];
5849	else if (shaderIdDS != SVGA3D_INVALID_ID)
5850	pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdDS];
5851	else if (shaderIdVS != SVGA3D_INVALID_ID)
5852	pDXShaderPrior = &pDXContext->pBackendDXContext->paShader[shaderIdVS];
5853	else
5854	pDXShaderPrior = NULL;
5855
5856	if (pDXShaderPrior)
5857	vboxDXMatchShaderInput(pDXShader, pDXShaderPrior);
5858	break;
5859	}
5860	default:
5861	break;
5862	}
5863
5864	/* Intermediate shaders normally have both input and output signatures. However it is ok if they do not.
5865	* Just catch this unusual case in order to see if everything is fine.
5866	*/
5867	Assert( ( pDXShader->enmShaderType == SVGA3D_SHADERTYPE_VS
5868	\|\| pDXShader->enmShaderType == SVGA3D_SHADERTYPE_PS
5869	\|\| pDXShader->enmShaderType == SVGA3D_SHADERTYPE_CS)
5870	\|\| (pDXShader->shaderInfo.cInputSignature && pDXShader->shaderInfo.cOutputSignature));
5871	}
5872
5873
5874	static void vboxDXUpdateVSInputSignature(PVMSVGA3DDXCONTEXT pDXContext, DXSHADER *pDXShader)
5875	{
5876	SVGA3dElementLayoutId const elementLayoutId = pDXContext->svgaDXContext.inputAssembly.layoutId;
5877	if (elementLayoutId != SVGA3D_INVALID_ID)
5878	{
5879	SVGACOTableDXElementLayoutEntry const *pElementLayout = &pDXContext->cot.paElementLayout[elementLayoutId];
5880	for (uint32_t i = 0; i < RT_MIN(pElementLayout->numDescs, pDXShader->shaderInfo.cInputSignature); ++i)
5881	{
5882	SVGA3dInputElementDesc const *pElementDesc = &pElementLayout->descs[i];
5883	SVGA3dDXSignatureEntry *pSignatureEntry = &pDXShader->shaderInfo.aInputSignature[i];
5884	pSignatureEntry->componentType = DXShaderComponentTypeFromFormat(pElementDesc->format);
5885	}
5886	}
5887	}
5888
5889
5890	static void dxCreateInputLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId, DXSHADER *pDXShader)
5891	{
5892	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
5893	AssertReturnVoid(pDevice->pDevice);
5894
5895	SVGACOTableDXElementLayoutEntry const *pEntry = &pDXContext->cot.paElementLayout[elementLayoutId];
5896	DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
5897
5898	if (pDXElementLayout->cElementDesc == 0)
5899	{
5900	/* Semantic name is not interpreted by D3D, therefore arbitrary names can be used
5901	* if they are consistent between the element layout and shader input signature.
5902	* "In general, data passed between pipeline stages is completely generic and is not uniquely
5903	* interpreted by the system; arbitrary semantics are allowed ..."
5904	*
5905	* However D3D runtime insists that "SemanticName string ("POSITIO1") cannot end with a number."
5906	*
5907	* System-Value semantics ("SV_*") between shaders require proper names of course.
5908	* But they are irrelevant for input attributes.
5909	*/
5910	pDXElementLayout->cElementDesc = pEntry->numDescs;
5911	for (uint32_t i = 0; i < pEntry->numDescs; ++i)
5912	{
5913	D3D11_INPUT_ELEMENT_DESC *pDst = &pDXElementLayout->aElementDesc[i];
5914	SVGA3dInputElementDesc const *pSrc = &pEntry->descs[i];
5915	pDst->SemanticName = "ATTRIB";
5916	pDst->SemanticIndex = pSrc->inputRegister;
5917	pDst->Format = vmsvgaDXSurfaceFormat2Dxgi(pSrc->format);
5918	Assert(pDst->Format != DXGI_FORMAT_UNKNOWN);
5919	pDst->InputSlot = pSrc->inputSlot;
5920	pDst->AlignedByteOffset = pSrc->alignedByteOffset;
5921	pDst->InputSlotClass = (D3D11_INPUT_CLASSIFICATION)pSrc->inputSlotClass;
5922	pDst->InstanceDataStepRate = pSrc->instanceDataStepRate;
5923	}
5924	}
5925
5926	HRESULT hr = pDevice->pDevice->CreateInputLayout(pDXElementLayout->aElementDesc,
5927	pDXElementLayout->cElementDesc,
5928	pDXShader->pvDXBC,
5929	pDXShader->cbDXBC,
5930	&pDXElementLayout->pElementLayout);
5931	Assert(SUCCEEDED(hr)); RT_NOREF(hr);
5932	}
5933
5934
5935	static void dxSetConstantBuffers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5936	{
5937	//DEBUG_BREAKPOINT_TEST();
5938	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5939	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
5940	VMSVGA3DBACKENDDXCONTEXT *pBackendDXContext = pDXContext->pBackendDXContext;
5941
5942	AssertCompile(RT_ELEMENTS(pBackendDXContext->resources.shaderState[0].constantBuffers) == SVGA3D_DX_MAX_CONSTBUFFERS);
5943
5944	for (uint32_t idxShaderState = 0; idxShaderState < SVGA3D_NUM_SHADERTYPE; ++idxShaderState)
5945	{
5946	SVGA3dShaderType const shaderType = (SVGA3dShaderType)(idxShaderState + SVGA3D_SHADERTYPE_MIN);
5947	for (uint32_t idxSlot = 0; idxSlot < SVGA3D_DX_MAX_CONSTBUFFERS; ++idxSlot)
5948	{
5949	ID3D11Buffer **pBufferContext = &pBackendDXContext->resources.shaderState[idxShaderState].constantBuffers[idxSlot];
5950	ID3D11Buffer **pBufferPipeline = &pBackend->resources.shaderState[idxShaderState].constantBuffers[idxSlot];
5951	if (pBufferContext != pBufferPipeline)
5952	{
5953	LogFunc(("constant buffer: [%u][%u]: %p -> %p\n",
5954	idxShaderState, idxSlot, pBufferPipeline, pBufferContext));
5955	dxConstantBufferSet(pDXDevice, idxSlot, shaderType, *pBufferContext);
5956
5957	if (*pBufferContext)
5958	(*pBufferContext)->AddRef();
5959	D3D_RELEASE(*pBufferPipeline);
5960	pBufferPipeline = pBufferContext;
5961	}
5962	}
5963	}
5964	}
5965
5966	static void dxSetVertexBuffers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5967	{
5968	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5969
5970	ID3D11Buffer *paResources[SVGA3D_DX_MAX_VERTEXBUFFERS];
5971	UINT paStride[SVGA3D_DX_MAX_VERTEXBUFFERS];
5972	UINT paOffset[SVGA3D_DX_MAX_VERTEXBUFFERS];
5973
5974	int32_t idxMinSlot = SVGA3D_DX_MAX_VERTEXBUFFERS;
5975	int32_t idxMaxSlot = -1;
5976	for (int32_t i = 0; i < SVGA3D_DX_MAX_VERTEXBUFFERS; ++i)
5977	{
5978	SVGA3dBufferBinding const *pBufferContext = &pDXContext->svgaDXContext.inputAssembly.vertexBuffers[i];
5979	SVGA3dBufferBinding *pBufferPipeline = &pBackend->svgaDXContext.inputAssembly.vertexBuffers[i];
5980
5981	if ( pBufferContext->bufferId != pBufferPipeline->bufferId
5982	\|\| pBufferContext->stride != pBufferPipeline->stride
5983	\|\| pBufferContext->offset != pBufferPipeline->offset)
5984	{
5985	/* The slot has a new buffer. */
5986	LogFunc(("vb[%u]: sid = %u, stride %d, off %d -> sid = %u, stride %d, off %d\n",
5987	i, pBufferPipeline->bufferId, pBufferPipeline->stride, pBufferPipeline->offset,
5988	pBufferContext->bufferId, pBufferContext->stride, pBufferContext->offset));
5989
5990	pBufferPipeline = pBufferContext;
5991
5992	idxMaxSlot = RT_MAX(idxMaxSlot, i);
5993	idxMinSlot = RT_MIN(idxMinSlot, i);
5994	}
5995	#ifdef LOG_ENABLED
5996	else if (pBufferPipeline->bufferId != SVGA3D_INVALID_ID)
5997	{
5998	LogFunc(("vb[%u]: sid = %u, stride %d, off %d\n",
5999	i, pBufferPipeline->bufferId, pBufferPipeline->stride, pBufferPipeline->offset));
6000	}
6001	#endif
6002	PVMSVGA3DSURFACE pSurface = NULL;
6003	ID3D11Buffer *pBuffer = NULL;
6004	if (pBufferPipeline->bufferId != SVGA3D_INVALID_ID)
6005	{
6006	ID3D11Resource *pResource;
6007	int rc = dxEnsureResource(pThisCC, pBufferPipeline->bufferId, &pSurface, &pResource);
6008	if ( RT_SUCCESS(rc)
6009	&& pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
6010	pBuffer = (ID3D11Buffer *)pResource;
6011	else
6012	AssertMsgFailed(("%Rrc %p %d\n", rc, pSurface->pBackendSurface, pSurface->pBackendSurface ? pSurface->pBackendSurface->enmResType : VMSVGA3D_RESTYPE_NONE));
6013	}
6014
6015	paResources[i] = pBuffer;
6016	if (pBuffer)
6017	{
6018	LogFunc(("vb[%u]: %p\n", i, pBuffer));
6019
6020	/* DX11 supports stride up tp 2048. Ignore large values (> 40000) that Ubuntu guest might send. */
6021	paStride[i] = pBufferPipeline->stride <= 2048 ? pBufferPipeline->stride : 0;
6022
6023	if ( paStride[i] <= pSurface->paMipmapLevels[0].cbSurface
6024	&& pBufferPipeline->offset <= pSurface->paMipmapLevels[0].cbSurface - paStride[i])
6025	paOffset[i] = pBufferPipeline->offset;
6026	else
6027	{
6028	paStride[i] = 0;
6029	paOffset[i] = 0;
6030	}
6031	}
6032	else
6033	{
6034	paStride[i] = 0;
6035	paOffset[i] = 0;
6036	}
6037	}
6038
6039	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
6040	LogFunc(("idxMinSlot = %d, idxMaxSlot = %d\n", idxMinSlot, idxMaxSlot));
6041	if (idxMaxSlot >= 0)
6042	pDXDevice->pImmediateContext->IASetVertexBuffers(idxMinSlot, (idxMaxSlot - idxMinSlot) + 1,
6043	&paResources[idxMinSlot], &paStride[idxMinSlot], &paOffset[idxMinSlot]);
6044	}
6045
6046	static void dxSetIndexBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6047	{
6048	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6049
6050	SVGADXContextMobFormat *pPipelineState = &pBackend->svgaDXContext;
6051	SVGADXContextMobFormat const *pContextState = &pDXContext->svgaDXContext;
6052
6053	if ( pPipelineState->inputAssembly.indexBufferSid != pContextState->inputAssembly.indexBufferSid
6054	\|\| pPipelineState->inputAssembly.indexBufferOffset != pContextState->inputAssembly.indexBufferOffset
6055	\|\| pPipelineState->inputAssembly.indexBufferFormat != pContextState->inputAssembly.indexBufferFormat)
6056	{
6057	LogFunc(("ib: sid = %u, offset %u, fmt %u -> sid = %u, offset %u, fmt %u\n",
6058	pPipelineState->inputAssembly.indexBufferSid, pPipelineState->inputAssembly.indexBufferOffset, pPipelineState->inputAssembly.indexBufferFormat,
6059	pContextState->inputAssembly.indexBufferSid, pContextState->inputAssembly.indexBufferOffset, pContextState->inputAssembly.indexBufferFormat));
6060
6061	pPipelineState->inputAssembly.indexBufferSid = pContextState->inputAssembly.indexBufferSid;
6062	pPipelineState->inputAssembly.indexBufferOffset = pContextState->inputAssembly.indexBufferOffset;
6063	pPipelineState->inputAssembly.indexBufferFormat = pContextState->inputAssembly.indexBufferFormat;
6064	}
6065	#ifdef LOG_ENABLED
6066	else if (pPipelineState->inputAssembly.indexBufferSid != SVGA3D_INVALID_ID)
6067	{
6068	LogFunc(("ib: sid = %u, offset %u, fmt %u\n",
6069	pPipelineState->inputAssembly.indexBufferSid, pPipelineState->inputAssembly.indexBufferOffset, pPipelineState->inputAssembly.indexBufferFormat));
6070	}
6071	#endif
6072
6073	ID3D11Buffer *pBuffer = NULL;
6074	if (pPipelineState->inputAssembly.indexBufferSid != SVGA3D_INVALID_ID)
6075	{
6076	PVMSVGA3DSURFACE pSurface;
6077	ID3D11Resource *pResource;
6078	int rc = dxEnsureResource(pThisCC, pPipelineState->inputAssembly.indexBufferSid, &pSurface, &pResource);
6079	if ( RT_SUCCESS(rc)
6080	&& pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
6081	pBuffer = (ID3D11Buffer *)pResource;
6082	else
6083	AssertMsgFailed(("%Rrc %p %d\n", rc, pSurface->pBackendSurface, pSurface->pBackendSurface ? pSurface->pBackendSurface->enmResType : VMSVGA3D_RESTYPE_NONE));
6084	}
6085
6086	DXGI_FORMAT enmDxgiFormat;
6087	UINT Offset;
6088	if (pBuffer)
6089	{
6090	enmDxgiFormat = vmsvgaDXSurfaceFormat2Dxgi((SVGA3dSurfaceFormat)pPipelineState->inputAssembly.indexBufferFormat);
6091	AssertReturnVoid(enmDxgiFormat == DXGI_FORMAT_R16_UINT \|\| enmDxgiFormat == DXGI_FORMAT_R32_UINT);
6092	Offset = pPipelineState->inputAssembly.indexBufferOffset;
6093	}
6094	else
6095	{
6096	enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
6097	Offset = 0;
6098	}
6099
6100	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
6101	pDXDevice->pImmediateContext->IASetIndexBuffer(pBuffer, enmDxgiFormat, Offset);
6102	}
6103
6104	#ifdef LOG_ENABLED
6105	static void dxDbgLogVertexElement(DXGI_FORMAT Format, void const *pvElementData)
6106	{
6107	switch (Format)
6108	{
6109	case DXGI_FORMAT_R32G32B32A32_FLOAT:
6110	{
6111	float const pValues = (float const )pvElementData;
6112	Log8(("{ " FLOAT_FMT_STR ", " FLOAT_FMT_STR ", " FLOAT_FMT_STR ", " FLOAT_FMT_STR " },",
6113	FLOAT_FMT_ARGS(pValues[0]), FLOAT_FMT_ARGS(pValues[1]), FLOAT_FMT_ARGS(pValues[2]), FLOAT_FMT_ARGS(pValues[3])));
6114	break;
6115	}
6116	case DXGI_FORMAT_R32G32B32_FLOAT:
6117	{
6118	float const pValues = (float const )pvElementData;
6119	Log8(("{ " FLOAT_FMT_STR ", " FLOAT_FMT_STR ", " FLOAT_FMT_STR " },",
6120	FLOAT_FMT_ARGS(pValues[0]), FLOAT_FMT_ARGS(pValues[1]), FLOAT_FMT_ARGS(pValues[2])));
6121	break;
6122	}
6123	case DXGI_FORMAT_R32G32_FLOAT:
6124	{
6125	float const pValues = (float const )pvElementData;
6126	Log8(("{ " FLOAT_FMT_STR ", " FLOAT_FMT_STR " },",
6127	FLOAT_FMT_ARGS(pValues[0]), FLOAT_FMT_ARGS(pValues[1])));
6128	break;
6129	}
6130	case DXGI_FORMAT_R32_FLOAT:
6131	{
6132	float const pValues = (float const )pvElementData;
6133	Log8(("{ " FLOAT_FMT_STR " },",
6134	FLOAT_FMT_ARGS(pValues[0])));
6135	break;
6136	}
6137	case DXGI_FORMAT_R16G16B16A16_FLOAT:
6138	{
6139	uint16_t const pValues = (uint16_t const )pvElementData;
6140	Log8(("{ /f16/ " FLOAT_FMT_STR ", " FLOAT_FMT_STR ", " FLOAT_FMT_STR ", " FLOAT_FMT_STR " },",
6141	FLOAT_FMT_ARGS(float16ToFloat(pValues[0])), FLOAT_FMT_ARGS(float16ToFloat(pValues[1])),
6142	FLOAT_FMT_ARGS(float16ToFloat(pValues[2])), FLOAT_FMT_ARGS(float16ToFloat(pValues[3]))));
6143	break;
6144	}
6145	case DXGI_FORMAT_R16G16_FLOAT:
6146	{
6147	uint16_t const pValues = (uint16_t const )pvElementData;
6148	Log8(("{ /f16/ " FLOAT_FMT_STR ", " FLOAT_FMT_STR " },",
6149	FLOAT_FMT_ARGS(float16ToFloat(pValues[0])), FLOAT_FMT_ARGS(float16ToFloat(pValues[1]))));
6150	break;
6151	}
6152	case DXGI_FORMAT_R32G32_SINT:
6153	{
6154	int32_t const pValues = (int32_t const )pvElementData;
6155	Log8(("{ %d, %d },",
6156	pValues[0], pValues[1]));
6157	break;
6158	}
6159	case DXGI_FORMAT_R32G32_UINT:
6160	{
6161	uint32_t const pValues = (uint32_t const )pvElementData;
6162	Log8(("{ %u, %u },",
6163	pValues[0], pValues[1]));
6164	break;
6165	}
6166	case DXGI_FORMAT_R32_SINT:
6167	{
6168	int32_t const pValues = (int32_t const )pvElementData;
6169	Log8(("{ %d },",
6170	pValues[0]));
6171	break;
6172	}
6173	case DXGI_FORMAT_R32_UINT:
6174	{
6175	uint32_t const pValues = (uint32_t const )pvElementData;
6176	Log8(("{ %u },",
6177	pValues[0]));
6178	break;
6179	}
6180	case DXGI_FORMAT_R16G16B16A16_SINT:
6181	{
6182	int16_t const pValues = (int16_t const )pvElementData;
6183	Log8(("{ /s16/ %d, %d, %d, %d },",
6184	pValues[0], pValues[1], pValues[2], pValues[3]));
6185	break;
6186	}
6187	case DXGI_FORMAT_R16G16_SINT:
6188	{
6189	int16_t const pValues = (int16_t const )pvElementData;
6190	Log8(("{ /s16/ %d, %d },",
6191	pValues[0], pValues[1]));
6192	break;
6193	}
6194	case DXGI_FORMAT_R16G16_UINT:
6195	{
6196	uint16_t const pValues = (uint16_t const )pvElementData;
6197	Log8(("{ /u16/ %u, %u },",
6198	pValues[0], pValues[1]));
6199	break;
6200	}
6201	case DXGI_FORMAT_R16G16_SNORM:
6202	{
6203	int16_t const pValues = (int16_t const )pvElementData;
6204	Log8(("{ /sn16/ 0x%x, 0x%x },",
6205	pValues[0], pValues[1]));
6206	break;
6207	}
6208	case DXGI_FORMAT_R16G16_UNORM:
6209	{
6210	uint16_t const pValues = (uint16_t const )pvElementData;
6211	Log8(("{ /un16/ 0x%x, 0x%x },",
6212	pValues[0], pValues[1]));
6213	break;
6214	}
6215	case DXGI_FORMAT_R16_UINT:
6216	{
6217	uint16_t const pValues = (uint16_t const )pvElementData;
6218	Log8(("{ /u16/ %u },",
6219	pValues[0]));
6220	break;
6221	}
6222	case DXGI_FORMAT_R8G8B8A8_SINT:
6223	{
6224	uint8_t const pValues = (uint8_t const )pvElementData;
6225	Log8(("{ /8sint/ %d, %d, %d, %d },",
6226	pValues[0], pValues[1], pValues[2], pValues[3]));
6227	break;
6228	}
6229	case DXGI_FORMAT_R8G8B8A8_UINT:
6230	{
6231	uint8_t const pValues = (uint8_t const )pvElementData;
6232	Log8(("{ /8uint/ %u, %u, %u, %u },",
6233	pValues[0], pValues[1], pValues[2], pValues[3]));
6234	break;
6235	}
6236	case DXGI_FORMAT_B8G8R8A8_UNORM:
6237	{
6238	uint8_t const pValues = (uint8_t const )pvElementData;
6239	Log8(("{ /8unorm/ %u, %u, %u, %u },",
6240	pValues[0], pValues[1], pValues[2], pValues[3]));
6241	break;
6242	}
6243	case DXGI_FORMAT_R8G8B8A8_UNORM:
6244	{
6245	uint8_t const pValues = (uint8_t const )pvElementData;
6246	Log8(("{ /8unorm/ %u, %u, %u, %u },",
6247	pValues[0], pValues[1], pValues[2], pValues[3]));
6248	break;
6249	}
6250	case DXGI_FORMAT_R8G8_UNORM:
6251	{
6252	uint8_t const pValues = (uint8_t const )pvElementData;
6253	Log8(("{ /8unorm/ %u, %u },",
6254	pValues[0], pValues[1]));
6255	break;
6256	}
6257	case DXGI_FORMAT_R8_UINT:
6258	{
6259	uint8_t const pValues = (uint8_t const )pvElementData;
6260	Log8(("{ /8unorm/ %u },",
6261	pValues[0]));
6262	break;
6263	}
6264	default:
6265	Log8(("{ ??? DXGI_FORMAT %d },",
6266	Format));
6267	AssertFailed();
6268	}
6269	}
6270
6271
6272	static void dxDbgDumpVertexData(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t vertexCount, uint32_t startVertexLocation)
6273	{
6274	for (uint32_t iSlot = 0; iSlot < SVGA3D_DX_MAX_VERTEXBUFFERS; ++iSlot)
6275	{
6276	SVGA3dBufferBinding const *pVBInfo = &pDXContext->svgaDXContext.inputAssembly.vertexBuffers[iSlot];
6277	if (pVBInfo->bufferId == SVGA3D_INVALID_ID)
6278	continue;
6279
6280	PVMSVGA3DSURFACE pSurface = NULL;
6281	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pVBInfo->bufferId, &pSurface);
6282	AssertContinue(RT_SUCCESS(rc));
6283	AssertContinue(pSurface->pBackendSurface->u.pBuffer && pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER);
6284
6285	SVGA3dSurfaceImageId image;
6286	image.sid = pVBInfo->bufferId;
6287	image.face = 0;
6288	image.mipmap = 0;
6289
6290	VMSVGA3D_MAPPED_SURFACE map;
6291	rc = vmsvga3dBackSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
6292	AssertRC(rc);
6293	if (RT_SUCCESS(rc))
6294	{
6295	uint8_t const pu8VertexData = (uint8_t )map.pvData;
6296	pu8VertexData += pVBInfo->offset;
6297	pu8VertexData += startVertexLocation * pVBInfo->stride;
6298
6299	SVGA3dElementLayoutId const elementLayoutId = pDXContext->svgaDXContext.inputAssembly.layoutId;
6300	DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
6301	Assert(pDXElementLayout->cElementDesc > 0);
6302
6303	Log8(("Vertex buffer dump: sid = %u, vertexCount %u, startVertexLocation %d, offset = %d, stride = %d:\n",
6304	pVBInfo->bufferId, vertexCount, startVertexLocation, pVBInfo->offset, pVBInfo->stride));
6305
6306	for (uint32_t v = 0; v < vertexCount; ++v)
6307	{
6308	Log8(("slot[%u] /* v%u */ { ", iSlot, startVertexLocation + v));
6309
6310	for (uint32_t iElement = 0; iElement < pDXElementLayout->cElementDesc; ++iElement)
6311	{
6312	D3D11_INPUT_ELEMENT_DESC *pElement = &pDXElementLayout->aElementDesc[iElement];
6313	if (pElement->InputSlot == iSlot)
6314	dxDbgLogVertexElement(pElement->Format, pu8VertexData + pElement->AlignedByteOffset);
6315	}
6316
6317	Log8((" },\n"));
6318
6319	if (pVBInfo->stride == 0)
6320	break;
6321
6322	pu8VertexData += pVBInfo->stride;
6323	}
6324
6325	vmsvga3dBackSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
6326	}
6327	}
6328	}
6329
6330
6331	static void dxDbgDumpIndexedVertexData(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t indexCount, uint32_t startIndexLocation, int32_t baseVertexLocation)
6332	{
6333	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
6334
6335	uint32_t const indexBufferSid = pDXContext->svgaDXContext.inputAssembly.indexBufferSid;
6336	if (indexBufferSid == SVGA3D_INVALID_ID)
6337	return;
6338	uint32_t const indexBufferFormat = pDXContext->svgaDXContext.inputAssembly.indexBufferFormat;
6339	uint32_t const indexBufferOffset = pDXContext->svgaDXContext.inputAssembly.indexBufferOffset;
6340
6341	PVMSVGA3DSURFACE pSurface = NULL;
6342	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, indexBufferSid, &pSurface);
6343	AssertReturnVoid(RT_SUCCESS(rc));
6344	AssertReturnVoid(pSurface->pBackendSurface->u.pBuffer && pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER);
6345
6346	UINT const BytesPerIndex = indexBufferFormat == SVGA3D_R16_UINT ? 2 : 4;
6347
6348	void *pvIndexBuffer;
6349	uint32_t cbIndexBuffer;
6350	rc = dxReadBuffer(pDXDevice, pSurface->pBackendSurface->u.pBuffer,
6351	indexBufferOffset + startIndexLocation * BytesPerIndex,
6352	indexCount * BytesPerIndex, &pvIndexBuffer, &cbIndexBuffer);
6353	AssertRC(rc);
6354	if (RT_SUCCESS(rc))
6355	{
6356	uint8_t const pu8IndexData = (uint8_t )pvIndexBuffer;
6357
6358	for (uint32_t iSlot = 0; iSlot < SVGA3D_DX_MAX_VERTEXBUFFERS; ++iSlot)
6359	{
6360	SVGA3dBufferBinding const *pVBInfo = &pDXContext->svgaDXContext.inputAssembly.vertexBuffers[iSlot];
6361	if (pVBInfo->bufferId == SVGA3D_INVALID_ID)
6362	continue;
6363
6364	pSurface = NULL;
6365	rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pVBInfo->bufferId, &pSurface);
6366	AssertContinue(RT_SUCCESS(rc));
6367	AssertContinue(pSurface->pBackendSurface->u.pBuffer && pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER);
6368
6369	SVGA3dSurfaceImageId image;
6370	image.sid = pVBInfo->bufferId;
6371	image.face = 0;
6372	image.mipmap = 0;
6373
6374	VMSVGA3D_MAPPED_SURFACE mapVB;
6375	rc = vmsvga3dBackSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &mapVB);
6376	AssertRC(rc);
6377	if (RT_SUCCESS(rc))
6378	{
6379	uint8_t const pu8VertexData = (uint8_t )mapVB.pvData;
6380	pu8VertexData += pVBInfo->offset;
6381	pu8VertexData += baseVertexLocation * pVBInfo->stride;
6382
6383	SVGA3dElementLayoutId const elementLayoutId = pDXContext->svgaDXContext.inputAssembly.layoutId;
6384	DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
6385	Assert(pDXElementLayout->cElementDesc > 0);
6386
6387	Log8(("Vertex buffer dump: sid = %u, indexCount %u, startIndexLocation %d, baseVertexLocation %d, offset = %d, stride = %d:\n",
6388	pVBInfo->bufferId, indexCount, startIndexLocation, baseVertexLocation, pVBInfo->offset, pVBInfo->stride));
6389
6390	for (uint32_t i = 0; i < indexCount; ++i)
6391	{
6392	uint32_t Index;
6393	if (BytesPerIndex == 2)
6394	Index = ((uint16_t *)pu8IndexData)[i];
6395	else
6396	Index = ((uint32_t *)pu8IndexData)[i];
6397
6398	Log8(("slot[%u] /* v%u */ { ", iSlot, Index));
6399
6400	for (uint32_t iElement = 0; iElement < pDXElementLayout->cElementDesc; ++iElement)
6401	{
6402	D3D11_INPUT_ELEMENT_DESC *pElement = &pDXElementLayout->aElementDesc[iElement];
6403	if (pElement->InputSlotClass != D3D11_INPUT_PER_VERTEX_DATA)
6404	continue;
6405
6406	if (pElement->InputSlot == iSlot)
6407	{
6408	uint8_t const pu8Vertex = pu8VertexData + Index pVBInfo->stride;
6409	dxDbgLogVertexElement(pElement->Format, pu8Vertex + pElement->AlignedByteOffset);
6410	}
6411	}
6412
6413	Log8((" },\n"));
6414
6415	if (pVBInfo->stride == 0)
6416	break;
6417	}
6418
6419	vmsvga3dBackSurfaceUnmap(pThisCC, &image, &mapVB, /* fWritten = */ false);
6420	}
6421	}
6422
6423	RTMemFree(pvIndexBuffer);
6424	}
6425	}
6426
6427
6428	static void dxDbgDumpInstanceData(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t instanceCount, uint32_t startInstanceLocation)
6429	{
6430	/*
6431	* Dump per-instance data.
6432	*/
6433	for (uint32_t iInstance = 0; iInstance < instanceCount; ++iInstance)
6434	{
6435	for (uint32_t iSlot = 0; iSlot < SVGA3D_DX_MAX_VERTEXBUFFERS; ++iSlot)
6436	{
6437	SVGA3dBufferBinding const *pVBInfo = &pDXContext->svgaDXContext.inputAssembly.vertexBuffers[iSlot];
6438	if (pVBInfo->bufferId == SVGA3D_INVALID_ID)
6439	continue;
6440
6441	PVMSVGA3DSURFACE pSurface = NULL;
6442	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pVBInfo->bufferId, &pSurface);
6443	AssertContinue(RT_SUCCESS(rc));
6444	AssertContinue(pSurface->pBackendSurface->u.pBuffer && pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER);
6445
6446	SVGA3dSurfaceImageId image;
6447	image.sid = pVBInfo->bufferId;
6448	image.face = 0;
6449	image.mipmap = 0;
6450
6451	VMSVGA3D_MAPPED_SURFACE mapVB;
6452	rc = vmsvga3dBackSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &mapVB);
6453	AssertRC(rc);
6454	if (RT_SUCCESS(rc))
6455	{
6456	uint8_t const pu8VertexData = (uint8_t )mapVB.pvData;
6457	pu8VertexData += pVBInfo->offset;
6458	pu8VertexData += startInstanceLocation * pVBInfo->stride;
6459
6460	SVGA3dElementLayoutId const elementLayoutId = pDXContext->svgaDXContext.inputAssembly.layoutId;
6461	DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
6462	Assert(pDXElementLayout->cElementDesc > 0);
6463
6464	Log8(("Instance data dump: sid = %u, iInstance %u, startInstanceLocation %d, offset = %d, stride = %d:\n",
6465	pVBInfo->bufferId, iInstance, startInstanceLocation, pVBInfo->offset, pVBInfo->stride));
6466
6467	Log8(("slot[%u] /* i%u */ { ", iSlot, iInstance));
6468	for (uint32_t iElement = 0; iElement < pDXElementLayout->cElementDesc; ++iElement)
6469	{
6470	D3D11_INPUT_ELEMENT_DESC *pElement = &pDXElementLayout->aElementDesc[iElement];
6471	if (pElement->InputSlotClass != D3D11_INPUT_PER_INSTANCE_DATA)
6472	continue;
6473
6474	if (pElement->InputSlot == iSlot)
6475	{
6476	uint8_t const pu8Vertex = pu8VertexData + iInstance pVBInfo->stride;
6477	dxDbgLogVertexElement(pElement->Format, pu8Vertex + pElement->AlignedByteOffset);
6478	}
6479	}
6480	Log8((" },\n"));
6481
6482	vmsvga3dBackSurfaceUnmap(pThisCC, &image, &mapVB, /* fWritten = */ false);
6483	}
6484	}
6485	}
6486	}
6487
6488	static void dxDbgDumpVertices_Draw(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t vertexCount, uint32_t startVertexLocation)
6489	{
6490	dxDbgDumpVertexData(pThisCC, pDXContext, vertexCount, startVertexLocation);
6491	}
6492
6493
6494	static void dxDbgDumpVertices_DrawIndexed(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t indexCount, uint32_t startIndexLocation, int32_t baseVertexLocation)
6495	{
6496	dxDbgDumpIndexedVertexData(pThisCC, pDXContext, indexCount, startIndexLocation, baseVertexLocation);
6497	}
6498
6499
6500	static void dxDbgDumpVertices_DrawInstanced(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
6501	uint32_t vertexCountPerInstance, uint32_t instanceCount,
6502	uint32_t startVertexLocation, uint32_t startInstanceLocation)
6503	{
6504	dxDbgDumpVertexData(pThisCC, pDXContext, vertexCountPerInstance, startVertexLocation);
6505	dxDbgDumpInstanceData(pThisCC, pDXContext, instanceCount, startInstanceLocation);
6506	}
6507
6508
6509	static void dxDbgDumpVertices_DrawIndexedInstanced(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
6510	uint32_t indexCountPerInstance, uint32_t instanceCount,
6511	uint32_t startIndexLocation, int32_t baseVertexLocation,
6512	uint32_t startInstanceLocation)
6513	{
6514	dxDbgDumpIndexedVertexData(pThisCC, pDXContext, indexCountPerInstance, startIndexLocation, baseVertexLocation);
6515	dxDbgDumpInstanceData(pThisCC, pDXContext, instanceCount, startInstanceLocation);
6516	}
6517	#endif
6518
6519
6520	static int dxCreateRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGACOTableDXRTViewEntry const *pEntry)
6521	{
6522	PVMSVGA3DSURFACE pSurface;
6523	ID3D11Resource *pResource;
6524	int rc = dxEnsureResource(pThisCC, pEntry->sid, &pSurface, &pResource);
6525	AssertRCReturn(rc, rc);
6526
6527	DXVIEW *pView = &pDXContext->pBackendDXContext->paRenderTargetView[renderTargetViewId];
6528	Assert(pView->u.pView == NULL);
6529
6530	ID3D11RenderTargetView *pRenderTargetView;
6531	HRESULT hr = dxRenderTargetViewCreate(pThisCC, pEntry, pSurface, &pRenderTargetView);
6532	AssertReturn(SUCCEEDED(hr), VERR_INVALID_STATE);
6533
6534	return dxViewInit(pView, pSurface, pDXContext, renderTargetViewId, VMSVGA3D_VIEWTYPE_RENDERTARGET, pRenderTargetView);
6535	}
6536
6537
6538	static int dxEnsureRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId viewId, DXVIEW **ppResult)
6539	{
6540	ASSERT_GUEST_RETURN(viewId < pDXContext->cot.cRTView, VERR_INVALID_PARAMETER);
6541
6542	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paRenderTargetView[viewId];
6543	if (!pDXView->u.pView)
6544	{
6545	SVGACOTableDXRTViewEntry const *pEntry = &pDXContext->cot.paRTView[viewId];
6546	int rc = dxCreateRenderTargetView(pThisCC, pDXContext, viewId, pEntry);
6547	AssertRCReturn(rc, rc);
6548	}
6549	*ppResult = pDXView;
6550	return VINF_SUCCESS;
6551	}
6552
6553
6554	static int dxCreateDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, SVGACOTableDXDSViewEntry const *pEntry)
6555	{
6556	PVMSVGA3DSURFACE pSurface;
6557	ID3D11Resource *pResource;
6558	int rc = dxEnsureResource(pThisCC, pEntry->sid, &pSurface, &pResource);
6559	AssertRCReturn(rc, rc);
6560
6561	DXVIEW *pView = &pDXContext->pBackendDXContext->paDepthStencilView[depthStencilViewId];
6562	Assert(pView->u.pView == NULL);
6563
6564	ID3D11DepthStencilView *pDepthStencilView;
6565	HRESULT hr = dxDepthStencilViewCreate(pThisCC, pEntry, pSurface, &pDepthStencilView);
6566	AssertReturn(SUCCEEDED(hr), VERR_INVALID_STATE);
6567
6568	return dxViewInit(pView, pSurface, pDXContext, depthStencilViewId, VMSVGA3D_VIEWTYPE_DEPTHSTENCIL, pDepthStencilView);
6569	}
6570
6571
6572	static int dxEnsureDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId viewId, DXVIEW **ppResult)
6573	{
6574	ASSERT_GUEST_RETURN(viewId < pDXContext->cot.cDSView, VERR_INVALID_PARAMETER);
6575
6576	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paDepthStencilView[viewId];
6577	if (!pDXView->u.pView)
6578	{
6579	SVGACOTableDXDSViewEntry const *pEntry = &pDXContext->cot.paDSView[viewId];
6580	int rc = dxCreateDepthStencilView(pThisCC, pDXContext, viewId, pEntry);
6581	AssertRCReturn(rc, rc);
6582	}
6583	*ppResult = pDXView;
6584	return VINF_SUCCESS;
6585	}
6586
6587
6588	static int dxCreateShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId, SVGACOTableDXSRViewEntry const *pEntry)
6589	{
6590	PVMSVGA3DSURFACE pSurface;
6591	ID3D11Resource *pResource;
6592	int rc = dxEnsureResource(pThisCC, pEntry->sid, &pSurface, &pResource);
6593	AssertRCReturn(rc, rc);
6594
6595	DXVIEW *pView = &pDXContext->pBackendDXContext->paShaderResourceView[shaderResourceViewId];
6596	Assert(pView->u.pView == NULL);
6597
6598	ID3D11ShaderResourceView *pShaderResourceView;
6599	HRESULT hr = dxShaderResourceViewCreate(pThisCC, pEntry, pSurface, &pShaderResourceView);
6600	AssertReturn(SUCCEEDED(hr), VERR_INVALID_STATE);
6601
6602	return dxViewInit(pView, pSurface, pDXContext, shaderResourceViewId, VMSVGA3D_VIEWTYPE_SHADERRESOURCE, pShaderResourceView);
6603	}
6604
6605
6606	static int dxEnsureShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId viewId, DXVIEW **ppResult)
6607	{
6608	ASSERT_GUEST_RETURN(viewId < pDXContext->cot.cSRView, VERR_INVALID_PARAMETER);
6609
6610	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paShaderResourceView[viewId];
6611	if (!pDXView->u.pView)
6612	{
6613	SVGACOTableDXSRViewEntry const *pEntry = &pDXContext->cot.paSRView[viewId];
6614	int rc = dxCreateShaderResourceView(pThisCC, pDXContext, viewId, pEntry);
6615	AssertRCReturn(rc, rc);
6616	}
6617	*ppResult = pDXView;
6618	return VINF_SUCCESS;
6619	}
6620
6621
6622	static int dxCreateUnorderedAccessView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId uaViewId, SVGACOTableDXUAViewEntry const *pEntry)
6623	{
6624	PVMSVGA3DSURFACE pSurface;
6625	ID3D11Resource *pResource;
6626	int rc = dxEnsureResource(pThisCC, pEntry->sid, &pSurface, &pResource);
6627	AssertRCReturn(rc, rc);
6628
6629	DXVIEW *pView = &pDXContext->pBackendDXContext->paUnorderedAccessView[uaViewId];
6630	Assert(pView->u.pView == NULL);
6631
6632	ID3D11UnorderedAccessView *pUnorderedAccessView;
6633	HRESULT hr = dxUnorderedAccessViewCreate(pThisCC, pEntry, pSurface, &pUnorderedAccessView);
6634	AssertReturn(SUCCEEDED(hr), VERR_INVALID_STATE);
6635
6636	return dxViewInit(pView, pSurface, pDXContext, uaViewId, VMSVGA3D_VIEWTYPE_UNORDEREDACCESS, pUnorderedAccessView);
6637	}
6638
6639
6640	static int dxEnsureUnorderedAccessView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId viewId, DXVIEW **ppResult)
6641	{
6642	ASSERT_GUEST_RETURN(viewId < pDXContext->cot.cUAView, VERR_INVALID_PARAMETER);
6643
6644	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paUnorderedAccessView[viewId];
6645	if (!pDXView->u.pView)
6646	{
6647	SVGACOTableDXUAViewEntry const *pEntry = &pDXContext->cot.paUAView[viewId];
6648	int rc = dxCreateUnorderedAccessView(pThisCC, pDXContext, viewId, pEntry);
6649	AssertRCReturn(rc, rc);
6650	}
6651	*ppResult = pDXView;
6652	return VINF_SUCCESS;
6653	}
6654
6655
6656	static void dxSetupPipeline(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6657	{
6658	/* Make sure that any draw operations on shader resource views have finished. */
6659	AssertCompile(RT_ELEMENTS(pDXContext->svgaDXContext.shaderState) == SVGA3D_NUM_SHADERTYPE);
6660	AssertCompile(RT_ELEMENTS(pDXContext->svgaDXContext.shaderState[0].shaderResources) == SVGA3D_DX_MAX_SRVIEWS);
6661
6662	int rc;
6663
6664	/* Unbind render target views because they mught be (re-)used as shader resource views. */
6665	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
6666	pDXDevice->pImmediateContext->OMSetRenderTargetsAndUnorderedAccessViews(0, NULL, NULL, 0, 0, NULL, NULL);
6667	for (unsigned i = 0; i < SVGA3D_DX11_1_MAX_UAVIEWS; ++i)
6668	{
6669	ID3D11UnorderedAccessView *pNullUA = 0;
6670	pDXDevice->pImmediateContext->CSSetUnorderedAccessViews(i, 1, &pNullUA, NULL);
6671	}
6672
6673	dxSetConstantBuffers(pThisCC, pDXContext);
6674	dxSetVertexBuffers(pThisCC, pDXContext);
6675	dxSetIndexBuffer(pThisCC, pDXContext);
6676
6677	/*
6678	* Shader resources
6679	*/
6680
6681	/* Make sure that the shader resource views exist. */
6682	for (uint32_t idxShaderState = 0; idxShaderState < SVGA3D_NUM_SHADERTYPE; ++idxShaderState)
6683	{
6684	for (uint32_t idxSR = 0; idxSR < SVGA3D_DX_MAX_SRVIEWS; ++idxSR)
6685	{
6686	SVGA3dShaderResourceViewId const shaderResourceViewId = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderResources[idxSR];
6687	if (shaderResourceViewId != SVGA3D_INVALID_ID)
6688	{
6689	DXVIEW *pDXView;
6690	rc = dxEnsureShaderResourceView(pThisCC, pDXContext, shaderResourceViewId, &pDXView);
6691	AssertContinue(RT_SUCCESS(rc));
6692
6693	#ifdef LOG_ENABLED
6694	SVGACOTableDXSRViewEntry const *pSRViewEntry = &pDXContext->cot.paSRView[shaderResourceViewId];
6695	PVMSVGA3DSURFACE pSurface = NULL;
6696	vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pDXView->sid, &pSurface);
6697	LogFunc(("srv[%d][%d] sid = %u, srvid = %u, format = %s(%d), %dx%d\n",
6698	idxShaderState, idxSR, pDXView->sid, shaderResourceViewId, vmsvgaLookupEnum((int)pSRViewEntry->format, &g_SVGA3dSurfaceFormat2String), pSRViewEntry->format,
6699	pSurface->paMipmapLevels[0].cBlocksX * pSurface->cxBlock, pSurface->paMipmapLevels[0].cBlocksY * pSurface->cyBlock));
6700	#endif
6701
6702	#ifdef DUMP_BITMAPS
6703	SVGA3dSurfaceImageId image;
6704	image.sid = pDXView->sid;
6705	image.face = 0;
6706	image.mipmap = 0;
6707	VMSVGA3D_MAPPED_SURFACE map;
6708	int rc2 = vmsvga3dSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
6709	if (RT_SUCCESS(rc2))
6710	{
6711	vmsvga3dMapWriteBmpFile(&map, "sr-");
6712	vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
6713	}
6714	else
6715	LogFunc(("Map failed %Rrc\n", rc));
6716	#endif
6717	}
6718	}
6719
6720	dxSetShaderResources(pThisCC, pDXContext, (SVGA3dShaderType)(idxShaderState + SVGA3D_SHADERTYPE_MIN));
6721	}
6722
6723	/*
6724	* Compute shader unordered access views
6725	*/
6726
6727	for (uint32_t idxUA = 0; idxUA < SVGA3D_DX11_1_MAX_UAVIEWS; ++idxUA)
6728	{
6729	SVGA3dUAViewId const viewId = pDXContext->svgaDXContext.csuaViewIds[idxUA];
6730	if (viewId != SVGA3D_INVALID_ID)
6731	{
6732	DXVIEW *pDXView;
6733	rc = dxEnsureUnorderedAccessView(pThisCC, pDXContext, viewId, &pDXView);
6734	AssertContinue(RT_SUCCESS(rc));
6735
6736	#ifdef LOG_ENABLED
6737	SVGACOTableDXUAViewEntry const *pUAViewEntry = &pDXContext->cot.paUAView[viewId];
6738	LogFunc(("csuav[%d] sid = %u, uaid = %u, format = %s(%d)\n", idxUA, pDXView->sid, viewId, vmsvgaLookupEnum((int)pUAViewEntry->format, &g_SVGA3dSurfaceFormat2String), pUAViewEntry->format));
6739	#endif
6740	}
6741	}
6742
6743	/* Set views. */
6744	rc = dxSetCSUnorderedAccessViews(pThisCC, pDXContext);
6745	AssertRC(rc);
6746
6747	/*
6748	* Render targets and unordered access views.
6749	*/
6750
6751	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
6752	AssertReturnVoid(pDevice->pDevice);
6753
6754	/* Make sure that the render target views exist. */
6755	if (pDXContext->svgaDXContext.renderState.depthStencilViewId != SVGA3D_INVALID_ID)
6756	{
6757	uint32_t const viewId = pDXContext->svgaDXContext.renderState.depthStencilViewId;
6758
6759	DXVIEW *pDXView;
6760	rc = dxEnsureDepthStencilView(pThisCC, pDXContext, viewId, &pDXView);
6761	AssertRC(rc);
6762
6763	#ifdef LOG_ENABLED
6764	SVGACOTableDXDSViewEntry const *pDSViewEntry = &pDXContext->cot.paDSView[viewId];
6765	LogFunc(("dsv sid = %u, dsvid = %u, format = %s(%d)\n", pDXView->sid, viewId, vmsvgaLookupEnum((int)pDSViewEntry->format, &g_SVGA3dSurfaceFormat2String), pDSViewEntry->format));
6766	#endif
6767	}
6768
6769	for (uint32_t i = 0; i < SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS; ++i)
6770	{
6771	uint32_t const viewId = pDXContext->svgaDXContext.renderState.renderTargetViewIds[i];
6772	if (viewId != SVGA3D_INVALID_ID)
6773	{
6774	DXVIEW *pDXView;
6775	rc = dxEnsureRenderTargetView(pThisCC, pDXContext, viewId, &pDXView);
6776	AssertContinue(RT_SUCCESS(rc));
6777
6778	#ifdef LOG_ENABLED
6779	SVGACOTableDXRTViewEntry const *pRTViewEntry = &pDXContext->cot.paRTView[viewId];
6780	LogFunc(("rtv sid = %u, rtvid = %u, format = %s(%d)\n", pDXView->sid, viewId, vmsvgaLookupEnum((int)pRTViewEntry->format, &g_SVGA3dSurfaceFormat2String), pRTViewEntry->format));
6781	#endif
6782	}
6783	}
6784
6785	for (uint32_t idxUA = 0; idxUA < SVGA3D_DX11_1_MAX_UAVIEWS; ++idxUA)
6786	{
6787	SVGA3dUAViewId const viewId = pDXContext->svgaDXContext.uaViewIds[idxUA];
6788	if (viewId != SVGA3D_INVALID_ID)
6789	{
6790	DXVIEW *pDXView;
6791	rc = dxEnsureUnorderedAccessView(pThisCC, pDXContext, viewId, &pDXView);
6792	AssertContinue(RT_SUCCESS(rc));
6793
6794	#ifdef LOG_ENABLED
6795	SVGACOTableDXUAViewEntry const *pUAViewEntry = &pDXContext->cot.paUAView[viewId];
6796	LogFunc(("uav[%d] sid = %u, uaid = %u, format = %s(%d)\n", idxUA, pDXView->sid, viewId, vmsvgaLookupEnum((int)pUAViewEntry->format, &g_SVGA3dSurfaceFormat2String), pUAViewEntry->format));
6797	#endif
6798	}
6799	}
6800
6801	/* Set render targets. */
6802	rc = dxSetRenderTargets(pThisCC, pDXContext);
6803	AssertRC(rc);
6804
6805	/*
6806	* Shaders
6807	*/
6808
6809	for (uint32_t idxShaderState = 0; idxShaderState < SVGA3D_NUM_SHADERTYPE; ++idxShaderState)
6810	{
6811	DXSHADER *pDXShader;
6812	SVGA3dShaderType const shaderType = (SVGA3dShaderType)(idxShaderState + SVGA3D_SHADERTYPE_MIN);
6813	SVGA3dShaderId const shaderId = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId;
6814
6815	if (shaderId != SVGA3D_INVALID_ID)
6816	{
6817	pDXShader = &pDXContext->pBackendDXContext->paShader[shaderId];
6818	if (pDXShader->pShader == NULL)
6819	{
6820	/* Create a new shader. */
6821
6822	/* Apply resource types to a pixel shader. */
6823	if (shaderType == SVGA3D_SHADERTYPE_PS) /* Others too? */
6824	{
6825	VGPU10_RESOURCE_DIMENSION aResourceDimension[SVGA3D_DX_MAX_SRVIEWS];
6826	RT_ZERO(aResourceDimension);
6827	VGPU10_RESOURCE_RETURN_TYPE aResourceReturnType[SVGA3D_DX_MAX_SRVIEWS];
6828	RT_ZERO(aResourceReturnType);
6829	uint32_t cResources = 0;
6830
6831	for (uint32_t idxSR = 0; idxSR < SVGA3D_DX_MAX_SRVIEWS; ++idxSR)
6832	{
6833	SVGA3dShaderResourceViewId const shaderResourceViewId = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderResources[idxSR];
6834	if (shaderResourceViewId != SVGA3D_INVALID_ID)
6835	{
6836	ASSERT_GUEST_CONTINUE(shaderResourceViewId < pDXContext->cot.cSRView);
6837	SVGACOTableDXSRViewEntry const *pSRViewEntry = &pDXContext->cot.paSRView[shaderResourceViewId];
6838
6839	PVMSVGA3DSURFACE pSurface;
6840	rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pSRViewEntry->sid, &pSurface);
6841	AssertRCReturnVoid(rc);
6842
6843	aResourceReturnType[idxSR] = DXShaderResourceReturnTypeFromFormat(pSRViewEntry->format);
6844
6845	switch (pSRViewEntry->resourceDimension)
6846	{
6847	case SVGA3D_RESOURCE_BUFFEREX:
6848	case SVGA3D_RESOURCE_BUFFER:
6849	aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_BUFFER;
6850	break;
6851	case SVGA3D_RESOURCE_TEXTURE1D:
6852	if (pSurface->surfaceDesc.numArrayElements <= 1)
6853	aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURE1D;
6854	else
6855	aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURE1DARRAY;
6856	break;
6857	case SVGA3D_RESOURCE_TEXTURE2D:
6858	if (pSurface->surfaceDesc.numArrayElements <= 1)
6859	aResourceDimension[idxSR] = pSurface->surfaceDesc.multisampleCount > 1
6860	? VGPU10_RESOURCE_DIMENSION_TEXTURE2DMS
6861	: VGPU10_RESOURCE_DIMENSION_TEXTURE2D;
6862	else
6863	aResourceDimension[idxSR] = pSurface->surfaceDesc.multisampleCount > 1
6864	? VGPU10_RESOURCE_DIMENSION_TEXTURE2DMSARRAY
6865	: VGPU10_RESOURCE_DIMENSION_TEXTURE2DARRAY;
6866	break;
6867	case SVGA3D_RESOURCE_TEXTURE3D:
6868	aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURE3D;
6869	break;
6870	case SVGA3D_RESOURCE_TEXTURECUBE:
6871	if (pSurface->surfaceDesc.numArrayElements <= 6)
6872	aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURECUBE;
6873	else
6874	aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURECUBEARRAY;
6875	break;
6876	default:
6877	ASSERT_GUEST_FAILED();
6878	aResourceDimension[idxSR] = VGPU10_RESOURCE_DIMENSION_TEXTURE2D;
6879	}
6880
6881	cResources = idxSR + 1;
6882
6883	/* Update componentType of the pixel shader output signature to correspond to the bound resources. */
6884	if (idxSR < pDXShader->shaderInfo.cOutputSignature)
6885	{
6886	SVGA3dDXSignatureEntry *pSignatureEntry = &pDXShader->shaderInfo.aOutputSignature[idxSR];
6887	pSignatureEntry->componentType = DXShaderComponentTypeFromFormat(pSRViewEntry->format);
6888	}
6889	}
6890	}
6891
6892	rc = DXShaderUpdateResources(&pDXShader->shaderInfo, aResourceDimension, aResourceReturnType, cResources);
6893	AssertRC(rc); /* Ignore rc because the shader will most likely work anyway. */
6894	}
6895
6896	if (shaderType == SVGA3D_SHADERTYPE_VS)
6897	{
6898	/* Update componentType of the vertex shader input signature to correspond to the input declaration. */
6899	vboxDXUpdateVSInputSignature(pDXContext, pDXShader);
6900	}
6901
6902	vboxDXMatchShaderSignatures(pThisCC, pDXContext, pDXShader);
6903
6904	rc = DXShaderCreateDXBC(&pDXShader->shaderInfo, &pDXShader->pvDXBC, &pDXShader->cbDXBC);
6905	if (RT_SUCCESS(rc))
6906	{
6907	#ifdef LOG_ENABLED
6908	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6909	if (pBackend->pfnD3DDisassemble && LogIs6Enabled())
6910	{
6911	ID3D10Blob *pBlob = 0;
6912	HRESULT hr2 = pBackend->pfnD3DDisassemble(pDXShader->pvDXBC, pDXShader->cbDXBC, 0, NULL, &pBlob);
6913	if (SUCCEEDED(hr2) && pBlob && pBlob->GetBufferSize())
6914	Log6(("%s\n", pBlob->GetBufferPointer()));
6915	else
6916	AssertFailed();
6917	D3D_RELEASE(pBlob);
6918	}
6919	LogFunc(("Shader: set cid=%u shid=%u type=%d, GuestSignatures %d\n", pDXContext->cid, shaderId, pDXShader->enmShaderType, pDXShader->shaderInfo.fGuestSignatures));
6920	#endif
6921
6922	HRESULT hr = dxShaderCreate(pThisCC, pDXContext, pDXShader);
6923	if (FAILED(hr))
6924	rc = VERR_INVALID_STATE;
6925	}
6926	}
6927
6928	LogFunc(("Shader: cid=%u shid=%u type=%d, GuestSignatures %d, %Rrc\n", pDXContext->cid, shaderId, pDXShader->enmShaderType, pDXShader->shaderInfo.fGuestSignatures, rc));
6929	}
6930	else
6931	pDXShader = NULL;
6932
6933	if (RT_SUCCESS(rc))
6934	dxShaderSet(pThisCC, pDXContext, shaderType, pDXShader);
6935
6936	AssertRC(rc);
6937	}
6938
6939	/*
6940	* InputLayout
6941	*/
6942	SVGA3dElementLayoutId const elementLayoutId = pDXContext->svgaDXContext.inputAssembly.layoutId;
6943	ID3D11InputLayout *pInputLayout = NULL;
6944	if (elementLayoutId != SVGA3D_INVALID_ID)
6945	{
6946	DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
6947	if (!pDXElementLayout->pElementLayout)
6948	{
6949	uint32_t const idxShaderState = SVGA3D_SHADERTYPE_VS - SVGA3D_SHADERTYPE_MIN;
6950	uint32_t const shid = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId;
6951	if (shid < pDXContext->pBackendDXContext->cShader)
6952	{
6953	DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[shid];
6954	if (pDXShader->pvDXBC)
6955	dxCreateInputLayout(pThisCC, pDXContext, elementLayoutId, pDXShader);
6956	else
6957	LogRelMax(16, ("VMSVGA: DX shader bytecode is not available in DXSetInputLayout: shid = %u\n", shid));
6958	}
6959	else
6960	LogRelMax(16, ("VMSVGA: DX shader is not set in DXSetInputLayout: shid = 0x%x\n", shid));
6961	}
6962
6963	pInputLayout = pDXElementLayout->pElementLayout;
6964
6965	LogFunc(("Input layout id %u\n", elementLayoutId));
6966	}
6967
6968	pDevice->pImmediateContext->IASetInputLayout(pInputLayout);
6969
6970	LogFunc(("Topology %u\n", pDXContext->svgaDXContext.inputAssembly.topology));
6971	LogFunc(("Blend id %u\n", pDXContext->svgaDXContext.renderState.blendStateId));
6972	}
6973
6974
6975	static DECLCALLBACK(int) vmsvga3dBackDXDraw(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t vertexCount, uint32_t startVertexLocation)
6976	{
6977	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6978	RT_NOREF(pBackend);
6979
6980	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
6981	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
6982
6983	dxSetupPipeline(pThisCC, pDXContext);
6984
6985	#ifdef LOG_ENABLED
6986	if (LogIs8Enabled())
6987	dxDbgDumpVertices_Draw(pThisCC, pDXContext, vertexCount, startVertexLocation);
6988	#endif
6989
6990	if (pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN)
6991	pDevice->pImmediateContext->Draw(vertexCount, startVertexLocation);
6992	else
6993	{
6994	/*
6995	* Emulate SVGA3D_PRIMITIVE_TRIANGLEFAN using an indexed draw of a triangle list.
6996	*/
6997
6998	/* Make sure that 16 bit indices are enough. */
6999	if (vertexCount > 65535)
7000	{
7001	LogRelMax(1, ("VMSVGA: ignore Draw(TRIANGLEFAN, %u)\n", vertexCount));
7002	return VERR_NOT_SUPPORTED;
7003	}
7004
7005	/* Generate indices. */
7006	UINT const IndexCount = 3 * (vertexCount - 2); /* 3_per_triangle * num_triangles */
7007	UINT const cbAlloc = IndexCount * sizeof(USHORT);
7008	USHORT paIndices = (USHORT )RTMemAlloc(cbAlloc);
7009	AssertReturn(paIndices, VERR_NO_MEMORY);
7010	USHORT iVertex = 1;
7011	for (UINT i = 0; i < IndexCount; i+= 3)
7012	{
7013	paIndices[i] = 0;
7014	paIndices[i + 1] = iVertex;
7015	++iVertex;
7016	paIndices[i + 2] = iVertex;
7017	}
7018
7019	D3D11_SUBRESOURCE_DATA InitData;
7020	InitData.pSysMem = paIndices;
7021	InitData.SysMemPitch = cbAlloc;
7022	InitData.SysMemSlicePitch = cbAlloc;
7023
7024	D3D11_BUFFER_DESC bd;
7025	RT_ZERO(bd);
7026	bd.ByteWidth = cbAlloc;
7027	bd.Usage = D3D11_USAGE_IMMUTABLE;
7028	bd.BindFlags = D3D11_BIND_INDEX_BUFFER;
7029	//bd.CPUAccessFlags = 0;
7030	//bd.MiscFlags = 0;
7031	//bd.StructureByteStride = 0;
7032
7033	ID3D11Buffer *pIndexBuffer = 0;
7034	HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, &InitData, &pIndexBuffer);
7035	Assert(SUCCEEDED(hr));RT_NOREF(hr);
7036
7037	/* Save the current index buffer. */
7038	ID3D11Buffer *pSavedIndexBuffer = 0;
7039	DXGI_FORMAT SavedFormat = DXGI_FORMAT_UNKNOWN;
7040	UINT SavedOffset = 0;
7041	pDevice->pImmediateContext->IAGetIndexBuffer(&pSavedIndexBuffer, &SavedFormat, &SavedOffset);
7042
7043	/* Set up the device state. */
7044	pDevice->pImmediateContext->IASetIndexBuffer(pIndexBuffer, DXGI_FORMAT_R16_UINT, 0);
7045	pDevice->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST);
7046
7047	UINT const StartIndexLocation = 0;
7048	INT const BaseVertexLocation = startVertexLocation;
7049	pDevice->pImmediateContext->DrawIndexed(IndexCount, StartIndexLocation, BaseVertexLocation);
7050
7051	/* Restore the device state. */
7052	pDevice->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP);
7053	pDevice->pImmediateContext->IASetIndexBuffer(pSavedIndexBuffer, SavedFormat, SavedOffset);
7054	D3D_RELEASE(pSavedIndexBuffer);
7055
7056	/* Cleanup. */
7057	D3D_RELEASE(pIndexBuffer);
7058	RTMemFree(paIndices);
7059	}
7060
7061	#ifdef DX_FLUSH_AFTER_DRAW
7062	dxDeviceFlush(pDevice);
7063	#endif
7064
7065	return VINF_SUCCESS;
7066	}
7067
7068	static int dxReadBuffer(DXDEVICE pDevice, ID3D11Buffer pBuffer, UINT Offset, UINT Bytes, void *ppvData, uint32_t pcbData)
7069	{
7070	D3D11_BUFFER_DESC desc;
7071	RT_ZERO(desc);
7072	pBuffer->GetDesc(&desc);
7073
7074	AssertReturn( Offset < desc.ByteWidth
7075	&& Bytes <= desc.ByteWidth - Offset, VERR_INVALID_STATE);
7076
7077	void *pvData = RTMemAlloc(Bytes);
7078	if (!pvData)
7079	return VERR_NO_MEMORY;
7080
7081	*ppvData = pvData;
7082	*pcbData = Bytes;
7083
7084	#ifdef DX_COMMON_STAGING_BUFFER
7085	int rc = dxStagingBufferRealloc(pDevice, Bytes);
7086	if (RT_SUCCESS(rc))
7087	{
7088	/* Copy 'Bytes' bytes starting at 'Offset' from the buffer to the start of staging buffer. */
7089	ID3D11Resource *pDstResource = pDevice->pStagingBuffer;
7090	UINT DstSubresource = 0;
7091	UINT DstX = 0;
7092	UINT DstY = 0;
7093	UINT DstZ = 0;
7094	ID3D11Resource *pSrcResource = pBuffer;
7095	UINT SrcSubresource = 0;
7096	D3D11_BOX SrcBox;
7097	SrcBox.left = Offset;
7098	SrcBox.top = 0;
7099	SrcBox.front = 0;
7100	SrcBox.right = Offset + Bytes;
7101	SrcBox.bottom = 1;
7102	SrcBox.back = 1;
7103	pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
7104	pSrcResource, SrcSubresource, &SrcBox);
7105
7106	D3D11_MAPPED_SUBRESOURCE mappedResource;
7107	UINT const Subresource = 0; /* Buffers have only one subresource. */
7108	HRESULT hr = pDevice->pImmediateContext->Map(pDevice->pStagingBuffer, Subresource,
7109	D3D11_MAP_READ, /* MapFlags = */ 0, &mappedResource);
7110	if (SUCCEEDED(hr))
7111	{
7112	memcpy(pvData, mappedResource.pData, Bytes);
7113
7114	/* Unmap the staging buffer. */
7115	pDevice->pImmediateContext->Unmap(pDevice->pStagingBuffer, Subresource);
7116	}
7117	else
7118	AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
7119
7120	}
7121	#else
7122	uint32_t const cbAlloc = Bytes;
7123
7124	D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
7125	D3D11_BUFFER_DESC bd;
7126	RT_ZERO(bd);
7127	bd.ByteWidth = Bytes;
7128	bd.Usage = D3D11_USAGE_STAGING;
7129	//bd.BindFlags = 0; /* No bind flags are allowed for staging resources. */
7130	bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE \| D3D11_CPU_ACCESS_READ;
7131
7132	int rc = VINF_SUCCESS;
7133	ID3D11Buffer *pStagingBuffer;
7134	HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pStagingBuffer);
7135	if (SUCCEEDED(hr))
7136	{
7137	/* Copy from the buffer to the staging buffer. */
7138	ID3D11Resource *pDstResource = pStagingBuffer;
7139	UINT DstSubresource = 0;
7140	UINT DstX = 0;
7141	UINT DstY = 0;
7142	UINT DstZ = 0;
7143	ID3D11Resource *pSrcResource = pBuffer;
7144	UINT SrcSubresource = 0;
7145	D3D11_BOX SrcBox;
7146	SrcBox.left = Offset;
7147	SrcBox.top = 0;
7148	SrcBox.front = 0;
7149	SrcBox.right = Offset + Bytes;
7150	SrcBox.bottom = 1;
7151	SrcBox.back = 1;
7152	pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
7153	pSrcResource, SrcSubresource, &SrcBox);
7154
7155	D3D11_MAPPED_SUBRESOURCE mappedResource;
7156	UINT const Subresource = 0; /* Buffers have only one subresource. */
7157	hr = pDevice->pImmediateContext->Map(pStagingBuffer, Subresource,
7158	D3D11_MAP_READ, /* MapFlags = */ 0, &mappedResource);
7159	if (SUCCEEDED(hr))
7160	{
7161	memcpy(pvData, mappedResource.pData, Bytes);
7162
7163	/* Unmap the staging buffer. */
7164	pDevice->pImmediateContext->Unmap(pStagingBuffer, Subresource);
7165	}
7166	else
7167	AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
7168
7169	D3D_RELEASE(pStagingBuffer);
7170	}
7171	else
7172	{
7173	rc = VERR_NO_MEMORY;
7174	}
7175	#endif
7176
7177	if (RT_FAILURE(rc))
7178	{
7179	RTMemFree(*ppvData);
7180	*ppvData = NULL;
7181	*pcbData = 0;
7182	}
7183
7184	return rc;
7185	}
7186
7187
7188	static int dxDrawIndexedTriangleFan(DXDEVICE *pDevice, uint32_t IndexCountTF, uint32_t StartIndexLocationTF, int32_t BaseVertexLocationTF)
7189	{
7190	/*
7191	* Emulate an indexed SVGA3D_PRIMITIVE_TRIANGLEFAN using an indexed draw of triangle list.
7192	*/
7193
7194	/* Make sure that 16 bit indices are enough. */
7195	if (IndexCountTF > 65535)
7196	{
7197	LogRelMax(1, ("VMSVGA: ignore DrawIndexed(TRIANGLEFAN, %u)\n", IndexCountTF));
7198	return VERR_NOT_SUPPORTED;
7199	}
7200
7201	/* Save the current index buffer. */
7202	ID3D11Buffer *pSavedIndexBuffer = 0;
7203	DXGI_FORMAT SavedFormat = DXGI_FORMAT_UNKNOWN;
7204	UINT SavedOffset = 0;
7205	pDevice->pImmediateContext->IAGetIndexBuffer(&pSavedIndexBuffer, &SavedFormat, &SavedOffset);
7206
7207	AssertReturn( SavedFormat == DXGI_FORMAT_R16_UINT
7208	\|\| SavedFormat == DXGI_FORMAT_R32_UINT, VERR_NOT_SUPPORTED);
7209
7210	/* How many bytes are used by triangle fan indices. */
7211	UINT const BytesPerIndexTF = SavedFormat == DXGI_FORMAT_R16_UINT ? 2 : 4;
7212	UINT const BytesTF = BytesPerIndexTF * IndexCountTF;
7213
7214	/* Read the current index buffer content to obtain indices. */
7215	void *pvDataTF;
7216	uint32_t cbDataTF;
7217	int rc = dxReadBuffer(pDevice, pSavedIndexBuffer, StartIndexLocationTF, BytesTF, &pvDataTF, &cbDataTF);
7218	AssertRCReturn(rc, rc);
7219	AssertReturnStmt(cbDataTF >= BytesPerIndexTF, RTMemFree(pvDataTF), VERR_INVALID_STATE);
7220
7221	/* Generate indices for triangle list. */
7222	UINT const IndexCount = 3 * (IndexCountTF - 2); /* 3_per_triangle * num_triangles */
7223	UINT const cbAlloc = IndexCount * sizeof(USHORT);
7224	USHORT paIndices = (USHORT )RTMemAlloc(cbAlloc);
7225	AssertReturnStmt(paIndices, RTMemFree(pvDataTF), VERR_NO_MEMORY);
7226
7227	USHORT iVertex = 1;
7228	if (BytesPerIndexTF == 2)
7229	{
7230	USHORT paIndicesTF = (USHORT )pvDataTF;
7231	for (UINT i = 0; i < IndexCount; i+= 3)
7232	{
7233	paIndices[i] = paIndicesTF[0];
7234	AssertBreakStmt(iVertex < IndexCountTF, rc = VERR_INVALID_STATE);
7235	paIndices[i + 1] = paIndicesTF[iVertex];
7236	++iVertex;
7237	AssertBreakStmt(iVertex < IndexCountTF, rc = VERR_INVALID_STATE);
7238	paIndices[i + 2] = paIndicesTF[iVertex];
7239	}
7240	}
7241	else
7242	{
7243	UINT paIndicesTF = (UINT )pvDataTF;
7244	for (UINT i = 0; i < IndexCount; i+= 3)
7245	{
7246	paIndices[i] = paIndicesTF[0];
7247	AssertBreakStmt(iVertex < IndexCountTF, rc = VERR_INVALID_STATE);
7248	paIndices[i + 1] = paIndicesTF[iVertex];
7249	++iVertex;
7250	AssertBreakStmt(iVertex < IndexCountTF, rc = VERR_INVALID_STATE);
7251	paIndices[i + 2] = paIndicesTF[iVertex];
7252	}
7253	}
7254
7255	D3D11_SUBRESOURCE_DATA InitData;
7256	InitData.pSysMem = paIndices;
7257	InitData.SysMemPitch = cbAlloc;
7258	InitData.SysMemSlicePitch = cbAlloc;
7259
7260	D3D11_BUFFER_DESC bd;
7261	RT_ZERO(bd);
7262	bd.ByteWidth = cbAlloc;
7263	bd.Usage = D3D11_USAGE_IMMUTABLE;
7264	bd.BindFlags = D3D11_BIND_INDEX_BUFFER;
7265	//bd.CPUAccessFlags = 0;
7266	//bd.MiscFlags = 0;
7267	//bd.StructureByteStride = 0;
7268
7269	ID3D11Buffer *pIndexBuffer = 0;
7270	HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, &InitData, &pIndexBuffer);
7271	Assert(SUCCEEDED(hr));RT_NOREF(hr);
7272
7273	/* Set up the device state. */
7274	pDevice->pImmediateContext->IASetIndexBuffer(pIndexBuffer, DXGI_FORMAT_R16_UINT, 0);
7275	pDevice->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST);
7276
7277	UINT const StartIndexLocation = 0;
7278	INT const BaseVertexLocation = BaseVertexLocationTF;
7279	pDevice->pImmediateContext->DrawIndexed(IndexCount, StartIndexLocation, BaseVertexLocation);
7280
7281	/* Restore the device state. */
7282	pDevice->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP);
7283	pDevice->pImmediateContext->IASetIndexBuffer(pSavedIndexBuffer, SavedFormat, SavedOffset);
7284	D3D_RELEASE(pSavedIndexBuffer);
7285
7286	/* Cleanup. */
7287	D3D_RELEASE(pIndexBuffer);
7288	RTMemFree(paIndices);
7289	RTMemFree(pvDataTF);
7290
7291	return VINF_SUCCESS;
7292	}
7293
7294
7295	static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexed(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t indexCount, uint32_t startIndexLocation, int32_t baseVertexLocation)
7296	{
7297	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7298	RT_NOREF(pBackend);
7299
7300	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
7301	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7302
7303	dxSetupPipeline(pThisCC, pDXContext);
7304
7305	#ifdef LOG_ENABLED
7306	if (LogIs8Enabled())
7307	dxDbgDumpVertices_DrawIndexed(pThisCC, pDXContext, indexCount, startIndexLocation, baseVertexLocation);
7308	#endif
7309
7310	if (pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN)
7311	pDevice->pImmediateContext->DrawIndexed(indexCount, startIndexLocation, baseVertexLocation);
7312	else
7313	{
7314	dxDrawIndexedTriangleFan(pDevice, indexCount, startIndexLocation, baseVertexLocation);
7315	}
7316
7317	#ifdef DX_FLUSH_AFTER_DRAW
7318	dxDeviceFlush(pDevice);
7319	#endif
7320
7321	return VINF_SUCCESS;
7322	}
7323
7324
7325	static DECLCALLBACK(int) vmsvga3dBackDXDrawInstanced(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
7326	uint32_t vertexCountPerInstance, uint32_t instanceCount, uint32_t startVertexLocation, uint32_t startInstanceLocation)
7327	{
7328	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7329	RT_NOREF(pBackend);
7330
7331	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
7332	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7333
7334	dxSetupPipeline(pThisCC, pDXContext);
7335
7336	#ifdef LOG_ENABLED
7337	if (LogIs8Enabled())
7338	dxDbgDumpVertices_DrawInstanced(pThisCC, pDXContext, vertexCountPerInstance, instanceCount, startVertexLocation, startInstanceLocation);
7339	#endif
7340
7341	Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
7342
7343	pDevice->pImmediateContext->DrawInstanced(vertexCountPerInstance, instanceCount, startVertexLocation, startInstanceLocation);
7344
7345	#ifdef DX_FLUSH_AFTER_DRAW
7346	dxDeviceFlush(pDevice);
7347	#endif
7348
7349	return VINF_SUCCESS;
7350	}
7351
7352
7353	static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexedInstanced(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
7354	uint32_t indexCountPerInstance, uint32_t instanceCount, uint32_t startIndexLocation, int32_t baseVertexLocation, uint32_t startInstanceLocation)
7355	{
7356	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7357	RT_NOREF(pBackend);
7358
7359	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
7360	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7361
7362	dxSetupPipeline(pThisCC, pDXContext);
7363
7364	#ifdef LOG_ENABLED
7365	if (LogIs8Enabled())
7366	dxDbgDumpVertices_DrawIndexedInstanced(pThisCC, pDXContext, indexCountPerInstance, instanceCount, startIndexLocation, baseVertexLocation, startInstanceLocation);
7367	#endif
7368
7369	Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
7370
7371	pDevice->pImmediateContext->DrawIndexedInstanced(indexCountPerInstance, instanceCount, startIndexLocation, baseVertexLocation, startInstanceLocation);
7372
7373	#ifdef DX_FLUSH_AFTER_DRAW
7374	dxDeviceFlush(pDevice);
7375	#endif
7376
7377	return VINF_SUCCESS;
7378	}
7379
7380
7381	static DECLCALLBACK(int) vmsvga3dBackDXDrawAuto(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
7382	{
7383	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7384	RT_NOREF(pBackend);
7385
7386	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
7387	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7388
7389	dxSetupPipeline(pThisCC, pDXContext);
7390
7391	Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
7392
7393	pDevice->pImmediateContext->DrawAuto();
7394
7395	#ifdef DX_FLUSH_AFTER_DRAW
7396	dxDeviceFlush(pDevice);
7397	#endif
7398
7399	return VINF_SUCCESS;
7400	}
7401
7402
7403	static DECLCALLBACK(int) vmsvga3dBackDXSetInputLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId)
7404	{
7405	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7406	RT_NOREF(pBackend, pDXContext);
7407
7408	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
7409	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7410
7411	RT_NOREF(elementLayoutId);
7412
7413	return VINF_SUCCESS;
7414	}
7415
7416
7417	static DECLCALLBACK(int) vmsvga3dBackDXSetVertexBuffers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startBuffer, uint32_t cVertexBuffer, SVGA3dVertexBuffer const *paVertexBuffer)
7418	{
7419	/* Will be set in setupPipeline. */
7420	RT_NOREF(pThisCC, pDXContext, startBuffer, cVertexBuffer, paVertexBuffer);
7421	return VINF_SUCCESS;
7422	}
7423
7424
7425	static DECLCALLBACK(int) vmsvga3dBackDXSetIndexBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId sid, SVGA3dSurfaceFormat format, uint32_t offset)
7426	{
7427	/* Will be set in setupPipeline. */
7428	RT_NOREF(pThisCC, pDXContext, sid, format, offset);
7429	return VINF_SUCCESS;
7430	}
7431
7432	static D3D11_PRIMITIVE_TOPOLOGY dxTopology(SVGA3dPrimitiveType primitiveType)
7433	{
7434	ASSERT_GUEST_RETURN(primitiveType < SVGA3D_PRIMITIVE_MAX, D3D11_PRIMITIVE_TOPOLOGY_UNDEFINED);
7435
7436	static D3D11_PRIMITIVE_TOPOLOGY const aD3D11PrimitiveTopology[SVGA3D_PRIMITIVE_MAX] =
7437	{
7438	D3D11_PRIMITIVE_TOPOLOGY_UNDEFINED,
7439	D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST,
7440	D3D11_PRIMITIVE_TOPOLOGY_POINTLIST,
7441	D3D11_PRIMITIVE_TOPOLOGY_LINELIST,
7442	D3D11_PRIMITIVE_TOPOLOGY_LINESTRIP,
7443	D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP,
7444	D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP, /* SVGA3D_PRIMITIVE_TRIANGLEFAN: No FAN in D3D11. */
7445	D3D11_PRIMITIVE_TOPOLOGY_LINELIST_ADJ,
7446	D3D11_PRIMITIVE_TOPOLOGY_LINESTRIP_ADJ,
7447	D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST_ADJ,
7448	D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP_ADJ,
7449	D3D11_PRIMITIVE_TOPOLOGY_1_CONTROL_POINT_PATCHLIST,
7450	D3D11_PRIMITIVE_TOPOLOGY_2_CONTROL_POINT_PATCHLIST,
7451	D3D11_PRIMITIVE_TOPOLOGY_3_CONTROL_POINT_PATCHLIST,
7452	D3D11_PRIMITIVE_TOPOLOGY_4_CONTROL_POINT_PATCHLIST,
7453	D3D11_PRIMITIVE_TOPOLOGY_5_CONTROL_POINT_PATCHLIST,
7454	D3D11_PRIMITIVE_TOPOLOGY_6_CONTROL_POINT_PATCHLIST,
7455	D3D11_PRIMITIVE_TOPOLOGY_7_CONTROL_POINT_PATCHLIST,
7456	D3D11_PRIMITIVE_TOPOLOGY_8_CONTROL_POINT_PATCHLIST,
7457	D3D11_PRIMITIVE_TOPOLOGY_9_CONTROL_POINT_PATCHLIST,
7458	D3D11_PRIMITIVE_TOPOLOGY_10_CONTROL_POINT_PATCHLIST,
7459	D3D11_PRIMITIVE_TOPOLOGY_11_CONTROL_POINT_PATCHLIST,
7460	D3D11_PRIMITIVE_TOPOLOGY_12_CONTROL_POINT_PATCHLIST,
7461	D3D11_PRIMITIVE_TOPOLOGY_13_CONTROL_POINT_PATCHLIST,
7462	D3D11_PRIMITIVE_TOPOLOGY_14_CONTROL_POINT_PATCHLIST,
7463	D3D11_PRIMITIVE_TOPOLOGY_15_CONTROL_POINT_PATCHLIST,
7464	D3D11_PRIMITIVE_TOPOLOGY_16_CONTROL_POINT_PATCHLIST,
7465	D3D11_PRIMITIVE_TOPOLOGY_17_CONTROL_POINT_PATCHLIST,
7466	D3D11_PRIMITIVE_TOPOLOGY_18_CONTROL_POINT_PATCHLIST,
7467	D3D11_PRIMITIVE_TOPOLOGY_19_CONTROL_POINT_PATCHLIST,
7468	D3D11_PRIMITIVE_TOPOLOGY_20_CONTROL_POINT_PATCHLIST,
7469	D3D11_PRIMITIVE_TOPOLOGY_21_CONTROL_POINT_PATCHLIST,
7470	D3D11_PRIMITIVE_TOPOLOGY_22_CONTROL_POINT_PATCHLIST,
7471	D3D11_PRIMITIVE_TOPOLOGY_23_CONTROL_POINT_PATCHLIST,
7472	D3D11_PRIMITIVE_TOPOLOGY_24_CONTROL_POINT_PATCHLIST,
7473	D3D11_PRIMITIVE_TOPOLOGY_25_CONTROL_POINT_PATCHLIST,
7474	D3D11_PRIMITIVE_TOPOLOGY_26_CONTROL_POINT_PATCHLIST,
7475	D3D11_PRIMITIVE_TOPOLOGY_27_CONTROL_POINT_PATCHLIST,
7476	D3D11_PRIMITIVE_TOPOLOGY_28_CONTROL_POINT_PATCHLIST,
7477	D3D11_PRIMITIVE_TOPOLOGY_29_CONTROL_POINT_PATCHLIST,
7478	D3D11_PRIMITIVE_TOPOLOGY_30_CONTROL_POINT_PATCHLIST,
7479	D3D11_PRIMITIVE_TOPOLOGY_31_CONTROL_POINT_PATCHLIST,
7480	D3D11_PRIMITIVE_TOPOLOGY_32_CONTROL_POINT_PATCHLIST,
7481	};
7482	return aD3D11PrimitiveTopology[primitiveType];
7483	}
7484
7485	static DECLCALLBACK(int) vmsvga3dBackDXSetTopology(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dPrimitiveType topology)
7486	{
7487	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7488	RT_NOREF(pBackend, pDXContext);
7489
7490	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
7491	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7492
7493	D3D11_PRIMITIVE_TOPOLOGY const enmTopology = dxTopology(topology);
7494	pDevice->pImmediateContext->IASetPrimitiveTopology(enmTopology);
7495	return VINF_SUCCESS;
7496	}
7497
7498
7499	static int dxSetRenderTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
7500	{
7501	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
7502	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7503
7504	UINT UAVStartSlot = 0;
7505	UINT NumUAVs = 0;
7506	ID3D11UnorderedAccessView *apUnorderedAccessViews[SVGA3D_DX11_1_MAX_UAVIEWS];
7507	UINT aUAVInitialCounts[SVGA3D_DX11_1_MAX_UAVIEWS];
7508	for (uint32_t idxUA = 0; idxUA < SVGA3D_DX11_1_MAX_UAVIEWS; ++idxUA)
7509	{
7510	apUnorderedAccessViews[idxUA] = NULL;
7511	aUAVInitialCounts[idxUA] = (UINT)-1;
7512
7513	SVGA3dUAViewId const uaViewId = pDXContext->svgaDXContext.uaViewIds[idxUA];
7514	if (uaViewId != SVGA3D_INVALID_ID)
7515	{
7516	ASSERT_GUEST_CONTINUE(uaViewId < pDXContext->cot.cUAView);
7517
7518	if (NumUAVs == 0)
7519	UAVStartSlot = idxUA;
7520	NumUAVs = idxUA - UAVStartSlot + 1;
7521	apUnorderedAccessViews[idxUA] = pDXContext->pBackendDXContext->paUnorderedAccessView[uaViewId].u.pUnorderedAccessView;
7522
7523	SVGACOTableDXUAViewEntry const *pEntry = &pDXContext->cot.paUAView[uaViewId];
7524	aUAVInitialCounts[idxUA] = pEntry->structureCount;
7525	}
7526	}
7527
7528	UINT NumRTVs = 0;
7529	ID3D11RenderTargetView *apRenderTargetViews[SVGA3D_MAX_RENDER_TARGETS];
7530	RT_ZERO(apRenderTargetViews);
7531	for (uint32_t i = 0; i < pDXContext->cRenderTargets; ++i)
7532	{
7533	SVGA3dRenderTargetViewId const renderTargetViewId = pDXContext->svgaDXContext.renderState.renderTargetViewIds[i];
7534	if (renderTargetViewId != SVGA3D_INVALID_ID)
7535	{
7536	ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->pBackendDXContext->cRenderTargetView, VERR_INVALID_PARAMETER);
7537	apRenderTargetViews[i] = pDXContext->pBackendDXContext->paRenderTargetView[renderTargetViewId].u.pRenderTargetView;
7538	++NumRTVs;
7539	}
7540	}
7541
7542	/* RTVs are followed by UAVs. */
7543	Assert(NumUAVs == 0 \|\| NumRTVs <= pDXContext->svgaDXContext.uavSpliceIndex);
7544
7545	ID3D11DepthStencilView *pDepthStencilView = NULL;
7546	SVGA3dDepthStencilViewId const depthStencilViewId = pDXContext->svgaDXContext.renderState.depthStencilViewId;
7547	if (depthStencilViewId != SVGA_ID_INVALID)
7548	pDepthStencilView = pDXContext->pBackendDXContext->paDepthStencilView[depthStencilViewId].u.pDepthStencilView;
7549
7550	pDevice->pImmediateContext->OMSetRenderTargetsAndUnorderedAccessViews(NumRTVs,
7551	apRenderTargetViews,
7552	pDepthStencilView,
7553	pDXContext->svgaDXContext.uavSpliceIndex,
7554	NumUAVs,
7555	apUnorderedAccessViews,
7556	aUAVInitialCounts);
7557	return VINF_SUCCESS;
7558	}
7559
7560
7561	static DECLCALLBACK(int) vmsvga3dBackDXSetRenderTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, uint32_t cRenderTargetViewId, SVGA3dRenderTargetViewId const *paRenderTargetViewId)
7562	{
7563	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7564	RT_NOREF(pBackend, pDXContext);
7565
7566	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
7567	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7568
7569	RT_NOREF(depthStencilViewId, cRenderTargetViewId, paRenderTargetViewId);
7570
7571	return VINF_SUCCESS;
7572	}
7573
7574
7575	static DECLCALLBACK(int) vmsvga3dBackDXSetBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dBlendStateId blendId, float const blendFactor[4], uint32_t sampleMask)
7576	{
7577	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7578	RT_NOREF(pBackend);
7579
7580	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
7581	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7582
7583	if (blendId != SVGA3D_INVALID_ID)
7584	{
7585	ID3D11BlendState1 *pBlendState = pDXContext->pBackendDXContext->papBlendState[blendId];
7586	pDevice->pImmediateContext->OMSetBlendState(pBlendState, blendFactor, sampleMask);
7587	}
7588	else
7589	pDevice->pImmediateContext->OMSetBlendState(NULL, NULL, 0);
7590
7591	return VINF_SUCCESS;
7592	}
7593
7594
7595	static DECLCALLBACK(int) vmsvga3dBackDXSetDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, uint32_t stencilRef)
7596	{
7597	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7598	RT_NOREF(pBackend);
7599
7600	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
7601	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7602
7603	if (depthStencilId != SVGA3D_INVALID_ID)
7604	{
7605	ID3D11DepthStencilState *pDepthStencilState = pDXContext->pBackendDXContext->papDepthStencilState[depthStencilId];
7606	pDevice->pImmediateContext->OMSetDepthStencilState(pDepthStencilState, stencilRef);
7607	}
7608	else
7609	pDevice->pImmediateContext->OMSetDepthStencilState(NULL, 0);
7610
7611	return VINF_SUCCESS;
7612	}
7613
7614
7615	static DECLCALLBACK(int) vmsvga3dBackDXSetRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId)
7616	{
7617	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7618	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
7619	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7620
7621	RT_NOREF(pBackend);
7622
7623	if (rasterizerId != SVGA3D_INVALID_ID)
7624	{
7625	ID3D11RasterizerState1 *pRasterizerState = pDXContext->pBackendDXContext->papRasterizerState[rasterizerId];
7626	pDevice->pImmediateContext->RSSetState(pRasterizerState);
7627	}
7628	else
7629	pDevice->pImmediateContext->RSSetState(NULL);
7630
7631	return VINF_SUCCESS;
7632	}
7633
7634
7635	typedef struct VGPU10QUERYINFO
7636	{
7637	SVGA3dQueryType svgaQueryType;
7638	uint32_t cbDataVMSVGA;
7639	D3D11_QUERY dxQueryType;
7640	uint32_t cbDataD3D11;
7641	} VGPU10QUERYINFO;
7642
7643	static VGPU10QUERYINFO const *dxQueryInfo(SVGA3dQueryType type)
7644	{
7645	static VGPU10QUERYINFO const aQueryInfo[SVGA3D_QUERYTYPE_MAX] =
7646	{
7647	{ SVGA3D_QUERYTYPE_OCCLUSION, sizeof(SVGADXOcclusionQueryResult),
7648	D3D11_QUERY_OCCLUSION, sizeof(UINT64) },
7649	{ SVGA3D_QUERYTYPE_TIMESTAMP, sizeof(SVGADXTimestampQueryResult),
7650	D3D11_QUERY_TIMESTAMP, sizeof(UINT64) },
7651	{ SVGA3D_QUERYTYPE_TIMESTAMPDISJOINT, sizeof(SVGADXTimestampDisjointQueryResult),
7652	D3D11_QUERY_TIMESTAMP_DISJOINT, sizeof(D3D11_QUERY_DATA_TIMESTAMP_DISJOINT) },
7653	{ SVGA3D_QUERYTYPE_PIPELINESTATS, sizeof(SVGADXPipelineStatisticsQueryResult),
7654	D3D11_QUERY_PIPELINE_STATISTICS, sizeof(D3D11_QUERY_DATA_PIPELINE_STATISTICS) },
7655	{ SVGA3D_QUERYTYPE_OCCLUSIONPREDICATE, sizeof(SVGADXOcclusionPredicateQueryResult),
7656	D3D11_QUERY_OCCLUSION_PREDICATE, sizeof(BOOL) },
7657	{ SVGA3D_QUERYTYPE_STREAMOUTPUTSTATS, sizeof(SVGADXStreamOutStatisticsQueryResult),
7658	D3D11_QUERY_SO_STATISTICS, sizeof(D3D11_QUERY_DATA_SO_STATISTICS) },
7659	{ SVGA3D_QUERYTYPE_STREAMOVERFLOWPREDICATE, sizeof(SVGADXStreamOutPredicateQueryResult),
7660	D3D11_QUERY_SO_OVERFLOW_PREDICATE, sizeof(BOOL) },
7661	{ SVGA3D_QUERYTYPE_OCCLUSION64, sizeof(SVGADXOcclusion64QueryResult),
7662	D3D11_QUERY_OCCLUSION, sizeof(UINT64) },
7663	{ SVGA3D_QUERYTYPE_SOSTATS_STREAM0, sizeof(SVGADXStreamOutStatisticsQueryResult),
7664	D3D11_QUERY_SO_STATISTICS_STREAM0, sizeof(D3D11_QUERY_DATA_SO_STATISTICS) },
7665	{ SVGA3D_QUERYTYPE_SOSTATS_STREAM1, sizeof(SVGADXStreamOutStatisticsQueryResult),
7666	D3D11_QUERY_SO_STATISTICS_STREAM1, sizeof(D3D11_QUERY_DATA_SO_STATISTICS) },
7667	{ SVGA3D_QUERYTYPE_SOSTATS_STREAM2, sizeof(SVGADXStreamOutStatisticsQueryResult),
7668	D3D11_QUERY_SO_STATISTICS_STREAM2, sizeof(D3D11_QUERY_DATA_SO_STATISTICS) },
7669	{ SVGA3D_QUERYTYPE_SOSTATS_STREAM3, sizeof(SVGADXStreamOutStatisticsQueryResult),
7670	D3D11_QUERY_SO_STATISTICS_STREAM3, sizeof(D3D11_QUERY_DATA_SO_STATISTICS) },
7671	{ SVGA3D_QUERYTYPE_SOP_STREAM0, sizeof(SVGADXStreamOutPredicateQueryResult),
7672	D3D11_QUERY_SO_OVERFLOW_PREDICATE_STREAM0, sizeof(BOOL) },
7673	{ SVGA3D_QUERYTYPE_SOP_STREAM1, sizeof(SVGADXStreamOutPredicateQueryResult),
7674	D3D11_QUERY_SO_OVERFLOW_PREDICATE_STREAM1, sizeof(BOOL) },
7675	{ SVGA3D_QUERYTYPE_SOP_STREAM2, sizeof(SVGADXStreamOutPredicateQueryResult),
7676	D3D11_QUERY_SO_OVERFLOW_PREDICATE_STREAM2, sizeof(BOOL) },
7677	{ SVGA3D_QUERYTYPE_SOP_STREAM3, sizeof(SVGADXStreamOutPredicateQueryResult),
7678	D3D11_QUERY_SO_OVERFLOW_PREDICATE_STREAM3, sizeof(BOOL) },
7679	};
7680
7681	ASSERT_GUEST_RETURN(type < RT_ELEMENTS(aQueryInfo), NULL);
7682	return &aQueryInfo[type];
7683	}
7684
7685	static int dxDefineQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId, SVGACOTableDXQueryEntry const *pEntry)
7686	{
7687	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
7688	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
7689
7690	DXQUERY *pDXQuery = &pDXContext->pBackendDXContext->paQuery[queryId];
7691	VGPU10QUERYINFO const *pQueryInfo = dxQueryInfo((SVGA3dQueryType)pEntry->type);
7692	if (!pQueryInfo)
7693	return VERR_INVALID_PARAMETER;
7694
7695	D3D11_QUERY_DESC desc;
7696	desc.Query = pQueryInfo->dxQueryType;
7697	desc.MiscFlags = 0;
7698	if (pEntry->flags & SVGA3D_DXQUERY_FLAG_PREDICATEHINT)
7699	desc.MiscFlags \|= (UINT)D3D11_QUERY_MISC_PREDICATEHINT;
7700
7701	HRESULT hr = pDXDevice->pDevice->CreateQuery(&desc, &pDXQuery->pQuery);
7702	AssertReturn(SUCCEEDED(hr), VERR_INVALID_STATE);
7703
7704	return VINF_SUCCESS;
7705	}
7706
7707
7708	static int dxDestroyQuery(DXQUERY *pDXQuery)
7709	{
7710	D3D_RELEASE(pDXQuery->pQuery);
7711	return VINF_SUCCESS;
7712	}
7713
7714
7715	static DECLCALLBACK(int) vmsvga3dBackDXDefineQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId, SVGACOTableDXQueryEntry const *pEntry)
7716	{
7717	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7718	RT_NOREF(pBackend);
7719
7720	return dxDefineQuery(pThisCC, pDXContext, queryId, pEntry);
7721	}
7722
7723
7724	static DECLCALLBACK(int) vmsvga3dBackDXDestroyQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId)
7725	{
7726	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7727	RT_NOREF(pBackend);
7728
7729	DXQUERY *pDXQuery = &pDXContext->pBackendDXContext->paQuery[queryId];
7730	dxDestroyQuery(pDXQuery);
7731
7732	return VINF_SUCCESS;
7733	}
7734
7735
7736	/** @todo queryId makes pDXQuery redundant */
7737	static int dxBeginQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId, DXQUERY *pDXQuery)
7738	{
7739	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
7740	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
7741
7742	/* Begin is disabled for some queries. */
7743	SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
7744	if (pEntry->type == SVGA3D_QUERYTYPE_TIMESTAMP)
7745	return VINF_SUCCESS;
7746
7747	pDXDevice->pImmediateContext->Begin(pDXQuery->pQuery);
7748	return VINF_SUCCESS;
7749	}
7750
7751
7752	static DECLCALLBACK(int) vmsvga3dBackDXBeginQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId)
7753	{
7754	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7755	RT_NOREF(pBackend);
7756
7757	DXQUERY *pDXQuery = &pDXContext->pBackendDXContext->paQuery[queryId];
7758	int rc = dxBeginQuery(pThisCC, pDXContext, queryId, pDXQuery);
7759	return rc;
7760	}
7761
7762
7763	static int dxGetQueryResult(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId,
7764	SVGADXQueryResultUnion pQueryResult, uint32_t pcbOut)
7765	{
7766	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
7767	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
7768
7769	typedef union _DXQUERYRESULT
7770	{
7771	UINT64 occlusion;
7772	UINT64 timestamp;
7773	D3D11_QUERY_DATA_TIMESTAMP_DISJOINT timestampDisjoint;
7774	D3D11_QUERY_DATA_PIPELINE_STATISTICS pipelineStatistics;
7775	BOOL occlusionPredicate;
7776	D3D11_QUERY_DATA_SO_STATISTICS soStatistics;
7777	BOOL soOverflowPredicate;
7778	} DXQUERYRESULT;
7779
7780	DXQUERY *pDXQuery = &pDXContext->pBackendDXContext->paQuery[queryId];
7781	SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
7782	VGPU10QUERYINFO const *pQueryInfo = dxQueryInfo((SVGA3dQueryType)pEntry->type);
7783	if (!pQueryInfo)
7784	return VERR_INVALID_PARAMETER;
7785
7786	DXQUERYRESULT dxQueryResult;
7787	while (pDXDevice->pImmediateContext->GetData(pDXQuery->pQuery, &dxQueryResult, pQueryInfo->cbDataD3D11, 0) != S_OK)
7788	{
7789	RTThreadYield();
7790	}
7791
7792	/* Copy back the result. */
7793	switch (pEntry->type)
7794	{
7795	case SVGA3D_QUERYTYPE_OCCLUSION:
7796	pQueryResult->occ.samplesRendered = (uint32_t)dxQueryResult.occlusion;
7797	break;
7798	case SVGA3D_QUERYTYPE_TIMESTAMP:
7799	pQueryResult->ts.timestamp = dxQueryResult.timestamp;
7800	break;
7801	case SVGA3D_QUERYTYPE_TIMESTAMPDISJOINT:
7802	pQueryResult->tsDisjoint.realFrequency = dxQueryResult.timestampDisjoint.Frequency;
7803	pQueryResult->tsDisjoint.disjoint = dxQueryResult.timestampDisjoint.Disjoint;
7804	break;
7805	case SVGA3D_QUERYTYPE_PIPELINESTATS:
7806	pQueryResult->pipelineStats.inputAssemblyVertices = dxQueryResult.pipelineStatistics.IAVertices;
7807	pQueryResult->pipelineStats.inputAssemblyPrimitives = dxQueryResult.pipelineStatistics.IAPrimitives;
7808	pQueryResult->pipelineStats.vertexShaderInvocations = dxQueryResult.pipelineStatistics.VSInvocations;
7809	pQueryResult->pipelineStats.geometryShaderInvocations = dxQueryResult.pipelineStatistics.GSInvocations;
7810	pQueryResult->pipelineStats.geometryShaderPrimitives = dxQueryResult.pipelineStatistics.GSPrimitives;
7811	pQueryResult->pipelineStats.clipperInvocations = dxQueryResult.pipelineStatistics.CInvocations;
7812	pQueryResult->pipelineStats.clipperPrimitives = dxQueryResult.pipelineStatistics.CPrimitives;
7813	pQueryResult->pipelineStats.pixelShaderInvocations = dxQueryResult.pipelineStatistics.PSInvocations;
7814	pQueryResult->pipelineStats.hullShaderInvocations = dxQueryResult.pipelineStatistics.HSInvocations;
7815	pQueryResult->pipelineStats.domainShaderInvocations = dxQueryResult.pipelineStatistics.DSInvocations;
7816	pQueryResult->pipelineStats.computeShaderInvocations = dxQueryResult.pipelineStatistics.CSInvocations;
7817	break;
7818	case SVGA3D_QUERYTYPE_OCCLUSIONPREDICATE:
7819	pQueryResult->occPred.anySamplesRendered = dxQueryResult.occlusionPredicate;
7820	break;
7821	case SVGA3D_QUERYTYPE_STREAMOUTPUTSTATS:
7822	case SVGA3D_QUERYTYPE_SOSTATS_STREAM0:
7823	case SVGA3D_QUERYTYPE_SOSTATS_STREAM1:
7824	case SVGA3D_QUERYTYPE_SOSTATS_STREAM2:
7825	case SVGA3D_QUERYTYPE_SOSTATS_STREAM3:
7826	pQueryResult->soStats.numPrimitivesWritten = dxQueryResult.soStatistics.NumPrimitivesWritten;
7827	pQueryResult->soStats.numPrimitivesRequired = dxQueryResult.soStatistics.PrimitivesStorageNeeded;
7828	break;
7829	case SVGA3D_QUERYTYPE_STREAMOVERFLOWPREDICATE:
7830	case SVGA3D_QUERYTYPE_SOP_STREAM0:
7831	case SVGA3D_QUERYTYPE_SOP_STREAM1:
7832	case SVGA3D_QUERYTYPE_SOP_STREAM2:
7833	case SVGA3D_QUERYTYPE_SOP_STREAM3:
7834	pQueryResult->soPred.overflowed = dxQueryResult.soOverflowPredicate;
7835	break;
7836	case SVGA3D_QUERYTYPE_OCCLUSION64:
7837	pQueryResult->occ64.samplesRendered = dxQueryResult.occlusion;
7838	break;
7839	}
7840
7841	*pcbOut = pQueryInfo->cbDataVMSVGA;
7842	return VINF_SUCCESS;
7843	}
7844
7845	static int dxEndQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId,
7846	SVGADXQueryResultUnion pQueryResult, uint32_t pcbOut)
7847	{
7848	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
7849	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
7850
7851	DXQUERY *pDXQuery = &pDXContext->pBackendDXContext->paQuery[queryId];
7852	pDXDevice->pImmediateContext->End(pDXQuery->pQuery);
7853
7854	/** @todo Consider issuing QueryEnd and getting data later in FIFO thread loop. */
7855	return dxGetQueryResult(pThisCC, pDXContext, queryId, pQueryResult, pcbOut);
7856	}
7857
7858
7859	static DECLCALLBACK(int) vmsvga3dBackDXEndQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
7860	SVGA3dQueryId queryId, SVGADXQueryResultUnion pQueryResult, uint32_t pcbOut)
7861	{
7862	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7863	RT_NOREF(pBackend);
7864
7865	int rc = dxEndQuery(pThisCC, pDXContext, queryId, pQueryResult, pcbOut);
7866	return rc;
7867	}
7868
7869
7870	static DECLCALLBACK(int) vmsvga3dBackDXSetPredication(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId, uint32_t predicateValue)
7871	{
7872	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7873	RT_NOREF(pBackend);
7874
7875	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
7876	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
7877
7878	if (queryId != SVGA3D_INVALID_ID)
7879	{
7880	DEBUG_BREAKPOINT_TEST();
7881	DXQUERY *pDXQuery = &pDXContext->pBackendDXContext->paQuery[queryId];
7882	SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
7883
7884	VGPU10QUERYINFO const *pQueryInfo = dxQueryInfo((SVGA3dQueryType)pEntry->type);
7885	if (!pQueryInfo)
7886	return VERR_INVALID_PARAMETER;
7887
7888	D3D_RELEASE(pDXQuery->pQuery);
7889
7890	D3D11_QUERY_DESC desc;
7891	desc.Query = pQueryInfo->dxQueryType;
7892	desc.MiscFlags = 0;
7893	if (pEntry->flags & SVGA3D_DXQUERY_FLAG_PREDICATEHINT)
7894	desc.MiscFlags \|= (UINT)D3D11_QUERY_MISC_PREDICATEHINT;
7895
7896	HRESULT hr = pDXDevice->pDevice->CreatePredicate(&desc, &pDXQuery->pPredicate);
7897	AssertReturn(SUCCEEDED(hr), VERR_INVALID_STATE);
7898
7899	pDXDevice->pImmediateContext->SetPredication(pDXQuery->pPredicate, RT_BOOL(predicateValue));
7900	}
7901	else
7902	pDXDevice->pImmediateContext->SetPredication(NULL, FALSE);
7903
7904	return VINF_SUCCESS;
7905	}
7906
7907
7908	static DECLCALLBACK(int) vmsvga3dBackDXSetSOTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t cSOTarget, SVGA3dSoTarget const *paSoTarget)
7909	{
7910	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7911	RT_NOREF(pBackend);
7912
7913	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
7914	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7915
7916	/* For each paSoTarget[i]:
7917	* If the stream outout buffer object does not exist then create it.
7918	* If the surface has been updated by the guest then update the buffer object.
7919	* Use SOSetTargets to set the buffers.
7920	*/
7921
7922	ID3D11Buffer *paResource[SVGA3D_DX_MAX_SOTARGETS];
7923	UINT paOffset[SVGA3D_DX_MAX_SOTARGETS];
7924
7925	/* Always re-bind all 4 SO targets. They can be NULL. */
7926	for (uint32_t i = 0; i < SVGA3D_DX_MAX_SOTARGETS; ++i)
7927	{
7928	/* Get corresponding resource. Create the buffer if does not yet exist. */
7929	if (i < cSOTarget && paSoTarget[i].sid != SVGA_ID_INVALID)
7930	{
7931	PVMSVGA3DSURFACE pSurface;
7932	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, paSoTarget[i].sid, &pSurface);
7933	AssertRCReturn(rc, rc);
7934
7935	if (pSurface->pBackendSurface == NULL)
7936	{
7937	/* Create the resource. */
7938	rc = vmsvga3dBackSurfaceCreateSoBuffer(pThisCC, pSurface);
7939	AssertRCReturn(rc, rc);
7940	}
7941
7942	/** @todo How paSoTarget[i].sizeInBytes is used? Maybe when the buffer is created? */
7943	paResource[i] = pSurface->pBackendSurface->u.pBuffer;
7944	paOffset[i] = paSoTarget[i].offset;
7945	}
7946	else
7947	{
7948	paResource[i] = NULL;
7949	paOffset[i] = 0;
7950	}
7951	}
7952
7953	pDevice->pImmediateContext->SOSetTargets(SVGA3D_DX_MAX_SOTARGETS, paResource, paOffset);
7954
7955	pDXContext->pBackendDXContext->cSOTarget = cSOTarget;
7956
7957	return VINF_SUCCESS;
7958	}
7959
7960
7961	static DECLCALLBACK(int) vmsvga3dBackDXSetViewports(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t cViewport, SVGA3dViewport const *paViewport)
7962	{
7963	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7964	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
7965	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7966
7967	RT_NOREF(pBackend, pDXContext);
7968
7969	/* D3D11_VIEWPORT is identical to SVGA3dViewport. */
7970	D3D11_VIEWPORT pViewports = (D3D11_VIEWPORT )paViewport;
7971
7972	pDevice->pImmediateContext->RSSetViewports(cViewport, pViewports);
7973	return VINF_SUCCESS;
7974	}
7975
7976
7977	static DECLCALLBACK(int) vmsvga3dBackDXSetScissorRects(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t cRect, SVGASignedRect const *paRect)
7978	{
7979	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
7980	RT_NOREF(pBackend, pDXContext);
7981
7982	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
7983	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
7984
7985	/* D3D11_RECT is identical to SVGASignedRect. */
7986	D3D11_RECT pRects = (D3D11_RECT )paRect;
7987
7988	pDevice->pImmediateContext->RSSetScissorRects(cRect, pRects);
7989	return VINF_SUCCESS;
7990	}
7991
7992
7993	static DECLCALLBACK(int) vmsvga3dBackDXClearRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGA3dRGBAFloat const *pRGBA)
7994	{
7995	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
7996	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
7997
7998	DXVIEW *pDXView;
7999	int rc = dxEnsureRenderTargetView(pThisCC, pDXContext, renderTargetViewId, &pDXView);
8000	AssertRCReturn(rc, rc);
8001
8002	pDXDevice->pImmediateContext->ClearRenderTargetView(pDXView->u.pRenderTargetView, pRGBA->value);
8003	return VINF_SUCCESS;
8004	}
8005
8006
8007	static DECLCALLBACK(int) vmsvga3dBackVBDXClearRenderTargetViewRegion(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId,
8008	SVGA3dRGBAFloat const pColor, uint32_t cRect, SVGASignedRect const paRect)
8009	{
8010	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
8011	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
8012
8013	DXVIEW *pDXView;
8014	int rc = dxEnsureRenderTargetView(pThisCC, pDXContext, renderTargetViewId, &pDXView);
8015	AssertRCReturn(rc, rc);
8016
8017	pDXDevice->pImmediateContext->ClearView(pDXView->u.pRenderTargetView, pColor->value, (D3D11_RECT *)paRect, cRect);
8018	return VINF_SUCCESS;
8019	}
8020
8021
8022	static DECLCALLBACK(int) vmsvga3dBackDXClearDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t flags, SVGA3dDepthStencilViewId depthStencilViewId, float depth, uint8_t stencil)
8023	{
8024	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
8025	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8026
8027	DXVIEW *pDXView;
8028	int rc = dxEnsureDepthStencilView(pThisCC, pDXContext, depthStencilViewId, &pDXView);
8029	AssertRCReturn(rc, rc);
8030
8031	UINT ClearFlags = 0;
8032	if (flags & SVGA3D_CLEAR_DEPTH)
8033	ClearFlags \|= D3D11_CLEAR_DEPTH;
8034	if (flags & SVGA3D_CLEAR_STENCIL)
8035	ClearFlags \|= D3D11_CLEAR_STENCIL;
8036
8037	pDevice->pImmediateContext->ClearDepthStencilView(pDXView->u.pDepthStencilView, ClearFlags, depth, stencil);
8038	return VINF_SUCCESS;
8039	}
8040
8041
8042	static DECLCALLBACK(int) vmsvga3dBackDXPredCopyRegion(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId dstSid, uint32_t dstSubResource, SVGA3dSurfaceId srcSid, uint32_t srcSubResource, SVGA3dCopyBox const *pBox)
8043	{
8044	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8045	RT_NOREF(pBackend, pDXContext);
8046
8047	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
8048	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8049
8050	PVMSVGA3DSURFACE pSrcSurface;
8051	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, srcSid, &pSrcSurface);
8052	AssertRCReturn(rc, rc);
8053
8054	PVMSVGA3DSURFACE pDstSurface;
8055	rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, dstSid, &pDstSurface);
8056	AssertRCReturn(rc, rc);
8057
8058	if (pSrcSurface->pBackendSurface == NULL)
8059	{
8060	/* Create the resource. */
8061	if (pSrcSurface->format != SVGA3D_BUFFER)
8062	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pSrcSurface);
8063	else
8064	rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pSrcSurface);
8065	AssertRCReturn(rc, rc);
8066	}
8067
8068	if (pDstSurface->pBackendSurface == NULL)
8069	{
8070	/* Create the resource. */
8071	if (pSrcSurface->format != SVGA3D_BUFFER)
8072	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDstSurface);
8073	else
8074	rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDstSurface);
8075	AssertRCReturn(rc, rc);
8076	}
8077
8078	LogFunc(("src%s sid = %u -> dst%s sid = %u\n",
8079	(pSrcSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : "", pSrcSurface->id,
8080	(pDstSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : "", pDstSurface->id));
8081
8082	/* Clip the box. */
8083	/** @todo Use [src\|dst]SubResource to index p[Src\|Dst]Surface->paMipmapLevels array directly. */
8084	uint32_t iSrcFace;
8085	uint32_t iSrcMipmap;
8086	vmsvga3dCalcMipmapAndFace(pSrcSurface->cLevels, srcSubResource, &iSrcMipmap, &iSrcFace);
8087
8088	uint32_t iDstFace;
8089	uint32_t iDstMipmap;
8090	vmsvga3dCalcMipmapAndFace(pDstSurface->cLevels, dstSubResource, &iDstMipmap, &iDstFace);
8091
8092	PVMSVGA3DMIPMAPLEVEL pSrcMipLevel;
8093	rc = vmsvga3dMipmapLevel(pSrcSurface, iSrcFace, iSrcMipmap, &pSrcMipLevel);
8094	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
8095
8096	PVMSVGA3DMIPMAPLEVEL pDstMipLevel;
8097	rc = vmsvga3dMipmapLevel(pDstSurface, iDstFace, iDstMipmap, &pDstMipLevel);
8098	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
8099
8100	SVGA3dCopyBox clipBox = *pBox;
8101	vmsvgaR3ClipCopyBox(&pSrcMipLevel->mipmapSize, &pDstMipLevel->mipmapSize, &clipBox);
8102
8103	UINT DstSubresource = dstSubResource;
8104	UINT DstX = clipBox.x;
8105	UINT DstY = clipBox.y;
8106	UINT DstZ = clipBox.z;
8107
8108	UINT SrcSubresource = srcSubResource;
8109	D3D11_BOX SrcBox;
8110	SrcBox.left = clipBox.srcx;
8111	SrcBox.top = clipBox.srcy;
8112	SrcBox.front = clipBox.srcz;
8113	SrcBox.right = clipBox.srcx + clipBox.w;
8114	SrcBox.bottom = clipBox.srcy + clipBox.h;
8115	SrcBox.back = clipBox.srcz + clipBox.d;
8116
8117	ID3D11Resource *pDstResource;
8118	ID3D11Resource *pSrcResource;
8119
8120	pDstResource = dxResource(pDstSurface);
8121	pSrcResource = dxResource(pSrcSurface);
8122
8123	pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
8124	pSrcResource, SrcSubresource, &SrcBox);
8125
8126	#ifdef DUMP_BITMAPS
8127	SVGA3dSurfaceImageId image;
8128	image.sid = pDstSurface->id;
8129	image.face = 0;
8130	image.mipmap = 0;
8131	VMSVGA3D_MAPPED_SURFACE map;
8132	int rc2 = vmsvga3dSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
8133	if (RT_SUCCESS(rc2))
8134	{
8135	vmsvga3dMapWriteBmpFile(&map, "copyregion-");
8136	vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
8137	}
8138	else
8139	Log(("Map failed %Rrc\n", rc));
8140	#endif
8141
8142	return VINF_SUCCESS;
8143	}
8144
8145
8146	static DECLCALLBACK(int) vmsvga3dBackDXPredCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId dstSid, SVGA3dSurfaceId srcSid)
8147	{
8148	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8149	RT_NOREF(pBackend, pDXContext);
8150
8151	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
8152	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8153
8154	PVMSVGA3DSURFACE pSrcSurface;
8155	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, srcSid, &pSrcSurface);
8156	AssertRCReturn(rc, rc);
8157
8158	PVMSVGA3DSURFACE pDstSurface;
8159	rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, dstSid, &pDstSurface);
8160	AssertRCReturn(rc, rc);
8161
8162	if (pSrcSurface->pBackendSurface == NULL)
8163	{
8164	/* Create the resource. */
8165	if (pSrcSurface->format != SVGA3D_BUFFER)
8166	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pSrcSurface);
8167	else
8168	rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pSrcSurface);
8169	AssertRCReturn(rc, rc);
8170	}
8171
8172	if (pDstSurface->pBackendSurface == NULL)
8173	{
8174	/* Create the resource. */
8175	if (pSrcSurface->format != SVGA3D_BUFFER)
8176	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDstSurface);
8177	else
8178	rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDstSurface);
8179	AssertRCReturn(rc, rc);
8180	}
8181
8182	LogFunc(("src%s sid = %u -> dst%s sid = %u\n",
8183	(pSrcSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : "", pSrcSurface->id,
8184	(pDstSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : "", pDstSurface->id));
8185
8186	ID3D11Resource *pDstResource = dxResource(pDstSurface);
8187	ID3D11Resource *pSrcResource = dxResource(pSrcSurface);
8188
8189	pDevice->pImmediateContext->CopyResource(pDstResource, pSrcResource);
8190
8191	return VINF_SUCCESS;
8192	}
8193
8194
8195	#include "shaders/d3d11blitter.hlsl.vs.h"
8196	#include "shaders/d3d11blitter.hlsl.ps.h"
8197
8198	#define HTEST(stmt) \
8199	hr = stmt; \
8200	AssertReturn(SUCCEEDED(hr), hr)
8201
8202
8203	static void BlitRelease(D3D11BLITTER *pBlitter)
8204	{
8205	D3D_RELEASE(pBlitter->pVertexShader);
8206	D3D_RELEASE(pBlitter->pPixelShader);
8207	D3D_RELEASE(pBlitter->pSamplerState);
8208	D3D_RELEASE(pBlitter->pRasterizerState);
8209	D3D_RELEASE(pBlitter->pBlendState);
8210	RT_ZERO(*pBlitter);
8211	}
8212
8213
8214	static HRESULT BlitInit(D3D11BLITTER pBlitter, ID3D11Device1 pDevice, ID3D11DeviceContext1 *pImmediateContext)
8215	{
8216	HRESULT hr;
8217
8218	RT_ZERO(*pBlitter);
8219
8220	pBlitter->pDevice = pDevice;
8221	pBlitter->pImmediateContext = pImmediateContext;
8222
8223	HTEST(pBlitter->pDevice->CreateVertexShader(g_vs_blitter, sizeof(g_vs_blitter), NULL, &pBlitter->pVertexShader));
8224	HTEST(pBlitter->pDevice->CreatePixelShader(g_ps_blitter, sizeof(g_ps_blitter), NULL, &pBlitter->pPixelShader));
8225
8226	D3D11_SAMPLER_DESC SamplerDesc;
8227	SamplerDesc.Filter = D3D11_FILTER_ANISOTROPIC;
8228	SamplerDesc.AddressU = D3D11_TEXTURE_ADDRESS_WRAP;
8229	SamplerDesc.AddressV = D3D11_TEXTURE_ADDRESS_WRAP;
8230	SamplerDesc.AddressW = D3D11_TEXTURE_ADDRESS_WRAP;
8231	SamplerDesc.MipLODBias = 0.0f;
8232	SamplerDesc.MaxAnisotropy = 4;
8233	SamplerDesc.ComparisonFunc = D3D11_COMPARISON_ALWAYS;
8234	SamplerDesc.BorderColor[0] = 0.0f;
8235	SamplerDesc.BorderColor[1] = 0.0f;
8236	SamplerDesc.BorderColor[2] = 0.0f;
8237	SamplerDesc.BorderColor[3] = 0.0f;
8238	SamplerDesc.MinLOD = 0.0f;
8239	SamplerDesc.MaxLOD = 0.0f;
8240	HTEST(pBlitter->pDevice->CreateSamplerState(&SamplerDesc, &pBlitter->pSamplerState));
8241
8242	D3D11_RASTERIZER_DESC1 RasterizerDesc;
8243	RasterizerDesc.FillMode = D3D11_FILL_SOLID;
8244	RasterizerDesc.CullMode = D3D11_CULL_NONE;
8245	RasterizerDesc.FrontCounterClockwise = FALSE;
8246	RasterizerDesc.DepthBias = 0;
8247	RasterizerDesc.DepthBiasClamp = 0.0f;
8248	RasterizerDesc.SlopeScaledDepthBias = 0.0f;
8249	RasterizerDesc.DepthClipEnable = FALSE;
8250	RasterizerDesc.ScissorEnable = FALSE;
8251	RasterizerDesc.MultisampleEnable = FALSE;
8252	RasterizerDesc.AntialiasedLineEnable = FALSE;
8253	RasterizerDesc.ForcedSampleCount = 0;
8254	HTEST(pBlitter->pDevice->CreateRasterizerState1(&RasterizerDesc, &pBlitter->pRasterizerState));
8255
8256	D3D11_BLEND_DESC1 BlendDesc;
8257	BlendDesc.AlphaToCoverageEnable = FALSE;
8258	BlendDesc.IndependentBlendEnable = FALSE;
8259	for (unsigned i = 0; i < RT_ELEMENTS(BlendDesc.RenderTarget); ++i)
8260	{
8261	BlendDesc.RenderTarget[i].BlendEnable = FALSE;
8262	BlendDesc.RenderTarget[i].LogicOpEnable = FALSE;
8263	BlendDesc.RenderTarget[i].SrcBlend = D3D11_BLEND_SRC_COLOR;
8264	BlendDesc.RenderTarget[i].DestBlend = D3D11_BLEND_ZERO;
8265	BlendDesc.RenderTarget[i].BlendOp = D3D11_BLEND_OP_ADD;
8266	BlendDesc.RenderTarget[i].SrcBlendAlpha = D3D11_BLEND_SRC_ALPHA;
8267	BlendDesc.RenderTarget[i].DestBlendAlpha = D3D11_BLEND_ZERO;
8268	BlendDesc.RenderTarget[i].BlendOpAlpha = D3D11_BLEND_OP_ADD;
8269	BlendDesc.RenderTarget[i].LogicOp = D3D11_LOGIC_OP_CLEAR;
8270	BlendDesc.RenderTarget[i].RenderTargetWriteMask = 0xF;
8271	}
8272	HTEST(pBlitter->pDevice->CreateBlendState1(&BlendDesc, &pBlitter->pBlendState));
8273
8274	return S_OK;
8275	}
8276
8277
8278	static HRESULT BlitFromTexture(D3D11BLITTER pBlitter, ID3D11RenderTargetView pDstRenderTargetView,
8279	float cDstWidth, float cDstHeight, D3D11_RECT const &rectDst,
8280	ID3D11ShaderResourceView *pSrcShaderResourceView)
8281	{
8282	HRESULT hr;
8283
8284	/*
8285	* Save pipeline state.
8286	*/
8287	struct
8288	{
8289	D3D11_PRIMITIVE_TOPOLOGY Topology;
8290	ID3D11InputLayout *pInputLayout;
8291	ID3D11Buffer *pConstantBuffer;
8292	ID3D11VertexShader *pVertexShader;
8293	ID3D11HullShader *pHullShader;
8294	ID3D11DomainShader *pDomainShader;
8295	ID3D11GeometryShader *pGeometryShader;
8296	ID3D11ShaderResourceView *pShaderResourceView;
8297	ID3D11PixelShader *pPixelShader;
8298	ID3D11SamplerState *pSamplerState;
8299	ID3D11RasterizerState *pRasterizerState;
8300	ID3D11BlendState *pBlendState;
8301	FLOAT BlendFactor[4];
8302	UINT SampleMask;
8303	ID3D11RenderTargetView *apRenderTargetView[D3D11_SIMULTANEOUS_RENDER_TARGET_COUNT];
8304	ID3D11DepthStencilView *pDepthStencilView;
8305	UINT NumViewports;
8306	D3D11_VIEWPORT aViewport[D3D11_VIEWPORT_AND_SCISSORRECT_OBJECT_COUNT_PER_PIPELINE];
8307	} SavedState;
8308
8309	pBlitter->pImmediateContext->IAGetPrimitiveTopology(&SavedState.Topology);
8310	pBlitter->pImmediateContext->IAGetInputLayout(&SavedState.pInputLayout);
8311	pBlitter->pImmediateContext->VSGetConstantBuffers(0, 1, &SavedState.pConstantBuffer);
8312	pBlitter->pImmediateContext->VSGetShader(&SavedState.pVertexShader, NULL, NULL);
8313	pBlitter->pImmediateContext->HSGetShader(&SavedState.pHullShader, NULL, NULL);
8314	pBlitter->pImmediateContext->DSGetShader(&SavedState.pDomainShader, NULL, NULL);
8315	pBlitter->pImmediateContext->GSGetShader(&SavedState.pGeometryShader, NULL, NULL);
8316	pBlitter->pImmediateContext->PSGetShaderResources(0, 1, &SavedState.pShaderResourceView);
8317	pBlitter->pImmediateContext->PSGetShader(&SavedState.pPixelShader, NULL, NULL);
8318	pBlitter->pImmediateContext->PSGetSamplers(0, 1, &SavedState.pSamplerState);
8319	pBlitter->pImmediateContext->RSGetState(&SavedState.pRasterizerState);
8320	pBlitter->pImmediateContext->OMGetBlendState(&SavedState.pBlendState, SavedState.BlendFactor, &SavedState.SampleMask);
8321	pBlitter->pImmediateContext->OMGetRenderTargets(RT_ELEMENTS(SavedState.apRenderTargetView), SavedState.apRenderTargetView, &SavedState.pDepthStencilView);
8322	SavedState.NumViewports = RT_ELEMENTS(SavedState.aViewport);
8323	pBlitter->pImmediateContext->RSGetViewports(&SavedState.NumViewports, &SavedState.aViewport[0]);
8324
8325	/*
8326	* Setup pipeline for the blitter.
8327	*/
8328
8329	/* Render target is first.
8330	* If the source texture is bound as a render target, then this call will unbind it
8331	* and allow to use it as the shader resource.
8332	*/
8333	pBlitter->pImmediateContext->OMSetRenderTargets(1, &pDstRenderTargetView, NULL);
8334
8335	/* Input assembler. */
8336	pBlitter->pImmediateContext->IASetInputLayout(NULL);
8337	pBlitter->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP);
8338
8339	/* Constant buffer. */
8340	struct
8341	{
8342	float scaleX;
8343	float scaleY;
8344	float offsetX;
8345	float offsetY;
8346	} VSConstantBuffer;
8347	VSConstantBuffer.scaleX = (float)(rectDst.right - rectDst.left) / cDstWidth;
8348	VSConstantBuffer.scaleY = (float)(rectDst.bottom - rectDst.top) / cDstHeight;
8349	VSConstantBuffer.offsetX = (float)(rectDst.right + rectDst.left) / cDstWidth - 1.0f;
8350	VSConstantBuffer.offsetY = -((float)(rectDst.bottom + rectDst.top) / cDstHeight - 1.0f);
8351
8352	D3D11_SUBRESOURCE_DATA initialData;
8353	initialData.pSysMem = &VSConstantBuffer;
8354	initialData.SysMemPitch = sizeof(VSConstantBuffer);
8355	initialData.SysMemSlicePitch = sizeof(VSConstantBuffer);
8356
8357	D3D11_BUFFER_DESC bd;
8358	RT_ZERO(bd);
8359	bd.ByteWidth = sizeof(VSConstantBuffer);
8360	bd.Usage = D3D11_USAGE_IMMUTABLE;
8361	bd.BindFlags = D3D11_BIND_CONSTANT_BUFFER;
8362
8363	ID3D11Buffer *pConstantBuffer;
8364	HTEST(pBlitter->pDevice->CreateBuffer(&bd, &initialData, &pConstantBuffer));
8365	pBlitter->pImmediateContext->VSSetConstantBuffers(0, 1, &pConstantBuffer);
8366	D3D_RELEASE(pConstantBuffer); /* xSSetConstantBuffers "will hold a reference to the interfaces passed in." */
8367
8368	/* Vertex shader. */
8369	pBlitter->pImmediateContext->VSSetShader(pBlitter->pVertexShader, NULL, 0);
8370
8371	/* Unused shaders. */
8372	pBlitter->pImmediateContext->HSSetShader(NULL, NULL, 0);
8373	pBlitter->pImmediateContext->DSSetShader(NULL, NULL, 0);
8374	pBlitter->pImmediateContext->GSSetShader(NULL, NULL, 0);
8375
8376	/* Shader resource view. */
8377	pBlitter->pImmediateContext->PSSetShaderResources(0, 1, &pSrcShaderResourceView);
8378
8379	/* Pixel shader. */
8380	pBlitter->pImmediateContext->PSSetShader(pBlitter->pPixelShader, NULL, 0);
8381
8382	/* Sampler. */
8383	pBlitter->pImmediateContext->PSSetSamplers(0, 1, &pBlitter->pSamplerState);
8384
8385	/* Rasterizer. */
8386	pBlitter->pImmediateContext->RSSetState(pBlitter->pRasterizerState);
8387
8388	/* Blend state. */
8389	static FLOAT const BlendFactor[4] = { 0.0f, 0.0f, 0.0f, 0.0f };
8390	pBlitter->pImmediateContext->OMSetBlendState(pBlitter->pBlendState, BlendFactor, 0xffffffff);
8391
8392	/* Viewport. */
8393	D3D11_VIEWPORT Viewport;
8394	Viewport.TopLeftX = 0;
8395	Viewport.TopLeftY = 0;
8396	Viewport.Width = cDstWidth;
8397	Viewport.Height = cDstHeight;
8398	Viewport.MinDepth = 0.0f;
8399	Viewport.MaxDepth = 1.0f;
8400	pBlitter->pImmediateContext->RSSetViewports(1, &Viewport);
8401
8402	/* Draw. */
8403	pBlitter->pImmediateContext->Draw(4, 0);
8404
8405	/*
8406	* Restore pipeline state.
8407	*/
8408	pBlitter->pImmediateContext->IASetPrimitiveTopology(SavedState.Topology);
8409	pBlitter->pImmediateContext->IASetInputLayout(SavedState.pInputLayout);
8410	D3D_RELEASE(SavedState.pInputLayout);
8411	pBlitter->pImmediateContext->VSSetConstantBuffers(0, 1, &SavedState.pConstantBuffer);
8412	D3D_RELEASE(SavedState.pConstantBuffer);
8413	pBlitter->pImmediateContext->VSSetShader(SavedState.pVertexShader, NULL, 0);
8414	D3D_RELEASE(SavedState.pVertexShader);
8415
8416	pBlitter->pImmediateContext->HSSetShader(SavedState.pHullShader, NULL, 0);
8417	D3D_RELEASE(SavedState.pHullShader);
8418	pBlitter->pImmediateContext->DSSetShader(SavedState.pDomainShader, NULL, 0);
8419	D3D_RELEASE(SavedState.pDomainShader);
8420	pBlitter->pImmediateContext->GSSetShader(SavedState.pGeometryShader, NULL, 0);
8421	D3D_RELEASE(SavedState.pGeometryShader);
8422
8423	pBlitter->pImmediateContext->PSSetShaderResources(0, 1, &SavedState.pShaderResourceView);
8424	D3D_RELEASE(SavedState.pShaderResourceView);
8425	pBlitter->pImmediateContext->PSSetShader(SavedState.pPixelShader, NULL, 0);
8426	D3D_RELEASE(SavedState.pPixelShader);
8427	pBlitter->pImmediateContext->PSSetSamplers(0, 1, &SavedState.pSamplerState);
8428	D3D_RELEASE(SavedState.pSamplerState);
8429	pBlitter->pImmediateContext->RSSetState(SavedState.pRasterizerState);
8430	D3D_RELEASE(SavedState.pRasterizerState);
8431	pBlitter->pImmediateContext->OMSetBlendState(SavedState.pBlendState, SavedState.BlendFactor, SavedState.SampleMask);
8432	D3D_RELEASE(SavedState.pBlendState);
8433	pBlitter->pImmediateContext->OMSetRenderTargets(RT_ELEMENTS(SavedState.apRenderTargetView), SavedState.apRenderTargetView, SavedState.pDepthStencilView);
8434	D3D_RELEASE_ARRAY(RT_ELEMENTS(SavedState.apRenderTargetView), SavedState.apRenderTargetView);
8435	D3D_RELEASE(SavedState.pDepthStencilView);
8436	pBlitter->pImmediateContext->RSSetViewports(SavedState.NumViewports, &SavedState.aViewport[0]);
8437
8438	return S_OK;
8439	}
8440
8441
8442	static DECLCALLBACK(int) vmsvga3dBackDXPresentBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
8443	SVGA3dSurfaceId dstSid, uint32_t dstSubResource, SVGA3dBox const *pBoxDst,
8444	SVGA3dSurfaceId srcSid, uint32_t srcSubResource, SVGA3dBox const *pBoxSrc,
8445	SVGA3dDXPresentBltMode mode)
8446	{
8447	RT_NOREF(pDXContext, mode);
8448
8449	ASSERT_GUEST_RETURN(pBoxDst->z == 0 && pBoxDst->d == 1, VERR_INVALID_PARAMETER);
8450	ASSERT_GUEST_RETURN(pBoxSrc->z == 0 && pBoxSrc->d == 1, VERR_INVALID_PARAMETER);
8451
8452	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8453	RT_NOREF(pBackend);
8454
8455	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
8456	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8457
8458	PVMSVGA3DSURFACE pSrcSurface;
8459	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, srcSid, &pSrcSurface);
8460	AssertRCReturn(rc, rc);
8461
8462	PVMSVGA3DSURFACE pDstSurface;
8463	rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, dstSid, &pDstSurface);
8464	AssertRCReturn(rc, rc);
8465
8466	if (pSrcSurface->pBackendSurface == NULL)
8467	{
8468	/* Create the resource. */
8469	if (pSrcSurface->format != SVGA3D_BUFFER)
8470	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pSrcSurface);
8471	else
8472	rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pSrcSurface);
8473	AssertRCReturn(rc, rc);
8474	}
8475
8476	if (pDstSurface->pBackendSurface == NULL)
8477	{
8478	/* Create the resource. */
8479	if (pSrcSurface->format != SVGA3D_BUFFER)
8480	rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDstSurface);
8481	else
8482	rc = vmsvga3dBackSurfaceCreateResource(pThisCC, pDstSurface);
8483	AssertRCReturn(rc, rc);
8484	}
8485
8486	#ifdef DEBUG_sunlover
8487	if (pSrcSurface->surfaceDesc.multisampleCount > 1 \|\| pDstSurface->surfaceDesc.multisampleCount > 1)
8488	DEBUG_BREAKPOINT_TEST();
8489	#endif
8490
8491	LogFunc(("src%s sid = %u -> dst%s sid = %u\n",
8492	(pSrcSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : "", pSrcSurface->id,
8493	(pDstSurface->f.surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : "", pDstSurface->id));
8494
8495	/* Clip the box. */
8496	/** @todo Use [src\|dst]SubResource to index p[Src\|Dst]Surface->paMipmapLevels array directly. */
8497	uint32_t iSrcFace;
8498	uint32_t iSrcMipmap;
8499	vmsvga3dCalcMipmapAndFace(pSrcSurface->cLevels, srcSubResource, &iSrcMipmap, &iSrcFace);
8500
8501	uint32_t iDstFace;
8502	uint32_t iDstMipmap;
8503	vmsvga3dCalcMipmapAndFace(pDstSurface->cLevels, dstSubResource, &iDstMipmap, &iDstFace);
8504
8505	PVMSVGA3DMIPMAPLEVEL pSrcMipLevel;
8506	rc = vmsvga3dMipmapLevel(pSrcSurface, iSrcFace, iSrcMipmap, &pSrcMipLevel);
8507	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
8508
8509	PVMSVGA3DMIPMAPLEVEL pDstMipLevel;
8510	rc = vmsvga3dMipmapLevel(pDstSurface, iDstFace, iDstMipmap, &pDstMipLevel);
8511	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
8512
8513	SVGA3dBox clipBoxSrc = *pBoxSrc;
8514	vmsvgaR3ClipBox(&pSrcMipLevel->mipmapSize, &clipBoxSrc);
8515
8516	SVGA3dBox clipBoxDst = *pBoxDst;
8517	vmsvgaR3ClipBox(&pDstMipLevel->mipmapSize, &clipBoxDst);
8518
8519	ID3D11Resource *pDstResource = dxResource(pDstSurface);
8520	ID3D11Resource *pSrcResource = dxResource(pSrcSurface);
8521
8522	D3D11_RENDER_TARGET_VIEW_DESC RTVDesc;
8523	RT_ZERO(RTVDesc);
8524	RTVDesc.Format = vmsvgaDXSurfaceFormat2Dxgi(pDstSurface->format);;
8525	RTVDesc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2D;
8526	RTVDesc.Texture2D.MipSlice = dstSubResource;
8527
8528	ID3D11RenderTargetView *pDstRenderTargetView;
8529	HRESULT hr = pDevice->pDevice->CreateRenderTargetView(pDstResource, &RTVDesc, &pDstRenderTargetView);
8530	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
8531
8532	D3D11_SHADER_RESOURCE_VIEW_DESC SRVDesc;
8533	RT_ZERO(SRVDesc);
8534	SRVDesc.Format = vmsvgaDXSurfaceFormat2Dxgi(pSrcSurface->format);
8535	SRVDesc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE2D;
8536	SRVDesc.Texture2D.MostDetailedMip = srcSubResource;
8537	SRVDesc.Texture2D.MipLevels = 1;
8538
8539	ID3D11ShaderResourceView *pSrcShaderResourceView;
8540	hr = pDevice->pDevice->CreateShaderResourceView(pSrcResource, &SRVDesc, &pSrcShaderResourceView);
8541	AssertReturnStmt(SUCCEEDED(hr), D3D_RELEASE(pDstRenderTargetView), VERR_NOT_SUPPORTED);
8542
8543	D3D11_RECT rectDst;
8544	rectDst.left = pBoxDst->x;
8545	rectDst.top = pBoxDst->y;
8546	rectDst.right = pBoxDst->x + pBoxDst->w;
8547	rectDst.bottom = pBoxDst->y + pBoxDst->h;
8548
8549	BlitFromTexture(&pDevice->Blitter, pDstRenderTargetView, (float)pDstMipLevel->mipmapSize.width, (float)pDstMipLevel->mipmapSize.height,
8550	rectDst, pSrcShaderResourceView);
8551
8552	D3D_RELEASE(pSrcShaderResourceView);
8553	D3D_RELEASE(pDstRenderTargetView);
8554
8555	return VINF_SUCCESS;
8556	}
8557
8558
8559	static DECLCALLBACK(int) vmsvga3dBackDXGenMips(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId)
8560	{
8561	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
8562	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
8563
8564	DXVIEW *pDXView;
8565	int rc = dxEnsureShaderResourceView(pThisCC, pDXContext, shaderResourceViewId, &pDXView);
8566	AssertRCReturn(rc, rc);
8567
8568	pDXDevice->pImmediateContext->GenerateMips(pDXView->u.pShaderResourceView);
8569	return VINF_SUCCESS;
8570	}
8571
8572
8573	static DECLCALLBACK(int) vmsvga3dBackDXDefineShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId, SVGACOTableDXSRViewEntry const *pEntry)
8574	{
8575	/* The view is created when it is used in setupPipeline. */
8576	RT_NOREF(pThisCC, pDXContext, shaderResourceViewId, pEntry);
8577	return VINF_SUCCESS;
8578	}
8579
8580
8581	static DECLCALLBACK(int) vmsvga3dBackDXDestroyShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId)
8582	{
8583	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8584	RT_NOREF(pBackend);
8585
8586	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paShaderResourceView[shaderResourceViewId];
8587	return dxViewDestroy(pDXView);
8588	}
8589
8590
8591	static DECLCALLBACK(int) vmsvga3dBackDXDefineRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGACOTableDXRTViewEntry const *pEntry)
8592	{
8593	/* The view is created when it is used in setupPipeline or ClearView. */
8594	RT_NOREF(pThisCC, pDXContext, renderTargetViewId, pEntry);
8595	return VINF_SUCCESS;
8596	}
8597
8598
8599	static DECLCALLBACK(int) vmsvga3dBackDXDestroyRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId)
8600	{
8601	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8602	RT_NOREF(pBackend);
8603
8604	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paRenderTargetView[renderTargetViewId];
8605	return dxViewDestroy(pDXView);
8606	}
8607
8608
8609	static DECLCALLBACK(int) vmsvga3dBackDXDefineDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, SVGACOTableDXDSViewEntry const *pEntry)
8610	{
8611	/* The view is created when it is used in setupPipeline or ClearView. */
8612	RT_NOREF(pThisCC, pDXContext, depthStencilViewId, pEntry);
8613	return VINF_SUCCESS;
8614	}
8615
8616
8617	static DECLCALLBACK(int) vmsvga3dBackDXDestroyDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId)
8618	{
8619	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8620	RT_NOREF(pBackend);
8621
8622	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paDepthStencilView[depthStencilViewId];
8623	return dxViewDestroy(pDXView);
8624	}
8625
8626
8627	static int dxDefineElementLayout(PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId, SVGACOTableDXElementLayoutEntry const *pEntry)
8628	{
8629	DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
8630	D3D_RELEASE(pDXElementLayout->pElementLayout);
8631	pDXElementLayout->cElementDesc = 0;
8632	RT_ZERO(pDXElementLayout->aElementDesc);
8633
8634	RT_NOREF(pEntry);
8635
8636	return VINF_SUCCESS;
8637	}
8638
8639
8640	static int dxDestroyElementLayout(DXELEMENTLAYOUT *pDXElementLayout)
8641	{
8642	D3D_RELEASE(pDXElementLayout->pElementLayout);
8643	pDXElementLayout->cElementDesc = 0;
8644	RT_ZERO(pDXElementLayout->aElementDesc);
8645	return VINF_SUCCESS;
8646	}
8647
8648
8649	static DECLCALLBACK(int) vmsvga3dBackDXDefineElementLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId, SVGACOTableDXElementLayoutEntry const *pEntry)
8650	{
8651	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8652	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
8653	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8654
8655	RT_NOREF(pBackend);
8656
8657	/* Not much can be done here because ID3D11Device::CreateInputLayout requires
8658	* a pShaderBytecodeWithInputSignature which is not known at this moment.
8659	* InputLayout object will be created in setupPipeline.
8660	*/
8661
8662	Assert(elementLayoutId == pEntry->elid);
8663
8664	return dxDefineElementLayout(pDXContext, elementLayoutId, pEntry);
8665	}
8666
8667
8668	static DECLCALLBACK(int) vmsvga3dBackDXDestroyElementLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId)
8669	{
8670	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8671	RT_NOREF(pBackend);
8672
8673	DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
8674	dxDestroyElementLayout(pDXElementLayout);
8675
8676	return VINF_SUCCESS;
8677	}
8678
8679
8680	static int dxDefineBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
8681	SVGA3dBlendStateId blendId, SVGACOTableDXBlendStateEntry const *pEntry)
8682	{
8683	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
8684	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8685
8686	HRESULT hr = dxBlendStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papBlendState[blendId]);
8687	if (SUCCEEDED(hr))
8688	return VINF_SUCCESS;
8689	return VERR_INVALID_STATE;
8690	}
8691
8692
8693	static DECLCALLBACK(int) vmsvga3dBackDXDefineBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
8694	SVGA3dBlendStateId blendId, SVGACOTableDXBlendStateEntry const *pEntry)
8695	{
8696	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8697	RT_NOREF(pBackend);
8698
8699	return dxDefineBlendState(pThisCC, pDXContext, blendId, pEntry);
8700	}
8701
8702
8703	static DECLCALLBACK(int) vmsvga3dBackDXDestroyBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dBlendStateId blendId)
8704	{
8705	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8706	RT_NOREF(pBackend);
8707
8708	D3D_RELEASE(pDXContext->pBackendDXContext->papBlendState[blendId]);
8709	return VINF_SUCCESS;
8710	}
8711
8712
8713	static int dxDefineDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, SVGACOTableDXDepthStencilEntry const *pEntry)
8714	{
8715	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
8716	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8717
8718	HRESULT hr = dxDepthStencilStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papDepthStencilState[depthStencilId]);
8719	if (SUCCEEDED(hr))
8720	return VINF_SUCCESS;
8721	return VERR_INVALID_STATE;
8722	}
8723
8724
8725	static DECLCALLBACK(int) vmsvga3dBackDXDefineDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, SVGACOTableDXDepthStencilEntry const *pEntry)
8726	{
8727	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8728	RT_NOREF(pBackend);
8729
8730	return dxDefineDepthStencilState(pThisCC, pDXContext, depthStencilId, pEntry);
8731	}
8732
8733
8734	static DECLCALLBACK(int) vmsvga3dBackDXDestroyDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId)
8735	{
8736	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8737	RT_NOREF(pBackend);
8738
8739	D3D_RELEASE(pDXContext->pBackendDXContext->papDepthStencilState[depthStencilId]);
8740	return VINF_SUCCESS;
8741	}
8742
8743
8744	static int dxDefineRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId, SVGACOTableDXRasterizerStateEntry const *pEntry)
8745	{
8746	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
8747	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8748
8749	HRESULT hr = dxRasterizerStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papRasterizerState[rasterizerId]);
8750	if (SUCCEEDED(hr))
8751	return VINF_SUCCESS;
8752	return VERR_INVALID_STATE;
8753	}
8754
8755
8756	static DECLCALLBACK(int) vmsvga3dBackDXDefineRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId, SVGACOTableDXRasterizerStateEntry const *pEntry)
8757	{
8758	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8759	RT_NOREF(pBackend);
8760
8761	return dxDefineRasterizerState(pThisCC, pDXContext, rasterizerId, pEntry);
8762	}
8763
8764
8765	static DECLCALLBACK(int) vmsvga3dBackDXDestroyRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId)
8766	{
8767	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8768	RT_NOREF(pBackend);
8769
8770	D3D_RELEASE(pDXContext->pBackendDXContext->papRasterizerState[rasterizerId]);
8771	return VINF_SUCCESS;
8772	}
8773
8774
8775	static int dxDefineSamplerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSamplerId samplerId, SVGACOTableDXSamplerEntry const *pEntry)
8776	{
8777	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
8778	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8779
8780	HRESULT hr = dxSamplerStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papSamplerState[samplerId]);
8781	if (SUCCEEDED(hr))
8782	return VINF_SUCCESS;
8783	return VERR_INVALID_STATE;
8784	}
8785
8786
8787	static DECLCALLBACK(int) vmsvga3dBackDXDefineSamplerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSamplerId samplerId, SVGACOTableDXSamplerEntry const *pEntry)
8788	{
8789	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8790	RT_NOREF(pBackend);
8791
8792	return dxDefineSamplerState(pThisCC, pDXContext, samplerId, pEntry);
8793	}
8794
8795
8796	static DECLCALLBACK(int) vmsvga3dBackDXDestroySamplerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSamplerId samplerId)
8797	{
8798	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8799	RT_NOREF(pBackend);
8800
8801	D3D_RELEASE(pDXContext->pBackendDXContext->papSamplerState[samplerId]);
8802	return VINF_SUCCESS;
8803	}
8804
8805
8806	static int dxDefineShader(PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderId shaderId, SVGACOTableDXShaderEntry const *pEntry)
8807	{
8808	/** @todo A common approach for creation of COTable backend objects: runtime, empty DX COTable, live DX COTable. */
8809	DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[shaderId];
8810	Assert(pDXShader->enmShaderType == SVGA3D_SHADERTYPE_INVALID);
8811
8812	/* Init the backend shader structure, if the shader has not been created yet. */
8813	pDXShader->enmShaderType = pEntry->type;
8814	pDXShader->pShader = NULL;
8815	pDXShader->soid = SVGA_ID_INVALID;
8816
8817	return VINF_SUCCESS;
8818	}
8819
8820
8821	static int dxDestroyShader(DXSHADER *pDXShader)
8822	{
8823	pDXShader->enmShaderType = SVGA3D_SHADERTYPE_INVALID;
8824	DXShaderFree(&pDXShader->shaderInfo);
8825	D3D_RELEASE(pDXShader->pShader);
8826	RTMemFree(pDXShader->pvDXBC);
8827	pDXShader->pvDXBC = NULL;
8828	pDXShader->cbDXBC = 0;
8829	pDXShader->soid = SVGA_ID_INVALID;
8830	return VINF_SUCCESS;
8831	}
8832
8833
8834	static DECLCALLBACK(int) vmsvga3dBackDXDefineShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderId shaderId, SVGACOTableDXShaderEntry const *pEntry)
8835	{
8836	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8837	RT_NOREF(pBackend);
8838
8839	return dxDefineShader(pDXContext, shaderId, pEntry);
8840	}
8841
8842
8843	static DECLCALLBACK(int) vmsvga3dBackDXDestroyShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderId shaderId)
8844	{
8845	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8846	RT_NOREF(pBackend);
8847
8848	DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[shaderId];
8849	dxDestroyShader(pDXShader);
8850
8851	return VINF_SUCCESS;
8852	}
8853
8854
8855	static DECLCALLBACK(int) vmsvga3dBackDXBindShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderId shaderId, DXShaderInfo const *pShaderInfo)
8856	{
8857	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8858	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
8859	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
8860
8861	RT_NOREF(pBackend);
8862
8863	DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[shaderId];
8864	if (pDXShader->pvDXBC)
8865	{
8866	/* New DXBC code and new shader must be created. */
8867	D3D_RELEASE(pDXShader->pShader);
8868	RTMemFree(pDXShader->pvDXBC);
8869	pDXShader->pvDXBC = NULL;
8870	pDXShader->cbDXBC = 0;
8871	}
8872
8873	pDXShader->shaderInfo = *pShaderInfo;
8874
8875	return VINF_SUCCESS;
8876	}
8877
8878
8879	static DECLCALLBACK(int) vmsvga3dBackDXDefineStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dStreamOutputId soid, SVGACOTableDXStreamOutputEntry const *pEntry)
8880	{
8881	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8882	RT_NOREF(pBackend);
8883
8884	DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[soid];
8885	dxDestroyStreamOutput(pDXStreamOutput);
8886
8887	RT_NOREF(pEntry);
8888	return VINF_SUCCESS;
8889	}
8890
8891
8892	static DECLCALLBACK(int) vmsvga3dBackDXDestroyStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dStreamOutputId soid)
8893	{
8894	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8895	RT_NOREF(pBackend);
8896
8897	DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[soid];
8898	dxDestroyStreamOutput(pDXStreamOutput);
8899
8900	return VINF_SUCCESS;
8901	}
8902
8903
8904	static DECLCALLBACK(int) vmsvga3dBackDXSetStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dStreamOutputId soid)
8905	{
8906	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8907	RT_NOREF(pBackend, pDXContext, soid);
8908
8909	return VINF_SUCCESS;
8910	}
8911
8912
8913	static int dxCOTableRealloc(void *ppvCOTable, uint32_t pcCOTable, uint32_t cbEntry, uint32_t cEntries, uint32_t cValidEntries)
8914	{
8915	uint32_t const cCOTableCurrent = *pcCOTable;
8916
8917	if (*pcCOTable != cEntries)
8918	{
8919	/* Grow/shrink the array. */
8920	if (cEntries)
8921	{
8922	void pvNew = RTMemRealloc(ppvCOTable, cEntries * cbEntry);
8923	AssertReturn(pvNew, VERR_NO_MEMORY);
8924	*ppvCOTable = pvNew;
8925	}
8926	else
8927	{
8928	RTMemFree(*ppvCOTable);
8929	*ppvCOTable = NULL;
8930	}
8931
8932	*pcCOTable = cEntries;
8933	}
8934
8935	if (*ppvCOTable)
8936	{
8937	uint32_t const cEntriesToKeep = RT_MIN(cCOTableCurrent, cValidEntries);
8938	memset((uint8_t )(ppvCOTable) + cEntriesToKeep * cbEntry, 0, (cEntries - cEntriesToKeep) * cbEntry);
8939	}
8940
8941	return VINF_SUCCESS;
8942	}
8943
8944	static DECLCALLBACK(int) vmsvga3dBackDXSetCOTable(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableType type, uint32_t cValidEntries)
8945	{
8946	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
8947	RT_NOREF(pBackend);
8948
8949	VMSVGA3DBACKENDDXCONTEXT *pBackendDXContext = pDXContext->pBackendDXContext;
8950
8951	int rc = VINF_SUCCESS;
8952
8953	/*
8954	* 1) Release current backend table, if exists;
8955	* 2) Reallocate memory for the new backend table;
8956	* 3) If cValidEntries is not zero, then re-define corresponding backend table elements.
8957	*/
8958	switch (type)
8959	{
8960	case SVGA_COTABLE_RTVIEW:
8961	/* Clear current entries. */
8962	if (pBackendDXContext->paRenderTargetView)
8963	{
8964	for (uint32_t i = 0; i < pBackendDXContext->cRenderTargetView; ++i)
8965	{
8966	DXVIEW *pDXView = &pBackendDXContext->paRenderTargetView[i];
8967	if (i < cValidEntries)
8968	dxViewRemoveFromList(pDXView); /* Remove from list because DXVIEW array will be reallocated. */
8969	else
8970	dxViewDestroy(pDXView);
8971	}
8972	}
8973
8974	rc = dxCOTableRealloc((void **)&pBackendDXContext->paRenderTargetView, &pBackendDXContext->cRenderTargetView,
8975	sizeof(pBackendDXContext->paRenderTargetView[0]), pDXContext->cot.cRTView, cValidEntries);
8976	AssertRCBreak(rc);
8977
8978	for (uint32_t i = 0; i < cValidEntries; ++i)
8979	{
8980	SVGACOTableDXRTViewEntry const *pEntry = &pDXContext->cot.paRTView[i];
8981	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
8982	continue; /* Skip uninitialized entry. */
8983
8984	/* Define views which were not defined yet in backend. */
8985	DXVIEW *pDXView = &pBackendDXContext->paRenderTargetView[i];
8986	/** @todo Verify that the pEntry content still corresponds to the view. */
8987	if (pDXView->u.pView)
8988	dxViewAddToList(pThisCC, pDXView);
8989	}
8990	break;
8991	case SVGA_COTABLE_DSVIEW:
8992	if (pBackendDXContext->paDepthStencilView)
8993	{
8994	for (uint32_t i = 0; i < pBackendDXContext->cDepthStencilView; ++i)
8995	{
8996	DXVIEW *pDXView = &pBackendDXContext->paDepthStencilView[i];
8997	if (i < cValidEntries)
8998	dxViewRemoveFromList(pDXView); /* Remove from list because DXVIEW array will be reallocated. */
8999	else
9000	dxViewDestroy(pDXView);
9001	}
9002	}
9003
9004	rc = dxCOTableRealloc((void **)&pBackendDXContext->paDepthStencilView, &pBackendDXContext->cDepthStencilView,
9005	sizeof(pBackendDXContext->paDepthStencilView[0]), pDXContext->cot.cDSView, cValidEntries);
9006	AssertRCBreak(rc);
9007
9008	for (uint32_t i = 0; i < cValidEntries; ++i)
9009	{
9010	SVGACOTableDXDSViewEntry const *pEntry = &pDXContext->cot.paDSView[i];
9011	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9012	continue; /* Skip uninitialized entry. */
9013
9014	/* Define views which were not defined yet in backend. */
9015	DXVIEW *pDXView = &pBackendDXContext->paDepthStencilView[i];
9016	/** @todo Verify that the pEntry content still corresponds to the view. */
9017	if (pDXView->u.pView)
9018	dxViewAddToList(pThisCC, pDXView);
9019	}
9020	break;
9021	case SVGA_COTABLE_SRVIEW:
9022	if (pBackendDXContext->paShaderResourceView)
9023	{
9024	for (uint32_t i = 0; i < pBackendDXContext->cShaderResourceView; ++i)
9025	{
9026	/* Destroy the no longer used entries. */
9027	DXVIEW *pDXView = &pBackendDXContext->paShaderResourceView[i];
9028	if (i < cValidEntries)
9029	dxViewRemoveFromList(pDXView); /* Remove from list because DXVIEW array will be reallocated. */
9030	else
9031	dxViewDestroy(pDXView);
9032	}
9033	}
9034
9035	rc = dxCOTableRealloc((void **)&pBackendDXContext->paShaderResourceView, &pBackendDXContext->cShaderResourceView,
9036	sizeof(pBackendDXContext->paShaderResourceView[0]), pDXContext->cot.cSRView, cValidEntries);
9037	AssertRCBreak(rc);
9038
9039	for (uint32_t i = 0; i < cValidEntries; ++i)
9040	{
9041	SVGACOTableDXSRViewEntry const *pEntry = &pDXContext->cot.paSRView[i];
9042	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9043	continue; /* Skip uninitialized entry. */
9044
9045	DXVIEW *pDXView = &pBackendDXContext->paShaderResourceView[i];
9046	/** @todo Verify that the pEntry content still corresponds to the view. */
9047	if (pDXView->u.pView)
9048	dxViewAddToList(pThisCC, pDXView);
9049	}
9050	break;
9051	case SVGA_COTABLE_ELEMENTLAYOUT:
9052	if (pBackendDXContext->paElementLayout)
9053	{
9054	for (uint32_t i = cValidEntries; i < pBackendDXContext->cElementLayout; ++i)
9055	D3D_RELEASE(pBackendDXContext->paElementLayout[i].pElementLayout);
9056	}
9057
9058	rc = dxCOTableRealloc((void **)&pBackendDXContext->paElementLayout, &pBackendDXContext->cElementLayout,
9059	sizeof(pBackendDXContext->paElementLayout[0]), pDXContext->cot.cElementLayout, cValidEntries);
9060	AssertRCBreak(rc);
9061
9062	for (uint32_t i = 0; i < cValidEntries; ++i)
9063	{
9064	SVGACOTableDXElementLayoutEntry const *pEntry = &pDXContext->cot.paElementLayout[i];
9065	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9066	continue; /* Skip uninitialized entry. */
9067
9068	dxDefineElementLayout(pDXContext, i, pEntry);
9069	}
9070	break;
9071	case SVGA_COTABLE_BLENDSTATE:
9072	if (pBackendDXContext->papBlendState)
9073	{
9074	for (uint32_t i = cValidEntries; i < pBackendDXContext->cBlendState; ++i)
9075	D3D_RELEASE(pBackendDXContext->papBlendState[i]);
9076	}
9077
9078	rc = dxCOTableRealloc((void **)&pBackendDXContext->papBlendState, &pBackendDXContext->cBlendState,
9079	sizeof(pBackendDXContext->papBlendState[0]), pDXContext->cot.cBlendState, cValidEntries);
9080	AssertRCBreak(rc);
9081
9082	for (uint32_t i = 0; i < cValidEntries; ++i)
9083	{
9084	SVGACOTableDXBlendStateEntry const *pEntry = &pDXContext->cot.paBlendState[i];
9085	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9086	continue; /* Skip uninitialized entry. */
9087
9088	dxDefineBlendState(pThisCC, pDXContext, i, pEntry);
9089	}
9090	break;
9091	case SVGA_COTABLE_DEPTHSTENCIL:
9092	if (pBackendDXContext->papDepthStencilState)
9093	{
9094	for (uint32_t i = cValidEntries; i < pBackendDXContext->cDepthStencilState; ++i)
9095	D3D_RELEASE(pBackendDXContext->papDepthStencilState[i]);
9096	}
9097
9098	rc = dxCOTableRealloc((void **)&pBackendDXContext->papDepthStencilState, &pBackendDXContext->cDepthStencilState,
9099	sizeof(pBackendDXContext->papDepthStencilState[0]), pDXContext->cot.cDepthStencil, cValidEntries);
9100	AssertRCBreak(rc);
9101
9102	for (uint32_t i = 0; i < cValidEntries; ++i)
9103	{
9104	SVGACOTableDXDepthStencilEntry const *pEntry = &pDXContext->cot.paDepthStencil[i];
9105	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9106	continue; /* Skip uninitialized entry. */
9107
9108	dxDefineDepthStencilState(pThisCC, pDXContext, i, pEntry);
9109	}
9110	break;
9111	case SVGA_COTABLE_RASTERIZERSTATE:
9112	if (pBackendDXContext->papRasterizerState)
9113	{
9114	for (uint32_t i = cValidEntries; i < pBackendDXContext->cRasterizerState; ++i)
9115	D3D_RELEASE(pBackendDXContext->papRasterizerState[i]);
9116	}
9117
9118	rc = dxCOTableRealloc((void **)&pBackendDXContext->papRasterizerState, &pBackendDXContext->cRasterizerState,
9119	sizeof(pBackendDXContext->papRasterizerState[0]), pDXContext->cot.cRasterizerState, cValidEntries);
9120	AssertRCBreak(rc);
9121
9122	for (uint32_t i = 0; i < cValidEntries; ++i)
9123	{
9124	SVGACOTableDXRasterizerStateEntry const *pEntry = &pDXContext->cot.paRasterizerState[i];
9125	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9126	continue; /* Skip uninitialized entry. */
9127
9128	dxDefineRasterizerState(pThisCC, pDXContext, i, pEntry);
9129	}
9130	break;
9131	case SVGA_COTABLE_SAMPLER:
9132	if (pBackendDXContext->papSamplerState)
9133	{
9134	for (uint32_t i = cValidEntries; i < pBackendDXContext->cSamplerState; ++i)
9135	D3D_RELEASE(pBackendDXContext->papSamplerState[i]);
9136	}
9137
9138	rc = dxCOTableRealloc((void **)&pBackendDXContext->papSamplerState, &pBackendDXContext->cSamplerState,
9139	sizeof(pBackendDXContext->papSamplerState[0]), pDXContext->cot.cSampler, cValidEntries);
9140	AssertRCBreak(rc);
9141
9142	for (uint32_t i = 0; i < cValidEntries; ++i)
9143	{
9144	SVGACOTableDXSamplerEntry const *pEntry = &pDXContext->cot.paSampler[i];
9145	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9146	continue; /* Skip uninitialized entry. */
9147
9148	dxDefineSamplerState(pThisCC, pDXContext, i, pEntry);
9149	}
9150	break;
9151	case SVGA_COTABLE_STREAMOUTPUT:
9152	if (pBackendDXContext->paStreamOutput)
9153	{
9154	for (uint32_t i = cValidEntries; i < pBackendDXContext->cStreamOutput; ++i)
9155	dxDestroyStreamOutput(&pBackendDXContext->paStreamOutput[i]);
9156	}
9157
9158	rc = dxCOTableRealloc((void **)&pBackendDXContext->paStreamOutput, &pBackendDXContext->cStreamOutput,
9159	sizeof(pBackendDXContext->paStreamOutput[0]), pDXContext->cot.cStreamOutput, cValidEntries);
9160	AssertRCBreak(rc);
9161
9162	for (uint32_t i = 0; i < cValidEntries; ++i)
9163	{
9164	SVGACOTableDXStreamOutputEntry const *pEntry = &pDXContext->cot.paStreamOutput[i];
9165	/** @todo The caller must verify the COTable content using same rules as when a new entry is defined. */
9166	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9167	continue; /* Skip uninitialized entry. */
9168
9169	/* Reset the stream output backend data. It will be re-created when a GS shader with this streamoutput
9170	* will be set in setupPipeline.
9171	*/
9172	DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[i];
9173	dxDestroyStreamOutput(pDXStreamOutput);
9174	}
9175	break;
9176	case SVGA_COTABLE_DXQUERY:
9177	if (pBackendDXContext->paQuery)
9178	{
9179	/* Destroy the no longer used entries. */
9180	for (uint32_t i = cValidEntries; i < pBackendDXContext->cQuery; ++i)
9181	dxDestroyQuery(&pBackendDXContext->paQuery[i]);
9182	}
9183
9184	rc = dxCOTableRealloc((void **)&pBackendDXContext->paQuery, &pBackendDXContext->cQuery,
9185	sizeof(pBackendDXContext->paQuery[0]), pDXContext->cot.cQuery, cValidEntries);
9186	AssertRCBreak(rc);
9187
9188	for (uint32_t i = 0; i < cValidEntries; ++i)
9189	{
9190	SVGACOTableDXQueryEntry const *pEntry = &pDXContext->cot.paQuery[i];
9191	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9192	continue; /* Skip uninitialized entry. */
9193
9194	/* Define queries which were not defined yet in backend. */
9195	DXQUERY *pDXQuery = &pBackendDXContext->paQuery[i];
9196	if ( pEntry->type != SVGA3D_QUERYTYPE_INVALID
9197	&& pDXQuery->pQuery == NULL)
9198	dxDefineQuery(pThisCC, pDXContext, i, pEntry);
9199	else
9200	Assert(pEntry->type == SVGA3D_QUERYTYPE_INVALID \|\| pDXQuery->pQuery);
9201	}
9202	break;
9203	case SVGA_COTABLE_DXSHADER:
9204	if (pBackendDXContext->paShader)
9205	{
9206	/* Destroy the no longer used entries. */
9207	for (uint32_t i = cValidEntries; i < pBackendDXContext->cShader; ++i)
9208	dxDestroyShader(&pBackendDXContext->paShader[i]);
9209	}
9210
9211	rc = dxCOTableRealloc((void **)&pBackendDXContext->paShader, &pBackendDXContext->cShader,
9212	sizeof(pBackendDXContext->paShader[0]), pDXContext->cot.cShader, cValidEntries);
9213	AssertRCBreak(rc);
9214
9215	for (uint32_t i = 0; i < cValidEntries; ++i)
9216	{
9217	SVGACOTableDXShaderEntry const *pEntry = &pDXContext->cot.paShader[i];
9218	/** @todo The caller must verify the COTable content using same rules as when a new entry is defined. */
9219	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9220	continue; /* Skip uninitialized entry. */
9221
9222	/* Define shaders which were not defined yet in backend. */
9223	DXSHADER *pDXShader = &pBackendDXContext->paShader[i];
9224	if ( pEntry->type != SVGA3D_SHADERTYPE_INVALID
9225	&& pDXShader->enmShaderType == SVGA3D_SHADERTYPE_INVALID)
9226	dxDefineShader(pDXContext, i, pEntry);
9227	else
9228	Assert(pEntry->type == pDXShader->enmShaderType);
9229
9230	}
9231	break;
9232	case SVGA_COTABLE_UAVIEW:
9233	if (pBackendDXContext->paUnorderedAccessView)
9234	{
9235	for (uint32_t i = 0; i < pBackendDXContext->cUnorderedAccessView; ++i)
9236	{
9237	DXVIEW *pDXView = &pBackendDXContext->paUnorderedAccessView[i];
9238	if (i < cValidEntries)
9239	dxViewRemoveFromList(pDXView); /* Remove from list because DXVIEW array will be reallocated. */
9240	else
9241	dxViewDestroy(pDXView);
9242	}
9243	}
9244
9245	rc = dxCOTableRealloc((void **)&pBackendDXContext->paUnorderedAccessView, &pBackendDXContext->cUnorderedAccessView,
9246	sizeof(pBackendDXContext->paUnorderedAccessView[0]), pDXContext->cot.cUAView, cValidEntries);
9247	AssertRCBreak(rc);
9248
9249	for (uint32_t i = 0; i < cValidEntries; ++i)
9250	{
9251	SVGACOTableDXUAViewEntry const *pEntry = &pDXContext->cot.paUAView[i];
9252	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9253	continue; /* Skip uninitialized entry. */
9254
9255	/* Define views which were not defined yet in backend. */
9256	DXVIEW *pDXView = &pBackendDXContext->paUnorderedAccessView[i];
9257	/** @todo Verify that the pEntry content still corresponds to the view. */
9258	if (pDXView->u.pView)
9259	dxViewAddToList(pThisCC, pDXView);
9260	}
9261	break;
9262	case SVGA_COTABLE_MAX: break; /* Compiler warning */
9263	case VBSVGA_COTABLE_VIDEOPROCESSOR:
9264	if (pBackendDXContext->paVideoProcessor)
9265	{
9266	/* Destroy the no longer used entries. */
9267	for (uint32_t i = cValidEntries; i < pBackendDXContext->cVideoProcessor; ++i)
9268	dxDestroyVideoProcessor(&pBackendDXContext->paVideoProcessor[i]);
9269	}
9270
9271	rc = dxCOTableRealloc((void **)&pBackendDXContext->paVideoProcessor, &pBackendDXContext->cVideoProcessor,
9272	sizeof(pBackendDXContext->paVideoProcessor[0]), pDXContext->cot.cVideoProcessor, cValidEntries);
9273	AssertRCBreak(rc);
9274
9275	for (uint32_t i = 0; i < cValidEntries; ++i)
9276	{
9277	VBSVGACOTableDXVideoProcessorEntry const *pEntry = &pDXContext->cot.paVideoProcessor[i];
9278	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9279	continue; /* Skip uninitialized entry. */
9280
9281	DXVIDEOPROCESSOR *pDXVideoProcessor = &pBackendDXContext->paVideoProcessor[i];
9282	if (pDXVideoProcessor->pVideoProcessor == NULL)
9283	dxCreateVideoProcessor(pThisCC, pDXContext, i, pEntry);
9284	}
9285	break;
9286	case VBSVGA_COTABLE_VDOV:
9287	if (pBackendDXContext->paVideoDecoderOutputView)
9288	{
9289	/* Destroy the no longer used entries. */
9290	for (uint32_t i = 0; i < pBackendDXContext->cVideoDecoderOutputView; ++i)
9291	{
9292	DXVIEW *pDXView = &pBackendDXContext->paVideoDecoderOutputView[i];
9293	if (i < cValidEntries)
9294	dxViewRemoveFromList(pDXView); /* Remove from list because DXVIEW array will be reallocated. */
9295	else
9296	dxViewDestroy(pDXView);
9297	}
9298	}
9299
9300	rc = dxCOTableRealloc((void **)&pBackendDXContext->paVideoDecoderOutputView, &pBackendDXContext->cVideoDecoderOutputView,
9301	sizeof(pBackendDXContext->paVideoDecoderOutputView[0]), pDXContext->cot.cVideoDecoderOutputView, cValidEntries);
9302	AssertRCBreak(rc);
9303
9304	for (uint32_t i = 0; i < cValidEntries; ++i)
9305	{
9306	VBSVGACOTableDXVideoDecoderOutputViewEntry const *pEntry = &pDXContext->cot.paVideoDecoderOutputView[i];
9307	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9308	continue; /* Skip uninitialized entry. */
9309
9310	DXVIEW *pDXView = &pBackendDXContext->paVideoDecoderOutputView[i];
9311	if (pDXView->u.pView)
9312	dxViewAddToList(pThisCC, pDXView);
9313	}
9314	break;
9315	case VBSVGA_COTABLE_VIDEODECODER:
9316	if (pBackendDXContext->paVideoDecoder)
9317	{
9318	/* Destroy the no longer used entries. */
9319	for (uint32_t i = cValidEntries; i < pBackendDXContext->cVideoDecoder; ++i)
9320	dxDestroyVideoDecoder(&pBackendDXContext->paVideoDecoder[i]);
9321	}
9322
9323	rc = dxCOTableRealloc((void **)&pBackendDXContext->paVideoDecoder, &pBackendDXContext->cVideoDecoder,
9324	sizeof(pBackendDXContext->paVideoDecoder[0]), pDXContext->cot.cVideoDecoder, cValidEntries);
9325	AssertRCBreak(rc);
9326
9327	for (uint32_t i = 0; i < cValidEntries; ++i)
9328	{
9329	VBSVGACOTableDXVideoDecoderEntry const *pEntry = &pDXContext->cot.paVideoDecoder[i];
9330	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9331	continue; /* Skip uninitialized entry. */
9332
9333	DXVIDEODECODER *pDXVideoDecoder = &pBackendDXContext->paVideoDecoder[i];
9334	if (pDXVideoDecoder->pVideoDecoder == NULL)
9335	dxCreateVideoDecoder(pThisCC, pDXContext, i, pEntry);
9336	}
9337	break;
9338	case VBSVGA_COTABLE_VPIV:
9339	if (pBackendDXContext->paVideoProcessorInputView)
9340	{
9341	/* Destroy the no longer used entries. */
9342	for (uint32_t i = 0; i < pBackendDXContext->cVideoProcessorInputView; ++i)
9343	{
9344	DXVIEW *pDXView = &pBackendDXContext->paVideoProcessorInputView[i];
9345	if (i < cValidEntries)
9346	dxViewRemoveFromList(pDXView); /* Remove from list because DXVIEW array will be reallocated. */
9347	else
9348	dxViewDestroy(pDXView);
9349	}
9350	}
9351
9352	rc = dxCOTableRealloc((void **)&pBackendDXContext->paVideoProcessorInputView, &pBackendDXContext->cVideoProcessorInputView,
9353	sizeof(pBackendDXContext->paVideoProcessorInputView[0]), pDXContext->cot.cVideoProcessorInputView, cValidEntries);
9354	AssertRCBreak(rc);
9355
9356	for (uint32_t i = 0; i < cValidEntries; ++i)
9357	{
9358	VBSVGACOTableDXVideoProcessorInputViewEntry const *pEntry = &pDXContext->cot.paVideoProcessorInputView[i];
9359	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9360	continue; /* Skip uninitialized entry. */
9361
9362	DXVIEW *pDXView = &pBackendDXContext->paVideoProcessorInputView[i];
9363	if (pDXView->u.pView)
9364	dxViewAddToList(pThisCC, pDXView);
9365	}
9366	break;
9367	case VBSVGA_COTABLE_VPOV:
9368	if (pBackendDXContext->paVideoProcessorOutputView)
9369	{
9370	/* Destroy the no longer used entries. */
9371	for (uint32_t i = 0; i < pBackendDXContext->cVideoProcessorOutputView; ++i)
9372	{
9373	DXVIEW *pDXView = &pBackendDXContext->paVideoProcessorOutputView[i];
9374	if (i < cValidEntries)
9375	dxViewRemoveFromList(pDXView); /* Remove from list because DXVIEW array will be reallocated. */
9376	else
9377	dxViewDestroy(pDXView);
9378	}
9379	}
9380
9381	rc = dxCOTableRealloc((void **)&pBackendDXContext->paVideoProcessorOutputView, &pBackendDXContext->cVideoProcessorOutputView,
9382	sizeof(pBackendDXContext->paVideoProcessorOutputView[0]), pDXContext->cot.cVideoProcessorOutputView, cValidEntries);
9383	AssertRCBreak(rc);
9384
9385	for (uint32_t i = 0; i < cValidEntries; ++i)
9386	{
9387	VBSVGACOTableDXVideoProcessorOutputViewEntry const *pEntry = &pDXContext->cot.paVideoProcessorOutputView[i];
9388	if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
9389	continue; /* Skip uninitialized entry. */
9390
9391	DXVIEW *pDXView = &pBackendDXContext->paVideoProcessorOutputView[i];
9392	if (pDXView->u.pView)
9393	dxViewAddToList(pThisCC, pDXView);
9394	}
9395	break;
9396	case VBSVGA_COTABLE_MAX: break; /* Compiler warning */
9397	#ifndef DEBUG_sunlover
9398	default: break; /* Compiler warning. */
9399	#endif
9400	}
9401	return rc;
9402	}
9403
9404
9405	static DECLCALLBACK(int) vmsvga3dBackDXBufferCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9406	{
9407	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9408
9409	RT_NOREF(pBackend, pDXContext);
9410	AssertFailed(); /** @todo Implement */
9411	return VERR_NOT_IMPLEMENTED;
9412	}
9413
9414
9415	static DECLCALLBACK(int) vmsvga3dBackDXSurfaceCopyAndReadback(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9416	{
9417	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9418
9419	RT_NOREF(pBackend, pDXContext);
9420	AssertFailed(); /** @todo Implement */
9421	return VERR_NOT_IMPLEMENTED;
9422	}
9423
9424
9425	static DECLCALLBACK(int) vmsvga3dBackDXMoveQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9426	{
9427	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9428
9429	RT_NOREF(pBackend, pDXContext);
9430	AssertFailed(); /** @todo Implement */
9431	return VERR_NOT_IMPLEMENTED;
9432	}
9433
9434
9435	static DECLCALLBACK(int) vmsvga3dBackDXBindAllShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9436	{
9437	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9438
9439	RT_NOREF(pBackend, pDXContext);
9440	AssertFailed(); /** @todo Implement */
9441	return VERR_NOT_IMPLEMENTED;
9442	}
9443
9444
9445	static DECLCALLBACK(int) vmsvga3dBackDXHint(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9446	{
9447	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9448
9449	RT_NOREF(pBackend, pDXContext);
9450	AssertFailed(); /** @todo Implement */
9451	return VERR_NOT_IMPLEMENTED;
9452	}
9453
9454
9455	static DECLCALLBACK(int) vmsvga3dBackDXBufferUpdate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9456	{
9457	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9458
9459	RT_NOREF(pBackend, pDXContext);
9460	AssertFailed(); /** @todo Implement */
9461	return VERR_NOT_IMPLEMENTED;
9462	}
9463
9464
9465	static DECLCALLBACK(int) vmsvga3dBackDXCondBindAllShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9466	{
9467	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9468
9469	RT_NOREF(pBackend, pDXContext);
9470	AssertFailed(); /** @todo Implement */
9471	return VERR_NOT_IMPLEMENTED;
9472	}
9473
9474
9475	static DECLCALLBACK(int) vmsvga3dBackScreenCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9476	{
9477	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9478
9479	RT_NOREF(pBackend, pDXContext);
9480	AssertFailed(); /** @todo Implement */
9481	return VERR_NOT_IMPLEMENTED;
9482	}
9483
9484
9485	static DECLCALLBACK(int) vmsvga3dBackIntraSurfaceCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceImageId const &surface, SVGA3dCopyBox const &box)
9486	{
9487	RT_NOREF(pDXContext);
9488
9489	LogFunc(("sid %u\n", surface.sid));
9490
9491	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
9492	AssertReturn(pState, VERR_INVALID_STATE);
9493
9494	PVMSVGA3DBACKEND pBackend = pState->pBackend;
9495
9496	PVMSVGA3DSURFACE pSurface;
9497	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, surface.sid, &pSurface);
9498	AssertRCReturn(rc, rc);
9499
9500	PVMSVGA3DMIPMAPLEVEL pMipLevel;
9501	rc = vmsvga3dMipmapLevel(pSurface, surface.face, surface.mipmap, &pMipLevel);
9502	ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
9503
9504	/* Clip the box. */
9505	SVGA3dCopyBox clipBox = box;
9506	vmsvgaR3ClipCopyBox(&pMipLevel->mipmapSize, &pMipLevel->mipmapSize, &clipBox);
9507
9508	LogFunc(("surface%s sid = %u\n",
9509	pSurface->pBackendSurface ? "" : " sysmem", pSurface->id));
9510
9511	if (pSurface->pBackendSurface)
9512	{
9513	/* Surface -> Surface. */
9514	DXDEVICE *pDXDevice = &pBackend->dxDevice;
9515
9516	UINT DstSubresource = vmsvga3dCalcSubresource(surface.mipmap, surface.face, pSurface->cLevels);
9517	UINT DstX = clipBox.x;
9518	UINT DstY = clipBox.y;
9519	UINT DstZ = clipBox.z;
9520
9521	UINT SrcSubresource = DstSubresource;
9522	D3D11_BOX SrcBox;
9523	SrcBox.left = clipBox.srcx;
9524	SrcBox.top = clipBox.srcy;
9525	SrcBox.front = clipBox.srcz;
9526	SrcBox.right = clipBox.srcx + clipBox.w;
9527	SrcBox.bottom = clipBox.srcy + clipBox.h;
9528	SrcBox.back = clipBox.srcz + clipBox.d;
9529
9530	ID3D11Resource *pDstResource;
9531	ID3D11Resource *pSrcResource;
9532	pDstResource = dxResource(pSurface);
9533	pSrcResource = pDstResource;
9534
9535	pDXDevice->pImmediateContext->CopySubresourceRegion1(pDstResource, DstSubresource, DstX, DstY, DstZ,
9536	pSrcResource, SrcSubresource, &SrcBox, 0);
9537	}
9538	else
9539	{
9540	/* Memory -> Memory. */
9541	uint32_t const cxBlocks = (clipBox.w + pSurface->cxBlock - 1) / pSurface->cxBlock;
9542	uint32_t const cyBlocks = (clipBox.h + pSurface->cyBlock - 1) / pSurface->cyBlock;
9543	uint32_t const cbRow = cxBlocks * pSurface->cbBlock;
9544
9545	uint8_t const pu8Src = (uint8_t )pMipLevel->pSurfaceData
9546	+ (clipBox.srcx / pSurface->cxBlock) * pSurface->cbBlock
9547	+ (clipBox.srcy / pSurface->cyBlock) * pMipLevel->cbSurfacePitch
9548	+ clipBox.srcz * pMipLevel->cbSurfacePlane;
9549
9550	uint8_t pu8Dst = (uint8_t )pMipLevel->pSurfaceData
9551	+ (clipBox.x / pSurface->cxBlock) * pSurface->cbBlock
9552	+ (clipBox.y / pSurface->cyBlock) * pMipLevel->cbSurfacePitch
9553	+ clipBox.z * pMipLevel->cbSurfacePlane;
9554
9555	for (uint32_t z = 0; z < clipBox.d; ++z)
9556	{
9557	uint8_t const *pu8PlaneSrc = pu8Src;
9558	uint8_t *pu8PlaneDst = pu8Dst;
9559
9560	for (uint32_t y = 0; y < cyBlocks; ++y)
9561	{
9562	memmove(pu8PlaneDst, pu8PlaneSrc, cbRow);
9563	pu8PlaneDst += pMipLevel->cbSurfacePitch;
9564	pu8PlaneSrc += pMipLevel->cbSurfacePitch;
9565	}
9566
9567	pu8Src += pMipLevel->cbSurfacePlane;
9568	pu8Dst += pMipLevel->cbSurfacePlane;
9569	}
9570	}
9571
9572	return rc;
9573	}
9574
9575
9576	static DECLCALLBACK(int) vmsvga3dBackDXResolveCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
9577	SVGA3dSurfaceId dstSid, uint32_t dstSubResource,
9578	SVGA3dSurfaceId srcSid, uint32_t srcSubResource, SVGA3dSurfaceFormat copyFormat)
9579	{
9580	RT_NOREF(pDXContext);
9581
9582	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
9583	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
9584
9585	PVMSVGA3DSURFACE pSrcSurface;
9586	ID3D11Resource *pSrcResource;
9587	int rc = dxEnsureResource(pThisCC, srcSid, &pSrcSurface, &pSrcResource);
9588	AssertRCReturn(rc, rc);
9589
9590	PVMSVGA3DSURFACE pDstSurface;
9591	ID3D11Resource *pDstResource;
9592	rc = dxEnsureResource(pThisCC, dstSid, &pDstSurface, &pDstResource);
9593	AssertRCReturn(rc, rc);
9594
9595	LogFunc(("cid %d: src sid = %u -> dst sid = %u\n", pDXContext->cid, srcSid, dstSid));
9596
9597	DXGI_FORMAT const dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(copyFormat);
9598	pDXDevice->pImmediateContext->ResolveSubresource(pDstResource, dstSubResource, pSrcResource, srcSubResource, dxgiFormat);
9599
9600	return VINF_SUCCESS;
9601	}
9602
9603
9604	static DECLCALLBACK(int) vmsvga3dBackDXPredResolveCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9605	{
9606	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9607
9608	RT_NOREF(pBackend, pDXContext);
9609	AssertFailed(); /** @todo Implement */
9610	return VERR_NOT_IMPLEMENTED;
9611	}
9612
9613
9614	static DECLCALLBACK(int) vmsvga3dBackDXPredConvertRegion(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9615	{
9616	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9617
9618	RT_NOREF(pBackend, pDXContext);
9619	AssertFailed(); /** @todo Implement */
9620	return VERR_NOT_IMPLEMENTED;
9621	}
9622
9623
9624	static DECLCALLBACK(int) vmsvga3dBackDXPredConvert(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9625	{
9626	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9627
9628	RT_NOREF(pBackend, pDXContext);
9629	AssertFailed(); /** @todo Implement */
9630	return VERR_NOT_IMPLEMENTED;
9631	}
9632
9633
9634	static DECLCALLBACK(int) vmsvga3dBackWholeSurfaceCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9635	{
9636	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9637
9638	RT_NOREF(pBackend, pDXContext);
9639	AssertFailed(); /** @todo Implement */
9640	return VERR_NOT_IMPLEMENTED;
9641	}
9642
9643
9644	static DECLCALLBACK(int) vmsvga3dBackDXDefineUAView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId uaViewId, SVGACOTableDXUAViewEntry const *pEntry)
9645	{
9646	/* The view is created in setupPipeline or ClearView. */
9647	RT_NOREF(pThisCC, pDXContext, uaViewId, pEntry);
9648	return VINF_SUCCESS;
9649	}
9650
9651
9652	static DECLCALLBACK(int) vmsvga3dBackDXDestroyUAView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId uaViewId)
9653	{
9654	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9655	RT_NOREF(pBackend);
9656
9657	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paUnorderedAccessView[uaViewId];
9658	return dxViewDestroy(pDXView);
9659	}
9660
9661
9662	static DECLCALLBACK(int) vmsvga3dBackDXClearUAViewUint(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId uaViewId, uint32_t const aValues[4])
9663	{
9664	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
9665	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
9666
9667	DXVIEW *pDXView;
9668	int rc = dxEnsureUnorderedAccessView(pThisCC, pDXContext, uaViewId, &pDXView);
9669	AssertRCReturn(rc, rc);
9670
9671	pDXDevice->pImmediateContext->ClearUnorderedAccessViewUint(pDXView->u.pUnorderedAccessView, aValues);
9672	return VINF_SUCCESS;
9673	}
9674
9675
9676	static DECLCALLBACK(int) vmsvga3dBackDXClearUAViewFloat(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId uaViewId, float const aValues[4])
9677	{
9678	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
9679	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
9680
9681	DXVIEW *pDXView;
9682	int rc = dxEnsureUnorderedAccessView(pThisCC, pDXContext, uaViewId, &pDXView);
9683	AssertRCReturn(rc, rc);
9684
9685	pDXDevice->pImmediateContext->ClearUnorderedAccessViewFloat(pDXView->u.pUnorderedAccessView, aValues);
9686	return VINF_SUCCESS;
9687	}
9688
9689
9690	static DECLCALLBACK(int) vmsvga3dBackDXCopyStructureCount(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId srcUAViewId, SVGA3dSurfaceId destSid, uint32_t destByteOffset)
9691	{
9692	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
9693	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
9694
9695	/* Get corresponding resource. Create the buffer if does not yet exist. */
9696	ID3D11Buffer *pDstBuffer;
9697	if (destSid != SVGA3D_INVALID_ID)
9698	{
9699	PVMSVGA3DSURFACE pSurface;
9700	ID3D11Resource *pResource;
9701	int rc = dxEnsureResource(pThisCC, destSid, &pSurface, &pResource);
9702	AssertRCReturn(rc, rc);
9703	AssertReturn(pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER, VERR_INVALID_STATE);
9704
9705	pDstBuffer = (ID3D11Buffer *)pResource;
9706	}
9707	else
9708	pDstBuffer = NULL;
9709
9710	ID3D11UnorderedAccessView *pSrcView;
9711	if (srcUAViewId != SVGA3D_INVALID_ID)
9712	{
9713	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paUnorderedAccessView[srcUAViewId];
9714	AssertReturn(pDXView->u.pUnorderedAccessView, VERR_INVALID_STATE);
9715	pSrcView = pDXView->u.pUnorderedAccessView;
9716	}
9717	else
9718	pSrcView = NULL;
9719
9720	pDXDevice->pImmediateContext->CopyStructureCount(pDstBuffer, destByteOffset, pSrcView);
9721	return VINF_SUCCESS;
9722	}
9723
9724
9725	static DECLCALLBACK(int) vmsvga3dBackDXSetUAViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t uavSpliceIndex, uint32_t cUAViewId, SVGA3dUAViewId const *paUAViewId)
9726	{
9727	/* Views are set in setupPipeline. */
9728	RT_NOREF(pThisCC, pDXContext, uavSpliceIndex, cUAViewId, paUAViewId);
9729	return VINF_SUCCESS;
9730	}
9731
9732
9733	static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexedInstancedIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId argsBufferSid, uint32_t byteOffsetForArgs)
9734	{
9735	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9736	RT_NOREF(pBackend);
9737
9738	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
9739	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9740
9741	/* Get corresponding resource. Create the buffer if does not yet exist. */
9742	ID3D11Buffer *pBufferForArgs;
9743	if (argsBufferSid != SVGA_ID_INVALID)
9744	{
9745	PVMSVGA3DSURFACE pSurface;
9746	ID3D11Resource *pResource;
9747	int rc = dxEnsureResource(pThisCC, argsBufferSid, &pSurface, &pResource);
9748	AssertRCReturn(rc, rc);
9749	AssertReturn(pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER, VERR_INVALID_STATE);
9750
9751	pBufferForArgs = (ID3D11Buffer *)pResource;
9752	}
9753	else
9754	pBufferForArgs = NULL;
9755
9756	dxSetupPipeline(pThisCC, pDXContext);
9757
9758	Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
9759
9760	pDevice->pImmediateContext->DrawIndexedInstancedIndirect(pBufferForArgs, byteOffsetForArgs);
9761
9762	#ifdef DX_FLUSH_AFTER_DRAW
9763	dxDeviceFlush(pDevice);
9764	#endif
9765
9766	return VINF_SUCCESS;
9767	}
9768
9769
9770	static DECLCALLBACK(int) vmsvga3dBackDXDrawInstancedIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId argsBufferSid, uint32_t byteOffsetForArgs)
9771	{
9772	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9773	RT_NOREF(pBackend);
9774
9775	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
9776	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9777
9778	/* Get corresponding resource. Create the buffer if does not yet exist. */
9779	ID3D11Buffer *pBufferForArgs;
9780	if (argsBufferSid != SVGA_ID_INVALID)
9781	{
9782	PVMSVGA3DSURFACE pSurface;
9783	ID3D11Resource *pResource;
9784	int rc = dxEnsureResource(pThisCC, argsBufferSid, &pSurface, &pResource);
9785	AssertRCReturn(rc, rc);
9786	AssertReturn(pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER, VERR_INVALID_STATE);
9787
9788	pBufferForArgs = (ID3D11Buffer *)pResource;
9789	}
9790	else
9791	pBufferForArgs = NULL;
9792
9793	dxSetupPipeline(pThisCC, pDXContext);
9794
9795	Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
9796
9797	pDevice->pImmediateContext->DrawInstancedIndirect(pBufferForArgs, byteOffsetForArgs);
9798
9799	#ifdef DX_FLUSH_AFTER_DRAW
9800	dxDeviceFlush(pDevice);
9801	#endif
9802
9803	return VINF_SUCCESS;
9804	}
9805
9806
9807	static DECLCALLBACK(int) vmsvga3dBackDXDispatch(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t threadGroupCountX, uint32_t threadGroupCountY, uint32_t threadGroupCountZ)
9808	{
9809	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9810	RT_NOREF(pBackend);
9811
9812	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
9813	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9814
9815	dxSetupPipeline(pThisCC, pDXContext);
9816
9817	pDevice->pImmediateContext->Dispatch(threadGroupCountX, threadGroupCountY, threadGroupCountZ);
9818
9819	#ifdef DX_FLUSH_AFTER_DRAW
9820	dxDeviceFlush(pDevice);
9821	#endif
9822
9823	return VINF_SUCCESS;
9824	}
9825
9826
9827	static DECLCALLBACK(int) vmsvga3dBackDXDispatchIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9828	{
9829	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9830
9831	RT_NOREF(pBackend, pDXContext);
9832	AssertFailed(); /** @todo Implement */
9833	return VERR_NOT_IMPLEMENTED;
9834	}
9835
9836
9837	static DECLCALLBACK(int) vmsvga3dBackWriteZeroSurface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9838	{
9839	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9840
9841	RT_NOREF(pBackend, pDXContext);
9842	AssertFailed(); /** @todo Implement */
9843	return VERR_NOT_IMPLEMENTED;
9844	}
9845
9846
9847	static DECLCALLBACK(int) vmsvga3dBackHintZeroSurface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9848	{
9849	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9850
9851	RT_NOREF(pBackend, pDXContext);
9852	AssertFailed(); /** @todo Implement */
9853	return VERR_NOT_IMPLEMENTED;
9854	}
9855
9856
9857	static DECLCALLBACK(int) vmsvga3dBackDXTransferToBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9858	{
9859	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9860
9861	RT_NOREF(pBackend, pDXContext);
9862	AssertFailed(); /** @todo Implement */
9863	return VERR_NOT_IMPLEMENTED;
9864	}
9865
9866
9867	static DECLCALLBACK(int) vmsvga3dBackLogicOpsBitBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9868	{
9869	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9870
9871	RT_NOREF(pBackend, pDXContext);
9872	AssertFailed(); /** @todo Implement */
9873	return VERR_NOT_IMPLEMENTED;
9874	}
9875
9876
9877	static DECLCALLBACK(int) vmsvga3dBackLogicOpsTransBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9878	{
9879	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9880
9881	RT_NOREF(pBackend, pDXContext);
9882	AssertFailed(); /** @todo Implement */
9883	return VERR_NOT_IMPLEMENTED;
9884	}
9885
9886
9887	static DECLCALLBACK(int) vmsvga3dBackLogicOpsStretchBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9888	{
9889	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9890
9891	RT_NOREF(pBackend, pDXContext);
9892	AssertFailed(); /** @todo Implement */
9893	return VERR_NOT_IMPLEMENTED;
9894	}
9895
9896
9897	static DECLCALLBACK(int) vmsvga3dBackLogicOpsColorFill(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9898	{
9899	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9900
9901	RT_NOREF(pBackend, pDXContext);
9902	AssertFailed(); /** @todo Implement */
9903	return VERR_NOT_IMPLEMENTED;
9904	}
9905
9906
9907	static DECLCALLBACK(int) vmsvga3dBackLogicOpsAlphaBlend(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9908	{
9909	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9910
9911	RT_NOREF(pBackend, pDXContext);
9912	AssertFailed(); /** @todo Implement */
9913	return VERR_NOT_IMPLEMENTED;
9914	}
9915
9916
9917	static DECLCALLBACK(int) vmsvga3dBackLogicOpsClearTypeBlend(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9918	{
9919	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9920
9921	RT_NOREF(pBackend, pDXContext);
9922	AssertFailed(); /** @todo Implement */
9923	return VERR_NOT_IMPLEMENTED;
9924	}
9925
9926
9927	static int dxSetCSUnorderedAccessViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9928	{
9929	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
9930	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9931
9932	//DEBUG_BREAKPOINT_TEST();
9933	uint32_t const *pUAIds = &pDXContext->svgaDXContext.csuaViewIds[0];
9934	ID3D11UnorderedAccessView *papUnorderedAccessView[SVGA3D_DX11_1_MAX_UAVIEWS];
9935	UINT aUAVInitialCounts[SVGA3D_DX11_1_MAX_UAVIEWS];
9936	for (uint32_t i = 0; i < SVGA3D_DX11_1_MAX_UAVIEWS; ++i)
9937	{
9938	papUnorderedAccessView[i] = NULL;
9939	aUAVInitialCounts[i] = (UINT)-1;
9940
9941	SVGA3dUAViewId const uaViewId = pUAIds[i];
9942	if (uaViewId != SVGA3D_INVALID_ID)
9943	{
9944	ASSERT_GUEST_CONTINUE(uaViewId < pDXContext->cot.cUAView);
9945
9946	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paUnorderedAccessView[uaViewId];
9947	Assert(pDXView->u.pUnorderedAccessView);
9948	papUnorderedAccessView[i] = pDXView->u.pUnorderedAccessView;
9949
9950	SVGACOTableDXUAViewEntry const *pEntry = &pDXContext->cot.paUAView[uaViewId];
9951	aUAVInitialCounts[i] = pEntry->structureCount;
9952	}
9953	}
9954
9955	dxCSUnorderedAccessViewSet(pDevice, 0, SVGA3D_DX11_1_MAX_UAVIEWS, papUnorderedAccessView, aUAVInitialCounts);
9956	return VINF_SUCCESS;
9957	}
9958
9959
9960	static DECLCALLBACK(int) vmsvga3dBackDXSetCSUAViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startIndex, uint32_t cUAViewId, SVGA3dUAViewId const *paUAViewId)
9961	{
9962	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9963	RT_NOREF(pBackend, pDXContext);
9964
9965	DXDEVICE *pDevice = dxDeviceGet(pThisCC->svga.p3dState);
9966	AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
9967
9968	RT_NOREF(startIndex, cUAViewId, paUAViewId);
9969
9970	return VINF_SUCCESS;
9971	}
9972
9973
9974	static DECLCALLBACK(int) vmsvga3dBackDXSetMinLOD(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9975	{
9976	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9977
9978	RT_NOREF(pBackend, pDXContext);
9979	AssertFailed(); /** @todo Implement */
9980	return VERR_NOT_IMPLEMENTED;
9981	}
9982
9983
9984	static DECLCALLBACK(int) vmsvga3dBackDXSetShaderIface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9985	{
9986	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9987
9988	RT_NOREF(pBackend, pDXContext);
9989	AssertFailed(); /** @todo Implement */
9990	return VERR_NOT_IMPLEMENTED;
9991	}
9992
9993
9994	static DECLCALLBACK(int) vmsvga3dBackSurfaceStretchBltNonMSToMS(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
9995	{
9996	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
9997
9998	RT_NOREF(pBackend, pDXContext);
9999	AssertFailed(); /** @todo Implement */
10000	return VERR_NOT_IMPLEMENTED;
10001	}
10002
10003
10004	static DECLCALLBACK(int) vmsvga3dBackDXBindShaderIface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
10005	{
10006	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
10007
10008	RT_NOREF(pBackend, pDXContext);
10009	AssertFailed(); /** @todo Implement */
10010	return VERR_NOT_IMPLEMENTED;
10011	}
10012
10013
10014	/*
10015	*
10016	* Video decoding and processing callbacks.
10017	*
10018	*/
10019
10020	/*
10021	* Conversion between the device and D3D11 constants.
10022	*/
10023
10024	static D3D11_VIDEO_FRAME_FORMAT dxVideoFrameFormat(VBSVGA3dVideoFrameFormat FrameFormat)
10025	{
10026	switch (FrameFormat)
10027	{
10028	case VBSVGA3D_VIDEO_FRAME_FORMAT_PROGRESSIVE: return D3D11_VIDEO_FRAME_FORMAT_PROGRESSIVE;
10029	case VBSVGA3D_VIDEO_FRAME_FORMAT_INTERLACED_TOP_FIELD_FIRST: return D3D11_VIDEO_FRAME_FORMAT_INTERLACED_TOP_FIELD_FIRST;
10030	case VBSVGA3D_VIDEO_FRAME_FORMAT_INTERLACED_BOTTOM_FIELD_FIRST: return D3D11_VIDEO_FRAME_FORMAT_INTERLACED_BOTTOM_FIELD_FIRST;
10031	default:
10032	ASSERT_GUEST_FAILED();
10033	break;
10034	}
10035	return D3D11_VIDEO_FRAME_FORMAT_PROGRESSIVE;
10036	}
10037
10038
10039	static D3D11_VIDEO_USAGE dxVideoUsage(VBSVGA3dVideoUsage Usage)
10040	{
10041	switch (Usage)
10042	{
10043	case VBSVGA3D_VIDEO_USAGE_PLAYBACK_NORMAL: return D3D11_VIDEO_USAGE_PLAYBACK_NORMAL;
10044	case VBSVGA3D_VIDEO_USAGE_OPTIMAL_SPEED: return D3D11_VIDEO_USAGE_OPTIMAL_SPEED;
10045	case VBSVGA3D_VIDEO_USAGE_OPTIMAL_QUALITY: return D3D11_VIDEO_USAGE_OPTIMAL_QUALITY;
10046	default:
10047	ASSERT_GUEST_FAILED();
10048	break;
10049	}
10050	return D3D11_VIDEO_USAGE_PLAYBACK_NORMAL;
10051	}
10052
10053
10054	static D3D11_VDOV_DIMENSION dxVDOVDimension(VBSVGA3dVDOVDimension ViewDimension)
10055	{
10056	switch (ViewDimension)
10057	{
10058	case VBSVGA3D_VDOV_DIMENSION_UNKNOWN: return D3D11_VDOV_DIMENSION_UNKNOWN;
10059	case VBSVGA3D_VDOV_DIMENSION_TEXTURE2D: return D3D11_VDOV_DIMENSION_TEXTURE2D;
10060	default:
10061	ASSERT_GUEST_FAILED();
10062	break;
10063	}
10064	return D3D11_VDOV_DIMENSION_UNKNOWN;
10065	}
10066
10067
10068	static D3D11_VPIV_DIMENSION dxVPIVDimension(VBSVGA3dVPIVDimension ViewDimension)
10069	{
10070	switch (ViewDimension)
10071	{
10072	case VBSVGA3D_VPIV_DIMENSION_UNKNOWN: return D3D11_VPIV_DIMENSION_UNKNOWN;
10073	case VBSVGA3D_VPIV_DIMENSION_TEXTURE2D: return D3D11_VPIV_DIMENSION_TEXTURE2D;
10074	default:
10075	ASSERT_GUEST_FAILED();
10076	break;
10077	}
10078	return D3D11_VPIV_DIMENSION_UNKNOWN;
10079	}
10080
10081
10082	static D3D11_VPOV_DIMENSION dxVPOVDimension(VBSVGA3dVPOVDimension ViewDimension)
10083	{
10084	switch (ViewDimension)
10085	{
10086	case VBSVGA3D_VPOV_DIMENSION_UNKNOWN: return D3D11_VPOV_DIMENSION_UNKNOWN;
10087	case VBSVGA3D_VPOV_DIMENSION_TEXTURE2D: return D3D11_VPOV_DIMENSION_TEXTURE2D;
10088	case VBSVGA3D_VPOV_DIMENSION_TEXTURE2DARRAY: return D3D11_VPOV_DIMENSION_TEXTURE2DARRAY;
10089	default:
10090	ASSERT_GUEST_FAILED();
10091	break;
10092	}
10093	return D3D11_VPOV_DIMENSION_UNKNOWN;
10094	}
10095
10096
10097	static D3D11_VIDEO_DECODER_BUFFER_TYPE dxVideoDecoderBufferType(VBSVGA3dVideoDecoderBufferType BufferType)
10098	{
10099	switch (BufferType)
10100	{
10101	case VBSVGA3D_VD_BUFFER_PICTURE_PARAMETERS: return D3D11_VIDEO_DECODER_BUFFER_PICTURE_PARAMETERS;
10102	case VBSVGA3D_VD_BUFFER_MACROBLOCK_CONTROL: return D3D11_VIDEO_DECODER_BUFFER_MACROBLOCK_CONTROL;
10103	case VBSVGA3D_VD_BUFFER_RESIDUAL_DIFFERENCE: return D3D11_VIDEO_DECODER_BUFFER_RESIDUAL_DIFFERENCE;
10104	case VBSVGA3D_VD_BUFFER_DEBLOCKING_CONTROL: return D3D11_VIDEO_DECODER_BUFFER_DEBLOCKING_CONTROL;
10105	case VBSVGA3D_VD_BUFFER_INVERSE_QUANTIZATION_MATRIX: return D3D11_VIDEO_DECODER_BUFFER_INVERSE_QUANTIZATION_MATRIX;
10106	case VBSVGA3D_VD_BUFFER_SLICE_CONTROL: return D3D11_VIDEO_DECODER_BUFFER_SLICE_CONTROL;
10107	case VBSVGA3D_VD_BUFFER_BITSTREAM: return D3D11_VIDEO_DECODER_BUFFER_BITSTREAM;
10108	case VBSVGA3D_VD_BUFFER_MOTION_VECTOR: return D3D11_VIDEO_DECODER_BUFFER_MOTION_VECTOR;
10109	case VBSVGA3D_VD_BUFFER_FILM_GRAIN: return D3D11_VIDEO_DECODER_BUFFER_FILM_GRAIN;
10110	default:
10111	ASSERT_GUEST_FAILED();
10112	break;
10113	}
10114	return D3D11_VIDEO_DECODER_BUFFER_BITSTREAM;
10115	}
10116
10117
10118	/*
10119	* D3D11 wrappers.
10120	*/
10121
10122	static void dxVideoProcessorSetOutputTargetRect(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor, uint8 enable, SVGASignedRect const &outputRect)
10123	{
10124	RECT OutputRect;
10125	OutputRect.left = outputRect.left;
10126	OutputRect.top = outputRect.top;
10127	OutputRect.right = outputRect.right;
10128	OutputRect.bottom = outputRect.bottom;
10129
10130	pDXDevice->pVideoContext->VideoProcessorSetOutputTargetRect(pDXVideoProcessor->pVideoProcessor, RT_BOOL(enable), &OutputRect);
10131	}
10132
10133
10134	static void dxVideoProcessorSetOutputBackgroundColor(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor, uint32 YCbCr, VBSVGA3dVideoColor const &color)
10135	{
10136	D3D11_VIDEO_COLOR Color;
10137	Color.RGBA.R = color.r;
10138	Color.RGBA.G = color.g;
10139	Color.RGBA.B = color.b;
10140	Color.RGBA.A = color.a;
10141
10142	pDXDevice->pVideoContext->VideoProcessorSetOutputBackgroundColor(pDXVideoProcessor->pVideoProcessor, RT_BOOL(YCbCr), &Color);
10143	}
10144
10145
10146	static void dxVideoProcessorSetOutputColorSpace(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor, VBSVGA3dVideoProcessorColorSpace const &colorSpace)
10147	{
10148	D3D11_VIDEO_PROCESSOR_COLOR_SPACE ColorSpace;
10149	ColorSpace.Usage = colorSpace.Usage;
10150	ColorSpace.RGB_Range = colorSpace.RGB_Range;
10151	ColorSpace.YCbCr_Matrix = colorSpace.YCbCr_Matrix;
10152	ColorSpace.YCbCr_xvYCC = colorSpace.YCbCr_xvYCC;
10153	ColorSpace.Nominal_Range = colorSpace.Nominal_Range;
10154	ColorSpace.Reserved = colorSpace.Reserved;
10155
10156	pDXDevice->pVideoContext->VideoProcessorSetOutputColorSpace(pDXVideoProcessor->pVideoProcessor, &ColorSpace);
10157	}
10158
10159
10160	static void dxVideoProcessorSetOutputAlphaFillMode(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor, VBSVGA3dVideoProcessorAlphaFillMode fillMode, uint32 streamIndex)
10161	{
10162	D3D11_VIDEO_PROCESSOR_ALPHA_FILL_MODE AlphaFillMode = (D3D11_VIDEO_PROCESSOR_ALPHA_FILL_MODE)fillMode;
10163
10164	pDXDevice->pVideoContext->VideoProcessorSetOutputAlphaFillMode(pDXVideoProcessor->pVideoProcessor, AlphaFillMode, streamIndex);
10165	}
10166
10167
10168	static void dxVideoProcessorSetOutputConstriction(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor, uint32 enable, uint32 width, uint32 height)
10169	{
10170	SIZE Size;
10171	Size.cx = width;
10172	Size.cy = height;
10173
10174	pDXDevice->pVideoContext->VideoProcessorSetOutputConstriction(pDXVideoProcessor->pVideoProcessor, RT_BOOL(enable), Size);
10175	}
10176
10177
10178	static void dxVideoProcessorSetOutputStereoMode(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor, uint32 enable)
10179	{
10180	pDXDevice->pVideoContext->VideoProcessorSetOutputStereoMode(pDXVideoProcessor->pVideoProcessor, RT_BOOL(enable));
10181	}
10182
10183
10184	static void dxVideoProcessorSetStreamFrameFormat(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor, uint32 streamIndex, VBSVGA3dVideoFrameFormat format)
10185	{
10186	D3D11_VIDEO_FRAME_FORMAT FrameFormat = (D3D11_VIDEO_FRAME_FORMAT)format;
10187
10188	pDXDevice->pVideoContext->VideoProcessorSetStreamFrameFormat(pDXVideoProcessor->pVideoProcessor, streamIndex, FrameFormat);
10189	}
10190
10191
10192	static void dxVideoProcessorSetStreamColorSpace(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor, uint32 streamIndex, VBSVGA3dVideoProcessorColorSpace colorSpace)
10193	{
10194	D3D11_VIDEO_PROCESSOR_COLOR_SPACE ColorSpace;
10195	ColorSpace.Usage = colorSpace.Usage;
10196	ColorSpace.RGB_Range = colorSpace.RGB_Range;
10197	ColorSpace.YCbCr_Matrix = colorSpace.YCbCr_Matrix;
10198	ColorSpace.YCbCr_xvYCC = colorSpace.YCbCr_xvYCC;
10199	ColorSpace.Nominal_Range = colorSpace.Nominal_Range;
10200	ColorSpace.Reserved = colorSpace.Reserved;
10201
10202	pDXDevice->pVideoContext->VideoProcessorSetStreamColorSpace(pDXVideoProcessor->pVideoProcessor, streamIndex, &ColorSpace);
10203	}
10204
10205
10206	static void dxVideoProcessorSetStreamOutputRate(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor,
10207	uint32 streamIndex, VBSVGA3dVideoProcessorOutputRate outputRate, uint32 repeatFrame, SVGA3dFraction64 const &customRate)
10208	{
10209	D3D11_VIDEO_PROCESSOR_OUTPUT_RATE OutputRate = (D3D11_VIDEO_PROCESSOR_OUTPUT_RATE)outputRate;
10210	DXGI_RATIONAL CustomRate;
10211	CustomRate.Numerator = customRate.numerator;
10212	CustomRate.Denominator = customRate.denominator;
10213
10214	pDXDevice->pVideoContext->VideoProcessorSetStreamOutputRate(pDXVideoProcessor->pVideoProcessor, streamIndex, OutputRate, RT_BOOL(repeatFrame), &CustomRate);
10215	}
10216
10217
10218	static void dxVideoProcessorSetStreamSourceRect(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor,
10219	uint32 streamIndex, uint32 enable, SVGASignedRect const &sourceRect)
10220	{
10221	RECT Rect;
10222	Rect.left = sourceRect.left;
10223	Rect.top = sourceRect.top;
10224	Rect.right = sourceRect.right;
10225	Rect.bottom = sourceRect.bottom;
10226
10227	pDXDevice->pVideoContext->VideoProcessorSetStreamSourceRect(pDXVideoProcessor->pVideoProcessor, streamIndex, RT_BOOL(enable), &Rect);
10228	}
10229
10230
10231	static void dxVideoProcessorSetStreamDestRect(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor,
10232	uint32 streamIndex, uint32 enable, SVGASignedRect const &destRect)
10233	{
10234	RECT Rect;
10235	Rect.left = destRect.left;
10236	Rect.top = destRect.top;
10237	Rect.right = destRect.right;
10238	Rect.bottom = destRect.bottom;
10239
10240	pDXDevice->pVideoContext->VideoProcessorSetStreamDestRect(pDXVideoProcessor->pVideoProcessor, streamIndex, RT_BOOL(enable), &Rect);
10241	}
10242
10243
10244	static void dxVideoProcessorSetStreamAlpha(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor,
10245	uint32 streamIndex, uint32 enable, float alpha)
10246	{
10247	pDXDevice->pVideoContext->VideoProcessorSetStreamAlpha(pDXVideoProcessor->pVideoProcessor, streamIndex, RT_BOOL(enable), alpha);
10248	}
10249
10250
10251	static void dxVideoProcessorSetStreamPalette(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor,
10252	uint32 streamIndex, uint32_t cEntries, uint32_t const *paEntries)
10253	{
10254	pDXDevice->pVideoContext->VideoProcessorSetStreamPalette(pDXVideoProcessor->pVideoProcessor, streamIndex, cEntries, paEntries);
10255	}
10256
10257
10258	static void dxVideoProcessorSetStreamPixelAspectRatio(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor,
10259	uint32 streamIndex, uint32 enable, SVGA3dFraction64 const &sourceRatio, SVGA3dFraction64 const &destRatio)
10260	{
10261	DXGI_RATIONAL SourceAspectRatio;
10262	SourceAspectRatio.Numerator = sourceRatio.numerator;
10263	SourceAspectRatio.Denominator = sourceRatio.denominator;
10264
10265	DXGI_RATIONAL DestinationAspectRatio;
10266	DestinationAspectRatio.Numerator = destRatio.numerator;
10267	DestinationAspectRatio.Denominator = destRatio.denominator;
10268
10269	pDXDevice->pVideoContext->VideoProcessorSetStreamPixelAspectRatio(pDXVideoProcessor->pVideoProcessor, streamIndex, RT_BOOL(enable), &SourceAspectRatio, &DestinationAspectRatio);
10270	}
10271
10272
10273	static void dxVideoProcessorSetStreamLumaKey(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor,
10274	uint32 streamIndex, uint32 enable, float lower, float upper)
10275	{
10276	pDXDevice->pVideoContext->VideoProcessorSetStreamLumaKey(pDXVideoProcessor->pVideoProcessor, streamIndex, RT_BOOL(enable), lower, upper);
10277	}
10278
10279
10280	static void dxVideoProcessorSetStreamStereoFormat(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor,
10281	uint32 streamIndex, uint32 enable, VBSVGA3dVideoProcessorStereoFormat stereoFormat,
10282	uint8 leftViewFrame0, uint8 baseViewFrame0, VBSVGA3dVideoProcessorStereoFlipMode flipMode, int32 monoOffset)
10283	{
10284	D3D11_VIDEO_PROCESSOR_STEREO_FORMAT Format = (D3D11_VIDEO_PROCESSOR_STEREO_FORMAT)stereoFormat;
10285	D3D11_VIDEO_PROCESSOR_STEREO_FLIP_MODE FlipMode = (D3D11_VIDEO_PROCESSOR_STEREO_FLIP_MODE)flipMode;
10286
10287	pDXDevice->pVideoContext->VideoProcessorSetStreamStereoFormat(pDXVideoProcessor->pVideoProcessor, streamIndex, RT_BOOL(enable), Format, RT_BOOL(leftViewFrame0), RT_BOOL(baseViewFrame0), FlipMode, monoOffset);
10288	}
10289
10290
10291	static void dxVideoProcessorSetStreamAutoProcessingMode(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor,
10292	uint32 streamIndex, uint32 enable)
10293	{
10294	pDXDevice->pVideoContext->VideoProcessorSetStreamAutoProcessingMode(pDXVideoProcessor->pVideoProcessor, streamIndex, RT_BOOL(enable));
10295	}
10296
10297
10298	static void dxVideoProcessorSetStreamFilter(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor,
10299	uint32 streamIndex, uint32 enable, VBSVGA3dVideoProcessorFilter filter, int32 level)
10300	{
10301	D3D11_VIDEO_PROCESSOR_FILTER Filter = (D3D11_VIDEO_PROCESSOR_FILTER)filter;
10302
10303	pDXDevice->pVideoContext->VideoProcessorSetStreamFilter(pDXVideoProcessor->pVideoProcessor, streamIndex, Filter, RT_BOOL(enable), level);
10304	}
10305
10306
10307	static void dxVideoProcessorSetStreamRotation(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor,
10308	uint32 streamIndex, uint32 enable, VBSVGA3dVideoProcessorRotation rotation)
10309	{
10310	D3D11_VIDEO_PROCESSOR_ROTATION Rotation = (D3D11_VIDEO_PROCESSOR_ROTATION)rotation;
10311
10312	pDXDevice->pVideoContext->VideoProcessorSetStreamRotation(pDXVideoProcessor->pVideoProcessor, streamIndex, RT_BOOL(enable), Rotation);
10313	}
10314
10315
10316	static int dxCreateVideoDecoderOutputView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoDecoderOutputViewId videoDecoderOutputViewId, VBSVGACOTableDXVideoDecoderOutputViewEntry const *pEntry)
10317	{
10318	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
10319	AssertReturn(pDXDevice->pVideoDevice, VERR_INVALID_STATE);
10320
10321	PVMSVGA3DSURFACE pSurface;
10322	ID3D11Resource *pResource;
10323	int rc = dxEnsureResource(pThisCC, pEntry->sid, &pSurface, &pResource);
10324	AssertRCReturn(rc, rc);
10325
10326	DXVIEW *pView = &pDXContext->pBackendDXContext->paVideoDecoderOutputView[videoDecoderOutputViewId];
10327	Assert(pView->u.pView == NULL);
10328
10329	D3D11_VIDEO_DECODER_OUTPUT_VIEW_DESC Desc;
10330	RT_ZERO(Desc);
10331	memcpy(&Desc.DecodeProfile, &pEntry->desc.DecodeProfile, sizeof(GUID));
10332	Desc.ViewDimension = dxVDOVDimension(pEntry->desc.ViewDimension);
10333	Desc.Texture2D.ArraySlice = pEntry->desc.Texture2D.ArraySlice;
10334
10335	ID3D11VideoDecoderOutputView *pVDOView;
10336	HRESULT hr = pDXDevice->pVideoDevice->CreateVideoDecoderOutputView(pResource, &Desc, &pVDOView);
10337	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
10338
10339	return dxViewInit(pView, pSurface, pDXContext, videoDecoderOutputViewId, VMSVGA3D_VIEWTYPE_VIDEODECODEROUTPUT, pVDOView);
10340	}
10341
10342
10343	static int dxCreateVideoProcessorInputView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorInputViewId videoProcessorInputViewId, VBSVGACOTableDXVideoProcessorInputViewEntry const *pEntry)
10344	{
10345	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
10346	AssertReturn(pDXDevice->pVideoDevice, VERR_INVALID_STATE);
10347
10348	PVMSVGA3DSURFACE pSurface;
10349	ID3D11Resource *pResource;
10350	int rc = dxEnsureResource(pThisCC, pEntry->sid, &pSurface, &pResource);
10351	AssertRCReturn(rc, rc);
10352
10353	DXVIEW *pView = &pDXContext->pBackendDXContext->paVideoProcessorInputView[videoProcessorInputViewId];
10354	Assert(pView->u.pView == NULL);
10355
10356	D3D11_VIDEO_PROCESSOR_CONTENT_DESC ContentDesc;
10357	RT_ZERO(ContentDesc);
10358	ContentDesc.InputFrameFormat = dxVideoFrameFormat(pEntry->contentDesc.InputFrameFormat);
10359	ContentDesc.InputFrameRate.Numerator = pEntry->contentDesc.InputFrameRate.numerator;
10360	ContentDesc.InputFrameRate.Denominator = pEntry->contentDesc.InputFrameRate.denominator;
10361	ContentDesc.InputWidth = pEntry->contentDesc.InputWidth;
10362	ContentDesc.InputHeight = pEntry->contentDesc.InputHeight;
10363	ContentDesc.OutputFrameRate.Numerator = pEntry->contentDesc.OutputFrameRate.numerator;
10364	ContentDesc.OutputFrameRate.Denominator = pEntry->contentDesc.OutputFrameRate.denominator;
10365	ContentDesc.OutputWidth = pEntry->contentDesc.OutputWidth;
10366	ContentDesc.OutputHeight = pEntry->contentDesc.OutputHeight;
10367	ContentDesc.Usage = dxVideoUsage(pEntry->contentDesc.Usage);
10368
10369	ID3D11VideoProcessorEnumerator *pEnum;
10370	HRESULT hr = pDXDevice->pVideoDevice->CreateVideoProcessorEnumerator(&ContentDesc, &pEnum);
10371	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
10372
10373	D3D11_VIDEO_PROCESSOR_INPUT_VIEW_DESC Desc;
10374	RT_ZERO(Desc);
10375	Desc.FourCC = pEntry->desc.FourCC;
10376	Desc.ViewDimension = dxVPIVDimension(pEntry->desc.ViewDimension);
10377	Desc.Texture2D.MipSlice = pEntry->desc.Texture2D.MipSlice;
10378	Desc.Texture2D.ArraySlice = pEntry->desc.Texture2D.ArraySlice;
10379
10380	ID3D11VideoProcessorInputView *pVPIView;
10381	hr = pDXDevice->pVideoDevice->CreateVideoProcessorInputView(pResource, pEnum, &Desc, &pVPIView);
10382	D3D_RELEASE(pEnum);
10383	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
10384
10385	return dxViewInit(pView, pSurface, pDXContext, videoProcessorInputViewId, VMSVGA3D_VIEWTYPE_VIDEOPROCESSORINPUT, pVPIView);
10386	}
10387
10388
10389	static int dxCreateVideoProcessorOutputView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorOutputViewId videoProcessorOutputViewId, VBSVGACOTableDXVideoProcessorOutputViewEntry const *pEntry)
10390	{
10391	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
10392	AssertReturn(pDXDevice->pVideoDevice, VERR_INVALID_STATE);
10393
10394	PVMSVGA3DSURFACE pSurface;
10395	ID3D11Resource *pResource;
10396	int rc = dxEnsureResource(pThisCC, pEntry->sid, &pSurface, &pResource);
10397	AssertRCReturn(rc, rc);
10398
10399	DXVIEW *pView = &pDXContext->pBackendDXContext->paVideoProcessorOutputView[videoProcessorOutputViewId];
10400	Assert(pView->u.pView == NULL);
10401
10402	D3D11_VIDEO_PROCESSOR_CONTENT_DESC ContentDesc;
10403	RT_ZERO(ContentDesc);
10404	ContentDesc.InputFrameFormat = dxVideoFrameFormat(pEntry->contentDesc.InputFrameFormat);
10405	ContentDesc.InputFrameRate.Numerator = pEntry->contentDesc.InputFrameRate.numerator;
10406	ContentDesc.InputFrameRate.Denominator = pEntry->contentDesc.InputFrameRate.denominator;
10407	ContentDesc.InputWidth = pEntry->contentDesc.InputWidth;
10408	ContentDesc.InputHeight = pEntry->contentDesc.InputHeight;
10409	ContentDesc.OutputFrameRate.Numerator = pEntry->contentDesc.OutputFrameRate.numerator;
10410	ContentDesc.OutputFrameRate.Denominator = pEntry->contentDesc.OutputFrameRate.denominator;
10411	ContentDesc.OutputWidth = pEntry->contentDesc.OutputWidth;
10412	ContentDesc.OutputHeight = pEntry->contentDesc.OutputHeight;
10413	ContentDesc.Usage = dxVideoUsage(pEntry->contentDesc.Usage);
10414
10415	ID3D11VideoProcessorEnumerator *pEnum;
10416	HRESULT hr = pDXDevice->pVideoDevice->CreateVideoProcessorEnumerator(&ContentDesc, &pEnum);
10417	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
10418
10419	D3D11_VIDEO_PROCESSOR_OUTPUT_VIEW_DESC Desc;
10420	RT_ZERO(Desc);
10421	Desc.ViewDimension = dxVPOVDimension(pEntry->desc.ViewDimension);
10422	if (Desc.ViewDimension == D3D11_VPOV_DIMENSION_TEXTURE2D)
10423	{
10424	Desc.Texture2D.MipSlice = pEntry->desc.Texture2D.MipSlice;
10425	}
10426	else if (Desc.ViewDimension == D3D11_VPOV_DIMENSION_TEXTURE2DARRAY)
10427	{
10428	Desc.Texture2DArray.MipSlice = pEntry->desc.Texture2DArray.MipSlice;
10429	Desc.Texture2DArray.FirstArraySlice = pEntry->desc.Texture2DArray.FirstArraySlice;
10430	Desc.Texture2DArray.ArraySize = pEntry->desc.Texture2DArray.ArraySize;
10431	}
10432
10433	ID3D11VideoProcessorOutputView *pVPOView;
10434	hr = pDXDevice->pVideoDevice->CreateVideoProcessorOutputView(pResource, pEnum, &Desc, &pVPOView);
10435	D3D_RELEASE(pEnum);
10436	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
10437
10438	return dxViewInit(pView, pSurface, pDXContext, videoProcessorOutputViewId, VMSVGA3D_VIEWTYPE_VIDEOPROCESSOROUTPUT, pVPOView);
10439	}
10440
10441
10442	static int dxEnsureVideoDecoderOutputView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoDecoderOutputViewId viewId, DXVIEW **ppResult)
10443	{
10444	ASSERT_GUEST_RETURN(viewId < pDXContext->cot.cVideoDecoderOutputView, VERR_INVALID_PARAMETER);
10445
10446	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paVideoDecoderOutputView[viewId];
10447	if (!pDXView->u.pView)
10448	{
10449	VBSVGACOTableDXVideoDecoderOutputViewEntry const *pEntry = &pDXContext->cot.paVideoDecoderOutputView[viewId];
10450	int rc = dxCreateVideoDecoderOutputView(pThisCC, pDXContext, viewId, pEntry);
10451	AssertRCReturn(rc, rc);
10452	}
10453	*ppResult = pDXView;
10454	return VINF_SUCCESS;
10455	}
10456
10457
10458	static int dxEnsureVideoProcessorInputView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorInputViewId viewId, DXVIEW **ppResult)
10459	{
10460	ASSERT_GUEST_RETURN(viewId < pDXContext->cot.cVideoProcessorInputView, VERR_INVALID_PARAMETER);
10461
10462	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paVideoProcessorInputView[viewId];
10463	if (!pDXView->u.pView)
10464	{
10465	VBSVGACOTableDXVideoProcessorInputViewEntry const *pEntry = &pDXContext->cot.paVideoProcessorInputView[viewId];
10466	int rc = dxCreateVideoProcessorInputView(pThisCC, pDXContext, viewId, pEntry);
10467	AssertRCReturn(rc, rc);
10468	}
10469	*ppResult = pDXView;
10470	return VINF_SUCCESS;
10471	}
10472
10473
10474	static int dxEnsureVideoProcessorOutputView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorOutputViewId viewId, DXVIEW **ppResult)
10475	{
10476	ASSERT_GUEST_RETURN(viewId < pDXContext->cot.cVideoProcessorOutputView, VERR_INVALID_PARAMETER);
10477
10478	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paVideoProcessorOutputView[viewId];
10479	if (!pDXView->u.pView)
10480	{
10481	VBSVGACOTableDXVideoProcessorOutputViewEntry const *pEntry = &pDXContext->cot.paVideoProcessorOutputView[viewId];
10482	int rc = dxCreateVideoProcessorOutputView(pThisCC, pDXContext, viewId, pEntry);
10483	AssertRCReturn(rc, rc);
10484	}
10485	*ppResult = pDXView;
10486	return VINF_SUCCESS;
10487	}
10488
10489
10490	static int dxVideoDecoderBeginFrame(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
10491	VBSVGA3dVideoDecoderId videoDecoderId,
10492	VBSVGA3dVideoDecoderOutputViewId videoDecoderOutputViewId)
10493	{
10494	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
10495	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
10496
10497	DXVIDEODECODER *pDXVideoDecoder = &pDXContext->pBackendDXContext->paVideoDecoder[videoDecoderId];
10498
10499	DXVIEW *pDXView;
10500	int rc = dxEnsureVideoDecoderOutputView(pThisCC, pDXContext, videoDecoderOutputViewId, &pDXView);
10501	AssertRCReturn(rc, rc);
10502
10503	HRESULT hr = pDXDevice->pVideoContext->DecoderBeginFrame(pDXVideoDecoder->pVideoDecoder,
10504	pDXView->u.pVideoDecoderOutputView,
10505	0, NULL);
10506	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
10507
10508	return VINF_SUCCESS;
10509	}
10510
10511
10512	static void dxSetupVideoProcessor(DXDEVICE pDXDevice, DXVIDEOPROCESSOR pDXVideoProcessor, VBSVGACOTableDXVideoProcessorEntry const *pEntry)
10513	{
10514	if (pEntry->output.SetMask & VBSVGA3D_VP_SET_OUTPUT_TARGET_RECT)
10515	dxVideoProcessorSetOutputTargetRect(pDXDevice, pDXVideoProcessor, pEntry->output.TargetRectEnable, pEntry->output.TargetRect);
10516
10517	if (pEntry->output.SetMask & VBSVGA3D_VP_SET_OUTPUT_BACKGROUND_COLOR)
10518	dxVideoProcessorSetOutputBackgroundColor(pDXDevice, pDXVideoProcessor, pEntry->output.BackgroundColorYCbCr, pEntry->output.BackgroundColor);
10519
10520	if (pEntry->output.SetMask & VBSVGA3D_VP_SET_OUTPUT_COLOR_SPACE)
10521	dxVideoProcessorSetOutputColorSpace(pDXDevice, pDXVideoProcessor, pEntry->output.ColorSpace);
10522
10523	if (pEntry->output.SetMask & VBSVGA3D_VP_SET_OUTPUT_ALPHA_FILL_MODE)
10524	dxVideoProcessorSetOutputAlphaFillMode(pDXDevice, pDXVideoProcessor, pEntry->output.AlphaFillMode, pEntry->output.AlphaFillStreamIndex);
10525
10526	if (pEntry->output.SetMask & VBSVGA3D_VP_SET_OUTPUT_CONSTRICTION)
10527	dxVideoProcessorSetOutputConstriction(pDXDevice, pDXVideoProcessor, pEntry->output.ConstrictionEnable, pEntry->output.ConstrictionWidth, pEntry->output.ConstrictionHeight);
10528
10529	if (pEntry->output.SetMask & VBSVGA3D_VP_SET_OUTPUT_STEREO_MODE)
10530	dxVideoProcessorSetOutputStereoMode(pDXDevice, pDXVideoProcessor, pEntry->output.StereoModeEnable);
10531
10532	for (uint32_t i = 0; i < RT_ELEMENTS(pEntry->aStreamState); ++i)
10533	{
10534	VBSVGA3dVideoProcessorStreamState const *pStreamState = &pEntry->aStreamState[i];
10535	if (pStreamState->SetMask & VBSVGA3D_VP_SET_STREAM_FRAME_FORMAT)
10536	dxVideoProcessorSetStreamFrameFormat(pDXDevice, pDXVideoProcessor, i, pStreamState->FrameFormat);
10537
10538	if (pStreamState->SetMask & VBSVGA3D_VP_SET_STREAM_COLOR_SPACE)
10539	dxVideoProcessorSetStreamColorSpace(pDXDevice, pDXVideoProcessor, i, pStreamState->ColorSpace);
10540
10541	if (pStreamState->SetMask & VBSVGA3D_VP_SET_STREAM_OUTPUT_RATE)
10542	dxVideoProcessorSetStreamOutputRate(pDXDevice, pDXVideoProcessor, i, pStreamState->OutputRate, pStreamState->RepeatFrame, pStreamState->CustomRate);
10543
10544	if (pStreamState->SetMask & VBSVGA3D_VP_SET_STREAM_SOURCE_RECT)
10545	dxVideoProcessorSetStreamSourceRect(pDXDevice, pDXVideoProcessor, i, pStreamState->SourceRectEnable, pStreamState->SourceRect);
10546
10547	if (pStreamState->SetMask & VBSVGA3D_VP_SET_STREAM_DEST_RECT)
10548	dxVideoProcessorSetStreamDestRect(pDXDevice, pDXVideoProcessor, i, pStreamState->DestRectEnable, pStreamState->DestRect);
10549
10550	if (pStreamState->SetMask & VBSVGA3D_VP_SET_STREAM_ALPHA)
10551	dxVideoProcessorSetStreamAlpha(pDXDevice, pDXVideoProcessor, i, pStreamState->AlphaEnable, pStreamState->Alpha);
10552
10553	if (pStreamState->SetMask & VBSVGA3D_VP_SET_STREAM_PALETTE)
10554	dxVideoProcessorSetStreamPalette(pDXDevice, pDXVideoProcessor, i, pStreamState->PaletteCount, &pStreamState->aPalette[0]);\
10555
10556	if (pStreamState->SetMask & VBSVGA3D_VP_SET_STREAM_ASPECT_RATIO)
10557	dxVideoProcessorSetStreamPixelAspectRatio(pDXDevice, pDXVideoProcessor, i, pStreamState->AspectRatioEnable, pStreamState->AspectSourceRatio, pStreamState->AspectDestRatio);
10558
10559	if (pStreamState->SetMask & VBSVGA3D_VP_SET_STREAM_LUMA_KEY)
10560	dxVideoProcessorSetStreamLumaKey(pDXDevice, pDXVideoProcessor, i, pStreamState->LumaKeyEnable, pStreamState->LumaKeyLower, pStreamState->LumaKeyUpper);
10561
10562	if (pStreamState->SetMask & VBSVGA3D_VP_SET_STREAM_STEREO_FORMAT)
10563	dxVideoProcessorSetStreamStereoFormat(pDXDevice, pDXVideoProcessor, i, pStreamState->StereoFormatEnable, pStreamState->StereoFormat,
10564	pStreamState->LeftViewFrame0, pStreamState->BaseViewFrame0, pStreamState->FlipMode, pStreamState->MonoOffset);
10565
10566	if (pStreamState->SetMask & VBSVGA3D_VP_SET_STREAM_AUTO_PROCESSING_MODE)
10567	dxVideoProcessorSetStreamAutoProcessingMode(pDXDevice, pDXVideoProcessor, i, pStreamState->AutoProcessingModeEnable);
10568
10569	if (pStreamState->SetMask & VBSVGA3D_VP_SET_STREAM_FILTER)
10570	{
10571	for (uint32_t idxFilter = 0; idxFilter < VBSVGA3D_VP_MAX_FILTER_COUNT; ++idxFilter)
10572	{
10573	uint32_t const enable = pStreamState->FilterEnableMask & ~(1 << idxFilter);
10574	int32 const level = pStreamState->aFilter[idxFilter].Level;
10575	dxVideoProcessorSetStreamFilter(pDXDevice, pDXVideoProcessor, i, enable, (VBSVGA3dVideoProcessorFilter)idxFilter, level);
10576	}
10577	}
10578
10579	if (pStreamState->SetMask & VBSVGA3D_VP_SET_STREAM_ROTATION)
10580	dxVideoProcessorSetStreamRotation(pDXDevice, pDXVideoProcessor, i, pStreamState->RotationEnable, pStreamState->Rotation);
10581	}
10582	}
10583
10584
10585	static int dxCreateVideoProcessor(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId, VBSVGACOTableDXVideoProcessorEntry const *pEntry)
10586	{
10587	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
10588	AssertReturn(pDXDevice->pVideoDevice, VERR_INVALID_STATE);
10589
10590	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
10591
10592	D3D11_VIDEO_PROCESSOR_CONTENT_DESC Desc;
10593	RT_ZERO(Desc);
10594	Desc.InputFrameFormat = dxVideoFrameFormat(pEntry->desc.InputFrameFormat);
10595	Desc.InputFrameRate.Numerator = pEntry->desc.InputFrameRate.numerator;
10596	Desc.InputFrameRate.Denominator = pEntry->desc.InputFrameRate.denominator;
10597	Desc.InputWidth = pEntry->desc.InputWidth;
10598	Desc.InputHeight = pEntry->desc.InputHeight;
10599	Desc.OutputFrameRate.Numerator = pEntry->desc.OutputFrameRate.numerator;
10600	Desc.OutputFrameRate.Denominator = pEntry->desc.OutputFrameRate.denominator;
10601	Desc.OutputWidth = pEntry->desc.OutputWidth;
10602	Desc.OutputHeight = pEntry->desc.OutputHeight;
10603	Desc.Usage = dxVideoUsage(pEntry->desc.Usage);
10604
10605	HRESULT hr = pDXDevice->pVideoDevice->CreateVideoProcessorEnumerator(&Desc, &pDXVideoProcessor->pEnum);
10606	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
10607
10608	hr = pDXDevice->pVideoDevice->CreateVideoProcessor(pDXVideoProcessor->pEnum, 0, &pDXVideoProcessor->pVideoProcessor);
10609	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
10610
10611	dxSetupVideoProcessor(pDXDevice, pDXVideoProcessor, pEntry);
10612	return VINF_SUCCESS;
10613	}
10614
10615
10616	static void dxDestroyVideoProcessor(DXVIDEOPROCESSOR *pDXVideoProcessor)
10617	{
10618	D3D_RELEASE(pDXVideoProcessor->pEnum);
10619	D3D_RELEASE(pDXVideoProcessor->pVideoProcessor);
10620	}
10621
10622
10623	static int dxCreateVideoDecoder(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoDecoderId videoDecoderId, VBSVGACOTableDXVideoDecoderEntry const *pEntry)
10624	{
10625	HRESULT hr;
10626
10627	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
10628	AssertReturn(pDXDevice->pVideoDevice, VERR_INVALID_STATE);
10629
10630	DXVIDEODECODER *pDXVideoDecoder = &pDXContext->pBackendDXContext->paVideoDecoder[videoDecoderId];
10631
10632	D3D11_VIDEO_DECODER_DESC VideoDesc;
10633	RT_ZERO(VideoDesc);
10634	memcpy(&VideoDesc.Guid, &pEntry->desc.DecodeProfile, sizeof(GUID));
10635	VideoDesc.SampleWidth = pEntry->desc.SampleWidth;
10636	VideoDesc.SampleHeight = pEntry->desc.SampleHeight;
10637	VideoDesc.OutputFormat = vmsvgaDXSurfaceFormat2Dxgi(pEntry->desc.OutputFormat);
10638
10639	D3D11_VIDEO_DECODER_CONFIG Config;
10640	RT_ZERO(Config);
10641	memcpy(&Config.guidConfigBitstreamEncryption, &pEntry->config.guidConfigBitstreamEncryption, sizeof(GUID));
10642	memcpy(&Config.guidConfigMBcontrolEncryption, &pEntry->config.guidConfigMBcontrolEncryption, sizeof(GUID));
10643	memcpy(&Config.guidConfigResidDiffEncryption, &pEntry->config.guidConfigResidDiffEncryption, sizeof(GUID));
10644	Config.ConfigBitstreamRaw = pEntry->config.ConfigBitstreamRaw;
10645	Config.ConfigMBcontrolRasterOrder = pEntry->config.ConfigMBcontrolRasterOrder;
10646	Config.ConfigResidDiffHost = pEntry->config.ConfigResidDiffHost;
10647	Config.ConfigSpatialResid8 = pEntry->config.ConfigSpatialResid8;
10648	Config.ConfigResid8Subtraction = pEntry->config.ConfigResid8Subtraction;
10649	Config.ConfigSpatialHost8or9Clipping = pEntry->config.ConfigSpatialHost8or9Clipping;
10650	Config.ConfigSpatialResidInterleaved = pEntry->config.ConfigSpatialResidInterleaved;
10651	Config.ConfigIntraResidUnsigned = pEntry->config.ConfigIntraResidUnsigned;
10652	Config.ConfigResidDiffAccelerator = pEntry->config.ConfigResidDiffAccelerator;
10653	Config.ConfigHostInverseScan = pEntry->config.ConfigHostInverseScan;
10654	Config.ConfigSpecificIDCT = pEntry->config.ConfigSpecificIDCT;
10655	Config.Config4GroupedCoefs = pEntry->config.Config4GroupedCoefs;
10656	Config.ConfigMinRenderTargetBuffCount = pEntry->config.ConfigMinRenderTargetBuffCount;
10657	Config.ConfigDecoderSpecific = pEntry->config.ConfigDecoderSpecific;
10658
10659	hr = pDXDevice->pVideoDevice->CreateVideoDecoder(&VideoDesc, &Config, &pDXVideoDecoder->pVideoDecoder);
10660	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
10661	LogFlowFunc(("Using DecodeProfile %RTuuid\n", &VideoDesc.Guid));
10662
10663	/* COTables are restored from saved state in ascending order. Output View must be created before Decoder. */
10664	AssertCompile(VBSVGA_COTABLE_VDOV < VBSVGA_COTABLE_VIDEODECODER);
10665	if (pEntry->vdovId != SVGA3D_INVALID_ID)
10666	{
10667	int rc = dxVideoDecoderBeginFrame(pThisCC, pDXContext, videoDecoderId, pEntry->vdovId);
10668	AssertRC(rc); RT_NOREF(rc);
10669	}
10670
10671	return VINF_SUCCESS;
10672	}
10673
10674
10675	static void dxDestroyVideoDecoder(DXVIDEODECODER *pDXVideoDecoder)
10676	{
10677	D3D_RELEASE(pDXVideoDecoder->pVideoDecoder);
10678	}
10679
10680
10681	/*
10682	* Backend callbacks.
10683	*/
10684
10685	static DECLCALLBACK(int) vmsvga3dBackVBDXDefineVideoProcessor(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId, VBSVGACOTableDXVideoProcessorEntry const *pEntry)
10686	{
10687	return dxCreateVideoProcessor(pThisCC, pDXContext, videoProcessorId, pEntry);
10688	}
10689
10690
10691	static DECLCALLBACK(int) vmsvga3dBackVBDXDefineVideoDecoderOutputView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoDecoderOutputViewId videoDecoderOutputViewId, VBSVGACOTableDXVideoDecoderOutputViewEntry const *pEntry)
10692	{
10693	/* The view is created when it is used: either in BeginFrame or ClearView. */
10694	RT_NOREF(pThisCC, pDXContext, videoDecoderOutputViewId, pEntry);
10695	return VINF_SUCCESS;
10696	}
10697
10698
10699	static DECLCALLBACK(int) vmsvga3dBackVBDXDefineVideoDecoder(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoDecoderId videoDecoderId, VBSVGACOTableDXVideoDecoderEntry const *pEntry)
10700	{
10701	return dxCreateVideoDecoder(pThisCC, pDXContext, videoDecoderId, pEntry);
10702	}
10703
10704
10705	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoDecoderBeginFrame(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoDecoderId videoDecoderId, VBSVGA3dVideoDecoderOutputViewId videoDecoderOutputViewId)
10706	{
10707	return dxVideoDecoderBeginFrame(pThisCC, pDXContext, videoDecoderId, videoDecoderOutputViewId);
10708	}
10709
10710
10711	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoDecoderSubmitBuffers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoDecoderId videoDecoderId, uint32_t cBuffer, VBSVGA3dVideoDecoderBufferDesc const *paBufferDesc)
10712	{
10713	HRESULT hr;
10714
10715	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
10716	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
10717
10718	DXVIDEODECODER *pDXVideoDecoder = &pDXContext->pBackendDXContext->paVideoDecoder[videoDecoderId];
10719
10720	D3D11_VIDEO_DECODER_BUFFER_DESC paDesc = (D3D11_VIDEO_DECODER_BUFFER_DESC )RTMemTmpAllocZ(cBuffer * sizeof(D3D11_VIDEO_DECODER_BUFFER_DESC));
10721	AssertReturn(paDesc, VERR_NO_MEMORY);
10722
10723	for (uint32_t i = 0; i < cBuffer; ++i)
10724	{
10725	VBSVGA3dVideoDecoderBufferDesc const *s = &paBufferDesc[i];
10726
10727	PVMSVGA3DSURFACE pSurface;
10728	int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, s->sidBuffer, &pSurface);
10729	ASSERT_GUEST_CONTINUE(RT_SUCCESS(rc));
10730
10731	uint32_t const cbSurface = pSurface->paMipmapLevels[0].cbSurface;
10732	ASSERT_GUEST_CONTINUE( s->dataSize <= cbSurface
10733	&& s->dataOffset <= cbSurface - s->dataSize);
10734
10735	D3D11_VIDEO_DECODER_BUFFER_DESC *d = &paDesc[i];
10736	d->BufferType = dxVideoDecoderBufferType(s->bufferType);
10737	d->DataOffset = 0;
10738	d->DataSize = s->dataSize;
10739	d->FirstMBaddress = s->firstMBaddress;
10740	d->NumMBsInBuffer = s->numMBsInBuffer;
10741
10742	UINT DecoderBufferSize;
10743	void *pDecoderBuffer;
10744	hr = pDXDevice->pVideoContext->GetDecoderBuffer(pDXVideoDecoder->pVideoDecoder, d->BufferType,
10745	&DecoderBufferSize, &pDecoderBuffer);
10746	AssertReturnStmt(SUCCEEDED(hr), RTMemTmpFree(paDesc), VERR_NOT_SUPPORTED);
10747
10748	ASSERT_GUEST_CONTINUE(DecoderBufferSize >= s->dataSize);
10749
10750	if (pSurface->pBackendSurface)
10751	{
10752	void *pvGuestBuffer;
10753	uint32_t cbGuestBuffer;
10754	rc = dxReadBuffer(pDXDevice, pSurface->pBackendSurface->u.pBuffer, s->dataOffset, s->dataSize,
10755	&pvGuestBuffer, &cbGuestBuffer);
10756	AssertRC(rc);
10757	if (RT_SUCCESS(rc))
10758	{
10759	memcpy(pDecoderBuffer, pvGuestBuffer, cbGuestBuffer);
10760	RTMemFree(pvGuestBuffer);
10761	}
10762	}
10763	else
10764	memcpy(pDecoderBuffer, (uint8_t *)pSurface->paMipmapLevels[0].pSurfaceData + s->dataOffset, s->dataSize);
10765
10766	hr = pDXDevice->pVideoContext->ReleaseDecoderBuffer(pDXVideoDecoder->pVideoDecoder, d->BufferType);
10767	AssertReturnStmt(SUCCEEDED(hr), RTMemTmpFree(paDesc), VERR_NOT_SUPPORTED);
10768	}
10769
10770	hr = pDXDevice->pVideoContext->SubmitDecoderBuffers(pDXVideoDecoder->pVideoDecoder, cBuffer, paDesc);
10771	AssertReturnStmt(SUCCEEDED(hr), RTMemTmpFree(paDesc), VERR_NOT_SUPPORTED);
10772
10773	RTMemTmpFree(paDesc);
10774	return VINF_SUCCESS;
10775	}
10776
10777
10778	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoDecoderEndFrame(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoDecoderId videoDecoderId)
10779	{
10780	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
10781	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
10782
10783	DXVIDEODECODER *pDXVideoDecoder = &pDXContext->pBackendDXContext->paVideoDecoder[videoDecoderId];
10784
10785	HRESULT hr = pDXDevice->pVideoContext->DecoderEndFrame(pDXVideoDecoder->pVideoDecoder);
10786	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
10787
10788	return VINF_SUCCESS;
10789	}
10790
10791
10792	static DECLCALLBACK(int) vmsvga3dBackVBDXDefineVideoProcessorInputView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorInputViewId videoProcessorInputViewId, VBSVGACOTableDXVideoProcessorInputViewEntry const *pEntry)
10793	{
10794	/* The view is created when it is used: either in VideoProcessorBlt or ClearView. */
10795	RT_NOREF(pThisCC, pDXContext, videoProcessorInputViewId, pEntry);
10796	return VINF_SUCCESS;
10797	}
10798
10799
10800	static DECLCALLBACK(int) vmsvga3dBackVBDXDefineVideoProcessorOutputView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorOutputViewId videoProcessorOutputViewId, VBSVGACOTableDXVideoProcessorOutputViewEntry const *pEntry)
10801	{
10802	/* The view is created when it is used: either in VideoProcessorBlt or ClearView. */
10803	RT_NOREF(pThisCC, pDXContext, videoProcessorOutputViewId, pEntry);
10804	return VINF_SUCCESS;
10805	}
10806
10807
10808	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId, VBSVGA3dVideoProcessorOutputViewId videoProcessorOutputViewId,
10809	uint32_t OutputFrame, uint32_t StreamCount, VBSVGA3dVideoProcessorStream const *pVideoProcessorStreams)
10810	{
10811	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
10812	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
10813
10814	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
10815
10816	DXVIEW *pVPOView;
10817	int rc = dxEnsureVideoProcessorOutputView(pThisCC, pDXContext, videoProcessorOutputViewId, &pVPOView);
10818	AssertRCReturn(rc, rc);
10819
10820	uint32_t cbStreams = StreamCount * sizeof(D3D11_VIDEO_PROCESSOR_STREAM);
10821
10822	/* ID3D11VideoProcessorInputView arrays for past and future frames. */
10823	VBSVGA3dVideoProcessorStream const *pVPS = pVideoProcessorStreams;
10824	for (uint32_t i = 0; i < StreamCount; ++i)
10825	{
10826	uint32_t const cIds = (pVPS->StereoFormatSeparate == 0 ? 1 : 2) * (pVPS->PastFrames + 1 + pVPS->FutureFrames);
10827
10828	uint32_t const cPastFutureViews = (pVPS->StereoFormatSeparate == 0 ? 1 : 2) * (pVPS->PastFrames + pVPS->FutureFrames);
10829	cbStreams += cPastFutureViews * sizeof(ID3D11VideoProcessorInputView *);
10830
10831	pVPS = (VBSVGA3dVideoProcessorStream )((uint8_t )&pVPS[1] + cIds * sizeof(VBSVGA3dVideoProcessorInputViewId));
10832	}
10833
10834	D3D11_VIDEO_PROCESSOR_STREAM paStreams = (D3D11_VIDEO_PROCESSOR_STREAM )RTMemTmpAllocZ(cbStreams);
10835	AssertReturn(paStreams, VERR_NO_MEMORY);
10836	ID3D11VideoProcessorInputView ppSurfaces = (ID3D11VideoProcessorInputView )&paStreams[StreamCount];
10837
10838	pVPS = pVideoProcessorStreams;
10839	for (uint32_t i = 0; i < StreamCount; ++i)
10840	{
10841	D3D11_VIDEO_PROCESSOR_STREAM *d = &paStreams[i];
10842	d->Enable = pVPS->Enable;
10843	d->OutputIndex = pVPS->OutputIndex;
10844	d->InputFrameOrField = pVPS->InputFrameOrField;
10845	d->PastFrames = pVPS->PastFrames;
10846	d->FutureFrames = pVPS->FutureFrames;
10847
10848	/*
10849	* Fetch input frames.
10850	*/
10851	uint32_t const cIds = (pVPS->StereoFormatSeparate == 0 ? 1 : 2) * (pVPS->PastFrames + 1 + pVPS->FutureFrames);
10852	VBSVGA3dVideoProcessorInputViewId const pId = (VBSVGA3dVideoProcessorInputViewId )&pVPS[1];
10853	DXVIEW *pVPIView;
10854
10855	/* Past frames. */
10856	if (pVPS->PastFrames)
10857	{
10858	DEBUG_BREAKPOINT_TEST();
10859	d->ppPastSurfaces = ppSurfaces;
10860	for (UINT j = 0; j < pVPS->PastFrames; ++j, ++ppSurfaces)
10861	{
10862	rc = dxEnsureVideoProcessorInputView(pThisCC, pDXContext, *pId++, &pVPIView);
10863	AssertRCReturnStmt(rc, RTMemTmpFree(paStreams), rc);
10864	d->ppPastSurfaces[j] = pVPIView->u.pVideoProcessorInputView;
10865	}
10866	}
10867
10868	/* CurrentFrame */
10869	rc = dxEnsureVideoProcessorInputView(pThisCC, pDXContext, *pId++, &pVPIView);
10870	AssertRCReturnStmt(rc, RTMemTmpFree(paStreams), rc);
10871	d->pInputSurface = pVPIView->u.pVideoProcessorInputView;
10872
10873	/* Future frames. */
10874	if (pVPS->FutureFrames)
10875	{
10876	d->ppFutureSurfaces = ppSurfaces;
10877	for (UINT j = 0; j < pVPS->FutureFrames; ++j, ++ppSurfaces)
10878	{
10879	rc = dxEnsureVideoProcessorInputView(pThisCC, pDXContext, *pId++, &pVPIView);
10880	AssertRCReturnStmt(rc, RTMemTmpFree(paStreams), rc);
10881	d->ppFutureSurfaces[j] = pVPIView->u.pVideoProcessorInputView;
10882	}
10883	}
10884
10885	/* Right frames for stereo. */
10886	if (pVPS->StereoFormatSeparate)
10887	{
10888	/* Past frames. */
10889	if (pVPS->PastFrames)
10890	{
10891	d->ppPastSurfacesRight = ppSurfaces;
10892	for (UINT j = 0; j < pVPS->PastFrames; ++j, ++ppSurfaces)
10893	{
10894	rc = dxEnsureVideoProcessorInputView(pThisCC, pDXContext, *pId++, &pVPIView);
10895	AssertRCReturnStmt(rc, RTMemTmpFree(paStreams), rc);
10896	d->ppPastSurfacesRight[j] = pVPIView->u.pVideoProcessorInputView;
10897	}
10898	}
10899
10900	/* CurrentFrame */
10901	rc = dxEnsureVideoProcessorInputView(pThisCC, pDXContext, *pId++, &pVPIView);
10902	AssertRCReturnStmt(rc, RTMemTmpFree(paStreams), rc);
10903	d->pInputSurfaceRight = pVPIView->u.pVideoProcessorInputView;
10904
10905	/* Future frames. */
10906	if (pVPS->FutureFrames)
10907	{
10908	d->ppFutureSurfacesRight = ppSurfaces;
10909	for (UINT j = 0; j < pVPS->FutureFrames; ++j, ++ppSurfaces)
10910	{
10911	rc = dxEnsureVideoProcessorInputView(pThisCC, pDXContext, *pId++, &pVPIView);
10912	AssertRCReturnStmt(rc, RTMemTmpFree(paStreams), rc);
10913	d->ppFutureSurfacesRight[j] = pVPIView->u.pVideoProcessorInputView;
10914	}
10915	}
10916	}
10917
10918	pVPS = (VBSVGA3dVideoProcessorStream )((uint8_t )&pVPS[1] + cIds * sizeof(VBSVGA3dVideoProcessorInputViewId));
10919	}
10920
10921	HRESULT hr = pDXDevice->pVideoContext->VideoProcessorBlt(pDXVideoProcessor->pVideoProcessor, pVPOView->u.pVideoProcessorOutputView,
10922	OutputFrame, StreamCount, paStreams);
10923	RTMemTmpFree(paStreams);
10924	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
10925
10926	return VINF_SUCCESS;
10927	}
10928
10929
10930	static DECLCALLBACK(int) vmsvga3dBackVBDXDestroyVideoDecoder(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoDecoderId videoDecoderId)
10931	{
10932	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
10933	RT_NOREF(pBackend);
10934
10935	DXVIDEODECODER *pDXVideoDecoder = &pDXContext->pBackendDXContext->paVideoDecoder[videoDecoderId];
10936	dxDestroyVideoDecoder(pDXVideoDecoder);
10937
10938	return VINF_SUCCESS;
10939	}
10940
10941
10942	static DECLCALLBACK(int) vmsvga3dBackVBDXDestroyVideoDecoderOutputView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoDecoderOutputViewId videoDecoderOutputViewId)
10943	{
10944	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
10945	RT_NOREF(pBackend);
10946
10947	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paVideoDecoderOutputView[videoDecoderOutputViewId];
10948	dxViewDestroy(pDXView);
10949
10950	return VINF_SUCCESS;
10951	}
10952
10953
10954	static DECLCALLBACK(int) vmsvga3dBackVBDXDestroyVideoProcessor(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId)
10955	{
10956	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
10957	RT_NOREF(pBackend);
10958
10959	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
10960	dxDestroyVideoProcessor(pDXVideoProcessor);
10961
10962	return VINF_SUCCESS;
10963	}
10964
10965
10966	static DECLCALLBACK(int) vmsvga3dBackVBDXDestroyVideoProcessorInputView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorInputViewId videoProcessorInputViewId)
10967	{
10968	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
10969	RT_NOREF(pBackend);
10970
10971	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paVideoProcessorInputView[videoProcessorInputViewId];
10972	dxViewDestroy(pDXView);
10973
10974	return VINF_SUCCESS;
10975	}
10976
10977
10978	static DECLCALLBACK(int) vmsvga3dBackVBDXDestroyVideoProcessorOutputView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorOutputViewId videoProcessorOutputViewId)
10979	{
10980	PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
10981	RT_NOREF(pBackend);
10982
10983	DXVIEW *pDXView = &pDXContext->pBackendDXContext->paVideoProcessorOutputView[videoProcessorOutputViewId];
10984	dxViewDestroy(pDXView);
10985
10986	return VINF_SUCCESS;
10987	}
10988
10989
10990	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetOutputTargetRect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId, uint8 enable, SVGASignedRect const &outputRect)
10991	{
10992	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
10993	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
10994
10995	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
10996	dxVideoProcessorSetOutputTargetRect(pDXDevice, pDXVideoProcessor, enable, outputRect);
10997	return VINF_SUCCESS;
10998	}
10999
11000
11001	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetOutputBackgroundColor(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId, uint32 YCbCr, VBSVGA3dVideoColor const &color)
11002	{
11003	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11004	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11005
11006	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11007	dxVideoProcessorSetOutputBackgroundColor(pDXDevice, pDXVideoProcessor, YCbCr, color);
11008	return VINF_SUCCESS;
11009	}
11010
11011
11012	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetOutputColorSpace(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId, VBSVGA3dVideoProcessorColorSpace const &colorSpace)
11013	{
11014	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11015	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11016
11017	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11018	dxVideoProcessorSetOutputColorSpace(pDXDevice, pDXVideoProcessor, colorSpace);
11019	return VINF_SUCCESS;
11020	}
11021
11022
11023	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetOutputAlphaFillMode(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId, VBSVGA3dVideoProcessorAlphaFillMode fillMode, uint32 streamIndex)
11024	{
11025	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11026	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11027
11028	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11029	dxVideoProcessorSetOutputAlphaFillMode(pDXDevice, pDXVideoProcessor, fillMode, streamIndex);
11030	return VINF_SUCCESS;
11031	}
11032
11033
11034	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetOutputConstriction(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId, uint32 enabled, uint32 width, uint32 height)
11035	{
11036	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11037	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11038
11039	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11040	dxVideoProcessorSetOutputConstriction(pDXDevice, pDXVideoProcessor, enabled, width, height);
11041	return VINF_SUCCESS;
11042	}
11043
11044
11045	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetOutputStereoMode(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId, uint32 enable)
11046	{
11047	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11048	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11049
11050	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11051	dxVideoProcessorSetOutputStereoMode(pDXDevice, pDXVideoProcessor, enable);
11052	return VINF_SUCCESS;
11053	}
11054
11055
11056	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetStreamFrameFormat(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId, uint32 streamIndex, VBSVGA3dVideoFrameFormat format)
11057	{
11058	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11059	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11060
11061	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11062	dxVideoProcessorSetStreamFrameFormat(pDXDevice, pDXVideoProcessor, streamIndex, format);
11063	return VINF_SUCCESS;
11064	}
11065
11066
11067	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetStreamColorSpace(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId, uint32 streamIndex, VBSVGA3dVideoProcessorColorSpace colorSpace)
11068	{
11069	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11070	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11071
11072	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11073	dxVideoProcessorSetStreamColorSpace(pDXDevice, pDXVideoProcessor, streamIndex, colorSpace);
11074	return VINF_SUCCESS;
11075	}
11076
11077
11078	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetStreamOutputRate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId,
11079	uint32 streamIndex, VBSVGA3dVideoProcessorOutputRate outputRate, uint32 repeatFrame, SVGA3dFraction64 const &customRate)
11080	{
11081	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11082	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11083
11084	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11085	dxVideoProcessorSetStreamOutputRate(pDXDevice, pDXVideoProcessor, streamIndex, outputRate, repeatFrame, customRate);
11086	return VINF_SUCCESS;
11087	}
11088
11089
11090	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetStreamSourceRect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId,
11091	uint32 streamIndex, uint32 enable, SVGASignedRect const &sourceRect)
11092	{
11093	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11094	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11095
11096	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11097	dxVideoProcessorSetStreamSourceRect(pDXDevice, pDXVideoProcessor, streamIndex, enable, sourceRect);
11098	return VINF_SUCCESS;
11099	}
11100
11101
11102	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetStreamDestRect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId,
11103	uint32 streamIndex, uint32 enable, SVGASignedRect const &destRect)
11104	{
11105	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11106	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11107
11108	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11109	dxVideoProcessorSetStreamDestRect(pDXDevice, pDXVideoProcessor, streamIndex, enable, destRect);
11110	return VINF_SUCCESS;
11111	}
11112
11113
11114	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetStreamAlpha(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId,
11115	uint32 streamIndex, uint32 enable, float alpha)
11116	{
11117	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11118	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11119
11120	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11121	dxVideoProcessorSetStreamAlpha(pDXDevice, pDXVideoProcessor, streamIndex, enable, alpha);
11122	return VINF_SUCCESS;
11123	}
11124
11125
11126	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetStreamPalette(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId,
11127	uint32 streamIndex, uint32_t cEntries, uint32_t const *paEntries)
11128	{
11129	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11130	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11131
11132	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11133	dxVideoProcessorSetStreamPalette(pDXDevice, pDXVideoProcessor, streamIndex, cEntries, paEntries);
11134	return VINF_SUCCESS;
11135	}
11136
11137
11138	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetStreamPixelAspectRatio(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId,
11139	uint32 streamIndex, uint32 enable, SVGA3dFraction64 const &sourceRatio, SVGA3dFraction64 const &destRatio)
11140	{
11141	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11142	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11143
11144	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11145	dxVideoProcessorSetStreamPixelAspectRatio(pDXDevice, pDXVideoProcessor, streamIndex, enable, sourceRatio, destRatio);
11146	return VINF_SUCCESS;
11147	}
11148
11149
11150	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetStreamLumaKey(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId,
11151	uint32 streamIndex, uint32 enable, float lower, float upper)
11152	{
11153	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11154	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11155
11156	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11157	dxVideoProcessorSetStreamLumaKey(pDXDevice, pDXVideoProcessor, streamIndex, enable, lower, upper);
11158	return VINF_SUCCESS;
11159	}
11160
11161
11162	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetStreamStereoFormat(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId,
11163	uint32 streamIndex, uint32 enable, VBSVGA3dVideoProcessorStereoFormat stereoFormat,
11164	uint8 leftViewFrame0, uint8 baseViewFrame0, VBSVGA3dVideoProcessorStereoFlipMode flipMode, int32 monoOffset)
11165	{
11166	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11167	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11168
11169	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11170	dxVideoProcessorSetStreamStereoFormat(pDXDevice, pDXVideoProcessor, streamIndex, enable, stereoFormat,
11171	leftViewFrame0, baseViewFrame0, flipMode, monoOffset);
11172	return VINF_SUCCESS;
11173	}
11174
11175
11176	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetStreamAutoProcessingMode(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId,
11177	uint32 streamIndex, uint32 enable)
11178	{
11179	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11180	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11181
11182	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11183	dxVideoProcessorSetStreamAutoProcessingMode(pDXDevice, pDXVideoProcessor, streamIndex, enable);
11184	return VINF_SUCCESS;
11185	}
11186
11187
11188	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetStreamFilter(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId,
11189	uint32 streamIndex, uint32 enable, VBSVGA3dVideoProcessorFilter filter, int32 level)
11190	{
11191	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11192	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11193
11194	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11195	dxVideoProcessorSetStreamFilter(pDXDevice, pDXVideoProcessor, streamIndex, enable, filter, level);
11196	return VINF_SUCCESS;
11197	}
11198
11199
11200	static DECLCALLBACK(int) vmsvga3dBackVBDXVideoProcessorSetStreamRotation(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorId videoProcessorId,
11201	uint32 streamIndex, uint32 enable, VBSVGA3dVideoProcessorRotation rotation)
11202	{
11203	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11204	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11205
11206	DXVIDEOPROCESSOR *pDXVideoProcessor = &pDXContext->pBackendDXContext->paVideoProcessor[videoProcessorId];
11207	dxVideoProcessorSetStreamRotation(pDXDevice, pDXVideoProcessor, streamIndex, enable, rotation);
11208	return VINF_SUCCESS;
11209	}
11210
11211
11212	static int dxGetVideoCapDecodeProfile(PVGASTATECC pThisCC, DXDEVICE pDXDevice, void pvData, uint32 cbData, uint32 *pcbOut)
11213	{
11214	VBSVGA3dDecodeProfileInfo paDecodeProfileInfo = (VBSVGA3dDecodeProfileInfo )pvData;
11215
11216	UINT ProfileCount = pDXDevice->pVideoDevice->GetVideoDecoderProfileCount();
11217	ProfileCount = RT_MIN(ProfileCount, cbData / sizeof(paDecodeProfileInfo[0]));
11218
11219	#ifndef DEBUG_sunlover
11220	/** @todo Allocation of video decoder output texture often fails on NVidia. Disable video decoding for now. */
11221	if (pThisCC->svga.p3dState->pBackend->VendorId == 0x10de)
11222	ProfileCount = 0;
11223	#else
11224	RT_NOREF(pThisCC);
11225	#endif
11226
11227	for (UINT i = 0; i < ProfileCount; ++i)
11228	{
11229	VBSVGA3dDecodeProfileInfo *d = &paDecodeProfileInfo[i];
11230
11231	/* GUID and VBSVGA3dGuid are identical. */
11232	GUID pGuid = (GUID )&d->DecodeProfile;
11233	HRESULT hr = pDXDevice->pVideoDevice->GetVideoDecoderProfile(i, pGuid);
11234	Assert(SUCCEEDED(hr));
11235	if (SUCCEEDED(hr))
11236	{
11237	struct
11238	{
11239	DXGI_FORMAT format;
11240	uint8 *pSupported;
11241	} aFormats[] =
11242	{
11243	{ DXGI_FORMAT_AYUV, &d->fAYUV },
11244	{ DXGI_FORMAT_NV12, &d->fNV12 },
11245	{ DXGI_FORMAT_YUY2, &d->fYUY2 },
11246	};
11247
11248	for (unsigned idxFormat = 0; idxFormat < RT_ELEMENTS(aFormats); ++idxFormat)
11249	{
11250	BOOL Supported = FALSE;
11251	pDXDevice->pVideoDevice->CheckVideoDecoderFormat(pGuid, aFormats[idxFormat].format, &Supported);
11252	*aFormats[idxFormat].pSupported = RT_BOOL(Supported);
11253	}
11254	}
11255
11256	if (FAILED(hr))
11257	RT_ZERO(*d);
11258	}
11259
11260	pcbOut = ProfileCount sizeof(VBSVGA3dDecodeProfileInfo);
11261	return VINF_SUCCESS;
11262	}
11263
11264
11265	static int dxGetVideoCapDecodeConfig(DXDEVICE pDXDevice, void pvData, uint32 cbData, uint32 *pcbOut)
11266	{
11267	ASSERT_GUEST_RETURN(cbData >= sizeof(VBSVGA3dVideoDecoderDesc), VERR_INVALID_PARAMETER);
11268	VBSVGA3dDecodeConfigInfo pConfigInfo = (VBSVGA3dDecodeConfigInfo )pvData;
11269
11270	D3D11_VIDEO_DECODER_DESC Desc;
11271	RT_ZERO(Desc);
11272	memcpy(&Desc.Guid, &pConfigInfo->desc.DecodeProfile, sizeof(GUID));
11273	Desc.SampleWidth = pConfigInfo->desc.SampleWidth;
11274	Desc.SampleHeight = pConfigInfo->desc.SampleHeight;
11275	Desc.OutputFormat = vmsvgaDXSurfaceFormat2Dxgi(pConfigInfo->desc.OutputFormat);
11276
11277	UINT ConfigCount;
11278	HRESULT hr = pDXDevice->pVideoDevice->GetVideoDecoderConfigCount(&Desc, &ConfigCount);
11279	if (FAILED(hr))
11280	ConfigCount = 0;
11281	ConfigCount = RT_MIN(ConfigCount, (cbData - sizeof(pConfigInfo->desc)) / sizeof(pConfigInfo->aConfig[0]));
11282
11283	UINT cConfigOut = 0;
11284	for (UINT i = 0; i < ConfigCount; ++i)
11285	{
11286	D3D11_VIDEO_DECODER_CONFIG Config;
11287	hr = pDXDevice->pVideoDevice->GetVideoDecoderConfig(&Desc, i, &Config);
11288	Assert(SUCCEEDED(hr));
11289	if (SUCCEEDED(hr))
11290	{
11291	/* Filter out configs with encryption. */
11292	static GUID const NoEncrypt = { 0x1b81beD0, 0xa0c7,0x11d3,0xb9,0x84,0x00,0xc0,0x4f,0x2e,0x73,0xc5 };
11293	if ( memcmp(&NoEncrypt, &Config.guidConfigBitstreamEncryption, sizeof(GUID)) == 0
11294	&& memcmp(&NoEncrypt, &Config.guidConfigMBcontrolEncryption, sizeof(GUID)) == 0
11295	&& memcmp(&NoEncrypt, &Config.guidConfigResidDiffEncryption, sizeof(GUID)) == 0)
11296	{
11297	VBSVGA3dVideoDecoderConfig *d = &pConfigInfo->aConfig[cConfigOut++];
11298
11299	memcpy(&d->guidConfigBitstreamEncryption, &Config.guidConfigBitstreamEncryption, sizeof(VBSVGA3dGuid));
11300	memcpy(&d->guidConfigMBcontrolEncryption, &Config.guidConfigMBcontrolEncryption, sizeof(VBSVGA3dGuid));
11301	memcpy(&d->guidConfigResidDiffEncryption, &Config.guidConfigResidDiffEncryption, sizeof(VBSVGA3dGuid));
11302	d->ConfigBitstreamRaw = Config.ConfigBitstreamRaw;
11303	d->ConfigMBcontrolRasterOrder = Config.ConfigMBcontrolRasterOrder;
11304	d->ConfigResidDiffHost = Config.ConfigResidDiffHost;
11305	d->ConfigSpatialResid8 = Config.ConfigSpatialResid8;
11306	d->ConfigResid8Subtraction = Config.ConfigResid8Subtraction;
11307	d->ConfigSpatialHost8or9Clipping = Config.ConfigSpatialHost8or9Clipping;
11308	d->ConfigSpatialResidInterleaved = Config.ConfigSpatialResidInterleaved;
11309	d->ConfigIntraResidUnsigned = Config.ConfigIntraResidUnsigned;
11310	d->ConfigResidDiffAccelerator = Config.ConfigResidDiffAccelerator;
11311	d->ConfigHostInverseScan = Config.ConfigHostInverseScan;
11312	d->ConfigSpecificIDCT = Config.ConfigSpecificIDCT;
11313	d->Config4GroupedCoefs = Config.Config4GroupedCoefs;
11314	d->ConfigMinRenderTargetBuffCount = Config.ConfigMinRenderTargetBuffCount;
11315	d->ConfigDecoderSpecific = Config.ConfigDecoderSpecific;
11316	}
11317	}
11318	}
11319
11320	//DEBUG_BREAKPOINT_TEST();
11321	pcbOut = sizeof(VBSVGA3dVideoDecoderDesc) + cConfigOut sizeof(VBSVGA3dVideoDecoderConfig);
11322	return VINF_SUCCESS;
11323	}
11324
11325
11326	static int dxGetVideoCapProcessorEnum(DXDEVICE pDXDevice, void pvData, uint32 cbData, uint32 *pcbOut)
11327	{
11328	ASSERT_GUEST_RETURN(cbData >= sizeof(VBSVGA3dProcessorEnumInfo), VERR_INVALID_PARAMETER);
11329
11330	VBSVGA3dProcessorEnumInfo pInfo = (VBSVGA3dProcessorEnumInfo )pvData;
11331	RT_ZERO(pInfo->info);
11332
11333	D3D11_VIDEO_PROCESSOR_CONTENT_DESC ContentDesc;
11334	RT_ZERO(ContentDesc);
11335	ContentDesc.InputFrameFormat = dxVideoFrameFormat(pInfo->desc.InputFrameFormat);
11336	ContentDesc.InputFrameRate.Numerator = pInfo->desc.InputFrameRate.numerator;
11337	ContentDesc.InputFrameRate.Denominator = pInfo->desc.InputFrameRate.denominator;
11338	ContentDesc.InputWidth = pInfo->desc.InputWidth;
11339	ContentDesc.InputHeight = pInfo->desc.InputHeight;
11340	ContentDesc.OutputFrameRate.Numerator = pInfo->desc.OutputFrameRate.numerator;
11341	ContentDesc.OutputFrameRate.Denominator = pInfo->desc.OutputFrameRate.denominator;
11342	ContentDesc.OutputWidth = pInfo->desc.OutputWidth;
11343	ContentDesc.OutputHeight = pInfo->desc.OutputHeight;
11344	ContentDesc.Usage = dxVideoUsage(pInfo->desc.Usage);
11345
11346	ID3D11VideoProcessorEnumerator *pEnum;
11347	HRESULT hr = pDXDevice->pVideoDevice->CreateVideoProcessorEnumerator(&ContentDesc, &pEnum);
11348	AssertReturn(SUCCEEDED(hr), VERR_NOT_SUPPORTED);
11349
11350	struct
11351	{
11352	DXGI_FORMAT format;
11353	uint8 *pFlags;
11354	} aFormats[] =
11355	{
11356	{ DXGI_FORMAT_R8_UNORM, &pInfo->info.fR8_UNORM },
11357	{ DXGI_FORMAT_R16_UNORM, &pInfo->info.fR16_UNORM },
11358	{ DXGI_FORMAT_NV12, &pInfo->info.fNV12 },
11359	{ DXGI_FORMAT_YUY2, &pInfo->info.fYUY2 },
11360	{ DXGI_FORMAT_R16G16B16A16_FLOAT, &pInfo->info.fR16G16B16A16_FLOAT },
11361	{ DXGI_FORMAT_B8G8R8X8_UNORM, &pInfo->info.fB8G8R8X8_UNORM },
11362	{ DXGI_FORMAT_B8G8R8A8_UNORM, &pInfo->info.fB8G8R8A8_UNORM },
11363	{ DXGI_FORMAT_R8G8B8A8_UNORM, &pInfo->info.fR8G8B8A8_UNORM },
11364	{ DXGI_FORMAT_R10G10B10A2_UNORM, &pInfo->info.fR10G10B10A2_UNORM },
11365	{ DXGI_FORMAT_R10G10B10_XR_BIAS_A2_UNORM, &pInfo->info.fR10G10B10_XR_BIAS_A2_UNORM },
11366	{ DXGI_FORMAT_R8G8B8A8_UNORM_SRGB, &pInfo->info.fR8G8B8A8_UNORM_SRGB },
11367	{ DXGI_FORMAT_B8G8R8A8_UNORM_SRGB, &pInfo->info.fB8G8R8A8_UNORM_SRGB },
11368	};
11369
11370	for (unsigned idxFormat = 0; idxFormat < RT_ELEMENTS(aFormats); ++idxFormat)
11371	{
11372	UINT Flags = 0;
11373	hr = pEnum->CheckVideoProcessorFormat(aFormats[idxFormat].format, &Flags);
11374	if (SUCCEEDED(hr))
11375	*aFormats[idxFormat].pFlags = Flags;
11376	}
11377
11378	D3D11_VIDEO_PROCESSOR_CAPS Caps;
11379	hr = pEnum->GetVideoProcessorCaps(&Caps);
11380	if (SUCCEEDED(hr))
11381	{
11382	pInfo->info.Caps.DeviceCaps = Caps.DeviceCaps;
11383	pInfo->info.Caps.FeatureCaps = Caps.FeatureCaps;
11384	pInfo->info.Caps.FilterCaps = Caps.FilterCaps;
11385	pInfo->info.Caps.InputFormatCaps = Caps.InputFormatCaps;
11386	pInfo->info.Caps.AutoStreamCaps = Caps.AutoStreamCaps;
11387	pInfo->info.Caps.StereoCaps = Caps.StereoCaps;
11388	pInfo->info.Caps.RateConversionCapsCount = RT_MIN(Caps.RateConversionCapsCount, VBSVGA3D_MAX_VIDEO_RATE_CONVERSION_CAPS);
11389	pInfo->info.Caps.MaxInputStreams = RT_MIN(Caps.MaxInputStreams, VBSVGA3D_MAX_VIDEO_STREAMS);
11390	pInfo->info.Caps.MaxStreamStates = RT_MIN(Caps.MaxStreamStates, VBSVGA3D_MAX_VIDEO_STREAMS);
11391	}
11392
11393	D3D11_VIDEO_PROCESSOR_RATE_CONVERSION_CAPS RateCaps;
11394	hr = pEnum->GetVideoProcessorRateConversionCaps(0, &RateCaps);
11395	if (SUCCEEDED(hr))
11396	{
11397	pInfo->info.RateCaps.PastFrames = RateCaps.PastFrames;
11398	pInfo->info.RateCaps.FutureFrames = RateCaps.FutureFrames;
11399	pInfo->info.RateCaps.ProcessorCaps = RateCaps.ProcessorCaps;
11400	pInfo->info.RateCaps.ITelecineCaps = RateCaps.ITelecineCaps;
11401	pInfo->info.RateCaps.CustomRateCount = RT_MIN(RateCaps.CustomRateCount, VBSVGA3D_MAX_VIDEO_CUSTOM_RATE_CAPS);
11402	}
11403
11404	for (unsigned i = 0; i < pInfo->info.RateCaps.CustomRateCount; ++i)
11405	{
11406	D3D11_VIDEO_PROCESSOR_CUSTOM_RATE Rate;
11407	hr = pEnum->GetVideoProcessorCustomRate(0, i, &Rate);
11408	if (SUCCEEDED(hr))
11409	{
11410	pInfo->info.aCustomRateCaps[i].CustomRate.numerator = Rate.CustomRate.Numerator;
11411	pInfo->info.aCustomRateCaps[i].CustomRate.denominator = Rate.CustomRate.Denominator;
11412	pInfo->info.aCustomRateCaps[i].OutputFrames = Rate.OutputFrames;
11413	pInfo->info.aCustomRateCaps[i].InputInterlaced = Rate.InputInterlaced;
11414	pInfo->info.aCustomRateCaps[i].InputFramesOrFields = Rate.InputFramesOrFields;
11415	}
11416	}
11417
11418	for (unsigned i = 0; i < VBSVGA3D_VP_MAX_FILTER_COUNT; ++i)
11419	{
11420	if (pInfo->info.Caps.FilterCaps & (1 << i))
11421	{
11422	D3D11_VIDEO_PROCESSOR_FILTER_RANGE Range;
11423	hr = pEnum->GetVideoProcessorFilterRange((D3D11_VIDEO_PROCESSOR_FILTER)i, &Range);
11424	if (SUCCEEDED(hr))
11425	{
11426	pInfo->info.aFilterRange[i].Minimum = Range.Minimum;
11427	pInfo->info.aFilterRange[i].Maximum = Range.Maximum;
11428	pInfo->info.aFilterRange[i].Default = Range.Default;
11429	pInfo->info.aFilterRange[i].Multiplier = Range.Multiplier;
11430	}
11431	}
11432	}
11433
11434	//DEBUG_BREAKPOINT_TEST();
11435	D3D_RELEASE(pEnum);
11436
11437	*pcbOut = sizeof(VBSVGA3dProcessorEnumInfo);
11438	return VINF_SUCCESS;
11439	}
11440
11441
11442	static DECLCALLBACK(int) vmsvga3dBackVBDXGetVideoCapability(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoCapability capability, void pvData, uint32 cbData, uint32 pcbOut)
11443	{
11444	RT_NOREF(pDXContext);
11445
11446	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11447	AssertReturn(pDXDevice->pVideoContext, VERR_INVALID_STATE);
11448
11449	switch (capability)
11450	{
11451	case VBSVGA3D_VIDEO_CAPABILITY_DECODE_PROFILE:
11452	return dxGetVideoCapDecodeProfile(pThisCC, pDXDevice, pvData, cbData, pcbOut);
11453	case VBSVGA3D_VIDEO_CAPABILITY_DECODE_CONFIG:
11454	return dxGetVideoCapDecodeConfig(pDXDevice, pvData, cbData, pcbOut);
11455	case VBSVGA3D_VIDEO_CAPABILITY_PROCESSOR_ENUM:
11456	return dxGetVideoCapProcessorEnum(pDXDevice, pvData, cbData, pcbOut);
11457	default:
11458	break;
11459	}
11460
11461	return VERR_NOT_SUPPORTED;
11462	}
11463
11464
11465	static DECLCALLBACK(int) vmsvga3dBackVBDXClearUAV(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dUAViewId viewId,
11466	SVGA3dRGBAFloat const pColor, uint32_t cRect, SVGASignedRect const paRect)
11467	{
11468	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11469	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
11470
11471	DXVIEW *pDXView;
11472	int rc = dxEnsureUnorderedAccessView(pThisCC, pDXContext, viewId, &pDXView);
11473	AssertRCReturn(rc, rc);
11474
11475	pDXDevice->pImmediateContext->ClearView(pDXView->u.pView, pColor->value, (D3D11_RECT *)paRect, cRect);
11476	return VINF_SUCCESS;
11477	}
11478
11479
11480	static DECLCALLBACK(int) vmsvga3dBackVBDXClearVDOV(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoDecoderOutputViewId viewId,
11481	SVGA3dRGBAFloat const pColor, uint32_t cRect, SVGASignedRect const paRect)
11482	{
11483	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11484	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
11485
11486	DXVIEW *pDXView;
11487	int rc = dxEnsureVideoDecoderOutputView(pThisCC, pDXContext, viewId, &pDXView);
11488	AssertRCReturn(rc, rc);
11489
11490	pDXDevice->pImmediateContext->ClearView(pDXView->u.pView, pColor->value, (D3D11_RECT *)paRect, cRect);
11491	return VINF_SUCCESS;
11492	}
11493
11494
11495	static DECLCALLBACK(int) vmsvga3dBackVBDXClearVPIV(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorInputViewId viewId,
11496	SVGA3dRGBAFloat const pColor, uint32_t cRect, SVGASignedRect const paRect)
11497	{
11498	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11499	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
11500
11501	DXVIEW *pDXView;
11502	int rc = dxEnsureVideoProcessorInputView(pThisCC, pDXContext, viewId, &pDXView);
11503	AssertRCReturn(rc, rc);
11504
11505	pDXDevice->pImmediateContext->ClearView(pDXView->u.pView, pColor->value, (D3D11_RECT *)paRect, cRect);
11506	return VINF_SUCCESS;
11507	}
11508
11509
11510	static DECLCALLBACK(int) vmsvga3dBackVBDXClearVPOV(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, VBSVGA3dVideoProcessorOutputViewId viewId,
11511	SVGA3dRGBAFloat const pColor, uint32_t cRect, SVGASignedRect const paRect)
11512	{
11513	DXDEVICE *pDXDevice = dxDeviceGet(pThisCC->svga.p3dState);
11514	AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
11515
11516	DXVIEW *pDXView;
11517	int rc = dxEnsureVideoProcessorOutputView(pThisCC, pDXContext, viewId, &pDXView);
11518	AssertRCReturn(rc, rc);
11519
11520	pDXDevice->pImmediateContext->ClearView(pDXView->u.pView, pColor->value, (D3D11_RECT *)paRect, cRect);
11521	return VINF_SUCCESS;
11522	}
11523
11524
11525	static DECLCALLBACK(int) vmsvga3dBackDXLoadState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PCPDMDEVHLPR3 pHlp, PSSMHANDLE pSSM)
11526	{
11527	RT_NOREF(pThisCC);
11528	uint32_t u32;
11529	int rc;
11530
11531	rc = pHlp->pfnSSMGetU32(pSSM, &u32);
11532	AssertLogRelRCReturn(rc, rc);
11533	AssertLogRelRCReturn(u32 == pDXContext->pBackendDXContext->cShader, VERR_INVALID_STATE);
11534
11535	for (uint32_t i = 0; i < pDXContext->pBackendDXContext->cShader; ++i)
11536	{
11537	DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[i];
11538
11539	rc = pHlp->pfnSSMGetU32(pSSM, &u32);
11540	AssertLogRelRCReturn(rc, rc);
11541	AssertLogRelReturn((SVGA3dShaderType)u32 == pDXShader->enmShaderType, VERR_INVALID_STATE);
11542
11543	if (pDXShader->enmShaderType == SVGA3D_SHADERTYPE_INVALID)
11544	continue;
11545
11546	pHlp->pfnSSMGetU32(pSSM, &pDXShader->soid);
11547
11548	pHlp->pfnSSMGetU32(pSSM, &u32);
11549	pDXShader->shaderInfo.enmProgramType = (VGPU10_PROGRAM_TYPE)u32;
11550
11551	rc = pHlp->pfnSSMGetU32(pSSM, &pDXShader->shaderInfo.cbBytecode);
11552	AssertLogRelRCReturn(rc, rc);
11553	AssertLogRelReturn(pDXShader->shaderInfo.cbBytecode <= 2 * SVGA3D_MAX_SHADER_MEMORY_BYTES, VERR_INVALID_STATE);
11554
11555	if (pDXShader->shaderInfo.cbBytecode)
11556	{
11557	pDXShader->shaderInfo.pvBytecode = RTMemAlloc(pDXShader->shaderInfo.cbBytecode);
11558	AssertPtrReturn(pDXShader->shaderInfo.pvBytecode, VERR_NO_MEMORY);
11559	pHlp->pfnSSMGetMem(pSSM, pDXShader->shaderInfo.pvBytecode, pDXShader->shaderInfo.cbBytecode);
11560	}
11561
11562	rc = pHlp->pfnSSMGetU32(pSSM, &pDXShader->shaderInfo.cInputSignature);
11563	AssertLogRelRCReturn(rc, rc);
11564	AssertLogRelReturn(pDXShader->shaderInfo.cInputSignature <= 32, VERR_INVALID_STATE);
11565	if (pDXShader->shaderInfo.cInputSignature)
11566	pHlp->pfnSSMGetMem(pSSM, pDXShader->shaderInfo.aInputSignature, pDXShader->shaderInfo.cInputSignature * sizeof(SVGA3dDXSignatureEntry));
11567
11568	rc = pHlp->pfnSSMGetU32(pSSM, &pDXShader->shaderInfo.cOutputSignature);
11569	AssertLogRelRCReturn(rc, rc);
11570	AssertLogRelReturn(pDXShader->shaderInfo.cOutputSignature <= 32, VERR_INVALID_STATE);
11571	if (pDXShader->shaderInfo.cOutputSignature)
11572	pHlp->pfnSSMGetMem(pSSM, pDXShader->shaderInfo.aOutputSignature, pDXShader->shaderInfo.cOutputSignature * sizeof(SVGA3dDXSignatureEntry));
11573
11574	rc = pHlp->pfnSSMGetU32(pSSM, &pDXShader->shaderInfo.cPatchConstantSignature);
11575	AssertLogRelRCReturn(rc, rc);
11576	AssertLogRelReturn(pDXShader->shaderInfo.cPatchConstantSignature <= 32, VERR_INVALID_STATE);
11577	if (pDXShader->shaderInfo.cPatchConstantSignature)
11578	pHlp->pfnSSMGetMem(pSSM, pDXShader->shaderInfo.aPatchConstantSignature, pDXShader->shaderInfo.cPatchConstantSignature * sizeof(SVGA3dDXSignatureEntry));
11579
11580	rc = pHlp->pfnSSMGetU32(pSSM, &pDXShader->shaderInfo.cDclResource);
11581	AssertLogRelRCReturn(rc, rc);
11582	AssertLogRelReturn(pDXShader->shaderInfo.cDclResource <= SVGA3D_DX_MAX_SRVIEWS, VERR_INVALID_STATE);
11583	if (pDXShader->shaderInfo.cDclResource)
11584	pHlp->pfnSSMGetMem(pSSM, pDXShader->shaderInfo.aOffDclResource, pDXShader->shaderInfo.cDclResource * sizeof(uint32_t));
11585
11586	DXShaderGenerateSemantics(&pDXShader->shaderInfo);
11587	}
11588
11589	rc = pHlp->pfnSSMGetU32(pSSM, &pDXContext->pBackendDXContext->cSOTarget);
11590	AssertLogRelRCReturn(rc, rc);
11591
11592	return VINF_SUCCESS;
11593	}
11594
11595
11596	static DECLCALLBACK(int) vmsvga3dBackDXSaveState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PCPDMDEVHLPR3 pHlp, PSSMHANDLE pSSM)
11597	{
11598	RT_NOREF(pThisCC);
11599	int rc;
11600
11601	pHlp->pfnSSMPutU32(pSSM, pDXContext->pBackendDXContext->cShader);
11602	for (uint32_t i = 0; i < pDXContext->pBackendDXContext->cShader; ++i)
11603	{
11604	DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[i];
11605
11606	pHlp->pfnSSMPutU32(pSSM, (uint32_t)pDXShader->enmShaderType);
11607	if (pDXShader->enmShaderType == SVGA3D_SHADERTYPE_INVALID)
11608	continue;
11609
11610	pHlp->pfnSSMPutU32(pSSM, pDXShader->soid);
11611
11612	pHlp->pfnSSMPutU32(pSSM, (uint32_t)pDXShader->shaderInfo.enmProgramType);
11613
11614	pHlp->pfnSSMPutU32(pSSM, pDXShader->shaderInfo.cbBytecode);
11615	if (pDXShader->shaderInfo.cbBytecode)
11616	pHlp->pfnSSMPutMem(pSSM, pDXShader->shaderInfo.pvBytecode, pDXShader->shaderInfo.cbBytecode);
11617
11618	pHlp->pfnSSMPutU32(pSSM, pDXShader->shaderInfo.cInputSignature);
11619	if (pDXShader->shaderInfo.cInputSignature)
11620	pHlp->pfnSSMPutMem(pSSM, pDXShader->shaderInfo.aInputSignature, pDXShader->shaderInfo.cInputSignature * sizeof(SVGA3dDXSignatureEntry));
11621
11622	pHlp->pfnSSMPutU32(pSSM, pDXShader->shaderInfo.cOutputSignature);
11623	if (pDXShader->shaderInfo.cOutputSignature)
11624	pHlp->pfnSSMPutMem(pSSM, pDXShader->shaderInfo.aOutputSignature, pDXShader->shaderInfo.cOutputSignature * sizeof(SVGA3dDXSignatureEntry));
11625
11626	pHlp->pfnSSMPutU32(pSSM, pDXShader->shaderInfo.cPatchConstantSignature);
11627	if (pDXShader->shaderInfo.cPatchConstantSignature)
11628	pHlp->pfnSSMPutMem(pSSM, pDXShader->shaderInfo.aPatchConstantSignature, pDXShader->shaderInfo.cPatchConstantSignature * sizeof(SVGA3dDXSignatureEntry));
11629
11630	pHlp->pfnSSMPutU32(pSSM, pDXShader->shaderInfo.cDclResource);
11631	if (pDXShader->shaderInfo.cDclResource)
11632	pHlp->pfnSSMPutMem(pSSM, pDXShader->shaderInfo.aOffDclResource, pDXShader->shaderInfo.cDclResource * sizeof(uint32_t));
11633	}
11634	rc = pHlp->pfnSSMPutU32(pSSM, pDXContext->pBackendDXContext->cSOTarget);
11635	AssertLogRelRCReturn(rc, rc);
11636
11637	return VINF_SUCCESS;
11638	}
11639
11640
11641	static DECLCALLBACK(int) vmsvga3dBackQueryInterface(PVGASTATECC pThisCC, char const pszInterfaceName, void pvInterfaceFuncs, size_t cbInterfaceFuncs)
11642	{
11643	RT_NOREF(pThisCC);
11644
11645	int rc = VINF_SUCCESS;
11646	if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_DX) == 0)
11647	{
11648	if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSDX))
11649	{
11650	if (pvInterfaceFuncs)
11651	{
11652	VMSVGA3DBACKENDFUNCSDX p = (VMSVGA3DBACKENDFUNCSDX )pvInterfaceFuncs;
11653	p->pfnDXSaveState = vmsvga3dBackDXSaveState;
11654	p->pfnDXLoadState = vmsvga3dBackDXLoadState;
11655	p->pfnDXDefineContext = vmsvga3dBackDXDefineContext;
11656	p->pfnDXDestroyContext = vmsvga3dBackDXDestroyContext;
11657	p->pfnDXBindContext = vmsvga3dBackDXBindContext;
11658	p->pfnDXSwitchContext = vmsvga3dBackDXSwitchContext;
11659	p->pfnDXReadbackContext = vmsvga3dBackDXReadbackContext;
11660	p->pfnDXInvalidateContext = vmsvga3dBackDXInvalidateContext;
11661	p->pfnDXSetSingleConstantBuffer = vmsvga3dBackDXSetSingleConstantBuffer;
11662	p->pfnDXSetShaderResources = vmsvga3dBackDXSetShaderResources;
11663	p->pfnDXSetShader = vmsvga3dBackDXSetShader;
11664	p->pfnDXSetSamplers = vmsvga3dBackDXSetSamplers;
11665	p->pfnDXDraw = vmsvga3dBackDXDraw;
11666	p->pfnDXDrawIndexed = vmsvga3dBackDXDrawIndexed;
11667	p->pfnDXDrawInstanced = vmsvga3dBackDXDrawInstanced;
11668	p->pfnDXDrawIndexedInstanced = vmsvga3dBackDXDrawIndexedInstanced;
11669	p->pfnDXDrawAuto = vmsvga3dBackDXDrawAuto;
11670	p->pfnDXSetInputLayout = vmsvga3dBackDXSetInputLayout;
11671	p->pfnDXSetVertexBuffers = vmsvga3dBackDXSetVertexBuffers;
11672	p->pfnDXSetIndexBuffer = vmsvga3dBackDXSetIndexBuffer;
11673	p->pfnDXSetTopology = vmsvga3dBackDXSetTopology;
11674	p->pfnDXSetRenderTargets = vmsvga3dBackDXSetRenderTargets;
11675	p->pfnDXSetBlendState = vmsvga3dBackDXSetBlendState;
11676	p->pfnDXSetDepthStencilState = vmsvga3dBackDXSetDepthStencilState;
11677	p->pfnDXSetRasterizerState = vmsvga3dBackDXSetRasterizerState;
11678	p->pfnDXDefineQuery = vmsvga3dBackDXDefineQuery;
11679	p->pfnDXDestroyQuery = vmsvga3dBackDXDestroyQuery;
11680	p->pfnDXBeginQuery = vmsvga3dBackDXBeginQuery;
11681	p->pfnDXEndQuery = vmsvga3dBackDXEndQuery;
11682	p->pfnDXSetPredication = vmsvga3dBackDXSetPredication;
11683	p->pfnDXSetSOTargets = vmsvga3dBackDXSetSOTargets;
11684	p->pfnDXSetViewports = vmsvga3dBackDXSetViewports;
11685	p->pfnDXSetScissorRects = vmsvga3dBackDXSetScissorRects;
11686	p->pfnDXClearRenderTargetView = vmsvga3dBackDXClearRenderTargetView;
11687	p->pfnDXClearDepthStencilView = vmsvga3dBackDXClearDepthStencilView;
11688	p->pfnDXPredCopyRegion = vmsvga3dBackDXPredCopyRegion;
11689	p->pfnDXPredCopy = vmsvga3dBackDXPredCopy;
11690	p->pfnDXPresentBlt = vmsvga3dBackDXPresentBlt;
11691	p->pfnDXGenMips = vmsvga3dBackDXGenMips;
11692	p->pfnDXDefineShaderResourceView = vmsvga3dBackDXDefineShaderResourceView;
11693	p->pfnDXDestroyShaderResourceView = vmsvga3dBackDXDestroyShaderResourceView;
11694	p->pfnDXDefineRenderTargetView = vmsvga3dBackDXDefineRenderTargetView;
11695	p->pfnDXDestroyRenderTargetView = vmsvga3dBackDXDestroyRenderTargetView;
11696	p->pfnDXDefineDepthStencilView = vmsvga3dBackDXDefineDepthStencilView;
11697	p->pfnDXDestroyDepthStencilView = vmsvga3dBackDXDestroyDepthStencilView;
11698	p->pfnDXDefineElementLayout = vmsvga3dBackDXDefineElementLayout;
11699	p->pfnDXDestroyElementLayout = vmsvga3dBackDXDestroyElementLayout;
11700	p->pfnDXDefineBlendState = vmsvga3dBackDXDefineBlendState;
11701	p->pfnDXDestroyBlendState = vmsvga3dBackDXDestroyBlendState;
11702	p->pfnDXDefineDepthStencilState = vmsvga3dBackDXDefineDepthStencilState;
11703	p->pfnDXDestroyDepthStencilState = vmsvga3dBackDXDestroyDepthStencilState;
11704	p->pfnDXDefineRasterizerState = vmsvga3dBackDXDefineRasterizerState;
11705	p->pfnDXDestroyRasterizerState = vmsvga3dBackDXDestroyRasterizerState;
11706	p->pfnDXDefineSamplerState = vmsvga3dBackDXDefineSamplerState;
11707	p->pfnDXDestroySamplerState = vmsvga3dBackDXDestroySamplerState;
11708	p->pfnDXDefineShader = vmsvga3dBackDXDefineShader;
11709	p->pfnDXDestroyShader = vmsvga3dBackDXDestroyShader;
11710	p->pfnDXBindShader = vmsvga3dBackDXBindShader;
11711	p->pfnDXDefineStreamOutput = vmsvga3dBackDXDefineStreamOutput;
11712	p->pfnDXDestroyStreamOutput = vmsvga3dBackDXDestroyStreamOutput;
11713	p->pfnDXSetStreamOutput = vmsvga3dBackDXSetStreamOutput;
11714	p->pfnDXSetCOTable = vmsvga3dBackDXSetCOTable;
11715	p->pfnDXBufferCopy = vmsvga3dBackDXBufferCopy;
11716	p->pfnDXSurfaceCopyAndReadback = vmsvga3dBackDXSurfaceCopyAndReadback;
11717	p->pfnDXMoveQuery = vmsvga3dBackDXMoveQuery;
11718	p->pfnDXBindAllShader = vmsvga3dBackDXBindAllShader;
11719	p->pfnDXHint = vmsvga3dBackDXHint;
11720	p->pfnDXBufferUpdate = vmsvga3dBackDXBufferUpdate;
11721	p->pfnDXCondBindAllShader = vmsvga3dBackDXCondBindAllShader;
11722	p->pfnScreenCopy = vmsvga3dBackScreenCopy;
11723	p->pfnIntraSurfaceCopy = vmsvga3dBackIntraSurfaceCopy;
11724	p->pfnDXResolveCopy = vmsvga3dBackDXResolveCopy;
11725	p->pfnDXPredResolveCopy = vmsvga3dBackDXPredResolveCopy;
11726	p->pfnDXPredConvertRegion = vmsvga3dBackDXPredConvertRegion;
11727	p->pfnDXPredConvert = vmsvga3dBackDXPredConvert;
11728	p->pfnWholeSurfaceCopy = vmsvga3dBackWholeSurfaceCopy;
11729	p->pfnDXDefineUAView = vmsvga3dBackDXDefineUAView;
11730	p->pfnDXDestroyUAView = vmsvga3dBackDXDestroyUAView;
11731	p->pfnDXClearUAViewUint = vmsvga3dBackDXClearUAViewUint;
11732	p->pfnDXClearUAViewFloat = vmsvga3dBackDXClearUAViewFloat;
11733	p->pfnDXCopyStructureCount = vmsvga3dBackDXCopyStructureCount;
11734	p->pfnDXSetUAViews = vmsvga3dBackDXSetUAViews;
11735	p->pfnDXDrawIndexedInstancedIndirect = vmsvga3dBackDXDrawIndexedInstancedIndirect;
11736	p->pfnDXDrawInstancedIndirect = vmsvga3dBackDXDrawInstancedIndirect;
11737	p->pfnDXDispatch = vmsvga3dBackDXDispatch;
11738	p->pfnDXDispatchIndirect = vmsvga3dBackDXDispatchIndirect;
11739	p->pfnWriteZeroSurface = vmsvga3dBackWriteZeroSurface;
11740	p->pfnHintZeroSurface = vmsvga3dBackHintZeroSurface;
11741	p->pfnDXTransferToBuffer = vmsvga3dBackDXTransferToBuffer;
11742	p->pfnLogicOpsBitBlt = vmsvga3dBackLogicOpsBitBlt;
11743	p->pfnLogicOpsTransBlt = vmsvga3dBackLogicOpsTransBlt;
11744	p->pfnLogicOpsStretchBlt = vmsvga3dBackLogicOpsStretchBlt;
11745	p->pfnLogicOpsColorFill = vmsvga3dBackLogicOpsColorFill;
11746	p->pfnLogicOpsAlphaBlend = vmsvga3dBackLogicOpsAlphaBlend;
11747	p->pfnLogicOpsClearTypeBlend = vmsvga3dBackLogicOpsClearTypeBlend;
11748	p->pfnDXSetCSUAViews = vmsvga3dBackDXSetCSUAViews;
11749	p->pfnDXSetMinLOD = vmsvga3dBackDXSetMinLOD;
11750	p->pfnDXSetShaderIface = vmsvga3dBackDXSetShaderIface;
11751	p->pfnSurfaceStretchBltNonMSToMS = vmsvga3dBackSurfaceStretchBltNonMSToMS;
11752	p->pfnDXBindShaderIface = vmsvga3dBackDXBindShaderIface;
11753	p->pfnVBDXClearRenderTargetViewRegion = vmsvga3dBackVBDXClearRenderTargetViewRegion;
11754	p->pfnVBDXClearUAV = vmsvga3dBackVBDXClearUAV;
11755	}
11756	}
11757	else
11758	{
11759	AssertFailed();
11760	rc = VERR_INVALID_PARAMETER;
11761	}
11762	}
11763	else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_DXVIDEO) == 0)
11764	{
11765	if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSDXVIDEO))
11766	{
11767	if (pvInterfaceFuncs)
11768	{
11769	VMSVGA3DBACKENDFUNCSDXVIDEO p = (VMSVGA3DBACKENDFUNCSDXVIDEO )pvInterfaceFuncs;
11770	p->pfnVBDXDefineVideoProcessor = vmsvga3dBackVBDXDefineVideoProcessor;
11771	p->pfnVBDXDefineVideoDecoderOutputView = vmsvga3dBackVBDXDefineVideoDecoderOutputView;
11772	p->pfnVBDXDefineVideoDecoder = vmsvga3dBackVBDXDefineVideoDecoder;
11773	p->pfnVBDXVideoDecoderBeginFrame = vmsvga3dBackVBDXVideoDecoderBeginFrame;
11774	p->pfnVBDXVideoDecoderSubmitBuffers = vmsvga3dBackVBDXVideoDecoderSubmitBuffers;
11775	p->pfnVBDXVideoDecoderEndFrame = vmsvga3dBackVBDXVideoDecoderEndFrame;
11776	p->pfnVBDXDefineVideoProcessorInputView = vmsvga3dBackVBDXDefineVideoProcessorInputView;
11777	p->pfnVBDXDefineVideoProcessorOutputView = vmsvga3dBackVBDXDefineVideoProcessorOutputView;
11778	p->pfnVBDXVideoProcessorBlt = vmsvga3dBackVBDXVideoProcessorBlt;
11779	p->pfnVBDXDestroyVideoDecoder = vmsvga3dBackVBDXDestroyVideoDecoder;
11780	p->pfnVBDXDestroyVideoDecoderOutputView = vmsvga3dBackVBDXDestroyVideoDecoderOutputView;
11781	p->pfnVBDXDestroyVideoProcessor = vmsvga3dBackVBDXDestroyVideoProcessor;
11782	p->pfnVBDXDestroyVideoProcessorInputView = vmsvga3dBackVBDXDestroyVideoProcessorInputView;
11783	p->pfnVBDXDestroyVideoProcessorOutputView = vmsvga3dBackVBDXDestroyVideoProcessorOutputView;
11784	p->pfnVBDXVideoProcessorSetOutputTargetRect = vmsvga3dBackVBDXVideoProcessorSetOutputTargetRect;
11785	p->pfnVBDXVideoProcessorSetOutputBackgroundColor = vmsvga3dBackVBDXVideoProcessorSetOutputBackgroundColor;
11786	p->pfnVBDXVideoProcessorSetOutputColorSpace = vmsvga3dBackVBDXVideoProcessorSetOutputColorSpace;
11787	p->pfnVBDXVideoProcessorSetOutputAlphaFillMode = vmsvga3dBackVBDXVideoProcessorSetOutputAlphaFillMode;
11788	p->pfnVBDXVideoProcessorSetOutputConstriction = vmsvga3dBackVBDXVideoProcessorSetOutputConstriction;
11789	p->pfnVBDXVideoProcessorSetOutputStereoMode = vmsvga3dBackVBDXVideoProcessorSetOutputStereoMode;
11790	p->pfnVBDXVideoProcessorSetStreamFrameFormat = vmsvga3dBackVBDXVideoProcessorSetStreamFrameFormat;
11791	p->pfnVBDXVideoProcessorSetStreamColorSpace = vmsvga3dBackVBDXVideoProcessorSetStreamColorSpace;
11792	p->pfnVBDXVideoProcessorSetStreamOutputRate = vmsvga3dBackVBDXVideoProcessorSetStreamOutputRate;
11793	p->pfnVBDXVideoProcessorSetStreamSourceRect = vmsvga3dBackVBDXVideoProcessorSetStreamSourceRect;
11794	p->pfnVBDXVideoProcessorSetStreamDestRect = vmsvga3dBackVBDXVideoProcessorSetStreamDestRect;
11795	p->pfnVBDXVideoProcessorSetStreamAlpha = vmsvga3dBackVBDXVideoProcessorSetStreamAlpha;
11796	p->pfnVBDXVideoProcessorSetStreamPalette = vmsvga3dBackVBDXVideoProcessorSetStreamPalette;
11797	p->pfnVBDXVideoProcessorSetStreamPixelAspectRatio = vmsvga3dBackVBDXVideoProcessorSetStreamPixelAspectRatio;
11798	p->pfnVBDXVideoProcessorSetStreamLumaKey = vmsvga3dBackVBDXVideoProcessorSetStreamLumaKey;
11799	p->pfnVBDXVideoProcessorSetStreamStereoFormat = vmsvga3dBackVBDXVideoProcessorSetStreamStereoFormat;
11800	p->pfnVBDXVideoProcessorSetStreamAutoProcessingMode = vmsvga3dBackVBDXVideoProcessorSetStreamAutoProcessingMode;
11801	p->pfnVBDXVideoProcessorSetStreamFilter = vmsvga3dBackVBDXVideoProcessorSetStreamFilter;
11802	p->pfnVBDXVideoProcessorSetStreamRotation = vmsvga3dBackVBDXVideoProcessorSetStreamRotation;
11803	p->pfnVBDXGetVideoCapability = vmsvga3dBackVBDXGetVideoCapability;
11804	p->pfnVBDXClearVDOV = vmsvga3dBackVBDXClearVDOV;
11805	p->pfnVBDXClearVPIV = vmsvga3dBackVBDXClearVPIV;
11806	p->pfnVBDXClearVPOV = vmsvga3dBackVBDXClearVPOV;
11807	}
11808	}
11809	else
11810	{
11811	AssertFailed();
11812	rc = VERR_INVALID_PARAMETER;
11813	}
11814	}
11815	else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_MAP) == 0)
11816	{
11817	if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSMAP))
11818	{
11819	if (pvInterfaceFuncs)
11820	{
11821	VMSVGA3DBACKENDFUNCSMAP p = (VMSVGA3DBACKENDFUNCSMAP )pvInterfaceFuncs;
11822	p->pfnSurfaceMap = vmsvga3dBackSurfaceMap;
11823	p->pfnSurfaceUnmap = vmsvga3dBackSurfaceUnmap;
11824	}
11825	}
11826	else
11827	{
11828	AssertFailed();
11829	rc = VERR_INVALID_PARAMETER;
11830	}
11831	}
11832	else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_GBO) == 0)
11833	{
11834	if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSGBO))
11835	{
11836	if (pvInterfaceFuncs)
11837	{
11838	VMSVGA3DBACKENDFUNCSGBO p = (VMSVGA3DBACKENDFUNCSGBO )pvInterfaceFuncs;
11839	p->pfnScreenTargetBind = vmsvga3dScreenTargetBind;
11840	p->pfnScreenTargetUpdate = vmsvga3dScreenTargetUpdate;
11841	}
11842	}
11843	else
11844	{
11845	AssertFailed();
11846	rc = VERR_INVALID_PARAMETER;
11847	}
11848	}
11849	else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_3D) == 0)
11850	{
11851	if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCS3D))
11852	{
11853	if (pvInterfaceFuncs)
11854	{
11855	VMSVGA3DBACKENDFUNCS3D p = (VMSVGA3DBACKENDFUNCS3D )pvInterfaceFuncs;
11856	p->pfnInit = vmsvga3dBackInit;
11857	p->pfnPowerOn = vmsvga3dBackPowerOn;
11858	p->pfnTerminate = vmsvga3dBackTerminate;
11859	p->pfnReset = vmsvga3dBackReset;
11860	p->pfnQueryCaps = vmsvga3dBackQueryCaps;
11861	p->pfnChangeMode = vmsvga3dBackChangeMode;
11862	p->pfnCreateTexture = vmsvga3dBackCreateTexture;
11863	p->pfnSurfaceDestroy = vmsvga3dBackSurfaceDestroy;
11864	p->pfnSurfaceInvalidateImage = vmsvga3dBackSurfaceInvalidateImage;
11865	p->pfnSurfaceCopy = vmsvga3dBackSurfaceCopy;
11866	p->pfnSurfaceDMACopyBox = vmsvga3dBackSurfaceDMACopyBox;
11867	p->pfnSurfaceStretchBlt = vmsvga3dBackSurfaceStretchBlt;
11868	p->pfnUpdateHostScreenViewport = vmsvga3dBackUpdateHostScreenViewport;
11869	p->pfnDefineScreen = vmsvga3dBackDefineScreen;
11870	p->pfnDestroyScreen = vmsvga3dBackDestroyScreen;
11871	p->pfnSurfaceBlitToScreen = vmsvga3dBackSurfaceBlitToScreen;
11872	p->pfnSurfaceUpdateHeapBuffers = vmsvga3dBackSurfaceUpdateHeapBuffers;
11873	}
11874	}
11875	else
11876	{
11877	AssertFailed();
11878	rc = VERR_INVALID_PARAMETER;
11879	}
11880	}
11881	else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_VGPU9) == 0)
11882	{
11883	if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSVGPU9))
11884	{
11885	if (pvInterfaceFuncs)
11886	{
11887	VMSVGA3DBACKENDFUNCSVGPU9 p = (VMSVGA3DBACKENDFUNCSVGPU9 )pvInterfaceFuncs;
11888	p->pfnContextDefine = vmsvga3dBackContextDefine;
11889	p->pfnContextDestroy = vmsvga3dBackContextDestroy;
11890	p->pfnSetTransform = vmsvga3dBackSetTransform;
11891	p->pfnSetZRange = vmsvga3dBackSetZRange;
11892	p->pfnSetRenderState = vmsvga3dBackSetRenderState;
11893	p->pfnSetRenderTarget = vmsvga3dBackSetRenderTarget;
11894	p->pfnSetTextureState = vmsvga3dBackSetTextureState;
11895	p->pfnSetMaterial = vmsvga3dBackSetMaterial;
11896	p->pfnSetLightData = vmsvga3dBackSetLightData;
11897	p->pfnSetLightEnabled = vmsvga3dBackSetLightEnabled;
11898	p->pfnSetViewPort = vmsvga3dBackSetViewPort;
11899	p->pfnSetClipPlane = vmsvga3dBackSetClipPlane;
11900	p->pfnCommandClear = vmsvga3dBackCommandClear;
11901	p->pfnDrawPrimitives = vmsvga3dBackDrawPrimitives;
11902	p->pfnSetScissorRect = vmsvga3dBackSetScissorRect;
11903	p->pfnGenerateMipmaps = vmsvga3dBackGenerateMipmaps;
11904	p->pfnShaderDefine = vmsvga3dBackShaderDefine;
11905	p->pfnShaderDestroy = vmsvga3dBackShaderDestroy;
11906	p->pfnShaderSet = vmsvga3dBackShaderSet;
11907	p->pfnShaderSetConst = vmsvga3dBackShaderSetConst;
11908	p->pfnOcclusionQueryCreate = vmsvga3dBackOcclusionQueryCreate;
11909	p->pfnOcclusionQueryDelete = vmsvga3dBackOcclusionQueryDelete;
11910	p->pfnOcclusionQueryBegin = vmsvga3dBackOcclusionQueryBegin;
11911	p->pfnOcclusionQueryEnd = vmsvga3dBackOcclusionQueryEnd;
11912	p->pfnOcclusionQueryGetData = vmsvga3dBackOcclusionQueryGetData;
11913	}
11914	}
11915	else
11916	{
11917	AssertFailed();
11918	rc = VERR_INVALID_PARAMETER;
11919	}
11920	}
11921	else
11922	rc = VERR_NOT_IMPLEMENTED;
11923	return rc;
11924	}
11925
11926
11927	extern VMSVGA3DBACKENDDESC const g_BackendDX =
11928	{
11929	"DX",
11930	vmsvga3dBackQueryInterface
11931	};

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source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-dx-dx11.cpp@ 105681

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