VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-dx.cpp@ 88798

Last change on this file since 88798 was 88786, checked in by vboxsync, 4 years ago

Devices/Graphics: new files for DX commands. bugref:9830

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1/* $Id: DevVGA-SVGA3d-dx.cpp 88786 2021-04-29 15:33:55Z vboxsync $ */
2/** @file
3 * DevSVGA3d - VMWare SVGA device, 3D parts - Common code for DX backend interface.
4 */
5
6/*
7 * Copyright (C) 2020-2021 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
23#include <VBox/AssertGuest.h>
24#include <iprt/errcore.h>
25#include <VBox/log.h>
26#include <VBox/vmm/pdmdev.h>
27
28#include <iprt/assert.h>
29#include <iprt/mem.h>
30
31#include <VBoxVideo.h> /* required by DevVGA.h */
32
33/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
34#include "DevVGA.h"
35
36#include "DevVGA-SVGA.h"
37#include "DevVGA-SVGA3d.h"
38#include "DevVGA-SVGA3d-internal.h"
39#include "DevVGA-SVGA-internal.h"
40
41
42int vmsvga3dDXUnbindContext(PVGASTATECC pThisCC, uint32_t cid, SVGADXContextMobFormat *pSvgaDXContext)
43{
44 int rc;
45 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
46 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindContext, VERR_INVALID_STATE);
47 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
48 AssertReturn(p3dState, VERR_INVALID_STATE);
49
50 PVMSVGA3DDXCONTEXT pDXContext;
51 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
52 AssertRCReturn(rc, rc);
53
54 /* Copy the host structure back to the guest memory. */
55 memcpy(pSvgaDXContext, &pDXContext->svgaDXContext, sizeof(*pSvgaDXContext));
56
57 return rc;
58}
59
60
61/**
62 * Create a new 3D DX context.
63 *
64 * @returns VBox status code.
65 * @param pThisCC The VGA/VMSVGA state for ring-3.
66 * @param cid Context id to be created.
67 */
68int vmsvga3dDXDefineContext(PVGASTATECC pThisCC, uint32_t cid)
69{
70 int rc;
71 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
72 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineContext, VERR_INVALID_STATE);
73 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
74 AssertReturn(p3dState, VERR_INVALID_STATE);
75
76 PVMSVGA3DDXCONTEXT pDXContext;
77
78 LogFunc(("cid %d\n", cid));
79
80 AssertReturn(cid < SVGA3D_MAX_CONTEXT_IDS, VERR_INVALID_PARAMETER);
81
82 if (cid >= p3dState->cDXContexts)
83 {
84 /* Grow the array. */
85 uint32_t cNew = RT_ALIGN(cid + 15, 16);
86 void *pvNew = RTMemRealloc(p3dState->papDXContexts, sizeof(p3dState->papDXContexts[0]) * cNew);
87 AssertReturn(pvNew, VERR_NO_MEMORY);
88 p3dState->papDXContexts = (PVMSVGA3DDXCONTEXT *)pvNew;
89 while (p3dState->cDXContexts < cNew)
90 {
91 pDXContext = (PVMSVGA3DDXCONTEXT)RTMemAllocZ(sizeof(*pDXContext));
92 AssertReturn(pDXContext, VERR_NO_MEMORY);
93 pDXContext->cid = SVGA3D_INVALID_ID;
94 p3dState->papDXContexts[p3dState->cDXContexts++] = pDXContext;
95 }
96 }
97 /* If one already exists with this id, then destroy it now. */
98 if (p3dState->papDXContexts[cid]->cid != SVGA3D_INVALID_ID)
99 vmsvga3dDXDestroyContext(pThisCC, cid);
100
101 pDXContext = p3dState->papDXContexts[cid];
102 memset(pDXContext, 0, sizeof(*pDXContext));
103 pDXContext->cid = cid;
104
105 /* Init the backend specific data. */
106 rc = pSvgaR3State->pFuncsDX->pfnDXDefineContext(pThisCC, pDXContext);
107
108 /* Cleanup on failure. */
109 if (RT_FAILURE(rc))
110 vmsvga3dDXDestroyContext(pThisCC, cid);
111
112 return rc;
113}
114
115
116int vmsvga3dDXDestroyContext(PVGASTATECC pThisCC, uint32_t cid)
117{
118 int rc;
119 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
120 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyContext, VERR_INVALID_STATE);
121 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
122 AssertReturn(p3dState, VERR_INVALID_STATE);
123
124 PVMSVGA3DDXCONTEXT pDXContext;
125 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
126 AssertRCReturn(rc, rc);
127
128 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyContext(pThisCC, pDXContext);
129 return rc;
130}
131
132
133int vmsvga3dDXBindContext(PVGASTATECC pThisCC, uint32_t cid, SVGADXContextMobFormat *pSvgaDXContext)
134{
135 int rc;
136 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
137 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindContext, VERR_INVALID_STATE);
138 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
139 AssertReturn(p3dState, VERR_INVALID_STATE);
140
141 PVMSVGA3DDXCONTEXT pDXContext;
142 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
143 AssertRCReturn(rc, rc);
144
145 if (pSvgaDXContext)
146 memcpy(&pDXContext->svgaDXContext, pSvgaDXContext, sizeof(*pSvgaDXContext));
147
148 rc = pSvgaR3State->pFuncsDX->pfnDXBindContext(pThisCC, pDXContext);
149 return rc;
150}
151
152
153int vmsvga3dDXReadbackContext(PVGASTATECC pThisCC, uint32_t idDXContext)
154{
155 int rc;
156 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
157 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXReadbackContext, VERR_INVALID_STATE);
158 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
159 AssertReturn(p3dState, VERR_INVALID_STATE);
160
161 PVMSVGA3DDXCONTEXT pDXContext;
162 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
163 AssertRCReturn(rc, rc);
164
165 rc = pSvgaR3State->pFuncsDX->pfnDXReadbackContext(pThisCC, pDXContext);
166 return rc;
167}
168
169
170int vmsvga3dDXInvalidateContext(PVGASTATECC pThisCC, uint32_t idDXContext)
171{
172 int rc;
173 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
174 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXInvalidateContext, VERR_INVALID_STATE);
175 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
176 AssertReturn(p3dState, VERR_INVALID_STATE);
177
178 PVMSVGA3DDXCONTEXT pDXContext;
179 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
180 AssertRCReturn(rc, rc);
181
182 rc = pSvgaR3State->pFuncsDX->pfnDXInvalidateContext(pThisCC, pDXContext);
183 return rc;
184}
185
186
187int vmsvga3dDXSetSingleConstantBuffer(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetSingleConstantBuffer const *pCmd)
188{
189 int rc;
190 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
191 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetSingleConstantBuffer, VERR_INVALID_STATE);
192 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
193 AssertReturn(p3dState, VERR_INVALID_STATE);
194
195 PVMSVGA3DDXCONTEXT pDXContext;
196 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
197 AssertRCReturn(rc, rc);
198
199 ASSERT_GUEST_RETURN(pCmd->slot < SVGA3D_DX_MAX_CONSTBUFFERS, VERR_INVALID_PARAMETER);
200 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
201 RT_UNTRUSTED_VALIDATED_FENCE();
202
203 rc = pSvgaR3State->pFuncsDX->pfnDXSetSingleConstantBuffer(pThisCC, pDXContext, pCmd->slot, pCmd->type, pCmd->sid, pCmd->offsetInBytes, pCmd->sizeInBytes);
204 return rc;
205}
206
207
208int vmsvga3dDXSetShaderResources(PVGASTATECC pThisCC, uint32_t idDXContext)
209{
210 int rc;
211 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
212 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetShaderResources, VERR_INVALID_STATE);
213 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
214 AssertReturn(p3dState, VERR_INVALID_STATE);
215
216 PVMSVGA3DDXCONTEXT pDXContext;
217 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
218 AssertRCReturn(rc, rc);
219
220 rc = pSvgaR3State->pFuncsDX->pfnDXSetShaderResources(pThisCC, pDXContext);
221 return rc;
222}
223
224
225int vmsvga3dDXSetShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetShader const *pCmd)
226{
227 int rc;
228 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
229 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetShader, VERR_INVALID_STATE);
230 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
231 AssertReturn(p3dState, VERR_INVALID_STATE);
232
233 PVMSVGA3DDXCONTEXT pDXContext;
234 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
235 AssertRCReturn(rc, rc);
236
237 ASSERT_GUEST_RETURN(pCmd->shaderId < pDXContext->cot.cShader, VERR_INVALID_PARAMETER);
238 RT_UNTRUSTED_VALIDATED_FENCE();
239
240 SVGACOTableDXShaderEntry *pEntry = &pDXContext->cot.paShader[pCmd->shaderId];
241 ASSERT_GUEST_RETURN(pEntry->type == pCmd->type, VERR_INVALID_PARAMETER);
242 RT_UNTRUSTED_VALIDATED_FENCE();
243
244 PVMSVGA3DSHADER pShader = &pDXContext->paShader[pCmd->shaderId];
245 rc = pSvgaR3State->pFuncsDX->pfnDXSetShader(pThisCC, pDXContext, pShader);
246 return rc;
247}
248
249
250int vmsvga3dDXSetSamplers(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t startSampler, SVGA3dShaderType type, uint32_t cSamplerId, SVGA3dSamplerId const *paSamplerId)
251{
252 int rc;
253 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
254 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetSamplers, VERR_INVALID_STATE);
255 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
256 AssertReturn(p3dState, VERR_INVALID_STATE);
257
258 PVMSVGA3DDXCONTEXT pDXContext;
259 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
260 AssertRCReturn(rc, rc);
261
262 ASSERT_GUEST_RETURN(startSampler < SVGA3D_DX_MAX_SAMPLERS, VERR_INVALID_PARAMETER);
263 ASSERT_GUEST_RETURN(cSamplerId <= SVGA3D_DX_MAX_SAMPLERS - startSampler, VERR_INVALID_PARAMETER);
264 ASSERT_GUEST_RETURN(type >= SVGA3D_SHADERTYPE_MIN && type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
265 RT_UNTRUSTED_VALIDATED_FENCE();
266
267 rc = pSvgaR3State->pFuncsDX->pfnDXSetSamplers(pThisCC, pDXContext, startSampler, type, cSamplerId, paSamplerId);
268 return rc;
269}
270
271
272int vmsvga3dDXDraw(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDraw const *pCmd)
273{
274 int rc;
275 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
276 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDraw, VERR_INVALID_STATE);
277 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
278 AssertReturn(p3dState, VERR_INVALID_STATE);
279
280 PVMSVGA3DDXCONTEXT pDXContext;
281 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
282 AssertRCReturn(rc, rc);
283
284 rc = pSvgaR3State->pFuncsDX->pfnDXDraw(pThisCC, pDXContext, pCmd->vertexCount, pCmd->startVertexLocation);
285 return rc;
286}
287
288
289int vmsvga3dDXDrawIndexed(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawIndexed const *pCmd)
290{
291 int rc;
292 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
293 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawIndexed, VERR_INVALID_STATE);
294 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
295 AssertReturn(p3dState, VERR_INVALID_STATE);
296
297 PVMSVGA3DDXCONTEXT pDXContext;
298 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
299 AssertRCReturn(rc, rc);
300
301 rc = pSvgaR3State->pFuncsDX->pfnDXDrawIndexed(pThisCC, pDXContext, pCmd->indexCount, pCmd->startIndexLocation, pCmd->baseVertexLocation);
302 return rc;
303}
304
305
306int vmsvga3dDXDrawInstanced(PVGASTATECC pThisCC, uint32_t idDXContext)
307{
308 int rc;
309 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
310 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawInstanced, VERR_INVALID_STATE);
311 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
312 AssertReturn(p3dState, VERR_INVALID_STATE);
313
314 PVMSVGA3DDXCONTEXT pDXContext;
315 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
316 AssertRCReturn(rc, rc);
317
318 rc = pSvgaR3State->pFuncsDX->pfnDXDrawInstanced(pThisCC, pDXContext);
319 return rc;
320}
321
322
323int vmsvga3dDXDrawIndexedInstanced(PVGASTATECC pThisCC, uint32_t idDXContext)
324{
325 int rc;
326 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
327 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstanced, VERR_INVALID_STATE);
328 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
329 AssertReturn(p3dState, VERR_INVALID_STATE);
330
331 PVMSVGA3DDXCONTEXT pDXContext;
332 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
333 AssertRCReturn(rc, rc);
334
335 rc = pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstanced(pThisCC, pDXContext);
336 return rc;
337}
338
339
340int vmsvga3dDXDrawAuto(PVGASTATECC pThisCC, uint32_t idDXContext)
341{
342 int rc;
343 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
344 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawAuto, VERR_INVALID_STATE);
345 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
346 AssertReturn(p3dState, VERR_INVALID_STATE);
347
348 PVMSVGA3DDXCONTEXT pDXContext;
349 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
350 AssertRCReturn(rc, rc);
351
352 rc = pSvgaR3State->pFuncsDX->pfnDXDrawAuto(pThisCC, pDXContext);
353 return rc;
354}
355
356
357int vmsvga3dDXSetInputLayout(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dElementLayoutId elementLayoutId)
358{
359 int rc;
360 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
361 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetInputLayout, VERR_INVALID_STATE);
362 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
363 AssertReturn(p3dState, VERR_INVALID_STATE);
364
365 PVMSVGA3DDXCONTEXT pDXContext;
366 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
367 AssertRCReturn(rc, rc);
368
369 ASSERT_GUEST_RETURN(pDXContext->cot.paElementLayout, VERR_INVALID_STATE);
370 ASSERT_GUEST_RETURN(elementLayoutId < pDXContext->cot.cElementLayout, VERR_INVALID_PARAMETER);
371 RT_UNTRUSTED_VALIDATED_FENCE();
372
373 rc = pSvgaR3State->pFuncsDX->pfnDXSetInputLayout(pThisCC, pDXContext, elementLayoutId);
374 return rc;
375}
376
377
378int vmsvga3dDXSetVertexBuffers(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t startBuffer, uint32_t cVertexBuffer, SVGA3dVertexBuffer const *paVertexBuffer)
379{
380 int rc;
381 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
382 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetVertexBuffers, VERR_INVALID_STATE);
383 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
384 AssertReturn(p3dState, VERR_INVALID_STATE);
385
386 PVMSVGA3DDXCONTEXT pDXContext;
387 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
388 AssertRCReturn(rc, rc);
389
390 ASSERT_GUEST_RETURN(startBuffer < SVGA3D_DX_MAX_VERTEXBUFFERS, VERR_INVALID_PARAMETER);
391 ASSERT_GUEST_RETURN(cVertexBuffer <= SVGA3D_DX_MAX_VERTEXBUFFERS - startBuffer, VERR_INVALID_PARAMETER);
392 RT_UNTRUSTED_VALIDATED_FENCE();
393
394 rc = pSvgaR3State->pFuncsDX->pfnDXSetVertexBuffers(pThisCC, pDXContext, startBuffer, cVertexBuffer, paVertexBuffer);
395 return rc;
396}
397
398
399int vmsvga3dDXSetIndexBuffer(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetIndexBuffer const *pCmd)
400{
401 int rc;
402 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
403 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetIndexBuffer, VERR_INVALID_STATE);
404 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
405 AssertReturn(p3dState, VERR_INVALID_STATE);
406
407 PVMSVGA3DDXCONTEXT pDXContext;
408 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
409 AssertRCReturn(rc, rc);
410
411 rc = pSvgaR3State->pFuncsDX->pfnDXSetIndexBuffer(pThisCC, pDXContext, pCmd->sid, pCmd->format, pCmd->offset);
412 return rc;
413}
414
415
416int vmsvga3dDXSetTopology(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dPrimitiveType topology)
417{
418 int rc;
419 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
420 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetTopology, VERR_INVALID_STATE);
421 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
422 AssertReturn(p3dState, VERR_INVALID_STATE);
423
424 PVMSVGA3DDXCONTEXT pDXContext;
425 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
426 AssertRCReturn(rc, rc);
427
428 ASSERT_GUEST_RETURN(topology >= SVGA3D_PRIMITIVE_MIN && topology < SVGA3D_PRIMITIVE_MAX, VERR_INVALID_PARAMETER);
429
430 rc = pSvgaR3State->pFuncsDX->pfnDXSetTopology(pThisCC, pDXContext, topology);
431 return rc;
432}
433
434
435int vmsvga3dDXSetRenderTargets(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dDepthStencilViewId depthStencilViewId, uint32_t cRenderTargetViewId, SVGA3dRenderTargetViewId const *paRenderTargetViewId)
436{
437 int rc;
438 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
439 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetRenderTargets, VERR_INVALID_STATE);
440 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
441 AssertReturn(p3dState, VERR_INVALID_STATE);
442
443 PVMSVGA3DDXCONTEXT pDXContext;
444 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
445 AssertRCReturn(rc, rc);
446
447 ASSERT_GUEST_RETURN(cRenderTargetViewId < SVGA3D_MAX_RENDER_TARGETS, VERR_INVALID_PARAMETER);
448 ASSERT_GUEST_RETURN(depthStencilViewId < pDXContext->cot.cDSView || depthStencilViewId == SVGA_ID_INVALID, VERR_INVALID_PARAMETER);
449 for (uint32_t i = 0; i < cRenderTargetViewId; ++i)
450 ASSERT_GUEST_RETURN(paRenderTargetViewId[i] < pDXContext->cot.cRTView || paRenderTargetViewId[i] == SVGA_ID_INVALID, VERR_INVALID_PARAMETER);
451 RT_UNTRUSTED_VALIDATED_FENCE();
452
453 rc = pSvgaR3State->pFuncsDX->pfnDXSetRenderTargets(pThisCC, pDXContext, depthStencilViewId, cRenderTargetViewId, paRenderTargetViewId);
454 return rc;
455}
456
457
458int vmsvga3dDXSetBlendState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetBlendState const *pCmd)
459{
460 int rc;
461 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
462 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetBlendState, VERR_INVALID_STATE);
463 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
464 AssertReturn(p3dState, VERR_INVALID_STATE);
465
466 PVMSVGA3DDXCONTEXT pDXContext;
467 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
468 AssertRCReturn(rc, rc);
469
470 SVGA3dBlendStateId const blendId = pCmd->blendId;
471
472 ASSERT_GUEST_RETURN(pDXContext->cot.paBlendState, VERR_INVALID_STATE);
473 ASSERT_GUEST_RETURN(blendId < pDXContext->cot.cBlendState, VERR_INVALID_PARAMETER);
474 RT_UNTRUSTED_VALIDATED_FENCE();
475
476 rc = pSvgaR3State->pFuncsDX->pfnDXSetBlendState(pThisCC, pDXContext, blendId, pCmd->blendFactor, pCmd->sampleMask);
477 return rc;
478}
479
480
481int vmsvga3dDXSetDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetDepthStencilState const *pCmd)
482{
483 int rc;
484 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
485 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetDepthStencilState, VERR_INVALID_STATE);
486 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
487 AssertReturn(p3dState, VERR_INVALID_STATE);
488
489 PVMSVGA3DDXCONTEXT pDXContext;
490 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
491 AssertRCReturn(rc, rc);
492
493 SVGA3dDepthStencilStateId const depthStencilId = pCmd->depthStencilId;
494
495 ASSERT_GUEST_RETURN(pDXContext->cot.paDepthStencil, VERR_INVALID_STATE);
496 ASSERT_GUEST_RETURN(depthStencilId < pDXContext->cot.cDepthStencil, VERR_INVALID_PARAMETER);
497 RT_UNTRUSTED_VALIDATED_FENCE();
498
499 rc = pSvgaR3State->pFuncsDX->pfnDXSetDepthStencilState(pThisCC, pDXContext, depthStencilId, pCmd->stencilRef);
500 return rc;
501}
502
503
504int vmsvga3dDXSetRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dRasterizerStateId rasterizerId)
505{
506 int rc;
507 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
508 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetRasterizerState, VERR_INVALID_STATE);
509 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
510 AssertReturn(p3dState, VERR_INVALID_STATE);
511
512 PVMSVGA3DDXCONTEXT pDXContext;
513 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
514 AssertRCReturn(rc, rc);
515
516 ASSERT_GUEST_RETURN(rasterizerId < pDXContext->cot.cRasterizerState, VERR_INVALID_PARAMETER);
517 RT_UNTRUSTED_VALIDATED_FENCE();
518
519 rc = pSvgaR3State->pFuncsDX->pfnDXSetRasterizerState(pThisCC, pDXContext, rasterizerId);
520 return rc;
521}
522
523
524int vmsvga3dDXDefineQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
525{
526 int rc;
527 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
528 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineQuery, VERR_INVALID_STATE);
529 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
530 AssertReturn(p3dState, VERR_INVALID_STATE);
531
532 PVMSVGA3DDXCONTEXT pDXContext;
533 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
534 AssertRCReturn(rc, rc);
535
536 rc = pSvgaR3State->pFuncsDX->pfnDXDefineQuery(pThisCC, pDXContext);
537 return rc;
538}
539
540
541int vmsvga3dDXDestroyQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
542{
543 int rc;
544 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
545 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyQuery, VERR_INVALID_STATE);
546 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
547 AssertReturn(p3dState, VERR_INVALID_STATE);
548
549 PVMSVGA3DDXCONTEXT pDXContext;
550 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
551 AssertRCReturn(rc, rc);
552
553 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyQuery(pThisCC, pDXContext);
554 return rc;
555}
556
557
558int vmsvga3dDXBindQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
559{
560 int rc;
561 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
562 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindQuery, VERR_INVALID_STATE);
563 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
564 AssertReturn(p3dState, VERR_INVALID_STATE);
565
566 PVMSVGA3DDXCONTEXT pDXContext;
567 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
568 AssertRCReturn(rc, rc);
569
570 rc = pSvgaR3State->pFuncsDX->pfnDXBindQuery(pThisCC, pDXContext);
571 return rc;
572}
573
574
575int vmsvga3dDXSetQueryOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
576{
577 int rc;
578 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
579 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetQueryOffset, VERR_INVALID_STATE);
580 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
581 AssertReturn(p3dState, VERR_INVALID_STATE);
582
583 PVMSVGA3DDXCONTEXT pDXContext;
584 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
585 AssertRCReturn(rc, rc);
586
587 rc = pSvgaR3State->pFuncsDX->pfnDXSetQueryOffset(pThisCC, pDXContext);
588 return rc;
589}
590
591
592int vmsvga3dDXBeginQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
593{
594 int rc;
595 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
596 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBeginQuery, VERR_INVALID_STATE);
597 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
598 AssertReturn(p3dState, VERR_INVALID_STATE);
599
600 PVMSVGA3DDXCONTEXT pDXContext;
601 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
602 AssertRCReturn(rc, rc);
603
604 rc = pSvgaR3State->pFuncsDX->pfnDXBeginQuery(pThisCC, pDXContext);
605 return rc;
606}
607
608
609int vmsvga3dDXEndQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
610{
611 int rc;
612 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
613 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXEndQuery, VERR_INVALID_STATE);
614 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
615 AssertReturn(p3dState, VERR_INVALID_STATE);
616
617 PVMSVGA3DDXCONTEXT pDXContext;
618 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
619 AssertRCReturn(rc, rc);
620
621 rc = pSvgaR3State->pFuncsDX->pfnDXEndQuery(pThisCC, pDXContext);
622 return rc;
623}
624
625
626int vmsvga3dDXReadbackQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
627{
628 int rc;
629 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
630 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXReadbackQuery, VERR_INVALID_STATE);
631 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
632 AssertReturn(p3dState, VERR_INVALID_STATE);
633
634 PVMSVGA3DDXCONTEXT pDXContext;
635 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
636 AssertRCReturn(rc, rc);
637
638 rc = pSvgaR3State->pFuncsDX->pfnDXReadbackQuery(pThisCC, pDXContext);
639 return rc;
640}
641
642
643int vmsvga3dDXSetPredication(PVGASTATECC pThisCC, uint32_t idDXContext)
644{
645 int rc;
646 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
647 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetPredication, VERR_INVALID_STATE);
648 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
649 AssertReturn(p3dState, VERR_INVALID_STATE);
650
651 PVMSVGA3DDXCONTEXT pDXContext;
652 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
653 AssertRCReturn(rc, rc);
654
655 rc = pSvgaR3State->pFuncsDX->pfnDXSetPredication(pThisCC, pDXContext);
656 return rc;
657}
658
659
660int vmsvga3dDXSetSOTargets(PVGASTATECC pThisCC, uint32_t idDXContext)
661{
662 int rc;
663 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
664 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetSOTargets, VERR_INVALID_STATE);
665 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
666 AssertReturn(p3dState, VERR_INVALID_STATE);
667
668 PVMSVGA3DDXCONTEXT pDXContext;
669 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
670 AssertRCReturn(rc, rc);
671
672 rc = pSvgaR3State->pFuncsDX->pfnDXSetSOTargets(pThisCC, pDXContext);
673 return rc;
674}
675
676
677int vmsvga3dDXSetViewports(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t cViewport, SVGA3dViewport const *paViewport)
678{
679 int rc;
680 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
681 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetViewports, VERR_INVALID_STATE);
682 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
683 AssertReturn(p3dState, VERR_INVALID_STATE);
684
685 PVMSVGA3DDXCONTEXT pDXContext;
686 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
687 AssertRCReturn(rc, rc);
688
689 rc = pSvgaR3State->pFuncsDX->pfnDXSetViewports(pThisCC, pDXContext, cViewport, paViewport);
690 return rc;
691}
692
693
694int vmsvga3dDXSetScissorRects(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t cRect, SVGASignedRect const *paRect)
695{
696 int rc;
697 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
698 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetScissorRects, VERR_INVALID_STATE);
699 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
700 AssertReturn(p3dState, VERR_INVALID_STATE);
701
702 PVMSVGA3DDXCONTEXT pDXContext;
703 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
704 AssertRCReturn(rc, rc);
705
706 rc = pSvgaR3State->pFuncsDX->pfnDXSetScissorRects(pThisCC, pDXContext, cRect, paRect);
707 return rc;
708}
709
710
711int vmsvga3dDXClearRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext)
712{
713 int rc;
714 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
715 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearRenderTargetView, VERR_INVALID_STATE);
716 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
717 AssertReturn(p3dState, VERR_INVALID_STATE);
718
719 PVMSVGA3DDXCONTEXT pDXContext;
720 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
721 AssertRCReturn(rc, rc);
722
723 rc = pSvgaR3State->pFuncsDX->pfnDXClearRenderTargetView(pThisCC, pDXContext);
724 return rc;
725}
726
727
728int vmsvga3dDXClearDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext)
729{
730 int rc;
731 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
732 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearDepthStencilView, VERR_INVALID_STATE);
733 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
734 AssertReturn(p3dState, VERR_INVALID_STATE);
735
736 PVMSVGA3DDXCONTEXT pDXContext;
737 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
738 AssertRCReturn(rc, rc);
739
740 rc = pSvgaR3State->pFuncsDX->pfnDXClearDepthStencilView(pThisCC, pDXContext);
741 return rc;
742}
743
744
745int vmsvga3dDXPredCopyRegion(PVGASTATECC pThisCC, uint32_t idDXContext)
746{
747 int rc;
748 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
749 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredCopyRegion, VERR_INVALID_STATE);
750 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
751 AssertReturn(p3dState, VERR_INVALID_STATE);
752
753 PVMSVGA3DDXCONTEXT pDXContext;
754 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
755 AssertRCReturn(rc, rc);
756
757 rc = pSvgaR3State->pFuncsDX->pfnDXPredCopyRegion(pThisCC, pDXContext);
758 return rc;
759}
760
761
762int vmsvga3dDXPredCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
763{
764 int rc;
765 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
766 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredCopy, VERR_INVALID_STATE);
767 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
768 AssertReturn(p3dState, VERR_INVALID_STATE);
769
770 PVMSVGA3DDXCONTEXT pDXContext;
771 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
772 AssertRCReturn(rc, rc);
773
774 rc = pSvgaR3State->pFuncsDX->pfnDXPredCopy(pThisCC, pDXContext);
775 return rc;
776}
777
778
779int vmsvga3dDXPresentBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
780{
781 int rc;
782 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
783 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPresentBlt, VERR_INVALID_STATE);
784 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
785 AssertReturn(p3dState, VERR_INVALID_STATE);
786
787 PVMSVGA3DDXCONTEXT pDXContext;
788 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
789 AssertRCReturn(rc, rc);
790
791 rc = pSvgaR3State->pFuncsDX->pfnDXPresentBlt(pThisCC, pDXContext);
792 return rc;
793}
794
795
796int vmsvga3dDXGenMips(PVGASTATECC pThisCC, uint32_t idDXContext)
797{
798 int rc;
799 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
800 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXGenMips, VERR_INVALID_STATE);
801 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
802 AssertReturn(p3dState, VERR_INVALID_STATE);
803
804 PVMSVGA3DDXCONTEXT pDXContext;
805 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
806 AssertRCReturn(rc, rc);
807
808 rc = pSvgaR3State->pFuncsDX->pfnDXGenMips(pThisCC, pDXContext);
809 return rc;
810}
811
812
813int vmsvga3dDXUpdateSubResource(PVGASTATECC pThisCC, uint32_t idDXContext)
814{
815 int rc;
816 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
817 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXUpdateSubResource, VERR_INVALID_STATE);
818 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
819 AssertReturn(p3dState, VERR_INVALID_STATE);
820
821 PVMSVGA3DDXCONTEXT pDXContext;
822 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
823 AssertRCReturn(rc, rc);
824
825 rc = pSvgaR3State->pFuncsDX->pfnDXUpdateSubResource(pThisCC, pDXContext);
826 return rc;
827}
828
829
830int vmsvga3dDXReadbackSubResource(PVGASTATECC pThisCC, uint32_t idDXContext)
831{
832 int rc;
833 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
834 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXReadbackSubResource, VERR_INVALID_STATE);
835 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
836 AssertReturn(p3dState, VERR_INVALID_STATE);
837
838 PVMSVGA3DDXCONTEXT pDXContext;
839 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
840 AssertRCReturn(rc, rc);
841
842 rc = pSvgaR3State->pFuncsDX->pfnDXReadbackSubResource(pThisCC, pDXContext);
843 return rc;
844}
845
846
847int vmsvga3dDXInvalidateSubResource(PVGASTATECC pThisCC, uint32_t idDXContext)
848{
849 int rc;
850 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
851 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXInvalidateSubResource, VERR_INVALID_STATE);
852 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
853 AssertReturn(p3dState, VERR_INVALID_STATE);
854
855 PVMSVGA3DDXCONTEXT pDXContext;
856 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
857 AssertRCReturn(rc, rc);
858
859 rc = pSvgaR3State->pFuncsDX->pfnDXInvalidateSubResource(pThisCC, pDXContext);
860 return rc;
861}
862
863
864int vmsvga3dDXDefineShaderResourceView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineShaderResourceView const *pCmd)
865{
866 int rc;
867 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
868 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineShaderResourceView, VERR_INVALID_STATE);
869 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
870 AssertReturn(p3dState, VERR_INVALID_STATE);
871
872 PVMSVGA3DDXCONTEXT pDXContext;
873 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
874 AssertRCReturn(rc, rc);
875
876 SVGA3dShaderResourceViewId const shaderResourceViewId = pCmd->shaderResourceViewId;
877
878 ASSERT_GUEST_RETURN(pDXContext->cot.paSRView, VERR_INVALID_STATE);
879 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->cot.cSRView, VERR_INVALID_PARAMETER);
880 RT_UNTRUSTED_VALIDATED_FENCE();
881
882 SVGACOTableDXSRViewEntry *pEntry = &pDXContext->cot.paSRView[shaderResourceViewId];
883 pEntry->sid = pCmd->sid;
884 pEntry->format = pCmd->format;
885 pEntry->resourceDimension = pCmd->resourceDimension;
886 pEntry->desc = pCmd->desc;
887
888 rc = pSvgaR3State->pFuncsDX->pfnDXDefineShaderResourceView(pThisCC, pDXContext, shaderResourceViewId, pEntry);
889 return rc;
890}
891
892
893int vmsvga3dDXDestroyShaderResourceView(PVGASTATECC pThisCC, uint32_t idDXContext)
894{
895 int rc;
896 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
897 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyShaderResourceView, VERR_INVALID_STATE);
898 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
899 AssertReturn(p3dState, VERR_INVALID_STATE);
900
901 PVMSVGA3DDXCONTEXT pDXContext;
902 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
903 AssertRCReturn(rc, rc);
904
905 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyShaderResourceView(pThisCC, pDXContext);
906 return rc;
907}
908
909
910int vmsvga3dDXDefineRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineRenderTargetView const *pCmd)
911{
912 int rc;
913 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
914 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineRenderTargetView, VERR_INVALID_STATE);
915 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
916 AssertReturn(p3dState, VERR_INVALID_STATE);
917
918 PVMSVGA3DDXCONTEXT pDXContext;
919 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
920 AssertRCReturn(rc, rc);
921
922 SVGA3dRenderTargetViewId const renderTargetViewId = pCmd->renderTargetViewId;
923
924 ASSERT_GUEST_RETURN(pDXContext->cot.paRTView, VERR_INVALID_STATE);
925 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, VERR_INVALID_PARAMETER);
926 RT_UNTRUSTED_VALIDATED_FENCE();
927
928 SVGACOTableDXRTViewEntry *pEntry = &pDXContext->cot.paRTView[renderTargetViewId];
929 pEntry->sid = pCmd->sid;
930 pEntry->format = pCmd->format;
931 pEntry->resourceDimension = pCmd->resourceDimension;
932 pEntry->desc = pCmd->desc;
933
934 rc = pSvgaR3State->pFuncsDX->pfnDXDefineRenderTargetView(pThisCC, pDXContext, renderTargetViewId, pEntry);
935 return rc;
936}
937
938
939int vmsvga3dDXDestroyRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext)
940{
941 int rc;
942 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
943 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyRenderTargetView, VERR_INVALID_STATE);
944 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
945 AssertReturn(p3dState, VERR_INVALID_STATE);
946
947 PVMSVGA3DDXCONTEXT pDXContext;
948 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
949 AssertRCReturn(rc, rc);
950
951 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyRenderTargetView(pThisCC, pDXContext);
952 return rc;
953}
954
955
956int vmsvga3dDXDefineDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext)
957{
958 int rc;
959 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
960 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilView, VERR_INVALID_STATE);
961 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
962 AssertReturn(p3dState, VERR_INVALID_STATE);
963
964 PVMSVGA3DDXCONTEXT pDXContext;
965 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
966 AssertRCReturn(rc, rc);
967
968 rc = pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilView(pThisCC, pDXContext);
969 return rc;
970}
971
972
973int vmsvga3dDXDestroyDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext)
974{
975 int rc;
976 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
977 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilView, VERR_INVALID_STATE);
978 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
979 AssertReturn(p3dState, VERR_INVALID_STATE);
980
981 PVMSVGA3DDXCONTEXT pDXContext;
982 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
983 AssertRCReturn(rc, rc);
984
985 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilView(pThisCC, pDXContext);
986 return rc;
987}
988
989
990int vmsvga3dDXDefineElementLayout(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dElementLayoutId elementLayoutId, uint32_t cDesc, SVGA3dInputElementDesc const *paDesc)
991{
992 int rc;
993 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
994 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineElementLayout, VERR_INVALID_STATE);
995 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
996 AssertReturn(p3dState, VERR_INVALID_STATE);
997
998 PVMSVGA3DDXCONTEXT pDXContext;
999 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1000 AssertRCReturn(rc, rc);
1001
1002 ASSERT_GUEST_RETURN(pDXContext->cot.paElementLayout, VERR_INVALID_STATE);
1003 ASSERT_GUEST_RETURN(elementLayoutId < pDXContext->cot.cElementLayout, VERR_INVALID_PARAMETER);
1004 RT_UNTRUSTED_VALIDATED_FENCE();
1005
1006 SVGACOTableDXElementLayoutEntry *pEntry = &pDXContext->cot.paElementLayout[elementLayoutId];
1007 pEntry->elid = elementLayoutId;
1008 pEntry->numDescs = RT_MIN(cDesc, RT_ELEMENTS(pEntry->descs));
1009 memcpy(pEntry->descs, paDesc, pEntry->numDescs * sizeof(pEntry->descs[0]));
1010
1011#ifdef LOG_ENABLED
1012 Log6(("Element layout %d: slot off fmt class step reg\n", pEntry->elid));
1013 for (uint32_t i = 0; i < pEntry->numDescs; ++i)
1014 {
1015 Log6((" [%u]: %u 0x%02X %d %u %u %u\n",
1016 i,
1017 pEntry->descs[i].inputSlot,
1018 pEntry->descs[i].alignedByteOffset,
1019 pEntry->descs[i].format,
1020 pEntry->descs[i].inputSlotClass,
1021 pEntry->descs[i].instanceDataStepRate,
1022 pEntry->descs[i].inputRegister
1023 ));
1024 }
1025#endif
1026
1027 rc = pSvgaR3State->pFuncsDX->pfnDXDefineElementLayout(pThisCC, pDXContext, elementLayoutId, pEntry);
1028 return rc;
1029}
1030
1031
1032int vmsvga3dDXDestroyElementLayout(PVGASTATECC pThisCC, uint32_t idDXContext)
1033{
1034 int rc;
1035 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1036 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyElementLayout, VERR_INVALID_STATE);
1037 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1038 AssertReturn(p3dState, VERR_INVALID_STATE);
1039
1040 PVMSVGA3DDXCONTEXT pDXContext;
1041 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1042 AssertRCReturn(rc, rc);
1043
1044 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyElementLayout(pThisCC, pDXContext);
1045 return rc;
1046}
1047
1048
1049int vmsvga3dDXDefineBlendState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineBlendState const *pCmd)
1050{
1051 int rc;
1052 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1053 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineBlendState, VERR_INVALID_STATE);
1054 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1055 AssertReturn(p3dState, VERR_INVALID_STATE);
1056
1057 PVMSVGA3DDXCONTEXT pDXContext;
1058 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1059 AssertRCReturn(rc, rc);
1060
1061 const SVGA3dBlendStateId blendId = pCmd->blendId;
1062
1063 ASSERT_GUEST_RETURN(pDXContext->cot.paBlendState, VERR_INVALID_STATE);
1064 ASSERT_GUEST_RETURN(blendId < pDXContext->cot.cBlendState, VERR_INVALID_PARAMETER);
1065 RT_UNTRUSTED_VALIDATED_FENCE();
1066
1067 SVGACOTableDXBlendStateEntry *pEntry = &pDXContext->cot.paBlendState[blendId];
1068 pEntry->alphaToCoverageEnable = pCmd->alphaToCoverageEnable;
1069 pEntry->independentBlendEnable = pCmd->independentBlendEnable;
1070 memcpy(pEntry->perRT, pCmd->perRT, sizeof(pEntry->perRT));
1071
1072 rc = pSvgaR3State->pFuncsDX->pfnDXDefineBlendState(pThisCC, pDXContext, blendId, pEntry);
1073 return rc;
1074}
1075
1076
1077int vmsvga3dDXDestroyBlendState(PVGASTATECC pThisCC, uint32_t idDXContext)
1078{
1079 int rc;
1080 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1081 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyBlendState, VERR_INVALID_STATE);
1082 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1083 AssertReturn(p3dState, VERR_INVALID_STATE);
1084
1085 PVMSVGA3DDXCONTEXT pDXContext;
1086 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1087 AssertRCReturn(rc, rc);
1088
1089 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyBlendState(pThisCC, pDXContext);
1090 return rc;
1091}
1092
1093
1094int vmsvga3dDXDefineDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineDepthStencilState const *pCmd)
1095{
1096 int rc;
1097 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1098 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilState, VERR_INVALID_STATE);
1099 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1100 AssertReturn(p3dState, VERR_INVALID_STATE);
1101
1102 PVMSVGA3DDXCONTEXT pDXContext;
1103 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1104 AssertRCReturn(rc, rc);
1105
1106 SVGA3dDepthStencilStateId const depthStencilId = pCmd->depthStencilId;
1107
1108 ASSERT_GUEST_RETURN(pDXContext->cot.paDepthStencil, VERR_INVALID_STATE);
1109 ASSERT_GUEST_RETURN(depthStencilId < pDXContext->cot.cDepthStencil, VERR_INVALID_PARAMETER);
1110 RT_UNTRUSTED_VALIDATED_FENCE();
1111
1112 SVGACOTableDXDepthStencilEntry *pEntry = &pDXContext->cot.paDepthStencil[depthStencilId];
1113 pEntry->depthEnable = pCmd->depthEnable;
1114 pEntry->depthWriteMask = pCmd->depthWriteMask;
1115 pEntry->depthFunc = pCmd->depthFunc;
1116 pEntry->stencilEnable = pCmd->stencilEnable;
1117 pEntry->frontEnable = pCmd->frontEnable;
1118 pEntry->backEnable = pCmd->backEnable;
1119 pEntry->stencilReadMask = pCmd->stencilReadMask;
1120 pEntry->stencilWriteMask = pCmd->stencilWriteMask;
1121
1122 pEntry->frontStencilFailOp = pCmd->frontStencilFailOp;
1123 pEntry->frontStencilDepthFailOp = pCmd->frontStencilDepthFailOp;
1124 pEntry->frontStencilPassOp = pCmd->frontStencilPassOp;
1125 pEntry->frontStencilFunc = pCmd->frontStencilFunc;
1126
1127 pEntry->backStencilFailOp = pCmd->backStencilFailOp;
1128 pEntry->backStencilDepthFailOp = pCmd->backStencilDepthFailOp;
1129 pEntry->backStencilPassOp = pCmd->backStencilPassOp;
1130 pEntry->backStencilFunc = pCmd->backStencilFunc;
1131
1132 rc = pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilState(pThisCC, pDXContext, depthStencilId, pEntry);
1133 return rc;
1134}
1135
1136
1137int vmsvga3dDXDestroyDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext)
1138{
1139 int rc;
1140 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1141 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilState, VERR_INVALID_STATE);
1142 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1143 AssertReturn(p3dState, VERR_INVALID_STATE);
1144
1145 PVMSVGA3DDXCONTEXT pDXContext;
1146 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1147 AssertRCReturn(rc, rc);
1148
1149 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilState(pThisCC, pDXContext);
1150 return rc;
1151}
1152
1153
1154int vmsvga3dDXDefineRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineRasterizerState const *pCmd)
1155{
1156 int rc;
1157 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1158 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineRasterizerState, VERR_INVALID_STATE);
1159 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1160 AssertReturn(p3dState, VERR_INVALID_STATE);
1161
1162 PVMSVGA3DDXCONTEXT pDXContext;
1163 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1164 AssertRCReturn(rc, rc);
1165
1166 SVGA3dRasterizerStateId const rasterizerId = pCmd->rasterizerId;
1167
1168 ASSERT_GUEST_RETURN(pDXContext->cot.paRasterizerState, VERR_INVALID_STATE);
1169 ASSERT_GUEST_RETURN(rasterizerId < pDXContext->cot.cRasterizerState, VERR_INVALID_PARAMETER);
1170 RT_UNTRUSTED_VALIDATED_FENCE();
1171
1172 SVGACOTableDXRasterizerStateEntry *pEntry = &pDXContext->cot.paRasterizerState[rasterizerId];
1173 pEntry->fillMode = pCmd->fillMode;
1174 pEntry->cullMode = pCmd->cullMode;
1175 pEntry->frontCounterClockwise = pCmd->frontCounterClockwise;
1176 pEntry->provokingVertexLast = pCmd->provokingVertexLast;
1177 pEntry->depthBias = pCmd->depthBias;
1178 pEntry->depthBiasClamp = pCmd->depthBiasClamp;
1179 pEntry->slopeScaledDepthBias = pCmd->slopeScaledDepthBias;
1180 pEntry->depthClipEnable = pCmd->depthClipEnable;
1181 pEntry->scissorEnable = pCmd->scissorEnable;
1182 pEntry->multisampleEnable = pCmd->multisampleEnable;
1183 pEntry->antialiasedLineEnable = pCmd->antialiasedLineEnable;
1184 pEntry->lineWidth = pCmd->lineWidth;
1185 pEntry->lineStippleEnable = pCmd->lineStippleEnable;
1186 pEntry->lineStippleFactor = pCmd->lineStippleFactor;
1187 pEntry->lineStipplePattern = pCmd->lineStipplePattern;
1188 pEntry->forcedSampleCount = 0; /** @todo Not in pCmd. */
1189 RT_ZERO(pEntry->mustBeZero);
1190
1191 rc = pSvgaR3State->pFuncsDX->pfnDXDefineRasterizerState(pThisCC, pDXContext, rasterizerId, pEntry);
1192 return rc;
1193}
1194
1195
1196int vmsvga3dDXDestroyRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext)
1197{
1198 int rc;
1199 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1200 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyRasterizerState, VERR_INVALID_STATE);
1201 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1202 AssertReturn(p3dState, VERR_INVALID_STATE);
1203
1204 PVMSVGA3DDXCONTEXT pDXContext;
1205 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1206 AssertRCReturn(rc, rc);
1207
1208 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyRasterizerState(pThisCC, pDXContext);
1209 return rc;
1210}
1211
1212
1213int vmsvga3dDXDefineSamplerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineSamplerState const *pCmd)
1214{
1215 int rc;
1216 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1217 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineSamplerState, VERR_INVALID_STATE);
1218 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1219 AssertReturn(p3dState, VERR_INVALID_STATE);
1220
1221 PVMSVGA3DDXCONTEXT pDXContext;
1222 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1223 AssertRCReturn(rc, rc);
1224
1225 SVGA3dSamplerId const samplerId = pCmd->samplerId;
1226
1227 ASSERT_GUEST_RETURN(pDXContext->cot.paSampler, VERR_INVALID_STATE);
1228 ASSERT_GUEST_RETURN(samplerId < pDXContext->cot.cSampler, VERR_INVALID_PARAMETER);
1229 RT_UNTRUSTED_VALIDATED_FENCE();
1230
1231 SVGACOTableDXSamplerEntry *pEntry = &pDXContext->cot.paSampler[samplerId];
1232 pEntry->filter = pCmd->filter;
1233 pEntry->addressU = pCmd->addressU;
1234 pEntry->addressV = pCmd->addressV;
1235 pEntry->addressW = pCmd->addressW;
1236 pEntry->mipLODBias = pCmd->mipLODBias;
1237 pEntry->maxAnisotropy = pCmd->maxAnisotropy;
1238 pEntry->comparisonFunc = pCmd->comparisonFunc;
1239 pEntry->borderColor = pCmd->borderColor;
1240 pEntry->minLOD = pCmd->minLOD;
1241 pEntry->maxLOD = pCmd->maxLOD;
1242
1243 rc = pSvgaR3State->pFuncsDX->pfnDXDefineSamplerState(pThisCC, pDXContext, samplerId, pEntry);
1244 return rc;
1245}
1246
1247
1248int vmsvga3dDXDestroySamplerState(PVGASTATECC pThisCC, uint32_t idDXContext)
1249{
1250 int rc;
1251 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1252 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroySamplerState, VERR_INVALID_STATE);
1253 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1254 AssertReturn(p3dState, VERR_INVALID_STATE);
1255
1256 PVMSVGA3DDXCONTEXT pDXContext;
1257 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1258 AssertRCReturn(rc, rc);
1259
1260 rc = pSvgaR3State->pFuncsDX->pfnDXDestroySamplerState(pThisCC, pDXContext);
1261 return rc;
1262}
1263
1264
1265int vmsvga3dDXDefineShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineShader const *pCmd)
1266{
1267 int rc;
1268 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1269 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineShader, VERR_INVALID_STATE);
1270 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1271 AssertReturn(p3dState, VERR_INVALID_STATE);
1272
1273 PVMSVGA3DDXCONTEXT pDXContext;
1274 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1275 AssertRCReturn(rc, rc);
1276
1277 SVGA3dShaderId const shaderId = pCmd->shaderId;
1278
1279 ASSERT_GUEST_RETURN(pDXContext->cot.paShader, VERR_INVALID_STATE);
1280 ASSERT_GUEST_RETURN(shaderId < pDXContext->cot.cShader, VERR_INVALID_PARAMETER);
1281 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
1282 ASSERT_GUEST_RETURN(pCmd->sizeInBytes >= 8, VERR_INVALID_PARAMETER); /* Version Token + Length Token. */
1283 RT_UNTRUSTED_VALIDATED_FENCE();
1284
1285 SVGACOTableDXShaderEntry *pEntry = &pDXContext->cot.paShader[shaderId];
1286 pEntry->type = pCmd->type;
1287 pEntry->sizeInBytes = pCmd->sizeInBytes;
1288 pEntry->offsetInBytes = 0;
1289 pEntry->mobid = SVGA_ID_INVALID;
1290
1291 if (!pDXContext->paShader)
1292 {
1293 /* Create host array for information abput shaders. */
1294 pDXContext->paShader = (PVMSVGA3DSHADER)RTMemAllocZ(pDXContext->cot.cShader * sizeof(VMSVGA3DSHADER));
1295 AssertReturn(pDXContext->paShader, VERR_NO_MEMORY);
1296 for (uint32_t i = 0; i < pDXContext->cot.cShader; ++i)
1297 pDXContext->paShader[i].id = SVGA_ID_INVALID;
1298 }
1299
1300 PVMSVGA3DSHADER pShader = &pDXContext->paShader[shaderId];
1301 if (pShader->id != SVGA_ID_INVALID)
1302 {
1303 /** @todo Cleanup current shader. */
1304 pSvgaR3State->pFuncsDX->pfnDXDestroyShader(pThisCC, pDXContext);
1305 RTMemFree(pShader->pShaderProgram);
1306 }
1307
1308 pShader->id = shaderId;
1309 pShader->cid = idDXContext;
1310 pShader->type = pEntry->type;
1311 pShader->cbData = pEntry->sizeInBytes;
1312 pShader->pShaderProgram = NULL;
1313 pShader->u.pvBackendShader = NULL;
1314
1315 rc = pSvgaR3State->pFuncsDX->pfnDXDefineShader(pThisCC, pDXContext, pShader);
1316 return rc;
1317}
1318
1319
1320int vmsvga3dDXDestroyShader(PVGASTATECC pThisCC, uint32_t idDXContext)
1321{
1322 int rc;
1323 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1324 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyShader, VERR_INVALID_STATE);
1325 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1326 AssertReturn(p3dState, VERR_INVALID_STATE);
1327
1328 PVMSVGA3DDXCONTEXT pDXContext;
1329 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1330 AssertRCReturn(rc, rc);
1331
1332 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyShader(pThisCC, pDXContext);
1333 return rc;
1334}
1335
1336
1337static int dxBindShader(PVMSVGA3DSHADER pShader, PVMSVGAMOB pMob, SVGACOTableDXShaderEntry const *pEntry, void const *pvShaderBytecode)
1338{
1339 /* How many bytes the MOB can hold. */
1340 uint32_t const cbMob = vmsvgaR3MobSize(pMob) - pEntry->offsetInBytes;
1341 ASSERT_GUEST_RETURN(cbMob >= pEntry->sizeInBytes, VERR_INVALID_PARAMETER);
1342 AssertReturn(pEntry->sizeInBytes >= 8, VERR_INTERNAL_ERROR); /* Host ensures this in DefineShader. */
1343
1344 int rc = DXShaderParse(pvShaderBytecode, pEntry->sizeInBytes, &pShader->shaderInfo);
1345 if (RT_SUCCESS(rc))
1346 {
1347 /* Get the length of the shader bytecode. */
1348 uint32_t const *pau32Token = (uint32_t *)pvShaderBytecode; /* Tokens */
1349 uint32_t const cToken = pau32Token[1]; /* Length of the shader in tokens. */
1350 ASSERT_GUEST_RETURN(cToken <= pEntry->sizeInBytes / 4, VERR_INVALID_PARAMETER);
1351
1352 pShader->cbData = cToken * 4;
1353
1354 /* Check if the MOB contains SVGA3dDXSignatureHeader and signature entries.
1355 * If they are not there (Linux guest driver does not provide them), then it is fine
1356 * and the signatures generated by DXShaderParse will be used.
1357 */
1358 uint32_t const cbSignaturesMax = cbMob - pShader->cbData; /* How many bytes for signatures are available. */
1359 if (cbSignaturesMax > sizeof(SVGA3dDXSignatureHeader))
1360 {
1361 SVGA3dDXSignatureHeader const *pSignatureHeader = (SVGA3dDXSignatureHeader *)((uint8_t *)pvShaderBytecode + pShader->cbData);
1362 if (pSignatureHeader->headerVersion == SVGADX_SIGNATURE_HEADER_VERSION_0)
1363 {
1364 ASSERT_GUEST_RETURN( pSignatureHeader->numInputSignatures <= RT_ELEMENTS(pShader->shaderInfo.aInputSignature)
1365 && pSignatureHeader->numOutputSignatures <= RT_ELEMENTS(pShader->shaderInfo.aOutputSignature)
1366 && pSignatureHeader->numPatchConstantSignatures <= RT_ELEMENTS(pShader->shaderInfo.aPatchConstantSignature),
1367 VERR_INVALID_PARAMETER);
1368
1369 uint32_t const cSignature = pSignatureHeader->numInputSignatures
1370 + pSignatureHeader->numOutputSignatures
1371 + pSignatureHeader->numPatchConstantSignatures;
1372 ASSERT_GUEST_RETURN( cbSignaturesMax - sizeof(SVGA3dDXSignatureHeader)
1373 > cSignature * sizeof(sizeof(SVGA3dDXSignatureEntry)), VERR_INVALID_PARAMETER);
1374
1375 /* Copy to DXShaderInfo. */
1376 uint8_t const *pu8Signatures = (uint8_t *)&pSignatureHeader[1];
1377 pShader->shaderInfo.cInputSignature = pSignatureHeader->numInputSignatures;
1378 memcpy(pShader->shaderInfo.aInputSignature, pu8Signatures, pSignatureHeader->numInputSignatures * sizeof(SVGA3dDXSignatureEntry));
1379
1380 pu8Signatures += pSignatureHeader->numInputSignatures * sizeof(SVGA3dDXSignatureEntry);
1381 pShader->shaderInfo.cOutputSignature = pSignatureHeader->numOutputSignatures;
1382 memcpy(pShader->shaderInfo.aOutputSignature, pu8Signatures, pSignatureHeader->numOutputSignatures * sizeof(SVGA3dDXSignatureEntry));
1383
1384 pu8Signatures += pSignatureHeader->numOutputSignatures * sizeof(SVGA3dDXSignatureEntry);
1385 pShader->shaderInfo.cPatchConstantSignature = pSignatureHeader->numPatchConstantSignatures;
1386 memcpy(pShader->shaderInfo.aPatchConstantSignature, pu8Signatures, pSignatureHeader->numPatchConstantSignatures * sizeof(SVGA3dDXSignatureEntry));
1387 }
1388 }
1389 }
1390
1391 return rc;
1392}
1393
1394
1395int vmsvga3dDXBindShader(PVGASTATECC pThisCC, uint32_t cid, PVMSVGAMOB pMob, uint32_t shid, uint32_t offsetInBytes)
1396{
1397 int rc;
1398 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1399 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindShader, VERR_INVALID_STATE);
1400 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1401 AssertReturn(p3dState, VERR_INVALID_STATE);
1402
1403 PVMSVGA3DDXCONTEXT pDXContext;
1404 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
1405 AssertRCReturn(rc, rc);
1406
1407 ASSERT_GUEST_RETURN(shid < pDXContext->cot.cShader, VERR_INVALID_PARAMETER);
1408 RT_UNTRUSTED_VALIDATED_FENCE();
1409
1410 SVGACOTableDXShaderEntry *pEntry = &pDXContext->cot.paShader[shid];
1411 //pEntry->type;
1412 //pEntry->sizeInBytes;
1413 pEntry->offsetInBytes = offsetInBytes;
1414 pEntry->mobid = vmsvgaR3MobId(pMob);
1415
1416 if (pMob)
1417 {
1418 /* Bind a mob to the shader. */
1419
1420 /* Create a memory pointer for the MOB, which is accessible by host. */
1421 rc = vmsvgaR3MobBackingStoreCreate(pSvgaR3State, pMob, vmsvgaR3MobSize(pMob));
1422 if (RT_SUCCESS(rc))
1423 {
1424 /* Get pointer to the shader bytecode. This will also verify the offset. */
1425 void const *pvShaderBytecode = vmsvgaR3MobBackingStoreGet(pMob, pEntry->offsetInBytes);
1426 ASSERT_GUEST_RETURN(pvShaderBytecode, VERR_INVALID_PARAMETER);
1427
1428 PVMSVGA3DSHADER pShader = &pDXContext->paShader[shid];
1429 Assert( pShader->id == shid
1430 && pShader->type == pEntry->type); /* The host ensures this. */
1431
1432 /* Get the shader and optional signatures from the MOB. */
1433 rc = dxBindShader(pShader, pMob, pEntry, pvShaderBytecode);
1434 if (RT_SUCCESS(rc))
1435 rc = pSvgaR3State->pFuncsDX->pfnDXBindShader(pThisCC, pDXContext, pShader, pvShaderBytecode);
1436
1437 if (RT_FAILURE(rc))
1438 {
1439 /** @todo Any cleanup? */
1440 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
1441 }
1442 }
1443 }
1444 else
1445 {
1446 /* Unbind. */
1447 /** @todo Nothing to do here but release the MOB? */
1448 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
1449 }
1450
1451 return rc;
1452}
1453
1454
1455int vmsvga3dDXDefineStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext)
1456{
1457 int rc;
1458 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1459 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutput, VERR_INVALID_STATE);
1460 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1461 AssertReturn(p3dState, VERR_INVALID_STATE);
1462
1463 PVMSVGA3DDXCONTEXT pDXContext;
1464 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1465 AssertRCReturn(rc, rc);
1466
1467 rc = pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutput(pThisCC, pDXContext);
1468 return rc;
1469}
1470
1471
1472int vmsvga3dDXDestroyStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext)
1473{
1474 int rc;
1475 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1476 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyStreamOutput, VERR_INVALID_STATE);
1477 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1478 AssertReturn(p3dState, VERR_INVALID_STATE);
1479
1480 PVMSVGA3DDXCONTEXT pDXContext;
1481 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1482 AssertRCReturn(rc, rc);
1483
1484 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyStreamOutput(pThisCC, pDXContext);
1485 return rc;
1486}
1487
1488
1489int vmsvga3dDXSetStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext)
1490{
1491 int rc;
1492 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1493 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetStreamOutput, VERR_INVALID_STATE);
1494 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1495 AssertReturn(p3dState, VERR_INVALID_STATE);
1496
1497 PVMSVGA3DDXCONTEXT pDXContext;
1498 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1499 AssertRCReturn(rc, rc);
1500
1501 rc = pSvgaR3State->pFuncsDX->pfnDXSetStreamOutput(pThisCC, pDXContext);
1502 return rc;
1503}
1504
1505
1506int vmsvga3dDXSetCOTable(PVGASTATECC pThisCC, uint32_t cid, PVMSVGAMOB pMob, SVGACOTableType type, uint32_t validSizeInBytes)
1507{
1508 int rc;
1509 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1510 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetCOTable, VERR_INVALID_STATE);
1511 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1512 AssertReturn(p3dState, VERR_INVALID_STATE);
1513
1514 PVMSVGA3DDXCONTEXT pDXContext;
1515 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
1516 AssertRCReturn(rc, rc);
1517 RT_UNTRUSTED_VALIDATED_FENCE();
1518
1519 ASSERT_GUEST_RETURN(type < RT_ELEMENTS(pDXContext->aCOTMobs), VERR_INVALID_PARAMETER);
1520 RT_UNTRUSTED_VALIDATED_FENCE();
1521
1522 if (pMob)
1523 {
1524 /* Bind a mob to the COTable. */
1525 /* Create a memory pointer, which is accessible by host. */
1526 rc = vmsvgaR3MobBackingStoreCreate(pSvgaR3State, pMob, validSizeInBytes);
1527 }
1528 else
1529 {
1530 /* Unbind. */
1531 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pDXContext->aCOTMobs[type]);
1532 }
1533
1534 uint32_t cEntries = 0;
1535 if (RT_SUCCESS(rc))
1536 {
1537 static uint32_t const s_acbEntry[SVGA_COTABLE_MAX] =
1538 {
1539 sizeof(SVGACOTableDXRTViewEntry),
1540 sizeof(SVGACOTableDXDSViewEntry),
1541 sizeof(SVGACOTableDXSRViewEntry),
1542 sizeof(SVGACOTableDXElementLayoutEntry),
1543 sizeof(SVGACOTableDXBlendStateEntry),
1544 sizeof(SVGACOTableDXDepthStencilEntry),
1545 sizeof(SVGACOTableDXRasterizerStateEntry),
1546 sizeof(SVGACOTableDXSamplerEntry),
1547 sizeof(SVGACOTableDXStreamOutputEntry),
1548 sizeof(SVGACOTableDXQueryEntry),
1549 sizeof(SVGACOTableDXShaderEntry),
1550 sizeof(SVGACOTableDXUAViewEntry),
1551 };
1552
1553 uint32_t cbCOT = vmsvgaR3MobSize(pMob);
1554 cEntries = cbCOT / s_acbEntry[type];
1555
1556 rc = pSvgaR3State->pFuncsDX->pfnDXSetCOTable(pThisCC, pDXContext, type, cEntries);
1557 }
1558
1559 if (RT_SUCCESS(rc))
1560 {
1561 pDXContext->aCOTMobs[type] = pMob;
1562 void *pvCOT = vmsvgaR3MobBackingStoreGet(pMob, 0);
1563 switch (type)
1564 {
1565 case SVGA_COTABLE_RTVIEW:
1566 pDXContext->cot.paRTView = (SVGACOTableDXRTViewEntry *)pvCOT;
1567 pDXContext->cot.cRTView = cEntries;
1568 break;
1569 case SVGA_COTABLE_DSVIEW:
1570 pDXContext->cot.paDSView = (SVGACOTableDXDSViewEntry *)pvCOT;
1571 pDXContext->cot.cDSView = cEntries;
1572 break;
1573 case SVGA_COTABLE_SRVIEW:
1574 pDXContext->cot.paSRView = (SVGACOTableDXSRViewEntry *)pvCOT;
1575 pDXContext->cot.cSRView = cEntries;
1576 break;
1577 case SVGA_COTABLE_ELEMENTLAYOUT:
1578 pDXContext->cot.paElementLayout = (SVGACOTableDXElementLayoutEntry *)pvCOT;
1579 pDXContext->cot.cElementLayout = cEntries;
1580 break;
1581 case SVGA_COTABLE_BLENDSTATE:
1582 pDXContext->cot.paBlendState = (SVGACOTableDXBlendStateEntry *)pvCOT;
1583 pDXContext->cot.cBlendState = cEntries;
1584 break;
1585 case SVGA_COTABLE_DEPTHSTENCIL:
1586 pDXContext->cot.paDepthStencil = (SVGACOTableDXDepthStencilEntry *)pvCOT;
1587 pDXContext->cot.cDepthStencil = cEntries;
1588 break;
1589 case SVGA_COTABLE_RASTERIZERSTATE:
1590 pDXContext->cot.paRasterizerState = (SVGACOTableDXRasterizerStateEntry *)pvCOT;
1591 pDXContext->cot.cRasterizerState = cEntries;
1592 break;
1593 case SVGA_COTABLE_SAMPLER:
1594 pDXContext->cot.paSampler = (SVGACOTableDXSamplerEntry *)pvCOT;
1595 pDXContext->cot.cSampler = cEntries;
1596 break;
1597 case SVGA_COTABLE_STREAMOUTPUT:
1598 pDXContext->cot.paStreamOutput = (SVGACOTableDXStreamOutputEntry *)pvCOT;
1599 pDXContext->cot.cStreamOutput = cEntries;
1600 break;
1601 case SVGA_COTABLE_DXQUERY:
1602 pDXContext->cot.paQuery = (SVGACOTableDXQueryEntry *)pvCOT;
1603 pDXContext->cot.cQuery = cEntries;
1604 break;
1605 case SVGA_COTABLE_DXSHADER:
1606 pDXContext->cot.paShader = (SVGACOTableDXShaderEntry *)pvCOT;
1607 pDXContext->cot.cShader = cEntries;
1608 break;
1609 case SVGA_COTABLE_UAVIEW:
1610 pDXContext->cot.paUAView = (SVGACOTableDXUAViewEntry *)pvCOT;
1611 pDXContext->cot.cUAView = cEntries;
1612 break;
1613 case SVGA_COTABLE_MAX: break; /* Compiler warning */
1614 }
1615 }
1616 else
1617 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
1618
1619 return rc;
1620}
1621
1622
1623int vmsvga3dDXReadbackCOTable(PVGASTATECC pThisCC, uint32_t idDXContext)
1624{
1625 int rc;
1626 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1627 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXReadbackCOTable, VERR_INVALID_STATE);
1628 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1629 AssertReturn(p3dState, VERR_INVALID_STATE);
1630
1631 PVMSVGA3DDXCONTEXT pDXContext;
1632 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1633 AssertRCReturn(rc, rc);
1634
1635 rc = pSvgaR3State->pFuncsDX->pfnDXReadbackCOTable(pThisCC, pDXContext);
1636 return rc;
1637}
1638
1639
1640int vmsvga3dDXBufferCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
1641{
1642 int rc;
1643 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1644 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBufferCopy, VERR_INVALID_STATE);
1645 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1646 AssertReturn(p3dState, VERR_INVALID_STATE);
1647
1648 PVMSVGA3DDXCONTEXT pDXContext;
1649 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1650 AssertRCReturn(rc, rc);
1651
1652 rc = pSvgaR3State->pFuncsDX->pfnDXBufferCopy(pThisCC, pDXContext);
1653 return rc;
1654}
1655
1656
1657int vmsvga3dDXTransferFromBuffer(PVGASTATECC pThisCC, uint32_t idDXContext)
1658{
1659 int rc;
1660 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1661 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXTransferFromBuffer, VERR_INVALID_STATE);
1662 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1663 AssertReturn(p3dState, VERR_INVALID_STATE);
1664
1665 PVMSVGA3DDXCONTEXT pDXContext;
1666 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1667 AssertRCReturn(rc, rc);
1668
1669 rc = pSvgaR3State->pFuncsDX->pfnDXTransferFromBuffer(pThisCC, pDXContext);
1670 return rc;
1671}
1672
1673
1674int vmsvga3dDXSurfaceCopyAndReadback(PVGASTATECC pThisCC, uint32_t idDXContext)
1675{
1676 int rc;
1677 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1678 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSurfaceCopyAndReadback, VERR_INVALID_STATE);
1679 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1680 AssertReturn(p3dState, VERR_INVALID_STATE);
1681
1682 PVMSVGA3DDXCONTEXT pDXContext;
1683 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1684 AssertRCReturn(rc, rc);
1685
1686 rc = pSvgaR3State->pFuncsDX->pfnDXSurfaceCopyAndReadback(pThisCC, pDXContext);
1687 return rc;
1688}
1689
1690
1691int vmsvga3dDXMoveQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
1692{
1693 int rc;
1694 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1695 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXMoveQuery, VERR_INVALID_STATE);
1696 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1697 AssertReturn(p3dState, VERR_INVALID_STATE);
1698
1699 PVMSVGA3DDXCONTEXT pDXContext;
1700 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1701 AssertRCReturn(rc, rc);
1702
1703 rc = pSvgaR3State->pFuncsDX->pfnDXMoveQuery(pThisCC, pDXContext);
1704 return rc;
1705}
1706
1707
1708int vmsvga3dDXBindAllQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
1709{
1710 int rc;
1711 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1712 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindAllQuery, VERR_INVALID_STATE);
1713 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1714 AssertReturn(p3dState, VERR_INVALID_STATE);
1715
1716 PVMSVGA3DDXCONTEXT pDXContext;
1717 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1718 AssertRCReturn(rc, rc);
1719
1720 rc = pSvgaR3State->pFuncsDX->pfnDXBindAllQuery(pThisCC, pDXContext);
1721 return rc;
1722}
1723
1724
1725int vmsvga3dDXReadbackAllQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
1726{
1727 int rc;
1728 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1729 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXReadbackAllQuery, VERR_INVALID_STATE);
1730 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1731 AssertReturn(p3dState, VERR_INVALID_STATE);
1732
1733 PVMSVGA3DDXCONTEXT pDXContext;
1734 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1735 AssertRCReturn(rc, rc);
1736
1737 rc = pSvgaR3State->pFuncsDX->pfnDXReadbackAllQuery(pThisCC, pDXContext);
1738 return rc;
1739}
1740
1741
1742int vmsvga3dDXPredTransferFromBuffer(PVGASTATECC pThisCC, uint32_t idDXContext)
1743{
1744 int rc;
1745 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1746 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredTransferFromBuffer, VERR_INVALID_STATE);
1747 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1748 AssertReturn(p3dState, VERR_INVALID_STATE);
1749
1750 PVMSVGA3DDXCONTEXT pDXContext;
1751 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1752 AssertRCReturn(rc, rc);
1753
1754 rc = pSvgaR3State->pFuncsDX->pfnDXPredTransferFromBuffer(pThisCC, pDXContext);
1755 return rc;
1756}
1757
1758
1759int vmsvga3dDXMobFence64(PVGASTATECC pThisCC, uint32_t idDXContext)
1760{
1761 int rc;
1762 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1763 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXMobFence64, VERR_INVALID_STATE);
1764 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1765 AssertReturn(p3dState, VERR_INVALID_STATE);
1766
1767 PVMSVGA3DDXCONTEXT pDXContext;
1768 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1769 AssertRCReturn(rc, rc);
1770
1771 rc = pSvgaR3State->pFuncsDX->pfnDXMobFence64(pThisCC, pDXContext);
1772 return rc;
1773}
1774
1775
1776int vmsvga3dDXBindAllShader(PVGASTATECC pThisCC, uint32_t idDXContext)
1777{
1778 int rc;
1779 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1780 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindAllShader, VERR_INVALID_STATE);
1781 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1782 AssertReturn(p3dState, VERR_INVALID_STATE);
1783
1784 PVMSVGA3DDXCONTEXT pDXContext;
1785 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1786 AssertRCReturn(rc, rc);
1787
1788 rc = pSvgaR3State->pFuncsDX->pfnDXBindAllShader(pThisCC, pDXContext);
1789 return rc;
1790}
1791
1792
1793int vmsvga3dDXHint(PVGASTATECC pThisCC, uint32_t idDXContext)
1794{
1795 int rc;
1796 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1797 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXHint, VERR_INVALID_STATE);
1798 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1799 AssertReturn(p3dState, VERR_INVALID_STATE);
1800
1801 PVMSVGA3DDXCONTEXT pDXContext;
1802 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1803 AssertRCReturn(rc, rc);
1804
1805 rc = pSvgaR3State->pFuncsDX->pfnDXHint(pThisCC, pDXContext);
1806 return rc;
1807}
1808
1809
1810int vmsvga3dDXBufferUpdate(PVGASTATECC pThisCC, uint32_t idDXContext)
1811{
1812 int rc;
1813 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1814 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBufferUpdate, VERR_INVALID_STATE);
1815 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1816 AssertReturn(p3dState, VERR_INVALID_STATE);
1817
1818 PVMSVGA3DDXCONTEXT pDXContext;
1819 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1820 AssertRCReturn(rc, rc);
1821
1822 rc = pSvgaR3State->pFuncsDX->pfnDXBufferUpdate(pThisCC, pDXContext);
1823 return rc;
1824}
1825
1826
1827int vmsvga3dDXSetVSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
1828{
1829 int rc;
1830 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1831 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetVSConstantBufferOffset, VERR_INVALID_STATE);
1832 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1833 AssertReturn(p3dState, VERR_INVALID_STATE);
1834
1835 PVMSVGA3DDXCONTEXT pDXContext;
1836 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1837 AssertRCReturn(rc, rc);
1838
1839 rc = pSvgaR3State->pFuncsDX->pfnDXSetVSConstantBufferOffset(pThisCC, pDXContext);
1840 return rc;
1841}
1842
1843
1844int vmsvga3dDXSetPSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
1845{
1846 int rc;
1847 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1848 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetPSConstantBufferOffset, VERR_INVALID_STATE);
1849 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1850 AssertReturn(p3dState, VERR_INVALID_STATE);
1851
1852 PVMSVGA3DDXCONTEXT pDXContext;
1853 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1854 AssertRCReturn(rc, rc);
1855
1856 rc = pSvgaR3State->pFuncsDX->pfnDXSetPSConstantBufferOffset(pThisCC, pDXContext);
1857 return rc;
1858}
1859
1860
1861int vmsvga3dDXSetGSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
1862{
1863 int rc;
1864 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1865 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetGSConstantBufferOffset, VERR_INVALID_STATE);
1866 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1867 AssertReturn(p3dState, VERR_INVALID_STATE);
1868
1869 PVMSVGA3DDXCONTEXT pDXContext;
1870 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1871 AssertRCReturn(rc, rc);
1872
1873 rc = pSvgaR3State->pFuncsDX->pfnDXSetGSConstantBufferOffset(pThisCC, pDXContext);
1874 return rc;
1875}
1876
1877
1878int vmsvga3dDXSetHSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
1879{
1880 int rc;
1881 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1882 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetHSConstantBufferOffset, VERR_INVALID_STATE);
1883 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1884 AssertReturn(p3dState, VERR_INVALID_STATE);
1885
1886 PVMSVGA3DDXCONTEXT pDXContext;
1887 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1888 AssertRCReturn(rc, rc);
1889
1890 rc = pSvgaR3State->pFuncsDX->pfnDXSetHSConstantBufferOffset(pThisCC, pDXContext);
1891 return rc;
1892}
1893
1894
1895int vmsvga3dDXSetDSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
1896{
1897 int rc;
1898 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1899 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetDSConstantBufferOffset, VERR_INVALID_STATE);
1900 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1901 AssertReturn(p3dState, VERR_INVALID_STATE);
1902
1903 PVMSVGA3DDXCONTEXT pDXContext;
1904 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1905 AssertRCReturn(rc, rc);
1906
1907 rc = pSvgaR3State->pFuncsDX->pfnDXSetDSConstantBufferOffset(pThisCC, pDXContext);
1908 return rc;
1909}
1910
1911
1912int vmsvga3dDXSetCSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
1913{
1914 int rc;
1915 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1916 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetCSConstantBufferOffset, VERR_INVALID_STATE);
1917 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1918 AssertReturn(p3dState, VERR_INVALID_STATE);
1919
1920 PVMSVGA3DDXCONTEXT pDXContext;
1921 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1922 AssertRCReturn(rc, rc);
1923
1924 rc = pSvgaR3State->pFuncsDX->pfnDXSetCSConstantBufferOffset(pThisCC, pDXContext);
1925 return rc;
1926}
1927
1928
1929int vmsvga3dDXCondBindAllShader(PVGASTATECC pThisCC, uint32_t idDXContext)
1930{
1931 int rc;
1932 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1933 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXCondBindAllShader, VERR_INVALID_STATE);
1934 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1935 AssertReturn(p3dState, VERR_INVALID_STATE);
1936
1937 PVMSVGA3DDXCONTEXT pDXContext;
1938 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1939 AssertRCReturn(rc, rc);
1940
1941 rc = pSvgaR3State->pFuncsDX->pfnDXCondBindAllShader(pThisCC, pDXContext);
1942 return rc;
1943}
1944
1945
1946int vmsvga3dScreenCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
1947{
1948 int rc;
1949 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1950 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnScreenCopy, VERR_INVALID_STATE);
1951 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1952 AssertReturn(p3dState, VERR_INVALID_STATE);
1953
1954 PVMSVGA3DDXCONTEXT pDXContext;
1955 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1956 AssertRCReturn(rc, rc);
1957
1958 rc = pSvgaR3State->pFuncsDX->pfnScreenCopy(pThisCC, pDXContext);
1959 return rc;
1960}
1961
1962
1963int vmsvga3dGrowOTable(PVGASTATECC pThisCC, uint32_t idDXContext)
1964{
1965 int rc;
1966 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1967 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnGrowOTable, VERR_INVALID_STATE);
1968 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1969 AssertReturn(p3dState, VERR_INVALID_STATE);
1970
1971 PVMSVGA3DDXCONTEXT pDXContext;
1972 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1973 AssertRCReturn(rc, rc);
1974
1975 rc = pSvgaR3State->pFuncsDX->pfnGrowOTable(pThisCC, pDXContext);
1976 return rc;
1977}
1978
1979
1980int vmsvga3dDXGrowCOTable(PVGASTATECC pThisCC, uint32_t idDXContext)
1981{
1982 int rc;
1983 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1984 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXGrowCOTable, VERR_INVALID_STATE);
1985 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1986 AssertReturn(p3dState, VERR_INVALID_STATE);
1987
1988 PVMSVGA3DDXCONTEXT pDXContext;
1989 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1990 AssertRCReturn(rc, rc);
1991
1992 rc = pSvgaR3State->pFuncsDX->pfnDXGrowCOTable(pThisCC, pDXContext);
1993 return rc;
1994}
1995
1996
1997int vmsvga3dIntraSurfaceCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
1998{
1999 int rc;
2000 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2001 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnIntraSurfaceCopy, VERR_INVALID_STATE);
2002 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2003 AssertReturn(p3dState, VERR_INVALID_STATE);
2004
2005 PVMSVGA3DDXCONTEXT pDXContext;
2006 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2007 AssertRCReturn(rc, rc);
2008
2009 rc = pSvgaR3State->pFuncsDX->pfnIntraSurfaceCopy(pThisCC, pDXContext);
2010 return rc;
2011}
2012
2013
2014int vmsvga3dDefineGBSurface_v3(PVGASTATECC pThisCC, uint32_t idDXContext)
2015{
2016 int rc;
2017 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2018 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v3, VERR_INVALID_STATE);
2019 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2020 AssertReturn(p3dState, VERR_INVALID_STATE);
2021
2022 PVMSVGA3DDXCONTEXT pDXContext;
2023 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2024 AssertRCReturn(rc, rc);
2025
2026 rc = pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v3(pThisCC, pDXContext);
2027 return rc;
2028}
2029
2030
2031int vmsvga3dDXResolveCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2032{
2033 int rc;
2034 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2035 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXResolveCopy, VERR_INVALID_STATE);
2036 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2037 AssertReturn(p3dState, VERR_INVALID_STATE);
2038
2039 PVMSVGA3DDXCONTEXT pDXContext;
2040 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2041 AssertRCReturn(rc, rc);
2042
2043 rc = pSvgaR3State->pFuncsDX->pfnDXResolveCopy(pThisCC, pDXContext);
2044 return rc;
2045}
2046
2047
2048int vmsvga3dDXPredResolveCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2049{
2050 int rc;
2051 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2052 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredResolveCopy, VERR_INVALID_STATE);
2053 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2054 AssertReturn(p3dState, VERR_INVALID_STATE);
2055
2056 PVMSVGA3DDXCONTEXT pDXContext;
2057 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2058 AssertRCReturn(rc, rc);
2059
2060 rc = pSvgaR3State->pFuncsDX->pfnDXPredResolveCopy(pThisCC, pDXContext);
2061 return rc;
2062}
2063
2064
2065int vmsvga3dDXPredConvertRegion(PVGASTATECC pThisCC, uint32_t idDXContext)
2066{
2067 int rc;
2068 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2069 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredConvertRegion, VERR_INVALID_STATE);
2070 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2071 AssertReturn(p3dState, VERR_INVALID_STATE);
2072
2073 PVMSVGA3DDXCONTEXT pDXContext;
2074 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2075 AssertRCReturn(rc, rc);
2076
2077 rc = pSvgaR3State->pFuncsDX->pfnDXPredConvertRegion(pThisCC, pDXContext);
2078 return rc;
2079}
2080
2081
2082int vmsvga3dDXPredConvert(PVGASTATECC pThisCC, uint32_t idDXContext)
2083{
2084 int rc;
2085 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2086 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredConvert, VERR_INVALID_STATE);
2087 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2088 AssertReturn(p3dState, VERR_INVALID_STATE);
2089
2090 PVMSVGA3DDXCONTEXT pDXContext;
2091 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2092 AssertRCReturn(rc, rc);
2093
2094 rc = pSvgaR3State->pFuncsDX->pfnDXPredConvert(pThisCC, pDXContext);
2095 return rc;
2096}
2097
2098
2099int vmsvga3dWholeSurfaceCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2100{
2101 int rc;
2102 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2103 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnWholeSurfaceCopy, VERR_INVALID_STATE);
2104 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2105 AssertReturn(p3dState, VERR_INVALID_STATE);
2106
2107 PVMSVGA3DDXCONTEXT pDXContext;
2108 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2109 AssertRCReturn(rc, rc);
2110
2111 rc = pSvgaR3State->pFuncsDX->pfnWholeSurfaceCopy(pThisCC, pDXContext);
2112 return rc;
2113}
2114
2115
2116int vmsvga3dDXDefineUAView(PVGASTATECC pThisCC, uint32_t idDXContext)
2117{
2118 int rc;
2119 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2120 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineUAView, VERR_INVALID_STATE);
2121 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2122 AssertReturn(p3dState, VERR_INVALID_STATE);
2123
2124 PVMSVGA3DDXCONTEXT pDXContext;
2125 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2126 AssertRCReturn(rc, rc);
2127
2128 rc = pSvgaR3State->pFuncsDX->pfnDXDefineUAView(pThisCC, pDXContext);
2129 return rc;
2130}
2131
2132
2133int vmsvga3dDXDestroyUAView(PVGASTATECC pThisCC, uint32_t idDXContext)
2134{
2135 int rc;
2136 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2137 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyUAView, VERR_INVALID_STATE);
2138 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2139 AssertReturn(p3dState, VERR_INVALID_STATE);
2140
2141 PVMSVGA3DDXCONTEXT pDXContext;
2142 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2143 AssertRCReturn(rc, rc);
2144
2145 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyUAView(pThisCC, pDXContext);
2146 return rc;
2147}
2148
2149
2150int vmsvga3dDXClearUAViewUint(PVGASTATECC pThisCC, uint32_t idDXContext)
2151{
2152 int rc;
2153 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2154 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearUAViewUint, VERR_INVALID_STATE);
2155 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2156 AssertReturn(p3dState, VERR_INVALID_STATE);
2157
2158 PVMSVGA3DDXCONTEXT pDXContext;
2159 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2160 AssertRCReturn(rc, rc);
2161
2162 rc = pSvgaR3State->pFuncsDX->pfnDXClearUAViewUint(pThisCC, pDXContext);
2163 return rc;
2164}
2165
2166
2167int vmsvga3dDXClearUAViewFloat(PVGASTATECC pThisCC, uint32_t idDXContext)
2168{
2169 int rc;
2170 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2171 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearUAViewFloat, VERR_INVALID_STATE);
2172 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2173 AssertReturn(p3dState, VERR_INVALID_STATE);
2174
2175 PVMSVGA3DDXCONTEXT pDXContext;
2176 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2177 AssertRCReturn(rc, rc);
2178
2179 rc = pSvgaR3State->pFuncsDX->pfnDXClearUAViewFloat(pThisCC, pDXContext);
2180 return rc;
2181}
2182
2183
2184int vmsvga3dDXCopyStructureCount(PVGASTATECC pThisCC, uint32_t idDXContext)
2185{
2186 int rc;
2187 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2188 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXCopyStructureCount, VERR_INVALID_STATE);
2189 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2190 AssertReturn(p3dState, VERR_INVALID_STATE);
2191
2192 PVMSVGA3DDXCONTEXT pDXContext;
2193 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2194 AssertRCReturn(rc, rc);
2195
2196 rc = pSvgaR3State->pFuncsDX->pfnDXCopyStructureCount(pThisCC, pDXContext);
2197 return rc;
2198}
2199
2200
2201int vmsvga3dDXSetUAViews(PVGASTATECC pThisCC, uint32_t idDXContext)
2202{
2203 int rc;
2204 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2205 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetUAViews, VERR_INVALID_STATE);
2206 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2207 AssertReturn(p3dState, VERR_INVALID_STATE);
2208
2209 PVMSVGA3DDXCONTEXT pDXContext;
2210 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2211 AssertRCReturn(rc, rc);
2212
2213 rc = pSvgaR3State->pFuncsDX->pfnDXSetUAViews(pThisCC, pDXContext);
2214 return rc;
2215}
2216
2217
2218int vmsvga3dDXDrawIndexedInstancedIndirect(PVGASTATECC pThisCC, uint32_t idDXContext)
2219{
2220 int rc;
2221 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2222 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstancedIndirect, VERR_INVALID_STATE);
2223 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2224 AssertReturn(p3dState, VERR_INVALID_STATE);
2225
2226 PVMSVGA3DDXCONTEXT pDXContext;
2227 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2228 AssertRCReturn(rc, rc);
2229
2230 rc = pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstancedIndirect(pThisCC, pDXContext);
2231 return rc;
2232}
2233
2234
2235int vmsvga3dDXDrawInstancedIndirect(PVGASTATECC pThisCC, uint32_t idDXContext)
2236{
2237 int rc;
2238 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2239 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawInstancedIndirect, VERR_INVALID_STATE);
2240 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2241 AssertReturn(p3dState, VERR_INVALID_STATE);
2242
2243 PVMSVGA3DDXCONTEXT pDXContext;
2244 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2245 AssertRCReturn(rc, rc);
2246
2247 rc = pSvgaR3State->pFuncsDX->pfnDXDrawInstancedIndirect(pThisCC, pDXContext);
2248 return rc;
2249}
2250
2251
2252int vmsvga3dDXDispatch(PVGASTATECC pThisCC, uint32_t idDXContext)
2253{
2254 int rc;
2255 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2256 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDispatch, VERR_INVALID_STATE);
2257 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2258 AssertReturn(p3dState, VERR_INVALID_STATE);
2259
2260 PVMSVGA3DDXCONTEXT pDXContext;
2261 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2262 AssertRCReturn(rc, rc);
2263
2264 rc = pSvgaR3State->pFuncsDX->pfnDXDispatch(pThisCC, pDXContext);
2265 return rc;
2266}
2267
2268
2269int vmsvga3dDXDispatchIndirect(PVGASTATECC pThisCC, uint32_t idDXContext)
2270{
2271 int rc;
2272 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2273 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDispatchIndirect, VERR_INVALID_STATE);
2274 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2275 AssertReturn(p3dState, VERR_INVALID_STATE);
2276
2277 PVMSVGA3DDXCONTEXT pDXContext;
2278 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2279 AssertRCReturn(rc, rc);
2280
2281 rc = pSvgaR3State->pFuncsDX->pfnDXDispatchIndirect(pThisCC, pDXContext);
2282 return rc;
2283}
2284
2285
2286int vmsvga3dWriteZeroSurface(PVGASTATECC pThisCC, uint32_t idDXContext)
2287{
2288 int rc;
2289 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2290 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnWriteZeroSurface, VERR_INVALID_STATE);
2291 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2292 AssertReturn(p3dState, VERR_INVALID_STATE);
2293
2294 PVMSVGA3DDXCONTEXT pDXContext;
2295 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2296 AssertRCReturn(rc, rc);
2297
2298 rc = pSvgaR3State->pFuncsDX->pfnWriteZeroSurface(pThisCC, pDXContext);
2299 return rc;
2300}
2301
2302
2303int vmsvga3dHintZeroSurface(PVGASTATECC pThisCC, uint32_t idDXContext)
2304{
2305 int rc;
2306 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2307 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnHintZeroSurface, VERR_INVALID_STATE);
2308 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2309 AssertReturn(p3dState, VERR_INVALID_STATE);
2310
2311 PVMSVGA3DDXCONTEXT pDXContext;
2312 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2313 AssertRCReturn(rc, rc);
2314
2315 rc = pSvgaR3State->pFuncsDX->pfnHintZeroSurface(pThisCC, pDXContext);
2316 return rc;
2317}
2318
2319
2320int vmsvga3dDXTransferToBuffer(PVGASTATECC pThisCC, uint32_t idDXContext)
2321{
2322 int rc;
2323 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2324 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXTransferToBuffer, VERR_INVALID_STATE);
2325 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2326 AssertReturn(p3dState, VERR_INVALID_STATE);
2327
2328 PVMSVGA3DDXCONTEXT pDXContext;
2329 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2330 AssertRCReturn(rc, rc);
2331
2332 rc = pSvgaR3State->pFuncsDX->pfnDXTransferToBuffer(pThisCC, pDXContext);
2333 return rc;
2334}
2335
2336
2337int vmsvga3dDXSetStructureCount(PVGASTATECC pThisCC, uint32_t idDXContext)
2338{
2339 int rc;
2340 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2341 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetStructureCount, VERR_INVALID_STATE);
2342 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2343 AssertReturn(p3dState, VERR_INVALID_STATE);
2344
2345 PVMSVGA3DDXCONTEXT pDXContext;
2346 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2347 AssertRCReturn(rc, rc);
2348
2349 rc = pSvgaR3State->pFuncsDX->pfnDXSetStructureCount(pThisCC, pDXContext);
2350 return rc;
2351}
2352
2353
2354int vmsvga3dLogicOpsBitBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
2355{
2356 int rc;
2357 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2358 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsBitBlt, VERR_INVALID_STATE);
2359 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2360 AssertReturn(p3dState, VERR_INVALID_STATE);
2361
2362 PVMSVGA3DDXCONTEXT pDXContext;
2363 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2364 AssertRCReturn(rc, rc);
2365
2366 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsBitBlt(pThisCC, pDXContext);
2367 return rc;
2368}
2369
2370
2371int vmsvga3dLogicOpsTransBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
2372{
2373 int rc;
2374 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2375 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsTransBlt, VERR_INVALID_STATE);
2376 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2377 AssertReturn(p3dState, VERR_INVALID_STATE);
2378
2379 PVMSVGA3DDXCONTEXT pDXContext;
2380 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2381 AssertRCReturn(rc, rc);
2382
2383 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsTransBlt(pThisCC, pDXContext);
2384 return rc;
2385}
2386
2387
2388int vmsvga3dLogicOpsStretchBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
2389{
2390 int rc;
2391 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2392 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsStretchBlt, VERR_INVALID_STATE);
2393 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2394 AssertReturn(p3dState, VERR_INVALID_STATE);
2395
2396 PVMSVGA3DDXCONTEXT pDXContext;
2397 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2398 AssertRCReturn(rc, rc);
2399
2400 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsStretchBlt(pThisCC, pDXContext);
2401 return rc;
2402}
2403
2404
2405int vmsvga3dLogicOpsColorFill(PVGASTATECC pThisCC, uint32_t idDXContext)
2406{
2407 int rc;
2408 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2409 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsColorFill, VERR_INVALID_STATE);
2410 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2411 AssertReturn(p3dState, VERR_INVALID_STATE);
2412
2413 PVMSVGA3DDXCONTEXT pDXContext;
2414 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2415 AssertRCReturn(rc, rc);
2416
2417 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsColorFill(pThisCC, pDXContext);
2418 return rc;
2419}
2420
2421
2422int vmsvga3dLogicOpsAlphaBlend(PVGASTATECC pThisCC, uint32_t idDXContext)
2423{
2424 int rc;
2425 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2426 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsAlphaBlend, VERR_INVALID_STATE);
2427 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2428 AssertReturn(p3dState, VERR_INVALID_STATE);
2429
2430 PVMSVGA3DDXCONTEXT pDXContext;
2431 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2432 AssertRCReturn(rc, rc);
2433
2434 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsAlphaBlend(pThisCC, pDXContext);
2435 return rc;
2436}
2437
2438
2439int vmsvga3dLogicOpsClearTypeBlend(PVGASTATECC pThisCC, uint32_t idDXContext)
2440{
2441 int rc;
2442 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2443 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsClearTypeBlend, VERR_INVALID_STATE);
2444 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2445 AssertReturn(p3dState, VERR_INVALID_STATE);
2446
2447 PVMSVGA3DDXCONTEXT pDXContext;
2448 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2449 AssertRCReturn(rc, rc);
2450
2451 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsClearTypeBlend(pThisCC, pDXContext);
2452 return rc;
2453}
2454
2455
2456int vmsvga3dDefineGBSurface_v4(PVGASTATECC pThisCC, uint32_t idDXContext)
2457{
2458 int rc;
2459 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2460 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v4, VERR_INVALID_STATE);
2461 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2462 AssertReturn(p3dState, VERR_INVALID_STATE);
2463
2464 PVMSVGA3DDXCONTEXT pDXContext;
2465 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2466 AssertRCReturn(rc, rc);
2467
2468 rc = pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v4(pThisCC, pDXContext);
2469 return rc;
2470}
2471
2472
2473int vmsvga3dDXSetCSUAViews(PVGASTATECC pThisCC, uint32_t idDXContext)
2474{
2475 int rc;
2476 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2477 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetCSUAViews, VERR_INVALID_STATE);
2478 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2479 AssertReturn(p3dState, VERR_INVALID_STATE);
2480
2481 PVMSVGA3DDXCONTEXT pDXContext;
2482 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2483 AssertRCReturn(rc, rc);
2484
2485 rc = pSvgaR3State->pFuncsDX->pfnDXSetCSUAViews(pThisCC, pDXContext);
2486 return rc;
2487}
2488
2489
2490int vmsvga3dDXSetMinLOD(PVGASTATECC pThisCC, uint32_t idDXContext)
2491{
2492 int rc;
2493 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2494 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetMinLOD, VERR_INVALID_STATE);
2495 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2496 AssertReturn(p3dState, VERR_INVALID_STATE);
2497
2498 PVMSVGA3DDXCONTEXT pDXContext;
2499 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2500 AssertRCReturn(rc, rc);
2501
2502 rc = pSvgaR3State->pFuncsDX->pfnDXSetMinLOD(pThisCC, pDXContext);
2503 return rc;
2504}
2505
2506
2507int vmsvga3dDXDefineDepthStencilView_v2(PVGASTATECC pThisCC, uint32_t idDXContext)
2508{
2509 int rc;
2510 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2511 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilView_v2, VERR_INVALID_STATE);
2512 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2513 AssertReturn(p3dState, VERR_INVALID_STATE);
2514
2515 PVMSVGA3DDXCONTEXT pDXContext;
2516 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2517 AssertRCReturn(rc, rc);
2518
2519 rc = pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilView_v2(pThisCC, pDXContext);
2520 return rc;
2521}
2522
2523
2524int vmsvga3dDXDefineStreamOutputWithMob(PVGASTATECC pThisCC, uint32_t idDXContext)
2525{
2526 int rc;
2527 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2528 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutputWithMob, VERR_INVALID_STATE);
2529 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2530 AssertReturn(p3dState, VERR_INVALID_STATE);
2531
2532 PVMSVGA3DDXCONTEXT pDXContext;
2533 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2534 AssertRCReturn(rc, rc);
2535
2536 rc = pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutputWithMob(pThisCC, pDXContext);
2537 return rc;
2538}
2539
2540
2541int vmsvga3dDXSetShaderIface(PVGASTATECC pThisCC, uint32_t idDXContext)
2542{
2543 int rc;
2544 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2545 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetShaderIface, VERR_INVALID_STATE);
2546 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2547 AssertReturn(p3dState, VERR_INVALID_STATE);
2548
2549 PVMSVGA3DDXCONTEXT pDXContext;
2550 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2551 AssertRCReturn(rc, rc);
2552
2553 rc = pSvgaR3State->pFuncsDX->pfnDXSetShaderIface(pThisCC, pDXContext);
2554 return rc;
2555}
2556
2557
2558int vmsvga3dDXBindStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext)
2559{
2560 int rc;
2561 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2562 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindStreamOutput, VERR_INVALID_STATE);
2563 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2564 AssertReturn(p3dState, VERR_INVALID_STATE);
2565
2566 PVMSVGA3DDXCONTEXT pDXContext;
2567 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2568 AssertRCReturn(rc, rc);
2569
2570 rc = pSvgaR3State->pFuncsDX->pfnDXBindStreamOutput(pThisCC, pDXContext);
2571 return rc;
2572}
2573
2574
2575int vmsvga3dSurfaceStretchBltNonMSToMS(PVGASTATECC pThisCC, uint32_t idDXContext)
2576{
2577 int rc;
2578 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2579 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnSurfaceStretchBltNonMSToMS, VERR_INVALID_STATE);
2580 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2581 AssertReturn(p3dState, VERR_INVALID_STATE);
2582
2583 PVMSVGA3DDXCONTEXT pDXContext;
2584 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2585 AssertRCReturn(rc, rc);
2586
2587 rc = pSvgaR3State->pFuncsDX->pfnSurfaceStretchBltNonMSToMS(pThisCC, pDXContext);
2588 return rc;
2589}
2590
2591
2592int vmsvga3dDXBindShaderIface(PVGASTATECC pThisCC, uint32_t idDXContext)
2593{
2594 int rc;
2595 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2596 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindShaderIface, VERR_INVALID_STATE);
2597 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2598 AssertReturn(p3dState, VERR_INVALID_STATE);
2599
2600 PVMSVGA3DDXCONTEXT pDXContext;
2601 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2602 AssertRCReturn(rc, rc);
2603
2604 rc = pSvgaR3State->pFuncsDX->pfnDXBindShaderIface(pThisCC, pDXContext);
2605 return rc;
2606}
2607
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