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source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-dx.cpp@ 88803

Last change on this file since 88803 was 88803, checked in by vboxsync, 4 years ago

Devices/Graphics: more DX commands; disassemble shaders for debug log. bugref:9830
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1/* $Id: DevVGA-SVGA3d-dx.cpp 88803 2021-04-30 13:23:05Z vboxsync $ */
2/** @file
3 * DevSVGA3d - VMWare SVGA device, 3D parts - Common code for DX backend interface.
4 */
5
6/*
7 * Copyright (C) 2020-2021 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
23#include <VBox/AssertGuest.h>
24#include <iprt/errcore.h>
25#include <VBox/log.h>
26#include <VBox/vmm/pdmdev.h>
27
28#include <iprt/assert.h>
29#include <iprt/mem.h>
30
31#include <VBoxVideo.h> /* required by DevVGA.h */
32
33/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
34#include "DevVGA.h"
35
36#include "DevVGA-SVGA.h"
37#include "DevVGA-SVGA3d.h"
38#include "DevVGA-SVGA3d-internal.h"
39#include "DevVGA-SVGA-internal.h"
40
41
42int vmsvga3dDXUnbindContext(PVGASTATECC pThisCC, uint32_t cid, SVGADXContextMobFormat *pSvgaDXContext)
43{
44 int rc;
45 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
46 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindContext, VERR_INVALID_STATE);
47 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
48 AssertReturn(p3dState, VERR_INVALID_STATE);
49
50 PVMSVGA3DDXCONTEXT pDXContext;
51 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
52 AssertRCReturn(rc, rc);
53
54 /* Copy the host structure back to the guest memory. */
55 memcpy(pSvgaDXContext, &pDXContext->svgaDXContext, sizeof(*pSvgaDXContext));
56
57 return rc;
58}
59
60
61/**
62 * Create a new 3D DX context.
63 *
64 * @returns VBox status code.
65 * @param pThisCC The VGA/VMSVGA state for ring-3.
66 * @param cid Context id to be created.
67 */
68int vmsvga3dDXDefineContext(PVGASTATECC pThisCC, uint32_t cid)
69{
70 int rc;
71 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
72 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineContext, VERR_INVALID_STATE);
73 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
74 AssertReturn(p3dState, VERR_INVALID_STATE);
75
76 PVMSVGA3DDXCONTEXT pDXContext;
77
78 LogFunc(("cid %d\n", cid));
79
80 AssertReturn(cid < SVGA3D_MAX_CONTEXT_IDS, VERR_INVALID_PARAMETER);
81
82 if (cid >= p3dState->cDXContexts)
83 {
84 /* Grow the array. */
85 uint32_t cNew = RT_ALIGN(cid + 15, 16);
86 void *pvNew = RTMemRealloc(p3dState->papDXContexts, sizeof(p3dState->papDXContexts[0]) * cNew);
87 AssertReturn(pvNew, VERR_NO_MEMORY);
88 p3dState->papDXContexts = (PVMSVGA3DDXCONTEXT *)pvNew;
89 while (p3dState->cDXContexts < cNew)
90 {
91 pDXContext = (PVMSVGA3DDXCONTEXT)RTMemAllocZ(sizeof(*pDXContext));
92 AssertReturn(pDXContext, VERR_NO_MEMORY);
93 pDXContext->cid = SVGA3D_INVALID_ID;
94 p3dState->papDXContexts[p3dState->cDXContexts++] = pDXContext;
95 }
96 }
97 /* If one already exists with this id, then destroy it now. */
98 if (p3dState->papDXContexts[cid]->cid != SVGA3D_INVALID_ID)
99 vmsvga3dDXDestroyContext(pThisCC, cid);
100
101 pDXContext = p3dState->papDXContexts[cid];
102 memset(pDXContext, 0, sizeof(*pDXContext));
103 pDXContext->cid = cid;
104
105 /* Init the backend specific data. */
106 rc = pSvgaR3State->pFuncsDX->pfnDXDefineContext(pThisCC, pDXContext);
107
108 /* Cleanup on failure. */
109 if (RT_FAILURE(rc))
110 vmsvga3dDXDestroyContext(pThisCC, cid);
111
112 return rc;
113}
114
115
116int vmsvga3dDXDestroyContext(PVGASTATECC pThisCC, uint32_t cid)
117{
118 int rc;
119 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
120 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyContext, VERR_INVALID_STATE);
121 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
122 AssertReturn(p3dState, VERR_INVALID_STATE);
123
124 PVMSVGA3DDXCONTEXT pDXContext;
125 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
126 AssertRCReturn(rc, rc);
127
128 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyContext(pThisCC, pDXContext);
129 return rc;
130}
131
132
133int vmsvga3dDXBindContext(PVGASTATECC pThisCC, uint32_t cid, SVGADXContextMobFormat *pSvgaDXContext)
134{
135 int rc;
136 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
137 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindContext, VERR_INVALID_STATE);
138 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
139 AssertReturn(p3dState, VERR_INVALID_STATE);
140
141 PVMSVGA3DDXCONTEXT pDXContext;
142 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
143 AssertRCReturn(rc, rc);
144
145 if (pSvgaDXContext)
146 memcpy(&pDXContext->svgaDXContext, pSvgaDXContext, sizeof(*pSvgaDXContext));
147
148 rc = pSvgaR3State->pFuncsDX->pfnDXBindContext(pThisCC, pDXContext);
149 return rc;
150}
151
152
153int vmsvga3dDXReadbackContext(PVGASTATECC pThisCC, uint32_t idDXContext)
154{
155 int rc;
156 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
157 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXReadbackContext, VERR_INVALID_STATE);
158 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
159 AssertReturn(p3dState, VERR_INVALID_STATE);
160
161 PVMSVGA3DDXCONTEXT pDXContext;
162 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
163 AssertRCReturn(rc, rc);
164
165 rc = pSvgaR3State->pFuncsDX->pfnDXReadbackContext(pThisCC, pDXContext);
166 return rc;
167}
168
169
170int vmsvga3dDXInvalidateContext(PVGASTATECC pThisCC, uint32_t idDXContext)
171{
172 int rc;
173 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
174 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXInvalidateContext, VERR_INVALID_STATE);
175 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
176 AssertReturn(p3dState, VERR_INVALID_STATE);
177
178 PVMSVGA3DDXCONTEXT pDXContext;
179 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
180 AssertRCReturn(rc, rc);
181
182 rc = pSvgaR3State->pFuncsDX->pfnDXInvalidateContext(pThisCC, pDXContext);
183 return rc;
184}
185
186
187int vmsvga3dDXSetSingleConstantBuffer(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetSingleConstantBuffer const *pCmd)
188{
189 int rc;
190 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
191 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetSingleConstantBuffer, VERR_INVALID_STATE);
192 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
193 AssertReturn(p3dState, VERR_INVALID_STATE);
194
195 PVMSVGA3DDXCONTEXT pDXContext;
196 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
197 AssertRCReturn(rc, rc);
198
199 ASSERT_GUEST_RETURN(pCmd->slot < SVGA3D_DX_MAX_CONSTBUFFERS, VERR_INVALID_PARAMETER);
200 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
201 RT_UNTRUSTED_VALIDATED_FENCE();
202
203 rc = pSvgaR3State->pFuncsDX->pfnDXSetSingleConstantBuffer(pThisCC, pDXContext, pCmd->slot, pCmd->type, pCmd->sid, pCmd->offsetInBytes, pCmd->sizeInBytes);
204 return rc;
205}
206
207
208int vmsvga3dDXSetShaderResources(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetShaderResources const *pCmd, uint32_t cShaderResourceViewId, SVGA3dShaderResourceViewId const *paShaderResourceViewId)
209{
210 int rc;
211 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
212 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetShaderResources, VERR_INVALID_STATE);
213 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
214 AssertReturn(p3dState, VERR_INVALID_STATE);
215
216 PVMSVGA3DDXCONTEXT pDXContext;
217 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
218 AssertRCReturn(rc, rc);
219
220 ASSERT_GUEST_RETURN(pCmd->startView < SVGA3D_DX_MAX_SRVIEWS, VERR_INVALID_PARAMETER);
221 ASSERT_GUEST_RETURN(cShaderResourceViewId <= SVGA3D_DX_MAX_SRVIEWS - pCmd->startView, VERR_INVALID_PARAMETER);
222 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
223 ASSERT_GUEST_RETURN(pDXContext->cot.paSRView, VERR_INVALID_STATE);
224 for (uint32_t i = 0; i < cShaderResourceViewId; ++i)
225 ASSERT_GUEST_RETURN( paShaderResourceViewId[i] < pDXContext->cot.cSRView
226 || paShaderResourceViewId[i] == SVGA3D_INVALID_ID, VERR_INVALID_PARAMETER);
227 RT_UNTRUSTED_VALIDATED_FENCE();
228
229 rc = pSvgaR3State->pFuncsDX->pfnDXSetShaderResources(pThisCC, pDXContext, pCmd->startView, pCmd->type, cShaderResourceViewId, paShaderResourceViewId);
230 return rc;
231}
232
233
234int vmsvga3dDXSetShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetShader const *pCmd)
235{
236 int rc;
237 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
238 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetShader, VERR_INVALID_STATE);
239 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
240 AssertReturn(p3dState, VERR_INVALID_STATE);
241
242 PVMSVGA3DDXCONTEXT pDXContext;
243 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
244 AssertRCReturn(rc, rc);
245
246 ASSERT_GUEST_RETURN(pCmd->shaderId < pDXContext->cot.cShader, VERR_INVALID_PARAMETER);
247 RT_UNTRUSTED_VALIDATED_FENCE();
248
249 SVGACOTableDXShaderEntry *pEntry = &pDXContext->cot.paShader[pCmd->shaderId];
250 ASSERT_GUEST_RETURN(pEntry->type == pCmd->type, VERR_INVALID_PARAMETER);
251 RT_UNTRUSTED_VALIDATED_FENCE();
252
253 PVMSVGA3DSHADER pShader = &pDXContext->paShader[pCmd->shaderId];
254 rc = pSvgaR3State->pFuncsDX->pfnDXSetShader(pThisCC, pDXContext, pShader);
255 return rc;
256}
257
258
259int vmsvga3dDXSetSamplers(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetSamplers const *pCmd, uint32_t cSamplerId, SVGA3dSamplerId const *paSamplerId)
260{
261 int rc;
262 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
263 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetSamplers, VERR_INVALID_STATE);
264 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
265 AssertReturn(p3dState, VERR_INVALID_STATE);
266
267 PVMSVGA3DDXCONTEXT pDXContext;
268 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
269 AssertRCReturn(rc, rc);
270
271 ASSERT_GUEST_RETURN(pCmd->startSampler < SVGA3D_DX_MAX_SAMPLERS, VERR_INVALID_PARAMETER);
272 ASSERT_GUEST_RETURN(cSamplerId <= SVGA3D_DX_MAX_SAMPLERS - pCmd->startSampler, VERR_INVALID_PARAMETER);
273 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
274 ASSERT_GUEST_RETURN(pDXContext->cot.paSampler, VERR_INVALID_STATE);
275 for (uint32_t i = 0; i < cSamplerId; ++i)
276 ASSERT_GUEST_RETURN(paSamplerId[i] < pDXContext->cot.cSampler, VERR_INVALID_PARAMETER);
277 RT_UNTRUSTED_VALIDATED_FENCE();
278
279 rc = pSvgaR3State->pFuncsDX->pfnDXSetSamplers(pThisCC, pDXContext, pCmd->startSampler, pCmd->type, cSamplerId, paSamplerId);
280 return rc;
281}
282
283
284int vmsvga3dDXDraw(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDraw const *pCmd)
285{
286 int rc;
287 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
288 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDraw, VERR_INVALID_STATE);
289 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
290 AssertReturn(p3dState, VERR_INVALID_STATE);
291
292 PVMSVGA3DDXCONTEXT pDXContext;
293 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
294 AssertRCReturn(rc, rc);
295
296 rc = pSvgaR3State->pFuncsDX->pfnDXDraw(pThisCC, pDXContext, pCmd->vertexCount, pCmd->startVertexLocation);
297 return rc;
298}
299
300
301int vmsvga3dDXDrawIndexed(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawIndexed const *pCmd)
302{
303 int rc;
304 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
305 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawIndexed, VERR_INVALID_STATE);
306 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
307 AssertReturn(p3dState, VERR_INVALID_STATE);
308
309 PVMSVGA3DDXCONTEXT pDXContext;
310 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
311 AssertRCReturn(rc, rc);
312
313 rc = pSvgaR3State->pFuncsDX->pfnDXDrawIndexed(pThisCC, pDXContext, pCmd->indexCount, pCmd->startIndexLocation, pCmd->baseVertexLocation);
314 return rc;
315}
316
317
318int vmsvga3dDXDrawInstanced(PVGASTATECC pThisCC, uint32_t idDXContext)
319{
320 int rc;
321 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
322 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawInstanced, VERR_INVALID_STATE);
323 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
324 AssertReturn(p3dState, VERR_INVALID_STATE);
325
326 PVMSVGA3DDXCONTEXT pDXContext;
327 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
328 AssertRCReturn(rc, rc);
329
330 rc = pSvgaR3State->pFuncsDX->pfnDXDrawInstanced(pThisCC, pDXContext);
331 return rc;
332}
333
334
335int vmsvga3dDXDrawIndexedInstanced(PVGASTATECC pThisCC, uint32_t idDXContext)
336{
337 int rc;
338 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
339 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstanced, VERR_INVALID_STATE);
340 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
341 AssertReturn(p3dState, VERR_INVALID_STATE);
342
343 PVMSVGA3DDXCONTEXT pDXContext;
344 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
345 AssertRCReturn(rc, rc);
346
347 rc = pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstanced(pThisCC, pDXContext);
348 return rc;
349}
350
351
352int vmsvga3dDXDrawAuto(PVGASTATECC pThisCC, uint32_t idDXContext)
353{
354 int rc;
355 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
356 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawAuto, VERR_INVALID_STATE);
357 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
358 AssertReturn(p3dState, VERR_INVALID_STATE);
359
360 PVMSVGA3DDXCONTEXT pDXContext;
361 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
362 AssertRCReturn(rc, rc);
363
364 rc = pSvgaR3State->pFuncsDX->pfnDXDrawAuto(pThisCC, pDXContext);
365 return rc;
366}
367
368
369int vmsvga3dDXSetInputLayout(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dElementLayoutId elementLayoutId)
370{
371 int rc;
372 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
373 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetInputLayout, VERR_INVALID_STATE);
374 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
375 AssertReturn(p3dState, VERR_INVALID_STATE);
376
377 PVMSVGA3DDXCONTEXT pDXContext;
378 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
379 AssertRCReturn(rc, rc);
380
381 ASSERT_GUEST_RETURN(pDXContext->cot.paElementLayout, VERR_INVALID_STATE);
382 ASSERT_GUEST_RETURN(elementLayoutId < pDXContext->cot.cElementLayout, VERR_INVALID_PARAMETER);
383 RT_UNTRUSTED_VALIDATED_FENCE();
384
385 rc = pSvgaR3State->pFuncsDX->pfnDXSetInputLayout(pThisCC, pDXContext, elementLayoutId);
386 return rc;
387}
388
389
390int vmsvga3dDXSetVertexBuffers(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t startBuffer, uint32_t cVertexBuffer, SVGA3dVertexBuffer const *paVertexBuffer)
391{
392 int rc;
393 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
394 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetVertexBuffers, VERR_INVALID_STATE);
395 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
396 AssertReturn(p3dState, VERR_INVALID_STATE);
397
398 PVMSVGA3DDXCONTEXT pDXContext;
399 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
400 AssertRCReturn(rc, rc);
401
402 ASSERT_GUEST_RETURN(startBuffer < SVGA3D_DX_MAX_VERTEXBUFFERS, VERR_INVALID_PARAMETER);
403 ASSERT_GUEST_RETURN(cVertexBuffer <= SVGA3D_DX_MAX_VERTEXBUFFERS - startBuffer, VERR_INVALID_PARAMETER);
404 RT_UNTRUSTED_VALIDATED_FENCE();
405
406 rc = pSvgaR3State->pFuncsDX->pfnDXSetVertexBuffers(pThisCC, pDXContext, startBuffer, cVertexBuffer, paVertexBuffer);
407 return rc;
408}
409
410
411int vmsvga3dDXSetIndexBuffer(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetIndexBuffer const *pCmd)
412{
413 int rc;
414 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
415 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetIndexBuffer, VERR_INVALID_STATE);
416 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
417 AssertReturn(p3dState, VERR_INVALID_STATE);
418
419 PVMSVGA3DDXCONTEXT pDXContext;
420 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
421 AssertRCReturn(rc, rc);
422
423 rc = pSvgaR3State->pFuncsDX->pfnDXSetIndexBuffer(pThisCC, pDXContext, pCmd->sid, pCmd->format, pCmd->offset);
424 return rc;
425}
426
427
428int vmsvga3dDXSetTopology(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dPrimitiveType topology)
429{
430 int rc;
431 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
432 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetTopology, VERR_INVALID_STATE);
433 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
434 AssertReturn(p3dState, VERR_INVALID_STATE);
435
436 PVMSVGA3DDXCONTEXT pDXContext;
437 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
438 AssertRCReturn(rc, rc);
439
440 ASSERT_GUEST_RETURN(topology >= SVGA3D_PRIMITIVE_MIN && topology < SVGA3D_PRIMITIVE_MAX, VERR_INVALID_PARAMETER);
441
442 rc = pSvgaR3State->pFuncsDX->pfnDXSetTopology(pThisCC, pDXContext, topology);
443 return rc;
444}
445
446
447int vmsvga3dDXSetRenderTargets(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dDepthStencilViewId depthStencilViewId, uint32_t cRenderTargetViewId, SVGA3dRenderTargetViewId const *paRenderTargetViewId)
448{
449 int rc;
450 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
451 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetRenderTargets, VERR_INVALID_STATE);
452 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
453 AssertReturn(p3dState, VERR_INVALID_STATE);
454
455 PVMSVGA3DDXCONTEXT pDXContext;
456 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
457 AssertRCReturn(rc, rc);
458
459 ASSERT_GUEST_RETURN(cRenderTargetViewId < SVGA3D_MAX_RENDER_TARGETS, VERR_INVALID_PARAMETER);
460 ASSERT_GUEST_RETURN(depthStencilViewId < pDXContext->cot.cDSView || depthStencilViewId == SVGA_ID_INVALID, VERR_INVALID_PARAMETER);
461 for (uint32_t i = 0; i < cRenderTargetViewId; ++i)
462 ASSERT_GUEST_RETURN( paRenderTargetViewId[i] < pDXContext->cot.cRTView
463 || paRenderTargetViewId[i] == SVGA_ID_INVALID, VERR_INVALID_PARAMETER);
464 RT_UNTRUSTED_VALIDATED_FENCE();
465
466 rc = pSvgaR3State->pFuncsDX->pfnDXSetRenderTargets(pThisCC, pDXContext, depthStencilViewId, cRenderTargetViewId, paRenderTargetViewId);
467 /// @todo if (RT_SUCCESS(rc))
468 //{
469 // for (uint32_t i = 0; i < cRenderTargetViewId; ++i)
470 // pDXContext->svgaDXContext.renderState.renderTargetViewIds[i] = paRenderTargetViewId[i];
471 //}
472 return rc;
473}
474
475
476int vmsvga3dDXSetBlendState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetBlendState const *pCmd)
477{
478 int rc;
479 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
480 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetBlendState, VERR_INVALID_STATE);
481 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
482 AssertReturn(p3dState, VERR_INVALID_STATE);
483
484 PVMSVGA3DDXCONTEXT pDXContext;
485 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
486 AssertRCReturn(rc, rc);
487
488 SVGA3dBlendStateId const blendId = pCmd->blendId;
489
490 ASSERT_GUEST_RETURN(pDXContext->cot.paBlendState, VERR_INVALID_STATE);
491 ASSERT_GUEST_RETURN(blendId < pDXContext->cot.cBlendState, VERR_INVALID_PARAMETER);
492 RT_UNTRUSTED_VALIDATED_FENCE();
493
494 rc = pSvgaR3State->pFuncsDX->pfnDXSetBlendState(pThisCC, pDXContext, blendId, pCmd->blendFactor, pCmd->sampleMask);
495 return rc;
496}
497
498
499int vmsvga3dDXSetDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetDepthStencilState const *pCmd)
500{
501 int rc;
502 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
503 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetDepthStencilState, VERR_INVALID_STATE);
504 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
505 AssertReturn(p3dState, VERR_INVALID_STATE);
506
507 PVMSVGA3DDXCONTEXT pDXContext;
508 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
509 AssertRCReturn(rc, rc);
510
511 SVGA3dDepthStencilStateId const depthStencilId = pCmd->depthStencilId;
512
513 ASSERT_GUEST_RETURN(pDXContext->cot.paDepthStencil, VERR_INVALID_STATE);
514 ASSERT_GUEST_RETURN(depthStencilId < pDXContext->cot.cDepthStencil, VERR_INVALID_PARAMETER);
515 RT_UNTRUSTED_VALIDATED_FENCE();
516
517 rc = pSvgaR3State->pFuncsDX->pfnDXSetDepthStencilState(pThisCC, pDXContext, depthStencilId, pCmd->stencilRef);
518 return rc;
519}
520
521
522int vmsvga3dDXSetRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dRasterizerStateId rasterizerId)
523{
524 int rc;
525 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
526 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetRasterizerState, VERR_INVALID_STATE);
527 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
528 AssertReturn(p3dState, VERR_INVALID_STATE);
529
530 PVMSVGA3DDXCONTEXT pDXContext;
531 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
532 AssertRCReturn(rc, rc);
533
534 ASSERT_GUEST_RETURN(rasterizerId < pDXContext->cot.cRasterizerState, VERR_INVALID_PARAMETER);
535 RT_UNTRUSTED_VALIDATED_FENCE();
536
537 rc = pSvgaR3State->pFuncsDX->pfnDXSetRasterizerState(pThisCC, pDXContext, rasterizerId);
538 return rc;
539}
540
541
542int vmsvga3dDXDefineQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
543{
544 int rc;
545 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
546 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineQuery, VERR_INVALID_STATE);
547 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
548 AssertReturn(p3dState, VERR_INVALID_STATE);
549
550 PVMSVGA3DDXCONTEXT pDXContext;
551 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
552 AssertRCReturn(rc, rc);
553
554 rc = pSvgaR3State->pFuncsDX->pfnDXDefineQuery(pThisCC, pDXContext);
555 return rc;
556}
557
558
559int vmsvga3dDXDestroyQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
560{
561 int rc;
562 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
563 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyQuery, VERR_INVALID_STATE);
564 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
565 AssertReturn(p3dState, VERR_INVALID_STATE);
566
567 PVMSVGA3DDXCONTEXT pDXContext;
568 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
569 AssertRCReturn(rc, rc);
570
571 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyQuery(pThisCC, pDXContext);
572 return rc;
573}
574
575
576int vmsvga3dDXBindQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
577{
578 int rc;
579 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
580 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindQuery, VERR_INVALID_STATE);
581 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
582 AssertReturn(p3dState, VERR_INVALID_STATE);
583
584 PVMSVGA3DDXCONTEXT pDXContext;
585 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
586 AssertRCReturn(rc, rc);
587
588 rc = pSvgaR3State->pFuncsDX->pfnDXBindQuery(pThisCC, pDXContext);
589 return rc;
590}
591
592
593int vmsvga3dDXSetQueryOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
594{
595 int rc;
596 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
597 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetQueryOffset, VERR_INVALID_STATE);
598 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
599 AssertReturn(p3dState, VERR_INVALID_STATE);
600
601 PVMSVGA3DDXCONTEXT pDXContext;
602 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
603 AssertRCReturn(rc, rc);
604
605 rc = pSvgaR3State->pFuncsDX->pfnDXSetQueryOffset(pThisCC, pDXContext);
606 return rc;
607}
608
609
610int vmsvga3dDXBeginQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
611{
612 int rc;
613 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
614 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBeginQuery, VERR_INVALID_STATE);
615 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
616 AssertReturn(p3dState, VERR_INVALID_STATE);
617
618 PVMSVGA3DDXCONTEXT pDXContext;
619 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
620 AssertRCReturn(rc, rc);
621
622 rc = pSvgaR3State->pFuncsDX->pfnDXBeginQuery(pThisCC, pDXContext);
623 return rc;
624}
625
626
627int vmsvga3dDXEndQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
628{
629 int rc;
630 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
631 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXEndQuery, VERR_INVALID_STATE);
632 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
633 AssertReturn(p3dState, VERR_INVALID_STATE);
634
635 PVMSVGA3DDXCONTEXT pDXContext;
636 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
637 AssertRCReturn(rc, rc);
638
639 rc = pSvgaR3State->pFuncsDX->pfnDXEndQuery(pThisCC, pDXContext);
640 return rc;
641}
642
643
644int vmsvga3dDXReadbackQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
645{
646 int rc;
647 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
648 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXReadbackQuery, VERR_INVALID_STATE);
649 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
650 AssertReturn(p3dState, VERR_INVALID_STATE);
651
652 PVMSVGA3DDXCONTEXT pDXContext;
653 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
654 AssertRCReturn(rc, rc);
655
656 rc = pSvgaR3State->pFuncsDX->pfnDXReadbackQuery(pThisCC, pDXContext);
657 return rc;
658}
659
660
661int vmsvga3dDXSetPredication(PVGASTATECC pThisCC, uint32_t idDXContext)
662{
663 int rc;
664 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
665 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetPredication, VERR_INVALID_STATE);
666 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
667 AssertReturn(p3dState, VERR_INVALID_STATE);
668
669 PVMSVGA3DDXCONTEXT pDXContext;
670 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
671 AssertRCReturn(rc, rc);
672
673 rc = pSvgaR3State->pFuncsDX->pfnDXSetPredication(pThisCC, pDXContext);
674 return rc;
675}
676
677
678int vmsvga3dDXSetSOTargets(PVGASTATECC pThisCC, uint32_t idDXContext)
679{
680 int rc;
681 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
682 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetSOTargets, VERR_INVALID_STATE);
683 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
684 AssertReturn(p3dState, VERR_INVALID_STATE);
685
686 PVMSVGA3DDXCONTEXT pDXContext;
687 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
688 AssertRCReturn(rc, rc);
689
690 rc = pSvgaR3State->pFuncsDX->pfnDXSetSOTargets(pThisCC, pDXContext);
691 return rc;
692}
693
694
695int vmsvga3dDXSetViewports(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t cViewport, SVGA3dViewport const *paViewport)
696{
697 int rc;
698 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
699 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetViewports, VERR_INVALID_STATE);
700 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
701 AssertReturn(p3dState, VERR_INVALID_STATE);
702
703 PVMSVGA3DDXCONTEXT pDXContext;
704 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
705 AssertRCReturn(rc, rc);
706
707 rc = pSvgaR3State->pFuncsDX->pfnDXSetViewports(pThisCC, pDXContext, cViewport, paViewport);
708 return rc;
709}
710
711
712int vmsvga3dDXSetScissorRects(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t cRect, SVGASignedRect const *paRect)
713{
714 int rc;
715 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
716 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetScissorRects, VERR_INVALID_STATE);
717 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
718 AssertReturn(p3dState, VERR_INVALID_STATE);
719
720 PVMSVGA3DDXCONTEXT pDXContext;
721 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
722 AssertRCReturn(rc, rc);
723
724 rc = pSvgaR3State->pFuncsDX->pfnDXSetScissorRects(pThisCC, pDXContext, cRect, paRect);
725 return rc;
726}
727
728
729int vmsvga3dDXClearRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXClearRenderTargetView const *pCmd)
730{
731 int rc;
732 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
733 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearRenderTargetView, VERR_INVALID_STATE);
734 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
735 AssertReturn(p3dState, VERR_INVALID_STATE);
736
737 PVMSVGA3DDXCONTEXT pDXContext;
738 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
739 AssertRCReturn(rc, rc);
740
741 SVGA3dRenderTargetViewId const renderTargetViewId = pCmd->renderTargetViewId;
742
743 ASSERT_GUEST_RETURN(pDXContext->cot.paRTView, VERR_INVALID_STATE);
744 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, VERR_INVALID_PARAMETER);
745 RT_UNTRUSTED_VALIDATED_FENCE();
746
747 rc = pSvgaR3State->pFuncsDX->pfnDXClearRenderTargetView(pThisCC, pDXContext, renderTargetViewId, &pCmd->rgba);
748 return rc;
749}
750
751
752int vmsvga3dDXClearDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXClearDepthStencilView const *pCmd)
753{
754 int rc;
755 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
756 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearDepthStencilView, VERR_INVALID_STATE);
757 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
758 AssertReturn(p3dState, VERR_INVALID_STATE);
759
760 PVMSVGA3DDXCONTEXT pDXContext;
761 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
762 AssertRCReturn(rc, rc);
763
764 SVGA3dDepthStencilViewId const depthStencilViewId = pCmd->depthStencilViewId;
765
766 ASSERT_GUEST_RETURN(pDXContext->cot.paDSView, VERR_INVALID_STATE);
767 ASSERT_GUEST_RETURN(depthStencilViewId < pDXContext->cot.cDSView, VERR_INVALID_PARAMETER);
768 RT_UNTRUSTED_VALIDATED_FENCE();
769
770 rc = pSvgaR3State->pFuncsDX->pfnDXClearDepthStencilView(pThisCC, pDXContext, pCmd->flags, depthStencilViewId, pCmd->depth, (uint8_t)pCmd->stencil);
771 return rc;
772}
773
774
775int vmsvga3dDXPredCopyRegion(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXPredCopyRegion const *pCmd)
776{
777 int rc;
778 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
779 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredCopyRegion, VERR_INVALID_STATE);
780 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
781 AssertReturn(p3dState, VERR_INVALID_STATE);
782
783 PVMSVGA3DDXCONTEXT pDXContext;
784 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
785 AssertRCReturn(rc, rc);
786
787 rc = pSvgaR3State->pFuncsDX->pfnDXPredCopyRegion(pThisCC, pDXContext, pCmd->dstSid, pCmd->dstSubResource, pCmd->srcSid, pCmd->srcSubResource, &pCmd->box);
788 return rc;
789}
790
791
792int vmsvga3dDXPredCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
793{
794 int rc;
795 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
796 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredCopy, VERR_INVALID_STATE);
797 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
798 AssertReturn(p3dState, VERR_INVALID_STATE);
799
800 PVMSVGA3DDXCONTEXT pDXContext;
801 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
802 AssertRCReturn(rc, rc);
803
804 rc = pSvgaR3State->pFuncsDX->pfnDXPredCopy(pThisCC, pDXContext);
805 return rc;
806}
807
808
809int vmsvga3dDXPresentBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
810{
811 int rc;
812 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
813 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPresentBlt, VERR_INVALID_STATE);
814 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
815 AssertReturn(p3dState, VERR_INVALID_STATE);
816
817 PVMSVGA3DDXCONTEXT pDXContext;
818 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
819 AssertRCReturn(rc, rc);
820
821 rc = pSvgaR3State->pFuncsDX->pfnDXPresentBlt(pThisCC, pDXContext);
822 return rc;
823}
824
825
826int vmsvga3dDXGenMips(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXGenMips const *pCmd)
827{
828 int rc;
829 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
830 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXGenMips, VERR_INVALID_STATE);
831 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
832 AssertReturn(p3dState, VERR_INVALID_STATE);
833
834 PVMSVGA3DDXCONTEXT pDXContext;
835 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
836 AssertRCReturn(rc, rc);
837
838 SVGA3dShaderResourceViewId const shaderResourceViewId = pCmd->shaderResourceViewId;
839
840 ASSERT_GUEST_RETURN(pDXContext->cot.paSRView, VERR_INVALID_STATE);
841 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->cot.cSRView, VERR_INVALID_PARAMETER);
842 RT_UNTRUSTED_VALIDATED_FENCE();
843
844 rc = pSvgaR3State->pFuncsDX->pfnDXGenMips(pThisCC, pDXContext, shaderResourceViewId);
845 return rc;
846}
847
848
849int vmsvga3dDXUpdateSubResource(PVGASTATECC pThisCC, uint32_t idDXContext)
850{
851 int rc;
852 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
853 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXUpdateSubResource, VERR_INVALID_STATE);
854 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
855 AssertReturn(p3dState, VERR_INVALID_STATE);
856
857 PVMSVGA3DDXCONTEXT pDXContext;
858 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
859 AssertRCReturn(rc, rc);
860
861 rc = pSvgaR3State->pFuncsDX->pfnDXUpdateSubResource(pThisCC, pDXContext);
862 return rc;
863}
864
865
866int vmsvga3dDXReadbackSubResource(PVGASTATECC pThisCC, uint32_t idDXContext)
867{
868 int rc;
869 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
870 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXReadbackSubResource, VERR_INVALID_STATE);
871 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
872 AssertReturn(p3dState, VERR_INVALID_STATE);
873
874 PVMSVGA3DDXCONTEXT pDXContext;
875 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
876 AssertRCReturn(rc, rc);
877
878 rc = pSvgaR3State->pFuncsDX->pfnDXReadbackSubResource(pThisCC, pDXContext);
879 return rc;
880}
881
882
883int vmsvga3dDXInvalidateSubResource(PVGASTATECC pThisCC, uint32_t idDXContext)
884{
885 int rc;
886 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
887 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXInvalidateSubResource, VERR_INVALID_STATE);
888 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
889 AssertReturn(p3dState, VERR_INVALID_STATE);
890
891 PVMSVGA3DDXCONTEXT pDXContext;
892 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
893 AssertRCReturn(rc, rc);
894
895 rc = pSvgaR3State->pFuncsDX->pfnDXInvalidateSubResource(pThisCC, pDXContext);
896 return rc;
897}
898
899
900int vmsvga3dDXDefineShaderResourceView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineShaderResourceView const *pCmd)
901{
902 int rc;
903 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
904 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineShaderResourceView, VERR_INVALID_STATE);
905 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
906 AssertReturn(p3dState, VERR_INVALID_STATE);
907
908 PVMSVGA3DDXCONTEXT pDXContext;
909 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
910 AssertRCReturn(rc, rc);
911
912 SVGA3dShaderResourceViewId const shaderResourceViewId = pCmd->shaderResourceViewId;
913
914 ASSERT_GUEST_RETURN(pDXContext->cot.paSRView, VERR_INVALID_STATE);
915 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->cot.cSRView, VERR_INVALID_PARAMETER);
916 RT_UNTRUSTED_VALIDATED_FENCE();
917
918 SVGACOTableDXSRViewEntry *pEntry = &pDXContext->cot.paSRView[shaderResourceViewId];
919 pEntry->sid = pCmd->sid;
920 pEntry->format = pCmd->format;
921 pEntry->resourceDimension = pCmd->resourceDimension;
922 pEntry->desc = pCmd->desc;
923
924 rc = pSvgaR3State->pFuncsDX->pfnDXDefineShaderResourceView(pThisCC, pDXContext, shaderResourceViewId, pEntry);
925 return rc;
926}
927
928
929int vmsvga3dDXDestroyShaderResourceView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyShaderResourceView const *pCmd)
930{
931 int rc;
932 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
933 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyShaderResourceView, VERR_INVALID_STATE);
934 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
935 AssertReturn(p3dState, VERR_INVALID_STATE);
936
937 PVMSVGA3DDXCONTEXT pDXContext;
938 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
939 AssertRCReturn(rc, rc);
940
941 SVGA3dShaderResourceViewId const shaderResourceViewId = pCmd->shaderResourceViewId;
942
943 ASSERT_GUEST_RETURN(pDXContext->cot.paSRView, VERR_INVALID_STATE);
944 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->cot.cSRView, VERR_INVALID_PARAMETER);
945 RT_UNTRUSTED_VALIDATED_FENCE();
946
947 SVGACOTableDXSRViewEntry *pEntry = &pDXContext->cot.paSRView[shaderResourceViewId];
948 RT_ZERO(*pEntry);
949
950 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyShaderResourceView(pThisCC, pDXContext, shaderResourceViewId);
951 return rc;
952}
953
954
955int vmsvga3dDXDefineRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineRenderTargetView const *pCmd)
956{
957 int rc;
958 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
959 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineRenderTargetView, VERR_INVALID_STATE);
960 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
961 AssertReturn(p3dState, VERR_INVALID_STATE);
962
963 PVMSVGA3DDXCONTEXT pDXContext;
964 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
965 AssertRCReturn(rc, rc);
966
967 SVGA3dRenderTargetViewId const renderTargetViewId = pCmd->renderTargetViewId;
968
969 ASSERT_GUEST_RETURN(pDXContext->cot.paRTView, VERR_INVALID_STATE);
970 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, VERR_INVALID_PARAMETER);
971 RT_UNTRUSTED_VALIDATED_FENCE();
972
973 SVGACOTableDXRTViewEntry *pEntry = &pDXContext->cot.paRTView[renderTargetViewId];
974 pEntry->sid = pCmd->sid;
975 pEntry->format = pCmd->format;
976 pEntry->resourceDimension = pCmd->resourceDimension;
977 pEntry->desc = pCmd->desc;
978
979 rc = pSvgaR3State->pFuncsDX->pfnDXDefineRenderTargetView(pThisCC, pDXContext, renderTargetViewId, pEntry);
980 return rc;
981}
982
983
984int vmsvga3dDXDestroyRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyRenderTargetView const *pCmd)
985{
986 int rc;
987 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
988 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyRenderTargetView, VERR_INVALID_STATE);
989 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
990 AssertReturn(p3dState, VERR_INVALID_STATE);
991
992 PVMSVGA3DDXCONTEXT pDXContext;
993 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
994 AssertRCReturn(rc, rc);
995
996 SVGA3dRenderTargetViewId const renderTargetViewId = pCmd->renderTargetViewId;
997
998 ASSERT_GUEST_RETURN(pDXContext->cot.paRTView, VERR_INVALID_STATE);
999 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, VERR_INVALID_PARAMETER);
1000 RT_UNTRUSTED_VALIDATED_FENCE();
1001
1002 SVGACOTableDXRTViewEntry *pEntry = &pDXContext->cot.paRTView[renderTargetViewId];
1003 RT_ZERO(*pEntry);
1004
1005 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyRenderTargetView(pThisCC, pDXContext, renderTargetViewId);
1006 /// @todo for (uint32_t i = 0; i < SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS; ++i)
1007 //{
1008 // if (pDXContext->svgaDXContext.renderState.renderTargetViewIds[i] == renderTargetViewId)
1009 // pDXContext->svgaDXContext.renderState.renderTargetViewIds[i] = SVGA_ID_INVALID;
1010 //}
1011 return rc;
1012}
1013
1014
1015int vmsvga3dDXDefineDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineDepthStencilView_v2 const *pCmd)
1016{
1017 int rc;
1018 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1019 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilView, VERR_INVALID_STATE);
1020 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1021 AssertReturn(p3dState, VERR_INVALID_STATE);
1022
1023 PVMSVGA3DDXCONTEXT pDXContext;
1024 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1025 AssertRCReturn(rc, rc);
1026
1027 SVGA3dDepthStencilViewId const depthStencilViewId = pCmd->depthStencilViewId;
1028
1029 ASSERT_GUEST_RETURN(pDXContext->cot.paDSView, VERR_INVALID_STATE);
1030 ASSERT_GUEST_RETURN(depthStencilViewId < pDXContext->cot.cDSView, VERR_INVALID_PARAMETER);
1031 RT_UNTRUSTED_VALIDATED_FENCE();
1032
1033 SVGACOTableDXDSViewEntry *pEntry = &pDXContext->cot.paDSView[depthStencilViewId];
1034 pEntry->sid = pCmd->sid;
1035 pEntry->format = pCmd->format;
1036 pEntry->resourceDimension = pCmd->resourceDimension;
1037 pEntry->mipSlice = pCmd->mipSlice;
1038 pEntry->firstArraySlice = pCmd->firstArraySlice;
1039 pEntry->arraySize = pCmd->arraySize;
1040 pEntry->flags = pCmd->flags;
1041
1042 rc = pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilView(pThisCC, pDXContext, depthStencilViewId, pEntry);
1043 return rc;
1044}
1045
1046
1047int vmsvga3dDXDestroyDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyDepthStencilView const *pCmd)
1048{
1049 int rc;
1050 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1051 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilView, VERR_INVALID_STATE);
1052 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1053 AssertReturn(p3dState, VERR_INVALID_STATE);
1054
1055 PVMSVGA3DDXCONTEXT pDXContext;
1056 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1057 AssertRCReturn(rc, rc);
1058
1059 SVGA3dDepthStencilViewId const depthStencilViewId = pCmd->depthStencilViewId;
1060
1061 ASSERT_GUEST_RETURN(pDXContext->cot.paDSView, VERR_INVALID_STATE);
1062 ASSERT_GUEST_RETURN(depthStencilViewId < pDXContext->cot.cDSView, VERR_INVALID_PARAMETER);
1063 RT_UNTRUSTED_VALIDATED_FENCE();
1064
1065 SVGACOTableDXDSViewEntry *pEntry = &pDXContext->cot.paDSView[depthStencilViewId];
1066 RT_ZERO(*pEntry);
1067
1068 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilView(pThisCC, pDXContext, depthStencilViewId);
1069 return rc;
1070}
1071
1072
1073int vmsvga3dDXDefineElementLayout(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dElementLayoutId elementLayoutId, uint32_t cDesc, SVGA3dInputElementDesc const *paDesc)
1074{
1075 int rc;
1076 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1077 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineElementLayout, VERR_INVALID_STATE);
1078 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1079 AssertReturn(p3dState, VERR_INVALID_STATE);
1080
1081 PVMSVGA3DDXCONTEXT pDXContext;
1082 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1083 AssertRCReturn(rc, rc);
1084
1085 ASSERT_GUEST_RETURN(pDXContext->cot.paElementLayout, VERR_INVALID_STATE);
1086 ASSERT_GUEST_RETURN(elementLayoutId < pDXContext->cot.cElementLayout, VERR_INVALID_PARAMETER);
1087 RT_UNTRUSTED_VALIDATED_FENCE();
1088
1089 SVGACOTableDXElementLayoutEntry *pEntry = &pDXContext->cot.paElementLayout[elementLayoutId];
1090 pEntry->elid = elementLayoutId;
1091 pEntry->numDescs = RT_MIN(cDesc, RT_ELEMENTS(pEntry->descs));
1092 memcpy(pEntry->descs, paDesc, pEntry->numDescs * sizeof(pEntry->descs[0]));
1093
1094#ifdef LOG_ENABLED
1095 Log6(("Element layout %d: slot off fmt class step reg\n", pEntry->elid));
1096 for (uint32_t i = 0; i < pEntry->numDescs; ++i)
1097 {
1098 Log6((" [%u]: %u 0x%02X %d %u %u %u\n",
1099 i,
1100 pEntry->descs[i].inputSlot,
1101 pEntry->descs[i].alignedByteOffset,
1102 pEntry->descs[i].format,
1103 pEntry->descs[i].inputSlotClass,
1104 pEntry->descs[i].instanceDataStepRate,
1105 pEntry->descs[i].inputRegister
1106 ));
1107 }
1108#endif
1109
1110 rc = pSvgaR3State->pFuncsDX->pfnDXDefineElementLayout(pThisCC, pDXContext, elementLayoutId, pEntry);
1111 return rc;
1112}
1113
1114
1115int vmsvga3dDXDestroyElementLayout(PVGASTATECC pThisCC, uint32_t idDXContext)
1116{
1117 int rc;
1118 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1119 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyElementLayout, VERR_INVALID_STATE);
1120 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1121 AssertReturn(p3dState, VERR_INVALID_STATE);
1122
1123 PVMSVGA3DDXCONTEXT pDXContext;
1124 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1125 AssertRCReturn(rc, rc);
1126
1127 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyElementLayout(pThisCC, pDXContext);
1128 return rc;
1129}
1130
1131
1132int vmsvga3dDXDefineBlendState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineBlendState const *pCmd)
1133{
1134 int rc;
1135 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1136 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineBlendState, VERR_INVALID_STATE);
1137 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1138 AssertReturn(p3dState, VERR_INVALID_STATE);
1139
1140 PVMSVGA3DDXCONTEXT pDXContext;
1141 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1142 AssertRCReturn(rc, rc);
1143
1144 const SVGA3dBlendStateId blendId = pCmd->blendId;
1145
1146 ASSERT_GUEST_RETURN(pDXContext->cot.paBlendState, VERR_INVALID_STATE);
1147 ASSERT_GUEST_RETURN(blendId < pDXContext->cot.cBlendState, VERR_INVALID_PARAMETER);
1148 RT_UNTRUSTED_VALIDATED_FENCE();
1149
1150 SVGACOTableDXBlendStateEntry *pEntry = &pDXContext->cot.paBlendState[blendId];
1151 pEntry->alphaToCoverageEnable = pCmd->alphaToCoverageEnable;
1152 pEntry->independentBlendEnable = pCmd->independentBlendEnable;
1153 memcpy(pEntry->perRT, pCmd->perRT, sizeof(pEntry->perRT));
1154
1155 rc = pSvgaR3State->pFuncsDX->pfnDXDefineBlendState(pThisCC, pDXContext, blendId, pEntry);
1156 return rc;
1157}
1158
1159
1160int vmsvga3dDXDestroyBlendState(PVGASTATECC pThisCC, uint32_t idDXContext)
1161{
1162 int rc;
1163 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1164 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyBlendState, VERR_INVALID_STATE);
1165 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1166 AssertReturn(p3dState, VERR_INVALID_STATE);
1167
1168 PVMSVGA3DDXCONTEXT pDXContext;
1169 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1170 AssertRCReturn(rc, rc);
1171
1172 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyBlendState(pThisCC, pDXContext);
1173 return rc;
1174}
1175
1176
1177int vmsvga3dDXDefineDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineDepthStencilState const *pCmd)
1178{
1179 int rc;
1180 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1181 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilState, VERR_INVALID_STATE);
1182 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1183 AssertReturn(p3dState, VERR_INVALID_STATE);
1184
1185 PVMSVGA3DDXCONTEXT pDXContext;
1186 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1187 AssertRCReturn(rc, rc);
1188
1189 SVGA3dDepthStencilStateId const depthStencilId = pCmd->depthStencilId;
1190
1191 ASSERT_GUEST_RETURN(pDXContext->cot.paDepthStencil, VERR_INVALID_STATE);
1192 ASSERT_GUEST_RETURN(depthStencilId < pDXContext->cot.cDepthStencil, VERR_INVALID_PARAMETER);
1193 RT_UNTRUSTED_VALIDATED_FENCE();
1194
1195 SVGACOTableDXDepthStencilEntry *pEntry = &pDXContext->cot.paDepthStencil[depthStencilId];
1196 pEntry->depthEnable = pCmd->depthEnable;
1197 pEntry->depthWriteMask = pCmd->depthWriteMask;
1198 pEntry->depthFunc = pCmd->depthFunc;
1199 pEntry->stencilEnable = pCmd->stencilEnable;
1200 pEntry->frontEnable = pCmd->frontEnable;
1201 pEntry->backEnable = pCmd->backEnable;
1202 pEntry->stencilReadMask = pCmd->stencilReadMask;
1203 pEntry->stencilWriteMask = pCmd->stencilWriteMask;
1204
1205 pEntry->frontStencilFailOp = pCmd->frontStencilFailOp;
1206 pEntry->frontStencilDepthFailOp = pCmd->frontStencilDepthFailOp;
1207 pEntry->frontStencilPassOp = pCmd->frontStencilPassOp;
1208 pEntry->frontStencilFunc = pCmd->frontStencilFunc;
1209
1210 pEntry->backStencilFailOp = pCmd->backStencilFailOp;
1211 pEntry->backStencilDepthFailOp = pCmd->backStencilDepthFailOp;
1212 pEntry->backStencilPassOp = pCmd->backStencilPassOp;
1213 pEntry->backStencilFunc = pCmd->backStencilFunc;
1214
1215 rc = pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilState(pThisCC, pDXContext, depthStencilId, pEntry);
1216 return rc;
1217}
1218
1219
1220int vmsvga3dDXDestroyDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext)
1221{
1222 int rc;
1223 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1224 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilState, VERR_INVALID_STATE);
1225 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1226 AssertReturn(p3dState, VERR_INVALID_STATE);
1227
1228 PVMSVGA3DDXCONTEXT pDXContext;
1229 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1230 AssertRCReturn(rc, rc);
1231
1232 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilState(pThisCC, pDXContext);
1233 return rc;
1234}
1235
1236
1237int vmsvga3dDXDefineRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineRasterizerState const *pCmd)
1238{
1239 int rc;
1240 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1241 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineRasterizerState, VERR_INVALID_STATE);
1242 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1243 AssertReturn(p3dState, VERR_INVALID_STATE);
1244
1245 PVMSVGA3DDXCONTEXT pDXContext;
1246 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1247 AssertRCReturn(rc, rc);
1248
1249 SVGA3dRasterizerStateId const rasterizerId = pCmd->rasterizerId;
1250
1251 ASSERT_GUEST_RETURN(pDXContext->cot.paRasterizerState, VERR_INVALID_STATE);
1252 ASSERT_GUEST_RETURN(rasterizerId < pDXContext->cot.cRasterizerState, VERR_INVALID_PARAMETER);
1253 RT_UNTRUSTED_VALIDATED_FENCE();
1254
1255 SVGACOTableDXRasterizerStateEntry *pEntry = &pDXContext->cot.paRasterizerState[rasterizerId];
1256 pEntry->fillMode = pCmd->fillMode;
1257 pEntry->cullMode = pCmd->cullMode;
1258 pEntry->frontCounterClockwise = pCmd->frontCounterClockwise;
1259 pEntry->provokingVertexLast = pCmd->provokingVertexLast;
1260 pEntry->depthBias = pCmd->depthBias;
1261 pEntry->depthBiasClamp = pCmd->depthBiasClamp;
1262 pEntry->slopeScaledDepthBias = pCmd->slopeScaledDepthBias;
1263 pEntry->depthClipEnable = pCmd->depthClipEnable;
1264 pEntry->scissorEnable = pCmd->scissorEnable;
1265 pEntry->multisampleEnable = pCmd->multisampleEnable;
1266 pEntry->antialiasedLineEnable = pCmd->antialiasedLineEnable;
1267 pEntry->lineWidth = pCmd->lineWidth;
1268 pEntry->lineStippleEnable = pCmd->lineStippleEnable;
1269 pEntry->lineStippleFactor = pCmd->lineStippleFactor;
1270 pEntry->lineStipplePattern = pCmd->lineStipplePattern;
1271 pEntry->forcedSampleCount = 0; /** @todo Not in pCmd. */
1272 RT_ZERO(pEntry->mustBeZero);
1273
1274 rc = pSvgaR3State->pFuncsDX->pfnDXDefineRasterizerState(pThisCC, pDXContext, rasterizerId, pEntry);
1275 return rc;
1276}
1277
1278
1279int vmsvga3dDXDestroyRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext)
1280{
1281 int rc;
1282 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1283 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyRasterizerState, VERR_INVALID_STATE);
1284 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1285 AssertReturn(p3dState, VERR_INVALID_STATE);
1286
1287 PVMSVGA3DDXCONTEXT pDXContext;
1288 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1289 AssertRCReturn(rc, rc);
1290
1291 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyRasterizerState(pThisCC, pDXContext);
1292 return rc;
1293}
1294
1295
1296int vmsvga3dDXDefineSamplerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineSamplerState const *pCmd)
1297{
1298 int rc;
1299 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1300 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineSamplerState, VERR_INVALID_STATE);
1301 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1302 AssertReturn(p3dState, VERR_INVALID_STATE);
1303
1304 PVMSVGA3DDXCONTEXT pDXContext;
1305 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1306 AssertRCReturn(rc, rc);
1307
1308 SVGA3dSamplerId const samplerId = pCmd->samplerId;
1309
1310 ASSERT_GUEST_RETURN(pDXContext->cot.paSampler, VERR_INVALID_STATE);
1311 ASSERT_GUEST_RETURN(samplerId < pDXContext->cot.cSampler, VERR_INVALID_PARAMETER);
1312 RT_UNTRUSTED_VALIDATED_FENCE();
1313
1314 SVGACOTableDXSamplerEntry *pEntry = &pDXContext->cot.paSampler[samplerId];
1315 pEntry->filter = pCmd->filter;
1316 pEntry->addressU = pCmd->addressU;
1317 pEntry->addressV = pCmd->addressV;
1318 pEntry->addressW = pCmd->addressW;
1319 pEntry->mipLODBias = pCmd->mipLODBias;
1320 pEntry->maxAnisotropy = pCmd->maxAnisotropy;
1321 pEntry->comparisonFunc = pCmd->comparisonFunc;
1322 pEntry->borderColor = pCmd->borderColor;
1323 pEntry->minLOD = pCmd->minLOD;
1324 pEntry->maxLOD = pCmd->maxLOD;
1325
1326 rc = pSvgaR3State->pFuncsDX->pfnDXDefineSamplerState(pThisCC, pDXContext, samplerId, pEntry);
1327 return rc;
1328}
1329
1330
1331int vmsvga3dDXDestroySamplerState(PVGASTATECC pThisCC, uint32_t idDXContext)
1332{
1333 int rc;
1334 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1335 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroySamplerState, VERR_INVALID_STATE);
1336 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1337 AssertReturn(p3dState, VERR_INVALID_STATE);
1338
1339 PVMSVGA3DDXCONTEXT pDXContext;
1340 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1341 AssertRCReturn(rc, rc);
1342
1343 rc = pSvgaR3State->pFuncsDX->pfnDXDestroySamplerState(pThisCC, pDXContext);
1344 return rc;
1345}
1346
1347
1348int vmsvga3dDXDefineShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineShader const *pCmd)
1349{
1350 int rc;
1351 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1352 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineShader, VERR_INVALID_STATE);
1353 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1354 AssertReturn(p3dState, VERR_INVALID_STATE);
1355
1356 PVMSVGA3DDXCONTEXT pDXContext;
1357 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1358 AssertRCReturn(rc, rc);
1359
1360 SVGA3dShaderId const shaderId = pCmd->shaderId;
1361
1362 ASSERT_GUEST_RETURN(pDXContext->cot.paShader, VERR_INVALID_STATE);
1363 ASSERT_GUEST_RETURN(shaderId < pDXContext->cot.cShader, VERR_INVALID_PARAMETER);
1364 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
1365 ASSERT_GUEST_RETURN(pCmd->sizeInBytes >= 8, VERR_INVALID_PARAMETER); /* Version Token + Length Token. */
1366 RT_UNTRUSTED_VALIDATED_FENCE();
1367
1368 SVGACOTableDXShaderEntry *pEntry = &pDXContext->cot.paShader[shaderId];
1369 pEntry->type = pCmd->type;
1370 pEntry->sizeInBytes = pCmd->sizeInBytes;
1371 pEntry->offsetInBytes = 0;
1372 pEntry->mobid = SVGA_ID_INVALID;
1373
1374 if (!pDXContext->paShader)
1375 {
1376 /* Create host array for information abput shaders. */
1377 pDXContext->paShader = (PVMSVGA3DSHADER)RTMemAllocZ(pDXContext->cot.cShader * sizeof(VMSVGA3DSHADER));
1378 AssertReturn(pDXContext->paShader, VERR_NO_MEMORY);
1379 for (uint32_t i = 0; i < pDXContext->cot.cShader; ++i)
1380 pDXContext->paShader[i].id = SVGA_ID_INVALID;
1381 }
1382
1383 PVMSVGA3DSHADER pShader = &pDXContext->paShader[shaderId];
1384 if (pShader->id != SVGA_ID_INVALID)
1385 {
1386 /** @todo Cleanup current shader. */
1387 pSvgaR3State->pFuncsDX->pfnDXDestroyShader(pThisCC, pDXContext);
1388 RTMemFree(pShader->pShaderProgram);
1389 }
1390
1391 pShader->id = shaderId;
1392 pShader->cid = idDXContext;
1393 pShader->type = pEntry->type;
1394 pShader->cbData = pEntry->sizeInBytes;
1395 pShader->pShaderProgram = NULL;
1396 pShader->u.pvBackendShader = NULL;
1397
1398 rc = pSvgaR3State->pFuncsDX->pfnDXDefineShader(pThisCC, pDXContext, pShader);
1399 return rc;
1400}
1401
1402
1403int vmsvga3dDXDestroyShader(PVGASTATECC pThisCC, uint32_t idDXContext)
1404{
1405 int rc;
1406 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1407 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyShader, VERR_INVALID_STATE);
1408 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1409 AssertReturn(p3dState, VERR_INVALID_STATE);
1410
1411 PVMSVGA3DDXCONTEXT pDXContext;
1412 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1413 AssertRCReturn(rc, rc);
1414
1415 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyShader(pThisCC, pDXContext);
1416 return rc;
1417}
1418
1419
1420static int dxBindShader(PVMSVGA3DSHADER pShader, PVMSVGAMOB pMob, SVGACOTableDXShaderEntry const *pEntry, void const *pvShaderBytecode)
1421{
1422 /* How many bytes the MOB can hold. */
1423 uint32_t const cbMob = vmsvgaR3MobSize(pMob) - pEntry->offsetInBytes;
1424 ASSERT_GUEST_RETURN(cbMob >= pEntry->sizeInBytes, VERR_INVALID_PARAMETER);
1425 AssertReturn(pEntry->sizeInBytes >= 8, VERR_INTERNAL_ERROR); /* Host ensures this in DefineShader. */
1426
1427 int rc = DXShaderParse(pvShaderBytecode, pEntry->sizeInBytes, &pShader->shaderInfo);
1428 if (RT_SUCCESS(rc))
1429 {
1430 /* Get the length of the shader bytecode. */
1431 uint32_t const *pau32Token = (uint32_t *)pvShaderBytecode; /* Tokens */
1432 uint32_t const cToken = pau32Token[1]; /* Length of the shader in tokens. */
1433 ASSERT_GUEST_RETURN(cToken <= pEntry->sizeInBytes / 4, VERR_INVALID_PARAMETER);
1434
1435 pShader->cbData = cToken * 4;
1436
1437 /* Check if the MOB contains SVGA3dDXSignatureHeader and signature entries.
1438 * If they are not there (Linux guest driver does not provide them), then it is fine
1439 * and the signatures generated by DXShaderParse will be used.
1440 */
1441 uint32_t const cbSignaturesMax = cbMob - pShader->cbData; /* How many bytes for signatures are available. */
1442 if (cbSignaturesMax > sizeof(SVGA3dDXSignatureHeader))
1443 {
1444 SVGA3dDXSignatureHeader const *pSignatureHeader = (SVGA3dDXSignatureHeader *)((uint8_t *)pvShaderBytecode + pShader->cbData);
1445 if (pSignatureHeader->headerVersion == SVGADX_SIGNATURE_HEADER_VERSION_0)
1446 {
1447 ASSERT_GUEST_RETURN( pSignatureHeader->numInputSignatures <= RT_ELEMENTS(pShader->shaderInfo.aInputSignature)
1448 && pSignatureHeader->numOutputSignatures <= RT_ELEMENTS(pShader->shaderInfo.aOutputSignature)
1449 && pSignatureHeader->numPatchConstantSignatures <= RT_ELEMENTS(pShader->shaderInfo.aPatchConstantSignature),
1450 VERR_INVALID_PARAMETER);
1451
1452 uint32_t const cSignature = pSignatureHeader->numInputSignatures
1453 + pSignatureHeader->numOutputSignatures
1454 + pSignatureHeader->numPatchConstantSignatures;
1455 ASSERT_GUEST_RETURN( cbSignaturesMax - sizeof(SVGA3dDXSignatureHeader)
1456 > cSignature * sizeof(sizeof(SVGA3dDXSignatureEntry)), VERR_INVALID_PARAMETER);
1457
1458 /* Copy to DXShaderInfo. */
1459 uint8_t const *pu8Signatures = (uint8_t *)&pSignatureHeader[1];
1460 pShader->shaderInfo.cInputSignature = pSignatureHeader->numInputSignatures;
1461 memcpy(pShader->shaderInfo.aInputSignature, pu8Signatures, pSignatureHeader->numInputSignatures * sizeof(SVGA3dDXSignatureEntry));
1462
1463 pu8Signatures += pSignatureHeader->numInputSignatures * sizeof(SVGA3dDXSignatureEntry);
1464 pShader->shaderInfo.cOutputSignature = pSignatureHeader->numOutputSignatures;
1465 memcpy(pShader->shaderInfo.aOutputSignature, pu8Signatures, pSignatureHeader->numOutputSignatures * sizeof(SVGA3dDXSignatureEntry));
1466
1467 pu8Signatures += pSignatureHeader->numOutputSignatures * sizeof(SVGA3dDXSignatureEntry);
1468 pShader->shaderInfo.cPatchConstantSignature = pSignatureHeader->numPatchConstantSignatures;
1469 memcpy(pShader->shaderInfo.aPatchConstantSignature, pu8Signatures, pSignatureHeader->numPatchConstantSignatures * sizeof(SVGA3dDXSignatureEntry));
1470 }
1471 }
1472 }
1473
1474 return rc;
1475}
1476
1477
1478int vmsvga3dDXBindShader(PVGASTATECC pThisCC, uint32_t cid, PVMSVGAMOB pMob, uint32_t shid, uint32_t offsetInBytes)
1479{
1480 int rc;
1481 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1482 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindShader, VERR_INVALID_STATE);
1483 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1484 AssertReturn(p3dState, VERR_INVALID_STATE);
1485
1486 PVMSVGA3DDXCONTEXT pDXContext;
1487 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
1488 AssertRCReturn(rc, rc);
1489
1490 ASSERT_GUEST_RETURN(shid < pDXContext->cot.cShader, VERR_INVALID_PARAMETER);
1491 RT_UNTRUSTED_VALIDATED_FENCE();
1492
1493 SVGACOTableDXShaderEntry *pEntry = &pDXContext->cot.paShader[shid];
1494 //pEntry->type;
1495 //pEntry->sizeInBytes;
1496 pEntry->offsetInBytes = offsetInBytes;
1497 pEntry->mobid = vmsvgaR3MobId(pMob);
1498
1499 if (pMob)
1500 {
1501 /* Bind a mob to the shader. */
1502
1503 /* Create a memory pointer for the MOB, which is accessible by host. */
1504 rc = vmsvgaR3MobBackingStoreCreate(pSvgaR3State, pMob, vmsvgaR3MobSize(pMob));
1505 if (RT_SUCCESS(rc))
1506 {
1507 /* Get pointer to the shader bytecode. This will also verify the offset. */
1508 void const *pvShaderBytecode = vmsvgaR3MobBackingStoreGet(pMob, pEntry->offsetInBytes);
1509 ASSERT_GUEST_RETURN(pvShaderBytecode, VERR_INVALID_PARAMETER);
1510
1511 PVMSVGA3DSHADER pShader = &pDXContext->paShader[shid];
1512 Assert( pShader->id == shid
1513 && pShader->type == pEntry->type); /* The host ensures this. */
1514
1515 /* Get the shader and optional signatures from the MOB. */
1516 rc = dxBindShader(pShader, pMob, pEntry, pvShaderBytecode);
1517 if (RT_SUCCESS(rc))
1518 rc = pSvgaR3State->pFuncsDX->pfnDXBindShader(pThisCC, pDXContext, pShader, pvShaderBytecode);
1519
1520 if (RT_FAILURE(rc))
1521 {
1522 /** @todo Any cleanup? */
1523 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
1524 }
1525 }
1526 }
1527 else
1528 {
1529 /* Unbind. */
1530 /** @todo Nothing to do here but release the MOB? */
1531 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
1532 }
1533
1534 return rc;
1535}
1536
1537
1538int vmsvga3dDXDefineStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext)
1539{
1540 int rc;
1541 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1542 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutput, VERR_INVALID_STATE);
1543 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1544 AssertReturn(p3dState, VERR_INVALID_STATE);
1545
1546 PVMSVGA3DDXCONTEXT pDXContext;
1547 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1548 AssertRCReturn(rc, rc);
1549
1550 rc = pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutput(pThisCC, pDXContext);
1551 return rc;
1552}
1553
1554
1555int vmsvga3dDXDestroyStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext)
1556{
1557 int rc;
1558 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1559 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyStreamOutput, VERR_INVALID_STATE);
1560 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1561 AssertReturn(p3dState, VERR_INVALID_STATE);
1562
1563 PVMSVGA3DDXCONTEXT pDXContext;
1564 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1565 AssertRCReturn(rc, rc);
1566
1567 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyStreamOutput(pThisCC, pDXContext);
1568 return rc;
1569}
1570
1571
1572int vmsvga3dDXSetStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext)
1573{
1574 int rc;
1575 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1576 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetStreamOutput, VERR_INVALID_STATE);
1577 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1578 AssertReturn(p3dState, VERR_INVALID_STATE);
1579
1580 PVMSVGA3DDXCONTEXT pDXContext;
1581 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1582 AssertRCReturn(rc, rc);
1583
1584 rc = pSvgaR3State->pFuncsDX->pfnDXSetStreamOutput(pThisCC, pDXContext);
1585 return rc;
1586}
1587
1588
1589int vmsvga3dDXSetCOTable(PVGASTATECC pThisCC, uint32_t cid, PVMSVGAMOB pMob, SVGACOTableType type, uint32_t validSizeInBytes)
1590{
1591 int rc;
1592 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1593 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetCOTable, VERR_INVALID_STATE);
1594 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1595 AssertReturn(p3dState, VERR_INVALID_STATE);
1596
1597 PVMSVGA3DDXCONTEXT pDXContext;
1598 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
1599 AssertRCReturn(rc, rc);
1600 RT_UNTRUSTED_VALIDATED_FENCE();
1601
1602 ASSERT_GUEST_RETURN(type < RT_ELEMENTS(pDXContext->aCOTMobs), VERR_INVALID_PARAMETER);
1603 RT_UNTRUSTED_VALIDATED_FENCE();
1604
1605 if (pMob)
1606 {
1607 /* Bind a mob to the COTable. */
1608 /* Create a memory pointer, which is accessible by host. */
1609 rc = vmsvgaR3MobBackingStoreCreate(pSvgaR3State, pMob, validSizeInBytes);
1610 }
1611 else
1612 {
1613 /* Unbind. */
1614 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pDXContext->aCOTMobs[type]);
1615 }
1616
1617 uint32_t cEntries = 0;
1618 if (RT_SUCCESS(rc))
1619 {
1620 static uint32_t const s_acbEntry[SVGA_COTABLE_MAX] =
1621 {
1622 sizeof(SVGACOTableDXRTViewEntry),
1623 sizeof(SVGACOTableDXDSViewEntry),
1624 sizeof(SVGACOTableDXSRViewEntry),
1625 sizeof(SVGACOTableDXElementLayoutEntry),
1626 sizeof(SVGACOTableDXBlendStateEntry),
1627 sizeof(SVGACOTableDXDepthStencilEntry),
1628 sizeof(SVGACOTableDXRasterizerStateEntry),
1629 sizeof(SVGACOTableDXSamplerEntry),
1630 sizeof(SVGACOTableDXStreamOutputEntry),
1631 sizeof(SVGACOTableDXQueryEntry),
1632 sizeof(SVGACOTableDXShaderEntry),
1633 sizeof(SVGACOTableDXUAViewEntry),
1634 };
1635
1636 uint32_t cbCOT = vmsvgaR3MobSize(pMob);
1637 cEntries = cbCOT / s_acbEntry[type];
1638
1639 rc = pSvgaR3State->pFuncsDX->pfnDXSetCOTable(pThisCC, pDXContext, type, cEntries);
1640 }
1641
1642 if (RT_SUCCESS(rc))
1643 {
1644 pDXContext->aCOTMobs[type] = pMob;
1645 void *pvCOT = vmsvgaR3MobBackingStoreGet(pMob, 0);
1646 switch (type)
1647 {
1648 case SVGA_COTABLE_RTVIEW:
1649 pDXContext->cot.paRTView = (SVGACOTableDXRTViewEntry *)pvCOT;
1650 pDXContext->cot.cRTView = cEntries;
1651 break;
1652 case SVGA_COTABLE_DSVIEW:
1653 pDXContext->cot.paDSView = (SVGACOTableDXDSViewEntry *)pvCOT;
1654 pDXContext->cot.cDSView = cEntries;
1655 break;
1656 case SVGA_COTABLE_SRVIEW:
1657 pDXContext->cot.paSRView = (SVGACOTableDXSRViewEntry *)pvCOT;
1658 pDXContext->cot.cSRView = cEntries;
1659 break;
1660 case SVGA_COTABLE_ELEMENTLAYOUT:
1661 pDXContext->cot.paElementLayout = (SVGACOTableDXElementLayoutEntry *)pvCOT;
1662 pDXContext->cot.cElementLayout = cEntries;
1663 break;
1664 case SVGA_COTABLE_BLENDSTATE:
1665 pDXContext->cot.paBlendState = (SVGACOTableDXBlendStateEntry *)pvCOT;
1666 pDXContext->cot.cBlendState = cEntries;
1667 break;
1668 case SVGA_COTABLE_DEPTHSTENCIL:
1669 pDXContext->cot.paDepthStencil = (SVGACOTableDXDepthStencilEntry *)pvCOT;
1670 pDXContext->cot.cDepthStencil = cEntries;
1671 break;
1672 case SVGA_COTABLE_RASTERIZERSTATE:
1673 pDXContext->cot.paRasterizerState = (SVGACOTableDXRasterizerStateEntry *)pvCOT;
1674 pDXContext->cot.cRasterizerState = cEntries;
1675 break;
1676 case SVGA_COTABLE_SAMPLER:
1677 pDXContext->cot.paSampler = (SVGACOTableDXSamplerEntry *)pvCOT;
1678 pDXContext->cot.cSampler = cEntries;
1679 break;
1680 case SVGA_COTABLE_STREAMOUTPUT:
1681 pDXContext->cot.paStreamOutput = (SVGACOTableDXStreamOutputEntry *)pvCOT;
1682 pDXContext->cot.cStreamOutput = cEntries;
1683 break;
1684 case SVGA_COTABLE_DXQUERY:
1685 pDXContext->cot.paQuery = (SVGACOTableDXQueryEntry *)pvCOT;
1686 pDXContext->cot.cQuery = cEntries;
1687 break;
1688 case SVGA_COTABLE_DXSHADER:
1689 pDXContext->cot.paShader = (SVGACOTableDXShaderEntry *)pvCOT;
1690 pDXContext->cot.cShader = cEntries;
1691 break;
1692 case SVGA_COTABLE_UAVIEW:
1693 pDXContext->cot.paUAView = (SVGACOTableDXUAViewEntry *)pvCOT;
1694 pDXContext->cot.cUAView = cEntries;
1695 break;
1696 case SVGA_COTABLE_MAX: break; /* Compiler warning */
1697 }
1698 }
1699 else
1700 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
1701
1702 return rc;
1703}
1704
1705
1706int vmsvga3dDXReadbackCOTable(PVGASTATECC pThisCC, uint32_t idDXContext)
1707{
1708 int rc;
1709 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1710 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXReadbackCOTable, VERR_INVALID_STATE);
1711 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1712 AssertReturn(p3dState, VERR_INVALID_STATE);
1713
1714 PVMSVGA3DDXCONTEXT pDXContext;
1715 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1716 AssertRCReturn(rc, rc);
1717
1718 rc = pSvgaR3State->pFuncsDX->pfnDXReadbackCOTable(pThisCC, pDXContext);
1719 return rc;
1720}
1721
1722
1723int vmsvga3dDXBufferCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
1724{
1725 int rc;
1726 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1727 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBufferCopy, VERR_INVALID_STATE);
1728 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1729 AssertReturn(p3dState, VERR_INVALID_STATE);
1730
1731 PVMSVGA3DDXCONTEXT pDXContext;
1732 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1733 AssertRCReturn(rc, rc);
1734
1735 rc = pSvgaR3State->pFuncsDX->pfnDXBufferCopy(pThisCC, pDXContext);
1736 return rc;
1737}
1738
1739
1740int vmsvga3dDXTransferFromBuffer(PVGASTATECC pThisCC, uint32_t idDXContext)
1741{
1742 int rc;
1743 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1744 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXTransferFromBuffer, VERR_INVALID_STATE);
1745 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1746 AssertReturn(p3dState, VERR_INVALID_STATE);
1747
1748 PVMSVGA3DDXCONTEXT pDXContext;
1749 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1750 AssertRCReturn(rc, rc);
1751
1752 rc = pSvgaR3State->pFuncsDX->pfnDXTransferFromBuffer(pThisCC, pDXContext);
1753 return rc;
1754}
1755
1756
1757int vmsvga3dDXSurfaceCopyAndReadback(PVGASTATECC pThisCC, uint32_t idDXContext)
1758{
1759 int rc;
1760 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1761 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSurfaceCopyAndReadback, VERR_INVALID_STATE);
1762 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1763 AssertReturn(p3dState, VERR_INVALID_STATE);
1764
1765 PVMSVGA3DDXCONTEXT pDXContext;
1766 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1767 AssertRCReturn(rc, rc);
1768
1769 rc = pSvgaR3State->pFuncsDX->pfnDXSurfaceCopyAndReadback(pThisCC, pDXContext);
1770 return rc;
1771}
1772
1773
1774int vmsvga3dDXMoveQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
1775{
1776 int rc;
1777 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1778 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXMoveQuery, VERR_INVALID_STATE);
1779 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1780 AssertReturn(p3dState, VERR_INVALID_STATE);
1781
1782 PVMSVGA3DDXCONTEXT pDXContext;
1783 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1784 AssertRCReturn(rc, rc);
1785
1786 rc = pSvgaR3State->pFuncsDX->pfnDXMoveQuery(pThisCC, pDXContext);
1787 return rc;
1788}
1789
1790
1791int vmsvga3dDXBindAllQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
1792{
1793 int rc;
1794 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1795 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindAllQuery, VERR_INVALID_STATE);
1796 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1797 AssertReturn(p3dState, VERR_INVALID_STATE);
1798
1799 PVMSVGA3DDXCONTEXT pDXContext;
1800 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1801 AssertRCReturn(rc, rc);
1802
1803 rc = pSvgaR3State->pFuncsDX->pfnDXBindAllQuery(pThisCC, pDXContext);
1804 return rc;
1805}
1806
1807
1808int vmsvga3dDXReadbackAllQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
1809{
1810 int rc;
1811 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1812 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXReadbackAllQuery, VERR_INVALID_STATE);
1813 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1814 AssertReturn(p3dState, VERR_INVALID_STATE);
1815
1816 PVMSVGA3DDXCONTEXT pDXContext;
1817 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1818 AssertRCReturn(rc, rc);
1819
1820 rc = pSvgaR3State->pFuncsDX->pfnDXReadbackAllQuery(pThisCC, pDXContext);
1821 return rc;
1822}
1823
1824
1825int vmsvga3dDXPredTransferFromBuffer(PVGASTATECC pThisCC, uint32_t idDXContext)
1826{
1827 int rc;
1828 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1829 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredTransferFromBuffer, VERR_INVALID_STATE);
1830 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1831 AssertReturn(p3dState, VERR_INVALID_STATE);
1832
1833 PVMSVGA3DDXCONTEXT pDXContext;
1834 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1835 AssertRCReturn(rc, rc);
1836
1837 rc = pSvgaR3State->pFuncsDX->pfnDXPredTransferFromBuffer(pThisCC, pDXContext);
1838 return rc;
1839}
1840
1841
1842int vmsvga3dDXMobFence64(PVGASTATECC pThisCC, uint32_t idDXContext)
1843{
1844 int rc;
1845 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1846 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXMobFence64, VERR_INVALID_STATE);
1847 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1848 AssertReturn(p3dState, VERR_INVALID_STATE);
1849
1850 PVMSVGA3DDXCONTEXT pDXContext;
1851 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1852 AssertRCReturn(rc, rc);
1853
1854 rc = pSvgaR3State->pFuncsDX->pfnDXMobFence64(pThisCC, pDXContext);
1855 return rc;
1856}
1857
1858
1859int vmsvga3dDXBindAllShader(PVGASTATECC pThisCC, uint32_t idDXContext)
1860{
1861 int rc;
1862 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1863 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindAllShader, VERR_INVALID_STATE);
1864 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1865 AssertReturn(p3dState, VERR_INVALID_STATE);
1866
1867 PVMSVGA3DDXCONTEXT pDXContext;
1868 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1869 AssertRCReturn(rc, rc);
1870
1871 rc = pSvgaR3State->pFuncsDX->pfnDXBindAllShader(pThisCC, pDXContext);
1872 return rc;
1873}
1874
1875
1876int vmsvga3dDXHint(PVGASTATECC pThisCC, uint32_t idDXContext)
1877{
1878 int rc;
1879 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1880 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXHint, VERR_INVALID_STATE);
1881 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1882 AssertReturn(p3dState, VERR_INVALID_STATE);
1883
1884 PVMSVGA3DDXCONTEXT pDXContext;
1885 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1886 AssertRCReturn(rc, rc);
1887
1888 rc = pSvgaR3State->pFuncsDX->pfnDXHint(pThisCC, pDXContext);
1889 return rc;
1890}
1891
1892
1893int vmsvga3dDXBufferUpdate(PVGASTATECC pThisCC, uint32_t idDXContext)
1894{
1895 int rc;
1896 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1897 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBufferUpdate, VERR_INVALID_STATE);
1898 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1899 AssertReturn(p3dState, VERR_INVALID_STATE);
1900
1901 PVMSVGA3DDXCONTEXT pDXContext;
1902 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1903 AssertRCReturn(rc, rc);
1904
1905 rc = pSvgaR3State->pFuncsDX->pfnDXBufferUpdate(pThisCC, pDXContext);
1906 return rc;
1907}
1908
1909
1910int vmsvga3dDXSetVSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
1911{
1912 int rc;
1913 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1914 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetVSConstantBufferOffset, VERR_INVALID_STATE);
1915 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1916 AssertReturn(p3dState, VERR_INVALID_STATE);
1917
1918 PVMSVGA3DDXCONTEXT pDXContext;
1919 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1920 AssertRCReturn(rc, rc);
1921
1922 rc = pSvgaR3State->pFuncsDX->pfnDXSetVSConstantBufferOffset(pThisCC, pDXContext);
1923 return rc;
1924}
1925
1926
1927int vmsvga3dDXSetPSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
1928{
1929 int rc;
1930 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1931 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetPSConstantBufferOffset, VERR_INVALID_STATE);
1932 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1933 AssertReturn(p3dState, VERR_INVALID_STATE);
1934
1935 PVMSVGA3DDXCONTEXT pDXContext;
1936 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1937 AssertRCReturn(rc, rc);
1938
1939 rc = pSvgaR3State->pFuncsDX->pfnDXSetPSConstantBufferOffset(pThisCC, pDXContext);
1940 return rc;
1941}
1942
1943
1944int vmsvga3dDXSetGSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
1945{
1946 int rc;
1947 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1948 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetGSConstantBufferOffset, VERR_INVALID_STATE);
1949 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1950 AssertReturn(p3dState, VERR_INVALID_STATE);
1951
1952 PVMSVGA3DDXCONTEXT pDXContext;
1953 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1954 AssertRCReturn(rc, rc);
1955
1956 rc = pSvgaR3State->pFuncsDX->pfnDXSetGSConstantBufferOffset(pThisCC, pDXContext);
1957 return rc;
1958}
1959
1960
1961int vmsvga3dDXSetHSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
1962{
1963 int rc;
1964 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1965 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetHSConstantBufferOffset, VERR_INVALID_STATE);
1966 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1967 AssertReturn(p3dState, VERR_INVALID_STATE);
1968
1969 PVMSVGA3DDXCONTEXT pDXContext;
1970 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1971 AssertRCReturn(rc, rc);
1972
1973 rc = pSvgaR3State->pFuncsDX->pfnDXSetHSConstantBufferOffset(pThisCC, pDXContext);
1974 return rc;
1975}
1976
1977
1978int vmsvga3dDXSetDSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
1979{
1980 int rc;
1981 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1982 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetDSConstantBufferOffset, VERR_INVALID_STATE);
1983 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1984 AssertReturn(p3dState, VERR_INVALID_STATE);
1985
1986 PVMSVGA3DDXCONTEXT pDXContext;
1987 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1988 AssertRCReturn(rc, rc);
1989
1990 rc = pSvgaR3State->pFuncsDX->pfnDXSetDSConstantBufferOffset(pThisCC, pDXContext);
1991 return rc;
1992}
1993
1994
1995int vmsvga3dDXSetCSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
1996{
1997 int rc;
1998 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1999 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetCSConstantBufferOffset, VERR_INVALID_STATE);
2000 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2001 AssertReturn(p3dState, VERR_INVALID_STATE);
2002
2003 PVMSVGA3DDXCONTEXT pDXContext;
2004 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2005 AssertRCReturn(rc, rc);
2006
2007 rc = pSvgaR3State->pFuncsDX->pfnDXSetCSConstantBufferOffset(pThisCC, pDXContext);
2008 return rc;
2009}
2010
2011
2012int vmsvga3dDXCondBindAllShader(PVGASTATECC pThisCC, uint32_t idDXContext)
2013{
2014 int rc;
2015 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2016 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXCondBindAllShader, VERR_INVALID_STATE);
2017 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2018 AssertReturn(p3dState, VERR_INVALID_STATE);
2019
2020 PVMSVGA3DDXCONTEXT pDXContext;
2021 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2022 AssertRCReturn(rc, rc);
2023
2024 rc = pSvgaR3State->pFuncsDX->pfnDXCondBindAllShader(pThisCC, pDXContext);
2025 return rc;
2026}
2027
2028
2029int vmsvga3dScreenCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2030{
2031 int rc;
2032 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2033 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnScreenCopy, VERR_INVALID_STATE);
2034 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2035 AssertReturn(p3dState, VERR_INVALID_STATE);
2036
2037 PVMSVGA3DDXCONTEXT pDXContext;
2038 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2039 AssertRCReturn(rc, rc);
2040
2041 rc = pSvgaR3State->pFuncsDX->pfnScreenCopy(pThisCC, pDXContext);
2042 return rc;
2043}
2044
2045
2046int vmsvga3dGrowOTable(PVGASTATECC pThisCC, uint32_t idDXContext)
2047{
2048 int rc;
2049 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2050 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnGrowOTable, VERR_INVALID_STATE);
2051 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2052 AssertReturn(p3dState, VERR_INVALID_STATE);
2053
2054 PVMSVGA3DDXCONTEXT pDXContext;
2055 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2056 AssertRCReturn(rc, rc);
2057
2058 rc = pSvgaR3State->pFuncsDX->pfnGrowOTable(pThisCC, pDXContext);
2059 return rc;
2060}
2061
2062
2063int vmsvga3dDXGrowCOTable(PVGASTATECC pThisCC, uint32_t idDXContext)
2064{
2065 int rc;
2066 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2067 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXGrowCOTable, VERR_INVALID_STATE);
2068 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2069 AssertReturn(p3dState, VERR_INVALID_STATE);
2070
2071 PVMSVGA3DDXCONTEXT pDXContext;
2072 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2073 AssertRCReturn(rc, rc);
2074
2075 rc = pSvgaR3State->pFuncsDX->pfnDXGrowCOTable(pThisCC, pDXContext);
2076 return rc;
2077}
2078
2079
2080int vmsvga3dIntraSurfaceCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2081{
2082 int rc;
2083 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2084 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnIntraSurfaceCopy, VERR_INVALID_STATE);
2085 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2086 AssertReturn(p3dState, VERR_INVALID_STATE);
2087
2088 PVMSVGA3DDXCONTEXT pDXContext;
2089 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2090 AssertRCReturn(rc, rc);
2091
2092 rc = pSvgaR3State->pFuncsDX->pfnIntraSurfaceCopy(pThisCC, pDXContext);
2093 return rc;
2094}
2095
2096
2097int vmsvga3dDefineGBSurface_v3(PVGASTATECC pThisCC, uint32_t idDXContext)
2098{
2099 int rc;
2100 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2101 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v3, VERR_INVALID_STATE);
2102 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2103 AssertReturn(p3dState, VERR_INVALID_STATE);
2104
2105 PVMSVGA3DDXCONTEXT pDXContext;
2106 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2107 AssertRCReturn(rc, rc);
2108
2109 rc = pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v3(pThisCC, pDXContext);
2110 return rc;
2111}
2112
2113
2114int vmsvga3dDXResolveCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2115{
2116 int rc;
2117 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2118 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXResolveCopy, VERR_INVALID_STATE);
2119 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2120 AssertReturn(p3dState, VERR_INVALID_STATE);
2121
2122 PVMSVGA3DDXCONTEXT pDXContext;
2123 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2124 AssertRCReturn(rc, rc);
2125
2126 rc = pSvgaR3State->pFuncsDX->pfnDXResolveCopy(pThisCC, pDXContext);
2127 return rc;
2128}
2129
2130
2131int vmsvga3dDXPredResolveCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2132{
2133 int rc;
2134 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2135 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredResolveCopy, VERR_INVALID_STATE);
2136 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2137 AssertReturn(p3dState, VERR_INVALID_STATE);
2138
2139 PVMSVGA3DDXCONTEXT pDXContext;
2140 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2141 AssertRCReturn(rc, rc);
2142
2143 rc = pSvgaR3State->pFuncsDX->pfnDXPredResolveCopy(pThisCC, pDXContext);
2144 return rc;
2145}
2146
2147
2148int vmsvga3dDXPredConvertRegion(PVGASTATECC pThisCC, uint32_t idDXContext)
2149{
2150 int rc;
2151 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2152 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredConvertRegion, VERR_INVALID_STATE);
2153 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2154 AssertReturn(p3dState, VERR_INVALID_STATE);
2155
2156 PVMSVGA3DDXCONTEXT pDXContext;
2157 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2158 AssertRCReturn(rc, rc);
2159
2160 rc = pSvgaR3State->pFuncsDX->pfnDXPredConvertRegion(pThisCC, pDXContext);
2161 return rc;
2162}
2163
2164
2165int vmsvga3dDXPredConvert(PVGASTATECC pThisCC, uint32_t idDXContext)
2166{
2167 int rc;
2168 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2169 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredConvert, VERR_INVALID_STATE);
2170 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2171 AssertReturn(p3dState, VERR_INVALID_STATE);
2172
2173 PVMSVGA3DDXCONTEXT pDXContext;
2174 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2175 AssertRCReturn(rc, rc);
2176
2177 rc = pSvgaR3State->pFuncsDX->pfnDXPredConvert(pThisCC, pDXContext);
2178 return rc;
2179}
2180
2181
2182int vmsvga3dWholeSurfaceCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2183{
2184 int rc;
2185 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2186 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnWholeSurfaceCopy, VERR_INVALID_STATE);
2187 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2188 AssertReturn(p3dState, VERR_INVALID_STATE);
2189
2190 PVMSVGA3DDXCONTEXT pDXContext;
2191 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2192 AssertRCReturn(rc, rc);
2193
2194 rc = pSvgaR3State->pFuncsDX->pfnWholeSurfaceCopy(pThisCC, pDXContext);
2195 return rc;
2196}
2197
2198
2199int vmsvga3dDXDefineUAView(PVGASTATECC pThisCC, uint32_t idDXContext)
2200{
2201 int rc;
2202 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2203 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineUAView, VERR_INVALID_STATE);
2204 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2205 AssertReturn(p3dState, VERR_INVALID_STATE);
2206
2207 PVMSVGA3DDXCONTEXT pDXContext;
2208 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2209 AssertRCReturn(rc, rc);
2210
2211 rc = pSvgaR3State->pFuncsDX->pfnDXDefineUAView(pThisCC, pDXContext);
2212 return rc;
2213}
2214
2215
2216int vmsvga3dDXDestroyUAView(PVGASTATECC pThisCC, uint32_t idDXContext)
2217{
2218 int rc;
2219 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2220 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyUAView, VERR_INVALID_STATE);
2221 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2222 AssertReturn(p3dState, VERR_INVALID_STATE);
2223
2224 PVMSVGA3DDXCONTEXT pDXContext;
2225 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2226 AssertRCReturn(rc, rc);
2227
2228 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyUAView(pThisCC, pDXContext);
2229 return rc;
2230}
2231
2232
2233int vmsvga3dDXClearUAViewUint(PVGASTATECC pThisCC, uint32_t idDXContext)
2234{
2235 int rc;
2236 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2237 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearUAViewUint, VERR_INVALID_STATE);
2238 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2239 AssertReturn(p3dState, VERR_INVALID_STATE);
2240
2241 PVMSVGA3DDXCONTEXT pDXContext;
2242 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2243 AssertRCReturn(rc, rc);
2244
2245 rc = pSvgaR3State->pFuncsDX->pfnDXClearUAViewUint(pThisCC, pDXContext);
2246 return rc;
2247}
2248
2249
2250int vmsvga3dDXClearUAViewFloat(PVGASTATECC pThisCC, uint32_t idDXContext)
2251{
2252 int rc;
2253 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2254 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearUAViewFloat, VERR_INVALID_STATE);
2255 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2256 AssertReturn(p3dState, VERR_INVALID_STATE);
2257
2258 PVMSVGA3DDXCONTEXT pDXContext;
2259 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2260 AssertRCReturn(rc, rc);
2261
2262 rc = pSvgaR3State->pFuncsDX->pfnDXClearUAViewFloat(pThisCC, pDXContext);
2263 return rc;
2264}
2265
2266
2267int vmsvga3dDXCopyStructureCount(PVGASTATECC pThisCC, uint32_t idDXContext)
2268{
2269 int rc;
2270 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2271 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXCopyStructureCount, VERR_INVALID_STATE);
2272 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2273 AssertReturn(p3dState, VERR_INVALID_STATE);
2274
2275 PVMSVGA3DDXCONTEXT pDXContext;
2276 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2277 AssertRCReturn(rc, rc);
2278
2279 rc = pSvgaR3State->pFuncsDX->pfnDXCopyStructureCount(pThisCC, pDXContext);
2280 return rc;
2281}
2282
2283
2284int vmsvga3dDXSetUAViews(PVGASTATECC pThisCC, uint32_t idDXContext)
2285{
2286 int rc;
2287 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2288 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetUAViews, VERR_INVALID_STATE);
2289 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2290 AssertReturn(p3dState, VERR_INVALID_STATE);
2291
2292 PVMSVGA3DDXCONTEXT pDXContext;
2293 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2294 AssertRCReturn(rc, rc);
2295
2296 rc = pSvgaR3State->pFuncsDX->pfnDXSetUAViews(pThisCC, pDXContext);
2297 return rc;
2298}
2299
2300
2301int vmsvga3dDXDrawIndexedInstancedIndirect(PVGASTATECC pThisCC, uint32_t idDXContext)
2302{
2303 int rc;
2304 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2305 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstancedIndirect, VERR_INVALID_STATE);
2306 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2307 AssertReturn(p3dState, VERR_INVALID_STATE);
2308
2309 PVMSVGA3DDXCONTEXT pDXContext;
2310 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2311 AssertRCReturn(rc, rc);
2312
2313 rc = pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstancedIndirect(pThisCC, pDXContext);
2314 return rc;
2315}
2316
2317
2318int vmsvga3dDXDrawInstancedIndirect(PVGASTATECC pThisCC, uint32_t idDXContext)
2319{
2320 int rc;
2321 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2322 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawInstancedIndirect, VERR_INVALID_STATE);
2323 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2324 AssertReturn(p3dState, VERR_INVALID_STATE);
2325
2326 PVMSVGA3DDXCONTEXT pDXContext;
2327 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2328 AssertRCReturn(rc, rc);
2329
2330 rc = pSvgaR3State->pFuncsDX->pfnDXDrawInstancedIndirect(pThisCC, pDXContext);
2331 return rc;
2332}
2333
2334
2335int vmsvga3dDXDispatch(PVGASTATECC pThisCC, uint32_t idDXContext)
2336{
2337 int rc;
2338 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2339 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDispatch, VERR_INVALID_STATE);
2340 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2341 AssertReturn(p3dState, VERR_INVALID_STATE);
2342
2343 PVMSVGA3DDXCONTEXT pDXContext;
2344 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2345 AssertRCReturn(rc, rc);
2346
2347 rc = pSvgaR3State->pFuncsDX->pfnDXDispatch(pThisCC, pDXContext);
2348 return rc;
2349}
2350
2351
2352int vmsvga3dDXDispatchIndirect(PVGASTATECC pThisCC, uint32_t idDXContext)
2353{
2354 int rc;
2355 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2356 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDispatchIndirect, VERR_INVALID_STATE);
2357 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2358 AssertReturn(p3dState, VERR_INVALID_STATE);
2359
2360 PVMSVGA3DDXCONTEXT pDXContext;
2361 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2362 AssertRCReturn(rc, rc);
2363
2364 rc = pSvgaR3State->pFuncsDX->pfnDXDispatchIndirect(pThisCC, pDXContext);
2365 return rc;
2366}
2367
2368
2369int vmsvga3dWriteZeroSurface(PVGASTATECC pThisCC, uint32_t idDXContext)
2370{
2371 int rc;
2372 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2373 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnWriteZeroSurface, VERR_INVALID_STATE);
2374 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2375 AssertReturn(p3dState, VERR_INVALID_STATE);
2376
2377 PVMSVGA3DDXCONTEXT pDXContext;
2378 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2379 AssertRCReturn(rc, rc);
2380
2381 rc = pSvgaR3State->pFuncsDX->pfnWriteZeroSurface(pThisCC, pDXContext);
2382 return rc;
2383}
2384
2385
2386int vmsvga3dHintZeroSurface(PVGASTATECC pThisCC, uint32_t idDXContext)
2387{
2388 int rc;
2389 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2390 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnHintZeroSurface, VERR_INVALID_STATE);
2391 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2392 AssertReturn(p3dState, VERR_INVALID_STATE);
2393
2394 PVMSVGA3DDXCONTEXT pDXContext;
2395 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2396 AssertRCReturn(rc, rc);
2397
2398 rc = pSvgaR3State->pFuncsDX->pfnHintZeroSurface(pThisCC, pDXContext);
2399 return rc;
2400}
2401
2402
2403int vmsvga3dDXTransferToBuffer(PVGASTATECC pThisCC, uint32_t idDXContext)
2404{
2405 int rc;
2406 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2407 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXTransferToBuffer, VERR_INVALID_STATE);
2408 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2409 AssertReturn(p3dState, VERR_INVALID_STATE);
2410
2411 PVMSVGA3DDXCONTEXT pDXContext;
2412 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2413 AssertRCReturn(rc, rc);
2414
2415 rc = pSvgaR3State->pFuncsDX->pfnDXTransferToBuffer(pThisCC, pDXContext);
2416 return rc;
2417}
2418
2419
2420int vmsvga3dDXSetStructureCount(PVGASTATECC pThisCC, uint32_t idDXContext)
2421{
2422 int rc;
2423 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2424 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetStructureCount, VERR_INVALID_STATE);
2425 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2426 AssertReturn(p3dState, VERR_INVALID_STATE);
2427
2428 PVMSVGA3DDXCONTEXT pDXContext;
2429 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2430 AssertRCReturn(rc, rc);
2431
2432 rc = pSvgaR3State->pFuncsDX->pfnDXSetStructureCount(pThisCC, pDXContext);
2433 return rc;
2434}
2435
2436
2437int vmsvga3dLogicOpsBitBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
2438{
2439 int rc;
2440 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2441 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsBitBlt, VERR_INVALID_STATE);
2442 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2443 AssertReturn(p3dState, VERR_INVALID_STATE);
2444
2445 PVMSVGA3DDXCONTEXT pDXContext;
2446 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2447 AssertRCReturn(rc, rc);
2448
2449 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsBitBlt(pThisCC, pDXContext);
2450 return rc;
2451}
2452
2453
2454int vmsvga3dLogicOpsTransBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
2455{
2456 int rc;
2457 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2458 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsTransBlt, VERR_INVALID_STATE);
2459 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2460 AssertReturn(p3dState, VERR_INVALID_STATE);
2461
2462 PVMSVGA3DDXCONTEXT pDXContext;
2463 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2464 AssertRCReturn(rc, rc);
2465
2466 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsTransBlt(pThisCC, pDXContext);
2467 return rc;
2468}
2469
2470
2471int vmsvga3dLogicOpsStretchBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
2472{
2473 int rc;
2474 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2475 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsStretchBlt, VERR_INVALID_STATE);
2476 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2477 AssertReturn(p3dState, VERR_INVALID_STATE);
2478
2479 PVMSVGA3DDXCONTEXT pDXContext;
2480 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2481 AssertRCReturn(rc, rc);
2482
2483 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsStretchBlt(pThisCC, pDXContext);
2484 return rc;
2485}
2486
2487
2488int vmsvga3dLogicOpsColorFill(PVGASTATECC pThisCC, uint32_t idDXContext)
2489{
2490 int rc;
2491 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2492 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsColorFill, VERR_INVALID_STATE);
2493 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2494 AssertReturn(p3dState, VERR_INVALID_STATE);
2495
2496 PVMSVGA3DDXCONTEXT pDXContext;
2497 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2498 AssertRCReturn(rc, rc);
2499
2500 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsColorFill(pThisCC, pDXContext);
2501 return rc;
2502}
2503
2504
2505int vmsvga3dLogicOpsAlphaBlend(PVGASTATECC pThisCC, uint32_t idDXContext)
2506{
2507 int rc;
2508 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2509 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsAlphaBlend, VERR_INVALID_STATE);
2510 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2511 AssertReturn(p3dState, VERR_INVALID_STATE);
2512
2513 PVMSVGA3DDXCONTEXT pDXContext;
2514 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2515 AssertRCReturn(rc, rc);
2516
2517 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsAlphaBlend(pThisCC, pDXContext);
2518 return rc;
2519}
2520
2521
2522int vmsvga3dLogicOpsClearTypeBlend(PVGASTATECC pThisCC, uint32_t idDXContext)
2523{
2524 int rc;
2525 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2526 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsClearTypeBlend, VERR_INVALID_STATE);
2527 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2528 AssertReturn(p3dState, VERR_INVALID_STATE);
2529
2530 PVMSVGA3DDXCONTEXT pDXContext;
2531 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2532 AssertRCReturn(rc, rc);
2533
2534 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsClearTypeBlend(pThisCC, pDXContext);
2535 return rc;
2536}
2537
2538
2539int vmsvga3dDefineGBSurface_v4(PVGASTATECC pThisCC, uint32_t idDXContext)
2540{
2541 int rc;
2542 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2543 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v4, VERR_INVALID_STATE);
2544 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2545 AssertReturn(p3dState, VERR_INVALID_STATE);
2546
2547 PVMSVGA3DDXCONTEXT pDXContext;
2548 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2549 AssertRCReturn(rc, rc);
2550
2551 rc = pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v4(pThisCC, pDXContext);
2552 return rc;
2553}
2554
2555
2556int vmsvga3dDXSetCSUAViews(PVGASTATECC pThisCC, uint32_t idDXContext)
2557{
2558 int rc;
2559 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2560 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetCSUAViews, VERR_INVALID_STATE);
2561 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2562 AssertReturn(p3dState, VERR_INVALID_STATE);
2563
2564 PVMSVGA3DDXCONTEXT pDXContext;
2565 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2566 AssertRCReturn(rc, rc);
2567
2568 rc = pSvgaR3State->pFuncsDX->pfnDXSetCSUAViews(pThisCC, pDXContext);
2569 return rc;
2570}
2571
2572
2573int vmsvga3dDXSetMinLOD(PVGASTATECC pThisCC, uint32_t idDXContext)
2574{
2575 int rc;
2576 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2577 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetMinLOD, VERR_INVALID_STATE);
2578 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2579 AssertReturn(p3dState, VERR_INVALID_STATE);
2580
2581 PVMSVGA3DDXCONTEXT pDXContext;
2582 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2583 AssertRCReturn(rc, rc);
2584
2585 rc = pSvgaR3State->pFuncsDX->pfnDXSetMinLOD(pThisCC, pDXContext);
2586 return rc;
2587}
2588
2589
2590int vmsvga3dDXDefineStreamOutputWithMob(PVGASTATECC pThisCC, uint32_t idDXContext)
2591{
2592 int rc;
2593 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2594 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutputWithMob, VERR_INVALID_STATE);
2595 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2596 AssertReturn(p3dState, VERR_INVALID_STATE);
2597
2598 PVMSVGA3DDXCONTEXT pDXContext;
2599 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2600 AssertRCReturn(rc, rc);
2601
2602 rc = pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutputWithMob(pThisCC, pDXContext);
2603 return rc;
2604}
2605
2606
2607int vmsvga3dDXSetShaderIface(PVGASTATECC pThisCC, uint32_t idDXContext)
2608{
2609 int rc;
2610 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2611 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetShaderIface, VERR_INVALID_STATE);
2612 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2613 AssertReturn(p3dState, VERR_INVALID_STATE);
2614
2615 PVMSVGA3DDXCONTEXT pDXContext;
2616 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2617 AssertRCReturn(rc, rc);
2618
2619 rc = pSvgaR3State->pFuncsDX->pfnDXSetShaderIface(pThisCC, pDXContext);
2620 return rc;
2621}
2622
2623
2624int vmsvga3dDXBindStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext)
2625{
2626 int rc;
2627 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2628 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindStreamOutput, VERR_INVALID_STATE);
2629 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2630 AssertReturn(p3dState, VERR_INVALID_STATE);
2631
2632 PVMSVGA3DDXCONTEXT pDXContext;
2633 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2634 AssertRCReturn(rc, rc);
2635
2636 rc = pSvgaR3State->pFuncsDX->pfnDXBindStreamOutput(pThisCC, pDXContext);
2637 return rc;
2638}
2639
2640
2641int vmsvga3dSurfaceStretchBltNonMSToMS(PVGASTATECC pThisCC, uint32_t idDXContext)
2642{
2643 int rc;
2644 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2645 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnSurfaceStretchBltNonMSToMS, VERR_INVALID_STATE);
2646 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2647 AssertReturn(p3dState, VERR_INVALID_STATE);
2648
2649 PVMSVGA3DDXCONTEXT pDXContext;
2650 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2651 AssertRCReturn(rc, rc);
2652
2653 rc = pSvgaR3State->pFuncsDX->pfnSurfaceStretchBltNonMSToMS(pThisCC, pDXContext);
2654 return rc;
2655}
2656
2657
2658int vmsvga3dDXBindShaderIface(PVGASTATECC pThisCC, uint32_t idDXContext)
2659{
2660 int rc;
2661 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2662 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindShaderIface, VERR_INVALID_STATE);
2663 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2664 AssertReturn(p3dState, VERR_INVALID_STATE);
2665
2666 PVMSVGA3DDXCONTEXT pDXContext;
2667 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2668 AssertRCReturn(rc, rc);
2669
2670 rc = pSvgaR3State->pFuncsDX->pfnDXBindShaderIface(pThisCC, pDXContext);
2671 return rc;
2672}
2673
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