VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-dx.cpp@ 88904

Last change on this file since 88904 was 88904, checked in by vboxsync, 4 years ago

Devices/Graphics: Helpers to read and write guest MOB memory; fixed some commands; started to deal with shared surfaces; make code more straightforward. bugref:9830
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File size: 104.0 KB
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1/* $Id: DevVGA-SVGA3d-dx.cpp 88904 2021-05-06 14:02:43Z vboxsync $ */
2/** @file
3 * DevSVGA3d - VMWare SVGA device, 3D parts - Common code for DX backend interface.
4 */
5
6/*
7 * Copyright (C) 2020-2021 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
23#include <VBox/AssertGuest.h>
24#include <iprt/errcore.h>
25#include <VBox/log.h>
26#include <VBox/vmm/pdmdev.h>
27
28#include <iprt/assert.h>
29#include <iprt/mem.h>
30
31#include <VBoxVideo.h> /* required by DevVGA.h */
32
33/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
34#include "DevVGA.h"
35
36#include "DevVGA-SVGA.h"
37#include "DevVGA-SVGA3d.h"
38#include "DevVGA-SVGA3d-internal.h"
39#include "DevVGA-SVGA-internal.h"
40
41
42int vmsvga3dDXUnbindContext(PVGASTATECC pThisCC, uint32_t cid, SVGADXContextMobFormat *pSvgaDXContext)
43{
44 int rc;
45 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
46 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindContext, VERR_INVALID_STATE);
47 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
48 AssertReturn(p3dState, VERR_INVALID_STATE);
49
50 PVMSVGA3DDXCONTEXT pDXContext;
51 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
52 AssertRCReturn(rc, rc);
53
54 /* Copy the host structure back to the guest memory. */
55 memcpy(pSvgaDXContext, &pDXContext->svgaDXContext, sizeof(*pSvgaDXContext));
56
57 return rc;
58}
59
60
61/**
62 * Create a new 3D DX context.
63 *
64 * @returns VBox status code.
65 * @param pThisCC The VGA/VMSVGA state for ring-3.
66 * @param cid Context id to be created.
67 */
68int vmsvga3dDXDefineContext(PVGASTATECC pThisCC, uint32_t cid)
69{
70 int rc;
71 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
72 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineContext, VERR_INVALID_STATE);
73 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
74 AssertReturn(p3dState, VERR_INVALID_STATE);
75
76 PVMSVGA3DDXCONTEXT pDXContext;
77
78 LogFunc(("cid %d\n", cid));
79
80 AssertReturn(cid < SVGA3D_MAX_CONTEXT_IDS, VERR_INVALID_PARAMETER);
81
82 if (cid >= p3dState->cDXContexts)
83 {
84 /* Grow the array. */
85 uint32_t cNew = RT_ALIGN(cid + 15, 16);
86 void *pvNew = RTMemRealloc(p3dState->papDXContexts, sizeof(p3dState->papDXContexts[0]) * cNew);
87 AssertReturn(pvNew, VERR_NO_MEMORY);
88 p3dState->papDXContexts = (PVMSVGA3DDXCONTEXT *)pvNew;
89 while (p3dState->cDXContexts < cNew)
90 {
91 pDXContext = (PVMSVGA3DDXCONTEXT)RTMemAllocZ(sizeof(*pDXContext));
92 AssertReturn(pDXContext, VERR_NO_MEMORY);
93 pDXContext->cid = SVGA3D_INVALID_ID;
94 p3dState->papDXContexts[p3dState->cDXContexts++] = pDXContext;
95 }
96 }
97 /* If one already exists with this id, then destroy it now. */
98 if (p3dState->papDXContexts[cid]->cid != SVGA3D_INVALID_ID)
99 vmsvga3dDXDestroyContext(pThisCC, cid);
100
101 pDXContext = p3dState->papDXContexts[cid];
102 memset(pDXContext, 0, sizeof(*pDXContext));
103 /* 0xFFFFFFFF (SVGA_ID_INVALID) is a better initial value than 0 for most of svgaDXContext fields. */
104 memset(&pDXContext->svgaDXContext, 0xFF, sizeof(pDXContext->svgaDXContext));
105 pDXContext->cid = cid;
106
107 /* Init the backend specific data. */
108 rc = pSvgaR3State->pFuncsDX->pfnDXDefineContext(pThisCC, pDXContext);
109
110 /* Cleanup on failure. */
111 if (RT_FAILURE(rc))
112 vmsvga3dDXDestroyContext(pThisCC, cid);
113
114 return rc;
115}
116
117
118int vmsvga3dDXDestroyContext(PVGASTATECC pThisCC, uint32_t cid)
119{
120 int rc;
121 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
122 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyContext, VERR_INVALID_STATE);
123 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
124 AssertReturn(p3dState, VERR_INVALID_STATE);
125
126 PVMSVGA3DDXCONTEXT pDXContext;
127 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
128 AssertRCReturn(rc, rc);
129
130 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyContext(pThisCC, pDXContext);
131 return rc;
132}
133
134
135int vmsvga3dDXBindContext(PVGASTATECC pThisCC, uint32_t cid, SVGADXContextMobFormat *pSvgaDXContext)
136{
137 int rc;
138 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
139 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindContext, VERR_INVALID_STATE);
140 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
141 AssertReturn(p3dState, VERR_INVALID_STATE);
142
143 PVMSVGA3DDXCONTEXT pDXContext;
144 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
145 AssertRCReturn(rc, rc);
146
147 if (pSvgaDXContext)
148 memcpy(&pDXContext->svgaDXContext, pSvgaDXContext, sizeof(*pSvgaDXContext));
149
150 rc = pSvgaR3State->pFuncsDX->pfnDXBindContext(pThisCC, pDXContext);
151 return rc;
152}
153
154
155int vmsvga3dDXReadbackContext(PVGASTATECC pThisCC, uint32_t idDXContext)
156{
157 int rc;
158 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
159 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXReadbackContext, VERR_INVALID_STATE);
160 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
161 AssertReturn(p3dState, VERR_INVALID_STATE);
162
163 PVMSVGA3DDXCONTEXT pDXContext;
164 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
165 AssertRCReturn(rc, rc);
166
167 rc = pSvgaR3State->pFuncsDX->pfnDXReadbackContext(pThisCC, pDXContext);
168 return rc;
169}
170
171
172int vmsvga3dDXInvalidateContext(PVGASTATECC pThisCC, uint32_t idDXContext)
173{
174 int rc;
175 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
176 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXInvalidateContext, VERR_INVALID_STATE);
177 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
178 AssertReturn(p3dState, VERR_INVALID_STATE);
179
180 PVMSVGA3DDXCONTEXT pDXContext;
181 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
182 AssertRCReturn(rc, rc);
183
184 rc = pSvgaR3State->pFuncsDX->pfnDXInvalidateContext(pThisCC, pDXContext);
185 return rc;
186}
187
188
189int vmsvga3dDXSetSingleConstantBuffer(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetSingleConstantBuffer const *pCmd)
190{
191 int rc;
192 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
193 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetSingleConstantBuffer, VERR_INVALID_STATE);
194 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
195 AssertReturn(p3dState, VERR_INVALID_STATE);
196
197 PVMSVGA3DDXCONTEXT pDXContext;
198 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
199 AssertRCReturn(rc, rc);
200
201 ASSERT_GUEST_RETURN(pCmd->slot < SVGA3D_DX_MAX_CONSTBUFFERS, VERR_INVALID_PARAMETER);
202 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
203 RT_UNTRUSTED_VALIDATED_FENCE();
204
205 rc = pSvgaR3State->pFuncsDX->pfnDXSetSingleConstantBuffer(pThisCC, pDXContext, pCmd->slot, pCmd->type, pCmd->sid, pCmd->offsetInBytes, pCmd->sizeInBytes);
206 if (RT_SUCCESS(rc))
207 {
208 uint32_t const idxShaderState = pCmd->type - SVGA3D_SHADERTYPE_MIN;
209 SVGA3dConstantBufferBinding *pCBB = &pDXContext->svgaDXContext.shaderState[idxShaderState].constantBuffers[pCmd->slot];
210 pCBB->sid = pCmd->sid;
211 pCBB->offsetInBytes = pCmd->offsetInBytes;
212 pCBB->sizeInBytes = pCmd->sizeInBytes;
213 }
214 return rc;
215}
216
217
218int vmsvga3dDXSetShaderResources(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetShaderResources const *pCmd, uint32_t cShaderResourceViewId, SVGA3dShaderResourceViewId const *paShaderResourceViewId)
219{
220 int rc;
221 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
222 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetShaderResources, VERR_INVALID_STATE);
223 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
224 AssertReturn(p3dState, VERR_INVALID_STATE);
225
226 PVMSVGA3DDXCONTEXT pDXContext;
227 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
228 AssertRCReturn(rc, rc);
229
230 ASSERT_GUEST_RETURN(pCmd->startView < SVGA3D_DX_MAX_SRVIEWS, VERR_INVALID_PARAMETER);
231 ASSERT_GUEST_RETURN(cShaderResourceViewId <= SVGA3D_DX_MAX_SRVIEWS - pCmd->startView, VERR_INVALID_PARAMETER);
232 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
233 ASSERT_GUEST_RETURN(pDXContext->cot.paSRView, VERR_INVALID_STATE);
234 for (uint32_t i = 0; i < cShaderResourceViewId; ++i)
235 ASSERT_GUEST_RETURN( paShaderResourceViewId[i] < pDXContext->cot.cSRView
236 || paShaderResourceViewId[i] == SVGA3D_INVALID_ID, VERR_INVALID_PARAMETER);
237 RT_UNTRUSTED_VALIDATED_FENCE();
238
239 rc = pSvgaR3State->pFuncsDX->pfnDXSetShaderResources(pThisCC, pDXContext, pCmd->startView, pCmd->type, cShaderResourceViewId, paShaderResourceViewId);
240 return rc;
241}
242
243
244int vmsvga3dDXSetShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetShader const *pCmd)
245{
246 int rc;
247 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
248 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetShader, VERR_INVALID_STATE);
249 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
250 AssertReturn(p3dState, VERR_INVALID_STATE);
251
252 PVMSVGA3DDXCONTEXT pDXContext;
253 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
254 AssertRCReturn(rc, rc);
255
256 ASSERT_GUEST_RETURN( pCmd->shaderId < pDXContext->cot.cShader
257 || pCmd->shaderId == SVGA_ID_INVALID, VERR_INVALID_PARAMETER);
258 RT_UNTRUSTED_VALIDATED_FENCE();
259
260 PVMSVGA3DSHADER pShader;
261 if (pCmd->shaderId != SVGA_ID_INVALID)
262 {
263 SVGACOTableDXShaderEntry *pEntry = &pDXContext->cot.paShader[pCmd->shaderId];
264 ASSERT_GUEST_RETURN(pEntry->type == pCmd->type, VERR_INVALID_PARAMETER);
265 RT_UNTRUSTED_VALIDATED_FENCE();
266
267 pShader = &pDXContext->paShader[pCmd->shaderId];
268 }
269 else
270 pShader = NULL;
271
272 rc = pSvgaR3State->pFuncsDX->pfnDXSetShader(pThisCC, pDXContext, pCmd->type, pShader);
273 return rc;
274}
275
276
277int vmsvga3dDXSetSamplers(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetSamplers const *pCmd, uint32_t cSamplerId, SVGA3dSamplerId const *paSamplerId)
278{
279 int rc;
280 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
281 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetSamplers, VERR_INVALID_STATE);
282 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
283 AssertReturn(p3dState, VERR_INVALID_STATE);
284
285 PVMSVGA3DDXCONTEXT pDXContext;
286 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
287 AssertRCReturn(rc, rc);
288
289 ASSERT_GUEST_RETURN(pCmd->startSampler < SVGA3D_DX_MAX_SAMPLERS, VERR_INVALID_PARAMETER);
290 ASSERT_GUEST_RETURN(cSamplerId <= SVGA3D_DX_MAX_SAMPLERS - pCmd->startSampler, VERR_INVALID_PARAMETER);
291 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
292 ASSERT_GUEST_RETURN(pDXContext->cot.paSampler, VERR_INVALID_STATE);
293 for (uint32_t i = 0; i < cSamplerId; ++i)
294 ASSERT_GUEST_RETURN(paSamplerId[i] < pDXContext->cot.cSampler, VERR_INVALID_PARAMETER);
295 RT_UNTRUSTED_VALIDATED_FENCE();
296
297 rc = pSvgaR3State->pFuncsDX->pfnDXSetSamplers(pThisCC, pDXContext, pCmd->startSampler, pCmd->type, cSamplerId, paSamplerId);
298 return rc;
299}
300
301
302int vmsvga3dDXDraw(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDraw const *pCmd)
303{
304 int rc;
305 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
306 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDraw, VERR_INVALID_STATE);
307 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
308 AssertReturn(p3dState, VERR_INVALID_STATE);
309
310 PVMSVGA3DDXCONTEXT pDXContext;
311 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
312 AssertRCReturn(rc, rc);
313
314 rc = pSvgaR3State->pFuncsDX->pfnDXDraw(pThisCC, pDXContext, pCmd->vertexCount, pCmd->startVertexLocation);
315#ifdef DUMP_BITMAPS
316 SVGACOTableDXRTViewEntry *pRTViewEntry = &pDXContext->cot.paRTView[pDXContext->svgaDXContext.renderState.renderTargetViewIds[0]];
317 SVGA3dSurfaceImageId image;
318 image.sid = pRTViewEntry->sid;
319 image.face = 0;
320 image.mipmap = 0;
321 VMSVGA3D_MAPPED_SURFACE map;
322 int rc2 = pSvgaR3State->pFuncsMap->pfnSurfaceMap(pThisCC, idDXContext, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
323 if (RT_SUCCESS(rc2))
324 {
325 vmsvga3dMapWriteBmpFile(&map, "rt-");
326 pSvgaR3State->pFuncsMap->pfnSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
327 }
328#endif
329 return rc;
330}
331
332
333int vmsvga3dDXDrawIndexed(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawIndexed const *pCmd)
334{
335 int rc;
336 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
337 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawIndexed, VERR_INVALID_STATE);
338 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
339 AssertReturn(p3dState, VERR_INVALID_STATE);
340
341 PVMSVGA3DDXCONTEXT pDXContext;
342 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
343 AssertRCReturn(rc, rc);
344
345 rc = pSvgaR3State->pFuncsDX->pfnDXDrawIndexed(pThisCC, pDXContext, pCmd->indexCount, pCmd->startIndexLocation, pCmd->baseVertexLocation);
346 return rc;
347}
348
349
350int vmsvga3dDXDrawInstanced(PVGASTATECC pThisCC, uint32_t idDXContext)
351{
352 int rc;
353 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
354 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawInstanced, VERR_INVALID_STATE);
355 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
356 AssertReturn(p3dState, VERR_INVALID_STATE);
357
358 PVMSVGA3DDXCONTEXT pDXContext;
359 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
360 AssertRCReturn(rc, rc);
361
362 rc = pSvgaR3State->pFuncsDX->pfnDXDrawInstanced(pThisCC, pDXContext);
363 return rc;
364}
365
366
367int vmsvga3dDXDrawIndexedInstanced(PVGASTATECC pThisCC, uint32_t idDXContext)
368{
369 int rc;
370 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
371 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstanced, VERR_INVALID_STATE);
372 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
373 AssertReturn(p3dState, VERR_INVALID_STATE);
374
375 PVMSVGA3DDXCONTEXT pDXContext;
376 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
377 AssertRCReturn(rc, rc);
378
379 rc = pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstanced(pThisCC, pDXContext);
380 return rc;
381}
382
383
384int vmsvga3dDXDrawAuto(PVGASTATECC pThisCC, uint32_t idDXContext)
385{
386 int rc;
387 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
388 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawAuto, VERR_INVALID_STATE);
389 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
390 AssertReturn(p3dState, VERR_INVALID_STATE);
391
392 PVMSVGA3DDXCONTEXT pDXContext;
393 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
394 AssertRCReturn(rc, rc);
395
396 rc = pSvgaR3State->pFuncsDX->pfnDXDrawAuto(pThisCC, pDXContext);
397 return rc;
398}
399
400
401int vmsvga3dDXSetInputLayout(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dElementLayoutId elementLayoutId)
402{
403 int rc;
404 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
405 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetInputLayout, VERR_INVALID_STATE);
406 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
407 AssertReturn(p3dState, VERR_INVALID_STATE);
408
409 PVMSVGA3DDXCONTEXT pDXContext;
410 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
411 AssertRCReturn(rc, rc);
412
413 ASSERT_GUEST_RETURN(pDXContext->cot.paElementLayout, VERR_INVALID_STATE);
414 ASSERT_GUEST_RETURN(elementLayoutId < pDXContext->cot.cElementLayout, VERR_INVALID_PARAMETER);
415 RT_UNTRUSTED_VALIDATED_FENCE();
416
417 rc = pSvgaR3State->pFuncsDX->pfnDXSetInputLayout(pThisCC, pDXContext, elementLayoutId);
418 return rc;
419}
420
421
422int vmsvga3dDXSetVertexBuffers(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t startBuffer, uint32_t cVertexBuffer, SVGA3dVertexBuffer const *paVertexBuffer)
423{
424 int rc;
425 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
426 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetVertexBuffers, VERR_INVALID_STATE);
427 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
428 AssertReturn(p3dState, VERR_INVALID_STATE);
429
430 PVMSVGA3DDXCONTEXT pDXContext;
431 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
432 AssertRCReturn(rc, rc);
433
434 ASSERT_GUEST_RETURN(startBuffer < SVGA3D_DX_MAX_VERTEXBUFFERS, VERR_INVALID_PARAMETER);
435 ASSERT_GUEST_RETURN(cVertexBuffer <= SVGA3D_DX_MAX_VERTEXBUFFERS - startBuffer, VERR_INVALID_PARAMETER);
436 RT_UNTRUSTED_VALIDATED_FENCE();
437
438 rc = pSvgaR3State->pFuncsDX->pfnDXSetVertexBuffers(pThisCC, pDXContext, startBuffer, cVertexBuffer, paVertexBuffer);
439 return rc;
440}
441
442
443int vmsvga3dDXSetIndexBuffer(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetIndexBuffer const *pCmd)
444{
445 int rc;
446 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
447 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetIndexBuffer, VERR_INVALID_STATE);
448 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
449 AssertReturn(p3dState, VERR_INVALID_STATE);
450
451 PVMSVGA3DDXCONTEXT pDXContext;
452 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
453 AssertRCReturn(rc, rc);
454
455 rc = pSvgaR3State->pFuncsDX->pfnDXSetIndexBuffer(pThisCC, pDXContext, pCmd->sid, pCmd->format, pCmd->offset);
456 if (RT_SUCCESS(rc))
457 {
458 pDXContext->svgaDXContext.inputAssembly.indexBufferSid = pCmd->sid;
459 pDXContext->svgaDXContext.inputAssembly.indexBufferOffset = pCmd->offset;
460 pDXContext->svgaDXContext.inputAssembly.indexBufferFormat = pCmd->format;
461 }
462 return rc;
463}
464
465
466int vmsvga3dDXSetTopology(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dPrimitiveType topology)
467{
468 int rc;
469 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
470 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetTopology, VERR_INVALID_STATE);
471 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
472 AssertReturn(p3dState, VERR_INVALID_STATE);
473
474 PVMSVGA3DDXCONTEXT pDXContext;
475 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
476 AssertRCReturn(rc, rc);
477
478 ASSERT_GUEST_RETURN(topology >= SVGA3D_PRIMITIVE_MIN && topology < SVGA3D_PRIMITIVE_MAX, VERR_INVALID_PARAMETER);
479
480 rc = pSvgaR3State->pFuncsDX->pfnDXSetTopology(pThisCC, pDXContext, topology);
481 if (RT_SUCCESS(rc))
482 pDXContext->svgaDXContext.inputAssembly.topology = topology;
483 return rc;
484}
485
486
487int vmsvga3dDXSetRenderTargets(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dDepthStencilViewId depthStencilViewId, uint32_t cRenderTargetViewId, SVGA3dRenderTargetViewId const *paRenderTargetViewId)
488{
489 int rc;
490 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
491 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetRenderTargets, VERR_INVALID_STATE);
492 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
493 AssertReturn(p3dState, VERR_INVALID_STATE);
494
495 PVMSVGA3DDXCONTEXT pDXContext;
496 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
497 AssertRCReturn(rc, rc);
498
499 ASSERT_GUEST_RETURN( depthStencilViewId < pDXContext->cot.cDSView
500 || depthStencilViewId == SVGA_ID_INVALID, VERR_INVALID_PARAMETER);
501 ASSERT_GUEST_RETURN(cRenderTargetViewId < SVGA3D_MAX_RENDER_TARGETS, VERR_INVALID_PARAMETER);
502 for (uint32_t i = 0; i < cRenderTargetViewId; ++i)
503 ASSERT_GUEST_RETURN( paRenderTargetViewId[i] < pDXContext->cot.cRTView
504 || paRenderTargetViewId[i] == SVGA_ID_INVALID, VERR_INVALID_PARAMETER);
505 RT_UNTRUSTED_VALIDATED_FENCE();
506
507 rc = pSvgaR3State->pFuncsDX->pfnDXSetRenderTargets(pThisCC, pDXContext, depthStencilViewId, cRenderTargetViewId, paRenderTargetViewId);
508 if (RT_SUCCESS(rc))
509 {
510 pDXContext->svgaDXContext.renderState.depthStencilViewId = depthStencilViewId;
511 for (uint32_t i = 0; i < cRenderTargetViewId; ++i)
512 pDXContext->svgaDXContext.renderState.renderTargetViewIds[i] = paRenderTargetViewId[i];
513 }
514 return rc;
515}
516
517
518int vmsvga3dDXSetBlendState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetBlendState const *pCmd)
519{
520 int rc;
521 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
522 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetBlendState, VERR_INVALID_STATE);
523 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
524 AssertReturn(p3dState, VERR_INVALID_STATE);
525
526 PVMSVGA3DDXCONTEXT pDXContext;
527 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
528 AssertRCReturn(rc, rc);
529
530 SVGA3dBlendStateId const blendId = pCmd->blendId;
531
532 ASSERT_GUEST_RETURN(pDXContext->cot.paBlendState, VERR_INVALID_STATE);
533 ASSERT_GUEST_RETURN(blendId < pDXContext->cot.cBlendState, VERR_INVALID_PARAMETER);
534 RT_UNTRUSTED_VALIDATED_FENCE();
535
536 rc = pSvgaR3State->pFuncsDX->pfnDXSetBlendState(pThisCC, pDXContext, blendId, pCmd->blendFactor, pCmd->sampleMask);
537 return rc;
538}
539
540
541int vmsvga3dDXSetDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetDepthStencilState const *pCmd)
542{
543 int rc;
544 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
545 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetDepthStencilState, VERR_INVALID_STATE);
546 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
547 AssertReturn(p3dState, VERR_INVALID_STATE);
548
549 PVMSVGA3DDXCONTEXT pDXContext;
550 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
551 AssertRCReturn(rc, rc);
552
553 SVGA3dDepthStencilStateId const depthStencilId = pCmd->depthStencilId;
554
555 ASSERT_GUEST_RETURN(pDXContext->cot.paDepthStencil, VERR_INVALID_STATE);
556 ASSERT_GUEST_RETURN(depthStencilId < pDXContext->cot.cDepthStencil, VERR_INVALID_PARAMETER);
557 RT_UNTRUSTED_VALIDATED_FENCE();
558
559 rc = pSvgaR3State->pFuncsDX->pfnDXSetDepthStencilState(pThisCC, pDXContext, depthStencilId, pCmd->stencilRef);
560 return rc;
561}
562
563
564int vmsvga3dDXSetRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dRasterizerStateId rasterizerId)
565{
566 int rc;
567 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
568 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetRasterizerState, VERR_INVALID_STATE);
569 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
570 AssertReturn(p3dState, VERR_INVALID_STATE);
571
572 PVMSVGA3DDXCONTEXT pDXContext;
573 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
574 AssertRCReturn(rc, rc);
575
576 ASSERT_GUEST_RETURN(rasterizerId < pDXContext->cot.cRasterizerState, VERR_INVALID_PARAMETER);
577 RT_UNTRUSTED_VALIDATED_FENCE();
578
579 rc = pSvgaR3State->pFuncsDX->pfnDXSetRasterizerState(pThisCC, pDXContext, rasterizerId);
580 return rc;
581}
582
583
584int vmsvga3dDXDefineQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
585{
586 int rc;
587 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
588 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineQuery, VERR_INVALID_STATE);
589 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
590 AssertReturn(p3dState, VERR_INVALID_STATE);
591
592 PVMSVGA3DDXCONTEXT pDXContext;
593 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
594 AssertRCReturn(rc, rc);
595
596 rc = pSvgaR3State->pFuncsDX->pfnDXDefineQuery(pThisCC, pDXContext);
597 return rc;
598}
599
600
601int vmsvga3dDXDestroyQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
602{
603 int rc;
604 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
605 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyQuery, VERR_INVALID_STATE);
606 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
607 AssertReturn(p3dState, VERR_INVALID_STATE);
608
609 PVMSVGA3DDXCONTEXT pDXContext;
610 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
611 AssertRCReturn(rc, rc);
612
613 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyQuery(pThisCC, pDXContext);
614 return rc;
615}
616
617
618int vmsvga3dDXBindQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
619{
620 int rc;
621 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
622 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindQuery, VERR_INVALID_STATE);
623 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
624 AssertReturn(p3dState, VERR_INVALID_STATE);
625
626 PVMSVGA3DDXCONTEXT pDXContext;
627 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
628 AssertRCReturn(rc, rc);
629
630 rc = pSvgaR3State->pFuncsDX->pfnDXBindQuery(pThisCC, pDXContext);
631 return rc;
632}
633
634
635int vmsvga3dDXSetQueryOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
636{
637 int rc;
638 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
639 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetQueryOffset, VERR_INVALID_STATE);
640 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
641 AssertReturn(p3dState, VERR_INVALID_STATE);
642
643 PVMSVGA3DDXCONTEXT pDXContext;
644 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
645 AssertRCReturn(rc, rc);
646
647 rc = pSvgaR3State->pFuncsDX->pfnDXSetQueryOffset(pThisCC, pDXContext);
648 return rc;
649}
650
651
652int vmsvga3dDXBeginQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
653{
654 int rc;
655 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
656 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBeginQuery, VERR_INVALID_STATE);
657 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
658 AssertReturn(p3dState, VERR_INVALID_STATE);
659
660 PVMSVGA3DDXCONTEXT pDXContext;
661 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
662 AssertRCReturn(rc, rc);
663
664 rc = pSvgaR3State->pFuncsDX->pfnDXBeginQuery(pThisCC, pDXContext);
665 return rc;
666}
667
668
669int vmsvga3dDXEndQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
670{
671 int rc;
672 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
673 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXEndQuery, VERR_INVALID_STATE);
674 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
675 AssertReturn(p3dState, VERR_INVALID_STATE);
676
677 PVMSVGA3DDXCONTEXT pDXContext;
678 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
679 AssertRCReturn(rc, rc);
680
681 rc = pSvgaR3State->pFuncsDX->pfnDXEndQuery(pThisCC, pDXContext);
682 return rc;
683}
684
685
686int vmsvga3dDXReadbackQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
687{
688 int rc;
689 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
690 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXReadbackQuery, VERR_INVALID_STATE);
691 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
692 AssertReturn(p3dState, VERR_INVALID_STATE);
693
694 PVMSVGA3DDXCONTEXT pDXContext;
695 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
696 AssertRCReturn(rc, rc);
697
698 rc = pSvgaR3State->pFuncsDX->pfnDXReadbackQuery(pThisCC, pDXContext);
699 return rc;
700}
701
702
703int vmsvga3dDXSetPredication(PVGASTATECC pThisCC, uint32_t idDXContext)
704{
705 int rc;
706 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
707 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetPredication, VERR_INVALID_STATE);
708 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
709 AssertReturn(p3dState, VERR_INVALID_STATE);
710
711 PVMSVGA3DDXCONTEXT pDXContext;
712 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
713 AssertRCReturn(rc, rc);
714
715 rc = pSvgaR3State->pFuncsDX->pfnDXSetPredication(pThisCC, pDXContext);
716 return rc;
717}
718
719
720int vmsvga3dDXSetSOTargets(PVGASTATECC pThisCC, uint32_t idDXContext)
721{
722 int rc;
723 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
724 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetSOTargets, VERR_INVALID_STATE);
725 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
726 AssertReturn(p3dState, VERR_INVALID_STATE);
727
728 PVMSVGA3DDXCONTEXT pDXContext;
729 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
730 AssertRCReturn(rc, rc);
731
732 rc = pSvgaR3State->pFuncsDX->pfnDXSetSOTargets(pThisCC, pDXContext);
733 return rc;
734}
735
736
737int vmsvga3dDXSetViewports(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t cViewport, SVGA3dViewport const *paViewport)
738{
739 int rc;
740 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
741 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetViewports, VERR_INVALID_STATE);
742 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
743 AssertReturn(p3dState, VERR_INVALID_STATE);
744
745 PVMSVGA3DDXCONTEXT pDXContext;
746 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
747 AssertRCReturn(rc, rc);
748
749 rc = pSvgaR3State->pFuncsDX->pfnDXSetViewports(pThisCC, pDXContext, cViewport, paViewport);
750 return rc;
751}
752
753
754int vmsvga3dDXSetScissorRects(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t cRect, SVGASignedRect const *paRect)
755{
756 int rc;
757 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
758 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetScissorRects, VERR_INVALID_STATE);
759 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
760 AssertReturn(p3dState, VERR_INVALID_STATE);
761
762 PVMSVGA3DDXCONTEXT pDXContext;
763 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
764 AssertRCReturn(rc, rc);
765
766 rc = pSvgaR3State->pFuncsDX->pfnDXSetScissorRects(pThisCC, pDXContext, cRect, paRect);
767 return rc;
768}
769
770
771int vmsvga3dDXClearRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXClearRenderTargetView const *pCmd)
772{
773 int rc;
774 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
775 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearRenderTargetView, VERR_INVALID_STATE);
776 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
777 AssertReturn(p3dState, VERR_INVALID_STATE);
778
779 PVMSVGA3DDXCONTEXT pDXContext;
780 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
781 AssertRCReturn(rc, rc);
782
783 SVGA3dRenderTargetViewId const renderTargetViewId = pCmd->renderTargetViewId;
784
785 ASSERT_GUEST_RETURN(pDXContext->cot.paRTView, VERR_INVALID_STATE);
786 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, VERR_INVALID_PARAMETER);
787 RT_UNTRUSTED_VALIDATED_FENCE();
788
789 rc = pSvgaR3State->pFuncsDX->pfnDXClearRenderTargetView(pThisCC, pDXContext, renderTargetViewId, &pCmd->rgba);
790 return rc;
791}
792
793
794int vmsvga3dDXClearDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXClearDepthStencilView const *pCmd)
795{
796 int rc;
797 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
798 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearDepthStencilView, VERR_INVALID_STATE);
799 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
800 AssertReturn(p3dState, VERR_INVALID_STATE);
801
802 PVMSVGA3DDXCONTEXT pDXContext;
803 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
804 AssertRCReturn(rc, rc);
805
806 SVGA3dDepthStencilViewId const depthStencilViewId = pCmd->depthStencilViewId;
807
808 ASSERT_GUEST_RETURN(pDXContext->cot.paDSView, VERR_INVALID_STATE);
809 ASSERT_GUEST_RETURN(depthStencilViewId < pDXContext->cot.cDSView, VERR_INVALID_PARAMETER);
810 RT_UNTRUSTED_VALIDATED_FENCE();
811
812 rc = pSvgaR3State->pFuncsDX->pfnDXClearDepthStencilView(pThisCC, pDXContext, pCmd->flags, depthStencilViewId, pCmd->depth, (uint8_t)pCmd->stencil);
813 return rc;
814}
815
816
817int vmsvga3dDXPredCopyRegion(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXPredCopyRegion const *pCmd)
818{
819 int rc;
820 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
821 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredCopyRegion, VERR_INVALID_STATE);
822 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
823 AssertReturn(p3dState, VERR_INVALID_STATE);
824
825 PVMSVGA3DDXCONTEXT pDXContext;
826 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
827 AssertRCReturn(rc, rc);
828
829 rc = pSvgaR3State->pFuncsDX->pfnDXPredCopyRegion(pThisCC, pDXContext, pCmd->dstSid, pCmd->dstSubResource, pCmd->srcSid, pCmd->srcSubResource, &pCmd->box);
830 return rc;
831}
832
833
834int vmsvga3dDXPredCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
835{
836 int rc;
837 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
838 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredCopy, VERR_INVALID_STATE);
839 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
840 AssertReturn(p3dState, VERR_INVALID_STATE);
841
842 PVMSVGA3DDXCONTEXT pDXContext;
843 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
844 AssertRCReturn(rc, rc);
845
846 rc = pSvgaR3State->pFuncsDX->pfnDXPredCopy(pThisCC, pDXContext);
847 return rc;
848}
849
850
851int vmsvga3dDXPresentBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
852{
853 int rc;
854 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
855 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPresentBlt, VERR_INVALID_STATE);
856 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
857 AssertReturn(p3dState, VERR_INVALID_STATE);
858
859 PVMSVGA3DDXCONTEXT pDXContext;
860 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
861 AssertRCReturn(rc, rc);
862
863 rc = pSvgaR3State->pFuncsDX->pfnDXPresentBlt(pThisCC, pDXContext);
864 return rc;
865}
866
867
868int vmsvga3dDXGenMips(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXGenMips const *pCmd)
869{
870 int rc;
871 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
872 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXGenMips, VERR_INVALID_STATE);
873 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
874 AssertReturn(p3dState, VERR_INVALID_STATE);
875
876 PVMSVGA3DDXCONTEXT pDXContext;
877 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
878 AssertRCReturn(rc, rc);
879
880 SVGA3dShaderResourceViewId const shaderResourceViewId = pCmd->shaderResourceViewId;
881
882 ASSERT_GUEST_RETURN(pDXContext->cot.paSRView, VERR_INVALID_STATE);
883 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->cot.cSRView, VERR_INVALID_PARAMETER);
884 RT_UNTRUSTED_VALIDATED_FENCE();
885
886 rc = pSvgaR3State->pFuncsDX->pfnDXGenMips(pThisCC, pDXContext, shaderResourceViewId);
887 return rc;
888}
889
890
891int vmsvga3dDXUpdateSubResource(PVGASTATECC pThisCC, uint32_t idDXContext)
892{
893 int rc;
894 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
895 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXUpdateSubResource, VERR_INVALID_STATE);
896 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
897 AssertReturn(p3dState, VERR_INVALID_STATE);
898
899 PVMSVGA3DDXCONTEXT pDXContext;
900 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
901 AssertRCReturn(rc, rc);
902
903 rc = pSvgaR3State->pFuncsDX->pfnDXUpdateSubResource(pThisCC, pDXContext);
904 return rc;
905}
906
907
908int vmsvga3dDXReadbackSubResource(PVGASTATECC pThisCC, uint32_t idDXContext)
909{
910 int rc;
911 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
912 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXReadbackSubResource, VERR_INVALID_STATE);
913 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
914 AssertReturn(p3dState, VERR_INVALID_STATE);
915
916 PVMSVGA3DDXCONTEXT pDXContext;
917 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
918 AssertRCReturn(rc, rc);
919
920 rc = pSvgaR3State->pFuncsDX->pfnDXReadbackSubResource(pThisCC, pDXContext);
921 return rc;
922}
923
924
925int vmsvga3dDXInvalidateSubResource(PVGASTATECC pThisCC, uint32_t idDXContext)
926{
927 int rc;
928 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
929 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXInvalidateSubResource, VERR_INVALID_STATE);
930 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
931 AssertReturn(p3dState, VERR_INVALID_STATE);
932
933 PVMSVGA3DDXCONTEXT pDXContext;
934 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
935 AssertRCReturn(rc, rc);
936
937 rc = pSvgaR3State->pFuncsDX->pfnDXInvalidateSubResource(pThisCC, pDXContext);
938 return rc;
939}
940
941
942int vmsvga3dDXDefineShaderResourceView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineShaderResourceView const *pCmd)
943{
944 int rc;
945 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
946 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineShaderResourceView, VERR_INVALID_STATE);
947 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
948 AssertReturn(p3dState, VERR_INVALID_STATE);
949
950 PVMSVGA3DDXCONTEXT pDXContext;
951 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
952 AssertRCReturn(rc, rc);
953
954 SVGA3dShaderResourceViewId const shaderResourceViewId = pCmd->shaderResourceViewId;
955
956 ASSERT_GUEST_RETURN(pDXContext->cot.paSRView, VERR_INVALID_STATE);
957 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->cot.cSRView, VERR_INVALID_PARAMETER);
958 RT_UNTRUSTED_VALIDATED_FENCE();
959
960 SVGACOTableDXSRViewEntry *pEntry = &pDXContext->cot.paSRView[shaderResourceViewId];
961 pEntry->sid = pCmd->sid;
962 pEntry->format = pCmd->format;
963 pEntry->resourceDimension = pCmd->resourceDimension;
964 pEntry->desc = pCmd->desc;
965
966 rc = pSvgaR3State->pFuncsDX->pfnDXDefineShaderResourceView(pThisCC, pDXContext, shaderResourceViewId, pEntry);
967 return rc;
968}
969
970
971int vmsvga3dDXDestroyShaderResourceView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyShaderResourceView const *pCmd)
972{
973 int rc;
974 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
975 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyShaderResourceView, VERR_INVALID_STATE);
976 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
977 AssertReturn(p3dState, VERR_INVALID_STATE);
978
979 PVMSVGA3DDXCONTEXT pDXContext;
980 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
981 AssertRCReturn(rc, rc);
982
983 SVGA3dShaderResourceViewId const shaderResourceViewId = pCmd->shaderResourceViewId;
984
985 ASSERT_GUEST_RETURN(pDXContext->cot.paSRView, VERR_INVALID_STATE);
986 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->cot.cSRView, VERR_INVALID_PARAMETER);
987 RT_UNTRUSTED_VALIDATED_FENCE();
988
989 SVGACOTableDXSRViewEntry *pEntry = &pDXContext->cot.paSRView[shaderResourceViewId];
990 RT_ZERO(*pEntry);
991
992 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyShaderResourceView(pThisCC, pDXContext, shaderResourceViewId);
993 return rc;
994}
995
996
997int vmsvga3dDXDefineRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineRenderTargetView const *pCmd)
998{
999 int rc;
1000 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1001 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineRenderTargetView, VERR_INVALID_STATE);
1002 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1003 AssertReturn(p3dState, VERR_INVALID_STATE);
1004
1005 PVMSVGA3DDXCONTEXT pDXContext;
1006 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1007 AssertRCReturn(rc, rc);
1008
1009 SVGA3dRenderTargetViewId const renderTargetViewId = pCmd->renderTargetViewId;
1010
1011 ASSERT_GUEST_RETURN(pDXContext->cot.paRTView, VERR_INVALID_STATE);
1012 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, VERR_INVALID_PARAMETER);
1013 RT_UNTRUSTED_VALIDATED_FENCE();
1014
1015 SVGACOTableDXRTViewEntry *pEntry = &pDXContext->cot.paRTView[renderTargetViewId];
1016 pEntry->sid = pCmd->sid;
1017 pEntry->format = pCmd->format;
1018 pEntry->resourceDimension = pCmd->resourceDimension;
1019 pEntry->desc = pCmd->desc;
1020
1021 rc = pSvgaR3State->pFuncsDX->pfnDXDefineRenderTargetView(pThisCC, pDXContext, renderTargetViewId, pEntry);
1022 return rc;
1023}
1024
1025
1026int vmsvga3dDXDestroyRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyRenderTargetView const *pCmd)
1027{
1028 int rc;
1029 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1030 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyRenderTargetView, VERR_INVALID_STATE);
1031 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1032 AssertReturn(p3dState, VERR_INVALID_STATE);
1033
1034 PVMSVGA3DDXCONTEXT pDXContext;
1035 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1036 AssertRCReturn(rc, rc);
1037
1038 SVGA3dRenderTargetViewId const renderTargetViewId = pCmd->renderTargetViewId;
1039
1040 ASSERT_GUEST_RETURN(pDXContext->cot.paRTView, VERR_INVALID_STATE);
1041 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, VERR_INVALID_PARAMETER);
1042 RT_UNTRUSTED_VALIDATED_FENCE();
1043
1044 SVGACOTableDXRTViewEntry *pEntry = &pDXContext->cot.paRTView[renderTargetViewId];
1045 RT_ZERO(*pEntry);
1046
1047 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyRenderTargetView(pThisCC, pDXContext, renderTargetViewId);
1048 /// @todo for (uint32_t i = 0; i < SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS; ++i)
1049 //{
1050 // if (pDXContext->svgaDXContext.renderState.renderTargetViewIds[i] == renderTargetViewId)
1051 // pDXContext->svgaDXContext.renderState.renderTargetViewIds[i] = SVGA_ID_INVALID;
1052 //}
1053 return rc;
1054}
1055
1056
1057int vmsvga3dDXDefineDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineDepthStencilView_v2 const *pCmd)
1058{
1059 int rc;
1060 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1061 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilView, VERR_INVALID_STATE);
1062 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1063 AssertReturn(p3dState, VERR_INVALID_STATE);
1064
1065 PVMSVGA3DDXCONTEXT pDXContext;
1066 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1067 AssertRCReturn(rc, rc);
1068
1069 SVGA3dDepthStencilViewId const depthStencilViewId = pCmd->depthStencilViewId;
1070
1071 ASSERT_GUEST_RETURN(pDXContext->cot.paDSView, VERR_INVALID_STATE);
1072 ASSERT_GUEST_RETURN(depthStencilViewId < pDXContext->cot.cDSView, VERR_INVALID_PARAMETER);
1073 RT_UNTRUSTED_VALIDATED_FENCE();
1074
1075 SVGACOTableDXDSViewEntry *pEntry = &pDXContext->cot.paDSView[depthStencilViewId];
1076 pEntry->sid = pCmd->sid;
1077 pEntry->format = pCmd->format;
1078 pEntry->resourceDimension = pCmd->resourceDimension;
1079 pEntry->mipSlice = pCmd->mipSlice;
1080 pEntry->firstArraySlice = pCmd->firstArraySlice;
1081 pEntry->arraySize = pCmd->arraySize;
1082 pEntry->flags = pCmd->flags;
1083
1084 rc = pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilView(pThisCC, pDXContext, depthStencilViewId, pEntry);
1085 return rc;
1086}
1087
1088
1089int vmsvga3dDXDestroyDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyDepthStencilView const *pCmd)
1090{
1091 int rc;
1092 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1093 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilView, VERR_INVALID_STATE);
1094 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1095 AssertReturn(p3dState, VERR_INVALID_STATE);
1096
1097 PVMSVGA3DDXCONTEXT pDXContext;
1098 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1099 AssertRCReturn(rc, rc);
1100
1101 SVGA3dDepthStencilViewId const depthStencilViewId = pCmd->depthStencilViewId;
1102
1103 ASSERT_GUEST_RETURN(pDXContext->cot.paDSView, VERR_INVALID_STATE);
1104 ASSERT_GUEST_RETURN(depthStencilViewId < pDXContext->cot.cDSView, VERR_INVALID_PARAMETER);
1105 RT_UNTRUSTED_VALIDATED_FENCE();
1106
1107 SVGACOTableDXDSViewEntry *pEntry = &pDXContext->cot.paDSView[depthStencilViewId];
1108 RT_ZERO(*pEntry);
1109
1110 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilView(pThisCC, pDXContext, depthStencilViewId);
1111 return rc;
1112}
1113
1114
1115int vmsvga3dDXDefineElementLayout(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dElementLayoutId elementLayoutId, uint32_t cDesc, SVGA3dInputElementDesc const *paDesc)
1116{
1117 int rc;
1118 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1119 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineElementLayout, VERR_INVALID_STATE);
1120 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1121 AssertReturn(p3dState, VERR_INVALID_STATE);
1122
1123 PVMSVGA3DDXCONTEXT pDXContext;
1124 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1125 AssertRCReturn(rc, rc);
1126
1127 ASSERT_GUEST_RETURN(pDXContext->cot.paElementLayout, VERR_INVALID_STATE);
1128 ASSERT_GUEST_RETURN(elementLayoutId < pDXContext->cot.cElementLayout, VERR_INVALID_PARAMETER);
1129 RT_UNTRUSTED_VALIDATED_FENCE();
1130
1131 SVGACOTableDXElementLayoutEntry *pEntry = &pDXContext->cot.paElementLayout[elementLayoutId];
1132 pEntry->elid = elementLayoutId;
1133 pEntry->numDescs = RT_MIN(cDesc, RT_ELEMENTS(pEntry->descs));
1134 memcpy(pEntry->descs, paDesc, pEntry->numDescs * sizeof(pEntry->descs[0]));
1135
1136#ifdef LOG_ENABLED
1137 Log6(("Element layout %d: slot off fmt class step reg\n", pEntry->elid));
1138 for (uint32_t i = 0; i < pEntry->numDescs; ++i)
1139 {
1140 Log6((" [%u]: %u 0x%02X %d %u %u %u\n",
1141 i,
1142 pEntry->descs[i].inputSlot,
1143 pEntry->descs[i].alignedByteOffset,
1144 pEntry->descs[i].format,
1145 pEntry->descs[i].inputSlotClass,
1146 pEntry->descs[i].instanceDataStepRate,
1147 pEntry->descs[i].inputRegister
1148 ));
1149 }
1150#endif
1151
1152 rc = pSvgaR3State->pFuncsDX->pfnDXDefineElementLayout(pThisCC, pDXContext, elementLayoutId, pEntry);
1153 return rc;
1154}
1155
1156
1157int vmsvga3dDXDestroyElementLayout(PVGASTATECC pThisCC, uint32_t idDXContext)
1158{
1159 int rc;
1160 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1161 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyElementLayout, VERR_INVALID_STATE);
1162 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1163 AssertReturn(p3dState, VERR_INVALID_STATE);
1164
1165 PVMSVGA3DDXCONTEXT pDXContext;
1166 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1167 AssertRCReturn(rc, rc);
1168
1169 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyElementLayout(pThisCC, pDXContext);
1170 return rc;
1171}
1172
1173
1174int vmsvga3dDXDefineBlendState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineBlendState const *pCmd)
1175{
1176 int rc;
1177 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1178 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineBlendState, VERR_INVALID_STATE);
1179 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1180 AssertReturn(p3dState, VERR_INVALID_STATE);
1181
1182 PVMSVGA3DDXCONTEXT pDXContext;
1183 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1184 AssertRCReturn(rc, rc);
1185
1186 const SVGA3dBlendStateId blendId = pCmd->blendId;
1187
1188 ASSERT_GUEST_RETURN(pDXContext->cot.paBlendState, VERR_INVALID_STATE);
1189 ASSERT_GUEST_RETURN(blendId < pDXContext->cot.cBlendState, VERR_INVALID_PARAMETER);
1190 RT_UNTRUSTED_VALIDATED_FENCE();
1191
1192 SVGACOTableDXBlendStateEntry *pEntry = &pDXContext->cot.paBlendState[blendId];
1193 pEntry->alphaToCoverageEnable = pCmd->alphaToCoverageEnable;
1194 pEntry->independentBlendEnable = pCmd->independentBlendEnable;
1195 memcpy(pEntry->perRT, pCmd->perRT, sizeof(pEntry->perRT));
1196
1197 rc = pSvgaR3State->pFuncsDX->pfnDXDefineBlendState(pThisCC, pDXContext, blendId, pEntry);
1198 return rc;
1199}
1200
1201
1202int vmsvga3dDXDestroyBlendState(PVGASTATECC pThisCC, uint32_t idDXContext)
1203{
1204 int rc;
1205 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1206 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyBlendState, VERR_INVALID_STATE);
1207 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1208 AssertReturn(p3dState, VERR_INVALID_STATE);
1209
1210 PVMSVGA3DDXCONTEXT pDXContext;
1211 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1212 AssertRCReturn(rc, rc);
1213
1214 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyBlendState(pThisCC, pDXContext);
1215 return rc;
1216}
1217
1218
1219int vmsvga3dDXDefineDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineDepthStencilState const *pCmd)
1220{
1221 int rc;
1222 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1223 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilState, VERR_INVALID_STATE);
1224 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1225 AssertReturn(p3dState, VERR_INVALID_STATE);
1226
1227 PVMSVGA3DDXCONTEXT pDXContext;
1228 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1229 AssertRCReturn(rc, rc);
1230
1231 SVGA3dDepthStencilStateId const depthStencilId = pCmd->depthStencilId;
1232
1233 ASSERT_GUEST_RETURN(pDXContext->cot.paDepthStencil, VERR_INVALID_STATE);
1234 ASSERT_GUEST_RETURN(depthStencilId < pDXContext->cot.cDepthStencil, VERR_INVALID_PARAMETER);
1235 RT_UNTRUSTED_VALIDATED_FENCE();
1236
1237 SVGACOTableDXDepthStencilEntry *pEntry = &pDXContext->cot.paDepthStencil[depthStencilId];
1238 pEntry->depthEnable = pCmd->depthEnable;
1239 pEntry->depthWriteMask = pCmd->depthWriteMask;
1240 pEntry->depthFunc = pCmd->depthFunc;
1241 pEntry->stencilEnable = pCmd->stencilEnable;
1242 pEntry->frontEnable = pCmd->frontEnable;
1243 pEntry->backEnable = pCmd->backEnable;
1244 pEntry->stencilReadMask = pCmd->stencilReadMask;
1245 pEntry->stencilWriteMask = pCmd->stencilWriteMask;
1246
1247 pEntry->frontStencilFailOp = pCmd->frontStencilFailOp;
1248 pEntry->frontStencilDepthFailOp = pCmd->frontStencilDepthFailOp;
1249 pEntry->frontStencilPassOp = pCmd->frontStencilPassOp;
1250 pEntry->frontStencilFunc = pCmd->frontStencilFunc;
1251
1252 pEntry->backStencilFailOp = pCmd->backStencilFailOp;
1253 pEntry->backStencilDepthFailOp = pCmd->backStencilDepthFailOp;
1254 pEntry->backStencilPassOp = pCmd->backStencilPassOp;
1255 pEntry->backStencilFunc = pCmd->backStencilFunc;
1256
1257 rc = pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilState(pThisCC, pDXContext, depthStencilId, pEntry);
1258 return rc;
1259}
1260
1261
1262int vmsvga3dDXDestroyDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext)
1263{
1264 int rc;
1265 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1266 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilState, VERR_INVALID_STATE);
1267 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1268 AssertReturn(p3dState, VERR_INVALID_STATE);
1269
1270 PVMSVGA3DDXCONTEXT pDXContext;
1271 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1272 AssertRCReturn(rc, rc);
1273
1274 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilState(pThisCC, pDXContext);
1275 return rc;
1276}
1277
1278
1279int vmsvga3dDXDefineRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineRasterizerState const *pCmd)
1280{
1281 int rc;
1282 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1283 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineRasterizerState, VERR_INVALID_STATE);
1284 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1285 AssertReturn(p3dState, VERR_INVALID_STATE);
1286
1287 PVMSVGA3DDXCONTEXT pDXContext;
1288 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1289 AssertRCReturn(rc, rc);
1290
1291 SVGA3dRasterizerStateId const rasterizerId = pCmd->rasterizerId;
1292
1293 ASSERT_GUEST_RETURN(pDXContext->cot.paRasterizerState, VERR_INVALID_STATE);
1294 ASSERT_GUEST_RETURN(rasterizerId < pDXContext->cot.cRasterizerState, VERR_INVALID_PARAMETER);
1295 RT_UNTRUSTED_VALIDATED_FENCE();
1296
1297 SVGACOTableDXRasterizerStateEntry *pEntry = &pDXContext->cot.paRasterizerState[rasterizerId];
1298 pEntry->fillMode = pCmd->fillMode;
1299 pEntry->cullMode = pCmd->cullMode;
1300 pEntry->frontCounterClockwise = pCmd->frontCounterClockwise;
1301 pEntry->provokingVertexLast = pCmd->provokingVertexLast;
1302 pEntry->depthBias = pCmd->depthBias;
1303 pEntry->depthBiasClamp = pCmd->depthBiasClamp;
1304 pEntry->slopeScaledDepthBias = pCmd->slopeScaledDepthBias;
1305 pEntry->depthClipEnable = pCmd->depthClipEnable;
1306 pEntry->scissorEnable = pCmd->scissorEnable;
1307 pEntry->multisampleEnable = pCmd->multisampleEnable;
1308 pEntry->antialiasedLineEnable = pCmd->antialiasedLineEnable;
1309 pEntry->lineWidth = pCmd->lineWidth;
1310 pEntry->lineStippleEnable = pCmd->lineStippleEnable;
1311 pEntry->lineStippleFactor = pCmd->lineStippleFactor;
1312 pEntry->lineStipplePattern = pCmd->lineStipplePattern;
1313 pEntry->forcedSampleCount = 0; /** @todo Not in pCmd. */
1314 RT_ZERO(pEntry->mustBeZero);
1315
1316 rc = pSvgaR3State->pFuncsDX->pfnDXDefineRasterizerState(pThisCC, pDXContext, rasterizerId, pEntry);
1317 return rc;
1318}
1319
1320
1321int vmsvga3dDXDestroyRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext)
1322{
1323 int rc;
1324 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1325 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyRasterizerState, VERR_INVALID_STATE);
1326 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1327 AssertReturn(p3dState, VERR_INVALID_STATE);
1328
1329 PVMSVGA3DDXCONTEXT pDXContext;
1330 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1331 AssertRCReturn(rc, rc);
1332
1333 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyRasterizerState(pThisCC, pDXContext);
1334 return rc;
1335}
1336
1337
1338int vmsvga3dDXDefineSamplerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineSamplerState const *pCmd)
1339{
1340 int rc;
1341 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1342 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineSamplerState, VERR_INVALID_STATE);
1343 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1344 AssertReturn(p3dState, VERR_INVALID_STATE);
1345
1346 PVMSVGA3DDXCONTEXT pDXContext;
1347 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1348 AssertRCReturn(rc, rc);
1349
1350 SVGA3dSamplerId const samplerId = pCmd->samplerId;
1351
1352 ASSERT_GUEST_RETURN(pDXContext->cot.paSampler, VERR_INVALID_STATE);
1353 ASSERT_GUEST_RETURN(samplerId < pDXContext->cot.cSampler, VERR_INVALID_PARAMETER);
1354 RT_UNTRUSTED_VALIDATED_FENCE();
1355
1356 SVGACOTableDXSamplerEntry *pEntry = &pDXContext->cot.paSampler[samplerId];
1357 pEntry->filter = pCmd->filter;
1358 pEntry->addressU = pCmd->addressU;
1359 pEntry->addressV = pCmd->addressV;
1360 pEntry->addressW = pCmd->addressW;
1361 pEntry->mipLODBias = pCmd->mipLODBias;
1362 pEntry->maxAnisotropy = pCmd->maxAnisotropy;
1363 pEntry->comparisonFunc = pCmd->comparisonFunc;
1364 pEntry->borderColor = pCmd->borderColor;
1365 pEntry->minLOD = pCmd->minLOD;
1366 pEntry->maxLOD = pCmd->maxLOD;
1367
1368 rc = pSvgaR3State->pFuncsDX->pfnDXDefineSamplerState(pThisCC, pDXContext, samplerId, pEntry);
1369 return rc;
1370}
1371
1372
1373int vmsvga3dDXDestroySamplerState(PVGASTATECC pThisCC, uint32_t idDXContext)
1374{
1375 int rc;
1376 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1377 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroySamplerState, VERR_INVALID_STATE);
1378 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1379 AssertReturn(p3dState, VERR_INVALID_STATE);
1380
1381 PVMSVGA3DDXCONTEXT pDXContext;
1382 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1383 AssertRCReturn(rc, rc);
1384
1385 rc = pSvgaR3State->pFuncsDX->pfnDXDestroySamplerState(pThisCC, pDXContext);
1386 return rc;
1387}
1388
1389
1390int vmsvga3dDXDefineShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineShader const *pCmd)
1391{
1392 int rc;
1393 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1394 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineShader, VERR_INVALID_STATE);
1395 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1396 AssertReturn(p3dState, VERR_INVALID_STATE);
1397
1398 PVMSVGA3DDXCONTEXT pDXContext;
1399 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1400 AssertRCReturn(rc, rc);
1401
1402 SVGA3dShaderId const shaderId = pCmd->shaderId;
1403
1404 ASSERT_GUEST_RETURN(pDXContext->cot.paShader, VERR_INVALID_STATE);
1405 ASSERT_GUEST_RETURN(shaderId < pDXContext->cot.cShader, VERR_INVALID_PARAMETER);
1406 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
1407 ASSERT_GUEST_RETURN(pCmd->sizeInBytes >= 8, VERR_INVALID_PARAMETER); /* Version Token + Length Token. */
1408 RT_UNTRUSTED_VALIDATED_FENCE();
1409
1410 SVGACOTableDXShaderEntry *pEntry = &pDXContext->cot.paShader[shaderId];
1411 pEntry->type = pCmd->type;
1412 pEntry->sizeInBytes = pCmd->sizeInBytes;
1413 pEntry->offsetInBytes = 0;
1414 pEntry->mobid = SVGA_ID_INVALID;
1415
1416 if (!pDXContext->paShader)
1417 {
1418 /* Create host array for information abput shaders. */
1419 pDXContext->paShader = (PVMSVGA3DSHADER)RTMemAllocZ(pDXContext->cot.cShader * sizeof(VMSVGA3DSHADER));
1420 AssertReturn(pDXContext->paShader, VERR_NO_MEMORY);
1421 for (uint32_t i = 0; i < pDXContext->cot.cShader; ++i)
1422 pDXContext->paShader[i].id = SVGA_ID_INVALID;
1423 }
1424
1425 PVMSVGA3DSHADER pShader = &pDXContext->paShader[shaderId];
1426 if (pShader->id != SVGA_ID_INVALID)
1427 {
1428 /** @todo Cleanup current shader. */
1429 pSvgaR3State->pFuncsDX->pfnDXDestroyShader(pThisCC, pDXContext);
1430 RTMemFree(pShader->pShaderProgram);
1431 }
1432
1433 pShader->id = shaderId;
1434 pShader->cid = idDXContext;
1435 pShader->type = pEntry->type;
1436 pShader->cbData = pEntry->sizeInBytes;
1437 pShader->pShaderProgram = NULL;
1438 pShader->u.pvBackendShader = NULL;
1439
1440 rc = pSvgaR3State->pFuncsDX->pfnDXDefineShader(pThisCC, pDXContext, pShader);
1441 return rc;
1442}
1443
1444
1445int vmsvga3dDXDestroyShader(PVGASTATECC pThisCC, uint32_t idDXContext)
1446{
1447 int rc;
1448 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1449 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyShader, VERR_INVALID_STATE);
1450 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1451 AssertReturn(p3dState, VERR_INVALID_STATE);
1452
1453 PVMSVGA3DDXCONTEXT pDXContext;
1454 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1455 AssertRCReturn(rc, rc);
1456
1457 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyShader(pThisCC, pDXContext);
1458 return rc;
1459}
1460
1461
1462static int dxBindShader(PVMSVGA3DSHADER pShader, PVMSVGAMOB pMob, SVGACOTableDXShaderEntry const *pEntry, void const *pvShaderBytecode)
1463{
1464 /* How many bytes the MOB can hold. */
1465 uint32_t const cbMob = vmsvgaR3MobSize(pMob) - pEntry->offsetInBytes;
1466 ASSERT_GUEST_RETURN(cbMob >= pEntry->sizeInBytes, VERR_INVALID_PARAMETER);
1467 AssertReturn(pEntry->sizeInBytes >= 8, VERR_INTERNAL_ERROR); /* Host ensures this in DefineShader. */
1468
1469 int rc = DXShaderParse(pvShaderBytecode, pEntry->sizeInBytes, &pShader->shaderInfo);
1470 if (RT_SUCCESS(rc))
1471 {
1472 /* Get the length of the shader bytecode. */
1473 uint32_t const *pau32Token = (uint32_t *)pvShaderBytecode; /* Tokens */
1474 uint32_t const cToken = pau32Token[1]; /* Length of the shader in tokens. */
1475 ASSERT_GUEST_RETURN(cToken <= pEntry->sizeInBytes / 4, VERR_INVALID_PARAMETER);
1476
1477 pShader->cbData = cToken * 4;
1478
1479 /* Check if the MOB contains SVGA3dDXSignatureHeader and signature entries.
1480 * If they are not there (Linux guest driver does not provide them), then it is fine
1481 * and the signatures generated by DXShaderParse will be used.
1482 */
1483 uint32_t const cbSignaturesMax = cbMob - pShader->cbData; /* How many bytes for signatures are available. */
1484 if (cbSignaturesMax > sizeof(SVGA3dDXSignatureHeader))
1485 {
1486 SVGA3dDXSignatureHeader const *pSignatureHeader = (SVGA3dDXSignatureHeader *)((uint8_t *)pvShaderBytecode + pShader->cbData);
1487 if (pSignatureHeader->headerVersion == SVGADX_SIGNATURE_HEADER_VERSION_0)
1488 {
1489 ASSERT_GUEST_RETURN( pSignatureHeader->numInputSignatures <= RT_ELEMENTS(pShader->shaderInfo.aInputSignature)
1490 && pSignatureHeader->numOutputSignatures <= RT_ELEMENTS(pShader->shaderInfo.aOutputSignature)
1491 && pSignatureHeader->numPatchConstantSignatures <= RT_ELEMENTS(pShader->shaderInfo.aPatchConstantSignature),
1492 VERR_INVALID_PARAMETER);
1493
1494 uint32_t const cSignature = pSignatureHeader->numInputSignatures
1495 + pSignatureHeader->numOutputSignatures
1496 + pSignatureHeader->numPatchConstantSignatures;
1497 ASSERT_GUEST_RETURN( cbSignaturesMax - sizeof(SVGA3dDXSignatureHeader)
1498 > cSignature * sizeof(sizeof(SVGA3dDXSignatureEntry)), VERR_INVALID_PARAMETER);
1499
1500 /* Copy to DXShaderInfo. */
1501 uint8_t const *pu8Signatures = (uint8_t *)&pSignatureHeader[1];
1502 pShader->shaderInfo.cInputSignature = pSignatureHeader->numInputSignatures;
1503 memcpy(pShader->shaderInfo.aInputSignature, pu8Signatures, pSignatureHeader->numInputSignatures * sizeof(SVGA3dDXSignatureEntry));
1504
1505 pu8Signatures += pSignatureHeader->numInputSignatures * sizeof(SVGA3dDXSignatureEntry);
1506 pShader->shaderInfo.cOutputSignature = pSignatureHeader->numOutputSignatures;
1507 memcpy(pShader->shaderInfo.aOutputSignature, pu8Signatures, pSignatureHeader->numOutputSignatures * sizeof(SVGA3dDXSignatureEntry));
1508
1509 pu8Signatures += pSignatureHeader->numOutputSignatures * sizeof(SVGA3dDXSignatureEntry);
1510 pShader->shaderInfo.cPatchConstantSignature = pSignatureHeader->numPatchConstantSignatures;
1511 memcpy(pShader->shaderInfo.aPatchConstantSignature, pu8Signatures, pSignatureHeader->numPatchConstantSignatures * sizeof(SVGA3dDXSignatureEntry));
1512 }
1513 }
1514 }
1515
1516 return rc;
1517}
1518
1519
1520int vmsvga3dDXBindShader(PVGASTATECC pThisCC, SVGA3dCmdDXBindShader const *pCmd, PVMSVGAMOB pMob)
1521{
1522 int rc;
1523 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1524 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindShader, VERR_INVALID_STATE);
1525 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1526 AssertReturn(p3dState, VERR_INVALID_STATE);
1527
1528 PVMSVGA3DDXCONTEXT pDXContext;
1529 rc = vmsvga3dDXContextFromCid(p3dState, pCmd->cid, &pDXContext);
1530 AssertRCReturn(rc, rc);
1531
1532 ASSERT_GUEST_RETURN(pCmd->shid < pDXContext->cot.cShader, VERR_INVALID_PARAMETER);
1533 RT_UNTRUSTED_VALIDATED_FENCE();
1534
1535 SVGACOTableDXShaderEntry *pEntry = &pDXContext->cot.paShader[pCmd->shid];
1536 //pEntry->type;
1537 //pEntry->sizeInBytes;
1538 pEntry->offsetInBytes = pCmd->offsetInBytes;
1539 pEntry->mobid = vmsvgaR3MobId(pMob);
1540
1541 if (pMob)
1542 {
1543 /* Bind a mob to the shader. */
1544
1545 /* Create a memory pointer for the MOB, which is accessible by host. */
1546 rc = vmsvgaR3MobBackingStoreCreate(pSvgaR3State, pMob, vmsvgaR3MobSize(pMob));
1547 if (RT_SUCCESS(rc))
1548 {
1549 /* Get pointer to the shader bytecode. This will also verify the offset. */
1550 void const *pvShaderBytecode = vmsvgaR3MobBackingStorePtr(pMob, pEntry->offsetInBytes);
1551 ASSERT_GUEST_RETURN(pvShaderBytecode, VERR_INVALID_PARAMETER);
1552
1553 PVMSVGA3DSHADER pShader = &pDXContext->paShader[pCmd->shid];
1554 Assert( pShader->id == pCmd->shid
1555 && pShader->type == pEntry->type); /* The host ensures this. */
1556
1557 /* Get the shader and optional signatures from the MOB. */
1558 rc = dxBindShader(pShader, pMob, pEntry, pvShaderBytecode);
1559 if (RT_SUCCESS(rc))
1560 rc = pSvgaR3State->pFuncsDX->pfnDXBindShader(pThisCC, pDXContext, pShader, pvShaderBytecode);
1561
1562 if (RT_FAILURE(rc))
1563 {
1564 /** @todo Any cleanup? */
1565 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
1566 }
1567 }
1568 }
1569 else
1570 {
1571 /* Unbind. */
1572 /** @todo Nothing to do here but release the MOB? */
1573 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
1574 }
1575
1576 return rc;
1577}
1578
1579
1580int vmsvga3dDXDefineStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext)
1581{
1582 int rc;
1583 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1584 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutput, VERR_INVALID_STATE);
1585 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1586 AssertReturn(p3dState, VERR_INVALID_STATE);
1587
1588 PVMSVGA3DDXCONTEXT pDXContext;
1589 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1590 AssertRCReturn(rc, rc);
1591
1592 rc = pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutput(pThisCC, pDXContext);
1593 return rc;
1594}
1595
1596
1597int vmsvga3dDXDestroyStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext)
1598{
1599 int rc;
1600 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1601 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyStreamOutput, VERR_INVALID_STATE);
1602 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1603 AssertReturn(p3dState, VERR_INVALID_STATE);
1604
1605 PVMSVGA3DDXCONTEXT pDXContext;
1606 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1607 AssertRCReturn(rc, rc);
1608
1609 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyStreamOutput(pThisCC, pDXContext);
1610 return rc;
1611}
1612
1613
1614int vmsvga3dDXSetStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext)
1615{
1616 int rc;
1617 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1618 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetStreamOutput, VERR_INVALID_STATE);
1619 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1620 AssertReturn(p3dState, VERR_INVALID_STATE);
1621
1622 PVMSVGA3DDXCONTEXT pDXContext;
1623 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1624 AssertRCReturn(rc, rc);
1625
1626 rc = pSvgaR3State->pFuncsDX->pfnDXSetStreamOutput(pThisCC, pDXContext);
1627 return rc;
1628}
1629
1630
1631int vmsvga3dDXSetCOTable(PVGASTATECC pThisCC, SVGA3dCmdDXSetCOTable const *pCmd, PVMSVGAMOB pMob)
1632{
1633 int rc;
1634 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1635 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetCOTable, VERR_INVALID_STATE);
1636 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1637 AssertReturn(p3dState, VERR_INVALID_STATE);
1638
1639 PVMSVGA3DDXCONTEXT pDXContext;
1640 rc = vmsvga3dDXContextFromCid(p3dState, pCmd->cid, &pDXContext);
1641 AssertRCReturn(rc, rc);
1642 RT_UNTRUSTED_VALIDATED_FENCE();
1643
1644 ASSERT_GUEST_RETURN(pCmd->type < RT_ELEMENTS(pDXContext->aCOTMobs), VERR_INVALID_PARAMETER);
1645 RT_UNTRUSTED_VALIDATED_FENCE();
1646
1647 uint32_t validSizeInBytes;
1648 uint32_t cbCOT;
1649 if (pMob)
1650 {
1651 /* Bind a mob to the COTable. */
1652 validSizeInBytes = pCmd->validSizeInBytes;
1653 cbCOT = vmsvgaR3MobSize(pMob);
1654
1655 ASSERT_GUEST_RETURN(validSizeInBytes <= cbCOT, VERR_INVALID_PARAMETER);
1656 RT_UNTRUSTED_VALIDATED_FENCE();
1657
1658 /* Create a memory pointer, which is accessible by host. */
1659 rc = vmsvgaR3MobBackingStoreCreate(pSvgaR3State, pMob, validSizeInBytes);
1660 }
1661 else
1662 {
1663 /* Unbind. */
1664 validSizeInBytes = 0;
1665 cbCOT = 0;
1666 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pDXContext->aCOTMobs[pCmd->type]);
1667 }
1668
1669 uint32_t cEntries = 0;
1670 if (RT_SUCCESS(rc))
1671 {
1672 static uint32_t const s_acbEntry[SVGA_COTABLE_MAX] =
1673 {
1674 sizeof(SVGACOTableDXRTViewEntry),
1675 sizeof(SVGACOTableDXDSViewEntry),
1676 sizeof(SVGACOTableDXSRViewEntry),
1677 sizeof(SVGACOTableDXElementLayoutEntry),
1678 sizeof(SVGACOTableDXBlendStateEntry),
1679 sizeof(SVGACOTableDXDepthStencilEntry),
1680 sizeof(SVGACOTableDXRasterizerStateEntry),
1681 sizeof(SVGACOTableDXSamplerEntry),
1682 sizeof(SVGACOTableDXStreamOutputEntry),
1683 sizeof(SVGACOTableDXQueryEntry),
1684 sizeof(SVGACOTableDXShaderEntry),
1685 sizeof(SVGACOTableDXUAViewEntry),
1686 };
1687
1688 cEntries = cbCOT / s_acbEntry[pCmd->type];
1689 uint32_t const cValidEntries = validSizeInBytes / s_acbEntry[pCmd->type];
1690
1691 rc = pSvgaR3State->pFuncsDX->pfnDXSetCOTable(pThisCC, pDXContext, pCmd->type, cEntries, cValidEntries);
1692 }
1693
1694 if (RT_SUCCESS(rc))
1695 {
1696 pDXContext->aCOTMobs[pCmd->type] = pMob;
1697
1698 void *pvCOT = vmsvgaR3MobBackingStorePtr(pMob, 0);
1699 switch (pCmd->type)
1700 {
1701 case SVGA_COTABLE_RTVIEW:
1702 pDXContext->cot.paRTView = (SVGACOTableDXRTViewEntry *)pvCOT;
1703 pDXContext->cot.cRTView = cEntries;
1704 break;
1705 case SVGA_COTABLE_DSVIEW:
1706 pDXContext->cot.paDSView = (SVGACOTableDXDSViewEntry *)pvCOT;
1707 pDXContext->cot.cDSView = cEntries;
1708 break;
1709 case SVGA_COTABLE_SRVIEW:
1710 pDXContext->cot.paSRView = (SVGACOTableDXSRViewEntry *)pvCOT;
1711 pDXContext->cot.cSRView = cEntries;
1712 break;
1713 case SVGA_COTABLE_ELEMENTLAYOUT:
1714 pDXContext->cot.paElementLayout = (SVGACOTableDXElementLayoutEntry *)pvCOT;
1715 pDXContext->cot.cElementLayout = cEntries;
1716 break;
1717 case SVGA_COTABLE_BLENDSTATE:
1718 pDXContext->cot.paBlendState = (SVGACOTableDXBlendStateEntry *)pvCOT;
1719 pDXContext->cot.cBlendState = cEntries;
1720 break;
1721 case SVGA_COTABLE_DEPTHSTENCIL:
1722 pDXContext->cot.paDepthStencil = (SVGACOTableDXDepthStencilEntry *)pvCOT;
1723 pDXContext->cot.cDepthStencil = cEntries;
1724 break;
1725 case SVGA_COTABLE_RASTERIZERSTATE:
1726 pDXContext->cot.paRasterizerState = (SVGACOTableDXRasterizerStateEntry *)pvCOT;
1727 pDXContext->cot.cRasterizerState = cEntries;
1728 break;
1729 case SVGA_COTABLE_SAMPLER:
1730 pDXContext->cot.paSampler = (SVGACOTableDXSamplerEntry *)pvCOT;
1731 pDXContext->cot.cSampler = cEntries;
1732 break;
1733 case SVGA_COTABLE_STREAMOUTPUT:
1734 pDXContext->cot.paStreamOutput = (SVGACOTableDXStreamOutputEntry *)pvCOT;
1735 pDXContext->cot.cStreamOutput = cEntries;
1736 break;
1737 case SVGA_COTABLE_DXQUERY:
1738 pDXContext->cot.paQuery = (SVGACOTableDXQueryEntry *)pvCOT;
1739 pDXContext->cot.cQuery = cEntries;
1740 break;
1741 case SVGA_COTABLE_DXSHADER:
1742 pDXContext->cot.paShader = (SVGACOTableDXShaderEntry *)pvCOT;
1743 pDXContext->cot.cShader = cEntries;
1744 break;
1745 case SVGA_COTABLE_UAVIEW:
1746 pDXContext->cot.paUAView = (SVGACOTableDXUAViewEntry *)pvCOT;
1747 pDXContext->cot.cUAView = cEntries;
1748 break;
1749 case SVGA_COTABLE_MAX: break; /* Compiler warning */
1750 }
1751 }
1752 else
1753 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
1754
1755 return rc;
1756}
1757
1758
1759int vmsvga3dDXReadbackCOTable(PVGASTATECC pThisCC, SVGA3dCmdDXReadbackCOTable const *pCmd)
1760{
1761 int rc;
1762 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1763 AssertReturn(pSvgaR3State->pFuncsDX, VERR_INVALID_STATE);
1764 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1765 AssertReturn(p3dState, VERR_INVALID_STATE);
1766
1767 PVMSVGA3DDXCONTEXT pDXContext;
1768 rc = vmsvga3dDXContextFromCid(p3dState, pCmd->cid, &pDXContext);
1769 AssertRCReturn(rc, rc);
1770 RT_UNTRUSTED_VALIDATED_FENCE();
1771
1772 ASSERT_GUEST_RETURN(pCmd->type < RT_ELEMENTS(pDXContext->aCOTMobs), VERR_INVALID_PARAMETER);
1773 RT_UNTRUSTED_VALIDATED_FENCE();
1774
1775 PVMSVGAMOB pMob = pDXContext->aCOTMobs[pCmd->type];
1776 rc = vmsvgaR3MobBackingStoreWriteToGuest(pSvgaR3State, pMob);
1777 return rc;
1778}
1779
1780
1781int vmsvga3dDXBufferCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
1782{
1783 int rc;
1784 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1785 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBufferCopy, VERR_INVALID_STATE);
1786 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1787 AssertReturn(p3dState, VERR_INVALID_STATE);
1788
1789 PVMSVGA3DDXCONTEXT pDXContext;
1790 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1791 AssertRCReturn(rc, rc);
1792
1793 rc = pSvgaR3State->pFuncsDX->pfnDXBufferCopy(pThisCC, pDXContext);
1794 return rc;
1795}
1796
1797
1798int vmsvga3dDXTransferFromBuffer(PVGASTATECC pThisCC, uint32_t idDXContext)
1799{
1800 int rc;
1801 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1802 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXTransferFromBuffer, VERR_INVALID_STATE);
1803 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1804 AssertReturn(p3dState, VERR_INVALID_STATE);
1805
1806 PVMSVGA3DDXCONTEXT pDXContext;
1807 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1808 AssertRCReturn(rc, rc);
1809
1810 rc = pSvgaR3State->pFuncsDX->pfnDXTransferFromBuffer(pThisCC, pDXContext);
1811 return rc;
1812}
1813
1814
1815int vmsvga3dDXSurfaceCopyAndReadback(PVGASTATECC pThisCC, uint32_t idDXContext)
1816{
1817 int rc;
1818 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1819 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSurfaceCopyAndReadback, VERR_INVALID_STATE);
1820 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1821 AssertReturn(p3dState, VERR_INVALID_STATE);
1822
1823 PVMSVGA3DDXCONTEXT pDXContext;
1824 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1825 AssertRCReturn(rc, rc);
1826
1827 rc = pSvgaR3State->pFuncsDX->pfnDXSurfaceCopyAndReadback(pThisCC, pDXContext);
1828 return rc;
1829}
1830
1831
1832int vmsvga3dDXMoveQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
1833{
1834 int rc;
1835 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1836 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXMoveQuery, VERR_INVALID_STATE);
1837 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1838 AssertReturn(p3dState, VERR_INVALID_STATE);
1839
1840 PVMSVGA3DDXCONTEXT pDXContext;
1841 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1842 AssertRCReturn(rc, rc);
1843
1844 rc = pSvgaR3State->pFuncsDX->pfnDXMoveQuery(pThisCC, pDXContext);
1845 return rc;
1846}
1847
1848
1849int vmsvga3dDXBindAllQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
1850{
1851 int rc;
1852 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1853 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindAllQuery, VERR_INVALID_STATE);
1854 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1855 AssertReturn(p3dState, VERR_INVALID_STATE);
1856
1857 PVMSVGA3DDXCONTEXT pDXContext;
1858 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1859 AssertRCReturn(rc, rc);
1860
1861 rc = pSvgaR3State->pFuncsDX->pfnDXBindAllQuery(pThisCC, pDXContext);
1862 return rc;
1863}
1864
1865
1866int vmsvga3dDXReadbackAllQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
1867{
1868 int rc;
1869 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1870 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXReadbackAllQuery, VERR_INVALID_STATE);
1871 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1872 AssertReturn(p3dState, VERR_INVALID_STATE);
1873
1874 PVMSVGA3DDXCONTEXT pDXContext;
1875 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1876 AssertRCReturn(rc, rc);
1877
1878 rc = pSvgaR3State->pFuncsDX->pfnDXReadbackAllQuery(pThisCC, pDXContext);
1879 return rc;
1880}
1881
1882
1883int vmsvga3dDXPredTransferFromBuffer(PVGASTATECC pThisCC, uint32_t idDXContext)
1884{
1885 int rc;
1886 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1887 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredTransferFromBuffer, VERR_INVALID_STATE);
1888 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1889 AssertReturn(p3dState, VERR_INVALID_STATE);
1890
1891 PVMSVGA3DDXCONTEXT pDXContext;
1892 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1893 AssertRCReturn(rc, rc);
1894
1895 rc = pSvgaR3State->pFuncsDX->pfnDXPredTransferFromBuffer(pThisCC, pDXContext);
1896 return rc;
1897}
1898
1899
1900int vmsvga3dDXMobFence64(PVGASTATECC pThisCC, uint32_t idDXContext)
1901{
1902 int rc;
1903 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1904 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXMobFence64, VERR_INVALID_STATE);
1905 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1906 AssertReturn(p3dState, VERR_INVALID_STATE);
1907
1908 PVMSVGA3DDXCONTEXT pDXContext;
1909 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1910 AssertRCReturn(rc, rc);
1911
1912 rc = pSvgaR3State->pFuncsDX->pfnDXMobFence64(pThisCC, pDXContext);
1913 return rc;
1914}
1915
1916
1917int vmsvga3dDXBindAllShader(PVGASTATECC pThisCC, uint32_t idDXContext)
1918{
1919 int rc;
1920 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1921 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindAllShader, VERR_INVALID_STATE);
1922 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1923 AssertReturn(p3dState, VERR_INVALID_STATE);
1924
1925 PVMSVGA3DDXCONTEXT pDXContext;
1926 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1927 AssertRCReturn(rc, rc);
1928
1929 rc = pSvgaR3State->pFuncsDX->pfnDXBindAllShader(pThisCC, pDXContext);
1930 return rc;
1931}
1932
1933
1934int vmsvga3dDXHint(PVGASTATECC pThisCC, uint32_t idDXContext)
1935{
1936 int rc;
1937 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1938 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXHint, VERR_INVALID_STATE);
1939 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1940 AssertReturn(p3dState, VERR_INVALID_STATE);
1941
1942 PVMSVGA3DDXCONTEXT pDXContext;
1943 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1944 AssertRCReturn(rc, rc);
1945
1946 rc = pSvgaR3State->pFuncsDX->pfnDXHint(pThisCC, pDXContext);
1947 return rc;
1948}
1949
1950
1951int vmsvga3dDXBufferUpdate(PVGASTATECC pThisCC, uint32_t idDXContext)
1952{
1953 int rc;
1954 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1955 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBufferUpdate, VERR_INVALID_STATE);
1956 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1957 AssertReturn(p3dState, VERR_INVALID_STATE);
1958
1959 PVMSVGA3DDXCONTEXT pDXContext;
1960 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1961 AssertRCReturn(rc, rc);
1962
1963 rc = pSvgaR3State->pFuncsDX->pfnDXBufferUpdate(pThisCC, pDXContext);
1964 return rc;
1965}
1966
1967
1968int vmsvga3dDXSetVSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
1969{
1970 int rc;
1971 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1972 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetVSConstantBufferOffset, VERR_INVALID_STATE);
1973 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1974 AssertReturn(p3dState, VERR_INVALID_STATE);
1975
1976 PVMSVGA3DDXCONTEXT pDXContext;
1977 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1978 AssertRCReturn(rc, rc);
1979
1980 rc = pSvgaR3State->pFuncsDX->pfnDXSetVSConstantBufferOffset(pThisCC, pDXContext);
1981 return rc;
1982}
1983
1984
1985int vmsvga3dDXSetPSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
1986{
1987 int rc;
1988 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1989 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetPSConstantBufferOffset, VERR_INVALID_STATE);
1990 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1991 AssertReturn(p3dState, VERR_INVALID_STATE);
1992
1993 PVMSVGA3DDXCONTEXT pDXContext;
1994 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1995 AssertRCReturn(rc, rc);
1996
1997 rc = pSvgaR3State->pFuncsDX->pfnDXSetPSConstantBufferOffset(pThisCC, pDXContext);
1998 return rc;
1999}
2000
2001
2002int vmsvga3dDXSetGSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2003{
2004 int rc;
2005 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2006 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetGSConstantBufferOffset, VERR_INVALID_STATE);
2007 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2008 AssertReturn(p3dState, VERR_INVALID_STATE);
2009
2010 PVMSVGA3DDXCONTEXT pDXContext;
2011 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2012 AssertRCReturn(rc, rc);
2013
2014 rc = pSvgaR3State->pFuncsDX->pfnDXSetGSConstantBufferOffset(pThisCC, pDXContext);
2015 return rc;
2016}
2017
2018
2019int vmsvga3dDXSetHSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2020{
2021 int rc;
2022 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2023 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetHSConstantBufferOffset, VERR_INVALID_STATE);
2024 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2025 AssertReturn(p3dState, VERR_INVALID_STATE);
2026
2027 PVMSVGA3DDXCONTEXT pDXContext;
2028 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2029 AssertRCReturn(rc, rc);
2030
2031 rc = pSvgaR3State->pFuncsDX->pfnDXSetHSConstantBufferOffset(pThisCC, pDXContext);
2032 return rc;
2033}
2034
2035
2036int vmsvga3dDXSetDSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2037{
2038 int rc;
2039 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2040 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetDSConstantBufferOffset, VERR_INVALID_STATE);
2041 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2042 AssertReturn(p3dState, VERR_INVALID_STATE);
2043
2044 PVMSVGA3DDXCONTEXT pDXContext;
2045 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2046 AssertRCReturn(rc, rc);
2047
2048 rc = pSvgaR3State->pFuncsDX->pfnDXSetDSConstantBufferOffset(pThisCC, pDXContext);
2049 return rc;
2050}
2051
2052
2053int vmsvga3dDXSetCSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2054{
2055 int rc;
2056 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2057 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetCSConstantBufferOffset, VERR_INVALID_STATE);
2058 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2059 AssertReturn(p3dState, VERR_INVALID_STATE);
2060
2061 PVMSVGA3DDXCONTEXT pDXContext;
2062 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2063 AssertRCReturn(rc, rc);
2064
2065 rc = pSvgaR3State->pFuncsDX->pfnDXSetCSConstantBufferOffset(pThisCC, pDXContext);
2066 return rc;
2067}
2068
2069
2070int vmsvga3dDXCondBindAllShader(PVGASTATECC pThisCC, uint32_t idDXContext)
2071{
2072 int rc;
2073 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2074 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXCondBindAllShader, VERR_INVALID_STATE);
2075 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2076 AssertReturn(p3dState, VERR_INVALID_STATE);
2077
2078 PVMSVGA3DDXCONTEXT pDXContext;
2079 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2080 AssertRCReturn(rc, rc);
2081
2082 rc = pSvgaR3State->pFuncsDX->pfnDXCondBindAllShader(pThisCC, pDXContext);
2083 return rc;
2084}
2085
2086
2087int vmsvga3dScreenCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2088{
2089 int rc;
2090 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2091 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnScreenCopy, VERR_INVALID_STATE);
2092 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2093 AssertReturn(p3dState, VERR_INVALID_STATE);
2094
2095 PVMSVGA3DDXCONTEXT pDXContext;
2096 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2097 AssertRCReturn(rc, rc);
2098
2099 rc = pSvgaR3State->pFuncsDX->pfnScreenCopy(pThisCC, pDXContext);
2100 return rc;
2101}
2102
2103
2104int vmsvga3dGrowOTable(PVGASTATECC pThisCC, uint32_t idDXContext)
2105{
2106 int rc;
2107 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2108 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnGrowOTable, VERR_INVALID_STATE);
2109 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2110 AssertReturn(p3dState, VERR_INVALID_STATE);
2111
2112 PVMSVGA3DDXCONTEXT pDXContext;
2113 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2114 AssertRCReturn(rc, rc);
2115
2116 rc = pSvgaR3State->pFuncsDX->pfnGrowOTable(pThisCC, pDXContext);
2117 return rc;
2118}
2119
2120
2121int vmsvga3dDXGrowCOTable(PVGASTATECC pThisCC, uint32_t idDXContext)
2122{
2123 int rc;
2124 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2125 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXGrowCOTable, VERR_INVALID_STATE);
2126 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2127 AssertReturn(p3dState, VERR_INVALID_STATE);
2128
2129 PVMSVGA3DDXCONTEXT pDXContext;
2130 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2131 AssertRCReturn(rc, rc);
2132
2133 rc = pSvgaR3State->pFuncsDX->pfnDXGrowCOTable(pThisCC, pDXContext);
2134 return rc;
2135}
2136
2137
2138int vmsvga3dIntraSurfaceCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2139{
2140 int rc;
2141 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2142 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnIntraSurfaceCopy, VERR_INVALID_STATE);
2143 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2144 AssertReturn(p3dState, VERR_INVALID_STATE);
2145
2146 PVMSVGA3DDXCONTEXT pDXContext;
2147 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2148 AssertRCReturn(rc, rc);
2149
2150 rc = pSvgaR3State->pFuncsDX->pfnIntraSurfaceCopy(pThisCC, pDXContext);
2151 return rc;
2152}
2153
2154
2155int vmsvga3dDefineGBSurface_v3(PVGASTATECC pThisCC, uint32_t idDXContext)
2156{
2157 int rc;
2158 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2159 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v3, VERR_INVALID_STATE);
2160 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2161 AssertReturn(p3dState, VERR_INVALID_STATE);
2162
2163 PVMSVGA3DDXCONTEXT pDXContext;
2164 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2165 AssertRCReturn(rc, rc);
2166
2167 rc = pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v3(pThisCC, pDXContext);
2168 return rc;
2169}
2170
2171
2172int vmsvga3dDXResolveCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2173{
2174 int rc;
2175 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2176 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXResolveCopy, VERR_INVALID_STATE);
2177 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2178 AssertReturn(p3dState, VERR_INVALID_STATE);
2179
2180 PVMSVGA3DDXCONTEXT pDXContext;
2181 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2182 AssertRCReturn(rc, rc);
2183
2184 rc = pSvgaR3State->pFuncsDX->pfnDXResolveCopy(pThisCC, pDXContext);
2185 return rc;
2186}
2187
2188
2189int vmsvga3dDXPredResolveCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2190{
2191 int rc;
2192 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2193 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredResolveCopy, VERR_INVALID_STATE);
2194 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2195 AssertReturn(p3dState, VERR_INVALID_STATE);
2196
2197 PVMSVGA3DDXCONTEXT pDXContext;
2198 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2199 AssertRCReturn(rc, rc);
2200
2201 rc = pSvgaR3State->pFuncsDX->pfnDXPredResolveCopy(pThisCC, pDXContext);
2202 return rc;
2203}
2204
2205
2206int vmsvga3dDXPredConvertRegion(PVGASTATECC pThisCC, uint32_t idDXContext)
2207{
2208 int rc;
2209 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2210 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredConvertRegion, VERR_INVALID_STATE);
2211 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2212 AssertReturn(p3dState, VERR_INVALID_STATE);
2213
2214 PVMSVGA3DDXCONTEXT pDXContext;
2215 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2216 AssertRCReturn(rc, rc);
2217
2218 rc = pSvgaR3State->pFuncsDX->pfnDXPredConvertRegion(pThisCC, pDXContext);
2219 return rc;
2220}
2221
2222
2223int vmsvga3dDXPredConvert(PVGASTATECC pThisCC, uint32_t idDXContext)
2224{
2225 int rc;
2226 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2227 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredConvert, VERR_INVALID_STATE);
2228 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2229 AssertReturn(p3dState, VERR_INVALID_STATE);
2230
2231 PVMSVGA3DDXCONTEXT pDXContext;
2232 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2233 AssertRCReturn(rc, rc);
2234
2235 rc = pSvgaR3State->pFuncsDX->pfnDXPredConvert(pThisCC, pDXContext);
2236 return rc;
2237}
2238
2239
2240int vmsvga3dWholeSurfaceCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2241{
2242 int rc;
2243 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2244 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnWholeSurfaceCopy, VERR_INVALID_STATE);
2245 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2246 AssertReturn(p3dState, VERR_INVALID_STATE);
2247
2248 PVMSVGA3DDXCONTEXT pDXContext;
2249 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2250 AssertRCReturn(rc, rc);
2251
2252 rc = pSvgaR3State->pFuncsDX->pfnWholeSurfaceCopy(pThisCC, pDXContext);
2253 return rc;
2254}
2255
2256
2257int vmsvga3dDXDefineUAView(PVGASTATECC pThisCC, uint32_t idDXContext)
2258{
2259 int rc;
2260 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2261 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineUAView, VERR_INVALID_STATE);
2262 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2263 AssertReturn(p3dState, VERR_INVALID_STATE);
2264
2265 PVMSVGA3DDXCONTEXT pDXContext;
2266 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2267 AssertRCReturn(rc, rc);
2268
2269 rc = pSvgaR3State->pFuncsDX->pfnDXDefineUAView(pThisCC, pDXContext);
2270 return rc;
2271}
2272
2273
2274int vmsvga3dDXDestroyUAView(PVGASTATECC pThisCC, uint32_t idDXContext)
2275{
2276 int rc;
2277 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2278 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyUAView, VERR_INVALID_STATE);
2279 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2280 AssertReturn(p3dState, VERR_INVALID_STATE);
2281
2282 PVMSVGA3DDXCONTEXT pDXContext;
2283 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2284 AssertRCReturn(rc, rc);
2285
2286 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyUAView(pThisCC, pDXContext);
2287 return rc;
2288}
2289
2290
2291int vmsvga3dDXClearUAViewUint(PVGASTATECC pThisCC, uint32_t idDXContext)
2292{
2293 int rc;
2294 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2295 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearUAViewUint, VERR_INVALID_STATE);
2296 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2297 AssertReturn(p3dState, VERR_INVALID_STATE);
2298
2299 PVMSVGA3DDXCONTEXT pDXContext;
2300 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2301 AssertRCReturn(rc, rc);
2302
2303 rc = pSvgaR3State->pFuncsDX->pfnDXClearUAViewUint(pThisCC, pDXContext);
2304 return rc;
2305}
2306
2307
2308int vmsvga3dDXClearUAViewFloat(PVGASTATECC pThisCC, uint32_t idDXContext)
2309{
2310 int rc;
2311 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2312 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearUAViewFloat, VERR_INVALID_STATE);
2313 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2314 AssertReturn(p3dState, VERR_INVALID_STATE);
2315
2316 PVMSVGA3DDXCONTEXT pDXContext;
2317 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2318 AssertRCReturn(rc, rc);
2319
2320 rc = pSvgaR3State->pFuncsDX->pfnDXClearUAViewFloat(pThisCC, pDXContext);
2321 return rc;
2322}
2323
2324
2325int vmsvga3dDXCopyStructureCount(PVGASTATECC pThisCC, uint32_t idDXContext)
2326{
2327 int rc;
2328 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2329 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXCopyStructureCount, VERR_INVALID_STATE);
2330 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2331 AssertReturn(p3dState, VERR_INVALID_STATE);
2332
2333 PVMSVGA3DDXCONTEXT pDXContext;
2334 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2335 AssertRCReturn(rc, rc);
2336
2337 rc = pSvgaR3State->pFuncsDX->pfnDXCopyStructureCount(pThisCC, pDXContext);
2338 return rc;
2339}
2340
2341
2342int vmsvga3dDXSetUAViews(PVGASTATECC pThisCC, uint32_t idDXContext)
2343{
2344 int rc;
2345 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2346 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetUAViews, VERR_INVALID_STATE);
2347 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2348 AssertReturn(p3dState, VERR_INVALID_STATE);
2349
2350 PVMSVGA3DDXCONTEXT pDXContext;
2351 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2352 AssertRCReturn(rc, rc);
2353
2354 rc = pSvgaR3State->pFuncsDX->pfnDXSetUAViews(pThisCC, pDXContext);
2355 return rc;
2356}
2357
2358
2359int vmsvga3dDXDrawIndexedInstancedIndirect(PVGASTATECC pThisCC, uint32_t idDXContext)
2360{
2361 int rc;
2362 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2363 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstancedIndirect, VERR_INVALID_STATE);
2364 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2365 AssertReturn(p3dState, VERR_INVALID_STATE);
2366
2367 PVMSVGA3DDXCONTEXT pDXContext;
2368 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2369 AssertRCReturn(rc, rc);
2370
2371 rc = pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstancedIndirect(pThisCC, pDXContext);
2372 return rc;
2373}
2374
2375
2376int vmsvga3dDXDrawInstancedIndirect(PVGASTATECC pThisCC, uint32_t idDXContext)
2377{
2378 int rc;
2379 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2380 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawInstancedIndirect, VERR_INVALID_STATE);
2381 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2382 AssertReturn(p3dState, VERR_INVALID_STATE);
2383
2384 PVMSVGA3DDXCONTEXT pDXContext;
2385 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2386 AssertRCReturn(rc, rc);
2387
2388 rc = pSvgaR3State->pFuncsDX->pfnDXDrawInstancedIndirect(pThisCC, pDXContext);
2389 return rc;
2390}
2391
2392
2393int vmsvga3dDXDispatch(PVGASTATECC pThisCC, uint32_t idDXContext)
2394{
2395 int rc;
2396 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2397 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDispatch, VERR_INVALID_STATE);
2398 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2399 AssertReturn(p3dState, VERR_INVALID_STATE);
2400
2401 PVMSVGA3DDXCONTEXT pDXContext;
2402 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2403 AssertRCReturn(rc, rc);
2404
2405 rc = pSvgaR3State->pFuncsDX->pfnDXDispatch(pThisCC, pDXContext);
2406 return rc;
2407}
2408
2409
2410int vmsvga3dDXDispatchIndirect(PVGASTATECC pThisCC, uint32_t idDXContext)
2411{
2412 int rc;
2413 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2414 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDispatchIndirect, VERR_INVALID_STATE);
2415 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2416 AssertReturn(p3dState, VERR_INVALID_STATE);
2417
2418 PVMSVGA3DDXCONTEXT pDXContext;
2419 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2420 AssertRCReturn(rc, rc);
2421
2422 rc = pSvgaR3State->pFuncsDX->pfnDXDispatchIndirect(pThisCC, pDXContext);
2423 return rc;
2424}
2425
2426
2427int vmsvga3dWriteZeroSurface(PVGASTATECC pThisCC, uint32_t idDXContext)
2428{
2429 int rc;
2430 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2431 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnWriteZeroSurface, VERR_INVALID_STATE);
2432 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2433 AssertReturn(p3dState, VERR_INVALID_STATE);
2434
2435 PVMSVGA3DDXCONTEXT pDXContext;
2436 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2437 AssertRCReturn(rc, rc);
2438
2439 rc = pSvgaR3State->pFuncsDX->pfnWriteZeroSurface(pThisCC, pDXContext);
2440 return rc;
2441}
2442
2443
2444int vmsvga3dHintZeroSurface(PVGASTATECC pThisCC, uint32_t idDXContext)
2445{
2446 int rc;
2447 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2448 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnHintZeroSurface, VERR_INVALID_STATE);
2449 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2450 AssertReturn(p3dState, VERR_INVALID_STATE);
2451
2452 PVMSVGA3DDXCONTEXT pDXContext;
2453 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2454 AssertRCReturn(rc, rc);
2455
2456 rc = pSvgaR3State->pFuncsDX->pfnHintZeroSurface(pThisCC, pDXContext);
2457 return rc;
2458}
2459
2460
2461int vmsvga3dDXTransferToBuffer(PVGASTATECC pThisCC, uint32_t idDXContext)
2462{
2463 int rc;
2464 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2465 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXTransferToBuffer, VERR_INVALID_STATE);
2466 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2467 AssertReturn(p3dState, VERR_INVALID_STATE);
2468
2469 PVMSVGA3DDXCONTEXT pDXContext;
2470 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2471 AssertRCReturn(rc, rc);
2472
2473 rc = pSvgaR3State->pFuncsDX->pfnDXTransferToBuffer(pThisCC, pDXContext);
2474 return rc;
2475}
2476
2477
2478int vmsvga3dDXSetStructureCount(PVGASTATECC pThisCC, uint32_t idDXContext)
2479{
2480 int rc;
2481 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2482 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetStructureCount, VERR_INVALID_STATE);
2483 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2484 AssertReturn(p3dState, VERR_INVALID_STATE);
2485
2486 PVMSVGA3DDXCONTEXT pDXContext;
2487 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2488 AssertRCReturn(rc, rc);
2489
2490 rc = pSvgaR3State->pFuncsDX->pfnDXSetStructureCount(pThisCC, pDXContext);
2491 return rc;
2492}
2493
2494
2495int vmsvga3dLogicOpsBitBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
2496{
2497 int rc;
2498 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2499 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsBitBlt, VERR_INVALID_STATE);
2500 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2501 AssertReturn(p3dState, VERR_INVALID_STATE);
2502
2503 PVMSVGA3DDXCONTEXT pDXContext;
2504 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2505 AssertRCReturn(rc, rc);
2506
2507 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsBitBlt(pThisCC, pDXContext);
2508 return rc;
2509}
2510
2511
2512int vmsvga3dLogicOpsTransBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
2513{
2514 int rc;
2515 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2516 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsTransBlt, VERR_INVALID_STATE);
2517 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2518 AssertReturn(p3dState, VERR_INVALID_STATE);
2519
2520 PVMSVGA3DDXCONTEXT pDXContext;
2521 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2522 AssertRCReturn(rc, rc);
2523
2524 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsTransBlt(pThisCC, pDXContext);
2525 return rc;
2526}
2527
2528
2529int vmsvga3dLogicOpsStretchBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
2530{
2531 int rc;
2532 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2533 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsStretchBlt, VERR_INVALID_STATE);
2534 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2535 AssertReturn(p3dState, VERR_INVALID_STATE);
2536
2537 PVMSVGA3DDXCONTEXT pDXContext;
2538 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2539 AssertRCReturn(rc, rc);
2540
2541 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsStretchBlt(pThisCC, pDXContext);
2542 return rc;
2543}
2544
2545
2546int vmsvga3dLogicOpsColorFill(PVGASTATECC pThisCC, uint32_t idDXContext)
2547{
2548 int rc;
2549 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2550 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsColorFill, VERR_INVALID_STATE);
2551 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2552 AssertReturn(p3dState, VERR_INVALID_STATE);
2553
2554 PVMSVGA3DDXCONTEXT pDXContext;
2555 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2556 AssertRCReturn(rc, rc);
2557
2558 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsColorFill(pThisCC, pDXContext);
2559 return rc;
2560}
2561
2562
2563int vmsvga3dLogicOpsAlphaBlend(PVGASTATECC pThisCC, uint32_t idDXContext)
2564{
2565 int rc;
2566 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2567 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsAlphaBlend, VERR_INVALID_STATE);
2568 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2569 AssertReturn(p3dState, VERR_INVALID_STATE);
2570
2571 PVMSVGA3DDXCONTEXT pDXContext;
2572 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2573 AssertRCReturn(rc, rc);
2574
2575 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsAlphaBlend(pThisCC, pDXContext);
2576 return rc;
2577}
2578
2579
2580int vmsvga3dLogicOpsClearTypeBlend(PVGASTATECC pThisCC, uint32_t idDXContext)
2581{
2582 int rc;
2583 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2584 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsClearTypeBlend, VERR_INVALID_STATE);
2585 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2586 AssertReturn(p3dState, VERR_INVALID_STATE);
2587
2588 PVMSVGA3DDXCONTEXT pDXContext;
2589 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2590 AssertRCReturn(rc, rc);
2591
2592 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsClearTypeBlend(pThisCC, pDXContext);
2593 return rc;
2594}
2595
2596
2597int vmsvga3dDefineGBSurface_v4(PVGASTATECC pThisCC, uint32_t idDXContext)
2598{
2599 int rc;
2600 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2601 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v4, VERR_INVALID_STATE);
2602 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2603 AssertReturn(p3dState, VERR_INVALID_STATE);
2604
2605 PVMSVGA3DDXCONTEXT pDXContext;
2606 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2607 AssertRCReturn(rc, rc);
2608
2609 rc = pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v4(pThisCC, pDXContext);
2610 return rc;
2611}
2612
2613
2614int vmsvga3dDXSetCSUAViews(PVGASTATECC pThisCC, uint32_t idDXContext)
2615{
2616 int rc;
2617 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2618 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetCSUAViews, VERR_INVALID_STATE);
2619 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2620 AssertReturn(p3dState, VERR_INVALID_STATE);
2621
2622 PVMSVGA3DDXCONTEXT pDXContext;
2623 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2624 AssertRCReturn(rc, rc);
2625
2626 rc = pSvgaR3State->pFuncsDX->pfnDXSetCSUAViews(pThisCC, pDXContext);
2627 return rc;
2628}
2629
2630
2631int vmsvga3dDXSetMinLOD(PVGASTATECC pThisCC, uint32_t idDXContext)
2632{
2633 int rc;
2634 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2635 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetMinLOD, VERR_INVALID_STATE);
2636 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2637 AssertReturn(p3dState, VERR_INVALID_STATE);
2638
2639 PVMSVGA3DDXCONTEXT pDXContext;
2640 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2641 AssertRCReturn(rc, rc);
2642
2643 rc = pSvgaR3State->pFuncsDX->pfnDXSetMinLOD(pThisCC, pDXContext);
2644 return rc;
2645}
2646
2647
2648int vmsvga3dDXDefineStreamOutputWithMob(PVGASTATECC pThisCC, uint32_t idDXContext)
2649{
2650 int rc;
2651 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2652 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutputWithMob, VERR_INVALID_STATE);
2653 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2654 AssertReturn(p3dState, VERR_INVALID_STATE);
2655
2656 PVMSVGA3DDXCONTEXT pDXContext;
2657 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2658 AssertRCReturn(rc, rc);
2659
2660 rc = pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutputWithMob(pThisCC, pDXContext);
2661 return rc;
2662}
2663
2664
2665int vmsvga3dDXSetShaderIface(PVGASTATECC pThisCC, uint32_t idDXContext)
2666{
2667 int rc;
2668 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2669 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetShaderIface, VERR_INVALID_STATE);
2670 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2671 AssertReturn(p3dState, VERR_INVALID_STATE);
2672
2673 PVMSVGA3DDXCONTEXT pDXContext;
2674 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2675 AssertRCReturn(rc, rc);
2676
2677 rc = pSvgaR3State->pFuncsDX->pfnDXSetShaderIface(pThisCC, pDXContext);
2678 return rc;
2679}
2680
2681
2682int vmsvga3dDXBindStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext)
2683{
2684 int rc;
2685 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2686 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindStreamOutput, VERR_INVALID_STATE);
2687 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2688 AssertReturn(p3dState, VERR_INVALID_STATE);
2689
2690 PVMSVGA3DDXCONTEXT pDXContext;
2691 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2692 AssertRCReturn(rc, rc);
2693
2694 rc = pSvgaR3State->pFuncsDX->pfnDXBindStreamOutput(pThisCC, pDXContext);
2695 return rc;
2696}
2697
2698
2699int vmsvga3dSurfaceStretchBltNonMSToMS(PVGASTATECC pThisCC, uint32_t idDXContext)
2700{
2701 int rc;
2702 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2703 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnSurfaceStretchBltNonMSToMS, VERR_INVALID_STATE);
2704 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2705 AssertReturn(p3dState, VERR_INVALID_STATE);
2706
2707 PVMSVGA3DDXCONTEXT pDXContext;
2708 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2709 AssertRCReturn(rc, rc);
2710
2711 rc = pSvgaR3State->pFuncsDX->pfnSurfaceStretchBltNonMSToMS(pThisCC, pDXContext);
2712 return rc;
2713}
2714
2715
2716int vmsvga3dDXBindShaderIface(PVGASTATECC pThisCC, uint32_t idDXContext)
2717{
2718 int rc;
2719 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2720 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindShaderIface, VERR_INVALID_STATE);
2721 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2722 AssertReturn(p3dState, VERR_INVALID_STATE);
2723
2724 PVMSVGA3DDXCONTEXT pDXContext;
2725 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2726 AssertRCReturn(rc, rc);
2727
2728 rc = pSvgaR3State->pFuncsDX->pfnDXBindShaderIface(pThisCC, pDXContext);
2729 return rc;
2730}
2731
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