VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-dx.cpp@ 91607

Last change on this file since 91607 was 91607, checked in by vboxsync, 3 years ago

Devices/Graphics: parser should be able to apply modifications; logging: bugref:9830
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1/* $Id: DevVGA-SVGA3d-dx.cpp 91607 2021-10-07 07:31:24Z vboxsync $ */
2/** @file
3 * DevSVGA3d - VMWare SVGA device, 3D parts - Common code for DX backend interface.
4 */
5
6/*
7 * Copyright (C) 2020-2021 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
23#include <VBox/AssertGuest.h>
24#include <iprt/errcore.h>
25#include <VBox/log.h>
26#include <VBox/vmm/pdmdev.h>
27
28#include <iprt/assert.h>
29#include <iprt/mem.h>
30
31#include <VBoxVideo.h> /* required by DevVGA.h */
32
33/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
34#include "DevVGA.h"
35
36#include "DevVGA-SVGA.h"
37#include "DevVGA-SVGA3d.h"
38#include "DevVGA-SVGA3d-internal.h"
39#include "DevVGA-SVGA-internal.h"
40
41
42int vmsvga3dDXUnbindContext(PVGASTATECC pThisCC, uint32_t cid, SVGADXContextMobFormat *pSvgaDXContext)
43{
44 int rc;
45 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
46 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindContext, VERR_INVALID_STATE);
47 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
48 AssertReturn(p3dState, VERR_INVALID_STATE);
49
50 PVMSVGA3DDXCONTEXT pDXContext;
51 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
52 AssertRCReturn(rc, rc);
53
54 /* Copy the host structure back to the guest memory. */
55 memcpy(pSvgaDXContext, &pDXContext->svgaDXContext, sizeof(*pSvgaDXContext));
56
57 return rc;
58}
59
60
61/**
62 * Create a new 3D DX context.
63 *
64 * @returns VBox status code.
65 * @param pThisCC The VGA/VMSVGA state for ring-3.
66 * @param cid Context id to be created.
67 */
68int vmsvga3dDXDefineContext(PVGASTATECC pThisCC, uint32_t cid)
69{
70 int rc;
71 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
72 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineContext, VERR_INVALID_STATE);
73 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
74 AssertReturn(p3dState, VERR_INVALID_STATE);
75
76 PVMSVGA3DDXCONTEXT pDXContext;
77
78 LogFunc(("cid %d\n", cid));
79
80 AssertReturn(cid < SVGA3D_MAX_CONTEXT_IDS, VERR_INVALID_PARAMETER);
81
82 if (cid >= p3dState->cDXContexts)
83 {
84 /* Grow the array. */
85 uint32_t cNew = RT_ALIGN(cid + 15, 16);
86 void *pvNew = RTMemRealloc(p3dState->papDXContexts, sizeof(p3dState->papDXContexts[0]) * cNew);
87 AssertReturn(pvNew, VERR_NO_MEMORY);
88 p3dState->papDXContexts = (PVMSVGA3DDXCONTEXT *)pvNew;
89 while (p3dState->cDXContexts < cNew)
90 {
91 pDXContext = (PVMSVGA3DDXCONTEXT)RTMemAllocZ(sizeof(*pDXContext));
92 AssertReturn(pDXContext, VERR_NO_MEMORY);
93 pDXContext->cid = SVGA3D_INVALID_ID;
94 p3dState->papDXContexts[p3dState->cDXContexts++] = pDXContext;
95 }
96 }
97 /* If one already exists with this id, then destroy it now. */
98 if (p3dState->papDXContexts[cid]->cid != SVGA3D_INVALID_ID)
99 vmsvga3dDXDestroyContext(pThisCC, cid);
100
101 pDXContext = p3dState->papDXContexts[cid];
102 memset(pDXContext, 0, sizeof(*pDXContext));
103 /* 0xFFFFFFFF (SVGA_ID_INVALID) is a better initial value than 0 for most of svgaDXContext fields. */
104 memset(&pDXContext->svgaDXContext, 0xFF, sizeof(pDXContext->svgaDXContext));
105 pDXContext->cid = cid;
106
107 /* Init the backend specific data. */
108 rc = pSvgaR3State->pFuncsDX->pfnDXDefineContext(pThisCC, pDXContext);
109
110 /* Cleanup on failure. */
111 if (RT_FAILURE(rc))
112 vmsvga3dDXDestroyContext(pThisCC, cid);
113
114 return rc;
115}
116
117
118int vmsvga3dDXDestroyContext(PVGASTATECC pThisCC, uint32_t cid)
119{
120 int rc;
121 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
122 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyContext, VERR_INVALID_STATE);
123 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
124 AssertReturn(p3dState, VERR_INVALID_STATE);
125
126 PVMSVGA3DDXCONTEXT pDXContext;
127 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
128 AssertRCReturn(rc, rc);
129
130 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyContext(pThisCC, pDXContext);
131 return rc;
132}
133
134
135int vmsvga3dDXBindContext(PVGASTATECC pThisCC, uint32_t cid, SVGADXContextMobFormat *pSvgaDXContext)
136{
137 int rc;
138 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
139 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindContext, VERR_INVALID_STATE);
140 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
141 AssertReturn(p3dState, VERR_INVALID_STATE);
142
143 PVMSVGA3DDXCONTEXT pDXContext;
144 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
145 AssertRCReturn(rc, rc);
146
147 if (pSvgaDXContext)
148 memcpy(&pDXContext->svgaDXContext, pSvgaDXContext, sizeof(*pSvgaDXContext));
149
150 rc = pSvgaR3State->pFuncsDX->pfnDXBindContext(pThisCC, pDXContext);
151 return rc;
152}
153
154
155int vmsvga3dDXReadbackContext(PVGASTATECC pThisCC, uint32_t idDXContext, SVGADXContextMobFormat *pSvgaDXContext)
156{
157 int rc;
158 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
159 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXReadbackContext, VERR_INVALID_STATE);
160 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
161 AssertReturn(p3dState, VERR_INVALID_STATE);
162
163 PVMSVGA3DDXCONTEXT pDXContext;
164 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
165 AssertRCReturn(rc, rc);
166
167 rc = pSvgaR3State->pFuncsDX->pfnDXReadbackContext(pThisCC, pDXContext);
168 if (RT_SUCCESS(rc))
169 memcpy(pSvgaDXContext, &pDXContext->svgaDXContext, sizeof(*pSvgaDXContext));
170 return rc;
171}
172
173
174int vmsvga3dDXInvalidateContext(PVGASTATECC pThisCC, uint32_t idDXContext)
175{
176 int rc;
177 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
178 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXInvalidateContext, VERR_INVALID_STATE);
179 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
180 AssertReturn(p3dState, VERR_INVALID_STATE);
181
182 PVMSVGA3DDXCONTEXT pDXContext;
183 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
184 AssertRCReturn(rc, rc);
185
186 rc = pSvgaR3State->pFuncsDX->pfnDXInvalidateContext(pThisCC, pDXContext);
187 return rc;
188}
189
190
191int vmsvga3dDXSetSingleConstantBuffer(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetSingleConstantBuffer const *pCmd)
192{
193 int rc;
194 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
195 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetSingleConstantBuffer, VERR_INVALID_STATE);
196 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
197 AssertReturn(p3dState, VERR_INVALID_STATE);
198
199 PVMSVGA3DDXCONTEXT pDXContext;
200 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
201 AssertRCReturn(rc, rc);
202
203 ASSERT_GUEST_RETURN(pCmd->slot < SVGA3D_DX_MAX_CONSTBUFFERS, VERR_INVALID_PARAMETER);
204 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
205 RT_UNTRUSTED_VALIDATED_FENCE();
206
207 rc = pSvgaR3State->pFuncsDX->pfnDXSetSingleConstantBuffer(pThisCC, pDXContext, pCmd->slot, pCmd->type, pCmd->sid, pCmd->offsetInBytes, pCmd->sizeInBytes);
208 if (RT_SUCCESS(rc))
209 {
210 uint32_t const idxShaderState = pCmd->type - SVGA3D_SHADERTYPE_MIN;
211 SVGA3dConstantBufferBinding *pCBB = &pDXContext->svgaDXContext.shaderState[idxShaderState].constantBuffers[pCmd->slot];
212 pCBB->sid = pCmd->sid;
213 pCBB->offsetInBytes = pCmd->offsetInBytes;
214 pCBB->sizeInBytes = pCmd->sizeInBytes;
215 }
216 return rc;
217}
218
219
220int vmsvga3dDXSetShaderResources(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetShaderResources const *pCmd, uint32_t cShaderResourceViewId, SVGA3dShaderResourceViewId const *paShaderResourceViewId)
221{
222 int rc;
223 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
224 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetShaderResources, VERR_INVALID_STATE);
225 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
226 AssertReturn(p3dState, VERR_INVALID_STATE);
227
228 PVMSVGA3DDXCONTEXT pDXContext;
229 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
230 AssertRCReturn(rc, rc);
231
232 ASSERT_GUEST_RETURN(pCmd->startView < SVGA3D_DX_MAX_SRVIEWS, VERR_INVALID_PARAMETER);
233 ASSERT_GUEST_RETURN(cShaderResourceViewId <= SVGA3D_DX_MAX_SRVIEWS - pCmd->startView, VERR_INVALID_PARAMETER);
234 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
235 ASSERT_GUEST_RETURN(pDXContext->cot.paSRView, VERR_INVALID_STATE);
236 for (uint32_t i = 0; i < cShaderResourceViewId; ++i)
237 ASSERT_GUEST_RETURN( paShaderResourceViewId[i] < pDXContext->cot.cSRView
238 || paShaderResourceViewId[i] == SVGA3D_INVALID_ID, VERR_INVALID_PARAMETER);
239 RT_UNTRUSTED_VALIDATED_FENCE();
240
241 rc = pSvgaR3State->pFuncsDX->pfnDXSetShaderResources(pThisCC, pDXContext, pCmd->startView, pCmd->type, cShaderResourceViewId, paShaderResourceViewId);
242 return rc;
243}
244
245
246int vmsvga3dDXSetShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetShader const *pCmd)
247{
248 int rc;
249 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
250 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetShader, VERR_INVALID_STATE);
251 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
252 AssertReturn(p3dState, VERR_INVALID_STATE);
253
254 PVMSVGA3DDXCONTEXT pDXContext;
255 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
256 AssertRCReturn(rc, rc);
257
258 ASSERT_GUEST_RETURN( pCmd->shaderId < pDXContext->cot.cShader
259 || pCmd->shaderId == SVGA_ID_INVALID, VERR_INVALID_PARAMETER);
260 RT_UNTRUSTED_VALIDATED_FENCE();
261
262 PVMSVGA3DSHADER pShader;
263 if (pCmd->shaderId != SVGA_ID_INVALID)
264 {
265 SVGACOTableDXShaderEntry *pEntry = &pDXContext->cot.paShader[pCmd->shaderId];
266 ASSERT_GUEST_RETURN(pEntry->type == pCmd->type, VERR_INVALID_PARAMETER);
267 RT_UNTRUSTED_VALIDATED_FENCE();
268
269 pShader = &pDXContext->paShader[pCmd->shaderId];
270 }
271 else
272 pShader = NULL;
273
274 rc = pSvgaR3State->pFuncsDX->pfnDXSetShader(pThisCC, pDXContext, pCmd->type, pShader);
275 return rc;
276}
277
278
279int vmsvga3dDXSetSamplers(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetSamplers const *pCmd, uint32_t cSamplerId, SVGA3dSamplerId const *paSamplerId)
280{
281 int rc;
282 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
283 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetSamplers, VERR_INVALID_STATE);
284 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
285 AssertReturn(p3dState, VERR_INVALID_STATE);
286
287 PVMSVGA3DDXCONTEXT pDXContext;
288 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
289 AssertRCReturn(rc, rc);
290
291 ASSERT_GUEST_RETURN(pCmd->startSampler < SVGA3D_DX_MAX_SAMPLERS, VERR_INVALID_PARAMETER);
292 ASSERT_GUEST_RETURN(cSamplerId <= SVGA3D_DX_MAX_SAMPLERS - pCmd->startSampler, VERR_INVALID_PARAMETER);
293 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
294 ASSERT_GUEST_RETURN(pDXContext->cot.paSampler, VERR_INVALID_STATE);
295 for (uint32_t i = 0; i < cSamplerId; ++i)
296 {
297 SVGA3dSamplerId const samplerId = paSamplerId[i];
298 ASSERT_GUEST_RETURN( samplerId < pDXContext->cot.cSampler
299 || samplerId == SVGA_ID_INVALID, VERR_INVALID_PARAMETER);
300 }
301 RT_UNTRUSTED_VALIDATED_FENCE();
302
303 rc = pSvgaR3State->pFuncsDX->pfnDXSetSamplers(pThisCC, pDXContext, pCmd->startSampler, pCmd->type, cSamplerId, paSamplerId);
304 return rc;
305}
306
307
308int vmsvga3dDXDraw(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDraw const *pCmd)
309{
310 int rc;
311 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
312 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDraw, VERR_INVALID_STATE);
313 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
314 AssertReturn(p3dState, VERR_INVALID_STATE);
315
316 PVMSVGA3DDXCONTEXT pDXContext;
317 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
318 AssertRCReturn(rc, rc);
319
320 rc = pSvgaR3State->pFuncsDX->pfnDXDraw(pThisCC, pDXContext, pCmd->vertexCount, pCmd->startVertexLocation);
321#ifdef DUMP_BITMAPS
322 SVGACOTableDXRTViewEntry *pRTViewEntry = &pDXContext->cot.paRTView[pDXContext->svgaDXContext.renderState.renderTargetViewIds[0]];
323 SVGA3dSurfaceImageId image;
324 image.sid = pRTViewEntry->sid;
325 image.face = 0;
326 image.mipmap = 0;
327 VMSVGA3D_MAPPED_SURFACE map;
328 int rc2 = vmsvga3dSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
329 if (RT_SUCCESS(rc2))
330 {
331 vmsvga3dMapWriteBmpFile(&map, "rt-");
332 vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
333 }
334#endif
335 return rc;
336}
337
338
339int vmsvga3dDXDrawIndexed(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawIndexed const *pCmd)
340{
341 int rc;
342 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
343 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawIndexed, VERR_INVALID_STATE);
344 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
345 AssertReturn(p3dState, VERR_INVALID_STATE);
346
347 PVMSVGA3DDXCONTEXT pDXContext;
348 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
349 AssertRCReturn(rc, rc);
350
351 rc = pSvgaR3State->pFuncsDX->pfnDXDrawIndexed(pThisCC, pDXContext, pCmd->indexCount, pCmd->startIndexLocation, pCmd->baseVertexLocation);
352#ifdef DUMP_BITMAPS
353 SVGACOTableDXRTViewEntry *pRTViewEntry = &pDXContext->cot.paRTView[pDXContext->svgaDXContext.renderState.renderTargetViewIds[0]];
354 SVGA3dSurfaceImageId image;
355 image.sid = pRTViewEntry->sid;
356 image.face = 0;
357 image.mipmap = 0;
358 VMSVGA3D_MAPPED_SURFACE map;
359 int rc2 = vmsvga3dSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
360 if (RT_SUCCESS(rc2))
361 {
362 vmsvga3dMapWriteBmpFile(&map, "rt-");
363 vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
364 }
365#endif
366 return rc;
367}
368
369
370int vmsvga3dDXDrawInstanced(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawInstanced const *pCmd)
371{
372 int rc;
373 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
374 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawInstanced, VERR_INVALID_STATE);
375 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
376 AssertReturn(p3dState, VERR_INVALID_STATE);
377
378 PVMSVGA3DDXCONTEXT pDXContext;
379 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
380 AssertRCReturn(rc, rc);
381
382 rc = pSvgaR3State->pFuncsDX->pfnDXDrawInstanced(pThisCC, pDXContext,
383 pCmd->vertexCountPerInstance, pCmd->instanceCount, pCmd->startVertexLocation, pCmd->startInstanceLocation);
384#ifdef DUMP_BITMAPS
385 SVGACOTableDXRTViewEntry *pRTViewEntry = &pDXContext->cot.paRTView[pDXContext->svgaDXContext.renderState.renderTargetViewIds[0]];
386 SVGA3dSurfaceImageId image;
387 image.sid = pRTViewEntry->sid;
388 image.face = 0;
389 image.mipmap = 0;
390 VMSVGA3D_MAPPED_SURFACE map;
391 int rc2 = vmsvga3dSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
392 if (RT_SUCCESS(rc2))
393 {
394 vmsvga3dMapWriteBmpFile(&map, "rt-");
395 vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
396 }
397#endif
398 return rc;
399}
400
401
402int vmsvga3dDXDrawIndexedInstanced(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawIndexedInstanced const *pCmd)
403{
404 int rc;
405 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
406 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstanced, VERR_INVALID_STATE);
407 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
408 AssertReturn(p3dState, VERR_INVALID_STATE);
409
410 PVMSVGA3DDXCONTEXT pDXContext;
411 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
412 AssertRCReturn(rc, rc);
413
414 rc = pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstanced(pThisCC, pDXContext,
415 pCmd->indexCountPerInstance, pCmd->instanceCount, pCmd->startIndexLocation, pCmd->baseVertexLocation, pCmd->startInstanceLocation);
416#ifdef DUMP_BITMAPS
417 SVGACOTableDXRTViewEntry *pRTViewEntry = &pDXContext->cot.paRTView[pDXContext->svgaDXContext.renderState.renderTargetViewIds[0]];
418 SVGA3dSurfaceImageId image;
419 image.sid = pRTViewEntry->sid;
420 image.face = 0;
421 image.mipmap = 0;
422 VMSVGA3D_MAPPED_SURFACE map;
423 int rc2 = vmsvga3dSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
424 if (RT_SUCCESS(rc2))
425 {
426 vmsvga3dMapWriteBmpFile(&map, "rt-");
427 vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
428 }
429#endif
430 return rc;
431}
432
433
434int vmsvga3dDXDrawAuto(PVGASTATECC pThisCC, uint32_t idDXContext)
435{
436 int rc;
437 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
438 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawAuto, VERR_INVALID_STATE);
439 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
440 AssertReturn(p3dState, VERR_INVALID_STATE);
441
442 PVMSVGA3DDXCONTEXT pDXContext;
443 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
444 AssertRCReturn(rc, rc);
445
446 rc = pSvgaR3State->pFuncsDX->pfnDXDrawAuto(pThisCC, pDXContext);
447#ifdef DUMP_BITMAPS
448 SVGACOTableDXRTViewEntry *pRTViewEntry = &pDXContext->cot.paRTView[pDXContext->svgaDXContext.renderState.renderTargetViewIds[0]];
449 SVGA3dSurfaceImageId image;
450 image.sid = pRTViewEntry->sid;
451 image.face = 0;
452 image.mipmap = 0;
453 VMSVGA3D_MAPPED_SURFACE map;
454 int rc2 = vmsvga3dSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
455 if (RT_SUCCESS(rc2))
456 {
457 vmsvga3dMapWriteBmpFile(&map, "rt-");
458 vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
459 }
460#endif
461 return rc;
462}
463
464
465int vmsvga3dDXSetInputLayout(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dElementLayoutId elementLayoutId)
466{
467 int rc;
468 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
469 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetInputLayout, VERR_INVALID_STATE);
470 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
471 AssertReturn(p3dState, VERR_INVALID_STATE);
472
473 PVMSVGA3DDXCONTEXT pDXContext;
474 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
475 AssertRCReturn(rc, rc);
476
477 ASSERT_GUEST_RETURN(pDXContext->cot.paElementLayout, VERR_INVALID_STATE);
478 ASSERT_GUEST_RETURN(elementLayoutId < pDXContext->cot.cElementLayout, VERR_INVALID_PARAMETER);
479 RT_UNTRUSTED_VALIDATED_FENCE();
480
481 rc = pSvgaR3State->pFuncsDX->pfnDXSetInputLayout(pThisCC, pDXContext, elementLayoutId);
482 return rc;
483}
484
485
486int vmsvga3dDXSetVertexBuffers(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t startBuffer, uint32_t cVertexBuffer, SVGA3dVertexBuffer const *paVertexBuffer)
487{
488 int rc;
489 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
490 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetVertexBuffers, VERR_INVALID_STATE);
491 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
492 AssertReturn(p3dState, VERR_INVALID_STATE);
493
494 PVMSVGA3DDXCONTEXT pDXContext;
495 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
496 AssertRCReturn(rc, rc);
497
498 ASSERT_GUEST_RETURN(startBuffer < SVGA3D_DX_MAX_VERTEXBUFFERS, VERR_INVALID_PARAMETER);
499 ASSERT_GUEST_RETURN(cVertexBuffer <= SVGA3D_DX_MAX_VERTEXBUFFERS - startBuffer, VERR_INVALID_PARAMETER);
500 RT_UNTRUSTED_VALIDATED_FENCE();
501
502 rc = pSvgaR3State->pFuncsDX->pfnDXSetVertexBuffers(pThisCC, pDXContext, startBuffer, cVertexBuffer, paVertexBuffer);
503 return rc;
504}
505
506
507int vmsvga3dDXSetIndexBuffer(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetIndexBuffer const *pCmd)
508{
509 int rc;
510 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
511 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetIndexBuffer, VERR_INVALID_STATE);
512 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
513 AssertReturn(p3dState, VERR_INVALID_STATE);
514
515 PVMSVGA3DDXCONTEXT pDXContext;
516 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
517 AssertRCReturn(rc, rc);
518
519 rc = pSvgaR3State->pFuncsDX->pfnDXSetIndexBuffer(pThisCC, pDXContext, pCmd->sid, pCmd->format, pCmd->offset);
520 if (RT_SUCCESS(rc))
521 {
522 pDXContext->svgaDXContext.inputAssembly.indexBufferSid = pCmd->sid;
523 pDXContext->svgaDXContext.inputAssembly.indexBufferOffset = pCmd->offset;
524 pDXContext->svgaDXContext.inputAssembly.indexBufferFormat = pCmd->format;
525 }
526 return rc;
527}
528
529
530int vmsvga3dDXSetTopology(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dPrimitiveType topology)
531{
532 int rc;
533 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
534 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetTopology, VERR_INVALID_STATE);
535 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
536 AssertReturn(p3dState, VERR_INVALID_STATE);
537
538 PVMSVGA3DDXCONTEXT pDXContext;
539 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
540 AssertRCReturn(rc, rc);
541
542 ASSERT_GUEST_RETURN(topology >= SVGA3D_PRIMITIVE_MIN && topology < SVGA3D_PRIMITIVE_MAX, VERR_INVALID_PARAMETER);
543
544 rc = pSvgaR3State->pFuncsDX->pfnDXSetTopology(pThisCC, pDXContext, topology);
545 if (RT_SUCCESS(rc))
546 pDXContext->svgaDXContext.inputAssembly.topology = topology;
547 return rc;
548}
549
550
551int vmsvga3dDXSetRenderTargets(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dDepthStencilViewId depthStencilViewId, uint32_t cRenderTargetViewId, SVGA3dRenderTargetViewId const *paRenderTargetViewId)
552{
553 int rc;
554 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
555 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetRenderTargets, VERR_INVALID_STATE);
556 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
557 AssertReturn(p3dState, VERR_INVALID_STATE);
558
559 PVMSVGA3DDXCONTEXT pDXContext;
560 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
561 AssertRCReturn(rc, rc);
562
563 ASSERT_GUEST_RETURN( depthStencilViewId < pDXContext->cot.cDSView
564 || depthStencilViewId == SVGA_ID_INVALID, VERR_INVALID_PARAMETER);
565 ASSERT_GUEST_RETURN(cRenderTargetViewId < SVGA3D_MAX_RENDER_TARGETS, VERR_INVALID_PARAMETER);
566 for (uint32_t i = 0; i < cRenderTargetViewId; ++i)
567 ASSERT_GUEST_RETURN( paRenderTargetViewId[i] < pDXContext->cot.cRTView
568 || paRenderTargetViewId[i] == SVGA_ID_INVALID, VERR_INVALID_PARAMETER);
569 RT_UNTRUSTED_VALIDATED_FENCE();
570
571 rc = pSvgaR3State->pFuncsDX->pfnDXSetRenderTargets(pThisCC, pDXContext, depthStencilViewId, cRenderTargetViewId, paRenderTargetViewId);
572 if (RT_SUCCESS(rc))
573 {
574 pDXContext->svgaDXContext.renderState.depthStencilViewId = depthStencilViewId;
575 for (uint32_t i = 0; i < cRenderTargetViewId; ++i)
576 pDXContext->svgaDXContext.renderState.renderTargetViewIds[i] = paRenderTargetViewId[i];
577 }
578 return rc;
579}
580
581
582int vmsvga3dDXSetBlendState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetBlendState const *pCmd)
583{
584 int rc;
585 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
586 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetBlendState, VERR_INVALID_STATE);
587 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
588 AssertReturn(p3dState, VERR_INVALID_STATE);
589
590 PVMSVGA3DDXCONTEXT pDXContext;
591 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
592 AssertRCReturn(rc, rc);
593
594 SVGA3dBlendStateId const blendId = pCmd->blendId;
595
596 ASSERT_GUEST_RETURN(pDXContext->cot.paBlendState, VERR_INVALID_STATE);
597 ASSERT_GUEST_RETURN(blendId < pDXContext->cot.cBlendState, VERR_INVALID_PARAMETER);
598 RT_UNTRUSTED_VALIDATED_FENCE();
599
600 rc = pSvgaR3State->pFuncsDX->pfnDXSetBlendState(pThisCC, pDXContext, blendId, pCmd->blendFactor, pCmd->sampleMask);
601 return rc;
602}
603
604
605int vmsvga3dDXSetDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetDepthStencilState const *pCmd)
606{
607 int rc;
608 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
609 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetDepthStencilState, VERR_INVALID_STATE);
610 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
611 AssertReturn(p3dState, VERR_INVALID_STATE);
612
613 PVMSVGA3DDXCONTEXT pDXContext;
614 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
615 AssertRCReturn(rc, rc);
616
617 SVGA3dDepthStencilStateId const depthStencilId = pCmd->depthStencilId;
618
619 ASSERT_GUEST_RETURN(pDXContext->cot.paDepthStencil, VERR_INVALID_STATE);
620 ASSERT_GUEST_RETURN(depthStencilId < pDXContext->cot.cDepthStencil, VERR_INVALID_PARAMETER);
621 RT_UNTRUSTED_VALIDATED_FENCE();
622
623 rc = pSvgaR3State->pFuncsDX->pfnDXSetDepthStencilState(pThisCC, pDXContext, depthStencilId, pCmd->stencilRef);
624 return rc;
625}
626
627
628int vmsvga3dDXSetRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dRasterizerStateId rasterizerId)
629{
630 int rc;
631 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
632 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetRasterizerState, VERR_INVALID_STATE);
633 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
634 AssertReturn(p3dState, VERR_INVALID_STATE);
635
636 PVMSVGA3DDXCONTEXT pDXContext;
637 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
638 AssertRCReturn(rc, rc);
639
640 ASSERT_GUEST_RETURN(rasterizerId < pDXContext->cot.cRasterizerState, VERR_INVALID_PARAMETER);
641 RT_UNTRUSTED_VALIDATED_FENCE();
642
643 rc = pSvgaR3State->pFuncsDX->pfnDXSetRasterizerState(pThisCC, pDXContext, rasterizerId);
644 return rc;
645}
646
647
648int vmsvga3dDXDefineQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
649{
650 int rc;
651 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
652 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineQuery, VERR_INVALID_STATE);
653 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
654 AssertReturn(p3dState, VERR_INVALID_STATE);
655
656 PVMSVGA3DDXCONTEXT pDXContext;
657 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
658 AssertRCReturn(rc, rc);
659
660 rc = pSvgaR3State->pFuncsDX->pfnDXDefineQuery(pThisCC, pDXContext);
661 return rc;
662}
663
664
665int vmsvga3dDXDestroyQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
666{
667 int rc;
668 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
669 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyQuery, VERR_INVALID_STATE);
670 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
671 AssertReturn(p3dState, VERR_INVALID_STATE);
672
673 PVMSVGA3DDXCONTEXT pDXContext;
674 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
675 AssertRCReturn(rc, rc);
676
677 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyQuery(pThisCC, pDXContext);
678 return rc;
679}
680
681
682int vmsvga3dDXBindQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
683{
684 int rc;
685 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
686 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindQuery, VERR_INVALID_STATE);
687 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
688 AssertReturn(p3dState, VERR_INVALID_STATE);
689
690 PVMSVGA3DDXCONTEXT pDXContext;
691 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
692 AssertRCReturn(rc, rc);
693
694 rc = pSvgaR3State->pFuncsDX->pfnDXBindQuery(pThisCC, pDXContext);
695 return rc;
696}
697
698
699int vmsvga3dDXSetQueryOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
700{
701 int rc;
702 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
703 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetQueryOffset, VERR_INVALID_STATE);
704 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
705 AssertReturn(p3dState, VERR_INVALID_STATE);
706
707 PVMSVGA3DDXCONTEXT pDXContext;
708 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
709 AssertRCReturn(rc, rc);
710
711 rc = pSvgaR3State->pFuncsDX->pfnDXSetQueryOffset(pThisCC, pDXContext);
712 return rc;
713}
714
715
716int vmsvga3dDXBeginQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
717{
718 int rc;
719 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
720 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBeginQuery, VERR_INVALID_STATE);
721 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
722 AssertReturn(p3dState, VERR_INVALID_STATE);
723
724 PVMSVGA3DDXCONTEXT pDXContext;
725 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
726 AssertRCReturn(rc, rc);
727
728 rc = pSvgaR3State->pFuncsDX->pfnDXBeginQuery(pThisCC, pDXContext);
729 return rc;
730}
731
732
733int vmsvga3dDXEndQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
734{
735 int rc;
736 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
737 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXEndQuery, VERR_INVALID_STATE);
738 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
739 AssertReturn(p3dState, VERR_INVALID_STATE);
740
741 PVMSVGA3DDXCONTEXT pDXContext;
742 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
743 AssertRCReturn(rc, rc);
744
745 rc = pSvgaR3State->pFuncsDX->pfnDXEndQuery(pThisCC, pDXContext);
746 return rc;
747}
748
749
750int vmsvga3dDXReadbackQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
751{
752 int rc;
753 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
754 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXReadbackQuery, VERR_INVALID_STATE);
755 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
756 AssertReturn(p3dState, VERR_INVALID_STATE);
757
758 PVMSVGA3DDXCONTEXT pDXContext;
759 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
760 AssertRCReturn(rc, rc);
761
762 rc = pSvgaR3State->pFuncsDX->pfnDXReadbackQuery(pThisCC, pDXContext);
763 return rc;
764}
765
766
767int vmsvga3dDXSetPredication(PVGASTATECC pThisCC, uint32_t idDXContext)
768{
769 int rc;
770 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
771 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetPredication, VERR_INVALID_STATE);
772 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
773 AssertReturn(p3dState, VERR_INVALID_STATE);
774
775 PVMSVGA3DDXCONTEXT pDXContext;
776 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
777 AssertRCReturn(rc, rc);
778
779 rc = pSvgaR3State->pFuncsDX->pfnDXSetPredication(pThisCC, pDXContext);
780 return rc;
781}
782
783
784int vmsvga3dDXSetSOTargets(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t cSoTarget, SVGA3dSoTarget const *paSoTarget)
785{
786 int rc;
787 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
788 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetSOTargets, VERR_INVALID_STATE);
789 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
790 AssertReturn(p3dState, VERR_INVALID_STATE);
791
792 PVMSVGA3DDXCONTEXT pDXContext;
793 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
794 AssertRCReturn(rc, rc);
795
796 ASSERT_GUEST_RETURN(cSoTarget < SVGA3D_DX_MAX_SOTARGETS, VERR_INVALID_PARAMETER);
797
798 rc = pSvgaR3State->pFuncsDX->pfnDXSetSOTargets(pThisCC, pDXContext, cSoTarget, paSoTarget);
799 return rc;
800}
801
802
803int vmsvga3dDXSetViewports(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t cViewport, SVGA3dViewport const *paViewport)
804{
805 int rc;
806 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
807 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetViewports, VERR_INVALID_STATE);
808 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
809 AssertReturn(p3dState, VERR_INVALID_STATE);
810
811 PVMSVGA3DDXCONTEXT pDXContext;
812 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
813 AssertRCReturn(rc, rc);
814
815 rc = pSvgaR3State->pFuncsDX->pfnDXSetViewports(pThisCC, pDXContext, cViewport, paViewport);
816 return rc;
817}
818
819
820int vmsvga3dDXSetScissorRects(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t cRect, SVGASignedRect const *paRect)
821{
822 int rc;
823 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
824 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetScissorRects, VERR_INVALID_STATE);
825 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
826 AssertReturn(p3dState, VERR_INVALID_STATE);
827
828 PVMSVGA3DDXCONTEXT pDXContext;
829 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
830 AssertRCReturn(rc, rc);
831
832 rc = pSvgaR3State->pFuncsDX->pfnDXSetScissorRects(pThisCC, pDXContext, cRect, paRect);
833 return rc;
834}
835
836
837int vmsvga3dDXClearRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXClearRenderTargetView const *pCmd)
838{
839 int rc;
840 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
841 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearRenderTargetView, VERR_INVALID_STATE);
842 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
843 AssertReturn(p3dState, VERR_INVALID_STATE);
844
845 PVMSVGA3DDXCONTEXT pDXContext;
846 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
847 AssertRCReturn(rc, rc);
848
849 SVGA3dRenderTargetViewId const renderTargetViewId = pCmd->renderTargetViewId;
850
851 ASSERT_GUEST_RETURN(pDXContext->cot.paRTView, VERR_INVALID_STATE);
852 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, VERR_INVALID_PARAMETER);
853 RT_UNTRUSTED_VALIDATED_FENCE();
854
855 rc = pSvgaR3State->pFuncsDX->pfnDXClearRenderTargetView(pThisCC, pDXContext, renderTargetViewId, &pCmd->rgba);
856 return rc;
857}
858
859
860int vmsvga3dDXClearDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXClearDepthStencilView const *pCmd)
861{
862 int rc;
863 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
864 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearDepthStencilView, VERR_INVALID_STATE);
865 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
866 AssertReturn(p3dState, VERR_INVALID_STATE);
867
868 PVMSVGA3DDXCONTEXT pDXContext;
869 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
870 AssertRCReturn(rc, rc);
871
872 SVGA3dDepthStencilViewId const depthStencilViewId = pCmd->depthStencilViewId;
873
874 ASSERT_GUEST_RETURN(pDXContext->cot.paDSView, VERR_INVALID_STATE);
875 ASSERT_GUEST_RETURN(depthStencilViewId < pDXContext->cot.cDSView, VERR_INVALID_PARAMETER);
876 RT_UNTRUSTED_VALIDATED_FENCE();
877
878 rc = pSvgaR3State->pFuncsDX->pfnDXClearDepthStencilView(pThisCC, pDXContext, pCmd->flags, depthStencilViewId, pCmd->depth, (uint8_t)pCmd->stencil);
879 return rc;
880}
881
882
883int vmsvga3dDXPredCopyRegion(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXPredCopyRegion const *pCmd)
884{
885 int rc;
886 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
887 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredCopyRegion, VERR_INVALID_STATE);
888 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
889 AssertReturn(p3dState, VERR_INVALID_STATE);
890
891 PVMSVGA3DDXCONTEXT pDXContext;
892 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
893 AssertRCReturn(rc, rc);
894
895 /** @todo Memcpy if both resources do not have the hardware resource. */
896
897 rc = pSvgaR3State->pFuncsDX->pfnDXPredCopyRegion(pThisCC, pDXContext, pCmd->dstSid, pCmd->dstSubResource, pCmd->srcSid, pCmd->srcSubResource, &pCmd->box);
898 return rc;
899}
900
901
902int vmsvga3dDXPredCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
903{
904 int rc;
905 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
906 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredCopy, VERR_INVALID_STATE);
907 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
908 AssertReturn(p3dState, VERR_INVALID_STATE);
909
910 PVMSVGA3DDXCONTEXT pDXContext;
911 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
912 AssertRCReturn(rc, rc);
913
914 rc = pSvgaR3State->pFuncsDX->pfnDXPredCopy(pThisCC, pDXContext);
915 return rc;
916}
917
918
919int vmsvga3dDXPresentBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
920{
921 int rc;
922 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
923 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPresentBlt, VERR_INVALID_STATE);
924 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
925 AssertReturn(p3dState, VERR_INVALID_STATE);
926
927 PVMSVGA3DDXCONTEXT pDXContext;
928 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
929 AssertRCReturn(rc, rc);
930
931 rc = pSvgaR3State->pFuncsDX->pfnDXPresentBlt(pThisCC, pDXContext);
932 return rc;
933}
934
935
936int vmsvga3dDXGenMips(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXGenMips const *pCmd)
937{
938 int rc;
939 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
940 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXGenMips, VERR_INVALID_STATE);
941 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
942 AssertReturn(p3dState, VERR_INVALID_STATE);
943
944 PVMSVGA3DDXCONTEXT pDXContext;
945 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
946 AssertRCReturn(rc, rc);
947
948 SVGA3dShaderResourceViewId const shaderResourceViewId = pCmd->shaderResourceViewId;
949
950 ASSERT_GUEST_RETURN(pDXContext->cot.paSRView, VERR_INVALID_STATE);
951 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->cot.cSRView, VERR_INVALID_PARAMETER);
952 RT_UNTRUSTED_VALIDATED_FENCE();
953
954 rc = pSvgaR3State->pFuncsDX->pfnDXGenMips(pThisCC, pDXContext, shaderResourceViewId);
955 return rc;
956}
957
958
959int vmsvga3dDXDefineShaderResourceView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineShaderResourceView const *pCmd)
960{
961 int rc;
962 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
963 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineShaderResourceView, VERR_INVALID_STATE);
964 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
965 AssertReturn(p3dState, VERR_INVALID_STATE);
966
967 PVMSVGA3DDXCONTEXT pDXContext;
968 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
969 AssertRCReturn(rc, rc);
970
971 SVGA3dShaderResourceViewId const shaderResourceViewId = pCmd->shaderResourceViewId;
972
973 ASSERT_GUEST_RETURN(pDXContext->cot.paSRView, VERR_INVALID_STATE);
974 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->cot.cSRView, VERR_INVALID_PARAMETER);
975 RT_UNTRUSTED_VALIDATED_FENCE();
976
977 SVGACOTableDXSRViewEntry *pEntry = &pDXContext->cot.paSRView[shaderResourceViewId];
978 pEntry->sid = pCmd->sid;
979 pEntry->format = pCmd->format;
980 pEntry->resourceDimension = pCmd->resourceDimension;
981 pEntry->desc = pCmd->desc;
982
983 rc = pSvgaR3State->pFuncsDX->pfnDXDefineShaderResourceView(pThisCC, pDXContext, shaderResourceViewId, pEntry);
984 return rc;
985}
986
987
988int vmsvga3dDXDestroyShaderResourceView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyShaderResourceView const *pCmd)
989{
990 int rc;
991 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
992 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyShaderResourceView, VERR_INVALID_STATE);
993 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
994 AssertReturn(p3dState, VERR_INVALID_STATE);
995
996 PVMSVGA3DDXCONTEXT pDXContext;
997 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
998 AssertRCReturn(rc, rc);
999
1000 SVGA3dShaderResourceViewId const shaderResourceViewId = pCmd->shaderResourceViewId;
1001
1002 ASSERT_GUEST_RETURN(pDXContext->cot.paSRView, VERR_INVALID_STATE);
1003 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->cot.cSRView, VERR_INVALID_PARAMETER);
1004 RT_UNTRUSTED_VALIDATED_FENCE();
1005
1006 SVGACOTableDXSRViewEntry *pEntry = &pDXContext->cot.paSRView[shaderResourceViewId];
1007 RT_ZERO(*pEntry);
1008
1009 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyShaderResourceView(pThisCC, pDXContext, shaderResourceViewId);
1010 return rc;
1011}
1012
1013
1014int vmsvga3dDXDefineRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineRenderTargetView const *pCmd)
1015{
1016 int rc;
1017 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1018 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineRenderTargetView, VERR_INVALID_STATE);
1019 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1020 AssertReturn(p3dState, VERR_INVALID_STATE);
1021
1022 PVMSVGA3DDXCONTEXT pDXContext;
1023 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1024 AssertRCReturn(rc, rc);
1025
1026 SVGA3dRenderTargetViewId const renderTargetViewId = pCmd->renderTargetViewId;
1027
1028 ASSERT_GUEST_RETURN(pDXContext->cot.paRTView, VERR_INVALID_STATE);
1029 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, VERR_INVALID_PARAMETER);
1030 RT_UNTRUSTED_VALIDATED_FENCE();
1031
1032 SVGACOTableDXRTViewEntry *pEntry = &pDXContext->cot.paRTView[renderTargetViewId];
1033 pEntry->sid = pCmd->sid;
1034 pEntry->format = pCmd->format;
1035 pEntry->resourceDimension = pCmd->resourceDimension;
1036 pEntry->desc = pCmd->desc;
1037
1038 rc = pSvgaR3State->pFuncsDX->pfnDXDefineRenderTargetView(pThisCC, pDXContext, renderTargetViewId, pEntry);
1039 return rc;
1040}
1041
1042
1043int vmsvga3dDXDestroyRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyRenderTargetView const *pCmd)
1044{
1045 int rc;
1046 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1047 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyRenderTargetView, VERR_INVALID_STATE);
1048 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1049 AssertReturn(p3dState, VERR_INVALID_STATE);
1050
1051 PVMSVGA3DDXCONTEXT pDXContext;
1052 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1053 AssertRCReturn(rc, rc);
1054
1055 SVGA3dRenderTargetViewId const renderTargetViewId = pCmd->renderTargetViewId;
1056
1057 ASSERT_GUEST_RETURN(pDXContext->cot.paRTView, VERR_INVALID_STATE);
1058 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, VERR_INVALID_PARAMETER);
1059 RT_UNTRUSTED_VALIDATED_FENCE();
1060
1061 SVGACOTableDXRTViewEntry *pEntry = &pDXContext->cot.paRTView[renderTargetViewId];
1062 RT_ZERO(*pEntry);
1063
1064 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyRenderTargetView(pThisCC, pDXContext, renderTargetViewId);
1065 /// @todo for (uint32_t i = 0; i < SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS; ++i)
1066 //{
1067 // if (pDXContext->svgaDXContext.renderState.renderTargetViewIds[i] == renderTargetViewId)
1068 // pDXContext->svgaDXContext.renderState.renderTargetViewIds[i] = SVGA_ID_INVALID;
1069 //}
1070 return rc;
1071}
1072
1073
1074int vmsvga3dDXDefineDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineDepthStencilView_v2 const *pCmd)
1075{
1076 int rc;
1077 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1078 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilView, VERR_INVALID_STATE);
1079 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1080 AssertReturn(p3dState, VERR_INVALID_STATE);
1081
1082 PVMSVGA3DDXCONTEXT pDXContext;
1083 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1084 AssertRCReturn(rc, rc);
1085
1086 SVGA3dDepthStencilViewId const depthStencilViewId = pCmd->depthStencilViewId;
1087
1088 ASSERT_GUEST_RETURN(pDXContext->cot.paDSView, VERR_INVALID_STATE);
1089 ASSERT_GUEST_RETURN(depthStencilViewId < pDXContext->cot.cDSView, VERR_INVALID_PARAMETER);
1090 RT_UNTRUSTED_VALIDATED_FENCE();
1091
1092 SVGACOTableDXDSViewEntry *pEntry = &pDXContext->cot.paDSView[depthStencilViewId];
1093 pEntry->sid = pCmd->sid;
1094 pEntry->format = pCmd->format;
1095 pEntry->resourceDimension = pCmd->resourceDimension;
1096 pEntry->mipSlice = pCmd->mipSlice;
1097 pEntry->firstArraySlice = pCmd->firstArraySlice;
1098 pEntry->arraySize = pCmd->arraySize;
1099 pEntry->flags = pCmd->flags;
1100
1101 rc = pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilView(pThisCC, pDXContext, depthStencilViewId, pEntry);
1102 return rc;
1103}
1104
1105
1106int vmsvga3dDXDestroyDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyDepthStencilView const *pCmd)
1107{
1108 int rc;
1109 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1110 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilView, VERR_INVALID_STATE);
1111 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1112 AssertReturn(p3dState, VERR_INVALID_STATE);
1113
1114 PVMSVGA3DDXCONTEXT pDXContext;
1115 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1116 AssertRCReturn(rc, rc);
1117
1118 SVGA3dDepthStencilViewId const depthStencilViewId = pCmd->depthStencilViewId;
1119
1120 ASSERT_GUEST_RETURN(pDXContext->cot.paDSView, VERR_INVALID_STATE);
1121 ASSERT_GUEST_RETURN(depthStencilViewId < pDXContext->cot.cDSView, VERR_INVALID_PARAMETER);
1122 RT_UNTRUSTED_VALIDATED_FENCE();
1123
1124 SVGACOTableDXDSViewEntry *pEntry = &pDXContext->cot.paDSView[depthStencilViewId];
1125 RT_ZERO(*pEntry);
1126
1127 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilView(pThisCC, pDXContext, depthStencilViewId);
1128 return rc;
1129}
1130
1131
1132int vmsvga3dDXDefineElementLayout(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dElementLayoutId elementLayoutId, uint32_t cDesc, SVGA3dInputElementDesc const *paDesc)
1133{
1134 int rc;
1135 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1136 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineElementLayout, VERR_INVALID_STATE);
1137 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1138 AssertReturn(p3dState, VERR_INVALID_STATE);
1139
1140 PVMSVGA3DDXCONTEXT pDXContext;
1141 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1142 AssertRCReturn(rc, rc);
1143
1144 ASSERT_GUEST_RETURN(pDXContext->cot.paElementLayout, VERR_INVALID_STATE);
1145 ASSERT_GUEST_RETURN(elementLayoutId < pDXContext->cot.cElementLayout, VERR_INVALID_PARAMETER);
1146 RT_UNTRUSTED_VALIDATED_FENCE();
1147
1148 SVGACOTableDXElementLayoutEntry *pEntry = &pDXContext->cot.paElementLayout[elementLayoutId];
1149 pEntry->elid = elementLayoutId;
1150 pEntry->numDescs = RT_MIN(cDesc, RT_ELEMENTS(pEntry->descs));
1151 memcpy(pEntry->descs, paDesc, pEntry->numDescs * sizeof(pEntry->descs[0]));
1152
1153#ifdef LOG_ENABLED
1154 Log6(("Element layout %d: slot off fmt class step reg\n", pEntry->elid));
1155 for (uint32_t i = 0; i < pEntry->numDescs; ++i)
1156 {
1157 Log6((" [%u]: %u 0x%02X %d %u %u %u\n",
1158 i,
1159 pEntry->descs[i].inputSlot,
1160 pEntry->descs[i].alignedByteOffset,
1161 pEntry->descs[i].format,
1162 pEntry->descs[i].inputSlotClass,
1163 pEntry->descs[i].instanceDataStepRate,
1164 pEntry->descs[i].inputRegister
1165 ));
1166 }
1167#endif
1168
1169 rc = pSvgaR3State->pFuncsDX->pfnDXDefineElementLayout(pThisCC, pDXContext, elementLayoutId, pEntry);
1170 return rc;
1171}
1172
1173
1174int vmsvga3dDXDestroyElementLayout(PVGASTATECC pThisCC, uint32_t idDXContext)
1175{
1176 int rc;
1177 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1178 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyElementLayout, VERR_INVALID_STATE);
1179 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1180 AssertReturn(p3dState, VERR_INVALID_STATE);
1181
1182 PVMSVGA3DDXCONTEXT pDXContext;
1183 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1184 AssertRCReturn(rc, rc);
1185
1186 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyElementLayout(pThisCC, pDXContext);
1187 return rc;
1188}
1189
1190
1191int vmsvga3dDXDefineBlendState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineBlendState const *pCmd)
1192{
1193 int rc;
1194 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1195 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineBlendState, VERR_INVALID_STATE);
1196 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1197 AssertReturn(p3dState, VERR_INVALID_STATE);
1198
1199 PVMSVGA3DDXCONTEXT pDXContext;
1200 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1201 AssertRCReturn(rc, rc);
1202
1203 const SVGA3dBlendStateId blendId = pCmd->blendId;
1204
1205 ASSERT_GUEST_RETURN(pDXContext->cot.paBlendState, VERR_INVALID_STATE);
1206 ASSERT_GUEST_RETURN(blendId < pDXContext->cot.cBlendState, VERR_INVALID_PARAMETER);
1207 RT_UNTRUSTED_VALIDATED_FENCE();
1208
1209 SVGACOTableDXBlendStateEntry *pEntry = &pDXContext->cot.paBlendState[blendId];
1210 pEntry->alphaToCoverageEnable = pCmd->alphaToCoverageEnable;
1211 pEntry->independentBlendEnable = pCmd->independentBlendEnable;
1212 memcpy(pEntry->perRT, pCmd->perRT, sizeof(pEntry->perRT));
1213
1214 rc = pSvgaR3State->pFuncsDX->pfnDXDefineBlendState(pThisCC, pDXContext, blendId, pEntry);
1215 return rc;
1216}
1217
1218
1219int vmsvga3dDXDestroyBlendState(PVGASTATECC pThisCC, uint32_t idDXContext)
1220{
1221 int rc;
1222 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1223 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyBlendState, VERR_INVALID_STATE);
1224 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1225 AssertReturn(p3dState, VERR_INVALID_STATE);
1226
1227 PVMSVGA3DDXCONTEXT pDXContext;
1228 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1229 AssertRCReturn(rc, rc);
1230
1231 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyBlendState(pThisCC, pDXContext);
1232 return rc;
1233}
1234
1235
1236int vmsvga3dDXDefineDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineDepthStencilState const *pCmd)
1237{
1238 int rc;
1239 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1240 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilState, VERR_INVALID_STATE);
1241 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1242 AssertReturn(p3dState, VERR_INVALID_STATE);
1243
1244 PVMSVGA3DDXCONTEXT pDXContext;
1245 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1246 AssertRCReturn(rc, rc);
1247
1248 SVGA3dDepthStencilStateId const depthStencilId = pCmd->depthStencilId;
1249
1250 ASSERT_GUEST_RETURN(pDXContext->cot.paDepthStencil, VERR_INVALID_STATE);
1251 ASSERT_GUEST_RETURN(depthStencilId < pDXContext->cot.cDepthStencil, VERR_INVALID_PARAMETER);
1252 RT_UNTRUSTED_VALIDATED_FENCE();
1253
1254 SVGACOTableDXDepthStencilEntry *pEntry = &pDXContext->cot.paDepthStencil[depthStencilId];
1255 pEntry->depthEnable = pCmd->depthEnable;
1256 pEntry->depthWriteMask = pCmd->depthWriteMask;
1257 pEntry->depthFunc = pCmd->depthFunc;
1258 pEntry->stencilEnable = pCmd->stencilEnable;
1259 pEntry->frontEnable = pCmd->frontEnable;
1260 pEntry->backEnable = pCmd->backEnable;
1261 pEntry->stencilReadMask = pCmd->stencilReadMask;
1262 pEntry->stencilWriteMask = pCmd->stencilWriteMask;
1263
1264 pEntry->frontStencilFailOp = pCmd->frontStencilFailOp;
1265 pEntry->frontStencilDepthFailOp = pCmd->frontStencilDepthFailOp;
1266 pEntry->frontStencilPassOp = pCmd->frontStencilPassOp;
1267 pEntry->frontStencilFunc = pCmd->frontStencilFunc;
1268
1269 pEntry->backStencilFailOp = pCmd->backStencilFailOp;
1270 pEntry->backStencilDepthFailOp = pCmd->backStencilDepthFailOp;
1271 pEntry->backStencilPassOp = pCmd->backStencilPassOp;
1272 pEntry->backStencilFunc = pCmd->backStencilFunc;
1273
1274 rc = pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilState(pThisCC, pDXContext, depthStencilId, pEntry);
1275 return rc;
1276}
1277
1278
1279int vmsvga3dDXDestroyDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext)
1280{
1281 int rc;
1282 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1283 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilState, VERR_INVALID_STATE);
1284 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1285 AssertReturn(p3dState, VERR_INVALID_STATE);
1286
1287 PVMSVGA3DDXCONTEXT pDXContext;
1288 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1289 AssertRCReturn(rc, rc);
1290
1291 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilState(pThisCC, pDXContext);
1292 return rc;
1293}
1294
1295
1296int vmsvga3dDXDefineRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineRasterizerState const *pCmd)
1297{
1298 int rc;
1299 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1300 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineRasterizerState, VERR_INVALID_STATE);
1301 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1302 AssertReturn(p3dState, VERR_INVALID_STATE);
1303
1304 PVMSVGA3DDXCONTEXT pDXContext;
1305 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1306 AssertRCReturn(rc, rc);
1307
1308 SVGA3dRasterizerStateId const rasterizerId = pCmd->rasterizerId;
1309
1310 ASSERT_GUEST_RETURN(pDXContext->cot.paRasterizerState, VERR_INVALID_STATE);
1311 ASSERT_GUEST_RETURN(rasterizerId < pDXContext->cot.cRasterizerState, VERR_INVALID_PARAMETER);
1312 RT_UNTRUSTED_VALIDATED_FENCE();
1313
1314 SVGACOTableDXRasterizerStateEntry *pEntry = &pDXContext->cot.paRasterizerState[rasterizerId];
1315 pEntry->fillMode = pCmd->fillMode;
1316 pEntry->cullMode = pCmd->cullMode;
1317 pEntry->frontCounterClockwise = pCmd->frontCounterClockwise;
1318 pEntry->provokingVertexLast = pCmd->provokingVertexLast;
1319 pEntry->depthBias = pCmd->depthBias;
1320 pEntry->depthBiasClamp = pCmd->depthBiasClamp;
1321 pEntry->slopeScaledDepthBias = pCmd->slopeScaledDepthBias;
1322 pEntry->depthClipEnable = pCmd->depthClipEnable;
1323 pEntry->scissorEnable = pCmd->scissorEnable;
1324 pEntry->multisampleEnable = pCmd->multisampleEnable;
1325 pEntry->antialiasedLineEnable = pCmd->antialiasedLineEnable;
1326 pEntry->lineWidth = pCmd->lineWidth;
1327 pEntry->lineStippleEnable = pCmd->lineStippleEnable;
1328 pEntry->lineStippleFactor = pCmd->lineStippleFactor;
1329 pEntry->lineStipplePattern = pCmd->lineStipplePattern;
1330 pEntry->forcedSampleCount = 0; /** @todo Not in pCmd. */
1331 RT_ZERO(pEntry->mustBeZero);
1332
1333 rc = pSvgaR3State->pFuncsDX->pfnDXDefineRasterizerState(pThisCC, pDXContext, rasterizerId, pEntry);
1334 return rc;
1335}
1336
1337
1338int vmsvga3dDXDestroyRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext)
1339{
1340 int rc;
1341 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1342 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyRasterizerState, VERR_INVALID_STATE);
1343 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1344 AssertReturn(p3dState, VERR_INVALID_STATE);
1345
1346 PVMSVGA3DDXCONTEXT pDXContext;
1347 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1348 AssertRCReturn(rc, rc);
1349
1350 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyRasterizerState(pThisCC, pDXContext);
1351 return rc;
1352}
1353
1354
1355int vmsvga3dDXDefineSamplerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineSamplerState const *pCmd)
1356{
1357 int rc;
1358 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1359 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineSamplerState, VERR_INVALID_STATE);
1360 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1361 AssertReturn(p3dState, VERR_INVALID_STATE);
1362
1363 PVMSVGA3DDXCONTEXT pDXContext;
1364 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1365 AssertRCReturn(rc, rc);
1366
1367 SVGA3dSamplerId const samplerId = pCmd->samplerId;
1368
1369 ASSERT_GUEST_RETURN(pDXContext->cot.paSampler, VERR_INVALID_STATE);
1370 ASSERT_GUEST_RETURN(samplerId < pDXContext->cot.cSampler, VERR_INVALID_PARAMETER);
1371 RT_UNTRUSTED_VALIDATED_FENCE();
1372
1373 SVGACOTableDXSamplerEntry *pEntry = &pDXContext->cot.paSampler[samplerId];
1374 pEntry->filter = pCmd->filter;
1375 pEntry->addressU = pCmd->addressU;
1376 pEntry->addressV = pCmd->addressV;
1377 pEntry->addressW = pCmd->addressW;
1378 pEntry->mipLODBias = pCmd->mipLODBias;
1379 pEntry->maxAnisotropy = pCmd->maxAnisotropy;
1380 pEntry->comparisonFunc = pCmd->comparisonFunc;
1381 pEntry->borderColor = pCmd->borderColor;
1382 pEntry->minLOD = pCmd->minLOD;
1383 pEntry->maxLOD = pCmd->maxLOD;
1384
1385 rc = pSvgaR3State->pFuncsDX->pfnDXDefineSamplerState(pThisCC, pDXContext, samplerId, pEntry);
1386 return rc;
1387}
1388
1389
1390int vmsvga3dDXDestroySamplerState(PVGASTATECC pThisCC, uint32_t idDXContext)
1391{
1392 int rc;
1393 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1394 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroySamplerState, VERR_INVALID_STATE);
1395 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1396 AssertReturn(p3dState, VERR_INVALID_STATE);
1397
1398 PVMSVGA3DDXCONTEXT pDXContext;
1399 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1400 AssertRCReturn(rc, rc);
1401
1402 rc = pSvgaR3State->pFuncsDX->pfnDXDestroySamplerState(pThisCC, pDXContext);
1403 return rc;
1404}
1405
1406
1407int vmsvga3dDXDefineShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineShader const *pCmd)
1408{
1409 int rc;
1410 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1411 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineShader, VERR_INVALID_STATE);
1412 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1413 AssertReturn(p3dState, VERR_INVALID_STATE);
1414
1415 PVMSVGA3DDXCONTEXT pDXContext;
1416 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1417 AssertRCReturn(rc, rc);
1418
1419 AssertReturn(pDXContext->paShader, VERR_INVALID_STATE);
1420
1421 SVGA3dShaderId const shaderId = pCmd->shaderId;
1422
1423 ASSERT_GUEST_RETURN(pDXContext->cot.paShader, VERR_INVALID_STATE);
1424 ASSERT_GUEST_RETURN(shaderId < pDXContext->cot.cShader, VERR_INVALID_PARAMETER);
1425 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
1426 ASSERT_GUEST_RETURN(pCmd->sizeInBytes >= 8, VERR_INVALID_PARAMETER); /* Version Token + Length Token. */
1427 RT_UNTRUSTED_VALIDATED_FENCE();
1428
1429 SVGACOTableDXShaderEntry *pEntry = &pDXContext->cot.paShader[shaderId];
1430 pEntry->type = pCmd->type;
1431 pEntry->sizeInBytes = pCmd->sizeInBytes;
1432 pEntry->offsetInBytes = 0;
1433 pEntry->mobid = SVGA_ID_INVALID;
1434
1435 PVMSVGA3DSHADER pShader = &pDXContext->paShader[shaderId];
1436 if (pShader->id != SVGA_ID_INVALID)
1437 {
1438 /* Cleanup the current shader. */
1439 pSvgaR3State->pFuncsDX->pfnDXDestroyShader(pThisCC, pDXContext, shaderId);
1440 RTMemFree(pShader->pShaderProgram);
1441 }
1442
1443 pShader->id = shaderId;
1444 pShader->cid = idDXContext;
1445 pShader->type = pEntry->type;
1446 pShader->cbData = pEntry->sizeInBytes;
1447 pShader->pShaderProgram = NULL;
1448 pShader->u.pvBackendShader = NULL;
1449
1450 rc = pSvgaR3State->pFuncsDX->pfnDXDefineShader(pThisCC, pDXContext, shaderId, pEntry);
1451 return rc;
1452}
1453
1454
1455int vmsvga3dDXDestroyShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyShader const *pCmd)
1456{
1457 int rc;
1458 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1459 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyShader, VERR_INVALID_STATE);
1460 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1461 AssertReturn(p3dState, VERR_INVALID_STATE);
1462
1463 PVMSVGA3DDXCONTEXT pDXContext;
1464 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1465 AssertRCReturn(rc, rc);
1466
1467 AssertReturn(pDXContext->paShader, VERR_INVALID_STATE);
1468
1469 SVGA3dShaderId const shaderId = pCmd->shaderId;
1470
1471 ASSERT_GUEST_RETURN(pDXContext->cot.paShader, VERR_INVALID_STATE);
1472 ASSERT_GUEST_RETURN(shaderId < pDXContext->cot.cShader, VERR_INVALID_PARAMETER);
1473 RT_UNTRUSTED_VALIDATED_FENCE();
1474
1475 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyShader(pThisCC, pDXContext, shaderId);
1476
1477 /* Cleanup COTable entries.*/
1478 SVGACOTableDXShaderEntry *pEntry = &pDXContext->cot.paShader[shaderId];
1479 pEntry->type = SVGA3D_SHADERTYPE_INVALID;
1480 pEntry->sizeInBytes = 0;
1481 pEntry->offsetInBytes = 0;
1482 pEntry->mobid = SVGA_ID_INVALID;
1483
1484 /** @todo Destroy shaders on context and backend deletion. */
1485 PVMSVGA3DSHADER pShader = &pDXContext->paShader[shaderId];
1486 DXShaderFree(&pShader->shaderInfo);
1487 pShader->id = SVGA_ID_INVALID;
1488 pShader->cid = SVGA_ID_INVALID;
1489 pShader->type = SVGA3D_SHADERTYPE_INVALID;
1490 pShader->cbData = 0;
1491 RTMemFree(pShader->pShaderProgram);
1492 pShader->pShaderProgram = NULL;
1493 pShader->u.pvBackendShader = NULL;
1494
1495 return rc;
1496}
1497
1498
1499static int dxBindShader(PVMSVGA3DSHADER pShader, PVMSVGAMOB pMob, SVGACOTableDXShaderEntry const *pEntry, void const *pvShaderBytecode)
1500{
1501 /* How many bytes the MOB can hold. */
1502 uint32_t const cbMob = vmsvgaR3MobSize(pMob) - pEntry->offsetInBytes;
1503 ASSERT_GUEST_RETURN(cbMob >= pEntry->sizeInBytes, VERR_INVALID_PARAMETER);
1504 AssertReturn(pEntry->sizeInBytes >= 8, VERR_INTERNAL_ERROR); /* Host ensures this in DefineShader. */
1505
1506 int rc = DXShaderParse(pvShaderBytecode, pEntry->sizeInBytes, &pShader->shaderInfo);
1507 if (RT_SUCCESS(rc))
1508 {
1509 /* Get the length of the shader bytecode. */
1510 uint32_t const *pau32Token = (uint32_t *)pvShaderBytecode; /* Tokens */
1511 uint32_t const cToken = pau32Token[1]; /* Length of the shader in tokens. */
1512 ASSERT_GUEST_RETURN(cToken <= pEntry->sizeInBytes / 4, VERR_INVALID_PARAMETER);
1513
1514 pShader->cbData = cToken * 4;
1515
1516 /* Check if the MOB contains SVGA3dDXSignatureHeader and signature entries.
1517 * If they are not there (Linux guest driver does not provide them), then it is fine
1518 * and the signatures generated by DXShaderParse will be used.
1519 */
1520 uint32_t const cbSignaturesMax = cbMob - pShader->cbData; /* How many bytes for signatures are available. */
1521 if (cbSignaturesMax > sizeof(SVGA3dDXSignatureHeader))
1522 {
1523 SVGA3dDXSignatureHeader const *pSignatureHeader = (SVGA3dDXSignatureHeader *)((uint8_t *)pvShaderBytecode + pShader->cbData);
1524 if (pSignatureHeader->headerVersion == SVGADX_SIGNATURE_HEADER_VERSION_0)
1525 {
1526 DEBUG_BREAKPOINT_TEST();
1527 ASSERT_GUEST_RETURN( pSignatureHeader->numInputSignatures <= RT_ELEMENTS(pShader->shaderInfo.aInputSignature)
1528 && pSignatureHeader->numOutputSignatures <= RT_ELEMENTS(pShader->shaderInfo.aOutputSignature)
1529 && pSignatureHeader->numPatchConstantSignatures <= RT_ELEMENTS(pShader->shaderInfo.aPatchConstantSignature),
1530 VERR_INVALID_PARAMETER);
1531
1532 uint32_t const cSignature = pSignatureHeader->numInputSignatures
1533 + pSignatureHeader->numOutputSignatures
1534 + pSignatureHeader->numPatchConstantSignatures;
1535 ASSERT_GUEST_RETURN( cbSignaturesMax - sizeof(SVGA3dDXSignatureHeader)
1536 > cSignature * sizeof(sizeof(SVGA3dDXSignatureEntry)), VERR_INVALID_PARAMETER);
1537
1538 /* Copy to DXShaderInfo. */
1539 uint8_t const *pu8Signatures = (uint8_t *)&pSignatureHeader[1];
1540 pShader->shaderInfo.cInputSignature = pSignatureHeader->numInputSignatures;
1541 memcpy(pShader->shaderInfo.aInputSignature, pu8Signatures, pSignatureHeader->numInputSignatures * sizeof(SVGA3dDXSignatureEntry));
1542
1543 pu8Signatures += pSignatureHeader->numInputSignatures * sizeof(SVGA3dDXSignatureEntry);
1544 pShader->shaderInfo.cOutputSignature = pSignatureHeader->numOutputSignatures;
1545 memcpy(pShader->shaderInfo.aOutputSignature, pu8Signatures, pSignatureHeader->numOutputSignatures * sizeof(SVGA3dDXSignatureEntry));
1546
1547 pu8Signatures += pSignatureHeader->numOutputSignatures * sizeof(SVGA3dDXSignatureEntry);
1548 pShader->shaderInfo.cPatchConstantSignature = pSignatureHeader->numPatchConstantSignatures;
1549 memcpy(pShader->shaderInfo.aPatchConstantSignature, pu8Signatures, pSignatureHeader->numPatchConstantSignatures * sizeof(SVGA3dDXSignatureEntry));
1550 }
1551 }
1552 }
1553
1554 return rc;
1555}
1556
1557
1558int vmsvga3dDXBindShader(PVGASTATECC pThisCC, SVGA3dCmdDXBindShader const *pCmd, PVMSVGAMOB pMob)
1559{
1560 int rc;
1561 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1562 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindShader, VERR_INVALID_STATE);
1563 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1564 AssertReturn(p3dState, VERR_INVALID_STATE);
1565
1566 PVMSVGA3DDXCONTEXT pDXContext;
1567 rc = vmsvga3dDXContextFromCid(p3dState, pCmd->cid, &pDXContext);
1568 AssertRCReturn(rc, rc);
1569
1570 ASSERT_GUEST_RETURN(pCmd->shid < pDXContext->cot.cShader, VERR_INVALID_PARAMETER);
1571 RT_UNTRUSTED_VALIDATED_FENCE();
1572
1573 SVGACOTableDXShaderEntry *pEntry = &pDXContext->cot.paShader[pCmd->shid];
1574 //pEntry->type;
1575 //pEntry->sizeInBytes;
1576 pEntry->offsetInBytes = pCmd->offsetInBytes;
1577 pEntry->mobid = vmsvgaR3MobId(pMob);
1578
1579 if (pMob)
1580 {
1581 /* Bind a mob to the shader. */
1582
1583 /* Create a memory pointer for the MOB, which is accessible by host. */
1584 rc = vmsvgaR3MobBackingStoreCreate(pSvgaR3State, pMob, vmsvgaR3MobSize(pMob));
1585 if (RT_SUCCESS(rc))
1586 {
1587 /* Get pointer to the shader bytecode. This will also verify the offset. */
1588 void const *pvShaderBytecode = vmsvgaR3MobBackingStorePtr(pMob, pEntry->offsetInBytes);
1589 ASSERT_GUEST_RETURN(pvShaderBytecode, VERR_INVALID_PARAMETER);
1590
1591 PVMSVGA3DSHADER pShader = &pDXContext->paShader[pCmd->shid];
1592 Assert( pShader->id == pCmd->shid
1593 && pShader->type == pEntry->type); /* The host ensures this. */
1594
1595 /* Get the shader and optional signatures from the MOB. */
1596 rc = dxBindShader(pShader, pMob, pEntry, pvShaderBytecode);
1597 if (RT_SUCCESS(rc))
1598 rc = pSvgaR3State->pFuncsDX->pfnDXBindShader(pThisCC, pDXContext, pShader, pvShaderBytecode);
1599
1600 if (RT_FAILURE(rc))
1601 {
1602 /** @todo Any cleanup? */
1603 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
1604 }
1605 }
1606 }
1607 else
1608 {
1609 /* Unbind. */
1610 /** @todo Nothing to do here but release the MOB? */
1611 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
1612 }
1613
1614 return rc;
1615}
1616
1617
1618int vmsvga3dDXDefineStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineStreamOutput const *pCmd)
1619{
1620 int rc;
1621 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1622 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutput, VERR_INVALID_STATE);
1623 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1624 AssertReturn(p3dState, VERR_INVALID_STATE);
1625
1626 PVMSVGA3DDXCONTEXT pDXContext;
1627 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1628 AssertRCReturn(rc, rc);
1629
1630 SVGA3dStreamOutputId const soid = pCmd->soid;
1631
1632 ASSERT_GUEST_RETURN(pDXContext->cot.paStreamOutput, VERR_INVALID_STATE);
1633 ASSERT_GUEST_RETURN(soid < pDXContext->cot.cStreamOutput, VERR_INVALID_PARAMETER);
1634 ASSERT_GUEST_RETURN(pCmd->numOutputStreamEntries < SVGA3D_MAX_DX10_STREAMOUT_DECLS, VERR_INVALID_PARAMETER);
1635 RT_UNTRUSTED_VALIDATED_FENCE();
1636
1637 SVGACOTableDXStreamOutputEntry *pEntry = &pDXContext->cot.paStreamOutput[soid];
1638 pEntry->numOutputStreamEntries = pCmd->numOutputStreamEntries;
1639 memcpy(pEntry->decl, pCmd->decl, sizeof(pEntry->decl));
1640 memcpy(pEntry->streamOutputStrideInBytes, pCmd->streamOutputStrideInBytes, sizeof(pEntry->streamOutputStrideInBytes));
1641 pEntry->rasterizedStream = 0; // Apparently invalid in this command: pCmd->rasterizedStream;
1642 pEntry->numOutputStreamStrides = 0;
1643 pEntry->mobid = SVGA_ID_INVALID;
1644 pEntry->offsetInBytes = 0;
1645 pEntry->usesMob = 0;
1646 pEntry->pad0 = 0;
1647 pEntry->pad1 = 0;
1648 RT_ZERO(pEntry->pad2);
1649
1650 rc = pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutput(pThisCC, pDXContext, soid, pEntry);
1651 return rc;
1652}
1653
1654
1655int vmsvga3dDXDestroyStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyStreamOutput const *pCmd)
1656{
1657 int rc;
1658 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1659 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyStreamOutput, VERR_INVALID_STATE);
1660 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1661 AssertReturn(p3dState, VERR_INVALID_STATE);
1662
1663 PVMSVGA3DDXCONTEXT pDXContext;
1664 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1665 AssertRCReturn(rc, rc);
1666
1667 SVGA3dStreamOutputId const soid = pCmd->soid;
1668
1669 ASSERT_GUEST_RETURN(pDXContext->cot.paStreamOutput, VERR_INVALID_STATE);
1670 ASSERT_GUEST_RETURN(soid < pDXContext->cot.cStreamOutput, VERR_INVALID_PARAMETER);
1671 RT_UNTRUSTED_VALIDATED_FENCE();
1672
1673 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyStreamOutput(pThisCC, pDXContext, soid);
1674
1675 SVGACOTableDXStreamOutputEntry *pEntry = &pDXContext->cot.paStreamOutput[soid];
1676 RT_ZERO(*pEntry);
1677 pEntry->mobid = SVGA_ID_INVALID;
1678
1679 return rc;
1680}
1681
1682
1683int vmsvga3dDXSetStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetStreamOutput const *pCmd)
1684{
1685 int rc;
1686 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1687 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetStreamOutput, VERR_INVALID_STATE);
1688 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1689 AssertReturn(p3dState, VERR_INVALID_STATE);
1690
1691 PVMSVGA3DDXCONTEXT pDXContext;
1692 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1693 AssertRCReturn(rc, rc);
1694
1695 SVGA3dStreamOutputId const soid = pCmd->soid;
1696
1697 ASSERT_GUEST_RETURN(pDXContext->cot.paStreamOutput, VERR_INVALID_STATE);
1698 ASSERT_GUEST_RETURN( soid == SVGA_ID_INVALID
1699 || soid < pDXContext->cot.cStreamOutput, VERR_INVALID_PARAMETER);
1700 RT_UNTRUSTED_VALIDATED_FENCE();
1701
1702 rc = pSvgaR3State->pFuncsDX->pfnDXSetStreamOutput(pThisCC, pDXContext, soid);
1703 if (RT_SUCCESS(rc))
1704 pDXContext->svgaDXContext.streamOut.soid = soid;
1705
1706 return rc;
1707}
1708
1709
1710int vmsvga3dDXSetCOTable(PVGASTATECC pThisCC, SVGA3dCmdDXSetCOTable const *pCmd, PVMSVGAMOB pMob)
1711{
1712 int rc;
1713 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1714 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetCOTable, VERR_INVALID_STATE);
1715 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1716 AssertReturn(p3dState, VERR_INVALID_STATE);
1717
1718 PVMSVGA3DDXCONTEXT pDXContext;
1719 rc = vmsvga3dDXContextFromCid(p3dState, pCmd->cid, &pDXContext);
1720 AssertRCReturn(rc, rc);
1721 RT_UNTRUSTED_VALIDATED_FENCE();
1722
1723 ASSERT_GUEST_RETURN(pCmd->type < RT_ELEMENTS(pDXContext->aCOTMobs), VERR_INVALID_PARAMETER);
1724 RT_UNTRUSTED_VALIDATED_FENCE();
1725
1726 uint32_t validSizeInBytes;
1727 uint32_t cbCOT;
1728 if (pMob)
1729 {
1730 /* Bind a mob to the COTable. */
1731 validSizeInBytes = pCmd->validSizeInBytes;
1732 cbCOT = vmsvgaR3MobSize(pMob);
1733
1734 ASSERT_GUEST_RETURN(validSizeInBytes <= cbCOT, VERR_INVALID_PARAMETER);
1735 RT_UNTRUSTED_VALIDATED_FENCE();
1736
1737 /* Create a memory pointer, which is accessible by host. */
1738 rc = vmsvgaR3MobBackingStoreCreate(pSvgaR3State, pMob, validSizeInBytes);
1739 }
1740 else
1741 {
1742 /* Unbind. */
1743 validSizeInBytes = 0;
1744 cbCOT = 0;
1745 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pDXContext->aCOTMobs[pCmd->type]);
1746 }
1747
1748 uint32_t cEntries = 0;
1749 uint32_t cValidEntries = 0;
1750 if (RT_SUCCESS(rc))
1751 {
1752 static uint32_t const s_acbEntry[SVGA_COTABLE_MAX] =
1753 {
1754 sizeof(SVGACOTableDXRTViewEntry),
1755 sizeof(SVGACOTableDXDSViewEntry),
1756 sizeof(SVGACOTableDXSRViewEntry),
1757 sizeof(SVGACOTableDXElementLayoutEntry),
1758 sizeof(SVGACOTableDXBlendStateEntry),
1759 sizeof(SVGACOTableDXDepthStencilEntry),
1760 sizeof(SVGACOTableDXRasterizerStateEntry),
1761 sizeof(SVGACOTableDXSamplerEntry),
1762 sizeof(SVGACOTableDXStreamOutputEntry),
1763 sizeof(SVGACOTableDXQueryEntry),
1764 sizeof(SVGACOTableDXShaderEntry),
1765 sizeof(SVGACOTableDXUAViewEntry),
1766 };
1767
1768 cEntries = cbCOT / s_acbEntry[pCmd->type];
1769 cValidEntries = validSizeInBytes / s_acbEntry[pCmd->type];
1770 }
1771
1772 if (RT_SUCCESS(rc))
1773 {
1774 pDXContext->aCOTMobs[pCmd->type] = pMob;
1775
1776 void *pvCOT = vmsvgaR3MobBackingStorePtr(pMob, 0);
1777 switch (pCmd->type)
1778 {
1779 case SVGA_COTABLE_RTVIEW:
1780 pDXContext->cot.paRTView = (SVGACOTableDXRTViewEntry *)pvCOT;
1781 pDXContext->cot.cRTView = cEntries;
1782 break;
1783 case SVGA_COTABLE_DSVIEW:
1784 pDXContext->cot.paDSView = (SVGACOTableDXDSViewEntry *)pvCOT;
1785 pDXContext->cot.cDSView = cEntries;
1786 break;
1787 case SVGA_COTABLE_SRVIEW:
1788 pDXContext->cot.paSRView = (SVGACOTableDXSRViewEntry *)pvCOT;
1789 pDXContext->cot.cSRView = cEntries;
1790 break;
1791 case SVGA_COTABLE_ELEMENTLAYOUT:
1792 pDXContext->cot.paElementLayout = (SVGACOTableDXElementLayoutEntry *)pvCOT;
1793 pDXContext->cot.cElementLayout = cEntries;
1794 break;
1795 case SVGA_COTABLE_BLENDSTATE:
1796 pDXContext->cot.paBlendState = (SVGACOTableDXBlendStateEntry *)pvCOT;
1797 pDXContext->cot.cBlendState = cEntries;
1798 break;
1799 case SVGA_COTABLE_DEPTHSTENCIL:
1800 pDXContext->cot.paDepthStencil = (SVGACOTableDXDepthStencilEntry *)pvCOT;
1801 pDXContext->cot.cDepthStencil = cEntries;
1802 break;
1803 case SVGA_COTABLE_RASTERIZERSTATE:
1804 pDXContext->cot.paRasterizerState = (SVGACOTableDXRasterizerStateEntry *)pvCOT;
1805 pDXContext->cot.cRasterizerState = cEntries;
1806 break;
1807 case SVGA_COTABLE_SAMPLER:
1808 pDXContext->cot.paSampler = (SVGACOTableDXSamplerEntry *)pvCOT;
1809 pDXContext->cot.cSampler = cEntries;
1810 break;
1811 case SVGA_COTABLE_STREAMOUTPUT:
1812 pDXContext->cot.paStreamOutput = (SVGACOTableDXStreamOutputEntry *)pvCOT;
1813 pDXContext->cot.cStreamOutput = cEntries;
1814 break;
1815 case SVGA_COTABLE_DXQUERY:
1816 pDXContext->cot.paQuery = (SVGACOTableDXQueryEntry *)pvCOT;
1817 pDXContext->cot.cQuery = cEntries;
1818 break;
1819 case SVGA_COTABLE_DXSHADER:
1820 pDXContext->cot.paShader = (SVGACOTableDXShaderEntry *)pvCOT;
1821 pDXContext->cot.cShader = cEntries;
1822
1823 /* Create host array for information about shaders. */
1824 RTMemFree(pDXContext->paShader);
1825 pDXContext->paShader = NULL;
1826
1827 if (pDXContext->cot.cShader)
1828 {
1829 pDXContext->paShader = (PVMSVGA3DSHADER)RTMemAllocZ(pDXContext->cot.cShader * sizeof(VMSVGA3DSHADER));
1830 AssertReturn(pDXContext->paShader, VERR_NO_MEMORY);
1831 for (uint32_t i = 0; i < pDXContext->cot.cShader; ++i)
1832 pDXContext->paShader[i].id = SVGA_ID_INVALID;
1833 }
1834 break;
1835 case SVGA_COTABLE_UAVIEW:
1836 pDXContext->cot.paUAView = (SVGACOTableDXUAViewEntry *)pvCOT;
1837 pDXContext->cot.cUAView = cEntries;
1838 break;
1839 case SVGA_COTABLE_MAX: break; /* Compiler warning */
1840 }
1841 }
1842 else
1843 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
1844
1845 /* Notify the backend. */
1846 if (RT_SUCCESS(rc))
1847 rc = pSvgaR3State->pFuncsDX->pfnDXSetCOTable(pThisCC, pDXContext, pCmd->type, cValidEntries);
1848
1849 return rc;
1850}
1851
1852
1853int vmsvga3dDXReadbackCOTable(PVGASTATECC pThisCC, SVGA3dCmdDXReadbackCOTable const *pCmd)
1854{
1855 int rc;
1856 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1857 AssertReturn(pSvgaR3State->pFuncsDX, VERR_INVALID_STATE);
1858 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1859 AssertReturn(p3dState, VERR_INVALID_STATE);
1860
1861 PVMSVGA3DDXCONTEXT pDXContext;
1862 rc = vmsvga3dDXContextFromCid(p3dState, pCmd->cid, &pDXContext);
1863 AssertRCReturn(rc, rc);
1864 RT_UNTRUSTED_VALIDATED_FENCE();
1865
1866 ASSERT_GUEST_RETURN(pCmd->type < RT_ELEMENTS(pDXContext->aCOTMobs), VERR_INVALID_PARAMETER);
1867 RT_UNTRUSTED_VALIDATED_FENCE();
1868
1869 PVMSVGAMOB pMob = pDXContext->aCOTMobs[pCmd->type];
1870 rc = vmsvgaR3MobBackingStoreWriteToGuest(pSvgaR3State, pMob);
1871 return rc;
1872}
1873
1874
1875int vmsvga3dDXBufferCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
1876{
1877 int rc;
1878 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1879 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBufferCopy, VERR_INVALID_STATE);
1880 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1881 AssertReturn(p3dState, VERR_INVALID_STATE);
1882
1883 PVMSVGA3DDXCONTEXT pDXContext;
1884 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1885 AssertRCReturn(rc, rc);
1886
1887 rc = pSvgaR3State->pFuncsDX->pfnDXBufferCopy(pThisCC, pDXContext);
1888 return rc;
1889}
1890
1891
1892int vmsvga3dDXSurfaceCopyAndReadback(PVGASTATECC pThisCC, uint32_t idDXContext)
1893{
1894 int rc;
1895 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1896 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSurfaceCopyAndReadback, VERR_INVALID_STATE);
1897 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1898 AssertReturn(p3dState, VERR_INVALID_STATE);
1899
1900 PVMSVGA3DDXCONTEXT pDXContext;
1901 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1902 AssertRCReturn(rc, rc);
1903
1904 rc = pSvgaR3State->pFuncsDX->pfnDXSurfaceCopyAndReadback(pThisCC, pDXContext);
1905 return rc;
1906}
1907
1908
1909int vmsvga3dDXMoveQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
1910{
1911 int rc;
1912 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1913 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXMoveQuery, VERR_INVALID_STATE);
1914 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1915 AssertReturn(p3dState, VERR_INVALID_STATE);
1916
1917 PVMSVGA3DDXCONTEXT pDXContext;
1918 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1919 AssertRCReturn(rc, rc);
1920
1921 rc = pSvgaR3State->pFuncsDX->pfnDXMoveQuery(pThisCC, pDXContext);
1922 return rc;
1923}
1924
1925
1926int vmsvga3dDXBindAllQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
1927{
1928 int rc;
1929 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1930 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindAllQuery, VERR_INVALID_STATE);
1931 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1932 AssertReturn(p3dState, VERR_INVALID_STATE);
1933
1934 PVMSVGA3DDXCONTEXT pDXContext;
1935 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1936 AssertRCReturn(rc, rc);
1937
1938 rc = pSvgaR3State->pFuncsDX->pfnDXBindAllQuery(pThisCC, pDXContext);
1939 return rc;
1940}
1941
1942
1943int vmsvga3dDXReadbackAllQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
1944{
1945 int rc;
1946 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1947 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXReadbackAllQuery, VERR_INVALID_STATE);
1948 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1949 AssertReturn(p3dState, VERR_INVALID_STATE);
1950
1951 PVMSVGA3DDXCONTEXT pDXContext;
1952 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1953 AssertRCReturn(rc, rc);
1954
1955 rc = pSvgaR3State->pFuncsDX->pfnDXReadbackAllQuery(pThisCC, pDXContext);
1956 return rc;
1957}
1958
1959
1960int vmsvga3dDXMobFence64(PVGASTATECC pThisCC, uint32_t idDXContext)
1961{
1962 int rc;
1963 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1964 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXMobFence64, VERR_INVALID_STATE);
1965 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1966 AssertReturn(p3dState, VERR_INVALID_STATE);
1967
1968 PVMSVGA3DDXCONTEXT pDXContext;
1969 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1970 AssertRCReturn(rc, rc);
1971
1972 rc = pSvgaR3State->pFuncsDX->pfnDXMobFence64(pThisCC, pDXContext);
1973 return rc;
1974}
1975
1976
1977int vmsvga3dDXBindAllShader(PVGASTATECC pThisCC, uint32_t idDXContext)
1978{
1979 int rc;
1980 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1981 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindAllShader, VERR_INVALID_STATE);
1982 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1983 AssertReturn(p3dState, VERR_INVALID_STATE);
1984
1985 PVMSVGA3DDXCONTEXT pDXContext;
1986 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1987 AssertRCReturn(rc, rc);
1988
1989 rc = pSvgaR3State->pFuncsDX->pfnDXBindAllShader(pThisCC, pDXContext);
1990 return rc;
1991}
1992
1993
1994int vmsvga3dDXHint(PVGASTATECC pThisCC, uint32_t idDXContext)
1995{
1996 int rc;
1997 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1998 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXHint, VERR_INVALID_STATE);
1999 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2000 AssertReturn(p3dState, VERR_INVALID_STATE);
2001
2002 PVMSVGA3DDXCONTEXT pDXContext;
2003 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2004 AssertRCReturn(rc, rc);
2005
2006 rc = pSvgaR3State->pFuncsDX->pfnDXHint(pThisCC, pDXContext);
2007 return rc;
2008}
2009
2010
2011int vmsvga3dDXBufferUpdate(PVGASTATECC pThisCC, uint32_t idDXContext)
2012{
2013 int rc;
2014 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2015 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBufferUpdate, VERR_INVALID_STATE);
2016 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2017 AssertReturn(p3dState, VERR_INVALID_STATE);
2018
2019 PVMSVGA3DDXCONTEXT pDXContext;
2020 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2021 AssertRCReturn(rc, rc);
2022
2023 rc = pSvgaR3State->pFuncsDX->pfnDXBufferUpdate(pThisCC, pDXContext);
2024 return rc;
2025}
2026
2027
2028int vmsvga3dDXSetVSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2029{
2030 int rc;
2031 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2032 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetVSConstantBufferOffset, VERR_INVALID_STATE);
2033 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2034 AssertReturn(p3dState, VERR_INVALID_STATE);
2035
2036 PVMSVGA3DDXCONTEXT pDXContext;
2037 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2038 AssertRCReturn(rc, rc);
2039
2040 rc = pSvgaR3State->pFuncsDX->pfnDXSetVSConstantBufferOffset(pThisCC, pDXContext);
2041 return rc;
2042}
2043
2044
2045int vmsvga3dDXSetPSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2046{
2047 int rc;
2048 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2049 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetPSConstantBufferOffset, VERR_INVALID_STATE);
2050 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2051 AssertReturn(p3dState, VERR_INVALID_STATE);
2052
2053 PVMSVGA3DDXCONTEXT pDXContext;
2054 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2055 AssertRCReturn(rc, rc);
2056
2057 rc = pSvgaR3State->pFuncsDX->pfnDXSetPSConstantBufferOffset(pThisCC, pDXContext);
2058 return rc;
2059}
2060
2061
2062int vmsvga3dDXSetGSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2063{
2064 int rc;
2065 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2066 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetGSConstantBufferOffset, VERR_INVALID_STATE);
2067 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2068 AssertReturn(p3dState, VERR_INVALID_STATE);
2069
2070 PVMSVGA3DDXCONTEXT pDXContext;
2071 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2072 AssertRCReturn(rc, rc);
2073
2074 rc = pSvgaR3State->pFuncsDX->pfnDXSetGSConstantBufferOffset(pThisCC, pDXContext);
2075 return rc;
2076}
2077
2078
2079int vmsvga3dDXSetHSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2080{
2081 int rc;
2082 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2083 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetHSConstantBufferOffset, VERR_INVALID_STATE);
2084 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2085 AssertReturn(p3dState, VERR_INVALID_STATE);
2086
2087 PVMSVGA3DDXCONTEXT pDXContext;
2088 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2089 AssertRCReturn(rc, rc);
2090
2091 rc = pSvgaR3State->pFuncsDX->pfnDXSetHSConstantBufferOffset(pThisCC, pDXContext);
2092 return rc;
2093}
2094
2095
2096int vmsvga3dDXSetDSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2097{
2098 int rc;
2099 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2100 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetDSConstantBufferOffset, VERR_INVALID_STATE);
2101 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2102 AssertReturn(p3dState, VERR_INVALID_STATE);
2103
2104 PVMSVGA3DDXCONTEXT pDXContext;
2105 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2106 AssertRCReturn(rc, rc);
2107
2108 rc = pSvgaR3State->pFuncsDX->pfnDXSetDSConstantBufferOffset(pThisCC, pDXContext);
2109 return rc;
2110}
2111
2112
2113int vmsvga3dDXSetCSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2114{
2115 int rc;
2116 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2117 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetCSConstantBufferOffset, VERR_INVALID_STATE);
2118 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2119 AssertReturn(p3dState, VERR_INVALID_STATE);
2120
2121 PVMSVGA3DDXCONTEXT pDXContext;
2122 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2123 AssertRCReturn(rc, rc);
2124
2125 rc = pSvgaR3State->pFuncsDX->pfnDXSetCSConstantBufferOffset(pThisCC, pDXContext);
2126 return rc;
2127}
2128
2129
2130int vmsvga3dDXCondBindAllShader(PVGASTATECC pThisCC, uint32_t idDXContext)
2131{
2132 int rc;
2133 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2134 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXCondBindAllShader, VERR_INVALID_STATE);
2135 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2136 AssertReturn(p3dState, VERR_INVALID_STATE);
2137
2138 PVMSVGA3DDXCONTEXT pDXContext;
2139 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2140 AssertRCReturn(rc, rc);
2141
2142 rc = pSvgaR3State->pFuncsDX->pfnDXCondBindAllShader(pThisCC, pDXContext);
2143 return rc;
2144}
2145
2146
2147int vmsvga3dScreenCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2148{
2149 int rc;
2150 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2151 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnScreenCopy, VERR_INVALID_STATE);
2152 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2153 AssertReturn(p3dState, VERR_INVALID_STATE);
2154
2155 PVMSVGA3DDXCONTEXT pDXContext;
2156 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2157 AssertRCReturn(rc, rc);
2158
2159 rc = pSvgaR3State->pFuncsDX->pfnScreenCopy(pThisCC, pDXContext);
2160 return rc;
2161}
2162
2163
2164int vmsvga3dGrowOTable(PVGASTATECC pThisCC, uint32_t idDXContext)
2165{
2166 int rc;
2167 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2168 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnGrowOTable, VERR_INVALID_STATE);
2169 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2170 AssertReturn(p3dState, VERR_INVALID_STATE);
2171
2172 PVMSVGA3DDXCONTEXT pDXContext;
2173 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2174 AssertRCReturn(rc, rc);
2175
2176 rc = pSvgaR3State->pFuncsDX->pfnGrowOTable(pThisCC, pDXContext);
2177 return rc;
2178}
2179
2180
2181int vmsvga3dDXGrowCOTable(PVGASTATECC pThisCC, uint32_t idDXContext)
2182{
2183 int rc;
2184 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2185 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXGrowCOTable, VERR_INVALID_STATE);
2186 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2187 AssertReturn(p3dState, VERR_INVALID_STATE);
2188
2189 PVMSVGA3DDXCONTEXT pDXContext;
2190 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2191 AssertRCReturn(rc, rc);
2192
2193 rc = pSvgaR3State->pFuncsDX->pfnDXGrowCOTable(pThisCC, pDXContext);
2194 return rc;
2195}
2196
2197
2198int vmsvga3dIntraSurfaceCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2199{
2200 int rc;
2201 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2202 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnIntraSurfaceCopy, VERR_INVALID_STATE);
2203 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2204 AssertReturn(p3dState, VERR_INVALID_STATE);
2205
2206 PVMSVGA3DDXCONTEXT pDXContext;
2207 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2208 AssertRCReturn(rc, rc);
2209
2210 rc = pSvgaR3State->pFuncsDX->pfnIntraSurfaceCopy(pThisCC, pDXContext);
2211 return rc;
2212}
2213
2214
2215int vmsvga3dDefineGBSurface_v3(PVGASTATECC pThisCC, uint32_t idDXContext)
2216{
2217 int rc;
2218 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2219 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v3, VERR_INVALID_STATE);
2220 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2221 AssertReturn(p3dState, VERR_INVALID_STATE);
2222
2223 PVMSVGA3DDXCONTEXT pDXContext;
2224 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2225 AssertRCReturn(rc, rc);
2226
2227 rc = pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v3(pThisCC, pDXContext);
2228 return rc;
2229}
2230
2231
2232int vmsvga3dDXResolveCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2233{
2234 int rc;
2235 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2236 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXResolveCopy, VERR_INVALID_STATE);
2237 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2238 AssertReturn(p3dState, VERR_INVALID_STATE);
2239
2240 PVMSVGA3DDXCONTEXT pDXContext;
2241 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2242 AssertRCReturn(rc, rc);
2243
2244 rc = pSvgaR3State->pFuncsDX->pfnDXResolveCopy(pThisCC, pDXContext);
2245 return rc;
2246}
2247
2248
2249int vmsvga3dDXPredResolveCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2250{
2251 int rc;
2252 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2253 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredResolveCopy, VERR_INVALID_STATE);
2254 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2255 AssertReturn(p3dState, VERR_INVALID_STATE);
2256
2257 PVMSVGA3DDXCONTEXT pDXContext;
2258 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2259 AssertRCReturn(rc, rc);
2260
2261 rc = pSvgaR3State->pFuncsDX->pfnDXPredResolveCopy(pThisCC, pDXContext);
2262 return rc;
2263}
2264
2265
2266int vmsvga3dDXPredConvertRegion(PVGASTATECC pThisCC, uint32_t idDXContext)
2267{
2268 int rc;
2269 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2270 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredConvertRegion, VERR_INVALID_STATE);
2271 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2272 AssertReturn(p3dState, VERR_INVALID_STATE);
2273
2274 PVMSVGA3DDXCONTEXT pDXContext;
2275 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2276 AssertRCReturn(rc, rc);
2277
2278 rc = pSvgaR3State->pFuncsDX->pfnDXPredConvertRegion(pThisCC, pDXContext);
2279 return rc;
2280}
2281
2282
2283int vmsvga3dDXPredConvert(PVGASTATECC pThisCC, uint32_t idDXContext)
2284{
2285 int rc;
2286 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2287 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredConvert, VERR_INVALID_STATE);
2288 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2289 AssertReturn(p3dState, VERR_INVALID_STATE);
2290
2291 PVMSVGA3DDXCONTEXT pDXContext;
2292 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2293 AssertRCReturn(rc, rc);
2294
2295 rc = pSvgaR3State->pFuncsDX->pfnDXPredConvert(pThisCC, pDXContext);
2296 return rc;
2297}
2298
2299
2300int vmsvga3dWholeSurfaceCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2301{
2302 int rc;
2303 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2304 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnWholeSurfaceCopy, VERR_INVALID_STATE);
2305 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2306 AssertReturn(p3dState, VERR_INVALID_STATE);
2307
2308 PVMSVGA3DDXCONTEXT pDXContext;
2309 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2310 AssertRCReturn(rc, rc);
2311
2312 rc = pSvgaR3State->pFuncsDX->pfnWholeSurfaceCopy(pThisCC, pDXContext);
2313 return rc;
2314}
2315
2316
2317int vmsvga3dDXDefineUAView(PVGASTATECC pThisCC, uint32_t idDXContext)
2318{
2319 int rc;
2320 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2321 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineUAView, VERR_INVALID_STATE);
2322 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2323 AssertReturn(p3dState, VERR_INVALID_STATE);
2324
2325 PVMSVGA3DDXCONTEXT pDXContext;
2326 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2327 AssertRCReturn(rc, rc);
2328
2329 rc = pSvgaR3State->pFuncsDX->pfnDXDefineUAView(pThisCC, pDXContext);
2330 return rc;
2331}
2332
2333
2334int vmsvga3dDXDestroyUAView(PVGASTATECC pThisCC, uint32_t idDXContext)
2335{
2336 int rc;
2337 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2338 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyUAView, VERR_INVALID_STATE);
2339 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2340 AssertReturn(p3dState, VERR_INVALID_STATE);
2341
2342 PVMSVGA3DDXCONTEXT pDXContext;
2343 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2344 AssertRCReturn(rc, rc);
2345
2346 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyUAView(pThisCC, pDXContext);
2347 return rc;
2348}
2349
2350
2351int vmsvga3dDXClearUAViewUint(PVGASTATECC pThisCC, uint32_t idDXContext)
2352{
2353 int rc;
2354 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2355 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearUAViewUint, VERR_INVALID_STATE);
2356 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2357 AssertReturn(p3dState, VERR_INVALID_STATE);
2358
2359 PVMSVGA3DDXCONTEXT pDXContext;
2360 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2361 AssertRCReturn(rc, rc);
2362
2363 rc = pSvgaR3State->pFuncsDX->pfnDXClearUAViewUint(pThisCC, pDXContext);
2364 return rc;
2365}
2366
2367
2368int vmsvga3dDXClearUAViewFloat(PVGASTATECC pThisCC, uint32_t idDXContext)
2369{
2370 int rc;
2371 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2372 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearUAViewFloat, VERR_INVALID_STATE);
2373 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2374 AssertReturn(p3dState, VERR_INVALID_STATE);
2375
2376 PVMSVGA3DDXCONTEXT pDXContext;
2377 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2378 AssertRCReturn(rc, rc);
2379
2380 rc = pSvgaR3State->pFuncsDX->pfnDXClearUAViewFloat(pThisCC, pDXContext);
2381 return rc;
2382}
2383
2384
2385int vmsvga3dDXCopyStructureCount(PVGASTATECC pThisCC, uint32_t idDXContext)
2386{
2387 int rc;
2388 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2389 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXCopyStructureCount, VERR_INVALID_STATE);
2390 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2391 AssertReturn(p3dState, VERR_INVALID_STATE);
2392
2393 PVMSVGA3DDXCONTEXT pDXContext;
2394 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2395 AssertRCReturn(rc, rc);
2396
2397 rc = pSvgaR3State->pFuncsDX->pfnDXCopyStructureCount(pThisCC, pDXContext);
2398 return rc;
2399}
2400
2401
2402int vmsvga3dDXSetUAViews(PVGASTATECC pThisCC, uint32_t idDXContext)
2403{
2404 int rc;
2405 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2406 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetUAViews, VERR_INVALID_STATE);
2407 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2408 AssertReturn(p3dState, VERR_INVALID_STATE);
2409
2410 PVMSVGA3DDXCONTEXT pDXContext;
2411 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2412 AssertRCReturn(rc, rc);
2413
2414 rc = pSvgaR3State->pFuncsDX->pfnDXSetUAViews(pThisCC, pDXContext);
2415 return rc;
2416}
2417
2418
2419int vmsvga3dDXDrawIndexedInstancedIndirect(PVGASTATECC pThisCC, uint32_t idDXContext)
2420{
2421 int rc;
2422 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2423 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstancedIndirect, VERR_INVALID_STATE);
2424 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2425 AssertReturn(p3dState, VERR_INVALID_STATE);
2426
2427 PVMSVGA3DDXCONTEXT pDXContext;
2428 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2429 AssertRCReturn(rc, rc);
2430
2431 rc = pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstancedIndirect(pThisCC, pDXContext);
2432 return rc;
2433}
2434
2435
2436int vmsvga3dDXDrawInstancedIndirect(PVGASTATECC pThisCC, uint32_t idDXContext)
2437{
2438 int rc;
2439 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2440 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawInstancedIndirect, VERR_INVALID_STATE);
2441 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2442 AssertReturn(p3dState, VERR_INVALID_STATE);
2443
2444 PVMSVGA3DDXCONTEXT pDXContext;
2445 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2446 AssertRCReturn(rc, rc);
2447
2448 rc = pSvgaR3State->pFuncsDX->pfnDXDrawInstancedIndirect(pThisCC, pDXContext);
2449 return rc;
2450}
2451
2452
2453int vmsvga3dDXDispatch(PVGASTATECC pThisCC, uint32_t idDXContext)
2454{
2455 int rc;
2456 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2457 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDispatch, VERR_INVALID_STATE);
2458 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2459 AssertReturn(p3dState, VERR_INVALID_STATE);
2460
2461 PVMSVGA3DDXCONTEXT pDXContext;
2462 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2463 AssertRCReturn(rc, rc);
2464
2465 rc = pSvgaR3State->pFuncsDX->pfnDXDispatch(pThisCC, pDXContext);
2466 return rc;
2467}
2468
2469
2470int vmsvga3dDXDispatchIndirect(PVGASTATECC pThisCC, uint32_t idDXContext)
2471{
2472 int rc;
2473 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2474 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDispatchIndirect, VERR_INVALID_STATE);
2475 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2476 AssertReturn(p3dState, VERR_INVALID_STATE);
2477
2478 PVMSVGA3DDXCONTEXT pDXContext;
2479 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2480 AssertRCReturn(rc, rc);
2481
2482 rc = pSvgaR3State->pFuncsDX->pfnDXDispatchIndirect(pThisCC, pDXContext);
2483 return rc;
2484}
2485
2486
2487int vmsvga3dWriteZeroSurface(PVGASTATECC pThisCC, uint32_t idDXContext)
2488{
2489 int rc;
2490 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2491 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnWriteZeroSurface, VERR_INVALID_STATE);
2492 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2493 AssertReturn(p3dState, VERR_INVALID_STATE);
2494
2495 PVMSVGA3DDXCONTEXT pDXContext;
2496 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2497 AssertRCReturn(rc, rc);
2498
2499 rc = pSvgaR3State->pFuncsDX->pfnWriteZeroSurface(pThisCC, pDXContext);
2500 return rc;
2501}
2502
2503
2504int vmsvga3dHintZeroSurface(PVGASTATECC pThisCC, uint32_t idDXContext)
2505{
2506 int rc;
2507 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2508 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnHintZeroSurface, VERR_INVALID_STATE);
2509 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2510 AssertReturn(p3dState, VERR_INVALID_STATE);
2511
2512 PVMSVGA3DDXCONTEXT pDXContext;
2513 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2514 AssertRCReturn(rc, rc);
2515
2516 rc = pSvgaR3State->pFuncsDX->pfnHintZeroSurface(pThisCC, pDXContext);
2517 return rc;
2518}
2519
2520
2521int vmsvga3dDXTransferToBuffer(PVGASTATECC pThisCC, uint32_t idDXContext)
2522{
2523 int rc;
2524 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2525 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXTransferToBuffer, VERR_INVALID_STATE);
2526 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2527 AssertReturn(p3dState, VERR_INVALID_STATE);
2528
2529 PVMSVGA3DDXCONTEXT pDXContext;
2530 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2531 AssertRCReturn(rc, rc);
2532
2533 rc = pSvgaR3State->pFuncsDX->pfnDXTransferToBuffer(pThisCC, pDXContext);
2534 return rc;
2535}
2536
2537
2538int vmsvga3dDXSetStructureCount(PVGASTATECC pThisCC, uint32_t idDXContext)
2539{
2540 int rc;
2541 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2542 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetStructureCount, VERR_INVALID_STATE);
2543 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2544 AssertReturn(p3dState, VERR_INVALID_STATE);
2545
2546 PVMSVGA3DDXCONTEXT pDXContext;
2547 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2548 AssertRCReturn(rc, rc);
2549
2550 rc = pSvgaR3State->pFuncsDX->pfnDXSetStructureCount(pThisCC, pDXContext);
2551 return rc;
2552}
2553
2554
2555int vmsvga3dLogicOpsBitBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
2556{
2557 int rc;
2558 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2559 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsBitBlt, VERR_INVALID_STATE);
2560 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2561 AssertReturn(p3dState, VERR_INVALID_STATE);
2562
2563 PVMSVGA3DDXCONTEXT pDXContext;
2564 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2565 AssertRCReturn(rc, rc);
2566
2567 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsBitBlt(pThisCC, pDXContext);
2568 return rc;
2569}
2570
2571
2572int vmsvga3dLogicOpsTransBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
2573{
2574 int rc;
2575 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2576 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsTransBlt, VERR_INVALID_STATE);
2577 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2578 AssertReturn(p3dState, VERR_INVALID_STATE);
2579
2580 PVMSVGA3DDXCONTEXT pDXContext;
2581 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2582 AssertRCReturn(rc, rc);
2583
2584 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsTransBlt(pThisCC, pDXContext);
2585 return rc;
2586}
2587
2588
2589int vmsvga3dLogicOpsStretchBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
2590{
2591 int rc;
2592 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2593 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsStretchBlt, VERR_INVALID_STATE);
2594 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2595 AssertReturn(p3dState, VERR_INVALID_STATE);
2596
2597 PVMSVGA3DDXCONTEXT pDXContext;
2598 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2599 AssertRCReturn(rc, rc);
2600
2601 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsStretchBlt(pThisCC, pDXContext);
2602 return rc;
2603}
2604
2605
2606int vmsvga3dLogicOpsColorFill(PVGASTATECC pThisCC, uint32_t idDXContext)
2607{
2608 int rc;
2609 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2610 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsColorFill, VERR_INVALID_STATE);
2611 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2612 AssertReturn(p3dState, VERR_INVALID_STATE);
2613
2614 PVMSVGA3DDXCONTEXT pDXContext;
2615 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2616 AssertRCReturn(rc, rc);
2617
2618 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsColorFill(pThisCC, pDXContext);
2619 return rc;
2620}
2621
2622
2623int vmsvga3dLogicOpsAlphaBlend(PVGASTATECC pThisCC, uint32_t idDXContext)
2624{
2625 int rc;
2626 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2627 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsAlphaBlend, VERR_INVALID_STATE);
2628 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2629 AssertReturn(p3dState, VERR_INVALID_STATE);
2630
2631 PVMSVGA3DDXCONTEXT pDXContext;
2632 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2633 AssertRCReturn(rc, rc);
2634
2635 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsAlphaBlend(pThisCC, pDXContext);
2636 return rc;
2637}
2638
2639
2640int vmsvga3dLogicOpsClearTypeBlend(PVGASTATECC pThisCC, uint32_t idDXContext)
2641{
2642 int rc;
2643 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2644 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsClearTypeBlend, VERR_INVALID_STATE);
2645 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2646 AssertReturn(p3dState, VERR_INVALID_STATE);
2647
2648 PVMSVGA3DDXCONTEXT pDXContext;
2649 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2650 AssertRCReturn(rc, rc);
2651
2652 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsClearTypeBlend(pThisCC, pDXContext);
2653 return rc;
2654}
2655
2656
2657int vmsvga3dDefineGBSurface_v4(PVGASTATECC pThisCC, uint32_t idDXContext)
2658{
2659 int rc;
2660 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2661 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v4, VERR_INVALID_STATE);
2662 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2663 AssertReturn(p3dState, VERR_INVALID_STATE);
2664
2665 PVMSVGA3DDXCONTEXT pDXContext;
2666 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2667 AssertRCReturn(rc, rc);
2668
2669 rc = pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v4(pThisCC, pDXContext);
2670 return rc;
2671}
2672
2673
2674int vmsvga3dDXSetCSUAViews(PVGASTATECC pThisCC, uint32_t idDXContext)
2675{
2676 int rc;
2677 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2678 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetCSUAViews, VERR_INVALID_STATE);
2679 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2680 AssertReturn(p3dState, VERR_INVALID_STATE);
2681
2682 PVMSVGA3DDXCONTEXT pDXContext;
2683 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2684 AssertRCReturn(rc, rc);
2685
2686 rc = pSvgaR3State->pFuncsDX->pfnDXSetCSUAViews(pThisCC, pDXContext);
2687 return rc;
2688}
2689
2690
2691int vmsvga3dDXSetMinLOD(PVGASTATECC pThisCC, uint32_t idDXContext)
2692{
2693 int rc;
2694 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2695 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetMinLOD, VERR_INVALID_STATE);
2696 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2697 AssertReturn(p3dState, VERR_INVALID_STATE);
2698
2699 PVMSVGA3DDXCONTEXT pDXContext;
2700 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2701 AssertRCReturn(rc, rc);
2702
2703 rc = pSvgaR3State->pFuncsDX->pfnDXSetMinLOD(pThisCC, pDXContext);
2704 return rc;
2705}
2706
2707
2708int vmsvga3dDXDefineStreamOutputWithMob(PVGASTATECC pThisCC, uint32_t idDXContext)
2709{
2710 int rc;
2711 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2712 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutputWithMob, VERR_INVALID_STATE);
2713 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2714 AssertReturn(p3dState, VERR_INVALID_STATE);
2715
2716 PVMSVGA3DDXCONTEXT pDXContext;
2717 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2718 AssertRCReturn(rc, rc);
2719
2720 rc = pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutputWithMob(pThisCC, pDXContext);
2721 return rc;
2722}
2723
2724
2725int vmsvga3dDXSetShaderIface(PVGASTATECC pThisCC, uint32_t idDXContext)
2726{
2727 int rc;
2728 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2729 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetShaderIface, VERR_INVALID_STATE);
2730 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2731 AssertReturn(p3dState, VERR_INVALID_STATE);
2732
2733 PVMSVGA3DDXCONTEXT pDXContext;
2734 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2735 AssertRCReturn(rc, rc);
2736
2737 rc = pSvgaR3State->pFuncsDX->pfnDXSetShaderIface(pThisCC, pDXContext);
2738 return rc;
2739}
2740
2741
2742int vmsvga3dDXBindStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext)
2743{
2744 int rc;
2745 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2746 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindStreamOutput, VERR_INVALID_STATE);
2747 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2748 AssertReturn(p3dState, VERR_INVALID_STATE);
2749
2750 PVMSVGA3DDXCONTEXT pDXContext;
2751 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2752 AssertRCReturn(rc, rc);
2753
2754 rc = pSvgaR3State->pFuncsDX->pfnDXBindStreamOutput(pThisCC, pDXContext);
2755 return rc;
2756}
2757
2758
2759int vmsvga3dSurfaceStretchBltNonMSToMS(PVGASTATECC pThisCC, uint32_t idDXContext)
2760{
2761 int rc;
2762 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2763 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnSurfaceStretchBltNonMSToMS, VERR_INVALID_STATE);
2764 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2765 AssertReturn(p3dState, VERR_INVALID_STATE);
2766
2767 PVMSVGA3DDXCONTEXT pDXContext;
2768 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2769 AssertRCReturn(rc, rc);
2770
2771 rc = pSvgaR3State->pFuncsDX->pfnSurfaceStretchBltNonMSToMS(pThisCC, pDXContext);
2772 return rc;
2773}
2774
2775
2776int vmsvga3dDXBindShaderIface(PVGASTATECC pThisCC, uint32_t idDXContext)
2777{
2778 int rc;
2779 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2780 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindShaderIface, VERR_INVALID_STATE);
2781 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2782 AssertReturn(p3dState, VERR_INVALID_STATE);
2783
2784 PVMSVGA3DDXCONTEXT pDXContext;
2785 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2786 AssertRCReturn(rc, rc);
2787
2788 rc = pSvgaR3State->pFuncsDX->pfnDXBindShaderIface(pThisCC, pDXContext);
2789 return rc;
2790}
2791
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