VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-dx.cpp@ 94741

Last change on this file since 94741 was 94741, checked in by vboxsync, 3 years ago

Devices/Graphics: updates for shaders: bugref:9830

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1/* $Id: DevVGA-SVGA3d-dx.cpp 94741 2022-04-28 17:56:12Z vboxsync $ */
2/** @file
3 * DevSVGA3d - VMWare SVGA device, 3D parts - Common code for DX backend interface.
4 */
5
6/*
7 * Copyright (C) 2020-2022 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
23#include <VBox/AssertGuest.h>
24#include <iprt/errcore.h>
25#include <VBox/log.h>
26#include <VBox/vmm/pdmdev.h>
27
28#include <iprt/assert.h>
29#include <iprt/mem.h>
30
31#include <VBoxVideo.h> /* required by DevVGA.h */
32
33/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
34#include "DevVGA.h"
35
36#include "DevVGA-SVGA.h"
37#include "DevVGA-SVGA3d.h"
38#include "DevVGA-SVGA3d-internal.h"
39#include "DevVGA-SVGA-internal.h"
40
41
42/*
43 * Helpers.
44 */
45
46static int dxMobWrite(PVMSVGAR3STATE pSvgaR3State, SVGAMobId mobid, uint32_t off, void const *pvData, uint32_t cbData)
47{
48 PVMSVGAMOB pMob = vmsvgaR3MobGet(pSvgaR3State, mobid);
49 ASSERT_GUEST_RETURN(pMob, VERR_INVALID_STATE);
50
51 return vmsvgaR3MobWrite(pSvgaR3State, pMob, off, pvData, cbData);
52}
53
54
55/*
56 *
57 * Command handlers.
58 *
59 */
60
61int vmsvga3dDXUnbindContext(PVGASTATECC pThisCC, uint32_t cid, SVGADXContextMobFormat *pSvgaDXContext)
62{
63 int rc;
64 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
65 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindContext, VERR_INVALID_STATE);
66 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
67 AssertReturn(p3dState, VERR_INVALID_STATE);
68
69 PVMSVGA3DDXCONTEXT pDXContext;
70 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
71 AssertRCReturn(rc, rc);
72
73 /* Copy the host structure back to the guest memory. */
74 memcpy(pSvgaDXContext, &pDXContext->svgaDXContext, sizeof(*pSvgaDXContext));
75
76 return rc;
77}
78
79
80int vmsvga3dDXSwitchContext(PVGASTATECC pThisCC, uint32_t cid)
81{
82 int rc;
83 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
84 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSwitchContext, VERR_INVALID_STATE);
85 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
86 AssertReturn(p3dState, VERR_INVALID_STATE);
87
88 PVMSVGA3DDXCONTEXT pDXContext;
89 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
90 AssertRCReturn(rc, rc);
91
92 /* Notify the host backend that context is about to be switched. */
93 rc = pSvgaR3State->pFuncsDX->pfnDXSwitchContext(pThisCC, pDXContext);
94 if (rc == VINF_NOT_IMPLEMENTED || RT_FAILURE(rc))
95 return rc;
96
97 /** @todo Keep track of changes in the pipeline and apply only modified state. */
98 /* It is not necessary to restore SVGADXContextMobFormat::shaderState::shaderResources
99 * because they are applied by the backend before each Draw call.
100 */
101 #define DX_STATE_VS 0x00000001
102 #define DX_STATE_PS 0x00000002
103 #define DX_STATE_SAMPLERS 0x00000004
104 #define DX_STATE_INPUTLAYOUT 0x00000008
105 #define DX_STATE_TOPOLOGY 0x00000010
106 #define DX_STATE_VERTEXBUFFER 0x00000020
107 #define DX_STATE_INDEXBUFFER 0x00000040
108 #define DX_STATE_BLENDSTATE 0x00000080
109 #define DX_STATE_DEPTHSTENCILSTATE 0x00000100
110 #define DX_STATE_SOTARGETS 0x00000200
111 #define DX_STATE_VIEWPORTS 0x00000400
112 #define DX_STATE_SCISSORRECTS 0x00000800
113 #define DX_STATE_RASTERIZERSTATE 0x00001000
114 #define DX_STATE_RENDERTARGETS 0x00002000
115 #define DX_STATE_GS 0x00004000
116 #define DX_STATE_CONSTANTBUFFERS 0x00008000
117 uint32_t u32TrackedState = 0
118 | DX_STATE_VS
119 | DX_STATE_PS
120 | DX_STATE_SAMPLERS
121 | DX_STATE_INPUTLAYOUT
122 | DX_STATE_TOPOLOGY
123 | DX_STATE_VERTEXBUFFER
124 | DX_STATE_INDEXBUFFER
125 | DX_STATE_BLENDSTATE
126 | DX_STATE_DEPTHSTENCILSTATE
127 | DX_STATE_SOTARGETS
128 | DX_STATE_VIEWPORTS
129 | DX_STATE_SCISSORRECTS
130 | DX_STATE_RASTERIZERSTATE
131 | DX_STATE_RENDERTARGETS
132 | DX_STATE_GS
133 | DX_STATE_CONSTANTBUFFERS
134 ;
135
136 LogFunc(("cid = %d, state = 0x%08X\n", cid, u32TrackedState));
137
138 if (u32TrackedState & DX_STATE_VS)
139 {
140 u32TrackedState &= ~DX_STATE_VS;
141
142 SVGA3dShaderType const shaderType = SVGA3D_SHADERTYPE_VS;
143
144 uint32_t const idxShaderState = shaderType - SVGA3D_SHADERTYPE_MIN;
145 SVGA3dShaderId shaderId = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId;
146
147 rc = pSvgaR3State->pFuncsDX->pfnDXSetShader(pThisCC, pDXContext, shaderId, shaderType);
148 AssertRC(rc);
149 }
150
151
152 if (u32TrackedState & DX_STATE_PS)
153 {
154 u32TrackedState &= ~DX_STATE_PS;
155
156 SVGA3dShaderType const shaderType = SVGA3D_SHADERTYPE_PS;
157
158 uint32_t const idxShaderState = shaderType - SVGA3D_SHADERTYPE_MIN;
159 SVGA3dShaderId shaderId = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId;
160
161 rc = pSvgaR3State->pFuncsDX->pfnDXSetShader(pThisCC, pDXContext, shaderId, shaderType);
162 AssertRC(rc);
163 }
164
165
166 if (u32TrackedState & DX_STATE_GS)
167 {
168 u32TrackedState &= ~DX_STATE_GS;
169
170 SVGA3dShaderType const shaderType = SVGA3D_SHADERTYPE_GS;
171
172 uint32_t const idxShaderState = shaderType - SVGA3D_SHADERTYPE_MIN;
173 SVGA3dShaderId shaderId = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId;
174
175 rc = pSvgaR3State->pFuncsDX->pfnDXSetShader(pThisCC, pDXContext, shaderId, shaderType);
176 AssertRC(rc);
177 }
178
179
180 if (u32TrackedState & DX_STATE_SAMPLERS)
181 {
182 u32TrackedState &= ~DX_STATE_SAMPLERS;
183
184 for (int i = SVGA3D_SHADERTYPE_MIN; i < SVGA3D_SHADERTYPE_DX10_MAX; ++i) /** @todo SVGA3D_SHADERTYPE_MAX */
185 {
186 SVGA3dShaderType const shaderType = (SVGA3dShaderType)i;
187 uint32_t const idxShaderState = shaderType - SVGA3D_SHADERTYPE_MIN;
188
189 uint32_t startSampler = 0;
190 uint32_t cSamplerId = SVGA3D_DX_MAX_SAMPLERS;
191 SVGA3dSamplerId *paSamplerId = &pDXContext->svgaDXContext.shaderState[idxShaderState].samplers[0];
192
193 rc = pSvgaR3State->pFuncsDX->pfnDXSetSamplers(pThisCC, pDXContext, startSampler, shaderType, cSamplerId, paSamplerId);
194 AssertRC(rc);
195 }
196 }
197
198
199 if (u32TrackedState & DX_STATE_INPUTLAYOUT)
200 {
201 u32TrackedState &= ~DX_STATE_INPUTLAYOUT;
202
203 SVGA3dElementLayoutId const elementLayoutId = pDXContext->svgaDXContext.inputAssembly.layoutId;
204
205 rc = pSvgaR3State->pFuncsDX->pfnDXSetInputLayout(pThisCC, pDXContext, elementLayoutId);
206 AssertRC(rc);
207 }
208
209
210 if (u32TrackedState & DX_STATE_TOPOLOGY)
211 {
212 u32TrackedState &= ~DX_STATE_TOPOLOGY;
213
214 SVGA3dPrimitiveType const topology = (SVGA3dPrimitiveType)pDXContext->svgaDXContext.inputAssembly.topology;
215
216 if (topology != SVGA3D_PRIMITIVE_INVALID)
217 rc = pSvgaR3State->pFuncsDX->pfnDXSetTopology(pThisCC, pDXContext, topology);
218 AssertRC(rc);
219 }
220
221
222 if (u32TrackedState & DX_STATE_VERTEXBUFFER)
223 {
224 u32TrackedState &= ~DX_STATE_VERTEXBUFFER;
225
226 /** @todo Track which vertex buffers were modified and update only the corresponding slots.
227 * 32 bits mask is enough.
228 */
229 uint32_t startBuffer = 0;
230 uint32_t cVertexBuffer = SVGA3D_DX_MAX_VERTEXBUFFERS;
231 SVGA3dVertexBuffer aVertexBuffer[SVGA3D_DX_MAX_VERTEXBUFFERS];
232 for (uint32_t i = 0; i < SVGA3D_DX_MAX_VERTEXBUFFERS; ++i)
233 {
234 aVertexBuffer[i].sid = pDXContext->svgaDXContext.inputAssembly.vertexBuffers[i].bufferId;
235 aVertexBuffer[i].stride = pDXContext->svgaDXContext.inputAssembly.vertexBuffers[i].stride;
236 aVertexBuffer[i].offset = pDXContext->svgaDXContext.inputAssembly.vertexBuffers[i].offset;
237 }
238
239 rc = pSvgaR3State->pFuncsDX->pfnDXSetVertexBuffers(pThisCC, pDXContext, startBuffer, cVertexBuffer, aVertexBuffer);
240 AssertRC(rc);
241 }
242
243
244 if (u32TrackedState & DX_STATE_INDEXBUFFER)
245 {
246 u32TrackedState &= ~DX_STATE_INDEXBUFFER;
247
248 SVGA3dSurfaceId const sid = pDXContext->svgaDXContext.inputAssembly.indexBufferSid;
249 SVGA3dSurfaceFormat const format = (SVGA3dSurfaceFormat)pDXContext->svgaDXContext.inputAssembly.indexBufferFormat;
250 uint32_t const offset = pDXContext->svgaDXContext.inputAssembly.indexBufferOffset;
251
252 rc = pSvgaR3State->pFuncsDX->pfnDXSetIndexBuffer(pThisCC, pDXContext, sid, format, offset);
253 AssertRC(rc);
254 }
255
256
257 if (u32TrackedState & DX_STATE_BLENDSTATE)
258 {
259 u32TrackedState &= ~DX_STATE_BLENDSTATE;
260
261 SVGA3dBlendStateId const blendId = pDXContext->svgaDXContext.renderState.blendStateId;
262 /* SVGADXContextMobFormat uses uint32_t array to store the blend factors, however they are in fact 32 bit floats. */
263 float const *paBlendFactor = (float *)&pDXContext->svgaDXContext.renderState.blendFactor[0];
264 uint32_t const sampleMask = pDXContext->svgaDXContext.renderState.sampleMask;
265
266 rc = pSvgaR3State->pFuncsDX->pfnDXSetBlendState(pThisCC, pDXContext, blendId, paBlendFactor, sampleMask);
267 AssertRC(rc);
268 }
269
270
271 if (u32TrackedState & DX_STATE_DEPTHSTENCILSTATE)
272 {
273 u32TrackedState &= ~DX_STATE_DEPTHSTENCILSTATE;
274
275 SVGA3dDepthStencilStateId const depthStencilId = pDXContext->svgaDXContext.renderState.depthStencilStateId;
276 uint32_t const stencilRef = pDXContext->svgaDXContext.renderState.stencilRef;
277
278 rc = pSvgaR3State->pFuncsDX->pfnDXSetDepthStencilState(pThisCC, pDXContext, depthStencilId, stencilRef);
279 AssertRC(rc);
280 }
281
282
283 if (u32TrackedState & DX_STATE_SOTARGETS)
284 {
285 u32TrackedState &= ~DX_STATE_SOTARGETS;
286
287 uint32_t cSoTarget = SVGA3D_DX_MAX_SOTARGETS;
288 SVGA3dSoTarget aSoTarget[SVGA3D_DX_MAX_SOTARGETS];
289 for (uint32_t i = 0; i < SVGA3D_DX_MAX_SOTARGETS; ++i)
290 {
291 aSoTarget[i].sid = pDXContext->svgaDXContext.streamOut.targets[i];
292 /** @todo Offset is not stored in svgaDXContext. Should it be stored elsewhere by the host? */
293 aSoTarget[i].offset = 0;
294 aSoTarget[i].sizeInBytes = 0;
295 }
296
297 rc = pSvgaR3State->pFuncsDX->pfnDXSetSOTargets(pThisCC, pDXContext, cSoTarget, aSoTarget);
298 AssertRC(rc);
299 }
300
301
302 if (u32TrackedState & DX_STATE_VIEWPORTS)
303 {
304 u32TrackedState &= ~DX_STATE_VIEWPORTS;
305
306 uint32_t const cViewport = pDXContext->svgaDXContext.numViewports;
307 SVGA3dViewport const *paViewport = &pDXContext->svgaDXContext.viewports[0];
308
309 rc = pSvgaR3State->pFuncsDX->pfnDXSetViewports(pThisCC, pDXContext, cViewport, paViewport);
310 AssertRC(rc);
311 }
312
313
314 if (u32TrackedState & DX_STATE_SCISSORRECTS)
315 {
316 u32TrackedState &= ~DX_STATE_SCISSORRECTS;
317
318 uint32_t const cRect = pDXContext->svgaDXContext.numScissorRects;
319 SVGASignedRect const *paRect = &pDXContext->svgaDXContext.scissorRects[0];
320
321 rc = pSvgaR3State->pFuncsDX->pfnDXSetScissorRects(pThisCC, pDXContext, cRect, paRect);
322 AssertRC(rc);
323 }
324
325
326 if (u32TrackedState & DX_STATE_RASTERIZERSTATE)
327 {
328 u32TrackedState &= ~DX_STATE_RASTERIZERSTATE;
329
330 SVGA3dRasterizerStateId const rasterizerId = pDXContext->svgaDXContext.renderState.rasterizerStateId;
331
332 rc = pSvgaR3State->pFuncsDX->pfnDXSetRasterizerState(pThisCC, pDXContext, rasterizerId);
333 AssertRC(rc);
334 }
335
336
337 if (u32TrackedState & DX_STATE_RENDERTARGETS)
338 {
339 u32TrackedState &= ~DX_STATE_RENDERTARGETS;
340
341 SVGA3dDepthStencilViewId const depthStencilViewId = (SVGA3dRenderTargetViewId)pDXContext->svgaDXContext.renderState.depthStencilViewId;
342 uint32_t const cRenderTargetViewId = SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS;
343 SVGA3dRenderTargetViewId const *paRenderTargetViewId = (SVGA3dRenderTargetViewId *)&pDXContext->svgaDXContext.renderState.renderTargetViewIds[0];
344
345 rc = pSvgaR3State->pFuncsDX->pfnDXSetRenderTargets(pThisCC, pDXContext, depthStencilViewId, cRenderTargetViewId, paRenderTargetViewId);
346 AssertRC(rc);
347 }
348
349
350 if (u32TrackedState & DX_STATE_CONSTANTBUFFERS)
351 {
352 u32TrackedState &= ~DX_STATE_CONSTANTBUFFERS;
353
354 for (int i = SVGA3D_SHADERTYPE_MIN; i < SVGA3D_SHADERTYPE_DX10_MAX; ++i) /** @todo SVGA3D_SHADERTYPE_MAX */
355 {
356 SVGA3dShaderType const shaderType = (SVGA3dShaderType)i;
357 uint32_t const idxShaderState = shaderType - SVGA3D_SHADERTYPE_MIN;
358
359 /** @todo Track which constant buffers were modified and update only the corresponding slots.
360 * 32 bit mask is enough.
361 */
362 for (int iSlot = 0; iSlot < SVGA3D_DX_MAX_CONSTBUFFERS; ++iSlot)
363 {
364 SVGA3dConstantBufferBinding *pCBB = &pDXContext->svgaDXContext.shaderState[idxShaderState].constantBuffers[iSlot];
365 if (pCBB->sid == SVGA3D_INVALID_ID) // This will not be necessary when constant buffers slots will be tracked.
366 continue;
367
368 rc = pSvgaR3State->pFuncsDX->pfnDXSetSingleConstantBuffer(pThisCC, pDXContext, iSlot, shaderType, pCBB->sid, pCBB->offsetInBytes, pCBB->sizeInBytes);
369 AssertRC(rc);
370 }
371 }
372 }
373
374 Assert(u32TrackedState == 0);
375
376 return rc;
377}
378
379
380/**
381 * Create a new 3D DX context.
382 *
383 * @returns VBox status code.
384 * @param pThisCC The VGA/VMSVGA state for ring-3.
385 * @param cid Context id to be created.
386 */
387int vmsvga3dDXDefineContext(PVGASTATECC pThisCC, uint32_t cid)
388{
389 int rc;
390 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
391 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineContext, VERR_INVALID_STATE);
392 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
393 AssertReturn(p3dState, VERR_INVALID_STATE);
394
395 PVMSVGA3DDXCONTEXT pDXContext;
396
397 LogFunc(("cid %d\n", cid));
398
399 AssertReturn(cid < SVGA3D_MAX_CONTEXT_IDS, VERR_INVALID_PARAMETER);
400
401 if (cid >= p3dState->cDXContexts)
402 {
403 /* Grow the array. */
404 uint32_t cNew = RT_ALIGN(cid + 15, 16);
405 void *pvNew = RTMemRealloc(p3dState->papDXContexts, sizeof(p3dState->papDXContexts[0]) * cNew);
406 AssertReturn(pvNew, VERR_NO_MEMORY);
407 p3dState->papDXContexts = (PVMSVGA3DDXCONTEXT *)pvNew;
408 while (p3dState->cDXContexts < cNew)
409 {
410 pDXContext = (PVMSVGA3DDXCONTEXT)RTMemAllocZ(sizeof(*pDXContext));
411 AssertReturn(pDXContext, VERR_NO_MEMORY);
412 pDXContext->cid = SVGA3D_INVALID_ID;
413 p3dState->papDXContexts[p3dState->cDXContexts++] = pDXContext;
414 }
415 }
416 /* If one already exists with this id, then destroy it now. */
417 if (p3dState->papDXContexts[cid]->cid != SVGA3D_INVALID_ID)
418 vmsvga3dDXDestroyContext(pThisCC, cid);
419
420 pDXContext = p3dState->papDXContexts[cid];
421 memset(pDXContext, 0, sizeof(*pDXContext));
422
423 /* 0xFFFFFFFF (SVGA_ID_INVALID) is a better initial value than 0 for most of svgaDXContext fields. */
424 memset(&pDXContext->svgaDXContext, 0xFF, sizeof(pDXContext->svgaDXContext));
425 pDXContext->svgaDXContext.inputAssembly.topology = SVGA3D_PRIMITIVE_INVALID;
426 pDXContext->svgaDXContext.numViewports = 0;
427 pDXContext->svgaDXContext.numScissorRects = 0;
428 pDXContext->cid = cid;
429
430 /* Init the backend specific data. */
431 rc = pSvgaR3State->pFuncsDX->pfnDXDefineContext(pThisCC, pDXContext);
432
433 /* Cleanup on failure. */
434 if (RT_FAILURE(rc))
435 vmsvga3dDXDestroyContext(pThisCC, cid);
436
437 return rc;
438}
439
440
441int vmsvga3dDXDestroyContext(PVGASTATECC pThisCC, uint32_t cid)
442{
443 int rc;
444 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
445 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyContext, VERR_INVALID_STATE);
446 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
447 AssertReturn(p3dState, VERR_INVALID_STATE);
448
449 PVMSVGA3DDXCONTEXT pDXContext;
450 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
451 AssertRCReturn(rc, rc);
452
453 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyContext(pThisCC, pDXContext);
454
455 RT_ZERO(*pDXContext);
456 pDXContext->cid = SVGA3D_INVALID_ID;
457
458 return rc;
459}
460
461
462int vmsvga3dDXBindContext(PVGASTATECC pThisCC, uint32_t cid, SVGADXContextMobFormat *pSvgaDXContext)
463{
464 int rc;
465 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
466 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindContext, VERR_INVALID_STATE);
467 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
468 AssertReturn(p3dState, VERR_INVALID_STATE);
469
470 PVMSVGA3DDXCONTEXT pDXContext;
471 rc = vmsvga3dDXContextFromCid(p3dState, cid, &pDXContext);
472 AssertRCReturn(rc, rc);
473
474 if (pSvgaDXContext)
475 memcpy(&pDXContext->svgaDXContext, pSvgaDXContext, sizeof(*pSvgaDXContext));
476
477 rc = pSvgaR3State->pFuncsDX->pfnDXBindContext(pThisCC, pDXContext);
478 return rc;
479}
480
481
482int vmsvga3dDXReadbackContext(PVGASTATECC pThisCC, uint32_t idDXContext, SVGADXContextMobFormat *pSvgaDXContext)
483{
484 int rc;
485 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
486 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXReadbackContext, VERR_INVALID_STATE);
487 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
488 AssertReturn(p3dState, VERR_INVALID_STATE);
489
490 PVMSVGA3DDXCONTEXT pDXContext;
491 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
492 AssertRCReturn(rc, rc);
493
494 rc = pSvgaR3State->pFuncsDX->pfnDXReadbackContext(pThisCC, pDXContext);
495 if (RT_SUCCESS(rc))
496 memcpy(pSvgaDXContext, &pDXContext->svgaDXContext, sizeof(*pSvgaDXContext));
497 return rc;
498}
499
500
501int vmsvga3dDXInvalidateContext(PVGASTATECC pThisCC, uint32_t idDXContext)
502{
503 int rc;
504 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
505 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXInvalidateContext, VERR_INVALID_STATE);
506 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
507 AssertReturn(p3dState, VERR_INVALID_STATE);
508
509 PVMSVGA3DDXCONTEXT pDXContext;
510 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
511 AssertRCReturn(rc, rc);
512
513 rc = pSvgaR3State->pFuncsDX->pfnDXInvalidateContext(pThisCC, pDXContext);
514 return rc;
515}
516
517
518int vmsvga3dDXSetSingleConstantBuffer(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetSingleConstantBuffer const *pCmd)
519{
520 int rc;
521 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
522 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetSingleConstantBuffer, VERR_INVALID_STATE);
523 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
524 AssertReturn(p3dState, VERR_INVALID_STATE);
525
526 PVMSVGA3DDXCONTEXT pDXContext;
527 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
528 AssertRCReturn(rc, rc);
529
530 ASSERT_GUEST_RETURN(pCmd->slot < SVGA3D_DX_MAX_CONSTBUFFERS, VERR_INVALID_PARAMETER);
531 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
532 RT_UNTRUSTED_VALIDATED_FENCE();
533
534 uint32_t const idxShaderState = pCmd->type - SVGA3D_SHADERTYPE_MIN;
535 SVGA3dConstantBufferBinding *pCBB = &pDXContext->svgaDXContext.shaderState[idxShaderState].constantBuffers[pCmd->slot];
536 pCBB->sid = pCmd->sid;
537 pCBB->offsetInBytes = pCmd->offsetInBytes;
538 pCBB->sizeInBytes = pCmd->sizeInBytes;
539
540 rc = pSvgaR3State->pFuncsDX->pfnDXSetSingleConstantBuffer(pThisCC, pDXContext, pCmd->slot, pCmd->type, pCmd->sid, pCmd->offsetInBytes, pCmd->sizeInBytes);
541 return rc;
542}
543
544
545int vmsvga3dDXSetShaderResources(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetShaderResources const *pCmd, uint32_t cShaderResourceViewId, SVGA3dShaderResourceViewId const *paShaderResourceViewId)
546{
547 int rc;
548 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
549 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetShaderResources, VERR_INVALID_STATE);
550 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
551 AssertReturn(p3dState, VERR_INVALID_STATE);
552
553 PVMSVGA3DDXCONTEXT pDXContext;
554 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
555 AssertRCReturn(rc, rc);
556
557 ASSERT_GUEST_RETURN(pCmd->startView < SVGA3D_DX_MAX_SRVIEWS, VERR_INVALID_PARAMETER);
558 ASSERT_GUEST_RETURN(cShaderResourceViewId <= SVGA3D_DX_MAX_SRVIEWS - pCmd->startView, VERR_INVALID_PARAMETER);
559 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
560 ASSERT_GUEST_RETURN(pDXContext->cot.paSRView, VERR_INVALID_STATE);
561 for (uint32_t i = 0; i < cShaderResourceViewId; ++i)
562 ASSERT_GUEST_RETURN( paShaderResourceViewId[i] < pDXContext->cot.cSRView
563 || paShaderResourceViewId[i] == SVGA3D_INVALID_ID, VERR_INVALID_PARAMETER);
564 RT_UNTRUSTED_VALIDATED_FENCE();
565
566 uint32_t const idxShaderState = pCmd->type - SVGA3D_SHADERTYPE_MIN;
567 for (uint32_t i = 0; i < cShaderResourceViewId; ++i)
568 {
569 SVGA3dShaderResourceViewId const shaderResourceViewId = paShaderResourceViewId[i];
570 pDXContext->svgaDXContext.shaderState[idxShaderState].shaderResources[pCmd->startView + i] = shaderResourceViewId;
571 }
572
573 rc = pSvgaR3State->pFuncsDX->pfnDXSetShaderResources(pThisCC, pDXContext, pCmd->startView, pCmd->type, cShaderResourceViewId, paShaderResourceViewId);
574 return rc;
575}
576
577
578int vmsvga3dDXSetShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetShader const *pCmd)
579{
580 int rc;
581 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
582 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetShader, VERR_INVALID_STATE);
583 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
584 AssertReturn(p3dState, VERR_INVALID_STATE);
585
586 PVMSVGA3DDXCONTEXT pDXContext;
587 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
588 AssertRCReturn(rc, rc);
589
590 ASSERT_GUEST_RETURN( pCmd->shaderId < pDXContext->cot.cShader
591 || pCmd->shaderId == SVGA_ID_INVALID, VERR_INVALID_PARAMETER);
592 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
593 RT_UNTRUSTED_VALIDATED_FENCE();
594
595 uint32_t const idxShaderState = pCmd->type - SVGA3D_SHADERTYPE_MIN;
596 pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId = pCmd->shaderId;
597
598 rc = pSvgaR3State->pFuncsDX->pfnDXSetShader(pThisCC, pDXContext, pCmd->shaderId, pCmd->type);
599 return rc;
600}
601
602
603int vmsvga3dDXSetSamplers(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetSamplers const *pCmd, uint32_t cSamplerId, SVGA3dSamplerId const *paSamplerId)
604{
605 int rc;
606 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
607 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetSamplers, VERR_INVALID_STATE);
608 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
609 AssertReturn(p3dState, VERR_INVALID_STATE);
610
611 PVMSVGA3DDXCONTEXT pDXContext;
612 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
613 AssertRCReturn(rc, rc);
614
615 ASSERT_GUEST_RETURN(pCmd->startSampler < SVGA3D_DX_MAX_SAMPLERS, VERR_INVALID_PARAMETER);
616 ASSERT_GUEST_RETURN(cSamplerId <= SVGA3D_DX_MAX_SAMPLERS - pCmd->startSampler, VERR_INVALID_PARAMETER);
617 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
618 ASSERT_GUEST_RETURN(pDXContext->cot.paSampler, VERR_INVALID_STATE);
619 RT_UNTRUSTED_VALIDATED_FENCE();
620
621 uint32_t const idxShaderState = pCmd->type - SVGA3D_SHADERTYPE_MIN;
622 for (uint32_t i = 0; i < cSamplerId; ++i)
623 {
624 SVGA3dSamplerId const samplerId = paSamplerId[i];
625 ASSERT_GUEST_RETURN( samplerId < pDXContext->cot.cSampler
626 || samplerId == SVGA_ID_INVALID, VERR_INVALID_PARAMETER);
627 pDXContext->svgaDXContext.shaderState[idxShaderState].samplers[pCmd->startSampler + i] = samplerId;
628 }
629 RT_UNTRUSTED_VALIDATED_FENCE();
630
631 rc = pSvgaR3State->pFuncsDX->pfnDXSetSamplers(pThisCC, pDXContext, pCmd->startSampler, pCmd->type, cSamplerId, paSamplerId);
632 return rc;
633}
634
635
636#ifdef DUMP_BITMAPS
637static void vmsvga3dDXDrawDumpRenderTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
638{
639 for (uint32_t i = 0; i < SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS; ++i)
640 {
641 if (pDXContext->svgaDXContext.renderState.renderTargetViewIds[i] != SVGA3D_INVALID_ID)
642 {
643 SVGACOTableDXRTViewEntry *pRTViewEntry = &pDXContext->cot.paRTView[pDXContext->svgaDXContext.renderState.renderTargetViewIds[i]];
644 Log(("Dump RT[%u] sid = %u rtvid = %u\n", i, pRTViewEntry->sid, pDXContext->svgaDXContext.renderState.renderTargetViewIds[i]));
645
646 SVGA3dSurfaceImageId image;
647 image.sid = pRTViewEntry->sid;
648 image.face = 0;
649 image.mipmap = 0;
650 VMSVGA3D_MAPPED_SURFACE map;
651 int rc = vmsvga3dSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
652 if (RT_SUCCESS(rc))
653 {
654 vmsvga3dMapWriteBmpFile(&map, "rt-");
655 vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
656 }
657 else
658 Log(("Map failed %Rrc\n", rc));
659 }
660 }
661}
662#endif
663
664int vmsvga3dDXDraw(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDraw const *pCmd)
665{
666 int rc;
667 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
668 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDraw, VERR_INVALID_STATE);
669 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
670 AssertReturn(p3dState, VERR_INVALID_STATE);
671
672 PVMSVGA3DDXCONTEXT pDXContext;
673 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
674 AssertRCReturn(rc, rc);
675
676 rc = pSvgaR3State->pFuncsDX->pfnDXDraw(pThisCC, pDXContext, pCmd->vertexCount, pCmd->startVertexLocation);
677#ifdef DUMP_BITMAPS
678 vmsvga3dDXDrawDumpRenderTargets(pThisCC, pDXContext);
679#endif
680 return rc;
681}
682
683
684int vmsvga3dDXDrawIndexed(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawIndexed const *pCmd)
685{
686 int rc;
687 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
688 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawIndexed, VERR_INVALID_STATE);
689 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
690 AssertReturn(p3dState, VERR_INVALID_STATE);
691
692 PVMSVGA3DDXCONTEXT pDXContext;
693 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
694 AssertRCReturn(rc, rc);
695
696 rc = pSvgaR3State->pFuncsDX->pfnDXDrawIndexed(pThisCC, pDXContext, pCmd->indexCount, pCmd->startIndexLocation, pCmd->baseVertexLocation);
697#ifdef DUMP_BITMAPS
698 vmsvga3dDXDrawDumpRenderTargets(pThisCC, pDXContext);
699#endif
700 return rc;
701}
702
703
704int vmsvga3dDXDrawInstanced(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawInstanced const *pCmd)
705{
706 int rc;
707 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
708 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawInstanced, VERR_INVALID_STATE);
709 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
710 AssertReturn(p3dState, VERR_INVALID_STATE);
711
712 PVMSVGA3DDXCONTEXT pDXContext;
713 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
714 AssertRCReturn(rc, rc);
715
716 rc = pSvgaR3State->pFuncsDX->pfnDXDrawInstanced(pThisCC, pDXContext,
717 pCmd->vertexCountPerInstance, pCmd->instanceCount, pCmd->startVertexLocation, pCmd->startInstanceLocation);
718#ifdef DUMP_BITMAPS
719 vmsvga3dDXDrawDumpRenderTargets(pThisCC, pDXContext);
720#endif
721 return rc;
722}
723
724
725int vmsvga3dDXDrawIndexedInstanced(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDrawIndexedInstanced const *pCmd)
726{
727 int rc;
728 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
729 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstanced, VERR_INVALID_STATE);
730 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
731 AssertReturn(p3dState, VERR_INVALID_STATE);
732
733 PVMSVGA3DDXCONTEXT pDXContext;
734 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
735 AssertRCReturn(rc, rc);
736
737 rc = pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstanced(pThisCC, pDXContext,
738 pCmd->indexCountPerInstance, pCmd->instanceCount, pCmd->startIndexLocation, pCmd->baseVertexLocation, pCmd->startInstanceLocation);
739#ifdef DUMP_BITMAPS
740 vmsvga3dDXDrawDumpRenderTargets(pThisCC, pDXContext);
741#endif
742 return rc;
743}
744
745
746int vmsvga3dDXDrawAuto(PVGASTATECC pThisCC, uint32_t idDXContext)
747{
748 int rc;
749 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
750 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawAuto, VERR_INVALID_STATE);
751 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
752 AssertReturn(p3dState, VERR_INVALID_STATE);
753
754 PVMSVGA3DDXCONTEXT pDXContext;
755 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
756 AssertRCReturn(rc, rc);
757
758 rc = pSvgaR3State->pFuncsDX->pfnDXDrawAuto(pThisCC, pDXContext);
759#ifdef DUMP_BITMAPS
760 vmsvga3dDXDrawDumpRenderTargets(pThisCC, pDXContext);
761#endif
762 return rc;
763}
764
765
766int vmsvga3dDXSetInputLayout(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dElementLayoutId elementLayoutId)
767{
768 int rc;
769 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
770 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetInputLayout, VERR_INVALID_STATE);
771 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
772 AssertReturn(p3dState, VERR_INVALID_STATE);
773
774 PVMSVGA3DDXCONTEXT pDXContext;
775 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
776 AssertRCReturn(rc, rc);
777
778 ASSERT_GUEST_RETURN(pDXContext->cot.paElementLayout, VERR_INVALID_STATE);
779 ASSERT_GUEST_RETURN(elementLayoutId < pDXContext->cot.cElementLayout, VERR_INVALID_PARAMETER);
780 RT_UNTRUSTED_VALIDATED_FENCE();
781
782 pDXContext->svgaDXContext.inputAssembly.layoutId = elementLayoutId;
783
784 rc = pSvgaR3State->pFuncsDX->pfnDXSetInputLayout(pThisCC, pDXContext, elementLayoutId);
785 return rc;
786}
787
788
789int vmsvga3dDXSetVertexBuffers(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t startBuffer, uint32_t cVertexBuffer, SVGA3dVertexBuffer const *paVertexBuffer)
790{
791 int rc;
792 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
793 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetVertexBuffers, VERR_INVALID_STATE);
794 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
795 AssertReturn(p3dState, VERR_INVALID_STATE);
796
797 PVMSVGA3DDXCONTEXT pDXContext;
798 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
799 AssertRCReturn(rc, rc);
800
801 ASSERT_GUEST_RETURN(startBuffer < SVGA3D_DX_MAX_VERTEXBUFFERS, VERR_INVALID_PARAMETER);
802 ASSERT_GUEST_RETURN(cVertexBuffer <= SVGA3D_DX_MAX_VERTEXBUFFERS - startBuffer, VERR_INVALID_PARAMETER);
803 RT_UNTRUSTED_VALIDATED_FENCE();
804
805 for (uint32_t i = 0; i < cVertexBuffer; ++i)
806 {
807 uint32_t const idxVertexBuffer = startBuffer + i;
808
809 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].bufferId = paVertexBuffer[i].sid;
810 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].stride = paVertexBuffer[i].stride;
811 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].offset = paVertexBuffer[i].offset;
812 }
813
814 rc = pSvgaR3State->pFuncsDX->pfnDXSetVertexBuffers(pThisCC, pDXContext, startBuffer, cVertexBuffer, paVertexBuffer);
815 return rc;
816}
817
818
819int vmsvga3dDXSetIndexBuffer(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetIndexBuffer const *pCmd)
820{
821 int rc;
822 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
823 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetIndexBuffer, VERR_INVALID_STATE);
824 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
825 AssertReturn(p3dState, VERR_INVALID_STATE);
826
827 PVMSVGA3DDXCONTEXT pDXContext;
828 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
829 AssertRCReturn(rc, rc);
830
831 pDXContext->svgaDXContext.inputAssembly.indexBufferSid = pCmd->sid;
832 pDXContext->svgaDXContext.inputAssembly.indexBufferOffset = pCmd->offset;
833 pDXContext->svgaDXContext.inputAssembly.indexBufferFormat = pCmd->format;
834
835 rc = pSvgaR3State->pFuncsDX->pfnDXSetIndexBuffer(pThisCC, pDXContext, pCmd->sid, pCmd->format, pCmd->offset);
836 return rc;
837}
838
839
840int vmsvga3dDXSetTopology(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dPrimitiveType topology)
841{
842 int rc;
843 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
844 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetTopology, VERR_INVALID_STATE);
845 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
846 AssertReturn(p3dState, VERR_INVALID_STATE);
847
848 PVMSVGA3DDXCONTEXT pDXContext;
849 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
850 AssertRCReturn(rc, rc);
851
852 ASSERT_GUEST_RETURN(topology >= SVGA3D_PRIMITIVE_MIN && topology < SVGA3D_PRIMITIVE_MAX, VERR_INVALID_PARAMETER);
853
854 pDXContext->svgaDXContext.inputAssembly.topology = topology;
855
856 rc = pSvgaR3State->pFuncsDX->pfnDXSetTopology(pThisCC, pDXContext, topology);
857 return rc;
858}
859
860
861int vmsvga3dDXSetRenderTargets(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dDepthStencilViewId depthStencilViewId, uint32_t cRenderTargetViewId, SVGA3dRenderTargetViewId const *paRenderTargetViewId)
862{
863 int rc;
864 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
865 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetRenderTargets, VERR_INVALID_STATE);
866 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
867 AssertReturn(p3dState, VERR_INVALID_STATE);
868
869 PVMSVGA3DDXCONTEXT pDXContext;
870 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
871 AssertRCReturn(rc, rc);
872
873 ASSERT_GUEST_RETURN( depthStencilViewId < pDXContext->cot.cDSView
874 || depthStencilViewId == SVGA_ID_INVALID, VERR_INVALID_PARAMETER);
875 ASSERT_GUEST_RETURN(cRenderTargetViewId <= SVGA3D_MAX_RENDER_TARGETS, VERR_INVALID_PARAMETER);
876 for (uint32_t i = 0; i < cRenderTargetViewId; ++i)
877 ASSERT_GUEST_RETURN( paRenderTargetViewId[i] < pDXContext->cot.cRTView
878 || paRenderTargetViewId[i] == SVGA_ID_INVALID, VERR_INVALID_PARAMETER);
879 RT_UNTRUSTED_VALIDATED_FENCE();
880
881 pDXContext->svgaDXContext.renderState.depthStencilViewId = depthStencilViewId;
882 for (uint32_t i = 0; i < cRenderTargetViewId; ++i)
883 pDXContext->svgaDXContext.renderState.renderTargetViewIds[i] = paRenderTargetViewId[i];
884
885 rc = pSvgaR3State->pFuncsDX->pfnDXSetRenderTargets(pThisCC, pDXContext, depthStencilViewId, cRenderTargetViewId, paRenderTargetViewId);
886 return rc;
887}
888
889
890int vmsvga3dDXSetBlendState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetBlendState const *pCmd)
891{
892 int rc;
893 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
894 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetBlendState, VERR_INVALID_STATE);
895 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
896 AssertReturn(p3dState, VERR_INVALID_STATE);
897
898 PVMSVGA3DDXCONTEXT pDXContext;
899 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
900 AssertRCReturn(rc, rc);
901
902 SVGA3dBlendStateId const blendId = pCmd->blendId;
903
904 ASSERT_GUEST_RETURN(pDXContext->cot.paBlendState, VERR_INVALID_STATE);
905 ASSERT_GUEST_RETURN(blendId < pDXContext->cot.cBlendState, VERR_INVALID_PARAMETER);
906 RT_UNTRUSTED_VALIDATED_FENCE();
907
908 pDXContext->svgaDXContext.renderState.blendStateId = blendId;
909 /* SVGADXContextMobFormat uses uint32_t array to store the blend factors, however they are in fact 32 bit floats. */
910 memcpy(pDXContext->svgaDXContext.renderState.blendFactor, pCmd->blendFactor, sizeof(pDXContext->svgaDXContext.renderState.blendFactor));
911 pDXContext->svgaDXContext.renderState.sampleMask = pCmd->sampleMask;
912
913 rc = pSvgaR3State->pFuncsDX->pfnDXSetBlendState(pThisCC, pDXContext, blendId, pCmd->blendFactor, pCmd->sampleMask);
914 return rc;
915}
916
917
918int vmsvga3dDXSetDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetDepthStencilState const *pCmd)
919{
920 int rc;
921 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
922 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetDepthStencilState, VERR_INVALID_STATE);
923 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
924 AssertReturn(p3dState, VERR_INVALID_STATE);
925
926 PVMSVGA3DDXCONTEXT pDXContext;
927 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
928 AssertRCReturn(rc, rc);
929
930 SVGA3dDepthStencilStateId const depthStencilId = pCmd->depthStencilId;
931
932 ASSERT_GUEST_RETURN(pDXContext->cot.paDepthStencil, VERR_INVALID_STATE);
933 ASSERT_GUEST_RETURN(depthStencilId < pDXContext->cot.cDepthStencil, VERR_INVALID_PARAMETER);
934 RT_UNTRUSTED_VALIDATED_FENCE();
935
936 pDXContext->svgaDXContext.renderState.depthStencilStateId = depthStencilId;
937 pDXContext->svgaDXContext.renderState.stencilRef = pCmd->stencilRef;
938
939 rc = pSvgaR3State->pFuncsDX->pfnDXSetDepthStencilState(pThisCC, pDXContext, depthStencilId, pCmd->stencilRef);
940 return rc;
941}
942
943
944int vmsvga3dDXSetRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dRasterizerStateId rasterizerId)
945{
946 int rc;
947 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
948 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetRasterizerState, VERR_INVALID_STATE);
949 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
950 AssertReturn(p3dState, VERR_INVALID_STATE);
951
952 PVMSVGA3DDXCONTEXT pDXContext;
953 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
954 AssertRCReturn(rc, rc);
955
956 ASSERT_GUEST_RETURN(rasterizerId < pDXContext->cot.cRasterizerState, VERR_INVALID_PARAMETER);
957 RT_UNTRUSTED_VALIDATED_FENCE();
958
959 pDXContext->svgaDXContext.renderState.rasterizerStateId = rasterizerId;
960
961 rc = pSvgaR3State->pFuncsDX->pfnDXSetRasterizerState(pThisCC, pDXContext, rasterizerId);
962 return rc;
963}
964
965
966int vmsvga3dDXDefineQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineQuery const *pCmd)
967{
968 int rc;
969 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
970 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineQuery, VERR_INVALID_STATE);
971 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
972 AssertReturn(p3dState, VERR_INVALID_STATE);
973
974 PVMSVGA3DDXCONTEXT pDXContext;
975 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
976 AssertRCReturn(rc, rc);
977
978 SVGA3dQueryId const queryId = pCmd->queryId;
979
980 ASSERT_GUEST_RETURN(pDXContext->cot.paQuery, VERR_INVALID_STATE);
981 ASSERT_GUEST_RETURN(queryId < pDXContext->cot.cQuery, VERR_INVALID_PARAMETER);
982 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_QUERYTYPE_MIN && pCmd->type < SVGA3D_QUERYTYPE_MAX, VERR_INVALID_PARAMETER);
983 RT_UNTRUSTED_VALIDATED_FENCE();
984
985 /* Cleanup the current query. */
986 pSvgaR3State->pFuncsDX->pfnDXDestroyQuery(pThisCC, pDXContext, queryId);
987
988 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
989 pEntry->type = pCmd->type;
990 pEntry->state = SVGADX_QDSTATE_IDLE;
991 pEntry->flags = pCmd->flags;
992 pEntry->mobid = SVGA_ID_INVALID;
993 pEntry->offset = 0;
994
995 rc = pSvgaR3State->pFuncsDX->pfnDXDefineQuery(pThisCC, pDXContext, queryId, pEntry);
996 return rc;
997}
998
999
1000int vmsvga3dDXDestroyQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyQuery const *pCmd)
1001{
1002 int rc;
1003 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1004 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyQuery, VERR_INVALID_STATE);
1005 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1006 AssertReturn(p3dState, VERR_INVALID_STATE);
1007
1008 PVMSVGA3DDXCONTEXT pDXContext;
1009 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1010 AssertRCReturn(rc, rc);
1011
1012 SVGA3dQueryId const queryId = pCmd->queryId;
1013
1014 ASSERT_GUEST_RETURN(pDXContext->cot.paQuery, VERR_INVALID_STATE);
1015 ASSERT_GUEST_RETURN(queryId < pDXContext->cot.cQuery, VERR_INVALID_PARAMETER);
1016 RT_UNTRUSTED_VALIDATED_FENCE();
1017
1018 pSvgaR3State->pFuncsDX->pfnDXDestroyQuery(pThisCC, pDXContext, queryId);
1019
1020 /* Cleanup COTable entry.*/
1021 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
1022 pEntry->type = SVGA3D_QUERYTYPE_INVALID;
1023 pEntry->state = SVGADX_QDSTATE_INVALID;
1024 pEntry->flags = 0;
1025 pEntry->mobid = SVGA_ID_INVALID;
1026 pEntry->offset = 0;
1027
1028 return rc;
1029}
1030
1031
1032int vmsvga3dDXBindQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBindQuery const *pCmd, PVMSVGAMOB pMob)
1033{
1034 int rc;
1035 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1036 AssertReturn(pSvgaR3State->pFuncsDX, VERR_INVALID_STATE);
1037 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1038 AssertReturn(p3dState, VERR_INVALID_STATE);
1039
1040 PVMSVGA3DDXCONTEXT pDXContext;
1041 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1042 AssertRCReturn(rc, rc);
1043
1044 SVGA3dQueryId const queryId = pCmd->queryId;
1045
1046 ASSERT_GUEST_RETURN(pDXContext->cot.paQuery, VERR_INVALID_STATE);
1047 ASSERT_GUEST_RETURN(queryId < pDXContext->cot.cQuery, VERR_INVALID_PARAMETER);
1048 RT_UNTRUSTED_VALIDATED_FENCE();
1049
1050 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
1051 pEntry->mobid = vmsvgaR3MobId(pMob);
1052
1053 return rc;
1054}
1055
1056
1057int vmsvga3dDXSetQueryOffset(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetQueryOffset const *pCmd)
1058{
1059 int rc;
1060 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1061 AssertReturn(pSvgaR3State->pFuncsDX, VERR_INVALID_STATE);
1062 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1063 AssertReturn(p3dState, VERR_INVALID_STATE);
1064
1065 PVMSVGA3DDXCONTEXT pDXContext;
1066 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1067 AssertRCReturn(rc, rc);
1068
1069 SVGA3dQueryId const queryId = pCmd->queryId;
1070
1071 ASSERT_GUEST_RETURN(pDXContext->cot.paQuery, VERR_INVALID_STATE);
1072 ASSERT_GUEST_RETURN(queryId < pDXContext->cot.cQuery, VERR_INVALID_PARAMETER);
1073 RT_UNTRUSTED_VALIDATED_FENCE();
1074
1075 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
1076 pEntry->offset = pCmd->mobOffset;
1077
1078 return rc;
1079}
1080
1081
1082int vmsvga3dDXBeginQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBeginQuery const *pCmd)
1083{
1084 int rc;
1085 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1086 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBeginQuery, VERR_INVALID_STATE);
1087 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1088 AssertReturn(p3dState, VERR_INVALID_STATE);
1089
1090 PVMSVGA3DDXCONTEXT pDXContext;
1091 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1092 AssertRCReturn(rc, rc);
1093
1094 SVGA3dQueryId const queryId = pCmd->queryId;
1095
1096 ASSERT_GUEST_RETURN(pDXContext->cot.paQuery, VERR_INVALID_STATE);
1097 ASSERT_GUEST_RETURN(queryId < pDXContext->cot.cQuery, VERR_INVALID_PARAMETER);
1098 RT_UNTRUSTED_VALIDATED_FENCE();
1099
1100 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
1101 Assert(pEntry->state == SVGADX_QDSTATE_IDLE || pEntry->state == SVGADX_QDSTATE_PENDING || pEntry->state == SVGADX_QDSTATE_FINISHED);
1102 if (pEntry->state != SVGADX_QDSTATE_ACTIVE)
1103 {
1104 rc = pSvgaR3State->pFuncsDX->pfnDXBeginQuery(pThisCC, pDXContext, queryId);
1105 if (RT_SUCCESS(rc))
1106 {
1107 pEntry->state = SVGADX_QDSTATE_ACTIVE;
1108
1109 /* Update the guest status of the query. */
1110 uint32_t const u32 = SVGA3D_QUERYSTATE_PENDING;
1111 dxMobWrite(pSvgaR3State, pEntry->mobid, pEntry->offset, &u32, sizeof(u32));
1112 }
1113 else
1114 {
1115 uint32_t const u32 = SVGA3D_QUERYSTATE_FAILED;
1116 dxMobWrite(pSvgaR3State, pEntry->mobid, pEntry->offset, &u32, sizeof(u32));
1117 }
1118 }
1119 return rc;
1120}
1121
1122
1123static int dxEndQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dQueryId queryId, SVGACOTableDXQueryEntry *pEntry)
1124{
1125 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1126
1127 int rc;
1128 Assert(pEntry->state == SVGADX_QDSTATE_ACTIVE);
1129 if (pEntry->state == SVGADX_QDSTATE_ACTIVE)
1130 {
1131 pEntry->state = SVGADX_QDSTATE_PENDING;
1132
1133 uint32_t u32QueryState;
1134 SVGADXQueryResultUnion queryResult;
1135 uint32_t cbQuery = 0; /* Actual size of query data returned by backend. */
1136 rc = pSvgaR3State->pFuncsDX->pfnDXEndQuery(pThisCC, pDXContext, queryId, &queryResult, &cbQuery);
1137 if (RT_SUCCESS(rc))
1138 {
1139 /* Write the result after SVGA3dQueryState. */
1140 dxMobWrite(pSvgaR3State, pEntry->mobid, pEntry->offset + sizeof(uint32_t), &queryResult, cbQuery);
1141
1142 u32QueryState = SVGA3D_QUERYSTATE_SUCCEEDED;
1143 }
1144 else
1145 u32QueryState = SVGA3D_QUERYSTATE_FAILED;
1146
1147 dxMobWrite(pSvgaR3State, pEntry->mobid, pEntry->offset, &u32QueryState, sizeof(u32QueryState));
1148
1149 if (RT_SUCCESS(rc))
1150 pEntry->state = SVGADX_QDSTATE_FINISHED;
1151 }
1152 else
1153 rc = VERR_INVALID_STATE;
1154
1155 return rc;
1156}
1157
1158
1159int vmsvga3dDXEndQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXEndQuery const *pCmd)
1160{
1161 int rc;
1162 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1163 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXEndQuery, VERR_INVALID_STATE);
1164 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1165 AssertReturn(p3dState, VERR_INVALID_STATE);
1166
1167 PVMSVGA3DDXCONTEXT pDXContext;
1168 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1169 AssertRCReturn(rc, rc);
1170
1171 SVGA3dQueryId const queryId = pCmd->queryId;
1172
1173 ASSERT_GUEST_RETURN(pDXContext->cot.paQuery, VERR_INVALID_STATE);
1174 ASSERT_GUEST_RETURN(queryId < pDXContext->cot.cQuery, VERR_INVALID_PARAMETER);
1175 RT_UNTRUSTED_VALIDATED_FENCE();
1176
1177 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[queryId];
1178 rc = dxEndQuery(pThisCC, pDXContext, queryId, pEntry);
1179 return rc;
1180}
1181
1182
1183int vmsvga3dDXReadbackQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXReadbackQuery const *pCmd)
1184{
1185 int rc;
1186 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1187 AssertReturn(pSvgaR3State->pFuncsDX, VERR_INVALID_STATE);
1188 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1189 AssertReturn(p3dState, VERR_INVALID_STATE);
1190
1191 PVMSVGA3DDXCONTEXT pDXContext;
1192 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1193 AssertRCReturn(rc, rc);
1194
1195 SVGA3dQueryId const queryId = pCmd->queryId;
1196
1197 ASSERT_GUEST_RETURN(pDXContext->cot.paQuery, VERR_INVALID_STATE);
1198 ASSERT_GUEST_RETURN(queryId < pDXContext->cot.cQuery, VERR_INVALID_PARAMETER);
1199 RT_UNTRUSTED_VALIDATED_FENCE();
1200
1201 /* The device does not cache queries. So this is a NOP. */
1202
1203 return rc;
1204}
1205
1206
1207int vmsvga3dDXSetPredication(PVGASTATECC pThisCC, uint32_t idDXContext)
1208{
1209 int rc;
1210 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1211 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetPredication, VERR_INVALID_STATE);
1212 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1213 AssertReturn(p3dState, VERR_INVALID_STATE);
1214
1215 PVMSVGA3DDXCONTEXT pDXContext;
1216 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1217 AssertRCReturn(rc, rc);
1218
1219 rc = pSvgaR3State->pFuncsDX->pfnDXSetPredication(pThisCC, pDXContext);
1220 return rc;
1221}
1222
1223
1224int vmsvga3dDXSetSOTargets(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t cSoTarget, SVGA3dSoTarget const *paSoTarget)
1225{
1226 int rc;
1227 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1228 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetSOTargets, VERR_INVALID_STATE);
1229 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1230 AssertReturn(p3dState, VERR_INVALID_STATE);
1231
1232 PVMSVGA3DDXCONTEXT pDXContext;
1233 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1234 AssertRCReturn(rc, rc);
1235
1236 ASSERT_GUEST_RETURN(cSoTarget < SVGA3D_DX_MAX_SOTARGETS, VERR_INVALID_PARAMETER);
1237 RT_UNTRUSTED_VALIDATED_FENCE();
1238
1239 /** @todo Offset is not stored in svgaDXContext. Should it be stored elsewhere? */
1240 for (uint32_t i = 0; i < SVGA3D_DX_MAX_SOTARGETS; ++i)
1241 pDXContext->svgaDXContext.streamOut.targets[i] = i < cSoTarget ? paSoTarget[i].sid : SVGA3D_INVALID_ID;
1242
1243 rc = pSvgaR3State->pFuncsDX->pfnDXSetSOTargets(pThisCC, pDXContext, cSoTarget, paSoTarget);
1244 return rc;
1245}
1246
1247
1248int vmsvga3dDXSetViewports(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t cViewport, SVGA3dViewport const *paViewport)
1249{
1250 int rc;
1251 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1252 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetViewports, VERR_INVALID_STATE);
1253 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1254 AssertReturn(p3dState, VERR_INVALID_STATE);
1255
1256 PVMSVGA3DDXCONTEXT pDXContext;
1257 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1258 AssertRCReturn(rc, rc);
1259
1260 ASSERT_GUEST_RETURN(cViewport <= SVGA3D_DX_MAX_VIEWPORTS, VERR_INVALID_PARAMETER);
1261 RT_UNTRUSTED_VALIDATED_FENCE();
1262
1263 pDXContext->svgaDXContext.numViewports = (uint8_t)cViewport;
1264 for (uint32_t i = 0; i < cViewport; ++i)
1265 pDXContext->svgaDXContext.viewports[i] = paViewport[i];
1266
1267 rc = pSvgaR3State->pFuncsDX->pfnDXSetViewports(pThisCC, pDXContext, cViewport, paViewport);
1268 return rc;
1269}
1270
1271
1272int vmsvga3dDXSetScissorRects(PVGASTATECC pThisCC, uint32_t idDXContext, uint32_t cRect, SVGASignedRect const *paRect)
1273{
1274 int rc;
1275 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1276 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetScissorRects, VERR_INVALID_STATE);
1277 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1278 AssertReturn(p3dState, VERR_INVALID_STATE);
1279
1280 PVMSVGA3DDXCONTEXT pDXContext;
1281 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1282 AssertRCReturn(rc, rc);
1283
1284 ASSERT_GUEST_RETURN(cRect <= SVGA3D_DX_MAX_SCISSORRECTS, VERR_INVALID_PARAMETER);
1285 RT_UNTRUSTED_VALIDATED_FENCE();
1286
1287 pDXContext->svgaDXContext.numScissorRects = (uint8_t)cRect;
1288 for (uint32_t i = 0; i < cRect; ++i)
1289 pDXContext->svgaDXContext.scissorRects[i] = paRect[i];
1290
1291 rc = pSvgaR3State->pFuncsDX->pfnDXSetScissorRects(pThisCC, pDXContext, cRect, paRect);
1292 return rc;
1293}
1294
1295
1296int vmsvga3dDXClearRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXClearRenderTargetView const *pCmd)
1297{
1298 int rc;
1299 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1300 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearRenderTargetView, VERR_INVALID_STATE);
1301 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1302 AssertReturn(p3dState, VERR_INVALID_STATE);
1303
1304 PVMSVGA3DDXCONTEXT pDXContext;
1305 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1306 AssertRCReturn(rc, rc);
1307
1308 SVGA3dRenderTargetViewId const renderTargetViewId = pCmd->renderTargetViewId;
1309
1310 ASSERT_GUEST_RETURN(pDXContext->cot.paRTView, VERR_INVALID_STATE);
1311 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, VERR_INVALID_PARAMETER);
1312 RT_UNTRUSTED_VALIDATED_FENCE();
1313
1314 rc = pSvgaR3State->pFuncsDX->pfnDXClearRenderTargetView(pThisCC, pDXContext, renderTargetViewId, &pCmd->rgba);
1315 return rc;
1316}
1317
1318
1319int vmsvga3dDXClearDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXClearDepthStencilView const *pCmd)
1320{
1321 int rc;
1322 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1323 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearDepthStencilView, VERR_INVALID_STATE);
1324 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1325 AssertReturn(p3dState, VERR_INVALID_STATE);
1326
1327 PVMSVGA3DDXCONTEXT pDXContext;
1328 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1329 AssertRCReturn(rc, rc);
1330
1331 SVGA3dDepthStencilViewId const depthStencilViewId = pCmd->depthStencilViewId;
1332
1333 ASSERT_GUEST_RETURN(pDXContext->cot.paDSView, VERR_INVALID_STATE);
1334 ASSERT_GUEST_RETURN(depthStencilViewId < pDXContext->cot.cDSView, VERR_INVALID_PARAMETER);
1335 RT_UNTRUSTED_VALIDATED_FENCE();
1336
1337 rc = pSvgaR3State->pFuncsDX->pfnDXClearDepthStencilView(pThisCC, pDXContext, pCmd->flags, depthStencilViewId, pCmd->depth, (uint8_t)pCmd->stencil);
1338 return rc;
1339}
1340
1341
1342int vmsvga3dDXPredCopyRegion(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXPredCopyRegion const *pCmd)
1343{
1344 int rc;
1345 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1346 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredCopyRegion, VERR_INVALID_STATE);
1347 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1348 AssertReturn(p3dState, VERR_INVALID_STATE);
1349
1350 PVMSVGA3DDXCONTEXT pDXContext;
1351 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1352 AssertRCReturn(rc, rc);
1353
1354 /** @todo Memcpy if both resources do not have the hardware resource. */
1355
1356 rc = pSvgaR3State->pFuncsDX->pfnDXPredCopyRegion(pThisCC, pDXContext, pCmd->dstSid, pCmd->dstSubResource, pCmd->srcSid, pCmd->srcSubResource, &pCmd->box);
1357 return rc;
1358}
1359
1360
1361int vmsvga3dDXPredCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
1362{
1363 int rc;
1364 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1365 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredCopy, VERR_INVALID_STATE);
1366 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1367 AssertReturn(p3dState, VERR_INVALID_STATE);
1368
1369 PVMSVGA3DDXCONTEXT pDXContext;
1370 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1371 AssertRCReturn(rc, rc);
1372
1373 rc = pSvgaR3State->pFuncsDX->pfnDXPredCopy(pThisCC, pDXContext);
1374 return rc;
1375}
1376
1377
1378int vmsvga3dDXPresentBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
1379{
1380 int rc;
1381 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1382 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPresentBlt, VERR_INVALID_STATE);
1383 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1384 AssertReturn(p3dState, VERR_INVALID_STATE);
1385
1386 PVMSVGA3DDXCONTEXT pDXContext;
1387 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1388 AssertRCReturn(rc, rc);
1389
1390 rc = pSvgaR3State->pFuncsDX->pfnDXPresentBlt(pThisCC, pDXContext);
1391 return rc;
1392}
1393
1394
1395int vmsvga3dDXGenMips(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXGenMips const *pCmd)
1396{
1397 int rc;
1398 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1399 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXGenMips, VERR_INVALID_STATE);
1400 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1401 AssertReturn(p3dState, VERR_INVALID_STATE);
1402
1403 PVMSVGA3DDXCONTEXT pDXContext;
1404 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1405 AssertRCReturn(rc, rc);
1406
1407 SVGA3dShaderResourceViewId const shaderResourceViewId = pCmd->shaderResourceViewId;
1408
1409 ASSERT_GUEST_RETURN(pDXContext->cot.paSRView, VERR_INVALID_STATE);
1410 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->cot.cSRView, VERR_INVALID_PARAMETER);
1411 RT_UNTRUSTED_VALIDATED_FENCE();
1412
1413 rc = pSvgaR3State->pFuncsDX->pfnDXGenMips(pThisCC, pDXContext, shaderResourceViewId);
1414 return rc;
1415}
1416
1417
1418int vmsvga3dDXDefineShaderResourceView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineShaderResourceView const *pCmd)
1419{
1420 int rc;
1421 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1422 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineShaderResourceView, VERR_INVALID_STATE);
1423 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1424 AssertReturn(p3dState, VERR_INVALID_STATE);
1425
1426 PVMSVGA3DDXCONTEXT pDXContext;
1427 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1428 AssertRCReturn(rc, rc);
1429
1430 SVGA3dShaderResourceViewId const shaderResourceViewId = pCmd->shaderResourceViewId;
1431
1432 ASSERT_GUEST_RETURN(pDXContext->cot.paSRView, VERR_INVALID_STATE);
1433 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->cot.cSRView, VERR_INVALID_PARAMETER);
1434 RT_UNTRUSTED_VALIDATED_FENCE();
1435
1436 SVGACOTableDXSRViewEntry *pEntry = &pDXContext->cot.paSRView[shaderResourceViewId];
1437 pEntry->sid = pCmd->sid;
1438 pEntry->format = pCmd->format;
1439 pEntry->resourceDimension = pCmd->resourceDimension;
1440 pEntry->desc = pCmd->desc;
1441
1442 rc = pSvgaR3State->pFuncsDX->pfnDXDefineShaderResourceView(pThisCC, pDXContext, shaderResourceViewId, pEntry);
1443 return rc;
1444}
1445
1446
1447int vmsvga3dDXDestroyShaderResourceView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyShaderResourceView const *pCmd)
1448{
1449 int rc;
1450 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1451 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyShaderResourceView, VERR_INVALID_STATE);
1452 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1453 AssertReturn(p3dState, VERR_INVALID_STATE);
1454
1455 PVMSVGA3DDXCONTEXT pDXContext;
1456 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1457 AssertRCReturn(rc, rc);
1458
1459 SVGA3dShaderResourceViewId const shaderResourceViewId = pCmd->shaderResourceViewId;
1460
1461 ASSERT_GUEST_RETURN(pDXContext->cot.paSRView, VERR_INVALID_STATE);
1462 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->cot.cSRView, VERR_INVALID_PARAMETER);
1463 RT_UNTRUSTED_VALIDATED_FENCE();
1464
1465 SVGACOTableDXSRViewEntry *pEntry = &pDXContext->cot.paSRView[shaderResourceViewId];
1466 RT_ZERO(*pEntry);
1467
1468 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyShaderResourceView(pThisCC, pDXContext, shaderResourceViewId);
1469 return rc;
1470}
1471
1472
1473int vmsvga3dDXDefineRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineRenderTargetView const *pCmd)
1474{
1475 int rc;
1476 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1477 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineRenderTargetView, VERR_INVALID_STATE);
1478 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1479 AssertReturn(p3dState, VERR_INVALID_STATE);
1480
1481 PVMSVGA3DDXCONTEXT pDXContext;
1482 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1483 AssertRCReturn(rc, rc);
1484
1485 SVGA3dRenderTargetViewId const renderTargetViewId = pCmd->renderTargetViewId;
1486
1487 ASSERT_GUEST_RETURN(pDXContext->cot.paRTView, VERR_INVALID_STATE);
1488 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, VERR_INVALID_PARAMETER);
1489 RT_UNTRUSTED_VALIDATED_FENCE();
1490
1491 SVGACOTableDXRTViewEntry *pEntry = &pDXContext->cot.paRTView[renderTargetViewId];
1492 pEntry->sid = pCmd->sid;
1493 pEntry->format = pCmd->format;
1494 pEntry->resourceDimension = pCmd->resourceDimension;
1495 pEntry->desc = pCmd->desc;
1496
1497 rc = pSvgaR3State->pFuncsDX->pfnDXDefineRenderTargetView(pThisCC, pDXContext, renderTargetViewId, pEntry);
1498 return rc;
1499}
1500
1501
1502int vmsvga3dDXDestroyRenderTargetView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyRenderTargetView const *pCmd)
1503{
1504 int rc;
1505 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1506 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyRenderTargetView, VERR_INVALID_STATE);
1507 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1508 AssertReturn(p3dState, VERR_INVALID_STATE);
1509
1510 PVMSVGA3DDXCONTEXT pDXContext;
1511 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1512 AssertRCReturn(rc, rc);
1513
1514 SVGA3dRenderTargetViewId const renderTargetViewId = pCmd->renderTargetViewId;
1515
1516 ASSERT_GUEST_RETURN(pDXContext->cot.paRTView, VERR_INVALID_STATE);
1517 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->cot.cRTView, VERR_INVALID_PARAMETER);
1518 RT_UNTRUSTED_VALIDATED_FENCE();
1519
1520 SVGACOTableDXRTViewEntry *pEntry = &pDXContext->cot.paRTView[renderTargetViewId];
1521 RT_ZERO(*pEntry);
1522
1523 for (uint32_t i = 0; i < SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS; ++i)
1524 {
1525 if (pDXContext->svgaDXContext.renderState.renderTargetViewIds[i] == renderTargetViewId)
1526 pDXContext->svgaDXContext.renderState.renderTargetViewIds[i] = SVGA_ID_INVALID;
1527 }
1528
1529 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyRenderTargetView(pThisCC, pDXContext, renderTargetViewId);
1530 return rc;
1531}
1532
1533
1534int vmsvga3dDXDefineDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineDepthStencilView_v2 const *pCmd)
1535{
1536 int rc;
1537 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1538 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilView, VERR_INVALID_STATE);
1539 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1540 AssertReturn(p3dState, VERR_INVALID_STATE);
1541
1542 PVMSVGA3DDXCONTEXT pDXContext;
1543 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1544 AssertRCReturn(rc, rc);
1545
1546 SVGA3dDepthStencilViewId const depthStencilViewId = pCmd->depthStencilViewId;
1547
1548 ASSERT_GUEST_RETURN(pDXContext->cot.paDSView, VERR_INVALID_STATE);
1549 ASSERT_GUEST_RETURN(depthStencilViewId < pDXContext->cot.cDSView, VERR_INVALID_PARAMETER);
1550 RT_UNTRUSTED_VALIDATED_FENCE();
1551
1552 SVGACOTableDXDSViewEntry *pEntry = &pDXContext->cot.paDSView[depthStencilViewId];
1553 pEntry->sid = pCmd->sid;
1554 pEntry->format = pCmd->format;
1555 pEntry->resourceDimension = pCmd->resourceDimension;
1556 pEntry->mipSlice = pCmd->mipSlice;
1557 pEntry->firstArraySlice = pCmd->firstArraySlice;
1558 pEntry->arraySize = pCmd->arraySize;
1559 pEntry->flags = pCmd->flags;
1560
1561 rc = pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilView(pThisCC, pDXContext, depthStencilViewId, pEntry);
1562 return rc;
1563}
1564
1565
1566int vmsvga3dDXDestroyDepthStencilView(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyDepthStencilView const *pCmd)
1567{
1568 int rc;
1569 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1570 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilView, VERR_INVALID_STATE);
1571 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1572 AssertReturn(p3dState, VERR_INVALID_STATE);
1573
1574 PVMSVGA3DDXCONTEXT pDXContext;
1575 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1576 AssertRCReturn(rc, rc);
1577
1578 SVGA3dDepthStencilViewId const depthStencilViewId = pCmd->depthStencilViewId;
1579
1580 ASSERT_GUEST_RETURN(pDXContext->cot.paDSView, VERR_INVALID_STATE);
1581 ASSERT_GUEST_RETURN(depthStencilViewId < pDXContext->cot.cDSView, VERR_INVALID_PARAMETER);
1582 RT_UNTRUSTED_VALIDATED_FENCE();
1583
1584 SVGACOTableDXDSViewEntry *pEntry = &pDXContext->cot.paDSView[depthStencilViewId];
1585 RT_ZERO(*pEntry);
1586
1587 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilView(pThisCC, pDXContext, depthStencilViewId);
1588 return rc;
1589}
1590
1591
1592int vmsvga3dDXDefineElementLayout(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dElementLayoutId elementLayoutId, uint32_t cDesc, SVGA3dInputElementDesc const *paDesc)
1593{
1594 int rc;
1595 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1596 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineElementLayout, VERR_INVALID_STATE);
1597 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1598 AssertReturn(p3dState, VERR_INVALID_STATE);
1599
1600 PVMSVGA3DDXCONTEXT pDXContext;
1601 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1602 AssertRCReturn(rc, rc);
1603
1604 ASSERT_GUEST_RETURN(pDXContext->cot.paElementLayout, VERR_INVALID_STATE);
1605 ASSERT_GUEST_RETURN(elementLayoutId < pDXContext->cot.cElementLayout, VERR_INVALID_PARAMETER);
1606 RT_UNTRUSTED_VALIDATED_FENCE();
1607
1608 SVGACOTableDXElementLayoutEntry *pEntry = &pDXContext->cot.paElementLayout[elementLayoutId];
1609 pEntry->elid = elementLayoutId;
1610 pEntry->numDescs = RT_MIN(cDesc, RT_ELEMENTS(pEntry->descs));
1611 memcpy(pEntry->descs, paDesc, pEntry->numDescs * sizeof(pEntry->descs[0]));
1612
1613#ifdef LOG_ENABLED
1614 Log6(("Element layout %d: slot off fmt class step reg\n", pEntry->elid));
1615 for (uint32_t i = 0; i < pEntry->numDescs; ++i)
1616 {
1617 Log6((" [%u]: %u 0x%02X %d %u %u %u\n",
1618 i,
1619 pEntry->descs[i].inputSlot,
1620 pEntry->descs[i].alignedByteOffset,
1621 pEntry->descs[i].format,
1622 pEntry->descs[i].inputSlotClass,
1623 pEntry->descs[i].instanceDataStepRate,
1624 pEntry->descs[i].inputRegister
1625 ));
1626 }
1627#endif
1628
1629 rc = pSvgaR3State->pFuncsDX->pfnDXDefineElementLayout(pThisCC, pDXContext, elementLayoutId, pEntry);
1630 return rc;
1631}
1632
1633
1634int vmsvga3dDXDestroyElementLayout(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyElementLayout const *pCmd)
1635{
1636 int rc;
1637 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1638 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyElementLayout, VERR_INVALID_STATE);
1639 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1640 AssertReturn(p3dState, VERR_INVALID_STATE);
1641
1642 PVMSVGA3DDXCONTEXT pDXContext;
1643 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1644 AssertRCReturn(rc, rc);
1645
1646 SVGA3dElementLayoutId const elementLayoutId = pCmd->elementLayoutId;
1647
1648 ASSERT_GUEST_RETURN(pDXContext->cot.paElementLayout, VERR_INVALID_STATE);
1649 ASSERT_GUEST_RETURN(elementLayoutId < pDXContext->cot.cElementLayout, VERR_INVALID_PARAMETER);
1650 RT_UNTRUSTED_VALIDATED_FENCE();
1651
1652 pSvgaR3State->pFuncsDX->pfnDXDestroyElementLayout(pThisCC, pDXContext, elementLayoutId);
1653
1654 SVGACOTableDXElementLayoutEntry *pEntry = &pDXContext->cot.paElementLayout[elementLayoutId];
1655 RT_ZERO(*pEntry);
1656 pEntry->elid = SVGA3D_INVALID_ID;
1657
1658 return rc;
1659}
1660
1661
1662int vmsvga3dDXDefineBlendState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineBlendState const *pCmd)
1663{
1664 int rc;
1665 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1666 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineBlendState, VERR_INVALID_STATE);
1667 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1668 AssertReturn(p3dState, VERR_INVALID_STATE);
1669
1670 PVMSVGA3DDXCONTEXT pDXContext;
1671 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1672 AssertRCReturn(rc, rc);
1673
1674 SVGA3dBlendStateId const blendId = pCmd->blendId;
1675
1676 ASSERT_GUEST_RETURN(pDXContext->cot.paBlendState, VERR_INVALID_STATE);
1677 ASSERT_GUEST_RETURN(blendId < pDXContext->cot.cBlendState, VERR_INVALID_PARAMETER);
1678 RT_UNTRUSTED_VALIDATED_FENCE();
1679
1680 SVGACOTableDXBlendStateEntry *pEntry = &pDXContext->cot.paBlendState[blendId];
1681 pEntry->alphaToCoverageEnable = pCmd->alphaToCoverageEnable;
1682 pEntry->independentBlendEnable = pCmd->independentBlendEnable;
1683 memcpy(pEntry->perRT, pCmd->perRT, sizeof(pEntry->perRT));
1684
1685 rc = pSvgaR3State->pFuncsDX->pfnDXDefineBlendState(pThisCC, pDXContext, blendId, pEntry);
1686 return rc;
1687}
1688
1689
1690int vmsvga3dDXDestroyBlendState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyBlendState const *pCmd)
1691{
1692 int rc;
1693 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1694 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyBlendState, VERR_INVALID_STATE);
1695 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1696 AssertReturn(p3dState, VERR_INVALID_STATE);
1697
1698 PVMSVGA3DDXCONTEXT pDXContext;
1699 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1700 AssertRCReturn(rc, rc);
1701
1702 SVGA3dBlendStateId const blendId = pCmd->blendId;
1703
1704 ASSERT_GUEST_RETURN(pDXContext->cot.paBlendState, VERR_INVALID_STATE);
1705 ASSERT_GUEST_RETURN(blendId < pDXContext->cot.cBlendState, VERR_INVALID_PARAMETER);
1706 RT_UNTRUSTED_VALIDATED_FENCE();
1707
1708 pSvgaR3State->pFuncsDX->pfnDXDestroyBlendState(pThisCC, pDXContext, blendId);
1709
1710 SVGACOTableDXBlendStateEntry *pEntry = &pDXContext->cot.paBlendState[blendId];
1711 RT_ZERO(*pEntry);
1712
1713 return rc;
1714}
1715
1716
1717int vmsvga3dDXDefineDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineDepthStencilState const *pCmd)
1718{
1719 int rc;
1720 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1721 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilState, VERR_INVALID_STATE);
1722 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1723 AssertReturn(p3dState, VERR_INVALID_STATE);
1724
1725 PVMSVGA3DDXCONTEXT pDXContext;
1726 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1727 AssertRCReturn(rc, rc);
1728
1729 SVGA3dDepthStencilStateId const depthStencilId = pCmd->depthStencilId;
1730
1731 ASSERT_GUEST_RETURN(pDXContext->cot.paDepthStencil, VERR_INVALID_STATE);
1732 ASSERT_GUEST_RETURN(depthStencilId < pDXContext->cot.cDepthStencil, VERR_INVALID_PARAMETER);
1733 RT_UNTRUSTED_VALIDATED_FENCE();
1734
1735 SVGACOTableDXDepthStencilEntry *pEntry = &pDXContext->cot.paDepthStencil[depthStencilId];
1736 pEntry->depthEnable = pCmd->depthEnable;
1737 pEntry->depthWriteMask = pCmd->depthWriteMask;
1738 pEntry->depthFunc = pCmd->depthFunc;
1739 pEntry->stencilEnable = pCmd->stencilEnable;
1740 pEntry->frontEnable = pCmd->frontEnable;
1741 pEntry->backEnable = pCmd->backEnable;
1742 pEntry->stencilReadMask = pCmd->stencilReadMask;
1743 pEntry->stencilWriteMask = pCmd->stencilWriteMask;
1744
1745 pEntry->frontStencilFailOp = pCmd->frontStencilFailOp;
1746 pEntry->frontStencilDepthFailOp = pCmd->frontStencilDepthFailOp;
1747 pEntry->frontStencilPassOp = pCmd->frontStencilPassOp;
1748 pEntry->frontStencilFunc = pCmd->frontStencilFunc;
1749
1750 pEntry->backStencilFailOp = pCmd->backStencilFailOp;
1751 pEntry->backStencilDepthFailOp = pCmd->backStencilDepthFailOp;
1752 pEntry->backStencilPassOp = pCmd->backStencilPassOp;
1753 pEntry->backStencilFunc = pCmd->backStencilFunc;
1754
1755 rc = pSvgaR3State->pFuncsDX->pfnDXDefineDepthStencilState(pThisCC, pDXContext, depthStencilId, pEntry);
1756 return rc;
1757}
1758
1759
1760int vmsvga3dDXDestroyDepthStencilState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyDepthStencilState const *pCmd)
1761{
1762 int rc;
1763 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1764 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilState, VERR_INVALID_STATE);
1765 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1766 AssertReturn(p3dState, VERR_INVALID_STATE);
1767
1768 PVMSVGA3DDXCONTEXT pDXContext;
1769 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1770 AssertRCReturn(rc, rc);
1771
1772 SVGA3dDepthStencilStateId const depthStencilId = pCmd->depthStencilId;
1773
1774 ASSERT_GUEST_RETURN(pDXContext->cot.paDepthStencil, VERR_INVALID_STATE);
1775 ASSERT_GUEST_RETURN(depthStencilId < pDXContext->cot.cDepthStencil, VERR_INVALID_PARAMETER);
1776 RT_UNTRUSTED_VALIDATED_FENCE();
1777
1778 pSvgaR3State->pFuncsDX->pfnDXDestroyDepthStencilState(pThisCC, pDXContext, depthStencilId);
1779
1780 SVGACOTableDXDepthStencilEntry *pEntry = &pDXContext->cot.paDepthStencil[depthStencilId];
1781 RT_ZERO(*pEntry);
1782
1783 return rc;
1784}
1785
1786
1787int vmsvga3dDXDefineRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineRasterizerState const *pCmd)
1788{
1789 int rc;
1790 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1791 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineRasterizerState, VERR_INVALID_STATE);
1792 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1793 AssertReturn(p3dState, VERR_INVALID_STATE);
1794
1795 PVMSVGA3DDXCONTEXT pDXContext;
1796 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1797 AssertRCReturn(rc, rc);
1798
1799 SVGA3dRasterizerStateId const rasterizerId = pCmd->rasterizerId;
1800
1801 ASSERT_GUEST_RETURN(pDXContext->cot.paRasterizerState, VERR_INVALID_STATE);
1802 ASSERT_GUEST_RETURN(rasterizerId < pDXContext->cot.cRasterizerState, VERR_INVALID_PARAMETER);
1803 RT_UNTRUSTED_VALIDATED_FENCE();
1804
1805 SVGACOTableDXRasterizerStateEntry *pEntry = &pDXContext->cot.paRasterizerState[rasterizerId];
1806 pEntry->fillMode = pCmd->fillMode;
1807 pEntry->cullMode = pCmd->cullMode;
1808 pEntry->frontCounterClockwise = pCmd->frontCounterClockwise;
1809 pEntry->provokingVertexLast = pCmd->provokingVertexLast;
1810 pEntry->depthBias = pCmd->depthBias;
1811 pEntry->depthBiasClamp = pCmd->depthBiasClamp;
1812 pEntry->slopeScaledDepthBias = pCmd->slopeScaledDepthBias;
1813 pEntry->depthClipEnable = pCmd->depthClipEnable;
1814 pEntry->scissorEnable = pCmd->scissorEnable;
1815 pEntry->multisampleEnable = pCmd->multisampleEnable;
1816 pEntry->antialiasedLineEnable = pCmd->antialiasedLineEnable;
1817 pEntry->lineWidth = pCmd->lineWidth;
1818 pEntry->lineStippleEnable = pCmd->lineStippleEnable;
1819 pEntry->lineStippleFactor = pCmd->lineStippleFactor;
1820 pEntry->lineStipplePattern = pCmd->lineStipplePattern;
1821 pEntry->forcedSampleCount = 0; /** @todo Not in pCmd. */
1822 RT_ZERO(pEntry->mustBeZero);
1823
1824 rc = pSvgaR3State->pFuncsDX->pfnDXDefineRasterizerState(pThisCC, pDXContext, rasterizerId, pEntry);
1825 return rc;
1826}
1827
1828
1829int vmsvga3dDXDestroyRasterizerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyRasterizerState const *pCmd)
1830{
1831 int rc;
1832 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1833 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyRasterizerState, VERR_INVALID_STATE);
1834 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1835 AssertReturn(p3dState, VERR_INVALID_STATE);
1836
1837 PVMSVGA3DDXCONTEXT pDXContext;
1838 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1839 AssertRCReturn(rc, rc);
1840
1841 SVGA3dRasterizerStateId const rasterizerId = pCmd->rasterizerId;
1842
1843 ASSERT_GUEST_RETURN(pDXContext->cot.paRasterizerState, VERR_INVALID_STATE);
1844 ASSERT_GUEST_RETURN(rasterizerId < pDXContext->cot.cRasterizerState, VERR_INVALID_PARAMETER);
1845 RT_UNTRUSTED_VALIDATED_FENCE();
1846
1847 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyRasterizerState(pThisCC, pDXContext, rasterizerId);
1848
1849 SVGACOTableDXRasterizerStateEntry *pEntry = &pDXContext->cot.paRasterizerState[rasterizerId];
1850 RT_ZERO(*pEntry);
1851
1852 return rc;
1853}
1854
1855
1856int vmsvga3dDXDefineSamplerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineSamplerState const *pCmd)
1857{
1858 int rc;
1859 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1860 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineSamplerState, VERR_INVALID_STATE);
1861 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1862 AssertReturn(p3dState, VERR_INVALID_STATE);
1863
1864 PVMSVGA3DDXCONTEXT pDXContext;
1865 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1866 AssertRCReturn(rc, rc);
1867
1868 SVGA3dSamplerId const samplerId = pCmd->samplerId;
1869
1870 ASSERT_GUEST_RETURN(pDXContext->cot.paSampler, VERR_INVALID_STATE);
1871 ASSERT_GUEST_RETURN(samplerId < pDXContext->cot.cSampler, VERR_INVALID_PARAMETER);
1872 RT_UNTRUSTED_VALIDATED_FENCE();
1873
1874 SVGACOTableDXSamplerEntry *pEntry = &pDXContext->cot.paSampler[samplerId];
1875 pEntry->filter = pCmd->filter;
1876 pEntry->addressU = pCmd->addressU;
1877 pEntry->addressV = pCmd->addressV;
1878 pEntry->addressW = pCmd->addressW;
1879 pEntry->mipLODBias = pCmd->mipLODBias;
1880 pEntry->maxAnisotropy = pCmd->maxAnisotropy;
1881 pEntry->comparisonFunc = pCmd->comparisonFunc;
1882 pEntry->borderColor = pCmd->borderColor;
1883 pEntry->minLOD = pCmd->minLOD;
1884 pEntry->maxLOD = pCmd->maxLOD;
1885
1886 rc = pSvgaR3State->pFuncsDX->pfnDXDefineSamplerState(pThisCC, pDXContext, samplerId, pEntry);
1887 return rc;
1888}
1889
1890
1891int vmsvga3dDXDestroySamplerState(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroySamplerState const *pCmd)
1892{
1893 int rc;
1894 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1895 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroySamplerState, VERR_INVALID_STATE);
1896 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1897 AssertReturn(p3dState, VERR_INVALID_STATE);
1898
1899 PVMSVGA3DDXCONTEXT pDXContext;
1900 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1901 AssertRCReturn(rc, rc);
1902
1903 SVGA3dSamplerId const samplerId = pCmd->samplerId;
1904
1905 ASSERT_GUEST_RETURN(pDXContext->cot.paSampler, VERR_INVALID_STATE);
1906 ASSERT_GUEST_RETURN(samplerId < pDXContext->cot.cSampler, VERR_INVALID_PARAMETER);
1907 RT_UNTRUSTED_VALIDATED_FENCE();
1908
1909 pSvgaR3State->pFuncsDX->pfnDXDestroySamplerState(pThisCC, pDXContext, samplerId);
1910
1911 SVGACOTableDXSamplerEntry *pEntry = &pDXContext->cot.paSampler[samplerId];
1912 RT_ZERO(*pEntry);
1913
1914 return rc;
1915}
1916
1917
1918int vmsvga3dDXDefineShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineShader const *pCmd)
1919{
1920 int rc;
1921 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1922 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineShader, VERR_INVALID_STATE);
1923 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1924 AssertReturn(p3dState, VERR_INVALID_STATE);
1925
1926 PVMSVGA3DDXCONTEXT pDXContext;
1927 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1928 AssertRCReturn(rc, rc);
1929
1930 SVGA3dShaderId const shaderId = pCmd->shaderId;
1931
1932 ASSERT_GUEST_RETURN(pDXContext->cot.paShader, VERR_INVALID_STATE);
1933 ASSERT_GUEST_RETURN(shaderId < pDXContext->cot.cShader, VERR_INVALID_PARAMETER);
1934 ASSERT_GUEST_RETURN(pCmd->type >= SVGA3D_SHADERTYPE_MIN && pCmd->type < SVGA3D_SHADERTYPE_MAX, VERR_INVALID_PARAMETER);
1935 ASSERT_GUEST_RETURN(pCmd->sizeInBytes >= 8, VERR_INVALID_PARAMETER); /* Version Token + Length Token. */
1936 RT_UNTRUSTED_VALIDATED_FENCE();
1937
1938 /* Cleanup the current shader. */
1939 pSvgaR3State->pFuncsDX->pfnDXDestroyShader(pThisCC, pDXContext, shaderId);
1940
1941 SVGACOTableDXShaderEntry *pEntry = &pDXContext->cot.paShader[shaderId];
1942 pEntry->type = pCmd->type;
1943 pEntry->sizeInBytes = pCmd->sizeInBytes;
1944 pEntry->offsetInBytes = 0;
1945 pEntry->mobid = SVGA_ID_INVALID;
1946
1947 rc = pSvgaR3State->pFuncsDX->pfnDXDefineShader(pThisCC, pDXContext, shaderId, pEntry);
1948 return rc;
1949}
1950
1951
1952int vmsvga3dDXDestroyShader(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyShader const *pCmd)
1953{
1954 int rc;
1955 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
1956 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyShader, VERR_INVALID_STATE);
1957 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1958 AssertReturn(p3dState, VERR_INVALID_STATE);
1959
1960 PVMSVGA3DDXCONTEXT pDXContext;
1961 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
1962 AssertRCReturn(rc, rc);
1963
1964 SVGA3dShaderId const shaderId = pCmd->shaderId;
1965
1966 ASSERT_GUEST_RETURN(pDXContext->cot.paShader, VERR_INVALID_STATE);
1967 ASSERT_GUEST_RETURN(shaderId < pDXContext->cot.cShader, VERR_INVALID_PARAMETER);
1968 RT_UNTRUSTED_VALIDATED_FENCE();
1969
1970 pSvgaR3State->pFuncsDX->pfnDXDestroyShader(pThisCC, pDXContext, shaderId);
1971
1972 /* Cleanup COTable entries.*/
1973 SVGACOTableDXShaderEntry *pEntry = &pDXContext->cot.paShader[shaderId];
1974 pEntry->type = SVGA3D_SHADERTYPE_INVALID;
1975 pEntry->sizeInBytes = 0;
1976 pEntry->offsetInBytes = 0;
1977 pEntry->mobid = SVGA_ID_INVALID;
1978
1979 /** @todo Destroy shaders on context and backend deletion. */
1980 return rc;
1981}
1982
1983
1984static int dxBindShader(DXShaderInfo *pShaderInfo, PVMSVGAMOB pMob, SVGACOTableDXShaderEntry const *pEntry, void const *pvShaderBytecode)
1985{
1986 /* How many bytes the MOB can hold. */
1987 uint32_t const cbMob = vmsvgaR3MobSize(pMob) - pEntry->offsetInBytes;
1988 ASSERT_GUEST_RETURN(cbMob >= pEntry->sizeInBytes, VERR_INVALID_PARAMETER);
1989 AssertReturn(pEntry->sizeInBytes >= 8, VERR_INTERNAL_ERROR); /* Host ensures this in DefineShader. */
1990
1991 int rc = DXShaderParse(pvShaderBytecode, pEntry->sizeInBytes, pShaderInfo);
1992 if (RT_SUCCESS(rc))
1993 {
1994 /* Get the length of the shader bytecode. */
1995 uint32_t const *pau32Token = (uint32_t *)pvShaderBytecode; /* Tokens */
1996 uint32_t const cToken = pau32Token[1]; /* Length of the shader in tokens. */
1997 ASSERT_GUEST_RETURN(cToken <= pEntry->sizeInBytes / 4, VERR_INVALID_PARAMETER);
1998
1999 /* Check if the shader contains SVGA3dDXSignatureHeader and signature entries after the bytecode.
2000 * If they are not there (Linux guest driver does not provide them), then it is fine
2001 * and the signatures generated by DXShaderParse will be used.
2002 */
2003 uint32_t cbSignaturesAvail = pEntry->sizeInBytes - cToken * 4; /* How many bytes for signatures are available. */
2004 if (cbSignaturesAvail > sizeof(SVGA3dDXSignatureHeader))
2005 {
2006 cbSignaturesAvail -= sizeof(SVGA3dDXSignatureHeader);
2007
2008 SVGA3dDXSignatureHeader const *pSignatureHeader = (SVGA3dDXSignatureHeader *)((uint8_t *)pvShaderBytecode + cToken * 4);
2009 if (pSignatureHeader->headerVersion == SVGADX_SIGNATURE_HEADER_VERSION_0)
2010 {
2011 ASSERT_GUEST_RETURN( pSignatureHeader->numInputSignatures <= RT_ELEMENTS(pShaderInfo->aInputSignature)
2012 && pSignatureHeader->numOutputSignatures <= RT_ELEMENTS(pShaderInfo->aOutputSignature)
2013 && pSignatureHeader->numPatchConstantSignatures <= RT_ELEMENTS(pShaderInfo->aPatchConstantSignature),
2014 VERR_INVALID_PARAMETER);
2015
2016 uint32_t const cSignature = pSignatureHeader->numInputSignatures
2017 + pSignatureHeader->numOutputSignatures
2018 + pSignatureHeader->numPatchConstantSignatures;
2019 uint32_t const cbSignature = cSignature * sizeof(SVGA3dDXSignatureEntry);
2020 ASSERT_GUEST_RETURN(cbSignaturesAvail >= cbSignature, VERR_INVALID_PARAMETER);
2021
2022 /* Copy to DXShaderInfo. */
2023 uint8_t const *pu8Signatures = (uint8_t *)&pSignatureHeader[1];
2024 pShaderInfo->cInputSignature = pSignatureHeader->numInputSignatures;
2025 memcpy(pShaderInfo->aInputSignature, pu8Signatures, pSignatureHeader->numInputSignatures * sizeof(SVGA3dDXSignatureEntry));
2026
2027 pu8Signatures += pSignatureHeader->numInputSignatures * sizeof(SVGA3dDXSignatureEntry);
2028 pShaderInfo->cOutputSignature = pSignatureHeader->numOutputSignatures;
2029 memcpy(pShaderInfo->aOutputSignature, pu8Signatures, pSignatureHeader->numOutputSignatures * sizeof(SVGA3dDXSignatureEntry));
2030
2031 pu8Signatures += pSignatureHeader->numOutputSignatures * sizeof(SVGA3dDXSignatureEntry);
2032 pShaderInfo->cPatchConstantSignature = pSignatureHeader->numPatchConstantSignatures;
2033 memcpy(pShaderInfo->aPatchConstantSignature, pu8Signatures, pSignatureHeader->numPatchConstantSignatures * sizeof(SVGA3dDXSignatureEntry));
2034
2035 /* The shader does not need guesswork. */
2036 pShaderInfo->fGuestSignatures = true;
2037 }
2038 }
2039 }
2040
2041 return rc;
2042}
2043
2044
2045int vmsvga3dDXBindShader(PVGASTATECC pThisCC, SVGA3dCmdDXBindShader const *pCmd, PVMSVGAMOB pMob)
2046{
2047 int rc;
2048 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2049 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindShader, VERR_INVALID_STATE);
2050 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2051 AssertReturn(p3dState, VERR_INVALID_STATE);
2052
2053 PVMSVGA3DDXCONTEXT pDXContext;
2054 rc = vmsvga3dDXContextFromCid(p3dState, pCmd->cid, &pDXContext);
2055 AssertRCReturn(rc, rc);
2056
2057 ASSERT_GUEST_RETURN(pCmd->shid < pDXContext->cot.cShader, VERR_INVALID_PARAMETER);
2058 RT_UNTRUSTED_VALIDATED_FENCE();
2059
2060 /* 'type' and 'sizeInBytes' has been already initialized by DefineShader. */
2061 SVGACOTableDXShaderEntry *pEntry = &pDXContext->cot.paShader[pCmd->shid];
2062 //pEntry->type;
2063 //pEntry->sizeInBytes;
2064 pEntry->offsetInBytes = pCmd->offsetInBytes;
2065 pEntry->mobid = vmsvgaR3MobId(pMob);
2066
2067 if (pMob)
2068 {
2069 /* Bind a mob to the shader. */
2070
2071 /* Create a memory pointer for the MOB, which is accessible by host. */
2072 rc = vmsvgaR3MobBackingStoreCreate(pSvgaR3State, pMob, vmsvgaR3MobSize(pMob));
2073 if (RT_SUCCESS(rc))
2074 {
2075 /* Get pointer to the shader bytecode. This will also verify the offset. */
2076 void const *pvShaderBytecode = vmsvgaR3MobBackingStorePtr(pMob, pEntry->offsetInBytes);
2077 ASSERT_GUEST_RETURN(pvShaderBytecode, VERR_INVALID_PARAMETER);
2078
2079 /* Get the shader and optional signatures from the MOB. */
2080 DXShaderInfo shaderInfo;
2081 RT_ZERO(shaderInfo);
2082 rc = dxBindShader(&shaderInfo, pMob, pEntry, pvShaderBytecode);
2083 if (RT_SUCCESS(rc))
2084 {
2085 /* pfnDXBindShader makes a copy of shaderInfo on success. */
2086 rc = pSvgaR3State->pFuncsDX->pfnDXBindShader(pThisCC, pDXContext, pCmd->shid, &shaderInfo);
2087 }
2088 AssertRC(rc);
2089
2090 /** @todo Backing store is not needed anymore in any case? */
2091 if (RT_FAILURE(rc))
2092 {
2093 DXShaderFree(&shaderInfo);
2094
2095 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
2096 }
2097 }
2098 }
2099 else
2100 {
2101 /* Unbind. */
2102 /** @todo Nothing to do here but release the MOB? */
2103 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
2104 }
2105
2106 return rc;
2107}
2108
2109
2110int vmsvga3dDXDefineStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDefineStreamOutput const *pCmd)
2111{
2112 int rc;
2113 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2114 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutput, VERR_INVALID_STATE);
2115 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2116 AssertReturn(p3dState, VERR_INVALID_STATE);
2117
2118 PVMSVGA3DDXCONTEXT pDXContext;
2119 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2120 AssertRCReturn(rc, rc);
2121
2122 SVGA3dStreamOutputId const soid = pCmd->soid;
2123
2124 ASSERT_GUEST_RETURN(pDXContext->cot.paStreamOutput, VERR_INVALID_STATE);
2125 ASSERT_GUEST_RETURN(soid < pDXContext->cot.cStreamOutput, VERR_INVALID_PARAMETER);
2126 ASSERT_GUEST_RETURN(pCmd->numOutputStreamEntries < SVGA3D_MAX_DX10_STREAMOUT_DECLS, VERR_INVALID_PARAMETER);
2127 RT_UNTRUSTED_VALIDATED_FENCE();
2128
2129 SVGACOTableDXStreamOutputEntry *pEntry = &pDXContext->cot.paStreamOutput[soid];
2130 pEntry->numOutputStreamEntries = pCmd->numOutputStreamEntries;
2131 memcpy(pEntry->decl, pCmd->decl, sizeof(pEntry->decl));
2132 memcpy(pEntry->streamOutputStrideInBytes, pCmd->streamOutputStrideInBytes, sizeof(pEntry->streamOutputStrideInBytes));
2133 pEntry->rasterizedStream = 0; // Apparently invalid in this command: pCmd->rasterizedStream;
2134 pEntry->numOutputStreamStrides = 0;
2135 pEntry->mobid = SVGA_ID_INVALID;
2136 pEntry->offsetInBytes = 0;
2137 pEntry->usesMob = 0;
2138 pEntry->pad0 = 0;
2139 pEntry->pad1 = 0;
2140 RT_ZERO(pEntry->pad2);
2141
2142 rc = pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutput(pThisCC, pDXContext, soid, pEntry);
2143 return rc;
2144}
2145
2146
2147int vmsvga3dDXDestroyStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXDestroyStreamOutput const *pCmd)
2148{
2149 int rc;
2150 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2151 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyStreamOutput, VERR_INVALID_STATE);
2152 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2153 AssertReturn(p3dState, VERR_INVALID_STATE);
2154
2155 PVMSVGA3DDXCONTEXT pDXContext;
2156 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2157 AssertRCReturn(rc, rc);
2158
2159 SVGA3dStreamOutputId const soid = pCmd->soid;
2160
2161 ASSERT_GUEST_RETURN(pDXContext->cot.paStreamOutput, VERR_INVALID_STATE);
2162 ASSERT_GUEST_RETURN(soid < pDXContext->cot.cStreamOutput, VERR_INVALID_PARAMETER);
2163 RT_UNTRUSTED_VALIDATED_FENCE();
2164
2165 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyStreamOutput(pThisCC, pDXContext, soid);
2166
2167 SVGACOTableDXStreamOutputEntry *pEntry = &pDXContext->cot.paStreamOutput[soid];
2168 RT_ZERO(*pEntry);
2169 pEntry->mobid = SVGA_ID_INVALID;
2170
2171 return rc;
2172}
2173
2174
2175int vmsvga3dDXSetStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXSetStreamOutput const *pCmd)
2176{
2177 int rc;
2178 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2179 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetStreamOutput, VERR_INVALID_STATE);
2180 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2181 AssertReturn(p3dState, VERR_INVALID_STATE);
2182
2183 PVMSVGA3DDXCONTEXT pDXContext;
2184 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2185 AssertRCReturn(rc, rc);
2186
2187 SVGA3dStreamOutputId const soid = pCmd->soid;
2188
2189 ASSERT_GUEST_RETURN(pDXContext->cot.paStreamOutput, VERR_INVALID_STATE);
2190 ASSERT_GUEST_RETURN( soid == SVGA_ID_INVALID
2191 || soid < pDXContext->cot.cStreamOutput, VERR_INVALID_PARAMETER);
2192 RT_UNTRUSTED_VALIDATED_FENCE();
2193
2194 pDXContext->svgaDXContext.streamOut.soid = soid;
2195
2196 rc = pSvgaR3State->pFuncsDX->pfnDXSetStreamOutput(pThisCC, pDXContext, soid);
2197 return rc;
2198}
2199
2200
2201int vmsvga3dDXSetCOTable(PVGASTATECC pThisCC, SVGA3dCmdDXSetCOTable const *pCmd, PVMSVGAMOB pMob)
2202{
2203 int rc;
2204 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2205 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetCOTable, VERR_INVALID_STATE);
2206 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2207 AssertReturn(p3dState, VERR_INVALID_STATE);
2208
2209 PVMSVGA3DDXCONTEXT pDXContext;
2210 rc = vmsvga3dDXContextFromCid(p3dState, pCmd->cid, &pDXContext);
2211 AssertRCReturn(rc, rc);
2212 RT_UNTRUSTED_VALIDATED_FENCE();
2213
2214 ASSERT_GUEST_RETURN(pCmd->type < RT_ELEMENTS(pDXContext->aCOTMobs), VERR_INVALID_PARAMETER);
2215 RT_UNTRUSTED_VALIDATED_FENCE();
2216
2217 uint32_t validSizeInBytes;
2218 uint32_t cbCOT;
2219 if (pMob)
2220 {
2221 /* Bind a mob to the COTable. */
2222 validSizeInBytes = pCmd->validSizeInBytes;
2223 cbCOT = vmsvgaR3MobSize(pMob);
2224
2225 ASSERT_GUEST_RETURN(validSizeInBytes <= cbCOT, VERR_INVALID_PARAMETER);
2226 RT_UNTRUSTED_VALIDATED_FENCE();
2227
2228 /* Create a memory pointer, which is accessible by host. */
2229 rc = vmsvgaR3MobBackingStoreCreate(pSvgaR3State, pMob, validSizeInBytes);
2230 }
2231 else
2232 {
2233 /* Unbind. */
2234 validSizeInBytes = 0;
2235 cbCOT = 0;
2236 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pDXContext->aCOTMobs[pCmd->type]);
2237 }
2238
2239 uint32_t cEntries = 0;
2240 uint32_t cValidEntries = 0;
2241 if (RT_SUCCESS(rc))
2242 {
2243 static uint32_t const s_acbEntry[SVGA_COTABLE_MAX] =
2244 {
2245 sizeof(SVGACOTableDXRTViewEntry),
2246 sizeof(SVGACOTableDXDSViewEntry),
2247 sizeof(SVGACOTableDXSRViewEntry),
2248 sizeof(SVGACOTableDXElementLayoutEntry),
2249 sizeof(SVGACOTableDXBlendStateEntry),
2250 sizeof(SVGACOTableDXDepthStencilEntry),
2251 sizeof(SVGACOTableDXRasterizerStateEntry),
2252 sizeof(SVGACOTableDXSamplerEntry),
2253 sizeof(SVGACOTableDXStreamOutputEntry),
2254 sizeof(SVGACOTableDXQueryEntry),
2255 sizeof(SVGACOTableDXShaderEntry),
2256 sizeof(SVGACOTableDXUAViewEntry),
2257 };
2258
2259 cEntries = cbCOT / s_acbEntry[pCmd->type];
2260 cValidEntries = validSizeInBytes / s_acbEntry[pCmd->type];
2261 }
2262
2263 if (RT_SUCCESS(rc))
2264 {
2265 pDXContext->aCOTMobs[pCmd->type] = pMob;
2266
2267 void *pvCOT = vmsvgaR3MobBackingStorePtr(pMob, 0);
2268 switch (pCmd->type)
2269 {
2270 case SVGA_COTABLE_RTVIEW:
2271 pDXContext->cot.paRTView = (SVGACOTableDXRTViewEntry *)pvCOT;
2272 pDXContext->cot.cRTView = cEntries;
2273 break;
2274 case SVGA_COTABLE_DSVIEW:
2275 pDXContext->cot.paDSView = (SVGACOTableDXDSViewEntry *)pvCOT;
2276 pDXContext->cot.cDSView = cEntries;
2277 break;
2278 case SVGA_COTABLE_SRVIEW:
2279 pDXContext->cot.paSRView = (SVGACOTableDXSRViewEntry *)pvCOT;
2280 pDXContext->cot.cSRView = cEntries;
2281 break;
2282 case SVGA_COTABLE_ELEMENTLAYOUT:
2283 pDXContext->cot.paElementLayout = (SVGACOTableDXElementLayoutEntry *)pvCOT;
2284 pDXContext->cot.cElementLayout = cEntries;
2285 break;
2286 case SVGA_COTABLE_BLENDSTATE:
2287 pDXContext->cot.paBlendState = (SVGACOTableDXBlendStateEntry *)pvCOT;
2288 pDXContext->cot.cBlendState = cEntries;
2289 break;
2290 case SVGA_COTABLE_DEPTHSTENCIL:
2291 pDXContext->cot.paDepthStencil = (SVGACOTableDXDepthStencilEntry *)pvCOT;
2292 pDXContext->cot.cDepthStencil = cEntries;
2293 break;
2294 case SVGA_COTABLE_RASTERIZERSTATE:
2295 pDXContext->cot.paRasterizerState = (SVGACOTableDXRasterizerStateEntry *)pvCOT;
2296 pDXContext->cot.cRasterizerState = cEntries;
2297 break;
2298 case SVGA_COTABLE_SAMPLER:
2299 pDXContext->cot.paSampler = (SVGACOTableDXSamplerEntry *)pvCOT;
2300 pDXContext->cot.cSampler = cEntries;
2301 break;
2302 case SVGA_COTABLE_STREAMOUTPUT:
2303 pDXContext->cot.paStreamOutput = (SVGACOTableDXStreamOutputEntry *)pvCOT;
2304 pDXContext->cot.cStreamOutput = cEntries;
2305 break;
2306 case SVGA_COTABLE_DXQUERY:
2307 pDXContext->cot.paQuery = (SVGACOTableDXQueryEntry *)pvCOT;
2308 pDXContext->cot.cQuery = cEntries;
2309 break;
2310 case SVGA_COTABLE_DXSHADER:
2311 pDXContext->cot.paShader = (SVGACOTableDXShaderEntry *)pvCOT;
2312 pDXContext->cot.cShader = cEntries;
2313 break;
2314 case SVGA_COTABLE_UAVIEW:
2315 pDXContext->cot.paUAView = (SVGACOTableDXUAViewEntry *)pvCOT;
2316 pDXContext->cot.cUAView = cEntries;
2317 break;
2318 case SVGA_COTABLE_MAX: break; /* Compiler warning */
2319 }
2320 }
2321 else
2322 vmsvgaR3MobBackingStoreDelete(pSvgaR3State, pMob);
2323
2324 /* Notify the backend. */
2325 if (RT_SUCCESS(rc))
2326 rc = pSvgaR3State->pFuncsDX->pfnDXSetCOTable(pThisCC, pDXContext, pCmd->type, cValidEntries);
2327
2328 return rc;
2329}
2330
2331
2332int vmsvga3dDXReadbackCOTable(PVGASTATECC pThisCC, SVGA3dCmdDXReadbackCOTable const *pCmd)
2333{
2334 int rc;
2335 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2336 AssertReturn(pSvgaR3State->pFuncsDX, VERR_INVALID_STATE);
2337 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2338 AssertReturn(p3dState, VERR_INVALID_STATE);
2339
2340 PVMSVGA3DDXCONTEXT pDXContext;
2341 rc = vmsvga3dDXContextFromCid(p3dState, pCmd->cid, &pDXContext);
2342 AssertRCReturn(rc, rc);
2343 RT_UNTRUSTED_VALIDATED_FENCE();
2344
2345 ASSERT_GUEST_RETURN(pCmd->type < RT_ELEMENTS(pDXContext->aCOTMobs), VERR_INVALID_PARAMETER);
2346 RT_UNTRUSTED_VALIDATED_FENCE();
2347
2348 PVMSVGAMOB pMob = pDXContext->aCOTMobs[pCmd->type];
2349 rc = vmsvgaR3MobBackingStoreWriteToGuest(pSvgaR3State, pMob);
2350 return rc;
2351}
2352
2353
2354int vmsvga3dDXBufferCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2355{
2356 int rc;
2357 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2358 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBufferCopy, VERR_INVALID_STATE);
2359 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2360 AssertReturn(p3dState, VERR_INVALID_STATE);
2361
2362 PVMSVGA3DDXCONTEXT pDXContext;
2363 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2364 AssertRCReturn(rc, rc);
2365
2366 rc = pSvgaR3State->pFuncsDX->pfnDXBufferCopy(pThisCC, pDXContext);
2367 return rc;
2368}
2369
2370
2371int vmsvga3dDXSurfaceCopyAndReadback(PVGASTATECC pThisCC, uint32_t idDXContext)
2372{
2373 int rc;
2374 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2375 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSurfaceCopyAndReadback, VERR_INVALID_STATE);
2376 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2377 AssertReturn(p3dState, VERR_INVALID_STATE);
2378
2379 PVMSVGA3DDXCONTEXT pDXContext;
2380 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2381 AssertRCReturn(rc, rc);
2382
2383 rc = pSvgaR3State->pFuncsDX->pfnDXSurfaceCopyAndReadback(pThisCC, pDXContext);
2384 return rc;
2385}
2386
2387
2388int vmsvga3dDXMoveQuery(PVGASTATECC pThisCC, uint32_t idDXContext)
2389{
2390 int rc;
2391 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2392 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXMoveQuery, VERR_INVALID_STATE);
2393 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2394 AssertReturn(p3dState, VERR_INVALID_STATE);
2395
2396 PVMSVGA3DDXCONTEXT pDXContext;
2397 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2398 AssertRCReturn(rc, rc);
2399
2400 rc = pSvgaR3State->pFuncsDX->pfnDXMoveQuery(pThisCC, pDXContext);
2401 return rc;
2402}
2403
2404
2405int vmsvga3dDXBindAllQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXBindAllQuery const *pCmd)
2406{
2407 int rc;
2408 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2409 AssertReturn(pSvgaR3State->pFuncsDX, VERR_INVALID_STATE);
2410 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2411 AssertReturn(p3dState, VERR_INVALID_STATE);
2412
2413 RT_NOREF(idDXContext);
2414
2415 PVMSVGA3DDXCONTEXT pDXContext;
2416 rc = vmsvga3dDXContextFromCid(p3dState, pCmd->cid, &pDXContext);
2417 AssertRCReturn(rc, rc);
2418
2419 for (uint32_t i = 0; i < pDXContext->cot.cQuery; ++i)
2420 {
2421 SVGACOTableDXQueryEntry *pEntry = &pDXContext->cot.paQuery[i];
2422 if (pEntry->type != SVGA3D_QUERYTYPE_INVALID)
2423 pEntry->mobid = pCmd->mobid;
2424 }
2425
2426 return rc;
2427}
2428
2429
2430int vmsvga3dDXReadbackAllQuery(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dCmdDXReadbackAllQuery const *pCmd)
2431{
2432 int rc;
2433 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2434 AssertReturn(pSvgaR3State->pFuncsDX, VERR_INVALID_STATE);
2435 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2436 AssertReturn(p3dState, VERR_INVALID_STATE);
2437
2438 RT_NOREF(idDXContext);
2439
2440 PVMSVGA3DDXCONTEXT pDXContext;
2441 rc = vmsvga3dDXContextFromCid(p3dState, pCmd->cid, &pDXContext);
2442 AssertRCReturn(rc, rc);
2443
2444 /* "Read back cached states from the device if they exist."
2445 * The device does not cache queries. So this is a NOP.
2446 */
2447 RT_NOREF(pDXContext);
2448
2449 return rc;
2450}
2451
2452
2453int vmsvga3dDXMobFence64(PVGASTATECC pThisCC, uint32_t idDXContext)
2454{
2455 int rc;
2456 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2457 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXMobFence64, VERR_INVALID_STATE);
2458 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2459 AssertReturn(p3dState, VERR_INVALID_STATE);
2460
2461 PVMSVGA3DDXCONTEXT pDXContext;
2462 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2463 AssertRCReturn(rc, rc);
2464
2465 rc = pSvgaR3State->pFuncsDX->pfnDXMobFence64(pThisCC, pDXContext);
2466 return rc;
2467}
2468
2469
2470int vmsvga3dDXBindAllShader(PVGASTATECC pThisCC, uint32_t idDXContext)
2471{
2472 int rc;
2473 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2474 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindAllShader, VERR_INVALID_STATE);
2475 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2476 AssertReturn(p3dState, VERR_INVALID_STATE);
2477
2478 PVMSVGA3DDXCONTEXT pDXContext;
2479 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2480 AssertRCReturn(rc, rc);
2481
2482 rc = pSvgaR3State->pFuncsDX->pfnDXBindAllShader(pThisCC, pDXContext);
2483 return rc;
2484}
2485
2486
2487int vmsvga3dDXHint(PVGASTATECC pThisCC, uint32_t idDXContext)
2488{
2489 int rc;
2490 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2491 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXHint, VERR_INVALID_STATE);
2492 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2493 AssertReturn(p3dState, VERR_INVALID_STATE);
2494
2495 PVMSVGA3DDXCONTEXT pDXContext;
2496 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2497 AssertRCReturn(rc, rc);
2498
2499 rc = pSvgaR3State->pFuncsDX->pfnDXHint(pThisCC, pDXContext);
2500 return rc;
2501}
2502
2503
2504int vmsvga3dDXBufferUpdate(PVGASTATECC pThisCC, uint32_t idDXContext)
2505{
2506 int rc;
2507 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2508 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBufferUpdate, VERR_INVALID_STATE);
2509 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2510 AssertReturn(p3dState, VERR_INVALID_STATE);
2511
2512 PVMSVGA3DDXCONTEXT pDXContext;
2513 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2514 AssertRCReturn(rc, rc);
2515
2516 rc = pSvgaR3State->pFuncsDX->pfnDXBufferUpdate(pThisCC, pDXContext);
2517 return rc;
2518}
2519
2520
2521int vmsvga3dDXSetVSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2522{
2523 int rc;
2524 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2525 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetVSConstantBufferOffset, VERR_INVALID_STATE);
2526 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2527 AssertReturn(p3dState, VERR_INVALID_STATE);
2528
2529 PVMSVGA3DDXCONTEXT pDXContext;
2530 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2531 AssertRCReturn(rc, rc);
2532
2533 rc = pSvgaR3State->pFuncsDX->pfnDXSetVSConstantBufferOffset(pThisCC, pDXContext);
2534 return rc;
2535}
2536
2537
2538int vmsvga3dDXSetPSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2539{
2540 int rc;
2541 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2542 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetPSConstantBufferOffset, VERR_INVALID_STATE);
2543 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2544 AssertReturn(p3dState, VERR_INVALID_STATE);
2545
2546 PVMSVGA3DDXCONTEXT pDXContext;
2547 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2548 AssertRCReturn(rc, rc);
2549
2550 rc = pSvgaR3State->pFuncsDX->pfnDXSetPSConstantBufferOffset(pThisCC, pDXContext);
2551 return rc;
2552}
2553
2554
2555int vmsvga3dDXSetGSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2556{
2557 int rc;
2558 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2559 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetGSConstantBufferOffset, VERR_INVALID_STATE);
2560 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2561 AssertReturn(p3dState, VERR_INVALID_STATE);
2562
2563 PVMSVGA3DDXCONTEXT pDXContext;
2564 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2565 AssertRCReturn(rc, rc);
2566
2567 rc = pSvgaR3State->pFuncsDX->pfnDXSetGSConstantBufferOffset(pThisCC, pDXContext);
2568 return rc;
2569}
2570
2571
2572int vmsvga3dDXSetHSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2573{
2574 int rc;
2575 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2576 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetHSConstantBufferOffset, VERR_INVALID_STATE);
2577 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2578 AssertReturn(p3dState, VERR_INVALID_STATE);
2579
2580 PVMSVGA3DDXCONTEXT pDXContext;
2581 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2582 AssertRCReturn(rc, rc);
2583
2584 rc = pSvgaR3State->pFuncsDX->pfnDXSetHSConstantBufferOffset(pThisCC, pDXContext);
2585 return rc;
2586}
2587
2588
2589int vmsvga3dDXSetDSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2590{
2591 int rc;
2592 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2593 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetDSConstantBufferOffset, VERR_INVALID_STATE);
2594 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2595 AssertReturn(p3dState, VERR_INVALID_STATE);
2596
2597 PVMSVGA3DDXCONTEXT pDXContext;
2598 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2599 AssertRCReturn(rc, rc);
2600
2601 rc = pSvgaR3State->pFuncsDX->pfnDXSetDSConstantBufferOffset(pThisCC, pDXContext);
2602 return rc;
2603}
2604
2605
2606int vmsvga3dDXSetCSConstantBufferOffset(PVGASTATECC pThisCC, uint32_t idDXContext)
2607{
2608 int rc;
2609 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2610 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetCSConstantBufferOffset, VERR_INVALID_STATE);
2611 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2612 AssertReturn(p3dState, VERR_INVALID_STATE);
2613
2614 PVMSVGA3DDXCONTEXT pDXContext;
2615 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2616 AssertRCReturn(rc, rc);
2617
2618 rc = pSvgaR3State->pFuncsDX->pfnDXSetCSConstantBufferOffset(pThisCC, pDXContext);
2619 return rc;
2620}
2621
2622
2623int vmsvga3dDXCondBindAllShader(PVGASTATECC pThisCC, uint32_t idDXContext)
2624{
2625 int rc;
2626 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2627 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXCondBindAllShader, VERR_INVALID_STATE);
2628 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2629 AssertReturn(p3dState, VERR_INVALID_STATE);
2630
2631 PVMSVGA3DDXCONTEXT pDXContext;
2632 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2633 AssertRCReturn(rc, rc);
2634
2635 rc = pSvgaR3State->pFuncsDX->pfnDXCondBindAllShader(pThisCC, pDXContext);
2636 return rc;
2637}
2638
2639
2640int vmsvga3dScreenCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2641{
2642 int rc;
2643 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2644 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnScreenCopy, VERR_INVALID_STATE);
2645 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2646 AssertReturn(p3dState, VERR_INVALID_STATE);
2647
2648 PVMSVGA3DDXCONTEXT pDXContext;
2649 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2650 AssertRCReturn(rc, rc);
2651
2652 rc = pSvgaR3State->pFuncsDX->pfnScreenCopy(pThisCC, pDXContext);
2653 return rc;
2654}
2655
2656
2657int vmsvga3dGrowOTable(PVGASTATECC pThisCC, uint32_t idDXContext)
2658{
2659 int rc;
2660 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2661 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnGrowOTable, VERR_INVALID_STATE);
2662 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2663 AssertReturn(p3dState, VERR_INVALID_STATE);
2664
2665 PVMSVGA3DDXCONTEXT pDXContext;
2666 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2667 AssertRCReturn(rc, rc);
2668
2669 rc = pSvgaR3State->pFuncsDX->pfnGrowOTable(pThisCC, pDXContext);
2670 return rc;
2671}
2672
2673
2674int vmsvga3dDXGrowCOTable(PVGASTATECC pThisCC, uint32_t idDXContext)
2675{
2676 int rc;
2677 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2678 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXGrowCOTable, VERR_INVALID_STATE);
2679 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2680 AssertReturn(p3dState, VERR_INVALID_STATE);
2681
2682 PVMSVGA3DDXCONTEXT pDXContext;
2683 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2684 AssertRCReturn(rc, rc);
2685
2686 rc = pSvgaR3State->pFuncsDX->pfnDXGrowCOTable(pThisCC, pDXContext);
2687 return rc;
2688}
2689
2690
2691int vmsvga3dIntraSurfaceCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2692{
2693 int rc;
2694 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2695 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnIntraSurfaceCopy, VERR_INVALID_STATE);
2696 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2697 AssertReturn(p3dState, VERR_INVALID_STATE);
2698
2699 PVMSVGA3DDXCONTEXT pDXContext;
2700 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2701 AssertRCReturn(rc, rc);
2702
2703 rc = pSvgaR3State->pFuncsDX->pfnIntraSurfaceCopy(pThisCC, pDXContext);
2704 return rc;
2705}
2706
2707
2708int vmsvga3dDefineGBSurface_v3(PVGASTATECC pThisCC, uint32_t idDXContext)
2709{
2710 int rc;
2711 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2712 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v3, VERR_INVALID_STATE);
2713 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2714 AssertReturn(p3dState, VERR_INVALID_STATE);
2715
2716 PVMSVGA3DDXCONTEXT pDXContext;
2717 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2718 AssertRCReturn(rc, rc);
2719
2720 rc = pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v3(pThisCC, pDXContext);
2721 return rc;
2722}
2723
2724
2725int vmsvga3dDXResolveCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2726{
2727 int rc;
2728 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2729 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXResolveCopy, VERR_INVALID_STATE);
2730 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2731 AssertReturn(p3dState, VERR_INVALID_STATE);
2732
2733 PVMSVGA3DDXCONTEXT pDXContext;
2734 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2735 AssertRCReturn(rc, rc);
2736
2737 rc = pSvgaR3State->pFuncsDX->pfnDXResolveCopy(pThisCC, pDXContext);
2738 return rc;
2739}
2740
2741
2742int vmsvga3dDXPredResolveCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2743{
2744 int rc;
2745 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2746 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredResolveCopy, VERR_INVALID_STATE);
2747 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2748 AssertReturn(p3dState, VERR_INVALID_STATE);
2749
2750 PVMSVGA3DDXCONTEXT pDXContext;
2751 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2752 AssertRCReturn(rc, rc);
2753
2754 rc = pSvgaR3State->pFuncsDX->pfnDXPredResolveCopy(pThisCC, pDXContext);
2755 return rc;
2756}
2757
2758
2759int vmsvga3dDXPredConvertRegion(PVGASTATECC pThisCC, uint32_t idDXContext)
2760{
2761 int rc;
2762 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2763 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredConvertRegion, VERR_INVALID_STATE);
2764 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2765 AssertReturn(p3dState, VERR_INVALID_STATE);
2766
2767 PVMSVGA3DDXCONTEXT pDXContext;
2768 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2769 AssertRCReturn(rc, rc);
2770
2771 rc = pSvgaR3State->pFuncsDX->pfnDXPredConvertRegion(pThisCC, pDXContext);
2772 return rc;
2773}
2774
2775
2776int vmsvga3dDXPredConvert(PVGASTATECC pThisCC, uint32_t idDXContext)
2777{
2778 int rc;
2779 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2780 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXPredConvert, VERR_INVALID_STATE);
2781 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2782 AssertReturn(p3dState, VERR_INVALID_STATE);
2783
2784 PVMSVGA3DDXCONTEXT pDXContext;
2785 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2786 AssertRCReturn(rc, rc);
2787
2788 rc = pSvgaR3State->pFuncsDX->pfnDXPredConvert(pThisCC, pDXContext);
2789 return rc;
2790}
2791
2792
2793int vmsvga3dWholeSurfaceCopy(PVGASTATECC pThisCC, uint32_t idDXContext)
2794{
2795 int rc;
2796 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2797 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnWholeSurfaceCopy, VERR_INVALID_STATE);
2798 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2799 AssertReturn(p3dState, VERR_INVALID_STATE);
2800
2801 PVMSVGA3DDXCONTEXT pDXContext;
2802 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2803 AssertRCReturn(rc, rc);
2804
2805 rc = pSvgaR3State->pFuncsDX->pfnWholeSurfaceCopy(pThisCC, pDXContext);
2806 return rc;
2807}
2808
2809
2810int vmsvga3dDXDefineUAView(PVGASTATECC pThisCC, uint32_t idDXContext)
2811{
2812 int rc;
2813 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2814 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineUAView, VERR_INVALID_STATE);
2815 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2816 AssertReturn(p3dState, VERR_INVALID_STATE);
2817
2818 PVMSVGA3DDXCONTEXT pDXContext;
2819 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2820 AssertRCReturn(rc, rc);
2821
2822 rc = pSvgaR3State->pFuncsDX->pfnDXDefineUAView(pThisCC, pDXContext);
2823 return rc;
2824}
2825
2826
2827int vmsvga3dDXDestroyUAView(PVGASTATECC pThisCC, uint32_t idDXContext)
2828{
2829 int rc;
2830 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2831 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDestroyUAView, VERR_INVALID_STATE);
2832 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2833 AssertReturn(p3dState, VERR_INVALID_STATE);
2834
2835 PVMSVGA3DDXCONTEXT pDXContext;
2836 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2837 AssertRCReturn(rc, rc);
2838
2839 rc = pSvgaR3State->pFuncsDX->pfnDXDestroyUAView(pThisCC, pDXContext);
2840 return rc;
2841}
2842
2843
2844int vmsvga3dDXClearUAViewUint(PVGASTATECC pThisCC, uint32_t idDXContext)
2845{
2846 int rc;
2847 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2848 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearUAViewUint, VERR_INVALID_STATE);
2849 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2850 AssertReturn(p3dState, VERR_INVALID_STATE);
2851
2852 PVMSVGA3DDXCONTEXT pDXContext;
2853 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2854 AssertRCReturn(rc, rc);
2855
2856 rc = pSvgaR3State->pFuncsDX->pfnDXClearUAViewUint(pThisCC, pDXContext);
2857 return rc;
2858}
2859
2860
2861int vmsvga3dDXClearUAViewFloat(PVGASTATECC pThisCC, uint32_t idDXContext)
2862{
2863 int rc;
2864 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2865 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXClearUAViewFloat, VERR_INVALID_STATE);
2866 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2867 AssertReturn(p3dState, VERR_INVALID_STATE);
2868
2869 PVMSVGA3DDXCONTEXT pDXContext;
2870 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2871 AssertRCReturn(rc, rc);
2872
2873 rc = pSvgaR3State->pFuncsDX->pfnDXClearUAViewFloat(pThisCC, pDXContext);
2874 return rc;
2875}
2876
2877
2878int vmsvga3dDXCopyStructureCount(PVGASTATECC pThisCC, uint32_t idDXContext)
2879{
2880 int rc;
2881 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2882 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXCopyStructureCount, VERR_INVALID_STATE);
2883 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2884 AssertReturn(p3dState, VERR_INVALID_STATE);
2885
2886 PVMSVGA3DDXCONTEXT pDXContext;
2887 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2888 AssertRCReturn(rc, rc);
2889
2890 rc = pSvgaR3State->pFuncsDX->pfnDXCopyStructureCount(pThisCC, pDXContext);
2891 return rc;
2892}
2893
2894
2895int vmsvga3dDXSetUAViews(PVGASTATECC pThisCC, uint32_t idDXContext)
2896{
2897 int rc;
2898 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2899 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetUAViews, VERR_INVALID_STATE);
2900 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2901 AssertReturn(p3dState, VERR_INVALID_STATE);
2902
2903 PVMSVGA3DDXCONTEXT pDXContext;
2904 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2905 AssertRCReturn(rc, rc);
2906
2907 rc = pSvgaR3State->pFuncsDX->pfnDXSetUAViews(pThisCC, pDXContext);
2908 return rc;
2909}
2910
2911
2912int vmsvga3dDXDrawIndexedInstancedIndirect(PVGASTATECC pThisCC, uint32_t idDXContext)
2913{
2914 int rc;
2915 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2916 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstancedIndirect, VERR_INVALID_STATE);
2917 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2918 AssertReturn(p3dState, VERR_INVALID_STATE);
2919
2920 PVMSVGA3DDXCONTEXT pDXContext;
2921 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2922 AssertRCReturn(rc, rc);
2923
2924 rc = pSvgaR3State->pFuncsDX->pfnDXDrawIndexedInstancedIndirect(pThisCC, pDXContext);
2925 return rc;
2926}
2927
2928
2929int vmsvga3dDXDrawInstancedIndirect(PVGASTATECC pThisCC, uint32_t idDXContext)
2930{
2931 int rc;
2932 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2933 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDrawInstancedIndirect, VERR_INVALID_STATE);
2934 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2935 AssertReturn(p3dState, VERR_INVALID_STATE);
2936
2937 PVMSVGA3DDXCONTEXT pDXContext;
2938 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2939 AssertRCReturn(rc, rc);
2940
2941 rc = pSvgaR3State->pFuncsDX->pfnDXDrawInstancedIndirect(pThisCC, pDXContext);
2942 return rc;
2943}
2944
2945
2946int vmsvga3dDXDispatch(PVGASTATECC pThisCC, uint32_t idDXContext)
2947{
2948 int rc;
2949 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2950 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDispatch, VERR_INVALID_STATE);
2951 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2952 AssertReturn(p3dState, VERR_INVALID_STATE);
2953
2954 PVMSVGA3DDXCONTEXT pDXContext;
2955 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2956 AssertRCReturn(rc, rc);
2957
2958 rc = pSvgaR3State->pFuncsDX->pfnDXDispatch(pThisCC, pDXContext);
2959 return rc;
2960}
2961
2962
2963int vmsvga3dDXDispatchIndirect(PVGASTATECC pThisCC, uint32_t idDXContext)
2964{
2965 int rc;
2966 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2967 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDispatchIndirect, VERR_INVALID_STATE);
2968 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2969 AssertReturn(p3dState, VERR_INVALID_STATE);
2970
2971 PVMSVGA3DDXCONTEXT pDXContext;
2972 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2973 AssertRCReturn(rc, rc);
2974
2975 rc = pSvgaR3State->pFuncsDX->pfnDXDispatchIndirect(pThisCC, pDXContext);
2976 return rc;
2977}
2978
2979
2980int vmsvga3dWriteZeroSurface(PVGASTATECC pThisCC, uint32_t idDXContext)
2981{
2982 int rc;
2983 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
2984 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnWriteZeroSurface, VERR_INVALID_STATE);
2985 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
2986 AssertReturn(p3dState, VERR_INVALID_STATE);
2987
2988 PVMSVGA3DDXCONTEXT pDXContext;
2989 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
2990 AssertRCReturn(rc, rc);
2991
2992 rc = pSvgaR3State->pFuncsDX->pfnWriteZeroSurface(pThisCC, pDXContext);
2993 return rc;
2994}
2995
2996
2997int vmsvga3dHintZeroSurface(PVGASTATECC pThisCC, uint32_t idDXContext)
2998{
2999 int rc;
3000 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3001 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnHintZeroSurface, VERR_INVALID_STATE);
3002 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3003 AssertReturn(p3dState, VERR_INVALID_STATE);
3004
3005 PVMSVGA3DDXCONTEXT pDXContext;
3006 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3007 AssertRCReturn(rc, rc);
3008
3009 rc = pSvgaR3State->pFuncsDX->pfnHintZeroSurface(pThisCC, pDXContext);
3010 return rc;
3011}
3012
3013
3014int vmsvga3dDXTransferToBuffer(PVGASTATECC pThisCC, uint32_t idDXContext)
3015{
3016 int rc;
3017 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3018 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXTransferToBuffer, VERR_INVALID_STATE);
3019 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3020 AssertReturn(p3dState, VERR_INVALID_STATE);
3021
3022 PVMSVGA3DDXCONTEXT pDXContext;
3023 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3024 AssertRCReturn(rc, rc);
3025
3026 rc = pSvgaR3State->pFuncsDX->pfnDXTransferToBuffer(pThisCC, pDXContext);
3027 return rc;
3028}
3029
3030
3031int vmsvga3dDXSetStructureCount(PVGASTATECC pThisCC, uint32_t idDXContext)
3032{
3033 int rc;
3034 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3035 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetStructureCount, VERR_INVALID_STATE);
3036 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3037 AssertReturn(p3dState, VERR_INVALID_STATE);
3038
3039 PVMSVGA3DDXCONTEXT pDXContext;
3040 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3041 AssertRCReturn(rc, rc);
3042
3043 rc = pSvgaR3State->pFuncsDX->pfnDXSetStructureCount(pThisCC, pDXContext);
3044 return rc;
3045}
3046
3047
3048int vmsvga3dLogicOpsBitBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
3049{
3050 int rc;
3051 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3052 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsBitBlt, VERR_INVALID_STATE);
3053 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3054 AssertReturn(p3dState, VERR_INVALID_STATE);
3055
3056 PVMSVGA3DDXCONTEXT pDXContext;
3057 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3058 AssertRCReturn(rc, rc);
3059
3060 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsBitBlt(pThisCC, pDXContext);
3061 return rc;
3062}
3063
3064
3065int vmsvga3dLogicOpsTransBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
3066{
3067 int rc;
3068 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3069 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsTransBlt, VERR_INVALID_STATE);
3070 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3071 AssertReturn(p3dState, VERR_INVALID_STATE);
3072
3073 PVMSVGA3DDXCONTEXT pDXContext;
3074 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3075 AssertRCReturn(rc, rc);
3076
3077 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsTransBlt(pThisCC, pDXContext);
3078 return rc;
3079}
3080
3081
3082int vmsvga3dLogicOpsStretchBlt(PVGASTATECC pThisCC, uint32_t idDXContext)
3083{
3084 int rc;
3085 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3086 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsStretchBlt, VERR_INVALID_STATE);
3087 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3088 AssertReturn(p3dState, VERR_INVALID_STATE);
3089
3090 PVMSVGA3DDXCONTEXT pDXContext;
3091 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3092 AssertRCReturn(rc, rc);
3093
3094 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsStretchBlt(pThisCC, pDXContext);
3095 return rc;
3096}
3097
3098
3099int vmsvga3dLogicOpsColorFill(PVGASTATECC pThisCC, uint32_t idDXContext)
3100{
3101 int rc;
3102 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3103 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsColorFill, VERR_INVALID_STATE);
3104 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3105 AssertReturn(p3dState, VERR_INVALID_STATE);
3106
3107 PVMSVGA3DDXCONTEXT pDXContext;
3108 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3109 AssertRCReturn(rc, rc);
3110
3111 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsColorFill(pThisCC, pDXContext);
3112 return rc;
3113}
3114
3115
3116int vmsvga3dLogicOpsAlphaBlend(PVGASTATECC pThisCC, uint32_t idDXContext)
3117{
3118 int rc;
3119 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3120 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsAlphaBlend, VERR_INVALID_STATE);
3121 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3122 AssertReturn(p3dState, VERR_INVALID_STATE);
3123
3124 PVMSVGA3DDXCONTEXT pDXContext;
3125 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3126 AssertRCReturn(rc, rc);
3127
3128 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsAlphaBlend(pThisCC, pDXContext);
3129 return rc;
3130}
3131
3132
3133int vmsvga3dLogicOpsClearTypeBlend(PVGASTATECC pThisCC, uint32_t idDXContext)
3134{
3135 int rc;
3136 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3137 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnLogicOpsClearTypeBlend, VERR_INVALID_STATE);
3138 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3139 AssertReturn(p3dState, VERR_INVALID_STATE);
3140
3141 PVMSVGA3DDXCONTEXT pDXContext;
3142 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3143 AssertRCReturn(rc, rc);
3144
3145 rc = pSvgaR3State->pFuncsDX->pfnLogicOpsClearTypeBlend(pThisCC, pDXContext);
3146 return rc;
3147}
3148
3149
3150int vmsvga3dDefineGBSurface_v4(PVGASTATECC pThisCC, uint32_t idDXContext)
3151{
3152 int rc;
3153 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3154 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v4, VERR_INVALID_STATE);
3155 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3156 AssertReturn(p3dState, VERR_INVALID_STATE);
3157
3158 PVMSVGA3DDXCONTEXT pDXContext;
3159 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3160 AssertRCReturn(rc, rc);
3161
3162 rc = pSvgaR3State->pFuncsDX->pfnDefineGBSurface_v4(pThisCC, pDXContext);
3163 return rc;
3164}
3165
3166
3167int vmsvga3dDXSetCSUAViews(PVGASTATECC pThisCC, uint32_t idDXContext)
3168{
3169 int rc;
3170 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3171 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetCSUAViews, VERR_INVALID_STATE);
3172 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3173 AssertReturn(p3dState, VERR_INVALID_STATE);
3174
3175 PVMSVGA3DDXCONTEXT pDXContext;
3176 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3177 AssertRCReturn(rc, rc);
3178
3179 rc = pSvgaR3State->pFuncsDX->pfnDXSetCSUAViews(pThisCC, pDXContext);
3180 return rc;
3181}
3182
3183
3184int vmsvga3dDXSetMinLOD(PVGASTATECC pThisCC, uint32_t idDXContext)
3185{
3186 int rc;
3187 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3188 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetMinLOD, VERR_INVALID_STATE);
3189 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3190 AssertReturn(p3dState, VERR_INVALID_STATE);
3191
3192 PVMSVGA3DDXCONTEXT pDXContext;
3193 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3194 AssertRCReturn(rc, rc);
3195
3196 rc = pSvgaR3State->pFuncsDX->pfnDXSetMinLOD(pThisCC, pDXContext);
3197 return rc;
3198}
3199
3200
3201int vmsvga3dDXDefineStreamOutputWithMob(PVGASTATECC pThisCC, uint32_t idDXContext)
3202{
3203 int rc;
3204 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3205 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutputWithMob, VERR_INVALID_STATE);
3206 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3207 AssertReturn(p3dState, VERR_INVALID_STATE);
3208
3209 PVMSVGA3DDXCONTEXT pDXContext;
3210 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3211 AssertRCReturn(rc, rc);
3212
3213 rc = pSvgaR3State->pFuncsDX->pfnDXDefineStreamOutputWithMob(pThisCC, pDXContext);
3214 return rc;
3215}
3216
3217
3218int vmsvga3dDXSetShaderIface(PVGASTATECC pThisCC, uint32_t idDXContext)
3219{
3220 int rc;
3221 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3222 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXSetShaderIface, VERR_INVALID_STATE);
3223 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3224 AssertReturn(p3dState, VERR_INVALID_STATE);
3225
3226 PVMSVGA3DDXCONTEXT pDXContext;
3227 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3228 AssertRCReturn(rc, rc);
3229
3230 rc = pSvgaR3State->pFuncsDX->pfnDXSetShaderIface(pThisCC, pDXContext);
3231 return rc;
3232}
3233
3234
3235int vmsvga3dDXBindStreamOutput(PVGASTATECC pThisCC, uint32_t idDXContext)
3236{
3237 int rc;
3238 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3239 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindStreamOutput, VERR_INVALID_STATE);
3240 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3241 AssertReturn(p3dState, VERR_INVALID_STATE);
3242
3243 PVMSVGA3DDXCONTEXT pDXContext;
3244 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3245 AssertRCReturn(rc, rc);
3246
3247 rc = pSvgaR3State->pFuncsDX->pfnDXBindStreamOutput(pThisCC, pDXContext);
3248 return rc;
3249}
3250
3251
3252int vmsvga3dSurfaceStretchBltNonMSToMS(PVGASTATECC pThisCC, uint32_t idDXContext)
3253{
3254 int rc;
3255 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3256 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnSurfaceStretchBltNonMSToMS, VERR_INVALID_STATE);
3257 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3258 AssertReturn(p3dState, VERR_INVALID_STATE);
3259
3260 PVMSVGA3DDXCONTEXT pDXContext;
3261 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3262 AssertRCReturn(rc, rc);
3263
3264 rc = pSvgaR3State->pFuncsDX->pfnSurfaceStretchBltNonMSToMS(pThisCC, pDXContext);
3265 return rc;
3266}
3267
3268
3269int vmsvga3dDXBindShaderIface(PVGASTATECC pThisCC, uint32_t idDXContext)
3270{
3271 int rc;
3272 PVMSVGAR3STATE const pSvgaR3State = pThisCC->svga.pSvgaR3State;
3273 AssertReturn(pSvgaR3State->pFuncsDX && pSvgaR3State->pFuncsDX->pfnDXBindShaderIface, VERR_INVALID_STATE);
3274 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3275 AssertReturn(p3dState, VERR_INVALID_STATE);
3276
3277 PVMSVGA3DDXCONTEXT pDXContext;
3278 rc = vmsvga3dDXContextFromCid(p3dState, idDXContext, &pDXContext);
3279 AssertRCReturn(rc, rc);
3280
3281 rc = pSvgaR3State->pFuncsDX->pfnDXBindShaderIface(pThisCC, pDXContext);
3282 return rc;
3283}
3284
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