VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-hlp.cpp@ 86577

Last change on this file since 86577 was 86576, checked in by vboxsync, 4 years ago

3D: Clarify shader version
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File size: 19.1 KB
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1/* $Id: DevVGA-SVGA3d-hlp.cpp 86576 2020-10-14 15:09:53Z vboxsync $ */
2/** @file
3 * DevVMWare - VMWare SVGA device helpers
4 */
5
6/*
7 * Copyright (C) 2020 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
19#include <VBox/AssertGuest.h>
20
21#ifdef SHADER_VERIFY_STANDALONE
22# include <stdio.h>
23# define Log3(a) printf a
24# define LogRel(a) printf a
25#else
26# include <VBox/log.h>
27#endif
28
29#include <iprt/cdefs.h>
30#include <iprt/errcore.h>
31#include <iprt/types.h>
32#include <iprt/string.h>
33
34#include "svga3d_reg.h"
35#include "svga3d_shaderdefs.h"
36
37 /** Per shader data is stored in this structure. */
38typedef struct VMSVGA3DSHADERPARSECONTEXT
39{
40 /** Version token. */
41 SVGA3dShaderVersion version;
42} VMSVGA3DSHADERPARSECONTEXT;
43
44/** Callback which parses a parameter token.
45 *
46 * @param pCtx The shader data.
47 * @param Op Instruction opcode which the token is used with.
48 * @param Token The parameter token which must be parsed.
49 * @param idxToken Index of the parameter token in the instruction. 0 for the first parameter.
50 *
51 * @return VBox error code.
52 */
53typedef int FNSHADERPARSETOKEN(VMSVGA3DSHADERPARSECONTEXT* pCtx, uint32_t Op, uint32_t Token, uint32_t idxToken);
54typedef FNSHADERPARSETOKEN* PFNSHADERPARSETOKEN;
55
56/** Information about a shader opcode. */
57typedef struct VMSVGA3DSHADERPARSEOP
58{
59 /** Opcode. */
60 SVGA3dShaderOpCodeType Op;
61 /** Maximum number of parameters. */
62 uint32_t Length;
63 /** Pointer to callback, which parse each parameter.
64 * The size is the number of maximum possible parameters: dest + 3 * src
65 */
66 PFNSHADERPARSETOKEN apfnParse[4];
67} VMSVGA3DSHADERPARSEOP;
68
69static int vmsvga3dShaderParseRegOffset(VMSVGA3DSHADERPARSECONTEXT *pCtx,
70 bool fIsSrc,
71 SVGA3dShaderRegType regType,
72 uint32_t off)
73{
74 RT_NOREF(pCtx, fIsSrc);
75
76 switch (regType)
77 {
78 case SVGA3DREG_TEMP:
79 break;
80 case SVGA3DREG_INPUT:
81 break;
82 case SVGA3DREG_CONST:
83 break;
84 case SVGA3DREG_ADDR /* also SVGA3DREG_TEXTURE */:
85 break;
86 case SVGA3DREG_RASTOUT:
87 break;
88 case SVGA3DREG_ATTROUT:
89 break;
90 case SVGA3DREG_TEXCRDOUT /* also SVGA3DREG_OUTPUT */:
91 break;
92 case SVGA3DREG_CONSTINT:
93 break;
94 case SVGA3DREG_COLOROUT:
95 break;
96 case SVGA3DREG_DEPTHOUT:
97 break;
98 case SVGA3DREG_SAMPLER:
99 break;
100 case SVGA3DREG_CONST2:
101 break;
102 case SVGA3DREG_CONST3:
103 break;
104 case SVGA3DREG_CONST4:
105 break;
106 case SVGA3DREG_CONSTBOOL:
107 break;
108 case SVGA3DREG_LOOP:
109 break;
110 case SVGA3DREG_TEMPFLOAT16:
111 break;
112 case SVGA3DREG_MISCTYPE:
113 ASSERT_GUEST_RETURN( off == SVGA3DMISCREG_POSITION
114 || off == SVGA3DMISCREG_FACE, VERR_PARSE_ERROR);
115 break;
116 case SVGA3DREG_LABEL:
117 break;
118 case SVGA3DREG_PREDICATE:
119 break;
120 default:
121 ASSERT_GUEST_FAILED_RETURN(VERR_PARSE_ERROR);
122 }
123
124 return VINF_SUCCESS;
125}
126
127/* Parse a declaration parameter token:
128 * https://docs.microsoft.com/en-us/windows-hardware/drivers/display/dcl-instruction
129 *
130 * See FNSHADERPARSETOKEN.
131 */
132static int vmsvga3dShaderParseDclToken(VMSVGA3DSHADERPARSECONTEXT* pCtx, uint32_t Op, uint32_t Token, uint32_t idxToken)
133{
134 RT_NOREF(pCtx, Op, Token, idxToken);
135 return VINF_SUCCESS;
136}
137
138/* Parse a label (D3DSPR_LABEL) parameter token.
139 *
140 * See FNSHADERPARSETOKEN.
141 */
142static int vmsvga3dShaderParseLabelToken(VMSVGA3DSHADERPARSECONTEXT* pCtx, uint32_t Op, uint32_t Token, uint32_t idxToken)
143{
144 RT_NOREF(pCtx, Op, Token, idxToken);
145 return VINF_SUCCESS;
146}
147
148/* Parse a destination parameter token:
149 * https://docs.microsoft.com/en-us/windows-hardware/drivers/display/destination-parameter-token
150 * See FNSHADERPARSETOKEN.
151 */
152static int vmsvga3dShaderParseDestToken(VMSVGA3DSHADERPARSECONTEXT* pCtx, uint32_t Op, uint32_t Token, uint32_t idxToken)
153{
154 RT_NOREF(pCtx, Op, idxToken);
155
156 SVGA3dShaderDestToken dest;
157 dest.value = Token;
158
159 SVGA3dShaderRegType const regType = (SVGA3dShaderRegType)(dest.type_upper << 3 | dest.type_lower);
160 Log3(("Dest: type %d, r0 %d, shfScale %d, dstMod %d, mask 0x%x, r1 %d, relAddr %d, num %d\n",
161 regType, dest.reserved0, dest.shfScale, dest.dstMod, dest.mask, dest.reserved1, dest.relAddr, dest.num));
162
163 return vmsvga3dShaderParseRegOffset(pCtx, false, regType, dest.num);
164}
165
166/* Parse a source parameter token:
167 * https://docs.microsoft.com/en-us/windows-hardware/drivers/display/source-parameter-token
168 * See FNSHADERPARSETOKEN.
169 */
170static int vmsvga3dShaderParseSrcToken(VMSVGA3DSHADERPARSECONTEXT* pCtx, uint32_t Op, uint32_t Token, uint32_t idxToken)
171{
172 RT_NOREF(pCtx, Op, idxToken);
173
174 SVGA3dShaderSrcToken src;
175 src.value = Token;
176
177 SVGA3dShaderRegType const regType = (SVGA3dShaderRegType)(src.type_upper << 3 | src.type_lower);
178 Log3(("Src: type %d, r0 %d, srcMod %d, swizzle 0x%x, r1 %d, relAddr %d, num %d\n",
179 regType, src.reserved0, src.srcMod, src.swizzle, src.reserved1, src.relAddr, src.num));
180
181 return vmsvga3dShaderParseRegOffset(pCtx, true, regType, src.num);
182}
183
184/* Shortcut defines. */
185#define PT_DCL vmsvga3dShaderParseDclToken
186#define PT_LBL vmsvga3dShaderParseLabelToken
187#define PT_DEST vmsvga3dShaderParseDestToken
188#define PT_SRC vmsvga3dShaderParseSrcToken
189
190/* Information about opcodes:
191 * https://docs.microsoft.com/en-us/windows-hardware/drivers/ddi/d3d9types/ne-d3d9types-_d3dshader_instruction_opcode_type
192 */
193static const VMSVGA3DSHADERPARSEOP aOps[] =
194{
195 /* Op Length Parameters */
196 /* 00 */ { SVGA3DOP_NOP, 0, { NULL, NULL, NULL, NULL } },
197 /* 01 */ { SVGA3DOP_MOV, 2, { PT_DEST, PT_SRC, NULL, NULL } },
198 /* 02 */ { SVGA3DOP_ADD, 3, { PT_DEST, PT_SRC, PT_SRC, NULL } },
199 /* 03 */ { SVGA3DOP_SUB, 3, { PT_DEST, PT_SRC, PT_SRC, NULL } },
200 /* 04 */ { SVGA3DOP_MAD, 4, { PT_DEST, PT_SRC, PT_SRC, PT_SRC } },
201 /* 05 */ { SVGA3DOP_MUL, 3, { PT_DEST, PT_SRC, PT_SRC, NULL } },
202 /* 06 */ { SVGA3DOP_RCP, 2, { PT_DEST, PT_SRC, NULL, NULL } },
203 /* 07 */ { SVGA3DOP_RSQ, 2, { PT_DEST, PT_SRC, NULL, NULL } },
204 /* 08 */ { SVGA3DOP_DP3, 3, { PT_DEST, PT_SRC, PT_SRC, NULL } },
205 /* 09 */ { SVGA3DOP_DP4, 3, { PT_DEST, PT_SRC, PT_SRC, NULL } },
206 /* 10 */ { SVGA3DOP_MIN, 3, { PT_DEST, PT_SRC, PT_SRC, NULL } },
207 /* 11 */ { SVGA3DOP_MAX, 3, { PT_DEST, PT_SRC, PT_SRC, NULL } },
208 /* 12 */ { SVGA3DOP_SLT, 3, { PT_DEST, PT_SRC, PT_SRC, NULL } },
209 /* 13 */ { SVGA3DOP_SGE, 3, { PT_DEST, PT_SRC, PT_SRC, NULL } },
210 /* 14 */ { SVGA3DOP_EXP, 2, { PT_DEST, PT_SRC, NULL, NULL } },
211 /* 15 */ { SVGA3DOP_LOG, 2, { PT_DEST, PT_SRC, NULL, NULL } },
212 /* 16 */ { SVGA3DOP_LIT, 2, { PT_DEST, PT_SRC, NULL, NULL } },
213 /* 17 */ { SVGA3DOP_DST, 3, { PT_DEST, PT_SRC, PT_SRC, NULL } },
214 /* 18 */ { SVGA3DOP_LRP, 4, { PT_DEST, PT_SRC, PT_SRC, PT_SRC } },
215 /* 19 */ { SVGA3DOP_FRC, 3, { PT_DEST, PT_SRC, PT_SRC, NULL } },
216 /* 20 */ { SVGA3DOP_M4x4, 3, { PT_DEST, PT_SRC, PT_SRC, NULL } },
217 /* 21 */ { SVGA3DOP_M4x3, 3, { PT_DEST, PT_SRC, PT_SRC, NULL } },
218 /* 22 */ { SVGA3DOP_M3x4, 3, { PT_DEST, PT_SRC, PT_SRC, NULL } },
219 /* 23 */ { SVGA3DOP_M3x3, 3, { PT_DEST, PT_SRC, PT_SRC, NULL } },
220 /* 24 */ { SVGA3DOP_M3x2, 3, { PT_DEST, PT_SRC, PT_SRC, NULL } },
221 /* 25 */ { SVGA3DOP_CALL, 1, { PT_LBL, NULL, NULL, NULL } },
222 /* 26 */ { SVGA3DOP_CALLNZ, 2, { PT_LBL, PT_SRC, NULL, NULL } },
223 /* 27 */ { SVGA3DOP_LOOP, 1, { PT_SRC, NULL, NULL, NULL } },
224 /* 28 */ { SVGA3DOP_RET, 0, { NULL, NULL, NULL, NULL } },
225 /* 29 */ { SVGA3DOP_ENDLOOP, 0, { NULL, NULL, NULL, NULL } },
226 /* 30 */ { SVGA3DOP_LABEL, 1, { PT_LBL, NULL, NULL, NULL } },
227 /* 31 */ { SVGA3DOP_DCL, 2, { PT_DCL, PT_DEST, NULL, NULL } },
228 /* 32 */ { SVGA3DOP_POW, 3, { PT_DEST, PT_SRC, PT_SRC, NULL } },
229 /* 33 */ { SVGA3DOP_CRS, 3, { PT_DEST, PT_SRC, PT_SRC, NULL } },
230 /* 34 */ { SVGA3DOP_SGN, 4, { PT_DEST, PT_SRC, PT_SRC, PT_SRC } },
231 /* 35 */ { SVGA3DOP_ABS, 2, { PT_DEST, PT_SRC, NULL, NULL } },
232 /* 36 */ { SVGA3DOP_NRM, 2, { PT_DEST, PT_SRC, NULL, NULL } },
233 /* 37 */ { SVGA3DOP_SINCOS, 4, { PT_DEST, PT_SRC, PT_SRC, PT_SRC } },
234 /* 38 */ { SVGA3DOP_REP, 1, { PT_SRC, NULL, NULL, NULL } },
235 /* 39 */ { SVGA3DOP_ENDREP, 0, { NULL, NULL, NULL, NULL } },
236 /* 40 */ { SVGA3DOP_IF, 1, { PT_SRC, NULL, NULL, NULL } },
237 /* 41 */ { SVGA3DOP_IFC, 2, { PT_SRC, PT_SRC, NULL, NULL } },
238 /* 42 */ { SVGA3DOP_ELSE, 0, { NULL, NULL, NULL, NULL } },
239 /* 43 */ { SVGA3DOP_ENDIF, 0, { NULL, NULL, NULL, NULL } },
240 /* 44 */ { SVGA3DOP_BREAK, 0, { NULL, NULL, NULL, NULL } },
241 /* 45 */ { SVGA3DOP_BREAKC, 2, { PT_SRC, PT_SRC, NULL, NULL } },
242 /* 46 */ { SVGA3DOP_MOVA, 2, { PT_DEST, PT_SRC, NULL, NULL } },
243 /* 47 */ { SVGA3DOP_DEFB, 2, { PT_DEST, NULL, NULL, NULL } },
244 /* 48 */ { SVGA3DOP_DEFI, 5, { PT_DEST, NULL, NULL, NULL } },
245 /* 49 */ { SVGA3DOP_NOP, 0, { NULL, NULL, NULL, NULL } },
246 /* 50 */ { SVGA3DOP_NOP, 0, { NULL, NULL, NULL, NULL } },
247 /* 51 */ { SVGA3DOP_NOP, 0, { NULL, NULL, NULL, NULL } },
248 /* 52 */ { SVGA3DOP_NOP, 0, { NULL, NULL, NULL, NULL } },
249 /* 53 */ { SVGA3DOP_NOP, 0, { NULL, NULL, NULL, NULL } },
250 /* 54 */ { SVGA3DOP_NOP, 0, { NULL, NULL, NULL, NULL } },
251 /* 55 */ { SVGA3DOP_NOP, 0, { NULL, NULL, NULL, NULL } },
252 /* 56 */ { SVGA3DOP_NOP, 0, { NULL, NULL, NULL, NULL } },
253 /* 57 */ { SVGA3DOP_NOP, 0, { NULL, NULL, NULL, NULL } },
254 /* 58 */ { SVGA3DOP_NOP, 0, { NULL, NULL, NULL, NULL } },
255 /* 59 */ { SVGA3DOP_NOP, 0, { NULL, NULL, NULL, NULL } },
256 /* 60 */ { SVGA3DOP_NOP, 0, { NULL, NULL, NULL, NULL } },
257 /* 61 */ { SVGA3DOP_NOP, 0, { NULL, NULL, NULL, NULL } },
258 /* 62 */ { SVGA3DOP_NOP, 0, { NULL, NULL, NULL, NULL } },
259 /* 63 */ { SVGA3DOP_NOP, 0, { NULL, NULL, NULL, NULL } },
260 /* 64 */ { SVGA3DOP_TEXCOORD, 2, { PT_DEST, PT_SRC, NULL, NULL } },
261 /* 65 */ { SVGA3DOP_TEXKILL, 1, { PT_DEST, NULL, NULL, NULL } },
262 /* 66 */ { SVGA3DOP_TEX, 3, { PT_DEST, PT_SRC, PT_SRC, NULL } }, // pre-1.4 = tex dest, post-1.4 = texld dest, src, src
263 /* 67 */ { SVGA3DOP_TEXBEM, 2, { PT_DEST, PT_SRC, NULL, NULL } },
264 /* 68 */ { SVGA3DOP_TEXBEML, 2, { PT_DEST, PT_SRC, NULL, NULL } },
265 /* 69 */ { SVGA3DOP_TEXREG2AR, 2, { PT_DEST, PT_SRC, NULL, NULL } },
266 /* 70 */ { SVGA3DOP_TEXREG2GB, 2, { PT_DEST, PT_SRC, NULL, NULL } },
267 /* 71 */ { SVGA3DOP_TEXM3x2PAD, 2, { PT_DEST, PT_SRC, NULL, NULL } },
268 /* 72 */ { SVGA3DOP_TEXM3x2TEX, 2, { PT_DEST, PT_SRC, NULL, NULL } },
269 /* 73 */ { SVGA3DOP_TEXM3x3PAD, 2, { PT_DEST, PT_SRC, NULL, NULL } },
270 /* 74 */ { SVGA3DOP_TEXM3x3TEX, 2, { PT_DEST, PT_SRC, NULL, NULL } },
271 /* 75 */ { SVGA3DOP_RESERVED0, 0, { NULL, NULL, NULL, NULL } },
272 /* 76 */ { SVGA3DOP_TEXM3x3SPEC, 3, { PT_DEST, PT_SRC, PT_SRC, NULL } },
273 /* 77 */ { SVGA3DOP_TEXM3x3VSPEC, 2, { PT_DEST, PT_SRC, NULL, NULL } },
274 /* 78 */ { SVGA3DOP_EXPP, 2, { PT_DEST, PT_SRC, NULL, NULL } },
275 /* 79 */ { SVGA3DOP_LOGP, 2, { PT_DEST, PT_SRC, NULL, NULL } },
276 /* 80 */ { SVGA3DOP_CND, 4, { PT_DEST, PT_SRC, PT_SRC, PT_SRC } },
277 /* 81 */ { SVGA3DOP_DEF, 5, { PT_DEST, NULL, NULL, NULL } },
278 /* 82 */ { SVGA3DOP_TEXREG2RGB, 2, { PT_DEST, PT_SRC, NULL, NULL } },
279 /* 83 */ { SVGA3DOP_TEXDP3TEX, 2, { PT_DEST, PT_SRC, NULL, NULL } },
280 /* 84 */ { SVGA3DOP_TEXM3x2DEPTH, 2, { PT_DEST, PT_SRC, NULL, NULL } },
281 /* 85 */ { SVGA3DOP_TEXDP3, 2, { PT_DEST, PT_SRC, NULL, NULL } },
282 /* 86 */ { SVGA3DOP_TEXM3x3, 2, { PT_DEST, PT_SRC, NULL, NULL } },
283 /* 87 */ { SVGA3DOP_TEXDEPTH, 1, { PT_DEST, NULL, NULL, NULL } },
284 /* 88 */ { SVGA3DOP_CMP, 4, { PT_DEST, PT_SRC, PT_SRC, PT_SRC } },
285 /* 89 */ { SVGA3DOP_BEM, 3, { PT_DEST, PT_SRC, PT_SRC, NULL } },
286 /* 90 */ { SVGA3DOP_DP2ADD, 4, { PT_DEST, PT_SRC, PT_SRC, PT_SRC } },
287 /* 91 */ { SVGA3DOP_DSX, 2, { PT_DEST, PT_SRC, NULL, NULL } },
288 /* 92 */ { SVGA3DOP_DSY, 2, { PT_DEST, PT_SRC, NULL, NULL } },
289 /* 93 */ { SVGA3DOP_TEXLDD, 3, { PT_DEST, PT_SRC, PT_SRC, NULL } },
290 /* 94 */ { SVGA3DOP_SETP, 3, { PT_DEST, PT_SRC, PT_SRC, NULL } },
291 /* 95 */ { SVGA3DOP_TEXLDL, 3, { PT_DEST, PT_SRC, PT_SRC, NULL } },
292 /* 96 */ { SVGA3DOP_BREAKP, 1, { PT_SRC, NULL, NULL, NULL } },
293};
294
295#undef PT_DCL
296#undef PT_LBL
297#undef PT_DEST
298#undef PT_SRC
299
300/* Parse the shader code
301 * https://docs.microsoft.com/en-us/windows-hardware/drivers/display/shader-code-format
302 */
303int vmsvga3dShaderParse(SVGA3dShaderType type, uint32_t cbShaderData, uint32_t const* pShaderData)
304{
305 uint32_t const* paTokensStart = (uint32_t*)pShaderData;
306 uint32_t const cTokens = cbShaderData / sizeof(uint32_t);
307
308 ASSERT_GUEST_RETURN(cTokens * sizeof(uint32_t) == cbShaderData, VERR_INVALID_PARAMETER);
309
310 /* Need at least the version token and SVGA3DOP_END instruction token. 48KB is an arbitrary limit. */
311 ASSERT_GUEST_RETURN(cTokens >= 2 && cTokens < (48 * _1K) / sizeof(paTokensStart[0]), VERR_INVALID_PARAMETER);
312
313#ifdef LOG_ENABLED
314 Log3(("Shader code:\n"));
315 const uint32_t cTokensPerLine = 8;
316 for (uint32_t iToken = 0; iToken < cTokens; ++iToken)
317 {
318 if ((iToken % cTokensPerLine) == 0)
319 {
320 if (iToken == 0)
321 Log3(("0x%08X,", paTokensStart[iToken]));
322 else
323 Log3(("\n0x%08X,", paTokensStart[iToken]));
324 }
325 else
326 Log3((" 0x%08X,", paTokensStart[iToken]));
327 }
328 Log3(("\n"));
329#endif
330
331 VMSVGA3DSHADERPARSECONTEXT ctx;
332 RT_ZERO(ctx);
333
334 /* "The first token must be a version token." */
335 ctx.version = *(SVGA3dShaderVersion*)paTokensStart;
336 ASSERT_GUEST_RETURN(ctx.version.type == SVGA3D_VS_TYPE
337 || ctx.version.type == SVGA3D_PS_TYPE, VERR_PARSE_ERROR);
338 /* A vertex shader should not be defined with a pixel shader bytecode (and visa versa)*/
339 ASSERT_GUEST_RETURN((ctx.version.type == SVGA3D_VS_TYPE && type == SVGA3D_SHADERTYPE_VS)
340 || (ctx.version.type == SVGA3D_PS_TYPE && type == SVGA3D_SHADERTYPE_PS), VERR_PARSE_ERROR);
341 ASSERT_GUEST_RETURN(ctx.version.major >= 2 && ctx.version.major <= 4, VERR_PARSE_ERROR);
342
343 /* Scan the tokens. Immediately return an error code on any unexpected data. */
344 uint32_t const* paTokensEnd = &paTokensStart[cTokens];
345 uint32_t const* pToken = &paTokensStart[1]; /* Skip the version token. */
346 bool bEndTokenFound = false;
347 while (pToken < paTokensEnd)
348 {
349 SVGA3dShaderInstToken const token = *(SVGA3dShaderInstToken*)pToken;
350
351 /* Figure out the instruction length, which is how many tokens follow the instruction token. */
352 uint32_t const cInstLen = token.op == SVGA3DOP_COMMENT
353 ? token.comment_size
354 : token.size;
355
356 Log3(("op %d, cInstLen %d\n", token.op, cInstLen));
357
358 /* Must not be greater than the number of remaining tokens. */
359 ASSERT_GUEST_RETURN(cInstLen < paTokensEnd - pToken, VERR_PARSE_ERROR);
360
361 /* Stop parsing if this is the SVGA3DOP_END instruction. */
362 if (token.op == SVGA3DOP_END)
363 {
364 ASSERT_GUEST_RETURN(token.value == 0x0000FFFF, VERR_PARSE_ERROR);
365 bEndTokenFound = true;
366 break;
367 }
368
369 /* If this instrution is in the aOps table. */
370 if (token.op <= SVGA3DOP_BREAKP)
371 {
372 VMSVGA3DSHADERPARSEOP const* pOp = &aOps[token.op];
373
374 /* cInstLen can be greater than pOp->Length.
375 * W10 guest sends a vertex shader MUL instruction with length 4.
376 * So figure out the actual number of valid parameters.
377 */
378 uint32_t const cParams = RT_MIN(cInstLen, pOp->Length);
379
380 /* Parse paramater tokens. */
381 uint32_t i;
382 for (i = 0; i < RT_MIN(cParams, RT_ELEMENTS(pOp->apfnParse)); ++i)
383 {
384 if (!pOp->apfnParse[i])
385 continue;
386
387 int rc = pOp->apfnParse[i](&ctx, token.op, pToken[i + 1], i);
388 if (RT_FAILURE(rc))
389 return rc;
390 }
391 }
392 else if (token.op == SVGA3DOP_PHASE
393 || token.op == SVGA3DOP_COMMENT)
394 {
395 }
396 else
397 ASSERT_GUEST_FAILED_RETURN(VERR_PARSE_ERROR);
398
399 /* Next token. */
400 pToken += cInstLen + 1;
401 }
402
403 if (!bEndTokenFound)
404 {
405 ASSERT_GUEST_FAILED_RETURN(VERR_PARSE_ERROR);
406 }
407
408 return VINF_SUCCESS;
409}
410
411void vmsvga3dShaderLogRel(char const *pszMsg, SVGA3dShaderType type, uint32_t cbShaderData, uint32_t const *pShaderData)
412{
413 /* Dump the shader code. */
414 static int scLogged = 0;
415 if (scLogged < 8)
416 {
417 ++scLogged;
418
419 LogRel(("VMSVGA: %s shader: %s:\n", (type == SVGA3D_SHADERTYPE_VS) ? "VERTEX" : "PIXEL", pszMsg));
420 const uint32_t cTokensPerLine = 8;
421 const uint32_t *paTokens = (uint32_t *)pShaderData;
422 const uint32_t cTokens = cbShaderData / sizeof(uint32_t);
423 for (uint32_t iToken = 0; iToken < cTokens; ++iToken)
424 {
425 if ((iToken % cTokensPerLine) == 0)
426 {
427 if (iToken == 0)
428 LogRel(("0x%08X,", paTokens[iToken]));
429 else
430 LogRel(("\n0x%08X,", paTokens[iToken]));
431 }
432 else
433 LogRel((" 0x%08X,", paTokens[iToken]));
434 }
435 LogRel(("\n"));
436 }
437}
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