VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-win-dx.cpp@ 86898

Last change on this file since 86898 was 86886, checked in by vboxsync, 4 years ago

Devices/Graphics: Map and GBO interfaces. bugref:9830
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1/* $Id: DevVGA-SVGA3d-win-dx.cpp 86886 2020-11-14 02:30:53Z vboxsync $ */
2/** @file
3 * DevVMWare - VMWare SVGA device
4 */
5
6/*
7 * Copyright (C) 2020 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
23#include <VBox/AssertGuest.h>
24#include <VBox/log.h>
25#include <VBox/vmm/pdmdev.h>
26#include <VBox/vmm/pgm.h>
27
28#include <iprt/assert.h>
29#include <iprt/errcore.h>
30#include <iprt/mem.h>
31
32#include <VBoxVideo.h> /* required by DevVGA.h */
33#include <VBoxVideo3D.h>
34
35/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
36#include "DevVGA.h"
37
38#include "DevVGA-SVGA.h"
39#include "DevVGA-SVGA3d.h"
40#include "DevVGA-SVGA3d-internal.h"
41
42#include <d3d11.h>
43
44
45/* What kind of resource has been created for the VMSVGA3D surface. */
46typedef enum VMSVGA3DBACKRESTYPE
47{
48 VMSVGA3D_RESTYPE_NONE = 0,
49 VMSVGA3D_RESTYPE_SCREEN_TARGET = 1,
50 VMSVGA3D_RESTYPE_SURFACE = 2,
51 VMSVGA3D_RESTYPE_TEXTURE = 3,
52 VMSVGA3D_RESTYPE_CUBE_TEXTURE = 4,
53 VMSVGA3D_RESTYPE_VOLUME_TEXTURE = 5,
54 VMSVGA3D_RESTYPE_VERTEX_BUFFER = 6,
55 VMSVGA3D_RESTYPE_INDEX_BUFFER = 7,
56} VMSVGA3DBACKRESTYPE;
57
58struct VMSVGA3DBACKENDSURFACE
59{
60 VMSVGA3DBACKRESTYPE enmResType;
61 union
62 {
63 struct
64 {
65 ID3D11Texture2D *pTexture; /* The texture for the screen content. */
66 ID3D11Texture2D *pDynamicTexture; /* For screen updates from memory. */ /** @todo One for all screens. */
67 ID3D11Texture2D *pStagingTexture; /* For Reading the screen content. */ /** @todo One for all screens. */
68 } ScreenTarget;
69 struct
70 {
71 } Texture;
72 } u;
73} VMSVGA3DBACKENDSURFACE;
74
75typedef struct VMSVGAHWSCREEN
76{
77 ID3D11Texture2D *pTexture; /* Shared texture for the screen content. Only used as CopyResource target. */
78 IDXGIResource *pDxgiResource; /* Interface of the texture. */
79 IDXGIKeyedMutex *pDXGIKeyedMutex; /* Synchronization interface for the render device. */
80 HANDLE SharedHandle; /* The shared handle of this structure. */
81 uint32_t sidScreenTarget; /* The source surface for this screen. */
82} VMSVGAHWSCREEN;
83
84struct VMSVGA3DBACKEND
85{
86 RTLDRMOD hD3D11;
87 PFN_D3D11_CREATE_DEVICE pfnD3D11CreateDevice;
88
89 ID3D11Device *pDevice; /* Device for the VMSVGA3D context independent operation. */
90 ID3D11DeviceContext *pImmediateContext; /* Corresponding context. */
91 IDXGIFactory *pDxgiFactory; /* DXGI Factory. */
92 D3D_FEATURE_LEVEL FeatureLevel;
93} VMSVGA3DBACKEND;
94
95
96static DXGI_FORMAT vmsvgaDXScreenTargetFormat2Dxgi(SVGA3dSurfaceFormat format)
97{
98 switch (format)
99 {
100 /** @todo More formats required? */
101 case SVGA3D_X8R8G8B8: return DXGI_FORMAT_B8G8R8A8_UNORM;
102 case SVGA3D_A8R8G8B8: return DXGI_FORMAT_B8G8R8A8_UNORM;
103 default:
104 AssertFailed();
105 break;
106 }
107 return DXGI_FORMAT_UNKNOWN;
108}
109
110
111static DXGI_FORMAT vmsvgaDXSurfaceFormat2Dxgi(SVGA3dSurfaceFormat format)
112{
113#define DXGI_FORMAT_ DXGI_FORMAT_UNKNOWN
114 /** @todo More formats. */
115 switch (format)
116 {
117 case SVGA3D_X8R8G8B8: return DXGI_FORMAT_B8G8R8X8_UNORM;
118 case SVGA3D_A8R8G8B8: return DXGI_FORMAT_B8G8R8A8_UNORM;
119 case SVGA3D_R5G6B5: return DXGI_FORMAT_B5G6R5_UNORM;
120 case SVGA3D_X1R5G5B5: return DXGI_FORMAT_B5G5R5A1_UNORM;
121 case SVGA3D_A1R5G5B5: return DXGI_FORMAT_B5G5R5A1_UNORM;
122 case SVGA3D_A4R4G4B4: break; // 11.1 return DXGI_FORMAT_B4G4R4A4_UNORM;
123 case SVGA3D_Z_D32: break;
124 case SVGA3D_Z_D16: return DXGI_FORMAT_D16_UNORM;
125 case SVGA3D_Z_D24S8: return DXGI_FORMAT_D24_UNORM_S8_UINT;
126 case SVGA3D_Z_D15S1: break;
127 case SVGA3D_LUMINANCE8: return DXGI_FORMAT_;
128 case SVGA3D_LUMINANCE4_ALPHA4: return DXGI_FORMAT_;
129 case SVGA3D_LUMINANCE16: return DXGI_FORMAT_;
130 case SVGA3D_LUMINANCE8_ALPHA8: return DXGI_FORMAT_;
131 case SVGA3D_DXT1: return DXGI_FORMAT_;
132 case SVGA3D_DXT2: return DXGI_FORMAT_;
133 case SVGA3D_DXT3: return DXGI_FORMAT_;
134 case SVGA3D_DXT4: return DXGI_FORMAT_;
135 case SVGA3D_DXT5: return DXGI_FORMAT_;
136 case SVGA3D_BUMPU8V8: return DXGI_FORMAT_;
137 case SVGA3D_BUMPL6V5U5: return DXGI_FORMAT_;
138 case SVGA3D_BUMPX8L8V8U8: return DXGI_FORMAT_;
139 case SVGA3D_FORMAT_DEAD1: break;
140 case SVGA3D_ARGB_S10E5: return DXGI_FORMAT_;
141 case SVGA3D_ARGB_S23E8: return DXGI_FORMAT_;
142 case SVGA3D_A2R10G10B10: return DXGI_FORMAT_;
143 case SVGA3D_V8U8: return DXGI_FORMAT_;
144 case SVGA3D_Q8W8V8U8: return DXGI_FORMAT_;
145 case SVGA3D_CxV8U8: return DXGI_FORMAT_;
146 case SVGA3D_X8L8V8U8: return DXGI_FORMAT_;
147 case SVGA3D_A2W10V10U10: return DXGI_FORMAT_;
148 case SVGA3D_ALPHA8: return DXGI_FORMAT_;
149 case SVGA3D_R_S10E5: return DXGI_FORMAT_;
150 case SVGA3D_R_S23E8: return DXGI_FORMAT_;
151 case SVGA3D_RG_S10E5: return DXGI_FORMAT_;
152 case SVGA3D_RG_S23E8: return DXGI_FORMAT_;
153 case SVGA3D_BUFFER: return DXGI_FORMAT_;
154 case SVGA3D_Z_D24X8: return DXGI_FORMAT_;
155 case SVGA3D_V16U16: return DXGI_FORMAT_;
156 case SVGA3D_G16R16: return DXGI_FORMAT_;
157 case SVGA3D_A16B16G16R16: return DXGI_FORMAT_;
158 case SVGA3D_UYVY: return DXGI_FORMAT_;
159 case SVGA3D_YUY2: return DXGI_FORMAT_;
160 case SVGA3D_NV12: return DXGI_FORMAT_;
161 case SVGA3D_AYUV: return DXGI_FORMAT_;
162 case SVGA3D_R32G32B32A32_TYPELESS: return DXGI_FORMAT_R32G32B32A32_TYPELESS;
163 case SVGA3D_R32G32B32A32_UINT: return DXGI_FORMAT_R32G32B32A32_UINT;
164 case SVGA3D_R32G32B32A32_SINT: return DXGI_FORMAT_R32G32B32A32_SINT;
165 case SVGA3D_R32G32B32_TYPELESS: return DXGI_FORMAT_R32G32B32_TYPELESS;
166 case SVGA3D_R32G32B32_FLOAT: return DXGI_FORMAT_R32G32B32_FLOAT;
167 case SVGA3D_R32G32B32_UINT: return DXGI_FORMAT_R32G32B32_UINT;
168 case SVGA3D_R32G32B32_SINT: return DXGI_FORMAT_R32G32B32_SINT;
169 case SVGA3D_R16G16B16A16_TYPELESS: return DXGI_FORMAT_R16G16B16A16_TYPELESS;
170 case SVGA3D_R16G16B16A16_UINT: return DXGI_FORMAT_R16G16B16A16_UINT;
171 case SVGA3D_R16G16B16A16_SNORM: return DXGI_FORMAT_R16G16B16A16_SNORM;
172 case SVGA3D_R16G16B16A16_SINT: return DXGI_FORMAT_R16G16B16A16_SINT;
173 case SVGA3D_R32G32_TYPELESS: return DXGI_FORMAT_R32G32_TYPELESS;
174 case SVGA3D_R32G32_UINT: return DXGI_FORMAT_R32G32_UINT;
175 case SVGA3D_R32G32_SINT: return DXGI_FORMAT_R32G32_SINT;
176 case SVGA3D_R32G8X24_TYPELESS: return DXGI_FORMAT_R32G8X24_TYPELESS;
177 case SVGA3D_D32_FLOAT_S8X24_UINT: return DXGI_FORMAT_D32_FLOAT_S8X24_UINT;
178 case SVGA3D_R32_FLOAT_X8X24: return DXGI_FORMAT_R32_FLOAT_X8X24_TYPELESS;
179 case SVGA3D_X32_G8X24_UINT: return DXGI_FORMAT_X32_TYPELESS_G8X24_UINT;
180 case SVGA3D_R10G10B10A2_TYPELESS: return DXGI_FORMAT_R10G10B10A2_TYPELESS;
181 case SVGA3D_R10G10B10A2_UINT: return DXGI_FORMAT_R10G10B10A2_UINT;
182 case SVGA3D_R11G11B10_FLOAT: return DXGI_FORMAT_R11G11B10_FLOAT;
183 case SVGA3D_R8G8B8A8_TYPELESS: return DXGI_FORMAT_R8G8B8A8_TYPELESS;
184 case SVGA3D_R8G8B8A8_UNORM: return DXGI_FORMAT_R8G8B8A8_UNORM;
185 case SVGA3D_R8G8B8A8_UNORM_SRGB: return DXGI_FORMAT_R8G8B8A8_UNORM_SRGB;
186 case SVGA3D_R8G8B8A8_UINT: return DXGI_FORMAT_R8G8B8A8_UINT;
187 case SVGA3D_R8G8B8A8_SINT: return DXGI_FORMAT_R8G8B8A8_SINT;
188 case SVGA3D_R16G16_TYPELESS: return DXGI_FORMAT_R16G16_TYPELESS;
189 case SVGA3D_R16G16_UINT: return DXGI_FORMAT_R16G16_UINT;
190 case SVGA3D_R16G16_SINT: return DXGI_FORMAT_R16G16_SINT;
191 case SVGA3D_R32_TYPELESS: return DXGI_FORMAT_R32_TYPELESS;
192 case SVGA3D_D32_FLOAT: return DXGI_FORMAT_D32_FLOAT;
193 case SVGA3D_R32_UINT: return DXGI_FORMAT_R32_UINT;
194 case SVGA3D_R32_SINT: return DXGI_FORMAT_R32_SINT;
195 case SVGA3D_R24G8_TYPELESS: return DXGI_FORMAT_R24G8_TYPELESS;
196 case SVGA3D_D24_UNORM_S8_UINT: return DXGI_FORMAT_D24_UNORM_S8_UINT;
197 case SVGA3D_R24_UNORM_X8: return DXGI_FORMAT_R24_UNORM_X8_TYPELESS;
198 case SVGA3D_X24_G8_UINT: return DXGI_FORMAT_X24_TYPELESS_G8_UINT;
199 case SVGA3D_R8G8_TYPELESS: return DXGI_FORMAT_R8G8_TYPELESS;
200 case SVGA3D_R8G8_UNORM: return DXGI_FORMAT_R8G8_UNORM;
201 case SVGA3D_R8G8_UINT: return DXGI_FORMAT_R8G8_UINT;
202 case SVGA3D_R8G8_SINT: return DXGI_FORMAT_R8G8_SINT;
203 case SVGA3D_R16_TYPELESS: return DXGI_FORMAT_R16_TYPELESS;
204 case SVGA3D_R16_UNORM: return DXGI_FORMAT_R16_UNORM;
205 case SVGA3D_R16_UINT: return DXGI_FORMAT_R16_UINT;
206 case SVGA3D_R16_SNORM: return DXGI_FORMAT_R16_SNORM;
207 case SVGA3D_R16_SINT: return DXGI_FORMAT_R16_SINT;
208 case SVGA3D_R8_TYPELESS: return DXGI_FORMAT_R8_TYPELESS;
209 case SVGA3D_R8_UNORM: return DXGI_FORMAT_R8_UNORM;
210 case SVGA3D_R8_UINT: return DXGI_FORMAT_R8_UINT;
211 case SVGA3D_R8_SNORM: return DXGI_FORMAT_R8_SNORM;
212 case SVGA3D_R8_SINT: return DXGI_FORMAT_R8_SINT;
213 case SVGA3D_P8: break;
214 case SVGA3D_R9G9B9E5_SHAREDEXP: return DXGI_FORMAT_R9G9B9E5_SHAREDEXP;
215 case SVGA3D_R8G8_B8G8_UNORM: return DXGI_FORMAT_R8G8_B8G8_UNORM;
216 case SVGA3D_G8R8_G8B8_UNORM: return DXGI_FORMAT_G8R8_G8B8_UNORM;
217 case SVGA3D_BC1_TYPELESS: return DXGI_FORMAT_BC1_TYPELESS;
218 case SVGA3D_BC1_UNORM_SRGB: return DXGI_FORMAT_BC1_UNORM_SRGB;
219 case SVGA3D_BC2_TYPELESS: return DXGI_FORMAT_BC2_TYPELESS;
220 case SVGA3D_BC2_UNORM_SRGB: return DXGI_FORMAT_BC2_UNORM_SRGB;
221 case SVGA3D_BC3_TYPELESS: return DXGI_FORMAT_BC3_TYPELESS;
222 case SVGA3D_BC3_UNORM_SRGB: return DXGI_FORMAT_BC3_UNORM_SRGB;
223 case SVGA3D_BC4_TYPELESS: return DXGI_FORMAT_BC4_TYPELESS;
224 case SVGA3D_ATI1: break;
225 case SVGA3D_BC4_SNORM: return DXGI_FORMAT_BC4_SNORM;
226 case SVGA3D_BC5_TYPELESS: return DXGI_FORMAT_BC5_TYPELESS;
227 case SVGA3D_ATI2: break;
228 case SVGA3D_BC5_SNORM: return DXGI_FORMAT_BC5_SNORM;
229 case SVGA3D_R10G10B10_XR_BIAS_A2_UNORM: return DXGI_FORMAT_R10G10B10_XR_BIAS_A2_UNORM;
230 case SVGA3D_B8G8R8A8_TYPELESS: return DXGI_FORMAT_B8G8R8A8_TYPELESS;
231 case SVGA3D_B8G8R8A8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8A8_UNORM_SRGB;
232 case SVGA3D_B8G8R8X8_TYPELESS: return DXGI_FORMAT_B8G8R8X8_TYPELESS;
233 case SVGA3D_B8G8R8X8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8X8_UNORM_SRGB;
234 case SVGA3D_Z_DF16: break;
235 case SVGA3D_Z_DF24: break;
236 case SVGA3D_Z_D24S8_INT: return DXGI_FORMAT_D24_UNORM_S8_UINT;
237 case SVGA3D_YV12: break;
238 case SVGA3D_R32G32B32A32_FLOAT: return DXGI_FORMAT_R32G32B32A32_FLOAT;
239 case SVGA3D_R16G16B16A16_FLOAT: return DXGI_FORMAT_R16G16B16A16_FLOAT;
240 case SVGA3D_R16G16B16A16_UNORM: return DXGI_FORMAT_R16G16B16A16_UNORM;
241 case SVGA3D_R32G32_FLOAT: return DXGI_FORMAT_R32G32_FLOAT;
242 case SVGA3D_R10G10B10A2_UNORM: return DXGI_FORMAT_R10G10B10A2_UNORM;
243 case SVGA3D_R8G8B8A8_SNORM: return DXGI_FORMAT_R8G8B8A8_SNORM;
244 case SVGA3D_R16G16_FLOAT: return DXGI_FORMAT_R16G16_FLOAT;
245 case SVGA3D_R16G16_UNORM: return DXGI_FORMAT_R16G16_UNORM;
246 case SVGA3D_R16G16_SNORM: return DXGI_FORMAT_R16G16_SNORM;
247 case SVGA3D_R32_FLOAT: return DXGI_FORMAT_R32_FLOAT;
248 case SVGA3D_R8G8_SNORM: return DXGI_FORMAT_R8G8_SNORM;
249 case SVGA3D_R16_FLOAT: return DXGI_FORMAT_R16_FLOAT;
250 case SVGA3D_D16_UNORM: return DXGI_FORMAT_D16_UNORM;
251 case SVGA3D_A8_UNORM: return DXGI_FORMAT_A8_UNORM;
252 case SVGA3D_BC1_UNORM: return DXGI_FORMAT_BC1_UNORM;
253 case SVGA3D_BC2_UNORM: return DXGI_FORMAT_BC2_UNORM;
254 case SVGA3D_BC3_UNORM: return DXGI_FORMAT_BC3_UNORM;
255 case SVGA3D_B5G6R5_UNORM: return DXGI_FORMAT_B5G6R5_UNORM;
256 case SVGA3D_B5G5R5A1_UNORM: return DXGI_FORMAT_B5G5R5A1_UNORM;
257 case SVGA3D_B8G8R8A8_UNORM: return DXGI_FORMAT_B8G8R8A8_UNORM;
258 case SVGA3D_B8G8R8X8_UNORM: return DXGI_FORMAT_B8G8R8X8_UNORM;
259 case SVGA3D_BC4_UNORM: return DXGI_FORMAT_BC4_UNORM;
260 case SVGA3D_BC5_UNORM: return DXGI_FORMAT_BC5_UNORM;
261
262 case SVGA3D_FORMAT_INVALID:
263 case SVGA3D_FORMAT_MAX: break;
264 }
265 // AssertFailed();
266 return DXGI_FORMAT_UNKNOWN;
267#undef DXGI_FORMAT_
268}
269
270
271static SVGA3dSurfaceFormat vmsvgaDXDevCapSurfaceFmt2Format(SVGA3dDevCapIndex enmDevCap)
272{
273 switch (enmDevCap)
274 {
275 case SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8: return SVGA3D_X8R8G8B8;
276 case SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8: return SVGA3D_A8R8G8B8;
277 case SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10: return SVGA3D_A2R10G10B10;
278 case SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5: return SVGA3D_X1R5G5B5;
279 case SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5: return SVGA3D_A1R5G5B5;
280 case SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4: return SVGA3D_A4R4G4B4;
281 case SVGA3D_DEVCAP_SURFACEFMT_R5G6B5: return SVGA3D_R5G6B5;
282 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16: return SVGA3D_LUMINANCE16;
283 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8: return SVGA3D_LUMINANCE8_ALPHA8;
284 case SVGA3D_DEVCAP_SURFACEFMT_ALPHA8: return SVGA3D_ALPHA8;
285 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8: return SVGA3D_LUMINANCE8;
286 case SVGA3D_DEVCAP_SURFACEFMT_Z_D16: return SVGA3D_Z_D16;
287 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8: return SVGA3D_Z_D24S8;
288 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8: return SVGA3D_Z_D24X8;
289 case SVGA3D_DEVCAP_SURFACEFMT_DXT1: return SVGA3D_DXT1;
290 case SVGA3D_DEVCAP_SURFACEFMT_DXT2: return SVGA3D_DXT2;
291 case SVGA3D_DEVCAP_SURFACEFMT_DXT3: return SVGA3D_DXT3;
292 case SVGA3D_DEVCAP_SURFACEFMT_DXT4: return SVGA3D_DXT4;
293 case SVGA3D_DEVCAP_SURFACEFMT_DXT5: return SVGA3D_DXT5;
294 case SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8: return SVGA3D_BUMPX8L8V8U8;
295 case SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10: return SVGA3D_A2W10V10U10;
296 case SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8: return SVGA3D_BUMPU8V8;
297 case SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8: return SVGA3D_Q8W8V8U8;
298 case SVGA3D_DEVCAP_SURFACEFMT_CxV8U8: return SVGA3D_CxV8U8;
299 case SVGA3D_DEVCAP_SURFACEFMT_R_S10E5: return SVGA3D_R_S10E5;
300 case SVGA3D_DEVCAP_SURFACEFMT_R_S23E8: return SVGA3D_R_S23E8;
301 case SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5: return SVGA3D_RG_S10E5;
302 case SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8: return SVGA3D_RG_S23E8;
303 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5: return SVGA3D_ARGB_S10E5;
304 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8: return SVGA3D_ARGB_S23E8;
305 case SVGA3D_DEVCAP_SURFACEFMT_V16U16: return SVGA3D_V16U16;
306 case SVGA3D_DEVCAP_SURFACEFMT_G16R16: return SVGA3D_G16R16;
307 case SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16: return SVGA3D_A16B16G16R16;
308 case SVGA3D_DEVCAP_SURFACEFMT_UYVY: return SVGA3D_UYVY;
309 case SVGA3D_DEVCAP_SURFACEFMT_YUY2: return SVGA3D_YUY2;
310 case SVGA3D_DEVCAP_SURFACEFMT_NV12: return SVGA3D_NV12;
311 case SVGA3D_DEVCAP_SURFACEFMT_AYUV: return SVGA3D_AYUV;
312 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF16: return SVGA3D_Z_DF16;
313 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF24: return SVGA3D_Z_DF24;
314 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT: return SVGA3D_Z_D24S8_INT;
315 case SVGA3D_DEVCAP_SURFACEFMT_ATI1: return SVGA3D_ATI1;
316 case SVGA3D_DEVCAP_SURFACEFMT_ATI2: return SVGA3D_ATI2;
317 case SVGA3D_DEVCAP_SURFACEFMT_YV12: return SVGA3D_YV12;
318 default:
319 AssertFailed();
320 break;
321 }
322 return SVGA3D_FORMAT_INVALID;
323}
324
325
326static SVGA3dSurfaceFormat vmsvgaDXDevCapDxfmt2Format(SVGA3dDevCapIndex enmDevCap)
327{
328 switch (enmDevCap)
329 {
330 case SVGA3D_DEVCAP_DXFMT_X8R8G8B8: return SVGA3D_X8R8G8B8;
331 case SVGA3D_DEVCAP_DXFMT_A8R8G8B8: return SVGA3D_A8R8G8B8;
332 case SVGA3D_DEVCAP_DXFMT_R5G6B5: return SVGA3D_R5G6B5;
333 case SVGA3D_DEVCAP_DXFMT_X1R5G5B5: return SVGA3D_X1R5G5B5;
334 case SVGA3D_DEVCAP_DXFMT_A1R5G5B5: return SVGA3D_A1R5G5B5;
335 case SVGA3D_DEVCAP_DXFMT_A4R4G4B4: return SVGA3D_A4R4G4B4;
336 case SVGA3D_DEVCAP_DXFMT_Z_D32: return SVGA3D_Z_D32;
337 case SVGA3D_DEVCAP_DXFMT_Z_D16: return SVGA3D_Z_D16;
338 case SVGA3D_DEVCAP_DXFMT_Z_D24S8: return SVGA3D_Z_D24S8;
339 case SVGA3D_DEVCAP_DXFMT_Z_D15S1: return SVGA3D_Z_D15S1;
340 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8: return SVGA3D_LUMINANCE8;
341 case SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4: return SVGA3D_LUMINANCE4_ALPHA4;
342 case SVGA3D_DEVCAP_DXFMT_LUMINANCE16: return SVGA3D_LUMINANCE16;
343 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8: return SVGA3D_LUMINANCE8_ALPHA8;
344 case SVGA3D_DEVCAP_DXFMT_DXT1: return SVGA3D_DXT1;
345 case SVGA3D_DEVCAP_DXFMT_DXT2: return SVGA3D_DXT2;
346 case SVGA3D_DEVCAP_DXFMT_DXT3: return SVGA3D_DXT3;
347 case SVGA3D_DEVCAP_DXFMT_DXT4: return SVGA3D_DXT4;
348 case SVGA3D_DEVCAP_DXFMT_DXT5: return SVGA3D_DXT5;
349 case SVGA3D_DEVCAP_DXFMT_BUMPU8V8: return SVGA3D_BUMPU8V8;
350 case SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5: return SVGA3D_BUMPL6V5U5;
351 case SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8: return SVGA3D_BUMPX8L8V8U8;
352 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1: return SVGA3D_FORMAT_DEAD1;
353 case SVGA3D_DEVCAP_DXFMT_ARGB_S10E5: return SVGA3D_ARGB_S10E5;
354 case SVGA3D_DEVCAP_DXFMT_ARGB_S23E8: return SVGA3D_ARGB_S23E8;
355 case SVGA3D_DEVCAP_DXFMT_A2R10G10B10: return SVGA3D_A2R10G10B10;
356 case SVGA3D_DEVCAP_DXFMT_V8U8: return SVGA3D_V8U8;
357 case SVGA3D_DEVCAP_DXFMT_Q8W8V8U8: return SVGA3D_Q8W8V8U8;
358 case SVGA3D_DEVCAP_DXFMT_CxV8U8: return SVGA3D_CxV8U8;
359 case SVGA3D_DEVCAP_DXFMT_X8L8V8U8: return SVGA3D_X8L8V8U8;
360 case SVGA3D_DEVCAP_DXFMT_A2W10V10U10: return SVGA3D_A2W10V10U10;
361 case SVGA3D_DEVCAP_DXFMT_ALPHA8: return SVGA3D_ALPHA8;
362 case SVGA3D_DEVCAP_DXFMT_R_S10E5: return SVGA3D_R_S10E5;
363 case SVGA3D_DEVCAP_DXFMT_R_S23E8: return SVGA3D_R_S23E8;
364 case SVGA3D_DEVCAP_DXFMT_RG_S10E5: return SVGA3D_RG_S10E5;
365 case SVGA3D_DEVCAP_DXFMT_RG_S23E8: return SVGA3D_RG_S23E8;
366 case SVGA3D_DEVCAP_DXFMT_BUFFER: return SVGA3D_BUFFER;
367 case SVGA3D_DEVCAP_DXFMT_Z_D24X8: return SVGA3D_Z_D24X8;
368 case SVGA3D_DEVCAP_DXFMT_V16U16: return SVGA3D_V16U16;
369 case SVGA3D_DEVCAP_DXFMT_G16R16: return SVGA3D_G16R16;
370 case SVGA3D_DEVCAP_DXFMT_A16B16G16R16: return SVGA3D_A16B16G16R16;
371 case SVGA3D_DEVCAP_DXFMT_UYVY: return SVGA3D_UYVY;
372 case SVGA3D_DEVCAP_DXFMT_YUY2: return SVGA3D_YUY2;
373 case SVGA3D_DEVCAP_DXFMT_NV12: return SVGA3D_NV12;
374 case SVGA3D_DEVCAP_DXFMT_AYUV: return SVGA3D_AYUV;
375 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS: return SVGA3D_R32G32B32A32_TYPELESS;
376 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT: return SVGA3D_R32G32B32A32_UINT;
377 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT: return SVGA3D_R32G32B32A32_SINT;
378 case SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS: return SVGA3D_R32G32B32_TYPELESS;
379 case SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT: return SVGA3D_R32G32B32_FLOAT;
380 case SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT: return SVGA3D_R32G32B32_UINT;
381 case SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT: return SVGA3D_R32G32B32_SINT;
382 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS: return SVGA3D_R16G16B16A16_TYPELESS;
383 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT: return SVGA3D_R16G16B16A16_UINT;
384 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM: return SVGA3D_R16G16B16A16_SNORM;
385 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT: return SVGA3D_R16G16B16A16_SINT;
386 case SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS: return SVGA3D_R32G32_TYPELESS;
387 case SVGA3D_DEVCAP_DXFMT_R32G32_UINT: return SVGA3D_R32G32_UINT;
388 case SVGA3D_DEVCAP_DXFMT_R32G32_SINT: return SVGA3D_R32G32_SINT;
389 case SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS: return SVGA3D_R32G8X24_TYPELESS;
390 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT: return SVGA3D_D32_FLOAT_S8X24_UINT;
391 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24_TYPELESS: return SVGA3D_R32_FLOAT_X8X24;
392 case SVGA3D_DEVCAP_DXFMT_X32_TYPELESS_G8X24_UINT: return SVGA3D_X32_G8X24_UINT;
393 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS: return SVGA3D_R10G10B10A2_TYPELESS;
394 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT: return SVGA3D_R10G10B10A2_UINT;
395 case SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT: return SVGA3D_R11G11B10_FLOAT;
396 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS: return SVGA3D_R8G8B8A8_TYPELESS;
397 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM: return SVGA3D_R8G8B8A8_UNORM;
398 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB: return SVGA3D_R8G8B8A8_UNORM_SRGB;
399 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT: return SVGA3D_R8G8B8A8_UINT;
400 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT: return SVGA3D_R8G8B8A8_SINT;
401 case SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS: return SVGA3D_R16G16_TYPELESS;
402 case SVGA3D_DEVCAP_DXFMT_R16G16_UINT: return SVGA3D_R16G16_UINT;
403 case SVGA3D_DEVCAP_DXFMT_R16G16_SINT: return SVGA3D_R16G16_SINT;
404 case SVGA3D_DEVCAP_DXFMT_R32_TYPELESS: return SVGA3D_R32_TYPELESS;
405 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT: return SVGA3D_D32_FLOAT;
406 case SVGA3D_DEVCAP_DXFMT_R32_UINT: return SVGA3D_R32_UINT;
407 case SVGA3D_DEVCAP_DXFMT_R32_SINT: return SVGA3D_R32_SINT;
408 case SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS: return SVGA3D_R24G8_TYPELESS;
409 case SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT: return SVGA3D_D24_UNORM_S8_UINT;
410 case SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8_TYPELESS: return SVGA3D_R24_UNORM_X8;
411 case SVGA3D_DEVCAP_DXFMT_X24_TYPELESS_G8_UINT: return SVGA3D_X24_G8_UINT;
412 case SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS: return SVGA3D_R8G8_TYPELESS;
413 case SVGA3D_DEVCAP_DXFMT_R8G8_UNORM: return SVGA3D_R8G8_UNORM;
414 case SVGA3D_DEVCAP_DXFMT_R8G8_UINT: return SVGA3D_R8G8_UINT;
415 case SVGA3D_DEVCAP_DXFMT_R8G8_SINT: return SVGA3D_R8G8_SINT;
416 case SVGA3D_DEVCAP_DXFMT_R16_TYPELESS: return SVGA3D_R16_TYPELESS;
417 case SVGA3D_DEVCAP_DXFMT_R16_UNORM: return SVGA3D_R16_UNORM;
418 case SVGA3D_DEVCAP_DXFMT_R16_UINT: return SVGA3D_R16_UINT;
419 case SVGA3D_DEVCAP_DXFMT_R16_SNORM: return SVGA3D_R16_SNORM;
420 case SVGA3D_DEVCAP_DXFMT_R16_SINT: return SVGA3D_R16_SINT;
421 case SVGA3D_DEVCAP_DXFMT_R8_TYPELESS: return SVGA3D_R8_TYPELESS;
422 case SVGA3D_DEVCAP_DXFMT_R8_UNORM: return SVGA3D_R8_UNORM;
423 case SVGA3D_DEVCAP_DXFMT_R8_UINT: return SVGA3D_R8_UINT;
424 case SVGA3D_DEVCAP_DXFMT_R8_SNORM: return SVGA3D_R8_SNORM;
425 case SVGA3D_DEVCAP_DXFMT_R8_SINT: return SVGA3D_R8_SINT;
426 case SVGA3D_DEVCAP_DXFMT_P8: return SVGA3D_P8;
427 case SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP: return SVGA3D_R9G9B9E5_SHAREDEXP;
428 case SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM: return SVGA3D_R8G8_B8G8_UNORM;
429 case SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM: return SVGA3D_G8R8_G8B8_UNORM;
430 case SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS: return SVGA3D_BC1_TYPELESS;
431 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB: return SVGA3D_BC1_UNORM_SRGB;
432 case SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS: return SVGA3D_BC2_TYPELESS;
433 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB: return SVGA3D_BC2_UNORM_SRGB;
434 case SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS: return SVGA3D_BC3_TYPELESS;
435 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB: return SVGA3D_BC3_UNORM_SRGB;
436 case SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS: return SVGA3D_BC4_TYPELESS;
437 case SVGA3D_DEVCAP_DXFMT_ATI1: return SVGA3D_ATI1;
438 case SVGA3D_DEVCAP_DXFMT_BC4_SNORM: return SVGA3D_BC4_SNORM;
439 case SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS: return SVGA3D_BC5_TYPELESS;
440 case SVGA3D_DEVCAP_DXFMT_ATI2: return SVGA3D_ATI2;
441 case SVGA3D_DEVCAP_DXFMT_BC5_SNORM: return SVGA3D_BC5_SNORM;
442 case SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM: return SVGA3D_R10G10B10_XR_BIAS_A2_UNORM;
443 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS: return SVGA3D_B8G8R8A8_TYPELESS;
444 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB: return SVGA3D_B8G8R8A8_UNORM_SRGB;
445 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS: return SVGA3D_B8G8R8X8_TYPELESS;
446 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB: return SVGA3D_B8G8R8X8_UNORM_SRGB;
447 case SVGA3D_DEVCAP_DXFMT_Z_DF16: return SVGA3D_Z_DF16;
448 case SVGA3D_DEVCAP_DXFMT_Z_DF24: return SVGA3D_Z_DF24;
449 case SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT: return SVGA3D_Z_D24S8_INT;
450 case SVGA3D_DEVCAP_DXFMT_YV12: return SVGA3D_YV12;
451 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT: return SVGA3D_R32G32B32A32_FLOAT;
452 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT: return SVGA3D_R16G16B16A16_FLOAT;
453 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM: return SVGA3D_R16G16B16A16_UNORM;
454 case SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT: return SVGA3D_R32G32_FLOAT;
455 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM: return SVGA3D_R10G10B10A2_UNORM;
456 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM: return SVGA3D_R8G8B8A8_SNORM;
457 case SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT: return SVGA3D_R16G16_FLOAT;
458 case SVGA3D_DEVCAP_DXFMT_R16G16_UNORM: return SVGA3D_R16G16_UNORM;
459 case SVGA3D_DEVCAP_DXFMT_R16G16_SNORM: return SVGA3D_R16G16_SNORM;
460 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT: return SVGA3D_R32_FLOAT;
461 case SVGA3D_DEVCAP_DXFMT_R8G8_SNORM: return SVGA3D_R8G8_SNORM;
462 case SVGA3D_DEVCAP_DXFMT_R16_FLOAT: return SVGA3D_R16_FLOAT;
463 case SVGA3D_DEVCAP_DXFMT_D16_UNORM: return SVGA3D_D16_UNORM;
464 case SVGA3D_DEVCAP_DXFMT_A8_UNORM: return SVGA3D_A8_UNORM;
465 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM: return SVGA3D_BC1_UNORM;
466 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM: return SVGA3D_BC2_UNORM;
467 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM: return SVGA3D_BC3_UNORM;
468 case SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM: return SVGA3D_B5G6R5_UNORM;
469 case SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM: return SVGA3D_B5G5R5A1_UNORM;
470 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM: return SVGA3D_B8G8R8A8_UNORM;
471 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM: return SVGA3D_B8G8R8X8_UNORM;
472 case SVGA3D_DEVCAP_DXFMT_BC4_UNORM: return SVGA3D_BC4_UNORM;
473 case SVGA3D_DEVCAP_DXFMT_BC5_UNORM: return SVGA3D_BC5_UNORM;
474 default:
475 AssertFailed();
476 break;
477 }
478 return SVGA3D_FORMAT_INVALID;
479}
480
481
482static int vmsvgaDXCheckFormatSupportPreDX(PVMSVGA3DSTATE pState, SVGA3dSurfaceFormat enmFormat, uint32_t *pu32DevCap)
483{
484 int rc = VINF_SUCCESS;
485
486 *pu32DevCap = 0;
487
488 DXGI_FORMAT const dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(enmFormat);
489 if (dxgiFormat != DXGI_FORMAT_UNKNOWN)
490 {
491 RT_NOREF(pState);
492 /** @todo Implement */
493 }
494 else
495 rc = VERR_NOT_SUPPORTED;
496 return rc;
497}
498
499static int vmsvgaDXCheckFormatSupport(PVMSVGA3DSTATE pState, SVGA3dSurfaceFormat enmFormat, uint32_t *pu32DevCap)
500{
501 int rc = VINF_SUCCESS;
502
503 *pu32DevCap = 0;
504
505 DXGI_FORMAT const dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(enmFormat);
506 if (dxgiFormat != DXGI_FORMAT_UNKNOWN)
507 {
508 ID3D11Device *pDevice = pState->pBackend->pDevice;
509 UINT FormatSupport = 0;
510 HRESULT hr = pDevice->CheckFormatSupport(dxgiFormat, &FormatSupport);
511 if (SUCCEEDED(hr))
512 {
513 *pu32DevCap |= SVGA3D_DXFMT_SUPPORTED;
514
515 if (FormatSupport & D3D11_FORMAT_SUPPORT_SHADER_SAMPLE)
516 *pu32DevCap |= SVGA3D_DXFMT_SHADER_SAMPLE;
517
518 if (FormatSupport & D3D11_FORMAT_SUPPORT_RENDER_TARGET)
519 *pu32DevCap |= SVGA3D_DXFMT_COLOR_RENDERTARGET;
520
521 if (FormatSupport & D3D11_FORMAT_SUPPORT_DEPTH_STENCIL)
522 *pu32DevCap |= SVGA3D_DXFMT_DEPTH_RENDERTARGET;
523
524 if (FormatSupport & D3D11_FORMAT_SUPPORT_BLENDABLE)
525 *pu32DevCap |= SVGA3D_DXFMT_BLENDABLE;
526
527 if (FormatSupport & D3D11_FORMAT_SUPPORT_MIP)
528 *pu32DevCap |= SVGA3D_DXFMT_MIPS;
529
530 if (FormatSupport & D3D11_FORMAT_SUPPORT_TEXTURECUBE)
531 *pu32DevCap |= SVGA3D_DXFMT_ARRAY;
532
533 if (FormatSupport & D3D11_FORMAT_SUPPORT_TEXTURE3D)
534 *pu32DevCap |= SVGA3D_DXFMT_VOLUME;
535
536 if (FormatSupport & D3D11_FORMAT_SUPPORT_IA_VERTEX_BUFFER)
537 *pu32DevCap |= SVGA3D_DXFMT_DX_VERTEX_BUFFER;
538
539 UINT NumQualityLevels;
540 hr = pDevice->CheckMultisampleQualityLevels(dxgiFormat, 2, &NumQualityLevels);
541 if (SUCCEEDED(hr) && NumQualityLevels != 0)
542 *pu32DevCap |= SVGADX_DXFMT_MULTISAMPLE_2;
543
544 hr = pDevice->CheckMultisampleQualityLevels(dxgiFormat, 4, &NumQualityLevels);
545 if (SUCCEEDED(hr) && NumQualityLevels != 0)
546 *pu32DevCap |= SVGADX_DXFMT_MULTISAMPLE_4;
547
548 hr = pDevice->CheckMultisampleQualityLevels(dxgiFormat, 8, &NumQualityLevels);
549 if (SUCCEEDED(hr) && NumQualityLevels != 0)
550 *pu32DevCap |= SVGADX_DXFMT_MULTISAMPLE_8;
551 }
552 else
553 rc = VERR_NOT_SUPPORTED;
554 }
555 else
556 rc = VERR_NOT_SUPPORTED;
557 return rc;
558}
559
560
561int vmsvga3dInit(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC)
562{
563 RT_NOREF(pDevIns, pThis);
564
565 PVMSVGA3DSTATE pState = (PVMSVGA3DSTATE)RTMemAllocZ(sizeof(VMSVGA3DSTATE));
566 AssertReturn(pState, VERR_NO_MEMORY);
567 pThisCC->svga.p3dState = pState;
568
569 PVMSVGA3DBACKEND pBackend = (PVMSVGA3DBACKEND)RTMemAllocZ(sizeof(VMSVGA3DBACKEND));
570 AssertReturn(pBackend, VERR_NO_MEMORY);
571 pState->pBackend = pBackend;
572
573 int rc = RTLdrLoadSystem("d3d11", /* fNoUnload = */ true, &pBackend->hD3D11);
574 AssertRC(rc);
575 if (RT_SUCCESS(rc))
576 {
577 rc = RTLdrGetSymbol(pBackend->hD3D11, "D3D11CreateDevice", (void **)&pBackend->pfnD3D11CreateDevice);
578 AssertRC(rc);
579 }
580
581 return rc;
582}
583
584
585int vmsvga3dPowerOn(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC)
586{
587 RT_NOREF(pDevIns, pThis);
588
589 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
590 AssertReturn(pState, VERR_INVALID_STATE);
591
592 PVMSVGA3DBACKEND pBackend = pState->pBackend;
593 AssertReturn(pBackend, VERR_INVALID_STATE);
594
595 int rc = VINF_SUCCESS;
596
597 IDXGIAdapter *pAdapter = NULL; /* Default adapter. */
598 static D3D_FEATURE_LEVEL const s_aFeatureLevels[] =
599 {
600 /// @todo Requires a Windows 8+ _SDKS: D3D_FEATURE_LEVEL_11_1,
601 D3D_FEATURE_LEVEL_11_0
602 };
603 UINT Flags = D3D11_CREATE_DEVICE_BGRA_SUPPORT;
604#ifdef DEBUG
605 Flags |= D3D11_CREATE_DEVICE_DEBUG;
606#endif
607
608 HRESULT hr = pBackend->pfnD3D11CreateDevice(pAdapter,
609 D3D_DRIVER_TYPE_HARDWARE,
610 NULL,
611 Flags,
612 s_aFeatureLevels,
613 RT_ELEMENTS(s_aFeatureLevels),
614 D3D11_SDK_VERSION,
615 &pBackend->pDevice,
616 &pBackend->FeatureLevel,
617 &pBackend->pImmediateContext);
618 if (SUCCEEDED(hr))
619 {
620 LogRel(("VMSVGA: Feature level %#x\n", pBackend->FeatureLevel));
621
622 IDXGIDevice *pDxgiDevice = 0;
623 hr = pBackend->pDevice->QueryInterface(__uuidof(IDXGIDevice), (void**)&pDxgiDevice);
624 if (SUCCEEDED(hr))
625 {
626 IDXGIAdapter *pDxgiAdapter = 0;
627 hr = pDxgiDevice->GetParent(__uuidof(IDXGIAdapter), (void**)&pDxgiAdapter);
628 if (SUCCEEDED(hr))
629 {
630 hr = pDxgiAdapter->GetParent(__uuidof(IDXGIFactory), (void**)&pBackend->pDxgiFactory);
631 D3D_RELEASE(pDxgiAdapter);
632 }
633
634 D3D_RELEASE(pDxgiDevice);
635 }
636 }
637
638 if (FAILED(hr))
639 rc = VERR_NOT_SUPPORTED;
640
641 return rc;
642}
643
644
645int vmsvga3dTerminate(PVGASTATECC pThisCC)
646{
647 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
648 AssertReturn(pState, VERR_INVALID_STATE);
649
650 if (pState->pBackend)
651 {
652 D3D_RELEASE(pState->pBackend->pDevice);
653 D3D_RELEASE(pState->pBackend->pImmediateContext);
654 D3D_RELEASE(pState->pBackend->pDxgiFactory);
655
656 RTMemFree(pState->pBackend);
657 pState->pBackend = NULL;
658 }
659
660 return VINF_SUCCESS;
661}
662
663
664int vmsvga3dReset(PVGASTATECC pThisCC)
665{
666 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
667 AssertReturn(pState, VERR_INVALID_STATE);
668
669 /** @todo Cleanup all resources and recreate Device, ImmediateContext etc to be at the same state as after poweron. */
670
671 return VINF_SUCCESS;
672}
673
674
675static int vmsvga3dDrvNotifyDefineScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
676{
677 /** @todo Such structures must be in VBoxVideo3D.h */
678 typedef struct VBOX3DNOTIFYDEFINESCREEN
679 {
680 VBOX3DNOTIFY Core;
681 uint32_t cWidth;
682 uint32_t cHeight;
683 int32_t xRoot;
684 int32_t yRoot;
685 uint32_t fPrimary;
686 uint32_t cDpi;
687 } VBOX3DNOTIFYDEFINESCREEN;
688
689 VBOX3DNOTIFYDEFINESCREEN n;
690 n.Core.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_CREATED;
691 n.Core.iDisplay = pScreen->idScreen;
692 n.Core.u32Reserved = 0;
693 n.Core.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
694 RT_ZERO(n.Core.au8Data);
695 n.cWidth = pScreen->cWidth;
696 n.cHeight = pScreen->cHeight;
697 n.xRoot = pScreen->xOrigin;
698 n.yRoot = pScreen->yOrigin;
699 n.fPrimary = RT_BOOL(pScreen->fuScreen & SVGA_SCREEN_IS_PRIMARY);
700 n.cDpi = pScreen->cDpi;
701
702 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n.Core);
703}
704
705
706static int vmsvga3dDrvNotifyDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
707{
708 VBOX3DNOTIFY n;
709 n.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_DESTROYED;
710 n.iDisplay = pScreen->idScreen;
711 n.u32Reserved = 0;
712 n.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
713 RT_ZERO(n.au8Data);
714
715 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n);
716}
717
718
719static int vmsvga3dDrvNotifyBindSurface(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, HANDLE hSharedSurface)
720{
721 VBOX3DNOTIFY n;
722 n.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_BIND_SURFACE;
723 n.iDisplay = pScreen->idScreen;
724 n.u32Reserved = 0;
725 n.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
726 *(uint64_t *)&n.au8Data[0] = (uint64_t)hSharedSurface;
727
728 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n);
729}
730
731
732static int vmsvga3dDrvNotifyUpdate(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen,
733 uint32_t x, uint32_t y, uint32_t w, uint32_t h)
734{
735 typedef struct VBOX3DNOTIFYUPDATE
736 {
737 VBOX3DNOTIFY Core;
738 uint32_t x;
739 uint32_t y;
740 uint32_t w;
741 uint32_t h;
742 } VBOX3DNOTIFYUPDATE;
743
744 VBOX3DNOTIFYUPDATE n;
745 n.Core.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_UPDATE_END;
746 n.Core.iDisplay = pScreen->idScreen;
747 n.Core.u32Reserved = 0;
748 n.Core.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
749 RT_ZERO(n.Core.au8Data);
750 n.x = x;
751 n.y = y;
752 n.w = w;
753 n.h = h;
754
755 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n.Core);
756}
757
758static int vmsvga3dHwScreenCreate(PVMSVGA3DSTATE pState, uint32_t cWidth, uint32_t cHeight, VMSVGAHWSCREEN *p)
759{
760 PVMSVGA3DBACKEND pBackend = pState->pBackend;
761
762 D3D11_TEXTURE2D_DESC td;
763 RT_ZERO(td);
764 td.Width = cWidth;
765 td.Height = cHeight;
766 td.MipLevels = 1;
767 td.ArraySize = 1;
768 td.Format = DXGI_FORMAT_B8G8R8A8_UNORM;
769 td.SampleDesc.Count = 1;
770 td.SampleDesc.Quality = 0;
771 td.Usage = D3D11_USAGE_DEFAULT;
772 td.BindFlags = D3D11_BIND_RENDER_TARGET | D3D11_BIND_SHADER_RESOURCE;
773 td.CPUAccessFlags = 0;
774 td.MiscFlags = D3D11_RESOURCE_MISC_SHARED_KEYEDMUTEX;
775
776 HRESULT hr = pBackend->pDevice->CreateTexture2D(&td, 0, &p->pTexture);
777 if (SUCCEEDED(hr))
778 {
779 /* Get the shared handle. */
780 hr = p->pTexture->QueryInterface(__uuidof(IDXGIResource), (void**)&p->pDxgiResource);
781 if (SUCCEEDED(hr))
782 {
783 hr = p->pDxgiResource->GetSharedHandle(&p->SharedHandle);
784 if (SUCCEEDED(hr))
785 hr = p->pTexture->QueryInterface(__uuidof(IDXGIKeyedMutex), (void**)&p->pDXGIKeyedMutex);
786 }
787 }
788
789 if (SUCCEEDED(hr))
790 return VINF_SUCCESS;
791
792 AssertFailed();
793 return VERR_NOT_SUPPORTED;
794}
795
796
797static void vmsvga3dHwScreenDestroy(PVMSVGA3DSTATE pState, VMSVGAHWSCREEN *p)
798{
799 RT_NOREF(pState);
800 D3D_RELEASE(p->pDXGIKeyedMutex);
801 D3D_RELEASE(p->pDxgiResource);
802 D3D_RELEASE(p->pTexture);
803 p->SharedHandle = 0;
804 p->sidScreenTarget = SVGA_ID_INVALID;
805}
806
807
808int vmsvga3dBackDefineScreen(PVGASTATE pThis, PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
809{
810 RT_NOREF(pThis, pThisCC, pScreen);
811
812 LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: screen %u\n", pScreen->idScreen));
813
814 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
815 AssertReturn(pState, VERR_INVALID_STATE);
816
817 PVMSVGA3DBACKEND pBackend = pState->pBackend;
818 AssertReturn(pBackend, VERR_INVALID_STATE);
819
820 Assert(pScreen->pHwScreen == NULL);
821
822 VMSVGAHWSCREEN *p = (VMSVGAHWSCREEN *)RTMemAllocZ(sizeof(VMSVGAHWSCREEN));
823 AssertPtrReturn(p, VERR_NO_MEMORY);
824
825 p->sidScreenTarget = SVGA_ID_INVALID;
826
827 int rc = vmsvga3dDrvNotifyDefineScreen(pThisCC, pScreen);
828 if (RT_SUCCESS(rc))
829 {
830 /* The frontend supports the screen. Create the actual resource. */
831 rc = vmsvga3dHwScreenCreate(pState, pScreen->cWidth, pScreen->cHeight, p);
832 if (RT_SUCCESS(rc))
833 LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: created\n"));
834 }
835
836 if (RT_SUCCESS(rc))
837 {
838 LogRel(("VMSVGA: Using HW accelerated screen %u\n", pScreen->idScreen));
839 pScreen->pHwScreen = p;
840 }
841 else
842 {
843 LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: %Rrc\n", rc));
844 vmsvga3dHwScreenDestroy(pState, p);
845 RTMemFree(p);
846 }
847
848 return rc;
849}
850
851
852int vmsvga3dBackDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
853{
854 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
855 AssertReturn(pState, VERR_INVALID_STATE);
856
857 vmsvga3dDrvNotifyDestroyScreen(pThisCC, pScreen);
858
859 if (pScreen->pHwScreen)
860 {
861 vmsvga3dHwScreenDestroy(pState, pScreen->pHwScreen);
862 RTMemFree(pScreen->pHwScreen);
863 pScreen->pHwScreen = NULL;
864 }
865
866 return VINF_SUCCESS;
867}
868
869
870int vmsvga3dBackSurfaceBlitToScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen,
871 SVGASignedRect destRect, SVGA3dSurfaceImageId srcImage,
872 SVGASignedRect srcRect, uint32_t cRects, SVGASignedRect *paRects)
873{
874 RT_NOREF(pThisCC, pScreen, destRect, srcImage, srcRect, cRects, paRects);
875
876 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
877 AssertReturn(pState, VERR_INVALID_STATE);
878
879 PVMSVGA3DBACKEND pBackend = pState->pBackend;
880 AssertReturn(pBackend, VERR_INVALID_STATE);
881
882 VMSVGAHWSCREEN *p = pScreen->pHwScreen;
883 AssertReturn(p, VERR_NOT_SUPPORTED);
884
885 PVMSVGA3DSURFACE pSurface;
886 int rc = vmsvga3dSurfaceFromSid(pState, srcImage.sid, &pSurface);
887 AssertRCReturn(rc, rc);
888
889 /** @todo Implement. */
890 AssertFailed();
891 return VERR_NOT_IMPLEMENTED;
892}
893
894
895static DECLCALLBACK(int) vmsvga3dSurfaceMap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImage, SVGA3dBox const *pBox,
896 VMSVGA3D_SURFACE_MAP enmMapType, VMSVGA3D_MAPPED_SURFACE *pMap)
897{
898 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
899 AssertReturn(pState, VERR_INVALID_STATE);
900
901 PVMSVGA3DBACKEND pBackend = pState->pBackend;
902 AssertReturn(pBackend, VERR_INVALID_STATE);
903 AssertReturn(pBackend->pImmediateContext, VERR_INVALID_STATE);
904
905 PVMSVGA3DSURFACE pSurface;
906 int rc = vmsvga3dSurfaceFromSid(pState, pImage->sid, &pSurface);
907 AssertRCReturn(rc, rc);
908
909 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
910 if (!pBackendSurface)
911 return VERR_INVALID_PARAMETER;
912
913 SVGA3dBox clipBox;
914 if (pBox)
915 {
916 clipBox = *pBox;
917 vmsvgaR3ClipBox(&pSurface->paMipmapLevels[0].mipmapSize, &clipBox);
918 ASSERT_GUEST_RETURN(clipBox.w && clipBox.h && clipBox.d, VERR_INVALID_PARAMETER);
919 }
920 else
921 {
922 clipBox.x = 0;
923 clipBox.y = 0;
924 clipBox.z = 0;
925 clipBox.w = pSurface->paMipmapLevels[0].mipmapSize.width;
926 clipBox.h = pSurface->paMipmapLevels[0].mipmapSize.height;
927 clipBox.d = pSurface->paMipmapLevels[0].mipmapSize.depth;
928 }
929
930 /** @todo D3D11_MAP_WRITE does not work with D3D11_USAGE_DYNAMIC resources. Probably VMSVGA3D_SURFACE_MAP_WRITE is not necessary. */
931 D3D11_MAP d3d11MapType;
932 switch (enmMapType)
933 {
934 case VMSVGA3D_SURFACE_MAP_READ: d3d11MapType = D3D11_MAP_READ; break;
935 case VMSVGA3D_SURFACE_MAP_WRITE: d3d11MapType = D3D11_MAP_WRITE; break;
936 case VMSVGA3D_SURFACE_MAP_READ_WRITE: d3d11MapType = D3D11_MAP_READ_WRITE; break;
937 case VMSVGA3D_SURFACE_MAP_WRITE_DISCARD: d3d11MapType = D3D11_MAP_WRITE_DISCARD; break;
938 default:
939 AssertFailed();
940 return VERR_INVALID_PARAMETER;
941 }
942
943 D3D11_MAPPED_SUBRESOURCE mappedResource;
944 RT_ZERO(mappedResource);
945
946 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
947 {
948 ID3D11Texture2D *pMappedTexture;
949 if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
950 {
951 pMappedTexture = pBackendSurface->u.ScreenTarget.pStagingTexture;
952
953 /* Copy the texture content to the staging texture. */
954 pBackend->pImmediateContext->CopyResource(pBackendSurface->u.ScreenTarget.pStagingTexture, pBackendSurface->u.ScreenTarget.pTexture);
955 }
956 else
957 pMappedTexture = pBackendSurface->u.ScreenTarget.pDynamicTexture;
958
959 UINT const Subresource = 0; /* Screen target surfaces have only one subresource. */
960 HRESULT hr = pBackend->pImmediateContext->Map(pMappedTexture, Subresource,
961 d3d11MapType, /* MapFlags = */ 0, &mappedResource);
962 if (SUCCEEDED(hr))
963 {
964 pMap->enmMapType = enmMapType;
965 pMap->box = clipBox;
966 pMap->cbPixel = pSurface->cbBlock;
967 pMap->cbRowPitch = mappedResource.RowPitch;
968 pMap->cbDepthPitch = mappedResource.DepthPitch;
969 pMap->pvData = (uint8_t *)mappedResource.pData
970 + pMap->box.x * pMap->cbPixel
971 + pMap->box.y * pMap->cbRowPitch
972 + pMap->box.z * pMap->cbDepthPitch;
973 }
974 else
975 rc = VERR_NOT_SUPPORTED;
976 }
977 else
978 {
979 // UINT D3D11CalcSubresource(UINT MipSlice, UINT ArraySlice, UINT MipLevels);
980 /** @todo Implement. */
981 AssertFailed();
982 rc = VERR_NOT_IMPLEMENTED;
983 }
984
985 return rc;
986}
987
988
989static DECLCALLBACK(int) vmsvga3dSurfaceUnmap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImage, VMSVGA3D_MAPPED_SURFACE *pMap, bool fWritten)
990{
991 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
992 AssertReturn(pState, VERR_INVALID_STATE);
993
994 PVMSVGA3DBACKEND pBackend = pState->pBackend;
995 AssertReturn(pBackend, VERR_INVALID_STATE);
996 AssertReturn(pBackend->pImmediateContext, VERR_INVALID_STATE);
997
998 PVMSVGA3DSURFACE pSurface;
999 int rc = vmsvga3dSurfaceFromSid(pState, pImage->sid, &pSurface);
1000 AssertRCReturn(rc, rc);
1001
1002 /* The called should not use the function for system memory surfaces. */
1003 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
1004 AssertReturn(pBackendSurface, VERR_INVALID_PARAMETER);
1005
1006 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
1007 {
1008 ID3D11Texture2D *pMappedTexture;
1009 if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ)
1010 pMappedTexture = pBackendSurface->u.ScreenTarget.pStagingTexture;
1011 else
1012 pMappedTexture = pBackendSurface->u.ScreenTarget.pDynamicTexture;
1013
1014 UINT const Subresource = 0; /* Screen target surfaces have only one subresource. */
1015 pBackend->pImmediateContext->Unmap(pMappedTexture, Subresource);
1016
1017 if ( fWritten
1018 && ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
1019 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
1020 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
1021 {
1022 ID3D11Resource *pDstResource = pBackendSurface->u.ScreenTarget.pTexture;
1023 UINT DstSubresource = Subresource;
1024 UINT DstX = pMap->box.x;
1025 UINT DstY = pMap->box.y;
1026 UINT DstZ = pMap->box.z;
1027 ID3D11Resource *pSrcResource = pBackendSurface->u.ScreenTarget.pDynamicTexture;
1028 UINT SrcSubresource = Subresource;
1029 D3D11_BOX SrcBox;
1030 SrcBox.left = pMap->box.x;
1031 SrcBox.top = pMap->box.y;
1032 SrcBox.front = pMap->box.z;
1033 SrcBox.right = pMap->box.x + pMap->box.w;
1034 SrcBox.bottom = pMap->box.y + pMap->box.h;
1035 SrcBox.back = pMap->box.z + pMap->box.d;
1036 pBackend->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
1037 pSrcResource, SrcSubresource, &SrcBox);
1038 }
1039 }
1040 else
1041 {
1042 AssertFailed();
1043 rc = VERR_NOT_IMPLEMENTED;
1044 }
1045
1046 return rc;
1047}
1048
1049
1050int vmsvga3dBackSurfaceCreateScreenTarget(PVMSVGA3DSTATE pState, PVMSVGA3DSURFACE pSurface)
1051{
1052 PVMSVGA3DBACKEND pBackend = pState->pBackend;
1053 AssertReturn(pBackend, VERR_INVALID_STATE);
1054 AssertReturn(pBackend->pDevice, VERR_INVALID_STATE);
1055
1056 /* Surface must have SCREEN_TARGET flag. */
1057 ASSERT_GUEST_RETURN(RT_BOOL(pSurface->surfaceFlags & SVGA3D_SURFACE_SCREENTARGET), VERR_INVALID_PARAMETER);
1058
1059 if (VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
1060 {
1061 AssertFailed(); /* Should the function not be used like that? */
1062 vmsvga3dBackSurfaceDestroy(pState, pSurface);
1063 }
1064
1065 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
1066 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
1067
1068 D3D11_TEXTURE2D_DESC td;
1069 RT_ZERO(td);
1070 td.Width = pSurface->paMipmapLevels[0].mipmapSize.width;
1071 td.Height = pSurface->paMipmapLevels[0].mipmapSize.height;
1072 Assert(pSurface->cLevels == 1);
1073 td.MipLevels = 1;
1074 td.ArraySize = 1;
1075 td.Format = vmsvgaDXScreenTargetFormat2Dxgi(pSurface->format); // DXGI_FORMAT_B8G8R8A8_UNORM;
1076 td.SampleDesc.Count = 1;
1077 td.SampleDesc.Quality = 0;
1078 td.Usage = D3D11_USAGE_DEFAULT;
1079 td.BindFlags = D3D11_BIND_RENDER_TARGET | D3D11_BIND_SHADER_RESOURCE;
1080 td.CPUAccessFlags = 0;
1081 td.MiscFlags = 0;
1082
1083 HRESULT hr = pBackend->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.ScreenTarget.pTexture);
1084
1085 if (SUCCEEDED(hr))
1086 {
1087 /* Map-able texture. */
1088 td.Usage = D3D11_USAGE_DYNAMIC;
1089 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
1090 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1091 td.MiscFlags = 0;
1092 hr = pBackend->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.ScreenTarget.pDynamicTexture);
1093 }
1094
1095 if (SUCCEEDED(hr))
1096 {
1097 /* Staging texture. */
1098 td.Usage = D3D11_USAGE_STAGING;
1099 td.BindFlags = 0; /* No flags allowed. */
1100 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ;
1101 td.MiscFlags = 0;
1102 hr = pBackend->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.ScreenTarget.pStagingTexture);
1103 }
1104
1105 if (SUCCEEDED(hr))
1106 {
1107 /*
1108 * Success.
1109 */
1110 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_SCREEN_TARGET;
1111 pSurface->pBackendSurface = pBackendSurface;
1112 return VINF_SUCCESS;
1113 }
1114
1115 /* Failure. */
1116 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pStagingTexture);
1117 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pDynamicTexture);
1118 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pTexture);
1119 RTMemFree(pBackendSurface);
1120 return VERR_NO_MEMORY;
1121}
1122
1123
1124static DECLCALLBACK(int) vmsvga3dScreenTargetBind(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, uint32_t sid)
1125{
1126 int rc = VINF_SUCCESS;
1127
1128 PVMSVGA3DSURFACE pSurface;
1129 if (sid != SVGA_ID_INVALID)
1130 {
1131 /* Create the surface if does not yet exist. */
1132 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1133 AssertReturn(pState, VERR_INVALID_STATE);
1134
1135 rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
1136 AssertRCReturn(rc, rc);
1137
1138 if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
1139 {
1140 /* Create the actual texture. */
1141 rc = vmsvga3dBackSurfaceCreateScreenTarget(pState, pSurface);
1142 AssertRCReturn(rc, rc);
1143 }
1144 }
1145 else
1146 pSurface = NULL;
1147
1148 /* Notify the HW accelerated screen if it is used. */
1149 VMSVGAHWSCREEN *pHwScreen = pScreen->pHwScreen;
1150 if (!pHwScreen)
1151 return VINF_SUCCESS;
1152
1153 /* Same surface -> do nothing. */
1154 if (pHwScreen->sidScreenTarget == sid)
1155 return VINF_SUCCESS;
1156
1157 if (sid != SVGA_ID_INVALID)
1158 {
1159 AssertReturn( pSurface->pBackendSurface
1160 && pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET, VERR_INVALID_PARAMETER);
1161
1162 HANDLE const hSharedSurface = pHwScreen->SharedHandle;
1163 rc = vmsvga3dDrvNotifyBindSurface(pThisCC, pScreen, hSharedSurface);
1164 }
1165
1166 if (RT_SUCCESS(rc))
1167 {
1168 pHwScreen->sidScreenTarget = sid;
1169 }
1170
1171 return rc;
1172}
1173
1174
1175static DECLCALLBACK(int) vmsvga3dScreenTargetUpdate(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, SVGA3dRect const *pRect)
1176{
1177 VMSVGAHWSCREEN *pHwScreen = pScreen->pHwScreen;
1178 AssertReturn(pHwScreen, VERR_NOT_SUPPORTED);
1179
1180 if (pHwScreen->sidScreenTarget == SVGA_ID_INVALID)
1181 return VINF_SUCCESS; /* No surface bound. */
1182
1183 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1184 AssertReturn(pState, VERR_INVALID_STATE);
1185
1186 PVMSVGA3DBACKEND pBackend = pState->pBackend;
1187 AssertReturn(pBackend, VERR_INVALID_STATE);
1188
1189 PVMSVGA3DSURFACE pSurface;
1190 int rc = vmsvga3dSurfaceFromSid(pState, pHwScreen->sidScreenTarget, &pSurface);
1191 AssertRCReturn(rc, rc);
1192
1193 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
1194 AssertReturn(pBackendSurface, VERR_INVALID_PARAMETER);
1195
1196 SVGA3dRect boundRect;
1197 boundRect.x = 0;
1198 boundRect.y = 0;
1199 boundRect.w = pSurface->paMipmapLevels[0].mipmapSize.width;
1200 boundRect.h = pSurface->paMipmapLevels[0].mipmapSize.height;
1201 SVGA3dRect clipRect = *pRect;
1202 vmsvgaR3Clip3dRect(&boundRect, &clipRect);
1203 ASSERT_GUEST_RETURN(clipRect.w && clipRect.h, VERR_INVALID_PARAMETER);
1204
1205 /* Copy the screen texture to the shared surface. */
1206 DWORD result = pHwScreen->pDXGIKeyedMutex->AcquireSync(0, 10000);
1207 if (result == WAIT_OBJECT_0)
1208 {
1209 ID3D11Query *pQuery = 0;
1210 D3D11_QUERY_DESC qd;
1211 RT_ZERO(qd);
1212 qd.Query = D3D11_QUERY_EVENT;
1213 HRESULT hr2 = pBackend->pDevice->CreateQuery(&qd, &pQuery);
1214 Assert(hr2 == S_OK); RT_NOREF(hr2);
1215
1216 pBackend->pImmediateContext->CopyResource(pHwScreen->pTexture, pBackendSurface->u.ScreenTarget.pTexture);
1217
1218 pBackend->pImmediateContext->Flush();
1219
1220 pBackend->pImmediateContext->End(pQuery);
1221
1222 BOOL queryData;
1223 while (pBackend->pImmediateContext->GetData(pQuery, &queryData, sizeof(queryData), 0) != S_OK)
1224 {
1225 RTThreadYield();
1226 }
1227 D3D_RELEASE(pQuery);
1228
1229 result = pHwScreen->pDXGIKeyedMutex->ReleaseSync(1);
1230 }
1231 else
1232 AssertFailed();
1233
1234 rc = vmsvga3dDrvNotifyUpdate(pThisCC, pScreen, pRect->x, pRect->y, pRect->w, pRect->h);
1235 return rc;
1236}
1237
1238
1239void vmsvga3dUpdateHostScreenViewport(PVGASTATECC pThisCC, uint32_t idScreen, VMSVGAVIEWPORT const *pOldViewport)
1240{
1241 RT_NOREF(pThisCC, idScreen, pOldViewport);
1242 /** @todo Scroll the screen content without requiring the guest to redraw. */
1243}
1244
1245
1246int vmsvga3dQueryCaps(PVGASTATECC pThisCC, SVGA3dDevCapIndex idx3dCaps, uint32_t *pu32Val)
1247{
1248 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1249 AssertReturn(pState, VERR_INVALID_STATE);
1250
1251 int rc = VINF_SUCCESS;
1252
1253 *pu32Val = 0;
1254
1255 /* Most values are taken from:
1256 * https://docs.microsoft.com/en-us/windows/win32/direct3d11/overviews-direct3d-11-devices-downlevel-intro
1257 *
1258 * Shader values are from
1259 * https://docs.microsoft.com/en-us/windows/win32/direct3dhlsl/dx-graphics-hlsl-models
1260 */
1261
1262 switch (idx3dCaps)
1263 {
1264 case SVGA3D_DEVCAP_3D:
1265 *pu32Val = 1;
1266 break;
1267
1268 case SVGA3D_DEVCAP_MAX_LIGHTS:
1269 *pu32Val = SVGA3D_NUM_LIGHTS; /* VGPU9. Not applicable to DX11. */
1270 break;
1271
1272 case SVGA3D_DEVCAP_MAX_TEXTURES:
1273 *pu32Val = SVGA3D_NUM_TEXTURE_UNITS; /* VGPU9. Not applicable to DX11. */
1274 break;
1275
1276 case SVGA3D_DEVCAP_MAX_CLIP_PLANES:
1277 *pu32Val = SVGA3D_NUM_CLIPPLANES;
1278 break;
1279
1280 case SVGA3D_DEVCAP_VERTEX_SHADER_VERSION:
1281 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
1282 *pu32Val = SVGA3DVSVERSION_40;
1283 else
1284 *pu32Val = SVGA3DVSVERSION_30;
1285 break;
1286
1287 case SVGA3D_DEVCAP_VERTEX_SHADER:
1288 *pu32Val = 1;
1289 break;
1290
1291 case SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION:
1292 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
1293 *pu32Val = SVGA3DPSVERSION_40;
1294 else
1295 *pu32Val = SVGA3DPSVERSION_30;
1296 break;
1297
1298 case SVGA3D_DEVCAP_FRAGMENT_SHADER:
1299 *pu32Val = 1;
1300 break;
1301
1302 case SVGA3D_DEVCAP_MAX_RENDER_TARGETS:
1303 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
1304 *pu32Val = 8;
1305 else
1306 *pu32Val = 4;
1307 break;
1308
1309 case SVGA3D_DEVCAP_S23E8_TEXTURES:
1310 case SVGA3D_DEVCAP_S10E5_TEXTURES:
1311 /* Must be obsolete by now; surface format caps specify the same thing. */
1312 break;
1313
1314 case SVGA3D_DEVCAP_MAX_FIXED_VERTEXBLEND:
1315 /* Obsolete */
1316 break;
1317
1318 /*
1319 * 2. The BUFFER_FORMAT capabilities are deprecated, and they always
1320 * return TRUE. Even on physical hardware that does not support
1321 * these formats natively, the SVGA3D device will provide an emulation
1322 * which should be invisible to the guest OS.
1323 */
1324 case SVGA3D_DEVCAP_D16_BUFFER_FORMAT:
1325 case SVGA3D_DEVCAP_D24S8_BUFFER_FORMAT:
1326 case SVGA3D_DEVCAP_D24X8_BUFFER_FORMAT:
1327 *pu32Val = 1;
1328 break;
1329
1330 case SVGA3D_DEVCAP_QUERY_TYPES:
1331 /* Obsolete */
1332 break;
1333
1334 case SVGA3D_DEVCAP_TEXTURE_GRADIENT_SAMPLING:
1335 /* Obsolete */
1336 break;
1337
1338 case SVGA3D_DEVCAP_MAX_POINT_SIZE:
1339 AssertCompile(sizeof(uint32_t) == sizeof(float));
1340 *(float *)pu32Val = 256.0f; /* VGPU9. Not applicable to DX11. */
1341 break;
1342
1343 case SVGA3D_DEVCAP_MAX_SHADER_TEXTURES:
1344 /* Obsolete */
1345 break;
1346
1347 case SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH:
1348 case SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT:
1349 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_11_0)
1350 *pu32Val = 16384;
1351 else if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
1352 *pu32Val = 8192;
1353 else if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
1354 *pu32Val = 4096;
1355 else
1356 *pu32Val = 2048;
1357 break;
1358
1359 case SVGA3D_DEVCAP_MAX_VOLUME_EXTENT:
1360 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
1361 *pu32Val = 2048;
1362 else
1363 *pu32Val = 256;
1364 break;
1365
1366 case SVGA3D_DEVCAP_MAX_TEXTURE_REPEAT:
1367 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_11_0)
1368 *pu32Val = 16384;
1369 else if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
1370 *pu32Val = 8192;
1371 else if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
1372 *pu32Val = 2048;
1373 else
1374 *pu32Val = 128;
1375 break;
1376
1377 case SVGA3D_DEVCAP_MAX_TEXTURE_ASPECT_RATIO:
1378 /* Obsolete */
1379 break;
1380
1381 case SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY:
1382 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
1383 *pu32Val = D3D11_REQ_MAXANISOTROPY;
1384 else
1385 *pu32Val = 2; // D3D_FL9_1_DEFAULT_MAX_ANISOTROPY;
1386 break;
1387
1388 case SVGA3D_DEVCAP_MAX_PRIMITIVE_COUNT:
1389 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
1390 *pu32Val = UINT32_MAX;
1391 else if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
1392 *pu32Val = 1048575; // D3D_FL9_2_IA_PRIMITIVE_MAX_COUNT;
1393 else
1394 *pu32Val = 65535; // D3D_FL9_1_IA_PRIMITIVE_MAX_COUNT;
1395 break;
1396
1397 case SVGA3D_DEVCAP_MAX_VERTEX_INDEX:
1398 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
1399 *pu32Val = UINT32_MAX;
1400 else if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
1401 *pu32Val = 1048575;
1402 else
1403 *pu32Val = 65534;
1404 break;
1405
1406 case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS:
1407 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
1408 *pu32Val = UINT32_MAX;
1409 else
1410 *pu32Val = 512;
1411 break;
1412
1413 case SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_INSTRUCTIONS:
1414 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
1415 *pu32Val = UINT32_MAX;
1416 else
1417 *pu32Val = 512;
1418 break;
1419
1420 case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS:
1421 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
1422 *pu32Val = 4096;
1423 else
1424 *pu32Val = 32;
1425 break;
1426
1427 case SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS:
1428 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
1429 *pu32Val = 4096;
1430 else
1431 *pu32Val = 32;
1432 break;
1433
1434 case SVGA3D_DEVCAP_TEXTURE_OPS:
1435 /* Obsolete */
1436 break;
1437
1438 case SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8:
1439 case SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8:
1440 case SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10:
1441 case SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5:
1442 case SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5:
1443 case SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4:
1444 case SVGA3D_DEVCAP_SURFACEFMT_R5G6B5:
1445 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16:
1446 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8:
1447 case SVGA3D_DEVCAP_SURFACEFMT_ALPHA8:
1448 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8:
1449 case SVGA3D_DEVCAP_SURFACEFMT_Z_D16:
1450 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8:
1451 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8:
1452 case SVGA3D_DEVCAP_SURFACEFMT_DXT1:
1453 case SVGA3D_DEVCAP_SURFACEFMT_DXT2:
1454 case SVGA3D_DEVCAP_SURFACEFMT_DXT3:
1455 case SVGA3D_DEVCAP_SURFACEFMT_DXT4:
1456 case SVGA3D_DEVCAP_SURFACEFMT_DXT5:
1457 case SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8:
1458 case SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10:
1459 case SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8:
1460 case SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8:
1461 case SVGA3D_DEVCAP_SURFACEFMT_CxV8U8:
1462 case SVGA3D_DEVCAP_SURFACEFMT_R_S10E5:
1463 case SVGA3D_DEVCAP_SURFACEFMT_R_S23E8:
1464 case SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5:
1465 case SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8:
1466 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5:
1467 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8:
1468 case SVGA3D_DEVCAP_SURFACEFMT_V16U16:
1469 case SVGA3D_DEVCAP_SURFACEFMT_G16R16:
1470 case SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16:
1471 case SVGA3D_DEVCAP_SURFACEFMT_UYVY:
1472 case SVGA3D_DEVCAP_SURFACEFMT_YUY2:
1473 case SVGA3D_DEVCAP_SURFACEFMT_NV12:
1474 case SVGA3D_DEVCAP_SURFACEFMT_AYUV:
1475 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF16:
1476 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF24:
1477 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT:
1478 case SVGA3D_DEVCAP_SURFACEFMT_ATI1:
1479 case SVGA3D_DEVCAP_SURFACEFMT_ATI2:
1480 case SVGA3D_DEVCAP_SURFACEFMT_YV12:
1481 {
1482 SVGA3dSurfaceFormat const enmFormat = vmsvgaDXDevCapSurfaceFmt2Format(idx3dCaps);
1483 rc = vmsvgaDXCheckFormatSupportPreDX(pState, enmFormat, pu32Val);
1484 break;
1485 }
1486
1487 case SVGA3D_DEVCAP_MISSING62:
1488 /* Unused */
1489 break;
1490
1491 case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEXTURES:
1492 /* Obsolete */
1493 break;
1494
1495 case SVGA3D_DEVCAP_MAX_SIMULTANEOUS_RENDER_TARGETS:
1496 if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
1497 *pu32Val = 8;
1498 else if (pState->pBackend->FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
1499 *pu32Val = 4; // D3D_FL9_3_SIMULTANEOUS_RENDER_TARGET_COUNT
1500 else
1501 *pu32Val = 1; // D3D_FL9_1_SIMULTANEOUS_RENDER_TARGET_COUNT
1502 break;
1503
1504 case SVGA3D_DEVCAP_MULTISAMPLE_NONMASKABLESAMPLES:
1505 case SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES:
1506 *pu32Val = (1 << (2-1)) | (1 << (4-1)) | (1 << (8-1)); /* 2x, 4x, 8x */
1507 break;
1508
1509 case SVGA3D_DEVCAP_ALPHATOCOVERAGE:
1510 /* Obsolete? */
1511 break;
1512
1513 case SVGA3D_DEVCAP_SUPERSAMPLE:
1514 /* Obsolete? */
1515 break;
1516
1517 case SVGA3D_DEVCAP_AUTOGENMIPMAPS:
1518 *pu32Val = 1;
1519 break;
1520
1521 case SVGA3D_DEVCAP_MAX_CONTEXT_IDS:
1522 *pu32Val = SVGA3D_MAX_CONTEXT_IDS;
1523 break;
1524
1525 case SVGA3D_DEVCAP_MAX_SURFACE_IDS:
1526 *pu32Val = SVGA3D_MAX_SURFACE_IDS;
1527 break;
1528
1529 case SVGA3D_DEVCAP_DEAD1:
1530 /* Obsolete */
1531 break;
1532
1533 case SVGA3D_DEVCAP_VIDEO_DECODE:
1534 /* Obsolete */
1535 break;
1536
1537 case SVGA3D_DEVCAP_VIDEO_PROCESS:
1538 /* Obsolete */
1539 break;
1540
1541 case SVGA3D_DEVCAP_LINE_AA:
1542 *pu32Val = 1;
1543 break;
1544
1545 case SVGA3D_DEVCAP_LINE_STIPPLE:
1546 *pu32Val = 0; /* DX11 does not seem to support this directly. */
1547 break;
1548
1549 case SVGA3D_DEVCAP_MAX_LINE_WIDTH:
1550 AssertCompile(sizeof(uint32_t) == sizeof(float));
1551 *(float *)pu32Val = 1.0f;
1552 break;
1553
1554 case SVGA3D_DEVCAP_MAX_AA_LINE_WIDTH:
1555 AssertCompile(sizeof(uint32_t) == sizeof(float));
1556 *(float *)pu32Val = 1.0f;
1557 break;
1558
1559 case SVGA3D_DEVCAP_LOGICOPS:
1560 /* Deprecated. */
1561 AssertCompile(SVGA3D_DEVCAP_LOGICOPS == 92); /* Newer SVGA headers redefine this. */
1562 *pu32Val = 0; /* Supported starting with Direct3D 11.1 */
1563 break;
1564
1565 case SVGA3D_DEVCAP_TS_COLOR_KEY:
1566 *pu32Val = 0; /* DX11 does not seem to support this directly. */
1567 break;
1568
1569 case SVGA3D_DEVCAP_DEAD2:
1570 break;
1571
1572 case SVGA3D_DEVCAP_DX:
1573 *pu32Val = 1;
1574 break;
1575
1576 case SVGA3D_DEVCAP_MAX_TEXTURE_ARRAY_SIZE:
1577 *pu32Val = D3D11_REQ_TEXTURE2D_ARRAY_AXIS_DIMENSION;
1578 break;
1579
1580 case SVGA3D_DEVCAP_DX_MAX_VERTEXBUFFERS:
1581 *pu32Val = D3D11_IA_VERTEX_INPUT_RESOURCE_SLOT_COUNT;
1582 break;
1583
1584 case SVGA3D_DEVCAP_DX_MAX_CONSTANT_BUFFERS:
1585 *pu32Val = D3D11_COMMONSHADER_CONSTANT_BUFFER_HW_SLOT_COUNT;
1586 break;
1587
1588 case SVGA3D_DEVCAP_DX_PROVOKING_VERTEX:
1589 *pu32Val = 0; /* boolean */
1590 break;
1591
1592 case SVGA3D_DEVCAP_DXFMT_X8R8G8B8:
1593 case SVGA3D_DEVCAP_DXFMT_A8R8G8B8:
1594 case SVGA3D_DEVCAP_DXFMT_R5G6B5:
1595 case SVGA3D_DEVCAP_DXFMT_X1R5G5B5:
1596 case SVGA3D_DEVCAP_DXFMT_A1R5G5B5:
1597 case SVGA3D_DEVCAP_DXFMT_A4R4G4B4:
1598 case SVGA3D_DEVCAP_DXFMT_Z_D32:
1599 case SVGA3D_DEVCAP_DXFMT_Z_D16:
1600 case SVGA3D_DEVCAP_DXFMT_Z_D24S8:
1601 case SVGA3D_DEVCAP_DXFMT_Z_D15S1:
1602 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8:
1603 case SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4:
1604 case SVGA3D_DEVCAP_DXFMT_LUMINANCE16:
1605 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8:
1606 case SVGA3D_DEVCAP_DXFMT_DXT1:
1607 case SVGA3D_DEVCAP_DXFMT_DXT2:
1608 case SVGA3D_DEVCAP_DXFMT_DXT3:
1609 case SVGA3D_DEVCAP_DXFMT_DXT4:
1610 case SVGA3D_DEVCAP_DXFMT_DXT5:
1611 case SVGA3D_DEVCAP_DXFMT_BUMPU8V8:
1612 case SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5:
1613 case SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8:
1614 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1:
1615 case SVGA3D_DEVCAP_DXFMT_ARGB_S10E5:
1616 case SVGA3D_DEVCAP_DXFMT_ARGB_S23E8:
1617 case SVGA3D_DEVCAP_DXFMT_A2R10G10B10:
1618 case SVGA3D_DEVCAP_DXFMT_V8U8:
1619 case SVGA3D_DEVCAP_DXFMT_Q8W8V8U8:
1620 case SVGA3D_DEVCAP_DXFMT_CxV8U8:
1621 case SVGA3D_DEVCAP_DXFMT_X8L8V8U8:
1622 case SVGA3D_DEVCAP_DXFMT_A2W10V10U10:
1623 case SVGA3D_DEVCAP_DXFMT_ALPHA8:
1624 case SVGA3D_DEVCAP_DXFMT_R_S10E5:
1625 case SVGA3D_DEVCAP_DXFMT_R_S23E8:
1626 case SVGA3D_DEVCAP_DXFMT_RG_S10E5:
1627 case SVGA3D_DEVCAP_DXFMT_RG_S23E8:
1628 case SVGA3D_DEVCAP_DXFMT_BUFFER:
1629 case SVGA3D_DEVCAP_DXFMT_Z_D24X8:
1630 case SVGA3D_DEVCAP_DXFMT_V16U16:
1631 case SVGA3D_DEVCAP_DXFMT_G16R16:
1632 case SVGA3D_DEVCAP_DXFMT_A16B16G16R16:
1633 case SVGA3D_DEVCAP_DXFMT_UYVY:
1634 case SVGA3D_DEVCAP_DXFMT_YUY2:
1635 case SVGA3D_DEVCAP_DXFMT_NV12:
1636 case SVGA3D_DEVCAP_DXFMT_AYUV:
1637 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS:
1638 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT:
1639 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT:
1640 case SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS:
1641 case SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT:
1642 case SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT:
1643 case SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT:
1644 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS:
1645 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT:
1646 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM:
1647 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT:
1648 case SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS:
1649 case SVGA3D_DEVCAP_DXFMT_R32G32_UINT:
1650 case SVGA3D_DEVCAP_DXFMT_R32G32_SINT:
1651 case SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS:
1652 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT:
1653 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24_TYPELESS:
1654 case SVGA3D_DEVCAP_DXFMT_X32_TYPELESS_G8X24_UINT:
1655 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS:
1656 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT:
1657 case SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT:
1658 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS:
1659 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM:
1660 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB:
1661 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT:
1662 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT:
1663 case SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS:
1664 case SVGA3D_DEVCAP_DXFMT_R16G16_UINT:
1665 case SVGA3D_DEVCAP_DXFMT_R16G16_SINT:
1666 case SVGA3D_DEVCAP_DXFMT_R32_TYPELESS:
1667 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT:
1668 case SVGA3D_DEVCAP_DXFMT_R32_UINT:
1669 case SVGA3D_DEVCAP_DXFMT_R32_SINT:
1670 case SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS:
1671 case SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT:
1672 case SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8_TYPELESS:
1673 case SVGA3D_DEVCAP_DXFMT_X24_TYPELESS_G8_UINT:
1674 case SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS:
1675 case SVGA3D_DEVCAP_DXFMT_R8G8_UNORM:
1676 case SVGA3D_DEVCAP_DXFMT_R8G8_UINT:
1677 case SVGA3D_DEVCAP_DXFMT_R8G8_SINT:
1678 case SVGA3D_DEVCAP_DXFMT_R16_TYPELESS:
1679 case SVGA3D_DEVCAP_DXFMT_R16_UNORM:
1680 case SVGA3D_DEVCAP_DXFMT_R16_UINT:
1681 case SVGA3D_DEVCAP_DXFMT_R16_SNORM:
1682 case SVGA3D_DEVCAP_DXFMT_R16_SINT:
1683 case SVGA3D_DEVCAP_DXFMT_R8_TYPELESS:
1684 case SVGA3D_DEVCAP_DXFMT_R8_UNORM:
1685 case SVGA3D_DEVCAP_DXFMT_R8_UINT:
1686 case SVGA3D_DEVCAP_DXFMT_R8_SNORM:
1687 case SVGA3D_DEVCAP_DXFMT_R8_SINT:
1688 case SVGA3D_DEVCAP_DXFMT_P8:
1689 case SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP:
1690 case SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM:
1691 case SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM:
1692 case SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS:
1693 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB:
1694 case SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS:
1695 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB:
1696 case SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS:
1697 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB:
1698 case SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS:
1699 case SVGA3D_DEVCAP_DXFMT_ATI1:
1700 case SVGA3D_DEVCAP_DXFMT_BC4_SNORM:
1701 case SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS:
1702 case SVGA3D_DEVCAP_DXFMT_ATI2:
1703 case SVGA3D_DEVCAP_DXFMT_BC5_SNORM:
1704 case SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM:
1705 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS:
1706 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB:
1707 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS:
1708 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB:
1709 case SVGA3D_DEVCAP_DXFMT_Z_DF16:
1710 case SVGA3D_DEVCAP_DXFMT_Z_DF24:
1711 case SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT:
1712 case SVGA3D_DEVCAP_DXFMT_YV12:
1713 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT:
1714 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT:
1715 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM:
1716 case SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT:
1717 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM:
1718 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM:
1719 case SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT:
1720 case SVGA3D_DEVCAP_DXFMT_R16G16_UNORM:
1721 case SVGA3D_DEVCAP_DXFMT_R16G16_SNORM:
1722 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT:
1723 case SVGA3D_DEVCAP_DXFMT_R8G8_SNORM:
1724 case SVGA3D_DEVCAP_DXFMT_R16_FLOAT:
1725 case SVGA3D_DEVCAP_DXFMT_D16_UNORM:
1726 case SVGA3D_DEVCAP_DXFMT_A8_UNORM:
1727 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM:
1728 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM:
1729 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM:
1730 case SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM:
1731 case SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM:
1732 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM:
1733 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM:
1734 case SVGA3D_DEVCAP_DXFMT_BC4_UNORM:
1735 case SVGA3D_DEVCAP_DXFMT_BC5_UNORM:
1736 {
1737 SVGA3dSurfaceFormat const enmFormat = vmsvgaDXDevCapDxfmt2Format(idx3dCaps);
1738 rc = vmsvgaDXCheckFormatSupport(pState, enmFormat, pu32Val);
1739 break;
1740 }
1741
1742 case SVGA3D_DEVCAP_MAX:
1743 case SVGA3D_DEVCAP_INVALID:
1744 rc = VERR_NOT_SUPPORTED;
1745 break;
1746 }
1747
1748 return rc;
1749}
1750
1751
1752/* Handle resize */
1753int vmsvga3dChangeMode(PVGASTATECC pThisCC)
1754{
1755 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1756 AssertReturn(pState, VERR_INVALID_STATE);
1757
1758 return VINF_SUCCESS;
1759}
1760
1761
1762int vmsvga3dSurfaceCopy(PVGASTATECC pThisCC, SVGA3dSurfaceImageId dest, SVGA3dSurfaceImageId src,
1763 uint32_t cCopyBoxes, SVGA3dCopyBox *pBox)
1764{
1765 RT_NOREF(dest, src, cCopyBoxes, pBox);
1766
1767 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1768 AssertReturn(pState, VERR_INVALID_STATE);
1769
1770 AssertFailed();
1771 return VERR_NOT_IMPLEMENTED;
1772}
1773
1774
1775/**
1776 * Create a new 3d context
1777 *
1778 * @returns VBox status code.
1779 * @param pThisCC The VGA/VMSVGA state for ring-3.
1780 * @param cid Context id
1781 */
1782int vmsvga3dContextDefine(PVGASTATECC pThisCC, uint32_t cid)
1783{
1784 RT_NOREF(cid);
1785
1786 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1787 AssertReturn(pState, VERR_INVALID_STATE);
1788
1789 AssertFailed();
1790 return VERR_NOT_IMPLEMENTED;
1791}
1792
1793
1794/**
1795 * Destroy an existing 3d context
1796 *
1797 * @returns VBox status code.
1798 * @param pThisCC The VGA/VMSVGA state for ring-3.
1799 * @param cid Context id
1800 */
1801int vmsvga3dContextDestroy(PVGASTATECC pThisCC, uint32_t cid)
1802{
1803 RT_NOREF(cid);
1804
1805 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1806 AssertReturn(pState, VERR_INVALID_STATE);
1807
1808 AssertFailed();
1809 return VINF_SUCCESS;
1810}
1811
1812
1813int vmsvga3dSetTransform(PVGASTATECC pThisCC, uint32_t cid, SVGA3dTransformType type, float matrix[16])
1814{
1815 RT_NOREF(cid, type, matrix);
1816
1817 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1818 AssertReturn(pState, VERR_INVALID_STATE);
1819
1820 AssertFailed();
1821 return VINF_SUCCESS;
1822}
1823
1824
1825int vmsvga3dSetZRange(PVGASTATECC pThisCC, uint32_t cid, SVGA3dZRange zRange)
1826{
1827 RT_NOREF(cid, zRange);
1828
1829 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1830 AssertReturn(pState, VERR_INVALID_STATE);
1831
1832 AssertFailed();
1833 return VINF_SUCCESS;
1834}
1835
1836
1837int vmsvga3dSetRenderState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cRenderStates, SVGA3dRenderState *pRenderState)
1838{
1839 RT_NOREF(cid, cRenderStates, pRenderState);
1840
1841 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1842 AssertReturn(pState, VERR_INVALID_STATE);
1843
1844 AssertFailed();
1845 return VINF_SUCCESS;
1846}
1847
1848
1849int vmsvga3dSetRenderTarget(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRenderTargetType type, SVGA3dSurfaceImageId target)
1850{
1851 RT_NOREF(cid, type, target);
1852
1853 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1854 AssertReturn(pState, VERR_INVALID_STATE);
1855
1856 AssertFailed();
1857 return VINF_SUCCESS;
1858}
1859
1860
1861int vmsvga3dSetTextureState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cTextureStates, SVGA3dTextureState *pTextureState)
1862{
1863 RT_NOREF(cid, cTextureStates, pTextureState);
1864
1865 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1866 AssertReturn(pState, VERR_INVALID_STATE);
1867
1868 AssertFailed();
1869 return VINF_SUCCESS;
1870}
1871
1872
1873int vmsvga3dSetMaterial(PVGASTATECC pThisCC, uint32_t cid, SVGA3dFace face, SVGA3dMaterial *pMaterial)
1874{
1875 RT_NOREF(cid, face, pMaterial);
1876
1877 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1878 AssertReturn(pState, VERR_INVALID_STATE);
1879
1880 AssertFailed();
1881 return VINF_SUCCESS;
1882}
1883
1884
1885int vmsvga3dSetLightData(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, SVGA3dLightData *pData)
1886{
1887 RT_NOREF(cid, index, pData);
1888
1889 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1890 AssertReturn(pState, VERR_INVALID_STATE);
1891
1892 AssertFailed();
1893 return VINF_SUCCESS;
1894}
1895
1896
1897int vmsvga3dSetLightEnabled(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, uint32_t enabled)
1898{
1899 RT_NOREF(cid, index, enabled);
1900
1901 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1902 AssertReturn(pState, VERR_INVALID_STATE);
1903
1904 AssertFailed();
1905 return VINF_SUCCESS;
1906}
1907
1908
1909int vmsvga3dSetViewPort(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
1910{
1911 RT_NOREF(cid, pRect);
1912
1913 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1914 AssertReturn(pState, VERR_INVALID_STATE);
1915
1916 AssertFailed();
1917 return VINF_SUCCESS;
1918}
1919
1920
1921int vmsvga3dSetClipPlane(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, float plane[4])
1922{
1923 RT_NOREF(cid, index, plane);
1924
1925 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1926 AssertReturn(pState, VERR_INVALID_STATE);
1927
1928 AssertFailed();
1929 return VINF_SUCCESS;
1930}
1931
1932
1933int vmsvga3dCommandClear(PVGASTATECC pThisCC, uint32_t cid, SVGA3dClearFlag clearFlag, uint32_t color, float depth,
1934 uint32_t stencil, uint32_t cRects, SVGA3dRect *pRect)
1935{
1936 /* From SVGA3D_BeginClear comments:
1937 *
1938 * Clear is not affected by clipping, depth test, or other
1939 * render state which affects the fragment pipeline.
1940 *
1941 * Therefore this code must ignore the current scissor rect.
1942 */
1943
1944 RT_NOREF(cid, clearFlag, color, depth, stencil, cRects, pRect);
1945
1946 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1947 AssertReturn(pState, VERR_INVALID_STATE);
1948
1949 AssertFailed();
1950 return VINF_SUCCESS;
1951}
1952
1953
1954int vmsvga3dDrawPrimitives(PVGASTATECC pThisCC, uint32_t cid, uint32_t numVertexDecls, SVGA3dVertexDecl *pVertexDecl,
1955 uint32_t numRanges, SVGA3dPrimitiveRange *pRange,
1956 uint32_t cVertexDivisor, SVGA3dVertexDivisor *pVertexDivisor)
1957{
1958 RT_NOREF(cid, numVertexDecls, pVertexDecl, numRanges, pRange, cVertexDivisor, pVertexDivisor);
1959
1960 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1961 AssertReturn(pState, VERR_INVALID_STATE);
1962
1963 AssertFailed();
1964 return VINF_SUCCESS;
1965}
1966
1967
1968int vmsvga3dSetScissorRect(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
1969{
1970 RT_NOREF(cid, pRect);
1971
1972 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1973 AssertReturn(pState, VERR_INVALID_STATE);
1974
1975 AssertFailed();
1976 return VINF_SUCCESS;
1977}
1978
1979
1980int vmsvga3dGenerateMipmaps(PVGASTATECC pThisCC, uint32_t sid, SVGA3dTextureFilter filter)
1981{
1982 RT_NOREF(sid, filter);
1983
1984 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1985 AssertReturn(pState, VERR_INVALID_STATE);
1986
1987 AssertFailed();
1988 return VINF_SUCCESS;
1989}
1990
1991
1992int vmsvga3dShaderDefine(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type,
1993 uint32_t cbData, uint32_t *pShaderData)
1994{
1995 RT_NOREF(cid, shid, type, cbData, pShaderData);
1996
1997 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1998 AssertReturn(pState, VERR_INVALID_STATE);
1999
2000 AssertFailed();
2001 return VINF_SUCCESS;
2002}
2003
2004
2005int vmsvga3dShaderDestroy(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type)
2006{
2007 RT_NOREF(cid, shid, type);
2008
2009 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2010 AssertReturn(pState, VERR_INVALID_STATE);
2011
2012 AssertFailed();
2013 return VINF_SUCCESS;
2014}
2015
2016
2017int vmsvga3dShaderSet(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext, uint32_t cid, SVGA3dShaderType type, uint32_t shid)
2018{
2019 RT_NOREF(pContext, cid, type, shid);
2020
2021 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2022 AssertReturn(pState, VERR_INVALID_STATE);
2023
2024 AssertFailed();
2025 return VINF_SUCCESS;
2026}
2027
2028
2029int vmsvga3dShaderSetConst(PVGASTATECC pThisCC, uint32_t cid, uint32_t reg, SVGA3dShaderType type,
2030 SVGA3dShaderConstType ctype, uint32_t cRegisters, uint32_t *pValues)
2031{
2032 RT_NOREF(cid, reg, type, ctype, cRegisters, pValues);
2033
2034 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2035 AssertReturn(pState, VERR_INVALID_STATE);
2036
2037 AssertFailed();
2038 return VINF_SUCCESS;
2039}
2040
2041
2042/**
2043 * Destroy backend specific surface bits (part of SVGA_3D_CMD_SURFACE_DESTROY).
2044 *
2045 * @param pState The VMSVGA3d state.
2046 * @param pSurface The surface being destroyed.
2047 */
2048void vmsvga3dBackSurfaceDestroy(PVMSVGA3DSTATE pState, PVMSVGA3DSURFACE pSurface)
2049{
2050 PVMSVGA3DBACKEND pBackend = pState->pBackend;
2051 AssertReturnVoid(pBackend);
2052 AssertReturnVoid(pBackend->pImmediateContext);
2053
2054 /* The caller should not use the function for system memory surfaces. */
2055 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
2056 AssertReturnVoid(pBackendSurface);
2057 pSurface->pBackendSurface = NULL;
2058
2059 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
2060 {
2061 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pStagingTexture);
2062 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pDynamicTexture);
2063 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pTexture);
2064 }
2065 else
2066 {
2067 AssertFailed();
2068 }
2069
2070 RTMemFree(pBackendSurface);
2071}
2072
2073
2074/**
2075 * Backend worker for implementing SVGA_3D_CMD_SURFACE_STRETCHBLT.
2076 *
2077 * @returns VBox status code.
2078 * @param pThis The VGA device instance.
2079 * @param pState The VMSVGA3d state.
2080 * @param pDstSurface The destination host surface.
2081 * @param uDstFace The destination face (valid).
2082 * @param uDstMipmap The destination mipmap level (valid).
2083 * @param pDstBox The destination box.
2084 * @param pSrcSurface The source host surface.
2085 * @param uSrcFace The destination face (valid).
2086 * @param uSrcMipmap The source mimap level (valid).
2087 * @param pSrcBox The source box.
2088 * @param enmMode The strecht blt mode .
2089 * @param pContext The VMSVGA3d context (already current for OGL).
2090 */
2091int vmsvga3dBackSurfaceStretchBlt(PVGASTATE pThis, PVMSVGA3DSTATE pState,
2092 PVMSVGA3DSURFACE pDstSurface, uint32_t uDstFace, uint32_t uDstMipmap, SVGA3dBox const *pDstBox,
2093 PVMSVGA3DSURFACE pSrcSurface, uint32_t uSrcFace, uint32_t uSrcMipmap, SVGA3dBox const *pSrcBox,
2094 SVGA3dStretchBltMode enmMode, PVMSVGA3DCONTEXT pContext)
2095{
2096 RT_NOREF(pThis, pState, pDstSurface, uDstFace, uDstMipmap, pDstBox,
2097 pSrcSurface, uSrcFace, uSrcMipmap, pSrcBox, enmMode, pContext);
2098
2099 AssertFailed();
2100 return VINF_SUCCESS;
2101}
2102
2103
2104/**
2105 * Backend worker for implementing SVGA_3D_CMD_SURFACE_DMA that copies one box.
2106 *
2107 * @returns Failure status code or @a rc.
2108 * @param pThis The shared VGA/VMSVGA instance data.
2109 * @param pThisCC The VGA/VMSVGA state for ring-3.
2110 * @param pState The VMSVGA3d state.
2111 * @param pSurface The host surface.
2112 * @param pMipLevel Mipmap level. The caller knows it already.
2113 * @param uHostFace The host face (valid).
2114 * @param uHostMipmap The host mipmap level (valid).
2115 * @param GuestPtr The guest pointer.
2116 * @param cbGuestPitch The guest pitch.
2117 * @param transfer The transfer direction.
2118 * @param pBox The box to copy (clipped, valid, except for guest's srcx, srcy, srcz).
2119 * @param pContext The context (for OpenGL).
2120 * @param rc The current rc for all boxes.
2121 * @param iBox The current box number (for Direct 3D).
2122 */
2123int vmsvga3dBackSurfaceDMACopyBox(PVGASTATE pThis, PVGASTATECC pThisCC, PVMSVGA3DSTATE pState, PVMSVGA3DSURFACE pSurface,
2124 PVMSVGA3DMIPMAPLEVEL pMipLevel, uint32_t uHostFace, uint32_t uHostMipmap,
2125 SVGAGuestPtr GuestPtr, uint32_t cbGuestPitch, SVGA3dTransferType transfer,
2126 SVGA3dCopyBox const *pBox, PVMSVGA3DCONTEXT pContext, int rc, int iBox)
2127{
2128 RT_NOREF(pState, pMipLevel, pContext, iBox);
2129
2130 /* The called should not use the function for system memory surfaces. */
2131 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
2132 AssertReturn(pBackendSurface, VERR_INVALID_PARAMETER);
2133
2134 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
2135 {
2136 /** @todo This is generic code and should be in DevVGA-SVGA3d.cpp for backends which support Map/Unmap. */
2137 AssertReturn(uHostFace == 0 && uHostMipmap == 0, VERR_INVALID_PARAMETER);
2138 AssertReturn(transfer == SVGA3D_WRITE_HOST_VRAM, VERR_NOT_IMPLEMENTED); /** @todo Implement */
2139
2140 uint32_t const u32GuestBlockX = pBox->srcx / pSurface->cxBlock;
2141 uint32_t const u32GuestBlockY = pBox->srcy / pSurface->cyBlock;
2142 Assert(u32GuestBlockX * pSurface->cxBlock == pBox->srcx);
2143 Assert(u32GuestBlockY * pSurface->cyBlock == pBox->srcy);
2144 uint32_t const cBlocksX = (pBox->w + pSurface->cxBlock - 1) / pSurface->cxBlock;
2145 uint32_t const cBlocksY = (pBox->h + pSurface->cyBlock - 1) / pSurface->cyBlock;
2146 AssertMsgReturn(cBlocksX && cBlocksY, ("Empty box %dx%d\n", pBox->w, pBox->h), VERR_INTERNAL_ERROR);
2147
2148 /* vmsvgaR3GmrTransfer verifies uGuestOffset.
2149 * srcx(u32GuestBlockX) and srcy(u32GuestBlockY) have been verified in vmsvga3dSurfaceDMA
2150 * to not cause 32 bit overflow when multiplied by cbBlock and cbGuestPitch.
2151 */
2152 uint64_t const uGuestOffset = u32GuestBlockX * pSurface->cbBlock + u32GuestBlockY * cbGuestPitch;
2153 AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
2154
2155 SVGA3dSurfaceImageId image;
2156 image.sid = pSurface->id;
2157 image.face = uHostFace;
2158 image.mipmap = uHostMipmap;
2159
2160 SVGA3dBox box;
2161 box.x = pBox->x;
2162 box.y = pBox->y;
2163 box.z = 0;
2164 box.w = pBox->w;
2165 box.h = pBox->h;
2166 box.d = 1;
2167
2168 VMSVGA3D_MAPPED_SURFACE map;
2169 rc = vmsvga3dSurfaceMap(pThisCC, &image, &box, VMSVGA3D_SURFACE_MAP_WRITE_DISCARD, &map);
2170 if (RT_SUCCESS(rc))
2171 {
2172 /* Prepare parameters for vmsvgaR3GmrTransfer, which needs the host buffer address, size
2173 * and offset of the first scanline.
2174 */
2175 uint32_t const cbLockedBuf = map.cbRowPitch * cBlocksY;
2176 uint8_t *pu8LockedBuf = (uint8_t *)map.pvData;
2177 uint32_t const offLockedBuf = 0;
2178
2179 rc = vmsvgaR3GmrTransfer(pThis,
2180 pThisCC,
2181 transfer,
2182 pu8LockedBuf,
2183 cbLockedBuf,
2184 offLockedBuf,
2185 map.cbRowPitch,
2186 GuestPtr,
2187 (uint32_t)uGuestOffset,
2188 cbGuestPitch,
2189 cBlocksX * pSurface->cbBlock,
2190 cBlocksY);
2191 AssertRC(rc);
2192
2193 // Log4(("first line:\n%.*Rhxd\n", cBlocksX * pSurface->cbBlock, LockedRect.pBits));
2194
2195 //vmsvga3dMapWriteBmpFile(&map, "Dynamic");
2196
2197 vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ true);
2198 }
2199#if 0
2200//ASMBreakpoint();
2201 rc = vmsvga3dSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
2202 if (RT_SUCCESS(rc))
2203 {
2204 vmsvga3dMapWriteBmpFile(&map, "Staging");
2205
2206 vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
2207 }
2208#endif
2209 }
2210 else
2211 {
2212 AssertMsgFailed(("Unsupported surface type %d\n", pBackendSurface->enmResType));
2213 rc = VERR_NOT_IMPLEMENTED;
2214 }
2215
2216 return rc;
2217}
2218
2219
2220/**
2221 * Create D3D/OpenGL texture object for the specified surface.
2222 *
2223 * Surfaces are created when needed.
2224 *
2225 * @param pState The VMSVGA3d state.
2226 * @param pContext The context.
2227 * @param idAssociatedContext Probably the same as pContext->id.
2228 * @param pSurface The surface to create the texture for.
2229 */
2230int vmsvga3dBackCreateTexture(PVMSVGA3DSTATE pState, PVMSVGA3DCONTEXT pContext, uint32_t idAssociatedContext,
2231 PVMSVGA3DSURFACE pSurface)
2232
2233{
2234 RT_NOREF(pState, pContext, idAssociatedContext, pSurface);
2235
2236 AssertFailed();
2237 return VINF_SUCCESS;
2238}
2239
2240
2241int vmsvga3dOcclusionQueryCreate(PVMSVGA3DSTATE pState, PVMSVGA3DCONTEXT pContext)
2242{
2243 RT_NOREF(pState, pContext);
2244 AssertFailed();
2245 return VINF_SUCCESS;
2246}
2247
2248
2249int vmsvga3dOcclusionQueryBegin(PVMSVGA3DSTATE pState, PVMSVGA3DCONTEXT pContext)
2250{
2251 RT_NOREF(pState, pContext);
2252 AssertFailed();
2253 return VINF_SUCCESS;
2254}
2255
2256
2257int vmsvga3dOcclusionQueryEnd(PVMSVGA3DSTATE pState, PVMSVGA3DCONTEXT pContext)
2258{
2259 RT_NOREF(pState, pContext);
2260 AssertFailed();
2261 return VINF_SUCCESS;
2262}
2263
2264
2265int vmsvga3dOcclusionQueryGetData(PVMSVGA3DSTATE pState, PVMSVGA3DCONTEXT pContext, uint32_t *pu32Pixels)
2266{
2267 RT_NOREF(pState, pContext);
2268 *pu32Pixels = 0;
2269 AssertFailed();
2270 return VINF_SUCCESS;
2271}
2272
2273
2274int vmsvga3dOcclusionQueryDelete(PVMSVGA3DSTATE pState, PVMSVGA3DCONTEXT pContext)
2275{
2276 RT_NOREF(pState, pContext);
2277 AssertFailed();
2278 return VINF_SUCCESS;
2279}
2280
2281
2282static DECLCALLBACK(void) vmsvga3dDXDefineContext(PVMSVGA3DSTATE p3dState)
2283{
2284 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2285
2286 RT_NOREF(pBackend);
2287 AssertFailed(); /** @todo Implement */
2288}
2289
2290
2291static DECLCALLBACK(void) vmsvga3dDXDestroyContext(PVMSVGA3DSTATE p3dState)
2292{
2293 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2294
2295 RT_NOREF(pBackend);
2296 AssertFailed(); /** @todo Implement */
2297}
2298
2299
2300static DECLCALLBACK(void) vmsvga3dDXBindContext(PVMSVGA3DSTATE p3dState)
2301{
2302 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2303
2304 RT_NOREF(pBackend);
2305 AssertFailed(); /** @todo Implement */
2306}
2307
2308
2309static DECLCALLBACK(void) vmsvga3dDXReadbackContext(PVMSVGA3DSTATE p3dState)
2310{
2311 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2312
2313 RT_NOREF(pBackend);
2314 AssertFailed(); /** @todo Implement */
2315}
2316
2317
2318static DECLCALLBACK(void) vmsvga3dDXInvalidateContext(PVMSVGA3DSTATE p3dState)
2319{
2320 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2321
2322 RT_NOREF(pBackend);
2323 AssertFailed(); /** @todo Implement */
2324}
2325
2326
2327static DECLCALLBACK(void) vmsvga3dDXSetSingleConstantBuffer(PVMSVGA3DSTATE p3dState)
2328{
2329 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2330
2331 RT_NOREF(pBackend);
2332 AssertFailed(); /** @todo Implement */
2333}
2334
2335
2336static DECLCALLBACK(void) vmsvga3dDXSetShaderResources(PVMSVGA3DSTATE p3dState)
2337{
2338 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2339
2340 RT_NOREF(pBackend);
2341 AssertFailed(); /** @todo Implement */
2342}
2343
2344
2345static DECLCALLBACK(void) vmsvga3dDXSetShader(PVMSVGA3DSTATE p3dState)
2346{
2347 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2348
2349 RT_NOREF(pBackend);
2350 AssertFailed(); /** @todo Implement */
2351}
2352
2353
2354static DECLCALLBACK(void) vmsvga3dDXSetSamplers(PVMSVGA3DSTATE p3dState)
2355{
2356 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2357
2358 RT_NOREF(pBackend);
2359 AssertFailed(); /** @todo Implement */
2360}
2361
2362
2363static DECLCALLBACK(void) vmsvga3dDXDraw(PVMSVGA3DSTATE p3dState)
2364{
2365 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2366
2367 RT_NOREF(pBackend);
2368 AssertFailed(); /** @todo Implement */
2369}
2370
2371
2372static DECLCALLBACK(void) vmsvga3dDXDrawIndexed(PVMSVGA3DSTATE p3dState)
2373{
2374 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2375
2376 RT_NOREF(pBackend);
2377 AssertFailed(); /** @todo Implement */
2378}
2379
2380
2381static DECLCALLBACK(void) vmsvga3dDXDrawInstanced(PVMSVGA3DSTATE p3dState)
2382{
2383 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2384
2385 RT_NOREF(pBackend);
2386 AssertFailed(); /** @todo Implement */
2387}
2388
2389
2390static DECLCALLBACK(void) vmsvga3dDXDrawIndexedInstanced(PVMSVGA3DSTATE p3dState)
2391{
2392 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2393
2394 RT_NOREF(pBackend);
2395 AssertFailed(); /** @todo Implement */
2396}
2397
2398
2399static DECLCALLBACK(void) vmsvga3dDXDrawAuto(PVMSVGA3DSTATE p3dState)
2400{
2401 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2402
2403 RT_NOREF(pBackend);
2404 AssertFailed(); /** @todo Implement */
2405}
2406
2407
2408static DECLCALLBACK(void) vmsvga3dDXSetInputLayout(PVMSVGA3DSTATE p3dState)
2409{
2410 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2411
2412 RT_NOREF(pBackend);
2413 AssertFailed(); /** @todo Implement */
2414}
2415
2416
2417static DECLCALLBACK(void) vmsvga3dDXSetVertexBuffers(PVMSVGA3DSTATE p3dState)
2418{
2419 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2420
2421 RT_NOREF(pBackend);
2422 AssertFailed(); /** @todo Implement */
2423}
2424
2425
2426static DECLCALLBACK(void) vmsvga3dDXSetIndexBuffer(PVMSVGA3DSTATE p3dState)
2427{
2428 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2429
2430 RT_NOREF(pBackend);
2431 AssertFailed(); /** @todo Implement */
2432}
2433
2434
2435static DECLCALLBACK(void) vmsvga3dDXSetTopology(PVMSVGA3DSTATE p3dState)
2436{
2437 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2438
2439 RT_NOREF(pBackend);
2440 AssertFailed(); /** @todo Implement */
2441}
2442
2443
2444static DECLCALLBACK(void) vmsvga3dDXSetRenderTargets(PVMSVGA3DSTATE p3dState)
2445{
2446 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2447
2448 RT_NOREF(pBackend);
2449 AssertFailed(); /** @todo Implement */
2450}
2451
2452
2453static DECLCALLBACK(void) vmsvga3dDXSetBlendState(PVMSVGA3DSTATE p3dState)
2454{
2455 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2456
2457 RT_NOREF(pBackend);
2458 AssertFailed(); /** @todo Implement */
2459}
2460
2461
2462static DECLCALLBACK(void) vmsvga3dDXSetDepthStencilState(PVMSVGA3DSTATE p3dState)
2463{
2464 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2465
2466 RT_NOREF(pBackend);
2467 AssertFailed(); /** @todo Implement */
2468}
2469
2470
2471static DECLCALLBACK(void) vmsvga3dDXSetRasterizerState(PVMSVGA3DSTATE p3dState)
2472{
2473 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2474
2475 RT_NOREF(pBackend);
2476 AssertFailed(); /** @todo Implement */
2477}
2478
2479
2480static DECLCALLBACK(void) vmsvga3dDXDefineQuery(PVMSVGA3DSTATE p3dState)
2481{
2482 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2483
2484 RT_NOREF(pBackend);
2485 AssertFailed(); /** @todo Implement */
2486}
2487
2488
2489static DECLCALLBACK(void) vmsvga3dDXDestroyQuery(PVMSVGA3DSTATE p3dState)
2490{
2491 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2492
2493 RT_NOREF(pBackend);
2494 AssertFailed(); /** @todo Implement */
2495}
2496
2497
2498static DECLCALLBACK(void) vmsvga3dDXBindQuery(PVMSVGA3DSTATE p3dState)
2499{
2500 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2501
2502 RT_NOREF(pBackend);
2503 AssertFailed(); /** @todo Implement */
2504}
2505
2506
2507static DECLCALLBACK(void) vmsvga3dDXSetQueryOffset(PVMSVGA3DSTATE p3dState)
2508{
2509 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2510
2511 RT_NOREF(pBackend);
2512 AssertFailed(); /** @todo Implement */
2513}
2514
2515
2516static DECLCALLBACK(void) vmsvga3dDXBeginQuery(PVMSVGA3DSTATE p3dState)
2517{
2518 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2519
2520 RT_NOREF(pBackend);
2521 AssertFailed(); /** @todo Implement */
2522}
2523
2524
2525static DECLCALLBACK(void) vmsvga3dDXEndQuery(PVMSVGA3DSTATE p3dState)
2526{
2527 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2528
2529 RT_NOREF(pBackend);
2530 AssertFailed(); /** @todo Implement */
2531}
2532
2533
2534static DECLCALLBACK(void) vmsvga3dDXReadbackQuery(PVMSVGA3DSTATE p3dState)
2535{
2536 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2537
2538 RT_NOREF(pBackend);
2539 AssertFailed(); /** @todo Implement */
2540}
2541
2542
2543static DECLCALLBACK(void) vmsvga3dDXSetPredication(PVMSVGA3DSTATE p3dState)
2544{
2545 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2546
2547 RT_NOREF(pBackend);
2548 AssertFailed(); /** @todo Implement */
2549}
2550
2551
2552static DECLCALLBACK(void) vmsvga3dDXSetSOTargets(PVMSVGA3DSTATE p3dState)
2553{
2554 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2555
2556 RT_NOREF(pBackend);
2557 AssertFailed(); /** @todo Implement */
2558}
2559
2560
2561static DECLCALLBACK(void) vmsvga3dDXSetViewports(PVMSVGA3DSTATE p3dState)
2562{
2563 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2564
2565 RT_NOREF(pBackend);
2566 AssertFailed(); /** @todo Implement */
2567}
2568
2569
2570static DECLCALLBACK(void) vmsvga3dDXSetScissorRects(PVMSVGA3DSTATE p3dState)
2571{
2572 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2573
2574 RT_NOREF(pBackend);
2575 AssertFailed(); /** @todo Implement */
2576}
2577
2578
2579static DECLCALLBACK(void) vmsvga3dDXClearRenderTargetView(PVMSVGA3DSTATE p3dState)
2580{
2581 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2582
2583 RT_NOREF(pBackend);
2584 AssertFailed(); /** @todo Implement */
2585}
2586
2587
2588static DECLCALLBACK(void) vmsvga3dDXClearDepthStencilView(PVMSVGA3DSTATE p3dState)
2589{
2590 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2591
2592 RT_NOREF(pBackend);
2593 AssertFailed(); /** @todo Implement */
2594}
2595
2596
2597static DECLCALLBACK(void) vmsvga3dDXPredCopyRegion(PVMSVGA3DSTATE p3dState)
2598{
2599 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2600
2601 RT_NOREF(pBackend);
2602 AssertFailed(); /** @todo Implement */
2603}
2604
2605
2606static DECLCALLBACK(void) vmsvga3dDXPredCopy(PVMSVGA3DSTATE p3dState)
2607{
2608 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2609
2610 RT_NOREF(pBackend);
2611 AssertFailed(); /** @todo Implement */
2612}
2613
2614
2615static DECLCALLBACK(void) vmsvga3dDXStretchBlt(PVMSVGA3DSTATE p3dState)
2616{
2617 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2618
2619 RT_NOREF(pBackend);
2620 AssertFailed(); /** @todo Implement */
2621}
2622
2623
2624static DECLCALLBACK(void) vmsvga3dDXGenMips(PVMSVGA3DSTATE p3dState)
2625{
2626 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2627
2628 RT_NOREF(pBackend);
2629 AssertFailed(); /** @todo Implement */
2630}
2631
2632
2633static DECLCALLBACK(void) vmsvga3dDXUpdateSubResource(PVMSVGA3DSTATE p3dState)
2634{
2635 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2636
2637 RT_NOREF(pBackend);
2638 AssertFailed(); /** @todo Implement */
2639}
2640
2641
2642static DECLCALLBACK(void) vmsvga3dDXReadbackSubResource(PVMSVGA3DSTATE p3dState)
2643{
2644 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2645
2646 RT_NOREF(pBackend);
2647 AssertFailed(); /** @todo Implement */
2648}
2649
2650
2651static DECLCALLBACK(void) vmsvga3dDXInvalidateSubResource(PVMSVGA3DSTATE p3dState)
2652{
2653 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2654
2655 RT_NOREF(pBackend);
2656 AssertFailed(); /** @todo Implement */
2657}
2658
2659
2660static DECLCALLBACK(void) vmsvga3dDXDefineShaderResourceView(PVMSVGA3DSTATE p3dState)
2661{
2662 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2663
2664 RT_NOREF(pBackend);
2665 AssertFailed(); /** @todo Implement */
2666}
2667
2668
2669static DECLCALLBACK(void) vmsvga3dDXDestroyShaderResourceView(PVMSVGA3DSTATE p3dState)
2670{
2671 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2672
2673 RT_NOREF(pBackend);
2674 AssertFailed(); /** @todo Implement */
2675}
2676
2677
2678static DECLCALLBACK(void) vmsvga3dDXDefineRenderTargetView(PVMSVGA3DSTATE p3dState)
2679{
2680 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2681
2682 RT_NOREF(pBackend);
2683 AssertFailed(); /** @todo Implement */
2684}
2685
2686
2687static DECLCALLBACK(void) vmsvga3dDXDestroyRenderTargetView(PVMSVGA3DSTATE p3dState)
2688{
2689 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2690
2691 RT_NOREF(pBackend);
2692 AssertFailed(); /** @todo Implement */
2693}
2694
2695
2696static DECLCALLBACK(void) vmsvga3dDXDefineDepthStencilView(PVMSVGA3DSTATE p3dState)
2697{
2698 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2699
2700 RT_NOREF(pBackend);
2701 AssertFailed(); /** @todo Implement */
2702}
2703
2704
2705static DECLCALLBACK(void) vmsvga3dDXDestroyDepthStencilView(PVMSVGA3DSTATE p3dState)
2706{
2707 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2708
2709 RT_NOREF(pBackend);
2710 AssertFailed(); /** @todo Implement */
2711}
2712
2713
2714static DECLCALLBACK(void) vmsvga3dDXDefineElementLayout(PVMSVGA3DSTATE p3dState)
2715{
2716 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2717
2718 RT_NOREF(pBackend);
2719 AssertFailed(); /** @todo Implement */
2720}
2721
2722
2723static DECLCALLBACK(void) vmsvga3dDXDestroyElementLayout(PVMSVGA3DSTATE p3dState)
2724{
2725 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2726
2727 RT_NOREF(pBackend);
2728 AssertFailed(); /** @todo Implement */
2729}
2730
2731
2732static DECLCALLBACK(void) vmsvga3dDXDefineBlendState(PVMSVGA3DSTATE p3dState)
2733{
2734 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2735
2736 RT_NOREF(pBackend);
2737 AssertFailed(); /** @todo Implement */
2738}
2739
2740
2741static DECLCALLBACK(void) vmsvga3dDXDestroyBlendState(PVMSVGA3DSTATE p3dState)
2742{
2743 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2744
2745 RT_NOREF(pBackend);
2746 AssertFailed(); /** @todo Implement */
2747}
2748
2749
2750static DECLCALLBACK(void) vmsvga3dDXDefineDepthStencilState(PVMSVGA3DSTATE p3dState)
2751{
2752 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2753
2754 RT_NOREF(pBackend);
2755 AssertFailed(); /** @todo Implement */
2756}
2757
2758
2759static DECLCALLBACK(void) vmsvga3dDXDestroyDepthStencilState(PVMSVGA3DSTATE p3dState)
2760{
2761 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2762
2763 RT_NOREF(pBackend);
2764 AssertFailed(); /** @todo Implement */
2765}
2766
2767
2768static DECLCALLBACK(void) vmsvga3dDXDefineRasterizerState(PVMSVGA3DSTATE p3dState)
2769{
2770 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2771
2772 RT_NOREF(pBackend);
2773 AssertFailed(); /** @todo Implement */
2774}
2775
2776
2777static DECLCALLBACK(void) vmsvga3dDXDestroyRasterizerState(PVMSVGA3DSTATE p3dState)
2778{
2779 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2780
2781 RT_NOREF(pBackend);
2782 AssertFailed(); /** @todo Implement */
2783}
2784
2785
2786static DECLCALLBACK(void) vmsvga3dDXDefineSamplerState(PVMSVGA3DSTATE p3dState)
2787{
2788 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2789
2790 RT_NOREF(pBackend);
2791 AssertFailed(); /** @todo Implement */
2792}
2793
2794
2795static DECLCALLBACK(void) vmsvga3dDXDestroySamplerState(PVMSVGA3DSTATE p3dState)
2796{
2797 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2798
2799 RT_NOREF(pBackend);
2800 AssertFailed(); /** @todo Implement */
2801}
2802
2803
2804static DECLCALLBACK(void) vmsvga3dDXDefineShader(PVMSVGA3DSTATE p3dState)
2805{
2806 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2807
2808 RT_NOREF(pBackend);
2809 AssertFailed(); /** @todo Implement */
2810}
2811
2812
2813static DECLCALLBACK(void) vmsvga3dDXDestroyShader(PVMSVGA3DSTATE p3dState)
2814{
2815 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2816
2817 RT_NOREF(pBackend);
2818 AssertFailed(); /** @todo Implement */
2819}
2820
2821
2822static DECLCALLBACK(void) vmsvga3dDXBindShader(PVMSVGA3DSTATE p3dState)
2823{
2824 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2825
2826 RT_NOREF(pBackend);
2827 AssertFailed(); /** @todo Implement */
2828}
2829
2830
2831static DECLCALLBACK(void) vmsvga3dDXDefineStreamOutput(PVMSVGA3DSTATE p3dState)
2832{
2833 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2834
2835 RT_NOREF(pBackend);
2836 AssertFailed(); /** @todo Implement */
2837}
2838
2839
2840static DECLCALLBACK(void) vmsvga3dDXDestroyStreamOutput(PVMSVGA3DSTATE p3dState)
2841{
2842 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2843
2844 RT_NOREF(pBackend);
2845 AssertFailed(); /** @todo Implement */
2846}
2847
2848
2849static DECLCALLBACK(void) vmsvga3dDXSetStreamOutput(PVMSVGA3DSTATE p3dState)
2850{
2851 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2852
2853 RT_NOREF(pBackend);
2854 AssertFailed(); /** @todo Implement */
2855}
2856
2857
2858static DECLCALLBACK(void) vmsvga3dDXSetCOTable(PVMSVGA3DSTATE p3dState)
2859{
2860 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2861
2862 RT_NOREF(pBackend);
2863 AssertFailed(); /** @todo Implement */
2864}
2865
2866
2867static DECLCALLBACK(void) vmsvga3dDXReadbackCOTable(PVMSVGA3DSTATE p3dState)
2868{
2869 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2870
2871 RT_NOREF(pBackend);
2872 AssertFailed(); /** @todo Implement */
2873}
2874
2875
2876static DECLCALLBACK(void) vmsvga3dDXBufferCopy(PVMSVGA3DSTATE p3dState)
2877{
2878 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2879
2880 RT_NOREF(pBackend);
2881 AssertFailed(); /** @todo Implement */
2882}
2883
2884
2885static DECLCALLBACK(void) vmsvga3dDXTransferFromBuffer(PVMSVGA3DSTATE p3dState)
2886{
2887 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2888
2889 RT_NOREF(pBackend);
2890 AssertFailed(); /** @todo Implement */
2891}
2892
2893
2894static DECLCALLBACK(void) vmsvga3dDXSurfaceCopyAndReadback(PVMSVGA3DSTATE p3dState)
2895{
2896 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2897
2898 RT_NOREF(pBackend);
2899 AssertFailed(); /** @todo Implement */
2900}
2901
2902
2903static DECLCALLBACK(void) vmsvga3dDXMoveQuery(PVMSVGA3DSTATE p3dState)
2904{
2905 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2906
2907 RT_NOREF(pBackend);
2908 AssertFailed(); /** @todo Implement */
2909}
2910
2911
2912static DECLCALLBACK(void) vmsvga3dDXBindAllQuery(PVMSVGA3DSTATE p3dState)
2913{
2914 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2915
2916 RT_NOREF(pBackend);
2917 AssertFailed(); /** @todo Implement */
2918}
2919
2920
2921static DECLCALLBACK(void) vmsvga3dDXReadbackAllQuery(PVMSVGA3DSTATE p3dState)
2922{
2923 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2924
2925 RT_NOREF(pBackend);
2926 AssertFailed(); /** @todo Implement */
2927}
2928
2929
2930static DECLCALLBACK(void) vmsvga3dDXPredTransferFromBuffer(PVMSVGA3DSTATE p3dState)
2931{
2932 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2933
2934 RT_NOREF(pBackend);
2935 AssertFailed(); /** @todo Implement */
2936}
2937
2938
2939static DECLCALLBACK(void) vmsvga3dDXMobFence64(PVMSVGA3DSTATE p3dState)
2940{
2941 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2942
2943 RT_NOREF(pBackend);
2944 AssertFailed(); /** @todo Implement */
2945}
2946
2947
2948static DECLCALLBACK(void) vmsvga3dDXBindAllShader(PVMSVGA3DSTATE p3dState)
2949{
2950 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2951
2952 RT_NOREF(pBackend);
2953 AssertFailed(); /** @todo Implement */
2954}
2955
2956
2957static DECLCALLBACK(void) vmsvga3dDXHint(PVMSVGA3DSTATE p3dState)
2958{
2959 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2960
2961 RT_NOREF(pBackend);
2962 AssertFailed(); /** @todo Implement */
2963}
2964
2965
2966static DECLCALLBACK(void) vmsvga3dDXBufferUpdate(PVMSVGA3DSTATE p3dState)
2967{
2968 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2969
2970 RT_NOREF(pBackend);
2971 AssertFailed(); /** @todo Implement */
2972}
2973
2974
2975static DECLCALLBACK(void) vmsvga3dDXSetVSConstantBufferOffset(PVMSVGA3DSTATE p3dState)
2976{
2977 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2978
2979 RT_NOREF(pBackend);
2980 AssertFailed(); /** @todo Implement */
2981}
2982
2983
2984static DECLCALLBACK(void) vmsvga3dDXSetPSConstantBufferOffset(PVMSVGA3DSTATE p3dState)
2985{
2986 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2987
2988 RT_NOREF(pBackend);
2989 AssertFailed(); /** @todo Implement */
2990}
2991
2992
2993static DECLCALLBACK(void) vmsvga3dDXSetGSConstantBufferOffset(PVMSVGA3DSTATE p3dState)
2994{
2995 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
2996
2997 RT_NOREF(pBackend);
2998 AssertFailed(); /** @todo Implement */
2999}
3000
3001
3002static DECLCALLBACK(void) vmsvga3dDXCondBindAllShader(PVMSVGA3DSTATE p3dState)
3003{
3004 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
3005
3006 RT_NOREF(pBackend);
3007 AssertFailed(); /** @todo Implement */
3008}
3009
3010
3011int vmsvga3dQueryInterface(PVGASTATECC pThisCC, char const *pszInterfaceName, void *pvInterfaceFuncs, size_t cbInterfaceFuncs)
3012{
3013 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
3014 AssertReturn(p3dState, VERR_NOT_SUPPORTED);
3015
3016 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
3017 AssertReturn(pBackend, VERR_NOT_SUPPORTED);
3018
3019 if (pvInterfaceFuncs)
3020 RT_BZERO(pvInterfaceFuncs, cbInterfaceFuncs);
3021
3022 int rc = VINF_SUCCESS;
3023 if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_DX) == 0)
3024 {
3025 if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSDX))
3026 {
3027 if (pvInterfaceFuncs)
3028 {
3029 VMSVGA3DBACKENDFUNCSDX *p = (VMSVGA3DBACKENDFUNCSDX *)pvInterfaceFuncs;
3030 p->pfnDXDefineContext = vmsvga3dDXDefineContext;
3031 p->pfnDXDestroyContext = vmsvga3dDXDestroyContext;
3032 p->pfnDXBindContext = vmsvga3dDXBindContext;
3033 p->pfnDXReadbackContext = vmsvga3dDXReadbackContext;
3034 p->pfnDXInvalidateContext = vmsvga3dDXInvalidateContext;
3035 p->pfnDXSetSingleConstantBuffer = vmsvga3dDXSetSingleConstantBuffer;
3036 p->pfnDXSetShaderResources = vmsvga3dDXSetShaderResources;
3037 p->pfnDXSetShader = vmsvga3dDXSetShader;
3038 p->pfnDXSetSamplers = vmsvga3dDXSetSamplers;
3039 p->pfnDXDraw = vmsvga3dDXDraw;
3040 p->pfnDXDrawIndexed = vmsvga3dDXDrawIndexed;
3041 p->pfnDXDrawInstanced = vmsvga3dDXDrawInstanced;
3042 p->pfnDXDrawIndexedInstanced = vmsvga3dDXDrawIndexedInstanced;
3043 p->pfnDXDrawAuto = vmsvga3dDXDrawAuto;
3044 p->pfnDXSetInputLayout = vmsvga3dDXSetInputLayout;
3045 p->pfnDXSetVertexBuffers = vmsvga3dDXSetVertexBuffers;
3046 p->pfnDXSetIndexBuffer = vmsvga3dDXSetIndexBuffer;
3047 p->pfnDXSetTopology = vmsvga3dDXSetTopology;
3048 p->pfnDXSetRenderTargets = vmsvga3dDXSetRenderTargets;
3049 p->pfnDXSetBlendState = vmsvga3dDXSetBlendState;
3050 p->pfnDXSetDepthStencilState = vmsvga3dDXSetDepthStencilState;
3051 p->pfnDXSetRasterizerState = vmsvga3dDXSetRasterizerState;
3052 p->pfnDXDefineQuery = vmsvga3dDXDefineQuery;
3053 p->pfnDXDestroyQuery = vmsvga3dDXDestroyQuery;
3054 p->pfnDXBindQuery = vmsvga3dDXBindQuery;
3055 p->pfnDXSetQueryOffset = vmsvga3dDXSetQueryOffset;
3056 p->pfnDXBeginQuery = vmsvga3dDXBeginQuery;
3057 p->pfnDXEndQuery = vmsvga3dDXEndQuery;
3058 p->pfnDXReadbackQuery = vmsvga3dDXReadbackQuery;
3059 p->pfnDXSetPredication = vmsvga3dDXSetPredication;
3060 p->pfnDXSetSOTargets = vmsvga3dDXSetSOTargets;
3061 p->pfnDXSetViewports = vmsvga3dDXSetViewports;
3062 p->pfnDXSetScissorRects = vmsvga3dDXSetScissorRects;
3063 p->pfnDXClearRenderTargetView = vmsvga3dDXClearRenderTargetView;
3064 p->pfnDXClearDepthStencilView = vmsvga3dDXClearDepthStencilView;
3065 p->pfnDXPredCopyRegion = vmsvga3dDXPredCopyRegion;
3066 p->pfnDXPredCopy = vmsvga3dDXPredCopy;
3067 p->pfnDXStretchBlt = vmsvga3dDXStretchBlt;
3068 p->pfnDXGenMips = vmsvga3dDXGenMips;
3069 p->pfnDXUpdateSubResource = vmsvga3dDXUpdateSubResource;
3070 p->pfnDXReadbackSubResource = vmsvga3dDXReadbackSubResource;
3071 p->pfnDXInvalidateSubResource = vmsvga3dDXInvalidateSubResource;
3072 p->pfnDXDefineShaderResourceView = vmsvga3dDXDefineShaderResourceView;
3073 p->pfnDXDestroyShaderResourceView = vmsvga3dDXDestroyShaderResourceView;
3074 p->pfnDXDefineRenderTargetView = vmsvga3dDXDefineRenderTargetView;
3075 p->pfnDXDestroyRenderTargetView = vmsvga3dDXDestroyRenderTargetView;
3076 p->pfnDXDefineDepthStencilView = vmsvga3dDXDefineDepthStencilView;
3077 p->pfnDXDestroyDepthStencilView = vmsvga3dDXDestroyDepthStencilView;
3078 p->pfnDXDefineElementLayout = vmsvga3dDXDefineElementLayout;
3079 p->pfnDXDestroyElementLayout = vmsvga3dDXDestroyElementLayout;
3080 p->pfnDXDefineBlendState = vmsvga3dDXDefineBlendState;
3081 p->pfnDXDestroyBlendState = vmsvga3dDXDestroyBlendState;
3082 p->pfnDXDefineDepthStencilState = vmsvga3dDXDefineDepthStencilState;
3083 p->pfnDXDestroyDepthStencilState = vmsvga3dDXDestroyDepthStencilState;
3084 p->pfnDXDefineRasterizerState = vmsvga3dDXDefineRasterizerState;
3085 p->pfnDXDestroyRasterizerState = vmsvga3dDXDestroyRasterizerState;
3086 p->pfnDXDefineSamplerState = vmsvga3dDXDefineSamplerState;
3087 p->pfnDXDestroySamplerState = vmsvga3dDXDestroySamplerState;
3088 p->pfnDXDefineShader = vmsvga3dDXDefineShader;
3089 p->pfnDXDestroyShader = vmsvga3dDXDestroyShader;
3090 p->pfnDXBindShader = vmsvga3dDXBindShader;
3091 p->pfnDXDefineStreamOutput = vmsvga3dDXDefineStreamOutput;
3092 p->pfnDXDestroyStreamOutput = vmsvga3dDXDestroyStreamOutput;
3093 p->pfnDXSetStreamOutput = vmsvga3dDXSetStreamOutput;
3094 p->pfnDXSetCOTable = vmsvga3dDXSetCOTable;
3095 p->pfnDXReadbackCOTable = vmsvga3dDXReadbackCOTable;
3096 p->pfnDXBufferCopy = vmsvga3dDXBufferCopy;
3097 p->pfnDXTransferFromBuffer = vmsvga3dDXTransferFromBuffer;
3098 p->pfnDXSurfaceCopyAndReadback = vmsvga3dDXSurfaceCopyAndReadback;
3099 p->pfnDXMoveQuery = vmsvga3dDXMoveQuery;
3100 p->pfnDXBindAllQuery = vmsvga3dDXBindAllQuery;
3101 p->pfnDXReadbackAllQuery = vmsvga3dDXReadbackAllQuery;
3102 p->pfnDXPredTransferFromBuffer = vmsvga3dDXPredTransferFromBuffer;
3103 p->pfnDXMobFence64 = vmsvga3dDXMobFence64;
3104 p->pfnDXBindAllShader = vmsvga3dDXBindAllShader;
3105 p->pfnDXHint = vmsvga3dDXHint;
3106 p->pfnDXBufferUpdate = vmsvga3dDXBufferUpdate;
3107 p->pfnDXSetVSConstantBufferOffset = vmsvga3dDXSetVSConstantBufferOffset;
3108 p->pfnDXSetPSConstantBufferOffset = vmsvga3dDXSetPSConstantBufferOffset;
3109 p->pfnDXSetGSConstantBufferOffset = vmsvga3dDXSetGSConstantBufferOffset;
3110 p->pfnDXCondBindAllShader = vmsvga3dDXCondBindAllShader;
3111 }
3112 }
3113 else
3114 {
3115 AssertFailed();
3116 rc = VERR_INVALID_PARAMETER;
3117 }
3118 }
3119 else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_MAP) == 0)
3120 {
3121 if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSMAP))
3122 {
3123 if (pvInterfaceFuncs)
3124 {
3125 VMSVGA3DBACKENDFUNCSMAP *p = (VMSVGA3DBACKENDFUNCSMAP *)pvInterfaceFuncs;
3126 p->pfnSurfaceMap = vmsvga3dSurfaceMap;
3127 p->pfnSurfaceUnmap = vmsvga3dSurfaceUnmap;
3128 }
3129 }
3130 else
3131 {
3132 AssertFailed();
3133 rc = VERR_INVALID_PARAMETER;
3134 }
3135 }
3136 else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_GBO) == 0)
3137 {
3138 if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSGBO))
3139 {
3140 if (pvInterfaceFuncs)
3141 {
3142 VMSVGA3DBACKENDFUNCSGBO *p = (VMSVGA3DBACKENDFUNCSGBO *)pvInterfaceFuncs;
3143 p->pfnScreenTargetBind = vmsvga3dScreenTargetBind;
3144 p->pfnScreenTargetUpdate = vmsvga3dScreenTargetUpdate;
3145 }
3146 }
3147 else
3148 {
3149 AssertFailed();
3150 rc = VERR_INVALID_PARAMETER;
3151 }
3152 }
3153 else
3154 rc = VERR_NOT_IMPLEMENTED;
3155 return rc;
3156}
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