VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-win-dx.cpp@ 88904

Last change on this file since 88904 was 88904, checked in by vboxsync, 4 years ago

Devices/Graphics: Helpers to read and write guest MOB memory; fixed some commands; started to deal with shared surfaces; make code more straightforward. bugref:9830
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File size: 233.1 KB
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1/* $Id: DevVGA-SVGA3d-win-dx.cpp 88904 2021-05-06 14:02:43Z vboxsync $ */
2/** @file
3 * DevVMWare - VMWare SVGA device
4 */
5
6/*
7 * Copyright (C) 2020 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
23#include <VBox/AssertGuest.h>
24#include <VBox/log.h>
25#include <VBox/vmm/pdmdev.h>
26#include <VBox/vmm/pgm.h>
27
28#include <iprt/assert.h>
29#include <iprt/avl.h>
30#include <iprt/errcore.h>
31#include <iprt/mem.h>
32
33#include <VBoxVideo.h> /* required by DevVGA.h */
34#include <VBoxVideo3D.h>
35
36/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
37#include "DevVGA.h"
38
39#include "DevVGA-SVGA.h"
40#include "DevVGA-SVGA3d.h"
41#include "DevVGA-SVGA3d-internal.h"
42#include "DevVGA-SVGA3d-dx-shader.h"
43
44#include <d3d11.h>
45
46#define DX_RELEASE_ARRAY(a_Count, a_papArray) do { \
47 for (uint32_t i = 0; i < (a_Count); ++i) \
48 D3D_RELEASE((a_papArray)[i]); \
49} while (0)
50
51typedef struct DXDEVICE
52{
53 ID3D11Device *pDevice; /* Device. */
54 ID3D11DeviceContext *pImmediateContext; /* Corresponding context. */
55 IDXGIFactory *pDxgiFactory; /* DXGI Factory. */
56 D3D_FEATURE_LEVEL FeatureLevel;
57} DXDEVICE;
58
59/* What kind of resource has been created for the VMSVGA3D surface. */
60typedef enum VMSVGA3DBACKRESTYPE
61{
62 VMSVGA3D_RESTYPE_NONE = 0,
63 VMSVGA3D_RESTYPE_SCREEN_TARGET = 1,
64 VMSVGA3D_RESTYPE_TEXTURE_1D = 2,
65 VMSVGA3D_RESTYPE_TEXTURE = 3,
66 VMSVGA3D_RESTYPE_CUBE_TEXTURE = 4,
67 VMSVGA3D_RESTYPE_TEXTURE_3D = 5,
68 VMSVGA3D_RESTYPE_BUFFER = 6,
69} VMSVGA3DBACKRESTYPE;
70
71typedef struct VMSVGA3DBACKENDSURFACE
72{
73 VMSVGA3DBACKRESTYPE enmResType;
74 DXGI_FORMAT enmDxgiFormat;
75 /** AVL tree containing DXSHAREDTEXTURE structures. */
76 AVLU32TREE SharedTextureTree;
77 union
78 {
79 struct
80 {
81 ID3D11Resource *pResource;
82 } Resource;
83 struct
84 {
85 ID3D11Texture2D *pTexture; /* The texture for the screen content. */
86 ID3D11Texture2D *pDynamicTexture; /* For screen updates from memory. */ /** @todo One for all screens. */
87 ID3D11Texture2D *pStagingTexture; /* For Reading the screen content. */ /** @todo One for all screens. */
88 /* Screen targets are created as shared surfaces. */
89 HANDLE SharedHandle; /* The shared handle of this structure. */
90 } ScreenTarget;
91 struct
92 {
93 ID3D11Texture2D *pTexture; /* The texture for the screen content. */
94 ID3D11Texture2D *pDynamicTexture; /* For screen updates from memory. */ /** @todo One for every format. */
95 ID3D11Texture2D *pStagingTexture; /* For Reading the screen content. */ /** @todo One for every format. */
96 } Texture;
97 struct
98 {
99 ID3D11Buffer *pBuffer;
100 } Buffer;
101 } u;
102} VMSVGA3DBACKENDSURFACE;
103
104/* "The only resources that can be shared are 2D non-mipmapped textures." */
105typedef struct DXSHAREDTEXTURE
106{
107 AVLU32NODECORE Core; /* Key is context id which opened this texture. */
108 ID3D11Texture2D *pTexture; /* The opened shared texture. */
109 uint32_t sid; /* Surface id. */
110} DXSHAREDTEXTURE;
111
112
113typedef struct VMSVGAHWSCREEN
114{
115 ID3D11Texture2D *pTexture; /* Shared texture for the screen content. Only used as CopyResource target. */
116 IDXGIResource *pDxgiResource; /* Interface of the texture. */
117 IDXGIKeyedMutex *pDXGIKeyedMutex; /* Synchronization interface for the render device. */
118 HANDLE SharedHandle; /* The shared handle of this structure. */
119 uint32_t sidScreenTarget; /* The source surface for this screen. */
120} VMSVGAHWSCREEN;
121
122
123typedef struct DXELEMENTLAYOUT
124{
125 ID3D11InputLayout *pElementLayout;
126 uint32_t cElementDesc;
127 D3D11_INPUT_ELEMENT_DESC aElementDesc[32];
128} DXELEMENTLAYOUT;
129
130typedef struct DXSHADER
131{
132 SVGA3dShaderType enmShaderType;
133 union
134 {
135 ID3D11DeviceChild *pShader; /* All. */
136 ID3D11VertexShader *pVertexShader; /* SVGA3D_SHADERTYPE_VS */
137 ID3D11PixelShader *pPixelShader; /* SVGA3D_SHADERTYPE_PS */
138 ID3D11GeometryShader *pGeometryShader; /* SVGA3D_SHADERTYPE_GS */
139 ID3D11HullShader *pHullShader; /* SVGA3D_SHADERTYPE_HS */
140 ID3D11DomainShader *pDomainShader; /* SVGA3D_SHADERTYPE_DS */
141 ID3D11ComputeShader *pComputeShader; /* SVGA3D_SHADERTYPE_CS */
142 };
143 void *pvDXBC;
144 uint32_t cbDXBC;
145} DXSHADER;
146
147typedef struct VMSVGA3DBACKENDDXCONTEXT
148{
149 DXDEVICE device; /* Device for the this context operation. */
150
151 /* Arrays for Context-Object Tables. Number of entries depends on COTable size. */
152 uint32_t cBlendState; /* Number of entries in the papBlendState array. */
153 uint32_t cDepthStencilState; /* papDepthStencilState */
154 uint32_t cSamplerState; /* papSamplerState */
155 uint32_t cRasterizerState; /* papRasterizerState */
156 uint32_t cElementLayout; /* papElementLayout */
157 uint32_t cRenderTargetView; /* papRenderTargetView */
158 uint32_t cDepthStencilView; /* papDepthStencilView */
159 uint32_t cShaderResourceView; /* papShaderResourceView */
160 uint32_t cQuery; /* papQuery */
161 uint32_t cShader; /* papShader */
162 ID3D11BlendState **papBlendState;
163 ID3D11DepthStencilState **papDepthStencilState;
164 ID3D11SamplerState **papSamplerState;
165 ID3D11RasterizerState **papRasterizerState;
166 DXELEMENTLAYOUT *paElementLayout;
167 ID3D11RenderTargetView **papRenderTargetView;
168 ID3D11DepthStencilView **papDepthStencilView;
169 ID3D11ShaderResourceView **papShaderResourceView;
170 ID3D11Query **papQuery;
171 DXSHADER *paShader;
172} VMSVGA3DBACKENDDXCONTEXT;
173
174typedef HRESULT FN_D3D_DISASSEMBLE(LPCVOID pSrcData, SIZE_T SrcDataSize, UINT Flags, LPCSTR szComments, ID3D10Blob **ppDisassembly);
175typedef FN_D3D_DISASSEMBLE *PFN_D3D_DISASSEMBLE;
176
177typedef struct VMSVGA3DBACKEND
178{
179 RTLDRMOD hD3D11;
180 PFN_D3D11_CREATE_DEVICE pfnD3D11CreateDevice;
181
182 RTLDRMOD hD3DCompiler;
183 PFN_D3D_DISASSEMBLE pfnD3DDisassemble;
184
185 DXDEVICE device; /* Device for the VMSVGA3D context independent operation. */
186} VMSVGA3DBACKEND;
187
188
189static DXGI_FORMAT vmsvgaDXSurfaceFormat2Dxgi(SVGA3dSurfaceFormat format)
190{
191 /* Ensure that correct headers are used.
192 * SVGA3D_AYUV was equal to 45, then replaced with SVGA3D_FORMAT_DEAD2 = 45, and redefined as SVGA3D_AYUV = 152.
193 */
194 AssertCompile(SVGA3D_AYUV == 152);
195
196#define DXGI_FORMAT_ DXGI_FORMAT_UNKNOWN
197 /** @todo More formats. */
198 switch (format)
199 {
200 case SVGA3D_X8R8G8B8: return DXGI_FORMAT_B8G8R8X8_UNORM;
201 case SVGA3D_A8R8G8B8: return DXGI_FORMAT_B8G8R8A8_UNORM;
202 case SVGA3D_R5G6B5: return DXGI_FORMAT_B5G6R5_UNORM;
203 case SVGA3D_X1R5G5B5: return DXGI_FORMAT_B5G5R5A1_UNORM;
204 case SVGA3D_A1R5G5B5: return DXGI_FORMAT_B5G5R5A1_UNORM;
205 case SVGA3D_A4R4G4B4: break; // 11.1 return DXGI_FORMAT_B4G4R4A4_UNORM;
206 case SVGA3D_Z_D32: break;
207 case SVGA3D_Z_D16: return DXGI_FORMAT_D16_UNORM;
208 case SVGA3D_Z_D24S8: return DXGI_FORMAT_D24_UNORM_S8_UINT;
209 case SVGA3D_Z_D15S1: break;
210 case SVGA3D_LUMINANCE8: return DXGI_FORMAT_;
211 case SVGA3D_LUMINANCE4_ALPHA4: return DXGI_FORMAT_;
212 case SVGA3D_LUMINANCE16: return DXGI_FORMAT_;
213 case SVGA3D_LUMINANCE8_ALPHA8: return DXGI_FORMAT_;
214 case SVGA3D_DXT1: return DXGI_FORMAT_;
215 case SVGA3D_DXT2: return DXGI_FORMAT_;
216 case SVGA3D_DXT3: return DXGI_FORMAT_;
217 case SVGA3D_DXT4: return DXGI_FORMAT_;
218 case SVGA3D_DXT5: return DXGI_FORMAT_;
219 case SVGA3D_BUMPU8V8: return DXGI_FORMAT_;
220 case SVGA3D_BUMPL6V5U5: return DXGI_FORMAT_;
221 case SVGA3D_BUMPX8L8V8U8: return DXGI_FORMAT_;
222 case SVGA3D_FORMAT_DEAD1: break;
223 case SVGA3D_ARGB_S10E5: return DXGI_FORMAT_;
224 case SVGA3D_ARGB_S23E8: return DXGI_FORMAT_;
225 case SVGA3D_A2R10G10B10: return DXGI_FORMAT_;
226 case SVGA3D_V8U8: return DXGI_FORMAT_;
227 case SVGA3D_Q8W8V8U8: return DXGI_FORMAT_;
228 case SVGA3D_CxV8U8: return DXGI_FORMAT_;
229 case SVGA3D_X8L8V8U8: return DXGI_FORMAT_;
230 case SVGA3D_A2W10V10U10: return DXGI_FORMAT_;
231 case SVGA3D_ALPHA8: return DXGI_FORMAT_;
232 case SVGA3D_R_S10E5: return DXGI_FORMAT_;
233 case SVGA3D_R_S23E8: return DXGI_FORMAT_;
234 case SVGA3D_RG_S10E5: return DXGI_FORMAT_;
235 case SVGA3D_RG_S23E8: return DXGI_FORMAT_;
236 case SVGA3D_BUFFER: return DXGI_FORMAT_;
237 case SVGA3D_Z_D24X8: return DXGI_FORMAT_;
238 case SVGA3D_V16U16: return DXGI_FORMAT_;
239 case SVGA3D_G16R16: return DXGI_FORMAT_;
240 case SVGA3D_A16B16G16R16: return DXGI_FORMAT_;
241 case SVGA3D_UYVY: return DXGI_FORMAT_;
242 case SVGA3D_YUY2: return DXGI_FORMAT_;
243 case SVGA3D_NV12: return DXGI_FORMAT_;
244 case SVGA3D_FORMAT_DEAD2: break; /* Old SVGA3D_AYUV */
245 case SVGA3D_R32G32B32A32_TYPELESS: return DXGI_FORMAT_R32G32B32A32_TYPELESS;
246 case SVGA3D_R32G32B32A32_UINT: return DXGI_FORMAT_R32G32B32A32_UINT;
247 case SVGA3D_R32G32B32A32_SINT: return DXGI_FORMAT_R32G32B32A32_SINT;
248 case SVGA3D_R32G32B32_TYPELESS: return DXGI_FORMAT_R32G32B32_TYPELESS;
249 case SVGA3D_R32G32B32_FLOAT: return DXGI_FORMAT_R32G32B32_FLOAT;
250 case SVGA3D_R32G32B32_UINT: return DXGI_FORMAT_R32G32B32_UINT;
251 case SVGA3D_R32G32B32_SINT: return DXGI_FORMAT_R32G32B32_SINT;
252 case SVGA3D_R16G16B16A16_TYPELESS: return DXGI_FORMAT_R16G16B16A16_TYPELESS;
253 case SVGA3D_R16G16B16A16_UINT: return DXGI_FORMAT_R16G16B16A16_UINT;
254 case SVGA3D_R16G16B16A16_SNORM: return DXGI_FORMAT_R16G16B16A16_SNORM;
255 case SVGA3D_R16G16B16A16_SINT: return DXGI_FORMAT_R16G16B16A16_SINT;
256 case SVGA3D_R32G32_TYPELESS: return DXGI_FORMAT_R32G32_TYPELESS;
257 case SVGA3D_R32G32_UINT: return DXGI_FORMAT_R32G32_UINT;
258 case SVGA3D_R32G32_SINT: return DXGI_FORMAT_R32G32_SINT;
259 case SVGA3D_R32G8X24_TYPELESS: return DXGI_FORMAT_R32G8X24_TYPELESS;
260 case SVGA3D_D32_FLOAT_S8X24_UINT: return DXGI_FORMAT_D32_FLOAT_S8X24_UINT;
261 case SVGA3D_R32_FLOAT_X8X24: return DXGI_FORMAT_R32_FLOAT_X8X24_TYPELESS;
262 case SVGA3D_X32_G8X24_UINT: return DXGI_FORMAT_X32_TYPELESS_G8X24_UINT;
263 case SVGA3D_R10G10B10A2_TYPELESS: return DXGI_FORMAT_R10G10B10A2_TYPELESS;
264 case SVGA3D_R10G10B10A2_UINT: return DXGI_FORMAT_R10G10B10A2_UINT;
265 case SVGA3D_R11G11B10_FLOAT: return DXGI_FORMAT_R11G11B10_FLOAT;
266 case SVGA3D_R8G8B8A8_TYPELESS: return DXGI_FORMAT_R8G8B8A8_TYPELESS;
267 case SVGA3D_R8G8B8A8_UNORM: return DXGI_FORMAT_R8G8B8A8_UNORM;
268 case SVGA3D_R8G8B8A8_UNORM_SRGB: return DXGI_FORMAT_R8G8B8A8_UNORM_SRGB;
269 case SVGA3D_R8G8B8A8_UINT: return DXGI_FORMAT_R8G8B8A8_UINT;
270 case SVGA3D_R8G8B8A8_SINT: return DXGI_FORMAT_R8G8B8A8_SINT;
271 case SVGA3D_R16G16_TYPELESS: return DXGI_FORMAT_R16G16_TYPELESS;
272 case SVGA3D_R16G16_UINT: return DXGI_FORMAT_R16G16_UINT;
273 case SVGA3D_R16G16_SINT: return DXGI_FORMAT_R16G16_SINT;
274 case SVGA3D_R32_TYPELESS: return DXGI_FORMAT_R32_TYPELESS;
275 case SVGA3D_D32_FLOAT: return DXGI_FORMAT_D32_FLOAT;
276 case SVGA3D_R32_UINT: return DXGI_FORMAT_R32_UINT;
277 case SVGA3D_R32_SINT: return DXGI_FORMAT_R32_SINT;
278 case SVGA3D_R24G8_TYPELESS: return DXGI_FORMAT_R24G8_TYPELESS;
279 case SVGA3D_D24_UNORM_S8_UINT: return DXGI_FORMAT_D24_UNORM_S8_UINT;
280 case SVGA3D_R24_UNORM_X8: return DXGI_FORMAT_R24_UNORM_X8_TYPELESS;
281 case SVGA3D_X24_G8_UINT: return DXGI_FORMAT_X24_TYPELESS_G8_UINT;
282 case SVGA3D_R8G8_TYPELESS: return DXGI_FORMAT_R8G8_TYPELESS;
283 case SVGA3D_R8G8_UNORM: return DXGI_FORMAT_R8G8_UNORM;
284 case SVGA3D_R8G8_UINT: return DXGI_FORMAT_R8G8_UINT;
285 case SVGA3D_R8G8_SINT: return DXGI_FORMAT_R8G8_SINT;
286 case SVGA3D_R16_TYPELESS: return DXGI_FORMAT_R16_TYPELESS;
287 case SVGA3D_R16_UNORM: return DXGI_FORMAT_R16_UNORM;
288 case SVGA3D_R16_UINT: return DXGI_FORMAT_R16_UINT;
289 case SVGA3D_R16_SNORM: return DXGI_FORMAT_R16_SNORM;
290 case SVGA3D_R16_SINT: return DXGI_FORMAT_R16_SINT;
291 case SVGA3D_R8_TYPELESS: return DXGI_FORMAT_R8_TYPELESS;
292 case SVGA3D_R8_UNORM: return DXGI_FORMAT_R8_UNORM;
293 case SVGA3D_R8_UINT: return DXGI_FORMAT_R8_UINT;
294 case SVGA3D_R8_SNORM: return DXGI_FORMAT_R8_SNORM;
295 case SVGA3D_R8_SINT: return DXGI_FORMAT_R8_SINT;
296 case SVGA3D_P8: break;
297 case SVGA3D_R9G9B9E5_SHAREDEXP: return DXGI_FORMAT_R9G9B9E5_SHAREDEXP;
298 case SVGA3D_R8G8_B8G8_UNORM: return DXGI_FORMAT_R8G8_B8G8_UNORM;
299 case SVGA3D_G8R8_G8B8_UNORM: return DXGI_FORMAT_G8R8_G8B8_UNORM;
300 case SVGA3D_BC1_TYPELESS: return DXGI_FORMAT_BC1_TYPELESS;
301 case SVGA3D_BC1_UNORM_SRGB: return DXGI_FORMAT_BC1_UNORM_SRGB;
302 case SVGA3D_BC2_TYPELESS: return DXGI_FORMAT_BC2_TYPELESS;
303 case SVGA3D_BC2_UNORM_SRGB: return DXGI_FORMAT_BC2_UNORM_SRGB;
304 case SVGA3D_BC3_TYPELESS: return DXGI_FORMAT_BC3_TYPELESS;
305 case SVGA3D_BC3_UNORM_SRGB: return DXGI_FORMAT_BC3_UNORM_SRGB;
306 case SVGA3D_BC4_TYPELESS: return DXGI_FORMAT_BC4_TYPELESS;
307 case SVGA3D_ATI1: break;
308 case SVGA3D_BC4_SNORM: return DXGI_FORMAT_BC4_SNORM;
309 case SVGA3D_BC5_TYPELESS: return DXGI_FORMAT_BC5_TYPELESS;
310 case SVGA3D_ATI2: break;
311 case SVGA3D_BC5_SNORM: return DXGI_FORMAT_BC5_SNORM;
312 case SVGA3D_R10G10B10_XR_BIAS_A2_UNORM: return DXGI_FORMAT_R10G10B10_XR_BIAS_A2_UNORM;
313 case SVGA3D_B8G8R8A8_TYPELESS: return DXGI_FORMAT_B8G8R8A8_TYPELESS;
314 case SVGA3D_B8G8R8A8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8A8_UNORM_SRGB;
315 case SVGA3D_B8G8R8X8_TYPELESS: return DXGI_FORMAT_B8G8R8X8_TYPELESS;
316 case SVGA3D_B8G8R8X8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8X8_UNORM_SRGB;
317 case SVGA3D_Z_DF16: break;
318 case SVGA3D_Z_DF24: break;
319 case SVGA3D_Z_D24S8_INT: return DXGI_FORMAT_D24_UNORM_S8_UINT;
320 case SVGA3D_YV12: break;
321 case SVGA3D_R32G32B32A32_FLOAT: return DXGI_FORMAT_R32G32B32A32_FLOAT;
322 case SVGA3D_R16G16B16A16_FLOAT: return DXGI_FORMAT_R16G16B16A16_FLOAT;
323 case SVGA3D_R16G16B16A16_UNORM: return DXGI_FORMAT_R16G16B16A16_UNORM;
324 case SVGA3D_R32G32_FLOAT: return DXGI_FORMAT_R32G32_FLOAT;
325 case SVGA3D_R10G10B10A2_UNORM: return DXGI_FORMAT_R10G10B10A2_UNORM;
326 case SVGA3D_R8G8B8A8_SNORM: return DXGI_FORMAT_R8G8B8A8_SNORM;
327 case SVGA3D_R16G16_FLOAT: return DXGI_FORMAT_R16G16_FLOAT;
328 case SVGA3D_R16G16_UNORM: return DXGI_FORMAT_R16G16_UNORM;
329 case SVGA3D_R16G16_SNORM: return DXGI_FORMAT_R16G16_SNORM;
330 case SVGA3D_R32_FLOAT: return DXGI_FORMAT_R32_FLOAT;
331 case SVGA3D_R8G8_SNORM: return DXGI_FORMAT_R8G8_SNORM;
332 case SVGA3D_R16_FLOAT: return DXGI_FORMAT_R16_FLOAT;
333 case SVGA3D_D16_UNORM: return DXGI_FORMAT_D16_UNORM;
334 case SVGA3D_A8_UNORM: return DXGI_FORMAT_A8_UNORM;
335 case SVGA3D_BC1_UNORM: return DXGI_FORMAT_BC1_UNORM;
336 case SVGA3D_BC2_UNORM: return DXGI_FORMAT_BC2_UNORM;
337 case SVGA3D_BC3_UNORM: return DXGI_FORMAT_BC3_UNORM;
338 case SVGA3D_B5G6R5_UNORM: return DXGI_FORMAT_B5G6R5_UNORM;
339 case SVGA3D_B5G5R5A1_UNORM: return DXGI_FORMAT_B5G5R5A1_UNORM;
340 case SVGA3D_B8G8R8A8_UNORM: return DXGI_FORMAT_B8G8R8A8_UNORM;
341 case SVGA3D_B8G8R8X8_UNORM: return DXGI_FORMAT_B8G8R8X8_UNORM;
342 case SVGA3D_BC4_UNORM: return DXGI_FORMAT_BC4_UNORM;
343 case SVGA3D_BC5_UNORM: return DXGI_FORMAT_BC5_UNORM;
344
345 case SVGA3D_B4G4R4A4_UNORM: return DXGI_FORMAT_;
346 case SVGA3D_BC6H_TYPELESS: return DXGI_FORMAT_;
347 case SVGA3D_BC6H_UF16: return DXGI_FORMAT_;
348 case SVGA3D_BC6H_SF16: return DXGI_FORMAT_;
349 case SVGA3D_BC7_TYPELESS: return DXGI_FORMAT_;
350 case SVGA3D_BC7_UNORM: return DXGI_FORMAT_;
351 case SVGA3D_BC7_UNORM_SRGB: return DXGI_FORMAT_;
352 case SVGA3D_AYUV: return DXGI_FORMAT_;
353
354 case SVGA3D_FORMAT_INVALID:
355 case SVGA3D_FORMAT_MAX: break;
356 }
357 // AssertFailed();
358 return DXGI_FORMAT_UNKNOWN;
359#undef DXGI_FORMAT_
360}
361
362
363static SVGA3dSurfaceFormat vmsvgaDXDevCapSurfaceFmt2Format(SVGA3dDevCapIndex enmDevCap)
364{
365 switch (enmDevCap)
366 {
367 case SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8: return SVGA3D_X8R8G8B8;
368 case SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8: return SVGA3D_A8R8G8B8;
369 case SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10: return SVGA3D_A2R10G10B10;
370 case SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5: return SVGA3D_X1R5G5B5;
371 case SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5: return SVGA3D_A1R5G5B5;
372 case SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4: return SVGA3D_A4R4G4B4;
373 case SVGA3D_DEVCAP_SURFACEFMT_R5G6B5: return SVGA3D_R5G6B5;
374 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16: return SVGA3D_LUMINANCE16;
375 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8: return SVGA3D_LUMINANCE8_ALPHA8;
376 case SVGA3D_DEVCAP_SURFACEFMT_ALPHA8: return SVGA3D_ALPHA8;
377 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8: return SVGA3D_LUMINANCE8;
378 case SVGA3D_DEVCAP_SURFACEFMT_Z_D16: return SVGA3D_Z_D16;
379 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8: return SVGA3D_Z_D24S8;
380 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8: return SVGA3D_Z_D24X8;
381 case SVGA3D_DEVCAP_SURFACEFMT_DXT1: return SVGA3D_DXT1;
382 case SVGA3D_DEVCAP_SURFACEFMT_DXT2: return SVGA3D_DXT2;
383 case SVGA3D_DEVCAP_SURFACEFMT_DXT3: return SVGA3D_DXT3;
384 case SVGA3D_DEVCAP_SURFACEFMT_DXT4: return SVGA3D_DXT4;
385 case SVGA3D_DEVCAP_SURFACEFMT_DXT5: return SVGA3D_DXT5;
386 case SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8: return SVGA3D_BUMPX8L8V8U8;
387 case SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10: return SVGA3D_A2W10V10U10;
388 case SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8: return SVGA3D_BUMPU8V8;
389 case SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8: return SVGA3D_Q8W8V8U8;
390 case SVGA3D_DEVCAP_SURFACEFMT_CxV8U8: return SVGA3D_CxV8U8;
391 case SVGA3D_DEVCAP_SURFACEFMT_R_S10E5: return SVGA3D_R_S10E5;
392 case SVGA3D_DEVCAP_SURFACEFMT_R_S23E8: return SVGA3D_R_S23E8;
393 case SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5: return SVGA3D_RG_S10E5;
394 case SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8: return SVGA3D_RG_S23E8;
395 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5: return SVGA3D_ARGB_S10E5;
396 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8: return SVGA3D_ARGB_S23E8;
397 case SVGA3D_DEVCAP_SURFACEFMT_V16U16: return SVGA3D_V16U16;
398 case SVGA3D_DEVCAP_SURFACEFMT_G16R16: return SVGA3D_G16R16;
399 case SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16: return SVGA3D_A16B16G16R16;
400 case SVGA3D_DEVCAP_SURFACEFMT_UYVY: return SVGA3D_UYVY;
401 case SVGA3D_DEVCAP_SURFACEFMT_YUY2: return SVGA3D_YUY2;
402 case SVGA3D_DEVCAP_SURFACEFMT_NV12: return SVGA3D_NV12;
403 case SVGA3D_DEVCAP_DEAD10: return SVGA3D_FORMAT_DEAD2; /* SVGA3D_DEVCAP_SURFACEFMT_AYUV -> SVGA3D_AYUV */
404 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF16: return SVGA3D_Z_DF16;
405 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF24: return SVGA3D_Z_DF24;
406 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT: return SVGA3D_Z_D24S8_INT;
407 case SVGA3D_DEVCAP_SURFACEFMT_ATI1: return SVGA3D_ATI1;
408 case SVGA3D_DEVCAP_SURFACEFMT_ATI2: return SVGA3D_ATI2;
409 case SVGA3D_DEVCAP_SURFACEFMT_YV12: return SVGA3D_YV12;
410 default:
411 AssertFailed();
412 break;
413 }
414 return SVGA3D_FORMAT_INVALID;
415}
416
417
418static SVGA3dSurfaceFormat vmsvgaDXDevCapDxfmt2Format(SVGA3dDevCapIndex enmDevCap)
419{
420 switch (enmDevCap)
421 {
422 case SVGA3D_DEVCAP_DXFMT_X8R8G8B8: return SVGA3D_X8R8G8B8;
423 case SVGA3D_DEVCAP_DXFMT_A8R8G8B8: return SVGA3D_A8R8G8B8;
424 case SVGA3D_DEVCAP_DXFMT_R5G6B5: return SVGA3D_R5G6B5;
425 case SVGA3D_DEVCAP_DXFMT_X1R5G5B5: return SVGA3D_X1R5G5B5;
426 case SVGA3D_DEVCAP_DXFMT_A1R5G5B5: return SVGA3D_A1R5G5B5;
427 case SVGA3D_DEVCAP_DXFMT_A4R4G4B4: return SVGA3D_A4R4G4B4;
428 case SVGA3D_DEVCAP_DXFMT_Z_D32: return SVGA3D_Z_D32;
429 case SVGA3D_DEVCAP_DXFMT_Z_D16: return SVGA3D_Z_D16;
430 case SVGA3D_DEVCAP_DXFMT_Z_D24S8: return SVGA3D_Z_D24S8;
431 case SVGA3D_DEVCAP_DXFMT_Z_D15S1: return SVGA3D_Z_D15S1;
432 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8: return SVGA3D_LUMINANCE8;
433 case SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4: return SVGA3D_LUMINANCE4_ALPHA4;
434 case SVGA3D_DEVCAP_DXFMT_LUMINANCE16: return SVGA3D_LUMINANCE16;
435 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8: return SVGA3D_LUMINANCE8_ALPHA8;
436 case SVGA3D_DEVCAP_DXFMT_DXT1: return SVGA3D_DXT1;
437 case SVGA3D_DEVCAP_DXFMT_DXT2: return SVGA3D_DXT2;
438 case SVGA3D_DEVCAP_DXFMT_DXT3: return SVGA3D_DXT3;
439 case SVGA3D_DEVCAP_DXFMT_DXT4: return SVGA3D_DXT4;
440 case SVGA3D_DEVCAP_DXFMT_DXT5: return SVGA3D_DXT5;
441 case SVGA3D_DEVCAP_DXFMT_BUMPU8V8: return SVGA3D_BUMPU8V8;
442 case SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5: return SVGA3D_BUMPL6V5U5;
443 case SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8: return SVGA3D_BUMPX8L8V8U8;
444 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1: return SVGA3D_FORMAT_DEAD1;
445 case SVGA3D_DEVCAP_DXFMT_ARGB_S10E5: return SVGA3D_ARGB_S10E5;
446 case SVGA3D_DEVCAP_DXFMT_ARGB_S23E8: return SVGA3D_ARGB_S23E8;
447 case SVGA3D_DEVCAP_DXFMT_A2R10G10B10: return SVGA3D_A2R10G10B10;
448 case SVGA3D_DEVCAP_DXFMT_V8U8: return SVGA3D_V8U8;
449 case SVGA3D_DEVCAP_DXFMT_Q8W8V8U8: return SVGA3D_Q8W8V8U8;
450 case SVGA3D_DEVCAP_DXFMT_CxV8U8: return SVGA3D_CxV8U8;
451 case SVGA3D_DEVCAP_DXFMT_X8L8V8U8: return SVGA3D_X8L8V8U8;
452 case SVGA3D_DEVCAP_DXFMT_A2W10V10U10: return SVGA3D_A2W10V10U10;
453 case SVGA3D_DEVCAP_DXFMT_ALPHA8: return SVGA3D_ALPHA8;
454 case SVGA3D_DEVCAP_DXFMT_R_S10E5: return SVGA3D_R_S10E5;
455 case SVGA3D_DEVCAP_DXFMT_R_S23E8: return SVGA3D_R_S23E8;
456 case SVGA3D_DEVCAP_DXFMT_RG_S10E5: return SVGA3D_RG_S10E5;
457 case SVGA3D_DEVCAP_DXFMT_RG_S23E8: return SVGA3D_RG_S23E8;
458 case SVGA3D_DEVCAP_DXFMT_BUFFER: return SVGA3D_BUFFER;
459 case SVGA3D_DEVCAP_DXFMT_Z_D24X8: return SVGA3D_Z_D24X8;
460 case SVGA3D_DEVCAP_DXFMT_V16U16: return SVGA3D_V16U16;
461 case SVGA3D_DEVCAP_DXFMT_G16R16: return SVGA3D_G16R16;
462 case SVGA3D_DEVCAP_DXFMT_A16B16G16R16: return SVGA3D_A16B16G16R16;
463 case SVGA3D_DEVCAP_DXFMT_UYVY: return SVGA3D_UYVY;
464 case SVGA3D_DEVCAP_DXFMT_YUY2: return SVGA3D_YUY2;
465 case SVGA3D_DEVCAP_DXFMT_NV12: return SVGA3D_NV12;
466 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD2: return SVGA3D_FORMAT_DEAD2; /* SVGA3D_DEVCAP_DXFMT_AYUV -> SVGA3D_AYUV */
467 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS: return SVGA3D_R32G32B32A32_TYPELESS;
468 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT: return SVGA3D_R32G32B32A32_UINT;
469 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT: return SVGA3D_R32G32B32A32_SINT;
470 case SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS: return SVGA3D_R32G32B32_TYPELESS;
471 case SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT: return SVGA3D_R32G32B32_FLOAT;
472 case SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT: return SVGA3D_R32G32B32_UINT;
473 case SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT: return SVGA3D_R32G32B32_SINT;
474 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS: return SVGA3D_R16G16B16A16_TYPELESS;
475 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT: return SVGA3D_R16G16B16A16_UINT;
476 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM: return SVGA3D_R16G16B16A16_SNORM;
477 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT: return SVGA3D_R16G16B16A16_SINT;
478 case SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS: return SVGA3D_R32G32_TYPELESS;
479 case SVGA3D_DEVCAP_DXFMT_R32G32_UINT: return SVGA3D_R32G32_UINT;
480 case SVGA3D_DEVCAP_DXFMT_R32G32_SINT: return SVGA3D_R32G32_SINT;
481 case SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS: return SVGA3D_R32G8X24_TYPELESS;
482 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT: return SVGA3D_D32_FLOAT_S8X24_UINT;
483 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24: return SVGA3D_R32_FLOAT_X8X24;
484 case SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT: return SVGA3D_X32_G8X24_UINT;
485 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS: return SVGA3D_R10G10B10A2_TYPELESS;
486 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT: return SVGA3D_R10G10B10A2_UINT;
487 case SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT: return SVGA3D_R11G11B10_FLOAT;
488 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS: return SVGA3D_R8G8B8A8_TYPELESS;
489 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM: return SVGA3D_R8G8B8A8_UNORM;
490 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB: return SVGA3D_R8G8B8A8_UNORM_SRGB;
491 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT: return SVGA3D_R8G8B8A8_UINT;
492 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT: return SVGA3D_R8G8B8A8_SINT;
493 case SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS: return SVGA3D_R16G16_TYPELESS;
494 case SVGA3D_DEVCAP_DXFMT_R16G16_UINT: return SVGA3D_R16G16_UINT;
495 case SVGA3D_DEVCAP_DXFMT_R16G16_SINT: return SVGA3D_R16G16_SINT;
496 case SVGA3D_DEVCAP_DXFMT_R32_TYPELESS: return SVGA3D_R32_TYPELESS;
497 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT: return SVGA3D_D32_FLOAT;
498 case SVGA3D_DEVCAP_DXFMT_R32_UINT: return SVGA3D_R32_UINT;
499 case SVGA3D_DEVCAP_DXFMT_R32_SINT: return SVGA3D_R32_SINT;
500 case SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS: return SVGA3D_R24G8_TYPELESS;
501 case SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT: return SVGA3D_D24_UNORM_S8_UINT;
502 case SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8: return SVGA3D_R24_UNORM_X8;
503 case SVGA3D_DEVCAP_DXFMT_X24_G8_UINT: return SVGA3D_X24_G8_UINT;
504 case SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS: return SVGA3D_R8G8_TYPELESS;
505 case SVGA3D_DEVCAP_DXFMT_R8G8_UNORM: return SVGA3D_R8G8_UNORM;
506 case SVGA3D_DEVCAP_DXFMT_R8G8_UINT: return SVGA3D_R8G8_UINT;
507 case SVGA3D_DEVCAP_DXFMT_R8G8_SINT: return SVGA3D_R8G8_SINT;
508 case SVGA3D_DEVCAP_DXFMT_R16_TYPELESS: return SVGA3D_R16_TYPELESS;
509 case SVGA3D_DEVCAP_DXFMT_R16_UNORM: return SVGA3D_R16_UNORM;
510 case SVGA3D_DEVCAP_DXFMT_R16_UINT: return SVGA3D_R16_UINT;
511 case SVGA3D_DEVCAP_DXFMT_R16_SNORM: return SVGA3D_R16_SNORM;
512 case SVGA3D_DEVCAP_DXFMT_R16_SINT: return SVGA3D_R16_SINT;
513 case SVGA3D_DEVCAP_DXFMT_R8_TYPELESS: return SVGA3D_R8_TYPELESS;
514 case SVGA3D_DEVCAP_DXFMT_R8_UNORM: return SVGA3D_R8_UNORM;
515 case SVGA3D_DEVCAP_DXFMT_R8_UINT: return SVGA3D_R8_UINT;
516 case SVGA3D_DEVCAP_DXFMT_R8_SNORM: return SVGA3D_R8_SNORM;
517 case SVGA3D_DEVCAP_DXFMT_R8_SINT: return SVGA3D_R8_SINT;
518 case SVGA3D_DEVCAP_DXFMT_P8: return SVGA3D_P8;
519 case SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP: return SVGA3D_R9G9B9E5_SHAREDEXP;
520 case SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM: return SVGA3D_R8G8_B8G8_UNORM;
521 case SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM: return SVGA3D_G8R8_G8B8_UNORM;
522 case SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS: return SVGA3D_BC1_TYPELESS;
523 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB: return SVGA3D_BC1_UNORM_SRGB;
524 case SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS: return SVGA3D_BC2_TYPELESS;
525 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB: return SVGA3D_BC2_UNORM_SRGB;
526 case SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS: return SVGA3D_BC3_TYPELESS;
527 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB: return SVGA3D_BC3_UNORM_SRGB;
528 case SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS: return SVGA3D_BC4_TYPELESS;
529 case SVGA3D_DEVCAP_DXFMT_ATI1: return SVGA3D_ATI1;
530 case SVGA3D_DEVCAP_DXFMT_BC4_SNORM: return SVGA3D_BC4_SNORM;
531 case SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS: return SVGA3D_BC5_TYPELESS;
532 case SVGA3D_DEVCAP_DXFMT_ATI2: return SVGA3D_ATI2;
533 case SVGA3D_DEVCAP_DXFMT_BC5_SNORM: return SVGA3D_BC5_SNORM;
534 case SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM: return SVGA3D_R10G10B10_XR_BIAS_A2_UNORM;
535 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS: return SVGA3D_B8G8R8A8_TYPELESS;
536 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB: return SVGA3D_B8G8R8A8_UNORM_SRGB;
537 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS: return SVGA3D_B8G8R8X8_TYPELESS;
538 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB: return SVGA3D_B8G8R8X8_UNORM_SRGB;
539 case SVGA3D_DEVCAP_DXFMT_Z_DF16: return SVGA3D_Z_DF16;
540 case SVGA3D_DEVCAP_DXFMT_Z_DF24: return SVGA3D_Z_DF24;
541 case SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT: return SVGA3D_Z_D24S8_INT;
542 case SVGA3D_DEVCAP_DXFMT_YV12: return SVGA3D_YV12;
543 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT: return SVGA3D_R32G32B32A32_FLOAT;
544 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT: return SVGA3D_R16G16B16A16_FLOAT;
545 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM: return SVGA3D_R16G16B16A16_UNORM;
546 case SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT: return SVGA3D_R32G32_FLOAT;
547 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM: return SVGA3D_R10G10B10A2_UNORM;
548 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM: return SVGA3D_R8G8B8A8_SNORM;
549 case SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT: return SVGA3D_R16G16_FLOAT;
550 case SVGA3D_DEVCAP_DXFMT_R16G16_UNORM: return SVGA3D_R16G16_UNORM;
551 case SVGA3D_DEVCAP_DXFMT_R16G16_SNORM: return SVGA3D_R16G16_SNORM;
552 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT: return SVGA3D_R32_FLOAT;
553 case SVGA3D_DEVCAP_DXFMT_R8G8_SNORM: return SVGA3D_R8G8_SNORM;
554 case SVGA3D_DEVCAP_DXFMT_R16_FLOAT: return SVGA3D_R16_FLOAT;
555 case SVGA3D_DEVCAP_DXFMT_D16_UNORM: return SVGA3D_D16_UNORM;
556 case SVGA3D_DEVCAP_DXFMT_A8_UNORM: return SVGA3D_A8_UNORM;
557 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM: return SVGA3D_BC1_UNORM;
558 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM: return SVGA3D_BC2_UNORM;
559 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM: return SVGA3D_BC3_UNORM;
560 case SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM: return SVGA3D_B5G6R5_UNORM;
561 case SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM: return SVGA3D_B5G5R5A1_UNORM;
562 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM: return SVGA3D_B8G8R8A8_UNORM;
563 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM: return SVGA3D_B8G8R8X8_UNORM;
564 case SVGA3D_DEVCAP_DXFMT_BC4_UNORM: return SVGA3D_BC4_UNORM;
565 case SVGA3D_DEVCAP_DXFMT_BC5_UNORM: return SVGA3D_BC5_UNORM;
566 case SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS: return SVGA3D_BC6H_TYPELESS;
567 case SVGA3D_DEVCAP_DXFMT_BC6H_UF16: return SVGA3D_BC6H_UF16;
568 case SVGA3D_DEVCAP_DXFMT_BC6H_SF16: return SVGA3D_BC6H_SF16;
569 case SVGA3D_DEVCAP_DXFMT_BC7_TYPELESS: return SVGA3D_BC7_TYPELESS;
570 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM: return SVGA3D_BC7_UNORM;
571 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM_SRGB: return SVGA3D_BC7_UNORM_SRGB;
572 default:
573 AssertFailed();
574 break;
575 }
576 return SVGA3D_FORMAT_INVALID;
577}
578
579
580static int vmsvgaDXCheckFormatSupportPreDX(PVMSVGA3DSTATE pState, SVGA3dSurfaceFormat enmFormat, uint32_t *pu32DevCap)
581{
582 int rc = VINF_SUCCESS;
583
584 *pu32DevCap = 0;
585
586 DXGI_FORMAT const dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(enmFormat);
587 if (dxgiFormat != DXGI_FORMAT_UNKNOWN)
588 {
589 RT_NOREF(pState);
590 /** @todo Implement */
591 }
592 else
593 rc = VERR_NOT_SUPPORTED;
594 return rc;
595}
596
597static int vmsvgaDXCheckFormatSupport(PVMSVGA3DSTATE pState, SVGA3dSurfaceFormat enmFormat, uint32_t *pu32DevCap)
598{
599 int rc = VINF_SUCCESS;
600
601 *pu32DevCap = 0;
602
603 DXGI_FORMAT const dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(enmFormat);
604 if (dxgiFormat != DXGI_FORMAT_UNKNOWN)
605 {
606 ID3D11Device *pDevice = pState->pBackend->device.pDevice;
607 UINT FormatSupport = 0;
608 HRESULT hr = pDevice->CheckFormatSupport(dxgiFormat, &FormatSupport);
609 if (SUCCEEDED(hr))
610 {
611 *pu32DevCap |= SVGA3D_DXFMT_SUPPORTED;
612
613 if (FormatSupport & D3D11_FORMAT_SUPPORT_SHADER_SAMPLE)
614 *pu32DevCap |= SVGA3D_DXFMT_SHADER_SAMPLE;
615
616 if (FormatSupport & D3D11_FORMAT_SUPPORT_RENDER_TARGET)
617 *pu32DevCap |= SVGA3D_DXFMT_COLOR_RENDERTARGET;
618
619 if (FormatSupport & D3D11_FORMAT_SUPPORT_DEPTH_STENCIL)
620 *pu32DevCap |= SVGA3D_DXFMT_DEPTH_RENDERTARGET;
621
622 if (FormatSupport & D3D11_FORMAT_SUPPORT_BLENDABLE)
623 *pu32DevCap |= SVGA3D_DXFMT_BLENDABLE;
624
625 if (FormatSupport & D3D11_FORMAT_SUPPORT_MIP)
626 *pu32DevCap |= SVGA3D_DXFMT_MIPS;
627
628 if (FormatSupport & D3D11_FORMAT_SUPPORT_TEXTURECUBE)
629 *pu32DevCap |= SVGA3D_DXFMT_ARRAY;
630
631 if (FormatSupport & D3D11_FORMAT_SUPPORT_TEXTURE3D)
632 *pu32DevCap |= SVGA3D_DXFMT_VOLUME;
633
634 if (FormatSupport & D3D11_FORMAT_SUPPORT_IA_VERTEX_BUFFER)
635 *pu32DevCap |= SVGA3D_DXFMT_DX_VERTEX_BUFFER;
636
637 UINT NumQualityLevels;
638 hr = pDevice->CheckMultisampleQualityLevels(dxgiFormat, 2, &NumQualityLevels);
639 if (SUCCEEDED(hr) && NumQualityLevels != 0)
640 *pu32DevCap |= SVGA3D_DXFMT_MULTISAMPLE;
641 }
642 else
643 AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
644 }
645 else
646 rc = VERR_NOT_SUPPORTED;
647 return rc;
648}
649
650
651static int dxDeviceCreate(PVMSVGA3DBACKEND pBackend, DXDEVICE *pDevice)
652{
653 int rc = VINF_SUCCESS;
654
655 IDXGIAdapter *pAdapter = NULL; /* Default adapter. */
656 static D3D_FEATURE_LEVEL const s_aFeatureLevels[] =
657 {
658 /// @todo Requires a Windows 8+ _SDKS: D3D_FEATURE_LEVEL_11_1,
659 D3D_FEATURE_LEVEL_11_0
660 };
661 UINT Flags = D3D11_CREATE_DEVICE_BGRA_SUPPORT;
662#ifdef DEBUG
663 Flags |= D3D11_CREATE_DEVICE_DEBUG;
664#endif
665
666 HRESULT hr = pBackend->pfnD3D11CreateDevice(pAdapter,
667 D3D_DRIVER_TYPE_HARDWARE,
668 NULL,
669 Flags,
670 s_aFeatureLevels,
671 RT_ELEMENTS(s_aFeatureLevels),
672 D3D11_SDK_VERSION,
673 &pDevice->pDevice,
674 &pDevice->FeatureLevel,
675 &pDevice->pImmediateContext);
676 if (SUCCEEDED(hr))
677 {
678 LogRel(("VMSVGA: Feature level %#x\n", pDevice->FeatureLevel));
679
680 IDXGIDevice *pDxgiDevice = 0;
681 hr = pDevice->pDevice->QueryInterface(__uuidof(IDXGIDevice), (void**)&pDxgiDevice);
682 if (SUCCEEDED(hr))
683 {
684 IDXGIAdapter *pDxgiAdapter = 0;
685 hr = pDxgiDevice->GetParent(__uuidof(IDXGIAdapter), (void**)&pDxgiAdapter);
686 if (SUCCEEDED(hr))
687 {
688 hr = pDxgiAdapter->GetParent(__uuidof(IDXGIFactory), (void**)&pDevice->pDxgiFactory);
689 D3D_RELEASE(pDxgiAdapter);
690 }
691
692 D3D_RELEASE(pDxgiDevice);
693 }
694 }
695
696 if (FAILED(hr))
697 rc = VERR_NOT_SUPPORTED;
698
699 return rc;
700}
701
702
703static void dxDeviceDestroy(PVMSVGA3DBACKEND pBackend, DXDEVICE *pDevice)
704{
705 RT_NOREF(pBackend);
706 D3D_RELEASE(pDevice->pDevice);
707 D3D_RELEASE(pDevice->pImmediateContext);
708 D3D_RELEASE(pDevice->pDxgiFactory);
709 RT_ZERO(*pDevice);
710}
711
712
713static ID3D11Resource *dxResource(PVMSVGA3DSURFACE pSurface, VMSVGA3DDXCONTEXT *pDXContext)
714{
715 VMSVGA3DBACKENDSURFACE *pBackendSurface = pSurface->pBackendSurface;
716 if (!pBackendSurface)
717 AssertFailedReturn(NULL);
718
719 if (pDXContext->cid == pSurface->idAssociatedContext)
720 return pBackendSurface->u.Resource.pResource;
721
722 /*
723 * Another context is requesting.
724 */
725 /* Expecting this for screen targets only. */
726 Assert(pSurface->surfaceFlags & SVGA3D_SURFACE_SCREENTARGET);
727 Assert(pSurface->idAssociatedContext == SVGA_ID_INVALID);
728
729 DXSHAREDTEXTURE *pSharedTexture = (DXSHAREDTEXTURE *)RTAvlU32Get(&pBackendSurface->SharedTextureTree, pDXContext->cid);
730 if (!pSharedTexture)
731 {
732 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
733 AssertReturn(pDevice->pDevice, NULL);
734
735 AssertReturn(pBackendSurface->u.ScreenTarget.SharedHandle, NULL);
736
737 /* This context has not yet opened the texture. */
738 pSharedTexture = (DXSHAREDTEXTURE *)RTMemAllocZ(sizeof(DXSHAREDTEXTURE));
739 AssertReturn(pSharedTexture, NULL);
740
741 pSharedTexture->Core.Key = pDXContext->cid;
742 bool const fSuccess = RTAvlU32Insert(&pBackendSurface->SharedTextureTree, &pSharedTexture->Core);
743 AssertReturn(fSuccess, NULL);
744
745 HRESULT hr = pDevice->pDevice->OpenSharedResource(pBackendSurface->u.ScreenTarget.SharedHandle, __uuidof(ID3D11Texture2D), (void**)&pSharedTexture->pTexture);
746 Assert(SUCCEEDED(hr));
747 if (SUCCEEDED(hr))
748 pSharedTexture->sid = pSurface->id;
749 else
750 {
751 RTAvlU32Remove(&pBackendSurface->SharedTextureTree, pDXContext->cid);
752 RTMemFree(pSharedTexture);
753 return NULL;
754 }
755 }
756
757 return pSharedTexture->pTexture;
758}
759
760
761/** @todo AssertCompile for types like D3D11_COMPARISON_FUNC and SVGA3dComparisonFunc */
762static HRESULT dxBlendStateCreate(DXDEVICE *pDevice, SVGACOTableDXBlendStateEntry const *pEntry, ID3D11BlendState **pp)
763{
764 D3D11_BLEND_DESC BlendDesc;
765 BlendDesc.AlphaToCoverageEnable = RT_BOOL(pEntry->alphaToCoverageEnable);
766 BlendDesc.IndependentBlendEnable = RT_BOOL(pEntry->independentBlendEnable);
767 for (int i = 0; i < SVGA3D_MAX_RENDER_TARGETS; ++i)
768 {
769 BlendDesc.RenderTarget[i].BlendEnable = RT_BOOL(pEntry->perRT[i].blendEnable);
770 BlendDesc.RenderTarget[i].SrcBlend = (D3D11_BLEND)pEntry->perRT[i].srcBlend;
771 BlendDesc.RenderTarget[i].DestBlend = (D3D11_BLEND)pEntry->perRT[i].destBlend;
772 BlendDesc.RenderTarget[i].BlendOp = (D3D11_BLEND_OP)pEntry->perRT[i].blendOp;
773 BlendDesc.RenderTarget[i].SrcBlendAlpha = (D3D11_BLEND)pEntry->perRT[i].srcBlendAlpha;
774 BlendDesc.RenderTarget[i].DestBlendAlpha = (D3D11_BLEND)pEntry->perRT[i].destBlendAlpha;
775 BlendDesc.RenderTarget[i].BlendOpAlpha = (D3D11_BLEND_OP)pEntry->perRT[i].blendOpAlpha;
776 BlendDesc.RenderTarget[i].RenderTargetWriteMask = pEntry->perRT[i].renderTargetWriteMask;
777 /** @todo logicOpEnable and logicOp */
778 }
779
780 HRESULT hr = pDevice->pDevice->CreateBlendState(&BlendDesc, pp);
781 Assert(SUCCEEDED(hr));
782 return hr;
783}
784
785
786static HRESULT dxDepthStencilStateCreate(DXDEVICE *pDevice, SVGACOTableDXDepthStencilEntry const *pEntry, ID3D11DepthStencilState **pp)
787{
788 D3D11_DEPTH_STENCIL_DESC desc;
789 desc.DepthEnable = pEntry->depthEnable;
790 desc.DepthWriteMask = (D3D11_DEPTH_WRITE_MASK)pEntry->depthWriteMask;
791 desc.DepthFunc = (D3D11_COMPARISON_FUNC)pEntry->depthFunc;
792 desc.StencilEnable = pEntry->stencilEnable;
793 desc.StencilReadMask = pEntry->stencilReadMask;
794 desc.StencilWriteMask = pEntry->stencilWriteMask;
795 desc.FrontFace.StencilFailOp = (D3D11_STENCIL_OP)pEntry->frontStencilFailOp;
796 desc.FrontFace.StencilDepthFailOp = (D3D11_STENCIL_OP)pEntry->frontStencilDepthFailOp;
797 desc.FrontFace.StencilPassOp = (D3D11_STENCIL_OP)pEntry->frontStencilPassOp;
798 desc.FrontFace.StencilFunc = (D3D11_COMPARISON_FUNC)pEntry->frontStencilFunc;
799 desc.BackFace.StencilFailOp = (D3D11_STENCIL_OP)pEntry->backStencilFailOp;
800 desc.BackFace.StencilDepthFailOp = (D3D11_STENCIL_OP)pEntry->backStencilDepthFailOp;
801 desc.BackFace.StencilPassOp = (D3D11_STENCIL_OP)pEntry->backStencilPassOp;
802 desc.BackFace.StencilFunc = (D3D11_COMPARISON_FUNC)pEntry->backStencilFunc;
803 /** @todo frontEnable, backEnable */
804
805 HRESULT hr = pDevice->pDevice->CreateDepthStencilState(&desc, pp);
806 Assert(SUCCEEDED(hr));
807 return hr;
808}
809
810
811static HRESULT dxSamplerStateCreate(DXDEVICE *pDevice, SVGACOTableDXSamplerEntry const *pEntry, ID3D11SamplerState **pp)
812{
813 D3D11_SAMPLER_DESC desc;
814 desc.Filter = (D3D11_FILTER)pEntry->filter;
815 desc.AddressU = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressU;
816 desc.AddressV = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressV;
817 desc.AddressW = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressW;
818 desc.MipLODBias = pEntry->mipLODBias;
819 desc.MaxAnisotropy = RT_CLAMP(pEntry->maxAnisotropy, 1, 16); /* "Valid values are between 1 and 16" */
820 desc.ComparisonFunc = (D3D11_COMPARISON_FUNC)pEntry->comparisonFunc;
821 desc.BorderColor[0] = pEntry->borderColor.value[0];
822 desc.BorderColor[1] = pEntry->borderColor.value[1];
823 desc.BorderColor[2] = pEntry->borderColor.value[2];
824 desc.BorderColor[3] = pEntry->borderColor.value[3];
825 desc.MinLOD = pEntry->minLOD;
826 desc.MaxLOD = pEntry->maxLOD;
827
828 HRESULT hr = pDevice->pDevice->CreateSamplerState(&desc, pp);
829 Assert(SUCCEEDED(hr));
830 return hr;
831}
832
833
834static HRESULT dxRasterizerStateCreate(DXDEVICE *pDevice, SVGACOTableDXRasterizerStateEntry const *pEntry, ID3D11RasterizerState **pp)
835{
836 D3D11_RASTERIZER_DESC desc;
837 desc.FillMode = (D3D11_FILL_MODE)pEntry->fillMode;
838 desc.CullMode = (D3D11_CULL_MODE)pEntry->cullMode;
839 desc.FrontCounterClockwise = pEntry->frontCounterClockwise;
840 /** @todo provokingVertexLast */
841 desc.DepthBias = pEntry->depthBias;
842 desc.DepthBiasClamp = pEntry->depthBiasClamp;
843 desc.SlopeScaledDepthBias = pEntry->slopeScaledDepthBias;
844 desc.DepthClipEnable = pEntry->depthClipEnable;
845 desc.ScissorEnable = pEntry->scissorEnable;
846 desc.MultisampleEnable = pEntry->multisampleEnable;
847 desc.AntialiasedLineEnable = pEntry->antialiasedLineEnable;
848 /** @todo lineWidth lineStippleEnable lineStippleFactor lineStipplePattern forcedSampleCount */
849
850 HRESULT hr = pDevice->pDevice->CreateRasterizerState(&desc, pp);
851 Assert(SUCCEEDED(hr));
852 return hr;
853}
854
855
856static HRESULT dxRenderTargetViewCreate(PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableDXRTViewEntry const *pEntry, VMSVGA3DSURFACE *pSurface, ID3D11RenderTargetView **pp)
857{
858 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
859
860 ID3D11Resource *pResource = dxResource(pSurface, pDXContext);
861 //pBackendSurface->u.Texture.pTexture;
862
863 D3D11_RENDER_TARGET_VIEW_DESC desc;
864 RT_ZERO(desc);
865 desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
866 AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN, E_FAIL);
867 switch (pEntry->resourceDimension)
868 {
869 case SVGA3D_RESOURCE_BUFFER:
870 desc.ViewDimension = D3D11_RTV_DIMENSION_BUFFER;
871 desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
872 desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
873 break;
874 case SVGA3D_RESOURCE_TEXTURE1D:
875 if (pEntry->desc.tex.arraySize <= 1)
876 {
877 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE1D;
878 desc.Texture1D.MipSlice = pEntry->desc.tex.mipSlice;
879 }
880 else
881 {
882 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE1DARRAY;
883 desc.Texture1DArray.MipSlice = pEntry->desc.tex.mipSlice;
884 desc.Texture1DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
885 desc.Texture1DArray.ArraySize = pEntry->desc.tex.arraySize;
886 }
887 break;
888 case SVGA3D_RESOURCE_TEXTURE2D:
889 if (pEntry->desc.tex.arraySize <= 1)
890 {
891 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2D;
892 desc.Texture2D.MipSlice = pEntry->desc.tex.mipSlice;
893 }
894 else
895 {
896 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2DARRAY;
897 desc.Texture2DArray.MipSlice = pEntry->desc.tex.mipSlice;
898 desc.Texture2DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
899 desc.Texture2DArray.ArraySize = pEntry->desc.tex.arraySize;
900 }
901 break;
902 case SVGA3D_RESOURCE_TEXTURE3D:
903 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE3D;
904 desc.Texture3D.MipSlice = pEntry->desc.tex3D.mipSlice;
905 desc.Texture3D.FirstWSlice = pEntry->desc.tex3D.firstW;
906 desc.Texture3D.WSize = pEntry->desc.tex3D.wSize;
907 break;
908 case SVGA3D_RESOURCE_TEXTURECUBE:
909 AssertFailed(); /** @todo test. Probably not applicable to a render target view. */
910 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2DARRAY;
911 desc.Texture2DArray.MipSlice = pEntry->desc.tex.mipSlice;
912 desc.Texture2DArray.FirstArraySlice = 0;
913 desc.Texture2DArray.ArraySize = 6;
914 break;
915 case SVGA3D_RESOURCE_BUFFEREX:
916 AssertFailed(); /** @todo test. Probably not applicable to a render target view. */
917 desc.ViewDimension = D3D11_RTV_DIMENSION_BUFFER;
918 desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
919 desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
920 break;
921 default:
922 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
923 }
924
925 HRESULT hr = pDevice->pDevice->CreateRenderTargetView(pResource, &desc, pp);
926 Assert(SUCCEEDED(hr));
927 return hr;
928}
929
930
931static HRESULT dxShaderResourceViewCreate(PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableDXSRViewEntry const *pEntry, VMSVGA3DSURFACE *pSurface, ID3D11ShaderResourceView **pp)
932{
933 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
934
935 ID3D11Resource *pResource = dxResource(pSurface, pDXContext);
936// ID3D11Resource *pResource = pBackendSurface->u.Texture.pTexture;
937
938 D3D11_SHADER_RESOURCE_VIEW_DESC desc;
939 RT_ZERO(desc);
940 desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
941 AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN, E_FAIL);
942
943 switch (pEntry->resourceDimension)
944 {
945 case SVGA3D_RESOURCE_BUFFER:
946 desc.ViewDimension = D3D11_SRV_DIMENSION_BUFFER;
947 desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
948 desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
949 break;
950 case SVGA3D_RESOURCE_TEXTURE1D:
951 if (pEntry->desc.tex.arraySize <= 1)
952 {
953 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE1D;
954 desc.Texture1D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
955 desc.Texture1D.MipLevels = pEntry->desc.tex.mipLevels;
956 }
957 else
958 {
959 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE1DARRAY;
960 desc.Texture1DArray.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
961 desc.Texture1DArray.MipLevels = pEntry->desc.tex.mipLevels;
962 desc.Texture1DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
963 desc.Texture1DArray.ArraySize = pEntry->desc.tex.arraySize;
964 }
965 break;
966 case SVGA3D_RESOURCE_TEXTURE2D:
967 if (pEntry->desc.tex.arraySize <= 1)
968 {
969 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE2D;
970 desc.Texture2D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
971 desc.Texture2D.MipLevels = pEntry->desc.tex.mipLevels;
972 }
973 else
974 {
975 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE2DARRAY;
976 desc.Texture2DArray.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
977 desc.Texture2DArray.MipLevels = pEntry->desc.tex.mipLevels;
978 desc.Texture2DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
979 desc.Texture2DArray.ArraySize = pEntry->desc.tex.arraySize;
980 }
981 break;
982 case SVGA3D_RESOURCE_TEXTURE3D:
983 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE3D;
984 desc.Texture3D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
985 desc.Texture3D.MipLevels = pEntry->desc.tex.mipLevels;
986 break;
987 case SVGA3D_RESOURCE_TEXTURECUBE:
988 AssertFailed(); /** @todo test. */
989 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURECUBE;
990 desc.TextureCube.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
991 desc.TextureCube.MipLevels = pEntry->desc.tex.mipLevels;
992 break;
993 case SVGA3D_RESOURCE_BUFFEREX:
994 AssertFailed(); /** @todo test. */
995 desc.ViewDimension = D3D11_SRV_DIMENSION_BUFFEREX;
996 desc.BufferEx.FirstElement = pEntry->desc.bufferex.firstElement;
997 desc.BufferEx.NumElements = pEntry->desc.bufferex.numElements;
998 desc.BufferEx.Flags = pEntry->desc.bufferex.flags;
999 break;
1000 default:
1001 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
1002 }
1003
1004 HRESULT hr = pDevice->pDevice->CreateShaderResourceView(pResource, &desc, pp);
1005 Assert(SUCCEEDED(hr));
1006 return hr;
1007}
1008
1009
1010static HRESULT dxDepthStencilViewCreate(DXDEVICE *pDevice, SVGACOTableDXDSViewEntry const *pEntry, VMSVGA3DBACKENDSURFACE *pBackendSurface, ID3D11DepthStencilView **pp)
1011{
1012 ID3D11Resource *pResource = pBackendSurface->u.Texture.pTexture;
1013
1014 D3D11_DEPTH_STENCIL_VIEW_DESC desc;
1015 RT_ZERO(desc);
1016 desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
1017 AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN, E_FAIL);
1018 desc.Flags = pEntry->flags;
1019 switch (pEntry->resourceDimension)
1020 {
1021 case SVGA3D_RESOURCE_TEXTURE1D:
1022 if (pEntry->arraySize <= 1)
1023 {
1024 desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE1D;
1025 desc.Texture1D.MipSlice = pEntry->mipSlice;
1026 }
1027 else
1028 {
1029 desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE1DARRAY;
1030 desc.Texture1DArray.MipSlice = pEntry->mipSlice;
1031 desc.Texture1DArray.FirstArraySlice = pEntry->firstArraySlice;
1032 desc.Texture1DArray.ArraySize = pEntry->arraySize;
1033 }
1034 break;
1035 case SVGA3D_RESOURCE_TEXTURE2D:
1036 if (pEntry->arraySize <= 1)
1037 {
1038 desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE2D;
1039 desc.Texture2D.MipSlice = pEntry->mipSlice;
1040 }
1041 else
1042 {
1043 desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE2DARRAY;
1044 desc.Texture2DArray.MipSlice = pEntry->mipSlice;
1045 desc.Texture2DArray.FirstArraySlice = pEntry->firstArraySlice;
1046 desc.Texture2DArray.ArraySize = pEntry->arraySize;
1047 }
1048 break;
1049 default:
1050 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
1051 }
1052
1053 HRESULT hr = pDevice->pDevice->CreateDepthStencilView(pResource, &desc, pp);
1054 Assert(SUCCEEDED(hr));
1055 return hr;
1056}
1057
1058
1059static HRESULT dxShaderCreate(DXDEVICE *pDevice, PVMSVGA3DSHADER pShader, DXSHADER *pDXShader)
1060{
1061 HRESULT hr = S_OK;
1062
1063 switch (pShader->type)
1064 {
1065 case SVGA3D_SHADERTYPE_VS:
1066 hr = pDevice->pDevice->CreateVertexShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pVertexShader);
1067 Assert(SUCCEEDED(hr));
1068 break;
1069 case SVGA3D_SHADERTYPE_PS:
1070 hr = pDevice->pDevice->CreatePixelShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pPixelShader);
1071 Assert(SUCCEEDED(hr));
1072 break;
1073 case SVGA3D_SHADERTYPE_GS:
1074 case SVGA3D_SHADERTYPE_HS:
1075 case SVGA3D_SHADERTYPE_DS:
1076 case SVGA3D_SHADERTYPE_CS:
1077 default:
1078 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
1079 }
1080
1081 return hr;
1082}
1083
1084
1085static void dxShaderSet(DXDEVICE *pDevice, SVGA3dShaderType type, DXSHADER *pDXShader)
1086{
1087 switch (type)
1088 {
1089 case SVGA3D_SHADERTYPE_VS:
1090 pDevice->pImmediateContext->VSSetShader(pDXShader ? pDXShader->pVertexShader : NULL, NULL, 0);
1091 break;
1092 case SVGA3D_SHADERTYPE_PS:
1093 pDevice->pImmediateContext->PSSetShader(pDXShader ? pDXShader->pPixelShader : NULL, NULL, 0);
1094 break;
1095 case SVGA3D_SHADERTYPE_GS:
1096 case SVGA3D_SHADERTYPE_HS:
1097 case SVGA3D_SHADERTYPE_DS:
1098 case SVGA3D_SHADERTYPE_CS:
1099 default:
1100 ASSERT_GUEST_FAILED_RETURN_VOID();
1101 }
1102}
1103
1104
1105static void dxConstantBufferSet(DXDEVICE *pDevice, uint32_t slot, SVGA3dShaderType type, ID3D11Buffer *pConstantBuffer)
1106{
1107 switch (type)
1108 {
1109 case SVGA3D_SHADERTYPE_VS:
1110 pDevice->pImmediateContext->VSSetConstantBuffers(slot, 1, &pConstantBuffer);
1111 break;
1112 case SVGA3D_SHADERTYPE_PS:
1113 pDevice->pImmediateContext->PSSetConstantBuffers(slot, 1, &pConstantBuffer);
1114 break;
1115 case SVGA3D_SHADERTYPE_GS:
1116 case SVGA3D_SHADERTYPE_HS:
1117 case SVGA3D_SHADERTYPE_DS:
1118 case SVGA3D_SHADERTYPE_CS:
1119 default:
1120 ASSERT_GUEST_FAILED_RETURN_VOID();
1121 }
1122}
1123
1124
1125static void dxSamplerSet(DXDEVICE *pDevice, SVGA3dShaderType type, uint32_t startSampler, uint32_t cSampler, ID3D11SamplerState * const *papSampler)
1126{
1127 switch (type)
1128 {
1129 case SVGA3D_SHADERTYPE_VS:
1130 pDevice->pImmediateContext->VSSetSamplers(startSampler, cSampler, papSampler);
1131 break;
1132 case SVGA3D_SHADERTYPE_PS:
1133 pDevice->pImmediateContext->PSSetSamplers(startSampler, cSampler, papSampler);
1134 break;
1135 case SVGA3D_SHADERTYPE_GS:
1136 case SVGA3D_SHADERTYPE_HS:
1137 case SVGA3D_SHADERTYPE_DS:
1138 case SVGA3D_SHADERTYPE_CS:
1139 default:
1140 ASSERT_GUEST_FAILED_RETURN_VOID();
1141 }
1142}
1143
1144
1145static void dxShaderResourceViewSet(DXDEVICE *pDevice, SVGA3dShaderType type, uint32_t startView, uint32_t cShaderResourceView, ID3D11ShaderResourceView * const *papShaderResourceView)
1146{
1147 switch (type)
1148 {
1149 case SVGA3D_SHADERTYPE_VS:
1150 pDevice->pImmediateContext->VSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
1151 break;
1152 case SVGA3D_SHADERTYPE_PS:
1153 pDevice->pImmediateContext->PSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
1154 break;
1155 case SVGA3D_SHADERTYPE_GS:
1156 case SVGA3D_SHADERTYPE_HS:
1157 case SVGA3D_SHADERTYPE_DS:
1158 case SVGA3D_SHADERTYPE_CS:
1159 default:
1160 ASSERT_GUEST_FAILED_RETURN_VOID();
1161 }
1162}
1163
1164
1165static int vmsvga3dBackSurfaceCreateScreenTarget(PVMSVGA3DSTATE pState, PVMSVGA3DSURFACE pSurface)
1166{
1167 PVMSVGA3DBACKEND pBackend = pState->pBackend;
1168 AssertReturn(pBackend, VERR_INVALID_STATE);
1169
1170 DXDEVICE *pDXDevice = &pBackend->device;
1171 AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
1172
1173 /* Surface must have SCREEN_TARGET flag. */
1174 ASSERT_GUEST_RETURN(RT_BOOL(pSurface->surfaceFlags & SVGA3D_SURFACE_SCREENTARGET), VERR_INVALID_PARAMETER);
1175
1176 if (VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
1177 {
1178 AssertFailed(); /* Should the function not be used like that? */
1179 vmsvga3dBackSurfaceDestroy(pState, pSurface);
1180 }
1181
1182 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
1183 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
1184
1185 D3D11_TEXTURE2D_DESC td;
1186 RT_ZERO(td);
1187 td.Width = pSurface->paMipmapLevels[0].mipmapSize.width;
1188 td.Height = pSurface->paMipmapLevels[0].mipmapSize.height;
1189 Assert(pSurface->cLevels == 1);
1190 td.MipLevels = 1;
1191 td.ArraySize = 1;
1192 td.Format = vmsvgaDXSurfaceFormat2Dxgi(pSurface->format);
1193 td.SampleDesc.Count = 1;
1194 td.SampleDesc.Quality = 0;
1195 td.Usage = D3D11_USAGE_DEFAULT;
1196 td.BindFlags = D3D11_BIND_RENDER_TARGET | D3D11_BIND_SHADER_RESOURCE;
1197 td.CPUAccessFlags = 0;
1198 td.MiscFlags = D3D11_RESOURCE_MISC_SHARED;
1199
1200 HRESULT hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.ScreenTarget.pTexture);
1201 Assert(SUCCEEDED(hr));
1202 if (SUCCEEDED(hr))
1203 {
1204 /* Map-able texture. */
1205 td.Usage = D3D11_USAGE_DYNAMIC;
1206 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
1207 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1208 td.MiscFlags = 0;
1209 hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.ScreenTarget.pDynamicTexture);
1210 Assert(SUCCEEDED(hr));
1211 }
1212
1213 if (SUCCEEDED(hr))
1214 {
1215 /* Staging texture. */
1216 td.Usage = D3D11_USAGE_STAGING;
1217 td.BindFlags = 0; /* No flags allowed. */
1218 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ;
1219 hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.ScreenTarget.pStagingTexture);
1220 Assert(SUCCEEDED(hr));
1221 }
1222
1223 if (SUCCEEDED(hr))
1224 {
1225 /* Get the shared handle. */
1226 IDXGIResource *pDxgiResource = NULL;
1227 hr = pBackendSurface->u.ScreenTarget.pTexture->QueryInterface(__uuidof(IDXGIResource), (void**)&pDxgiResource);
1228 Assert(SUCCEEDED(hr));
1229 if (SUCCEEDED(hr))
1230 {
1231 hr = pDxgiResource->GetSharedHandle(&pBackendSurface->u.ScreenTarget.SharedHandle);
1232 Assert(SUCCEEDED(hr));
1233 D3D_RELEASE(pDxgiResource);
1234 }
1235 }
1236
1237 if (SUCCEEDED(hr))
1238 {
1239 /*
1240 * Success.
1241 */
1242 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_SCREEN_TARGET;
1243 pBackendSurface->enmDxgiFormat = td.Format;
1244 pSurface->pBackendSurface = pBackendSurface;
1245 pSurface->idAssociatedContext = SVGA_ID_INVALID;
1246 pSurface->fDirty = true;
1247 return VINF_SUCCESS;
1248 }
1249
1250 /* Failure. */
1251 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pStagingTexture);
1252 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pDynamicTexture);
1253 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pTexture);
1254 RTMemFree(pBackendSurface);
1255 return VERR_NO_MEMORY;
1256}
1257
1258
1259static UINT dxBindFlags(SVGA3dSurfaceAllFlags surfaceFlags)
1260{
1261 /* Catch unimplemented flags. */
1262 Assert(!RT_BOOL(surfaceFlags & (SVGA3D_SURFACE_BIND_LOGICOPS | SVGA3D_SURFACE_BIND_RAW_VIEWS)));
1263
1264 UINT BindFlags = 0;
1265
1266 if (surfaceFlags & SVGA3D_SURFACE_BIND_VERTEX_BUFFER) BindFlags |= D3D11_BIND_VERTEX_BUFFER;
1267 if (surfaceFlags & SVGA3D_SURFACE_BIND_INDEX_BUFFER) BindFlags |= D3D11_BIND_INDEX_BUFFER;
1268 if (surfaceFlags & SVGA3D_SURFACE_BIND_CONSTANT_BUFFER) BindFlags |= D3D11_BIND_CONSTANT_BUFFER;
1269 if (surfaceFlags & SVGA3D_SURFACE_BIND_SHADER_RESOURCE) BindFlags |= D3D11_BIND_SHADER_RESOURCE;
1270 if (surfaceFlags & SVGA3D_SURFACE_BIND_RENDER_TARGET) BindFlags |= D3D11_BIND_RENDER_TARGET;
1271 if (surfaceFlags & SVGA3D_SURFACE_BIND_DEPTH_STENCIL) BindFlags |= D3D11_BIND_DEPTH_STENCIL;
1272 if (surfaceFlags & SVGA3D_SURFACE_BIND_STREAM_OUTPUT) BindFlags |= D3D11_BIND_STREAM_OUTPUT;
1273 if (surfaceFlags & SVGA3D_SURFACE_BIND_UAVIEW) BindFlags |= D3D11_BIND_UNORDERED_ACCESS;
1274
1275 return BindFlags;
1276}
1277
1278
1279static int vmsvga3dBackSurfaceCreateTexture(PVMSVGA3DSTATE p3dState, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
1280{
1281 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
1282 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
1283
1284 if (pSurface->pBackendSurface != NULL)
1285 {
1286 AssertFailed(); /** @todo Should the function not be used like that? */
1287 vmsvga3dBackSurfaceDestroy(p3dState, pSurface);
1288 }
1289
1290 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
1291 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
1292
1293 uint32_t const cWidth = pSurface->paMipmapLevels[0].mipmapSize.width;
1294 uint32_t const cHeight = pSurface->paMipmapLevels[0].mipmapSize.height;
1295 uint32_t const cDepth = pSurface->paMipmapLevels[0].mipmapSize.depth;
1296 uint32_t const numMipLevels = pSurface->cLevels;
1297
1298 DXGI_FORMAT dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(pSurface->format);
1299 AssertReturn(dxgiFormat != DXGI_FORMAT_UNKNOWN, E_FAIL);
1300
1301 /*
1302 * Create D3D11 texture object.
1303 */
1304 HRESULT hr = S_OK;
1305 if (pSurface->surfaceFlags & SVGA3D_SURFACE_SCREENTARGET)
1306 {
1307 /*
1308 * Create the texture in backend device and open for the specified context.
1309 */
1310 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
1311 AssertReturn(pBackend, VERR_INVALID_STATE);
1312
1313 DXDEVICE *pDXDevice = &pBackend->device;
1314 AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
1315
1316 D3D11_TEXTURE2D_DESC td;
1317 RT_ZERO(td);
1318 td.Width = pSurface->paMipmapLevels[0].mipmapSize.width;
1319 td.Height = pSurface->paMipmapLevels[0].mipmapSize.height;
1320 Assert(pSurface->cLevels == 1);
1321 td.MipLevels = 1;
1322 td.ArraySize = 1;
1323 td.Format = dxgiFormat;
1324 td.SampleDesc.Count = 1;
1325 td.SampleDesc.Quality = 0;
1326 td.Usage = D3D11_USAGE_DEFAULT;
1327 td.BindFlags = D3D11_BIND_RENDER_TARGET | D3D11_BIND_SHADER_RESOURCE;
1328 td.CPUAccessFlags = 0;
1329 td.MiscFlags = D3D11_RESOURCE_MISC_SHARED;
1330
1331 hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.ScreenTarget.pTexture);
1332 Assert(SUCCEEDED(hr));
1333 if (SUCCEEDED(hr))
1334 {
1335 /* Map-able texture. */
1336 td.Usage = D3D11_USAGE_DYNAMIC;
1337 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
1338 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1339 td.MiscFlags = 0;
1340 hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.ScreenTarget.pDynamicTexture);
1341 Assert(SUCCEEDED(hr));
1342 }
1343
1344 if (SUCCEEDED(hr))
1345 {
1346 /* Staging texture. */
1347 td.Usage = D3D11_USAGE_STAGING;
1348 td.BindFlags = 0; /* No flags allowed. */
1349 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ;
1350 hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.ScreenTarget.pStagingTexture);
1351 Assert(SUCCEEDED(hr));
1352 }
1353
1354 if (SUCCEEDED(hr))
1355 {
1356 /* Get the shared handle. */
1357 IDXGIResource *pDxgiResource = NULL;
1358 hr = pBackendSurface->u.ScreenTarget.pTexture->QueryInterface(__uuidof(IDXGIResource), (void**)&pDxgiResource);
1359 Assert(SUCCEEDED(hr));
1360 if (SUCCEEDED(hr))
1361 {
1362 hr = pDxgiResource->GetSharedHandle(&pBackendSurface->u.ScreenTarget.SharedHandle);
1363 Assert(SUCCEEDED(hr));
1364 D3D_RELEASE(pDxgiResource);
1365 }
1366 }
1367
1368 if (SUCCEEDED(hr))
1369 {
1370 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_SCREEN_TARGET;
1371 }
1372 }
1373 else if (pSurface->surfaceFlags & SVGA3D_SURFACE_CUBEMAP)
1374 {
1375 Assert(pSurface->cFaces == 6);
1376 Assert(cWidth == cHeight);
1377 Assert(cDepth == 1);
1378
1379 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_CUBE_TEXTURE;
1380 AssertFailed(); /** @todo implement */
1381 hr = E_FAIL;
1382 }
1383 else if (pSurface->surfaceFlags & SVGA3D_SURFACE_1D)
1384 {
1385 AssertFailed(); /** @todo implement */
1386 hr = E_FAIL;
1387 }
1388 else
1389 {
1390 if (cDepth > 1)
1391 {
1392 /*
1393 * Volume texture.
1394 */
1395 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE_3D;
1396 AssertFailed(); /** @todo implement */
1397 hr = E_FAIL;
1398 }
1399 else
1400 {
1401 /*
1402 * 2D texture.
1403 */
1404 Assert(pSurface->cFaces == 1);
1405
1406 D3D11_SUBRESOURCE_DATA *paInitialData = NULL;
1407 D3D11_SUBRESOURCE_DATA aInitialData[SVGA3D_MAX_MIP_LEVELS];
1408 if (pSurface->paMipmapLevels[0].pSurfaceData)
1409 {
1410 /** @todo Can happen for a non GBO surface. Test this. */
1411 for (uint32_t i = 0; i < numMipLevels; ++i)
1412 {
1413 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
1414 D3D11_SUBRESOURCE_DATA *p = &aInitialData[i];
1415 p->pSysMem = pMipmapLevel->pSurfaceData;
1416 p->SysMemPitch = pMipmapLevel->cbSurfacePitch;
1417 p->SysMemSlicePitch = pMipmapLevel->cbSurfacePlane;
1418 }
1419 paInitialData = &aInitialData[0];
1420 }
1421
1422 D3D11_TEXTURE2D_DESC td;
1423 RT_ZERO(td);
1424 td.Width = cWidth;
1425 td.Height = cHeight;
1426 td.MipLevels = numMipLevels;
1427 td.ArraySize = 1; /** @todo */
1428 td.Format = dxgiFormat;
1429 td.SampleDesc.Count = 1;
1430 td.SampleDesc.Quality = 0;
1431 td.Usage = D3D11_USAGE_DEFAULT;
1432 td.BindFlags = dxBindFlags(pSurface->surfaceFlags);
1433 td.CPUAccessFlags = 0; /** @todo */
1434 td.MiscFlags = 0; /** @todo */
1435 if ( numMipLevels > 1
1436 && (td.BindFlags & (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET)) == (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET))
1437 td.MiscFlags |= D3D11_RESOURCE_MISC_GENERATE_MIPS; /* Required for GenMips. */
1438
1439 hr = pDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->u.Texture.pTexture);
1440 Assert(SUCCEEDED(hr));
1441 if (SUCCEEDED(hr))
1442 {
1443 /* Map-able texture. */
1444 td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
1445 td.Usage = D3D11_USAGE_DYNAMIC;
1446 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
1447 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1448 td.MiscFlags = 0;
1449 hr = pDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->u.Texture.pDynamicTexture);
1450 Assert(SUCCEEDED(hr));
1451 }
1452
1453 if (SUCCEEDED(hr))
1454 {
1455 /* Staging texture. */
1456 td.Usage = D3D11_USAGE_STAGING;
1457 td.BindFlags = 0; /* No flags allowed. */
1458 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ;
1459 td.MiscFlags = 0;
1460 hr = pDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->u.Texture.pStagingTexture);
1461 Assert(SUCCEEDED(hr));
1462 }
1463
1464 if (SUCCEEDED(hr))
1465 {
1466 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE;
1467 }
1468 }
1469 }
1470
1471 Assert(hr == S_OK);
1472
1473 if (pSurface->autogenFilter != SVGA3D_TEX_FILTER_NONE)
1474 {
1475 }
1476
1477 if (SUCCEEDED(hr))
1478 {
1479 /*
1480 * Success.
1481 */
1482 pBackendSurface->enmDxgiFormat = dxgiFormat;
1483 pSurface->pBackendSurface = pBackendSurface;
1484 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
1485 pSurface->idAssociatedContext = SVGA_ID_INVALID;
1486 else
1487 pSurface->idAssociatedContext = pDXContext->cid;
1488 return VINF_SUCCESS;
1489 }
1490
1491 /* Failure. */
1492 D3D_RELEASE(pBackendSurface->u.Texture.pStagingTexture);
1493 D3D_RELEASE(pBackendSurface->u.Texture.pDynamicTexture);
1494 D3D_RELEASE(pBackendSurface->u.Texture.pTexture);
1495 RTMemFree(pBackendSurface);
1496 return VERR_NO_MEMORY;
1497}
1498
1499
1500static int vmsvga3dBackSurfaceCreateDepthStencilTexture(PVMSVGA3DSTATE p3dState, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
1501{
1502 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
1503 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
1504
1505 if (pSurface->pBackendSurface != NULL)
1506 {
1507 AssertFailed(); /** @todo Should the function not be used like that? */
1508 vmsvga3dBackSurfaceDestroy(p3dState, pSurface);
1509 }
1510
1511 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
1512 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
1513
1514 D3D11_TEXTURE2D_DESC td;
1515 RT_ZERO(td);
1516 td.Width = pSurface->paMipmapLevels[0].mipmapSize.width;
1517 td.Height = pSurface->paMipmapLevels[0].mipmapSize.height;
1518 Assert(pSurface->cLevels == 1);
1519 td.MipLevels = 1;
1520 td.ArraySize = 1;
1521 td.Format = vmsvgaDXSurfaceFormat2Dxgi(pSurface->format);
1522 AssertReturn(td.Format != DXGI_FORMAT_UNKNOWN, E_FAIL);
1523 td.SampleDesc.Count = 1;
1524 td.SampleDesc.Quality = 0;
1525 td.Usage = D3D11_USAGE_DEFAULT;
1526 td.BindFlags = D3D11_BIND_DEPTH_STENCIL;
1527 td.CPUAccessFlags = 0;
1528 td.MiscFlags = 0;
1529
1530 HRESULT hr = pDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.Texture.pTexture);
1531 Assert(SUCCEEDED(hr));
1532 if (SUCCEEDED(hr))
1533 {
1534 /*
1535 * Success.
1536 */
1537 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE;
1538 pBackendSurface->enmDxgiFormat = td.Format;
1539 pSurface->pBackendSurface = pBackendSurface;
1540 pSurface->idAssociatedContext = pDXContext->cid;
1541 pSurface->fDirty = true;
1542 return VINF_SUCCESS;
1543 }
1544
1545 /* Failure. */
1546 D3D_RELEASE(pBackendSurface->u.Texture.pStagingTexture);
1547 D3D_RELEASE(pBackendSurface->u.Texture.pDynamicTexture);
1548 D3D_RELEASE(pBackendSurface->u.Texture.pTexture);
1549 RTMemFree(pBackendSurface);
1550 return VERR_NO_MEMORY;
1551}
1552
1553
1554static int vmsvga3dBackSurfaceCreateBuffer(PVMSVGA3DSTATE p3dState, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
1555{
1556 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
1557 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
1558
1559 /* Buffers should be created as such. */
1560 AssertReturn(RT_BOOL(pSurface->surfaceFlags & ( SVGA3D_SURFACE_HINT_INDEXBUFFER
1561 | SVGA3D_SURFACE_HINT_VERTEXBUFFER
1562 | SVGA3D_SURFACE_BIND_VERTEX_BUFFER
1563 | SVGA3D_SURFACE_BIND_INDEX_BUFFER
1564 /// @todo only for constant buffers| SVGA3D_SURFACE_BIND_CONSTANT_BUFFER
1565 //| SVGA3D_SURFACE_BIND_STREAM_OUTPUT
1566 )), VERR_INVALID_PARAMETER);
1567
1568 if (pSurface->pBackendSurface != NULL)
1569 {
1570 AssertFailed(); /** @todo Should the function not be used like that? */
1571 vmsvga3dBackSurfaceDestroy(p3dState, pSurface);
1572 }
1573
1574 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
1575 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
1576
1577 D3D11_BUFFER_DESC bd;
1578 RT_ZERO(bd);
1579 bd.ByteWidth = pSurface->paMipmapLevels[0].cbSurface;
1580 bd.Usage = D3D11_USAGE_DYNAMIC;
1581 bd.BindFlags = D3D11_BIND_VERTEX_BUFFER
1582 | D3D11_BIND_INDEX_BUFFER
1583 //| D3D11_BIND_CONSTANT_BUFFER
1584 //| D3D11_BIND_STREAM_OUTPUT
1585 ;
1586 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1587 bd.MiscFlags = 0;
1588 bd.StructureByteStride = 0;
1589
1590 HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, 0, &pBackendSurface->u.Buffer.pBuffer);
1591 if (SUCCEEDED(hr))
1592 {
1593 /*
1594 * Success.
1595 */
1596 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
1597 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
1598 pSurface->pBackendSurface = pBackendSurface;
1599 pSurface->idAssociatedContext = pDXContext->cid;
1600 pSurface->fDirty = true;
1601 return VINF_SUCCESS;
1602 }
1603
1604 /* Failure. */
1605 D3D_RELEASE(pBackendSurface->u.Buffer.pBuffer);
1606 RTMemFree(pBackendSurface);
1607 return VERR_NO_MEMORY;
1608}
1609
1610
1611static int vmsvga3dBackSurfaceCreateConstantBuffer(PVMSVGA3DSTATE p3dState, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
1612{
1613 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
1614 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
1615
1616 /* Buffers should be created as such. */
1617 AssertReturn(RT_BOOL(pSurface->surfaceFlags & ( SVGA3D_SURFACE_BIND_CONSTANT_BUFFER)), VERR_INVALID_PARAMETER);
1618
1619 if (pSurface->pBackendSurface != NULL)
1620 {
1621 AssertFailed(); /** @todo Should the function not be used like that? */
1622 vmsvga3dBackSurfaceDestroy(p3dState, pSurface);
1623 }
1624
1625 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
1626 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
1627
1628 D3D11_BUFFER_DESC bd;
1629 RT_ZERO(bd);
1630 bd.ByteWidth = pSurface->paMipmapLevels[0].cbSurface;
1631 bd.Usage = D3D11_USAGE_DYNAMIC;
1632 bd.BindFlags = D3D11_BIND_CONSTANT_BUFFER;
1633 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1634 bd.MiscFlags = 0;
1635 bd.StructureByteStride = 0;
1636
1637 HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, 0, &pBackendSurface->u.Buffer.pBuffer);
1638 if (SUCCEEDED(hr))
1639 {
1640 /*
1641 * Success.
1642 */
1643 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
1644 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
1645 pSurface->pBackendSurface = pBackendSurface;
1646 pSurface->idAssociatedContext = pDXContext->cid;
1647 pSurface->fDirty = true;
1648 return VINF_SUCCESS;
1649 }
1650
1651 /* Failure. */
1652 D3D_RELEASE(pBackendSurface->u.Buffer.pBuffer);
1653 RTMemFree(pBackendSurface);
1654 return VERR_NO_MEMORY;
1655}
1656
1657
1658static HRESULT dxCreateConstantBuffer(DXDEVICE *pDevice, VMSVGA3DSURFACE const *pSurface, PVMSVGA3DBACKENDSURFACE pBackendSurface)
1659{
1660 D3D11_SUBRESOURCE_DATA *pInitialData = NULL; /** @todo */
1661 D3D11_BUFFER_DESC bd;
1662 RT_ZERO(bd);
1663 bd.ByteWidth = pSurface->paMipmapLevels[0].cbSurface;
1664 bd.Usage = D3D11_USAGE_DYNAMIC; /** @todo HINT_STATIC */
1665 bd.BindFlags = D3D11_BIND_CONSTANT_BUFFER;
1666 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1667 bd.MiscFlags = 0;
1668 bd.StructureByteStride = 0;
1669
1670 return pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->u.Buffer.pBuffer);
1671}
1672
1673
1674static HRESULT dxCreateBuffer(DXDEVICE *pDevice, VMSVGA3DSURFACE const *pSurface, PVMSVGA3DBACKENDSURFACE pBackendSurface)
1675{
1676 D3D11_SUBRESOURCE_DATA *pInitialData = NULL; /** @todo */
1677 D3D11_BUFFER_DESC bd;
1678 RT_ZERO(bd);
1679 bd.ByteWidth = pSurface->paMipmapLevels[0].cbSurface;
1680 bd.Usage = D3D11_USAGE_DYNAMIC; /** @todo HINT_STATIC */
1681 bd.BindFlags = D3D11_BIND_VERTEX_BUFFER
1682 | D3D11_BIND_INDEX_BUFFER;
1683 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1684 bd.MiscFlags = 0;
1685 bd.StructureByteStride = 0;
1686
1687 return pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->u.Buffer.pBuffer);
1688}
1689
1690
1691static int vmsvga3dBackSurfaceCreate(PVMSVGA3DSTATE p3dState, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
1692{
1693 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
1694 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
1695
1696 if (pSurface->pBackendSurface != NULL)
1697 {
1698 AssertFailed(); /** @todo Should the function not be used like that? */
1699 vmsvga3dBackSurfaceDestroy(p3dState, pSurface);
1700 }
1701
1702 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
1703 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
1704
1705 HRESULT hr;
1706
1707 /*
1708 * Figure out the type of the surface.
1709 */
1710 if (pSurface->surfaceFlags & SVGA3D_SURFACE_BIND_CONSTANT_BUFFER)
1711 {
1712 hr = dxCreateConstantBuffer(pDevice, pSurface, pBackendSurface);
1713 if (SUCCEEDED(hr))
1714 {
1715 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
1716 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
1717 }
1718 else
1719 D3D_RELEASE(pBackendSurface->u.Buffer.pBuffer);
1720 }
1721 else if (pSurface->surfaceFlags & ( SVGA3D_SURFACE_BIND_VERTEX_BUFFER
1722 | SVGA3D_SURFACE_BIND_INDEX_BUFFER
1723 | SVGA3D_SURFACE_HINT_VERTEXBUFFER
1724 | SVGA3D_SURFACE_HINT_INDEXBUFFER))
1725 {
1726 hr = dxCreateBuffer(pDevice, pSurface, pBackendSurface);
1727 if (SUCCEEDED(hr))
1728 {
1729 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
1730 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
1731 }
1732 else
1733 D3D_RELEASE(pBackendSurface->u.Buffer.pBuffer);
1734 }
1735 else
1736 {
1737 AssertFailed(); /** @todo implement */
1738 hr = E_FAIL;
1739 }
1740
1741 if (SUCCEEDED(hr))
1742 {
1743 /*
1744 * Success.
1745 */
1746 pSurface->pBackendSurface = pBackendSurface;
1747 pSurface->idAssociatedContext = pDXContext->cid;
1748 return VINF_SUCCESS;
1749 }
1750
1751 /* Failure. */
1752 RTMemFree(pBackendSurface);
1753 return VERR_NO_MEMORY;
1754}
1755
1756
1757int vmsvga3dInit(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC)
1758{
1759 RT_NOREF(pDevIns, pThis);
1760
1761 PVMSVGA3DSTATE pState = (PVMSVGA3DSTATE)RTMemAllocZ(sizeof(VMSVGA3DSTATE));
1762 AssertReturn(pState, VERR_NO_MEMORY);
1763 pThisCC->svga.p3dState = pState;
1764
1765 PVMSVGA3DBACKEND pBackend = (PVMSVGA3DBACKEND)RTMemAllocZ(sizeof(VMSVGA3DBACKEND));
1766 AssertReturn(pBackend, VERR_NO_MEMORY);
1767 pState->pBackend = pBackend;
1768
1769 int rc = RTLdrLoadSystem("d3d11", /* fNoUnload = */ true, &pBackend->hD3D11);
1770 AssertRC(rc);
1771 if (RT_SUCCESS(rc))
1772 {
1773 rc = RTLdrGetSymbol(pBackend->hD3D11, "D3D11CreateDevice", (void **)&pBackend->pfnD3D11CreateDevice);
1774 AssertRC(rc);
1775 }
1776
1777 rc = RTLdrLoadSystem("D3DCompiler_47", /* fNoUnload = */ true, &pBackend->hD3DCompiler);
1778 AssertRC(rc);
1779 if (RT_SUCCESS(rc))
1780 {
1781 rc = RTLdrGetSymbol(pBackend->hD3DCompiler, "D3DDisassemble", (void **)&pBackend->pfnD3DDisassemble);
1782 AssertRC(rc);
1783 }
1784
1785 return rc;
1786}
1787
1788
1789int vmsvga3dPowerOn(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC)
1790{
1791 RT_NOREF(pDevIns, pThis);
1792
1793 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1794 AssertReturn(pState, VERR_INVALID_STATE);
1795
1796 PVMSVGA3DBACKEND pBackend = pState->pBackend;
1797 AssertReturn(pBackend, VERR_INVALID_STATE);
1798
1799 int rc = dxDeviceCreate(pBackend, &pBackend->device);
1800 return rc;
1801}
1802
1803
1804int vmsvga3dTerminate(PVGASTATECC pThisCC)
1805{
1806 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1807 AssertReturn(pState, VERR_INVALID_STATE);
1808
1809 if (pState->pBackend)
1810 {
1811 dxDeviceDestroy(pState->pBackend, &pState->pBackend->device);
1812
1813 RTMemFree(pState->pBackend);
1814 pState->pBackend = NULL;
1815 }
1816
1817 return VINF_SUCCESS;
1818}
1819
1820
1821int vmsvga3dReset(PVGASTATECC pThisCC)
1822{
1823 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1824 AssertReturn(pState, VERR_INVALID_STATE);
1825
1826 /** @todo Cleanup all resources and recreate Device, ImmediateContext etc to be at the same state as after poweron. */
1827
1828 return VINF_SUCCESS;
1829}
1830
1831
1832static int vmsvga3dDrvNotifyDefineScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
1833{
1834 /** @todo Such structures must be in VBoxVideo3D.h */
1835 typedef struct VBOX3DNOTIFYDEFINESCREEN
1836 {
1837 VBOX3DNOTIFY Core;
1838 uint32_t cWidth;
1839 uint32_t cHeight;
1840 int32_t xRoot;
1841 int32_t yRoot;
1842 uint32_t fPrimary;
1843 uint32_t cDpi;
1844 } VBOX3DNOTIFYDEFINESCREEN;
1845
1846 VBOX3DNOTIFYDEFINESCREEN n;
1847 n.Core.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_CREATED;
1848 n.Core.iDisplay = pScreen->idScreen;
1849 n.Core.u32Reserved = 0;
1850 n.Core.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
1851 RT_ZERO(n.Core.au8Data);
1852 n.cWidth = pScreen->cWidth;
1853 n.cHeight = pScreen->cHeight;
1854 n.xRoot = pScreen->xOrigin;
1855 n.yRoot = pScreen->yOrigin;
1856 n.fPrimary = RT_BOOL(pScreen->fuScreen & SVGA_SCREEN_IS_PRIMARY);
1857 n.cDpi = pScreen->cDpi;
1858
1859 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n.Core);
1860}
1861
1862
1863static int vmsvga3dDrvNotifyDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
1864{
1865 VBOX3DNOTIFY n;
1866 n.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_DESTROYED;
1867 n.iDisplay = pScreen->idScreen;
1868 n.u32Reserved = 0;
1869 n.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
1870 RT_ZERO(n.au8Data);
1871
1872 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n);
1873}
1874
1875
1876static int vmsvga3dDrvNotifyBindSurface(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, HANDLE hSharedSurface)
1877{
1878 VBOX3DNOTIFY n;
1879 n.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_BIND_SURFACE;
1880 n.iDisplay = pScreen->idScreen;
1881 n.u32Reserved = 0;
1882 n.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
1883 *(uint64_t *)&n.au8Data[0] = (uint64_t)hSharedSurface;
1884
1885 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n);
1886}
1887
1888
1889static int vmsvga3dDrvNotifyUpdate(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen,
1890 uint32_t x, uint32_t y, uint32_t w, uint32_t h)
1891{
1892 typedef struct VBOX3DNOTIFYUPDATE
1893 {
1894 VBOX3DNOTIFY Core;
1895 uint32_t x;
1896 uint32_t y;
1897 uint32_t w;
1898 uint32_t h;
1899 } VBOX3DNOTIFYUPDATE;
1900
1901 VBOX3DNOTIFYUPDATE n;
1902 n.Core.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_UPDATE_END;
1903 n.Core.iDisplay = pScreen->idScreen;
1904 n.Core.u32Reserved = 0;
1905 n.Core.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
1906 RT_ZERO(n.Core.au8Data);
1907 n.x = x;
1908 n.y = y;
1909 n.w = w;
1910 n.h = h;
1911
1912 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n.Core);
1913}
1914
1915static int vmsvga3dHwScreenCreate(PVMSVGA3DSTATE pState, uint32_t cWidth, uint32_t cHeight, VMSVGAHWSCREEN *p)
1916{
1917 PVMSVGA3DBACKEND pBackend = pState->pBackend;
1918
1919 DXDEVICE *pDXDevice = &pBackend->device;
1920 AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
1921
1922 D3D11_TEXTURE2D_DESC td;
1923 RT_ZERO(td);
1924 td.Width = cWidth;
1925 td.Height = cHeight;
1926 td.MipLevels = 1;
1927 td.ArraySize = 1;
1928 td.Format = DXGI_FORMAT_B8G8R8A8_UNORM;
1929 td.SampleDesc.Count = 1;
1930 td.SampleDesc.Quality = 0;
1931 td.Usage = D3D11_USAGE_DEFAULT;
1932 td.BindFlags = D3D11_BIND_RENDER_TARGET | D3D11_BIND_SHADER_RESOURCE;
1933 td.CPUAccessFlags = 0;
1934 td.MiscFlags = D3D11_RESOURCE_MISC_SHARED_KEYEDMUTEX;
1935
1936 HRESULT hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &p->pTexture);
1937 if (SUCCEEDED(hr))
1938 {
1939 /* Get the shared handle. */
1940 hr = p->pTexture->QueryInterface(__uuidof(IDXGIResource), (void**)&p->pDxgiResource);
1941 if (SUCCEEDED(hr))
1942 {
1943 hr = p->pDxgiResource->GetSharedHandle(&p->SharedHandle);
1944 if (SUCCEEDED(hr))
1945 hr = p->pTexture->QueryInterface(__uuidof(IDXGIKeyedMutex), (void**)&p->pDXGIKeyedMutex);
1946 }
1947 }
1948
1949 if (SUCCEEDED(hr))
1950 return VINF_SUCCESS;
1951
1952 AssertFailed();
1953 return VERR_NOT_SUPPORTED;
1954}
1955
1956
1957static void vmsvga3dHwScreenDestroy(PVMSVGA3DSTATE pState, VMSVGAHWSCREEN *p)
1958{
1959 RT_NOREF(pState);
1960 D3D_RELEASE(p->pDXGIKeyedMutex);
1961 D3D_RELEASE(p->pDxgiResource);
1962 D3D_RELEASE(p->pTexture);
1963 p->SharedHandle = 0;
1964 p->sidScreenTarget = SVGA_ID_INVALID;
1965}
1966
1967
1968int vmsvga3dBackDefineScreen(PVGASTATE pThis, PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
1969{
1970 RT_NOREF(pThis, pThisCC, pScreen);
1971
1972 LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: screen %u\n", pScreen->idScreen));
1973
1974 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1975 AssertReturn(pState, VERR_INVALID_STATE);
1976
1977 PVMSVGA3DBACKEND pBackend = pState->pBackend;
1978 AssertReturn(pBackend, VERR_INVALID_STATE);
1979
1980 Assert(pScreen->pHwScreen == NULL);
1981
1982 VMSVGAHWSCREEN *p = (VMSVGAHWSCREEN *)RTMemAllocZ(sizeof(VMSVGAHWSCREEN));
1983 AssertPtrReturn(p, VERR_NO_MEMORY);
1984
1985 p->sidScreenTarget = SVGA_ID_INVALID;
1986
1987 int rc = vmsvga3dDrvNotifyDefineScreen(pThisCC, pScreen);
1988 if (RT_SUCCESS(rc))
1989 {
1990 /* The frontend supports the screen. Create the actual resource. */
1991 rc = vmsvga3dHwScreenCreate(pState, pScreen->cWidth, pScreen->cHeight, p);
1992 if (RT_SUCCESS(rc))
1993 LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: created\n"));
1994 }
1995
1996 if (RT_SUCCESS(rc))
1997 {
1998 LogRel(("VMSVGA: Using HW accelerated screen %u\n", pScreen->idScreen));
1999 pScreen->pHwScreen = p;
2000 }
2001 else
2002 {
2003 LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: %Rrc\n", rc));
2004 vmsvga3dHwScreenDestroy(pState, p);
2005 RTMemFree(p);
2006 }
2007
2008 return rc;
2009}
2010
2011
2012int vmsvga3dBackDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
2013{
2014 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2015 AssertReturn(pState, VERR_INVALID_STATE);
2016
2017 vmsvga3dDrvNotifyDestroyScreen(pThisCC, pScreen);
2018
2019 if (pScreen->pHwScreen)
2020 {
2021 vmsvga3dHwScreenDestroy(pState, pScreen->pHwScreen);
2022 RTMemFree(pScreen->pHwScreen);
2023 pScreen->pHwScreen = NULL;
2024 }
2025
2026 return VINF_SUCCESS;
2027}
2028
2029
2030int vmsvga3dBackSurfaceBlitToScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen,
2031 SVGASignedRect destRect, SVGA3dSurfaceImageId srcImage,
2032 SVGASignedRect srcRect, uint32_t cRects, SVGASignedRect *paRects)
2033{
2034 RT_NOREF(pThisCC, pScreen, destRect, srcImage, srcRect, cRects, paRects);
2035
2036 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2037 AssertReturn(pState, VERR_INVALID_STATE);
2038
2039 PVMSVGA3DBACKEND pBackend = pState->pBackend;
2040 AssertReturn(pBackend, VERR_INVALID_STATE);
2041
2042 VMSVGAHWSCREEN *p = pScreen->pHwScreen;
2043 AssertReturn(p, VERR_NOT_SUPPORTED);
2044
2045 PVMSVGA3DSURFACE pSurface;
2046 int rc = vmsvga3dSurfaceFromSid(pState, srcImage.sid, &pSurface);
2047 AssertRCReturn(rc, rc);
2048
2049 /** @todo Implement. */
2050 AssertFailed();
2051 return VERR_NOT_IMPLEMENTED;
2052}
2053
2054
2055static DECLCALLBACK(int) dxContextFlushShared(PAVLU32NODECORE pCore, void *pvUser)
2056{
2057 PVMSVGA3DSTATE pState = (PVMSVGA3DSTATE)pvUser;
2058
2059 // Flush pCore->Key context and issue a query.
2060 PVMSVGA3DDXCONTEXT pDXContextDrawing;
2061 int rc = vmsvga3dDXContextFromCid(pState, pCore->Key, &pDXContextDrawing);
2062 AssertRCReturn(rc, rc);
2063
2064 DXDEVICE *pDeviceDrawing = &pDXContextDrawing->pBackendDXContext->device;
2065 pDeviceDrawing->pImmediateContext->Flush();
2066
2067 ID3D11Query *pQuery = 0;
2068 D3D11_QUERY_DESC qd;
2069 RT_ZERO(qd);
2070 qd.Query = D3D11_QUERY_EVENT;
2071 HRESULT hr2 = pDeviceDrawing->pDevice->CreateQuery(&qd, &pQuery);
2072 Assert(hr2 == S_OK); RT_NOREF(hr2);
2073
2074 pDeviceDrawing->pImmediateContext->End(pQuery);
2075
2076 BOOL queryData;
2077 while (pDeviceDrawing->pImmediateContext->GetData(pQuery, &queryData, sizeof(queryData), 0) != S_OK)
2078 {
2079 RTThreadYield();
2080 }
2081 D3D_RELEASE(pQuery);
2082
2083 return VINF_SUCCESS;
2084}
2085
2086
2087
2088static DECLCALLBACK(int) vmsvga3dSurfaceMap(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dSurfaceImageId const *pImage, SVGA3dBox const *pBox,
2089 VMSVGA3D_SURFACE_MAP enmMapType, VMSVGA3D_MAPPED_SURFACE *pMap)
2090{
2091 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2092 AssertReturn(pState, VERR_INVALID_STATE);
2093
2094 PVMSVGA3DBACKEND pBackend = pState->pBackend;
2095 AssertReturn(pBackend, VERR_INVALID_STATE);
2096
2097 PVMSVGA3DSURFACE pSurface;
2098 int rc = vmsvga3dSurfaceFromSid(pState, pImage->sid, &pSurface);
2099 AssertRCReturn(rc, rc);
2100
2101 Assert(pImage->face == 0 && pImage->mipmap == 0); /** @todo implement. */
2102
2103 PVMSVGA3DDXCONTEXT pDXContext;
2104
2105 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
2106 if (!pBackendSurface)
2107 {
2108 /* This means that the guest uploads new data to the surface.
2109 * So the data should be copied either to a host memory buffer,
2110 * or to the actual surface.
2111 * In the latter case the BackendSurface must be created here.
2112 */
2113 rc = vmsvga3dDXContextFromCid(pState, idDXContext, &pDXContext);
2114 AssertRCReturn(rc, rc);
2115
2116 rc = vmsvga3dBackSurfaceCreate(pState, pDXContext, pSurface);
2117 AssertRCReturn(rc, rc);
2118
2119 pBackendSurface = pSurface->pBackendSurface;
2120 }
2121
2122 /* Figure out whether the surface belongs to a DXContext or to the backend. */
2123 if (pSurface->idAssociatedContext != SVGA_ID_INVALID)
2124 vmsvga3dDXContextFromCid(pState, pSurface->idAssociatedContext, &pDXContext);
2125 else
2126 pDXContext = NULL;
2127
2128 DXDEVICE *pDevice;
2129 if (pDXContext)
2130 pDevice = &pDXContext->pBackendDXContext->device;
2131 else
2132 pDevice = &pBackend->device;
2133 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
2134
2135 SVGA3dBox clipBox;
2136 if (pBox)
2137 {
2138 clipBox = *pBox;
2139 vmsvgaR3ClipBox(&pSurface->paMipmapLevels[0].mipmapSize, &clipBox);
2140 ASSERT_GUEST_RETURN(clipBox.w && clipBox.h && clipBox.d, VERR_INVALID_PARAMETER);
2141 }
2142 else
2143 {
2144 clipBox.x = 0;
2145 clipBox.y = 0;
2146 clipBox.z = 0;
2147 clipBox.w = pSurface->paMipmapLevels[0].mipmapSize.width;
2148 clipBox.h = pSurface->paMipmapLevels[0].mipmapSize.height;
2149 clipBox.d = pSurface->paMipmapLevels[0].mipmapSize.depth;
2150 }
2151
2152 /** @todo D3D11_MAP_WRITE does not work with D3D11_USAGE_DYNAMIC resources. Probably VMSVGA3D_SURFACE_MAP_WRITE is not necessary. */
2153 D3D11_MAP d3d11MapType;
2154 switch (enmMapType)
2155 {
2156 case VMSVGA3D_SURFACE_MAP_READ: d3d11MapType = D3D11_MAP_READ; break;
2157 case VMSVGA3D_SURFACE_MAP_WRITE: d3d11MapType = D3D11_MAP_WRITE; break;
2158 case VMSVGA3D_SURFACE_MAP_READ_WRITE: d3d11MapType = D3D11_MAP_READ_WRITE; break;
2159 case VMSVGA3D_SURFACE_MAP_WRITE_DISCARD: d3d11MapType = D3D11_MAP_WRITE_DISCARD; break;
2160 default:
2161 AssertFailed();
2162 return VERR_INVALID_PARAMETER;
2163 }
2164
2165 D3D11_MAPPED_SUBRESOURCE mappedResource;
2166 RT_ZERO(mappedResource);
2167
2168 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
2169 {
2170 ID3D11Texture2D *pMappedTexture;
2171 if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
2172 {
2173 pMappedTexture = pBackendSurface->u.ScreenTarget.pStagingTexture;
2174
2175 /** @todo Wait for the surface to finish drawing. */
2176 if (pBackendSurface->SharedTextureTree)
2177 {
2178 int rc2 = RTAvlU32DoWithAll(&pBackendSurface->SharedTextureTree, 0, dxContextFlushShared, pState);
2179 AssertRC(rc2);
2180 }
2181
2182 /* Copy the texture content to the staging texture. */
2183 pDevice->pImmediateContext->CopyResource(pBackendSurface->u.ScreenTarget.pStagingTexture, pBackendSurface->u.ScreenTarget.pTexture);
2184 }
2185 else
2186 pMappedTexture = pBackendSurface->u.ScreenTarget.pDynamicTexture;
2187
2188 UINT const Subresource = 0; /* Screen target surfaces have only one subresource. */
2189 HRESULT hr = pDevice->pImmediateContext->Map(pMappedTexture, Subresource,
2190 d3d11MapType, /* MapFlags = */ 0, &mappedResource);
2191 if (SUCCEEDED(hr))
2192 {
2193 pMap->enmMapType = enmMapType;
2194 pMap->box = clipBox;
2195 pMap->cbPixel = pSurface->cbBlock;
2196 pMap->cbRowPitch = mappedResource.RowPitch;
2197 pMap->cbDepthPitch = mappedResource.DepthPitch;
2198 pMap->pvData = (uint8_t *)mappedResource.pData
2199 + pMap->box.x * pMap->cbPixel
2200 + pMap->box.y * pMap->cbRowPitch
2201 + pMap->box.z * pMap->cbDepthPitch;
2202 }
2203 else
2204 rc = VERR_NOT_SUPPORTED;
2205 }
2206 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE)
2207 {
2208 ID3D11Texture2D *pMappedTexture;
2209 if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
2210 {
2211 pMappedTexture = pBackendSurface->u.ScreenTarget.pStagingTexture;
2212
2213 /* Copy the texture content to the staging texture. */
2214 pDevice->pImmediateContext->CopyResource(pBackendSurface->u.ScreenTarget.pStagingTexture, pBackendSurface->u.ScreenTarget.pTexture);
2215 }
2216 else
2217 pMappedTexture = pBackendSurface->u.ScreenTarget.pDynamicTexture;
2218
2219 UINT const Subresource = 0; /* Screen target surfaces have only one subresource. */
2220 HRESULT hr = pDevice->pImmediateContext->Map(pMappedTexture, Subresource,
2221 d3d11MapType, /* MapFlags = */ 0, &mappedResource);
2222 if (SUCCEEDED(hr))
2223 {
2224 pMap->enmMapType = enmMapType;
2225 pMap->box = clipBox;
2226 pMap->cbPixel = pSurface->cbBlock;
2227 pMap->cbRowPitch = mappedResource.RowPitch;
2228 pMap->cbDepthPitch = mappedResource.DepthPitch;
2229 pMap->pvData = (uint8_t *)mappedResource.pData
2230 + pMap->box.x * pMap->cbPixel
2231 + pMap->box.y * pMap->cbRowPitch
2232 + pMap->box.z * pMap->cbDepthPitch;
2233 }
2234 else
2235 rc = VERR_NOT_SUPPORTED;
2236 }
2237 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
2238 {
2239 UINT const Subresource = 0; /* Buffers have only one subresource. */
2240 HRESULT hr = pDevice->pImmediateContext->Map(pSurface->pBackendSurface->u.Buffer.pBuffer, Subresource,
2241 d3d11MapType, /* MapFlags = */ 0, &mappedResource);
2242 if (SUCCEEDED(hr))
2243 {
2244 pMap->enmMapType = enmMapType;
2245 pMap->box = clipBox;
2246 pMap->cbPixel = pSurface->cbBlock;
2247 pMap->cbRowPitch = mappedResource.RowPitch;
2248 pMap->cbDepthPitch = mappedResource.DepthPitch;
2249 pMap->pvData = (uint8_t *)mappedResource.pData
2250 + pMap->box.x * pMap->cbPixel
2251 + pMap->box.y * pMap->cbRowPitch
2252 + pMap->box.z * pMap->cbDepthPitch;
2253 }
2254 else
2255 rc = VERR_NOT_SUPPORTED;
2256 }
2257 else
2258 {
2259 // UINT D3D11CalcSubresource(UINT MipSlice, UINT ArraySlice, UINT MipLevels);
2260 /** @todo Implement. */
2261 AssertFailed();
2262 rc = VERR_NOT_IMPLEMENTED;
2263 }
2264
2265 return rc;
2266}
2267
2268
2269static DECLCALLBACK(int) vmsvga3dSurfaceUnmap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImage, VMSVGA3D_MAPPED_SURFACE *pMap, bool fWritten)
2270{
2271 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2272 AssertReturn(pState, VERR_INVALID_STATE);
2273
2274 PVMSVGA3DBACKEND pBackend = pState->pBackend;
2275 AssertReturn(pBackend, VERR_INVALID_STATE);
2276
2277 PVMSVGA3DSURFACE pSurface;
2278 int rc = vmsvga3dSurfaceFromSid(pState, pImage->sid, &pSurface);
2279 AssertRCReturn(rc, rc);
2280
2281 /* The called should not use the function for system memory surfaces. */
2282 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
2283 AssertReturn(pBackendSurface, VERR_INVALID_PARAMETER);
2284
2285 PVMSVGA3DDXCONTEXT pDXContext;
2286 /* Figure out whether the surface belongs to a DXContext or to the backend. */
2287 if (pSurface->idAssociatedContext != SVGA_ID_INVALID)
2288 vmsvga3dDXContextFromCid(pState, pSurface->idAssociatedContext, &pDXContext);
2289 else
2290 pDXContext = NULL;
2291
2292 DXDEVICE *pDevice;
2293 if (pDXContext)
2294 pDevice = &pDXContext->pBackendDXContext->device;
2295 else
2296 pDevice = &pBackend->device;
2297 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
2298
2299 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
2300 {
2301 ID3D11Texture2D *pMappedTexture;
2302 if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ)
2303 pMappedTexture = pBackendSurface->u.ScreenTarget.pStagingTexture;
2304 else
2305 pMappedTexture = pBackendSurface->u.ScreenTarget.pDynamicTexture;
2306
2307 UINT const Subresource = 0; /* Screen target surfaces have only one subresource. */
2308 pDevice->pImmediateContext->Unmap(pMappedTexture, Subresource);
2309
2310 if ( fWritten
2311 && ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
2312 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
2313 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
2314 {
2315 ID3D11Resource *pDstResource = pBackendSurface->u.ScreenTarget.pTexture;
2316 UINT DstSubresource = Subresource;
2317 UINT DstX = pMap->box.x;
2318 UINT DstY = pMap->box.y;
2319 UINT DstZ = pMap->box.z;
2320 ID3D11Resource *pSrcResource = pBackendSurface->u.ScreenTarget.pDynamicTexture;
2321 UINT SrcSubresource = Subresource;
2322 D3D11_BOX SrcBox;
2323 SrcBox.left = pMap->box.x;
2324 SrcBox.top = pMap->box.y;
2325 SrcBox.front = pMap->box.z;
2326 SrcBox.right = pMap->box.x + pMap->box.w;
2327 SrcBox.bottom = pMap->box.y + pMap->box.h;
2328 SrcBox.back = pMap->box.z + pMap->box.d;
2329 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
2330 pSrcResource, SrcSubresource, &SrcBox);
2331 }
2332 }
2333 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE)
2334 {
2335 ID3D11Texture2D *pMappedTexture;
2336 if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ)
2337 pMappedTexture = pBackendSurface->u.ScreenTarget.pStagingTexture;
2338 else
2339 pMappedTexture = pBackendSurface->u.ScreenTarget.pDynamicTexture;
2340
2341 UINT const Subresource = 0; /* Screen target surfaces have only one subresource. */
2342 pDevice->pImmediateContext->Unmap(pMappedTexture, Subresource);
2343
2344 if ( fWritten
2345 && ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
2346 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
2347 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
2348 {
2349 ID3D11Resource *pDstResource = pBackendSurface->u.ScreenTarget.pTexture;
2350 UINT DstSubresource = Subresource;
2351 UINT DstX = pMap->box.x;
2352 UINT DstY = pMap->box.y;
2353 UINT DstZ = pMap->box.z;
2354 ID3D11Resource *pSrcResource = pBackendSurface->u.ScreenTarget.pDynamicTexture;
2355 UINT SrcSubresource = Subresource;
2356 D3D11_BOX SrcBox;
2357 SrcBox.left = pMap->box.x;
2358 SrcBox.top = pMap->box.y;
2359 SrcBox.front = pMap->box.z;
2360 SrcBox.right = pMap->box.x + pMap->box.w;
2361 SrcBox.bottom = pMap->box.y + pMap->box.h;
2362 SrcBox.back = pMap->box.z + pMap->box.d;
2363 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
2364 pSrcResource, SrcSubresource, &SrcBox);
2365 }
2366 }
2367 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
2368 {
2369 UINT const Subresource = 0; /* Buffers have only one subresource. */
2370 pDevice->pImmediateContext->Unmap(pBackendSurface->u.Buffer.pBuffer, Subresource);
2371 }
2372 else
2373 {
2374 AssertFailed();
2375 rc = VERR_NOT_IMPLEMENTED;
2376 }
2377
2378 return rc;
2379}
2380
2381
2382static DECLCALLBACK(int) vmsvga3dScreenTargetBind(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, uint32_t sid)
2383{
2384 int rc = VINF_SUCCESS;
2385
2386 PVMSVGA3DSURFACE pSurface;
2387 if (sid != SVGA_ID_INVALID)
2388 {
2389 /* Create the surface if does not yet exist. */
2390 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2391 AssertReturn(pState, VERR_INVALID_STATE);
2392
2393 rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
2394 AssertRCReturn(rc, rc);
2395
2396 if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
2397 {
2398 /* Create the actual texture. */
2399 rc = vmsvga3dBackSurfaceCreateScreenTarget(pState, pSurface);
2400 AssertRCReturn(rc, rc);
2401 }
2402 }
2403 else
2404 pSurface = NULL;
2405
2406 /* Notify the HW accelerated screen if it is used. */
2407 VMSVGAHWSCREEN *pHwScreen = pScreen->pHwScreen;
2408 if (!pHwScreen)
2409 return VINF_SUCCESS;
2410
2411 /* Same surface -> do nothing. */
2412 if (pHwScreen->sidScreenTarget == sid)
2413 return VINF_SUCCESS;
2414
2415 if (sid != SVGA_ID_INVALID)
2416 {
2417 AssertReturn( pSurface->pBackendSurface
2418 && pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET, VERR_INVALID_PARAMETER);
2419
2420 HANDLE const hSharedSurface = pHwScreen->SharedHandle;
2421 rc = vmsvga3dDrvNotifyBindSurface(pThisCC, pScreen, hSharedSurface);
2422 }
2423
2424 if (RT_SUCCESS(rc))
2425 {
2426 pHwScreen->sidScreenTarget = sid;
2427 }
2428
2429 return rc;
2430}
2431
2432
2433static DECLCALLBACK(int) vmsvga3dScreenTargetUpdate(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, SVGA3dRect const *pRect)
2434{
2435 VMSVGAHWSCREEN *pHwScreen = pScreen->pHwScreen;
2436 AssertReturn(pHwScreen, VERR_NOT_SUPPORTED);
2437
2438 if (pHwScreen->sidScreenTarget == SVGA_ID_INVALID)
2439 return VINF_SUCCESS; /* No surface bound. */
2440
2441 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2442 AssertReturn(pState, VERR_INVALID_STATE);
2443
2444 PVMSVGA3DBACKEND pBackend = pState->pBackend;
2445 AssertReturn(pBackend, VERR_INVALID_STATE);
2446
2447 PVMSVGA3DSURFACE pSurface;
2448 int rc = vmsvga3dSurfaceFromSid(pState, pHwScreen->sidScreenTarget, &pSurface);
2449 AssertRCReturn(rc, rc);
2450
2451 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
2452 AssertReturn(pBackendSurface && pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET, VERR_INVALID_PARAMETER);
2453
2454 SVGA3dRect boundRect;
2455 boundRect.x = 0;
2456 boundRect.y = 0;
2457 boundRect.w = pSurface->paMipmapLevels[0].mipmapSize.width;
2458 boundRect.h = pSurface->paMipmapLevels[0].mipmapSize.height;
2459 SVGA3dRect clipRect = *pRect;
2460 vmsvgaR3Clip3dRect(&boundRect, &clipRect);
2461 ASSERT_GUEST_RETURN(clipRect.w && clipRect.h, VERR_INVALID_PARAMETER);
2462
2463 /* Copy the screen texture to the shared surface. */
2464 DWORD result = pHwScreen->pDXGIKeyedMutex->AcquireSync(0, 10000);
2465 if (result == WAIT_OBJECT_0)
2466 {
2467 ID3D11Query *pQuery = 0;
2468 D3D11_QUERY_DESC qd;
2469 RT_ZERO(qd);
2470 qd.Query = D3D11_QUERY_EVENT;
2471 HRESULT hr2 = pBackend->device.pDevice->CreateQuery(&qd, &pQuery);
2472 Assert(hr2 == S_OK); RT_NOREF(hr2);
2473
2474 pBackend->device.pImmediateContext->CopyResource(pHwScreen->pTexture, pBackendSurface->u.ScreenTarget.pTexture);
2475
2476 pBackend->device.pImmediateContext->Flush();
2477
2478 pBackend->device.pImmediateContext->End(pQuery);
2479
2480 BOOL queryData;
2481 while (pBackend->device.pImmediateContext->GetData(pQuery, &queryData, sizeof(queryData), 0) != S_OK)
2482 {
2483 RTThreadYield();
2484 }
2485 D3D_RELEASE(pQuery);
2486
2487 result = pHwScreen->pDXGIKeyedMutex->ReleaseSync(1);
2488 }
2489 else
2490 AssertFailed();
2491
2492 rc = vmsvga3dDrvNotifyUpdate(pThisCC, pScreen, pRect->x, pRect->y, pRect->w, pRect->h);
2493 return rc;
2494}
2495
2496
2497void vmsvga3dUpdateHostScreenViewport(PVGASTATECC pThisCC, uint32_t idScreen, VMSVGAVIEWPORT const *pOldViewport)
2498{
2499 RT_NOREF(pThisCC, idScreen, pOldViewport);
2500 /** @todo Scroll the screen content without requiring the guest to redraw. */
2501}
2502
2503
2504int vmsvga3dQueryCaps(PVGASTATECC pThisCC, SVGA3dDevCapIndex idx3dCaps, uint32_t *pu32Val)
2505{
2506 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2507 AssertReturn(pState, VERR_INVALID_STATE);
2508
2509 int rc = VINF_SUCCESS;
2510
2511 *pu32Val = 0;
2512
2513 if (idx3dCaps > SVGA3D_DEVCAP_MAX)
2514 {
2515 LogRelMax(16, ("VMSVGA: unsupported SVGA3D_DEVCAP %d\n", idx3dCaps));
2516 return VERR_NOT_SUPPORTED;
2517 }
2518
2519 D3D_FEATURE_LEVEL const FeatureLevel = pState->pBackend->device.FeatureLevel;
2520
2521 /* Most values are taken from:
2522 * https://docs.microsoft.com/en-us/windows/win32/direct3d11/overviews-direct3d-11-devices-downlevel-intro
2523 *
2524 * Shader values are from
2525 * https://docs.microsoft.com/en-us/windows/win32/direct3dhlsl/dx-graphics-hlsl-models
2526 */
2527
2528 switch (idx3dCaps)
2529 {
2530 case SVGA3D_DEVCAP_3D:
2531 *pu32Val = 1;
2532 break;
2533
2534 case SVGA3D_DEVCAP_MAX_LIGHTS:
2535 *pu32Val = SVGA3D_NUM_LIGHTS; /* VGPU9. Not applicable to DX11. */
2536 break;
2537
2538 case SVGA3D_DEVCAP_MAX_TEXTURES:
2539 *pu32Val = SVGA3D_NUM_TEXTURE_UNITS; /* VGPU9. Not applicable to DX11. */
2540 break;
2541
2542 case SVGA3D_DEVCAP_MAX_CLIP_PLANES:
2543 *pu32Val = SVGA3D_NUM_CLIPPLANES;
2544 break;
2545
2546 case SVGA3D_DEVCAP_VERTEX_SHADER_VERSION:
2547 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2548 *pu32Val = SVGA3DVSVERSION_40;
2549 else
2550 *pu32Val = SVGA3DVSVERSION_30;
2551 break;
2552
2553 case SVGA3D_DEVCAP_VERTEX_SHADER:
2554 *pu32Val = 1;
2555 break;
2556
2557 case SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION:
2558 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2559 *pu32Val = SVGA3DPSVERSION_40;
2560 else
2561 *pu32Val = SVGA3DPSVERSION_30;
2562 break;
2563
2564 case SVGA3D_DEVCAP_FRAGMENT_SHADER:
2565 *pu32Val = 1;
2566 break;
2567
2568 case SVGA3D_DEVCAP_MAX_RENDER_TARGETS:
2569 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2570 *pu32Val = 8;
2571 else
2572 *pu32Val = 4;
2573 break;
2574
2575 case SVGA3D_DEVCAP_S23E8_TEXTURES:
2576 case SVGA3D_DEVCAP_S10E5_TEXTURES:
2577 /* Must be obsolete by now; surface format caps specify the same thing. */
2578 break;
2579
2580 case SVGA3D_DEVCAP_MAX_FIXED_VERTEXBLEND:
2581 /* Obsolete */
2582 break;
2583
2584 /*
2585 * 2. The BUFFER_FORMAT capabilities are deprecated, and they always
2586 * return TRUE. Even on physical hardware that does not support
2587 * these formats natively, the SVGA3D device will provide an emulation
2588 * which should be invisible to the guest OS.
2589 */
2590 case SVGA3D_DEVCAP_D16_BUFFER_FORMAT:
2591 case SVGA3D_DEVCAP_D24S8_BUFFER_FORMAT:
2592 case SVGA3D_DEVCAP_D24X8_BUFFER_FORMAT:
2593 *pu32Val = 1;
2594 break;
2595
2596 case SVGA3D_DEVCAP_QUERY_TYPES:
2597 /* Obsolete */
2598 break;
2599
2600 case SVGA3D_DEVCAP_TEXTURE_GRADIENT_SAMPLING:
2601 /* Obsolete */
2602 break;
2603
2604 case SVGA3D_DEVCAP_MAX_POINT_SIZE:
2605 AssertCompile(sizeof(uint32_t) == sizeof(float));
2606 *(float *)pu32Val = 256.0f; /* VGPU9. Not applicable to DX11. */
2607 break;
2608
2609 case SVGA3D_DEVCAP_MAX_SHADER_TEXTURES:
2610 /* Obsolete */
2611 break;
2612
2613 case SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH:
2614 case SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT:
2615 if (FeatureLevel >= D3D_FEATURE_LEVEL_11_0)
2616 *pu32Val = 16384;
2617 else if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2618 *pu32Val = 8192;
2619 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
2620 *pu32Val = 4096;
2621 else
2622 *pu32Val = 2048;
2623 break;
2624
2625 case SVGA3D_DEVCAP_MAX_VOLUME_EXTENT:
2626 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2627 *pu32Val = 2048;
2628 else
2629 *pu32Val = 256;
2630 break;
2631
2632 case SVGA3D_DEVCAP_MAX_TEXTURE_REPEAT:
2633 if (FeatureLevel >= D3D_FEATURE_LEVEL_11_0)
2634 *pu32Val = 16384;
2635 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
2636 *pu32Val = 8192;
2637 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
2638 *pu32Val = 2048;
2639 else
2640 *pu32Val = 128;
2641 break;
2642
2643 case SVGA3D_DEVCAP_MAX_TEXTURE_ASPECT_RATIO:
2644 /* Obsolete */
2645 break;
2646
2647 case SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY:
2648 if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
2649 *pu32Val = D3D11_REQ_MAXANISOTROPY;
2650 else
2651 *pu32Val = 2; // D3D_FL9_1_DEFAULT_MAX_ANISOTROPY;
2652 break;
2653
2654 case SVGA3D_DEVCAP_MAX_PRIMITIVE_COUNT:
2655 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2656 *pu32Val = UINT32_MAX;
2657 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
2658 *pu32Val = 1048575; // D3D_FL9_2_IA_PRIMITIVE_MAX_COUNT;
2659 else
2660 *pu32Val = 65535; // D3D_FL9_1_IA_PRIMITIVE_MAX_COUNT;
2661 break;
2662
2663 case SVGA3D_DEVCAP_MAX_VERTEX_INDEX:
2664 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2665 *pu32Val = UINT32_MAX;
2666 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
2667 *pu32Val = 1048575;
2668 else
2669 *pu32Val = 65534;
2670 break;
2671
2672 case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS:
2673 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2674 *pu32Val = UINT32_MAX;
2675 else
2676 *pu32Val = 512;
2677 break;
2678
2679 case SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_INSTRUCTIONS:
2680 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2681 *pu32Val = UINT32_MAX;
2682 else
2683 *pu32Val = 512;
2684 break;
2685
2686 case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS:
2687 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2688 *pu32Val = 4096;
2689 else
2690 *pu32Val = 32;
2691 break;
2692
2693 case SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS:
2694 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2695 *pu32Val = 4096;
2696 else
2697 *pu32Val = 32;
2698 break;
2699
2700 case SVGA3D_DEVCAP_TEXTURE_OPS:
2701 /* Obsolete */
2702 break;
2703
2704 case SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8:
2705 case SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8:
2706 case SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10:
2707 case SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5:
2708 case SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5:
2709 case SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4:
2710 case SVGA3D_DEVCAP_SURFACEFMT_R5G6B5:
2711 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16:
2712 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8:
2713 case SVGA3D_DEVCAP_SURFACEFMT_ALPHA8:
2714 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8:
2715 case SVGA3D_DEVCAP_SURFACEFMT_Z_D16:
2716 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8:
2717 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8:
2718 case SVGA3D_DEVCAP_SURFACEFMT_DXT1:
2719 case SVGA3D_DEVCAP_SURFACEFMT_DXT2:
2720 case SVGA3D_DEVCAP_SURFACEFMT_DXT3:
2721 case SVGA3D_DEVCAP_SURFACEFMT_DXT4:
2722 case SVGA3D_DEVCAP_SURFACEFMT_DXT5:
2723 case SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8:
2724 case SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10:
2725 case SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8:
2726 case SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8:
2727 case SVGA3D_DEVCAP_SURFACEFMT_CxV8U8:
2728 case SVGA3D_DEVCAP_SURFACEFMT_R_S10E5:
2729 case SVGA3D_DEVCAP_SURFACEFMT_R_S23E8:
2730 case SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5:
2731 case SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8:
2732 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5:
2733 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8:
2734 case SVGA3D_DEVCAP_SURFACEFMT_V16U16:
2735 case SVGA3D_DEVCAP_SURFACEFMT_G16R16:
2736 case SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16:
2737 case SVGA3D_DEVCAP_SURFACEFMT_UYVY:
2738 case SVGA3D_DEVCAP_SURFACEFMT_YUY2:
2739 case SVGA3D_DEVCAP_SURFACEFMT_NV12:
2740 case SVGA3D_DEVCAP_DEAD10: /* SVGA3D_DEVCAP_SURFACEFMT_AYUV */
2741 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF16:
2742 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF24:
2743 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT:
2744 case SVGA3D_DEVCAP_SURFACEFMT_ATI1:
2745 case SVGA3D_DEVCAP_SURFACEFMT_ATI2:
2746 case SVGA3D_DEVCAP_SURFACEFMT_YV12:
2747 {
2748 SVGA3dSurfaceFormat const enmFormat = vmsvgaDXDevCapSurfaceFmt2Format(idx3dCaps);
2749 rc = vmsvgaDXCheckFormatSupportPreDX(pState, enmFormat, pu32Val);
2750 break;
2751 }
2752
2753 case SVGA3D_DEVCAP_MISSING62:
2754 /* Unused */
2755 break;
2756
2757 case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEXTURES:
2758 /* Obsolete */
2759 break;
2760
2761 case SVGA3D_DEVCAP_MAX_SIMULTANEOUS_RENDER_TARGETS:
2762 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2763 *pu32Val = 8;
2764 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
2765 *pu32Val = 4; // D3D_FL9_3_SIMULTANEOUS_RENDER_TARGET_COUNT
2766 else
2767 *pu32Val = 1; // D3D_FL9_1_SIMULTANEOUS_RENDER_TARGET_COUNT
2768 break;
2769
2770 case SVGA3D_DEVCAP_DEAD4: /* SVGA3D_DEVCAP_MULTISAMPLE_NONMASKABLESAMPLES */
2771 case SVGA3D_DEVCAP_DEAD5: /* SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES */
2772 *pu32Val = (1 << (2-1)) | (1 << (4-1)) | (1 << (8-1)); /* 2x, 4x, 8x */
2773 break;
2774
2775 case SVGA3D_DEVCAP_DEAD7: /* SVGA3D_DEVCAP_ALPHATOCOVERAGE */
2776 /* Obsolete */
2777 break;
2778
2779 case SVGA3D_DEVCAP_DEAD6: /* SVGA3D_DEVCAP_SUPERSAMPLE */
2780 /* Obsolete */
2781 break;
2782
2783 case SVGA3D_DEVCAP_AUTOGENMIPMAPS:
2784 *pu32Val = 1;
2785 break;
2786
2787 case SVGA3D_DEVCAP_MAX_CONTEXT_IDS:
2788 *pu32Val = SVGA3D_MAX_CONTEXT_IDS;
2789 break;
2790
2791 case SVGA3D_DEVCAP_MAX_SURFACE_IDS:
2792 *pu32Val = SVGA3D_MAX_SURFACE_IDS;
2793 break;
2794
2795 case SVGA3D_DEVCAP_DEAD1:
2796 /* Obsolete */
2797 break;
2798
2799 case SVGA3D_DEVCAP_DEAD8: /* SVGA3D_DEVCAP_VIDEO_DECODE */
2800 /* Obsolete */
2801 break;
2802
2803 case SVGA3D_DEVCAP_DEAD9: /* SVGA3D_DEVCAP_VIDEO_PROCESS */
2804 /* Obsolete */
2805 break;
2806
2807 case SVGA3D_DEVCAP_LINE_AA:
2808 *pu32Val = 1;
2809 break;
2810
2811 case SVGA3D_DEVCAP_LINE_STIPPLE:
2812 *pu32Val = 0; /* DX11 does not seem to support this directly. */
2813 break;
2814
2815 case SVGA3D_DEVCAP_MAX_LINE_WIDTH:
2816 AssertCompile(sizeof(uint32_t) == sizeof(float));
2817 *(float *)pu32Val = 1.0f;
2818 break;
2819
2820 case SVGA3D_DEVCAP_MAX_AA_LINE_WIDTH:
2821 AssertCompile(sizeof(uint32_t) == sizeof(float));
2822 *(float *)pu32Val = 1.0f;
2823 break;
2824
2825 case SVGA3D_DEVCAP_DEAD3: /* Old SVGA3D_DEVCAP_LOGICOPS */
2826 /* Deprecated. */
2827 AssertCompile(SVGA3D_DEVCAP_DEAD3 == 92); /* Newer SVGA headers redefine this. */
2828 break;
2829
2830 case SVGA3D_DEVCAP_TS_COLOR_KEY:
2831 *pu32Val = 0; /* DX11 does not seem to support this directly. */
2832 break;
2833
2834 case SVGA3D_DEVCAP_DEAD2:
2835 break;
2836
2837 case SVGA3D_DEVCAP_DXCONTEXT:
2838 *pu32Val = 1;
2839 break;
2840
2841 case SVGA3D_DEVCAP_DEAD11: /* SVGA3D_DEVCAP_MAX_TEXTURE_ARRAY_SIZE */
2842 *pu32Val = D3D11_REQ_TEXTURE2D_ARRAY_AXIS_DIMENSION;
2843 break;
2844
2845 case SVGA3D_DEVCAP_DX_MAX_VERTEXBUFFERS:
2846 *pu32Val = D3D11_IA_VERTEX_INPUT_RESOURCE_SLOT_COUNT;
2847 break;
2848
2849 case SVGA3D_DEVCAP_DX_MAX_CONSTANT_BUFFERS:
2850 *pu32Val = D3D11_COMMONSHADER_CONSTANT_BUFFER_HW_SLOT_COUNT;
2851 break;
2852
2853 case SVGA3D_DEVCAP_DX_PROVOKING_VERTEX:
2854 *pu32Val = 0; /* boolean */
2855 break;
2856
2857 case SVGA3D_DEVCAP_DXFMT_X8R8G8B8:
2858 case SVGA3D_DEVCAP_DXFMT_A8R8G8B8:
2859 case SVGA3D_DEVCAP_DXFMT_R5G6B5:
2860 case SVGA3D_DEVCAP_DXFMT_X1R5G5B5:
2861 case SVGA3D_DEVCAP_DXFMT_A1R5G5B5:
2862 case SVGA3D_DEVCAP_DXFMT_A4R4G4B4:
2863 case SVGA3D_DEVCAP_DXFMT_Z_D32:
2864 case SVGA3D_DEVCAP_DXFMT_Z_D16:
2865 case SVGA3D_DEVCAP_DXFMT_Z_D24S8:
2866 case SVGA3D_DEVCAP_DXFMT_Z_D15S1:
2867 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8:
2868 case SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4:
2869 case SVGA3D_DEVCAP_DXFMT_LUMINANCE16:
2870 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8:
2871 case SVGA3D_DEVCAP_DXFMT_DXT1:
2872 case SVGA3D_DEVCAP_DXFMT_DXT2:
2873 case SVGA3D_DEVCAP_DXFMT_DXT3:
2874 case SVGA3D_DEVCAP_DXFMT_DXT4:
2875 case SVGA3D_DEVCAP_DXFMT_DXT5:
2876 case SVGA3D_DEVCAP_DXFMT_BUMPU8V8:
2877 case SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5:
2878 case SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8:
2879 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1:
2880 case SVGA3D_DEVCAP_DXFMT_ARGB_S10E5:
2881 case SVGA3D_DEVCAP_DXFMT_ARGB_S23E8:
2882 case SVGA3D_DEVCAP_DXFMT_A2R10G10B10:
2883 case SVGA3D_DEVCAP_DXFMT_V8U8:
2884 case SVGA3D_DEVCAP_DXFMT_Q8W8V8U8:
2885 case SVGA3D_DEVCAP_DXFMT_CxV8U8:
2886 case SVGA3D_DEVCAP_DXFMT_X8L8V8U8:
2887 case SVGA3D_DEVCAP_DXFMT_A2W10V10U10:
2888 case SVGA3D_DEVCAP_DXFMT_ALPHA8:
2889 case SVGA3D_DEVCAP_DXFMT_R_S10E5:
2890 case SVGA3D_DEVCAP_DXFMT_R_S23E8:
2891 case SVGA3D_DEVCAP_DXFMT_RG_S10E5:
2892 case SVGA3D_DEVCAP_DXFMT_RG_S23E8:
2893 case SVGA3D_DEVCAP_DXFMT_BUFFER:
2894 case SVGA3D_DEVCAP_DXFMT_Z_D24X8:
2895 case SVGA3D_DEVCAP_DXFMT_V16U16:
2896 case SVGA3D_DEVCAP_DXFMT_G16R16:
2897 case SVGA3D_DEVCAP_DXFMT_A16B16G16R16:
2898 case SVGA3D_DEVCAP_DXFMT_UYVY:
2899 case SVGA3D_DEVCAP_DXFMT_YUY2:
2900 case SVGA3D_DEVCAP_DXFMT_NV12:
2901 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD2: /* SVGA3D_DEVCAP_DXFMT_AYUV */
2902 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS:
2903 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT:
2904 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT:
2905 case SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS:
2906 case SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT:
2907 case SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT:
2908 case SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT:
2909 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS:
2910 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT:
2911 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM:
2912 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT:
2913 case SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS:
2914 case SVGA3D_DEVCAP_DXFMT_R32G32_UINT:
2915 case SVGA3D_DEVCAP_DXFMT_R32G32_SINT:
2916 case SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS:
2917 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT:
2918 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24:
2919 case SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT:
2920 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS:
2921 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT:
2922 case SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT:
2923 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS:
2924 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM:
2925 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB:
2926 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT:
2927 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT:
2928 case SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS:
2929 case SVGA3D_DEVCAP_DXFMT_R16G16_UINT:
2930 case SVGA3D_DEVCAP_DXFMT_R16G16_SINT:
2931 case SVGA3D_DEVCAP_DXFMT_R32_TYPELESS:
2932 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT:
2933 case SVGA3D_DEVCAP_DXFMT_R32_UINT:
2934 case SVGA3D_DEVCAP_DXFMT_R32_SINT:
2935 case SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS:
2936 case SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT:
2937 case SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8:
2938 case SVGA3D_DEVCAP_DXFMT_X24_G8_UINT:
2939 case SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS:
2940 case SVGA3D_DEVCAP_DXFMT_R8G8_UNORM:
2941 case SVGA3D_DEVCAP_DXFMT_R8G8_UINT:
2942 case SVGA3D_DEVCAP_DXFMT_R8G8_SINT:
2943 case SVGA3D_DEVCAP_DXFMT_R16_TYPELESS:
2944 case SVGA3D_DEVCAP_DXFMT_R16_UNORM:
2945 case SVGA3D_DEVCAP_DXFMT_R16_UINT:
2946 case SVGA3D_DEVCAP_DXFMT_R16_SNORM:
2947 case SVGA3D_DEVCAP_DXFMT_R16_SINT:
2948 case SVGA3D_DEVCAP_DXFMT_R8_TYPELESS:
2949 case SVGA3D_DEVCAP_DXFMT_R8_UNORM:
2950 case SVGA3D_DEVCAP_DXFMT_R8_UINT:
2951 case SVGA3D_DEVCAP_DXFMT_R8_SNORM:
2952 case SVGA3D_DEVCAP_DXFMT_R8_SINT:
2953 case SVGA3D_DEVCAP_DXFMT_P8:
2954 case SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP:
2955 case SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM:
2956 case SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM:
2957 case SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS:
2958 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB:
2959 case SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS:
2960 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB:
2961 case SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS:
2962 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB:
2963 case SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS:
2964 case SVGA3D_DEVCAP_DXFMT_ATI1:
2965 case SVGA3D_DEVCAP_DXFMT_BC4_SNORM:
2966 case SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS:
2967 case SVGA3D_DEVCAP_DXFMT_ATI2:
2968 case SVGA3D_DEVCAP_DXFMT_BC5_SNORM:
2969 case SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM:
2970 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS:
2971 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB:
2972 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS:
2973 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB:
2974 case SVGA3D_DEVCAP_DXFMT_Z_DF16:
2975 case SVGA3D_DEVCAP_DXFMT_Z_DF24:
2976 case SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT:
2977 case SVGA3D_DEVCAP_DXFMT_YV12:
2978 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT:
2979 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT:
2980 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM:
2981 case SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT:
2982 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM:
2983 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM:
2984 case SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT:
2985 case SVGA3D_DEVCAP_DXFMT_R16G16_UNORM:
2986 case SVGA3D_DEVCAP_DXFMT_R16G16_SNORM:
2987 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT:
2988 case SVGA3D_DEVCAP_DXFMT_R8G8_SNORM:
2989 case SVGA3D_DEVCAP_DXFMT_R16_FLOAT:
2990 case SVGA3D_DEVCAP_DXFMT_D16_UNORM:
2991 case SVGA3D_DEVCAP_DXFMT_A8_UNORM:
2992 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM:
2993 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM:
2994 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM:
2995 case SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM:
2996 case SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM:
2997 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM:
2998 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM:
2999 case SVGA3D_DEVCAP_DXFMT_BC4_UNORM:
3000 case SVGA3D_DEVCAP_DXFMT_BC5_UNORM:
3001 case SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS:
3002 case SVGA3D_DEVCAP_DXFMT_BC6H_UF16:
3003 case SVGA3D_DEVCAP_DXFMT_BC6H_SF16:
3004 case SVGA3D_DEVCAP_DXFMT_BC7_TYPELESS:
3005 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM:
3006 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM_SRGB:
3007 {
3008 SVGA3dSurfaceFormat const enmFormat = vmsvgaDXDevCapDxfmt2Format(idx3dCaps);
3009 rc = vmsvgaDXCheckFormatSupport(pState, enmFormat, pu32Val);
3010 break;
3011 }
3012
3013 case SVGA3D_DEVCAP_SM41:
3014 *pu32Val = 0; /* boolean */
3015 break;
3016
3017 case SVGA3D_DEVCAP_MULTISAMPLE_2X:
3018 *pu32Val = 0; /* boolean */
3019 break;
3020
3021 case SVGA3D_DEVCAP_MULTISAMPLE_4X:
3022 *pu32Val = 0; /* boolean */
3023 break;
3024
3025 case SVGA3D_DEVCAP_MS_FULL_QUALITY:
3026 *pu32Val = 0; /* boolean */
3027 break;
3028
3029 case SVGA3D_DEVCAP_LOGICOPS:
3030 AssertCompile(SVGA3D_DEVCAP_LOGICOPS == 248);
3031 *pu32Val = 0; /* boolean */
3032 break;
3033
3034 case SVGA3D_DEVCAP_LOGIC_BLENDOPS:
3035 *pu32Val = 0; /* boolean */
3036 break;
3037
3038 case SVGA3D_DEVCAP_RESERVED_1:
3039 break;
3040
3041 case SVGA3D_DEVCAP_RESERVED_2:
3042 break;
3043
3044 case SVGA3D_DEVCAP_SM5:
3045 *pu32Val = 0; /* boolean */
3046 break;
3047
3048 case SVGA3D_DEVCAP_MULTISAMPLE_8X:
3049 *pu32Val = 0; /* boolean */
3050 break;
3051
3052 case SVGA3D_DEVCAP_MAX:
3053 case SVGA3D_DEVCAP_INVALID:
3054 rc = VERR_NOT_SUPPORTED;
3055 break;
3056 }
3057
3058 return rc;
3059}
3060
3061
3062/* Handle resize */
3063int vmsvga3dChangeMode(PVGASTATECC pThisCC)
3064{
3065 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3066 AssertReturn(pState, VERR_INVALID_STATE);
3067
3068 return VINF_SUCCESS;
3069}
3070
3071
3072int vmsvga3dSurfaceCopy(PVGASTATECC pThisCC, SVGA3dSurfaceImageId dest, SVGA3dSurfaceImageId src,
3073 uint32_t cCopyBoxes, SVGA3dCopyBox *pBox)
3074{
3075 RT_NOREF(dest, src, cCopyBoxes, pBox);
3076
3077 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3078 AssertReturn(pState, VERR_INVALID_STATE);
3079
3080 AssertFailed();
3081 return VERR_NOT_IMPLEMENTED;
3082}
3083
3084
3085/**
3086 * Create a new 3d context
3087 *
3088 * @returns VBox status code.
3089 * @param pThisCC The VGA/VMSVGA state for ring-3.
3090 * @param cid Context id
3091 */
3092int vmsvga3dContextDefine(PVGASTATECC pThisCC, uint32_t cid)
3093{
3094 RT_NOREF(cid);
3095
3096 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3097 AssertReturn(pState, VERR_INVALID_STATE);
3098
3099 AssertFailed();
3100 return VERR_NOT_IMPLEMENTED;
3101}
3102
3103
3104/**
3105 * Destroy an existing 3d context
3106 *
3107 * @returns VBox status code.
3108 * @param pThisCC The VGA/VMSVGA state for ring-3.
3109 * @param cid Context id
3110 */
3111int vmsvga3dContextDestroy(PVGASTATECC pThisCC, uint32_t cid)
3112{
3113 RT_NOREF(cid);
3114
3115 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3116 AssertReturn(pState, VERR_INVALID_STATE);
3117
3118 AssertFailed();
3119 return VINF_SUCCESS;
3120}
3121
3122
3123int vmsvga3dSetTransform(PVGASTATECC pThisCC, uint32_t cid, SVGA3dTransformType type, float matrix[16])
3124{
3125 RT_NOREF(cid, type, matrix);
3126
3127 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3128 AssertReturn(pState, VERR_INVALID_STATE);
3129
3130 AssertFailed();
3131 return VINF_SUCCESS;
3132}
3133
3134
3135int vmsvga3dSetZRange(PVGASTATECC pThisCC, uint32_t cid, SVGA3dZRange zRange)
3136{
3137 RT_NOREF(cid, zRange);
3138
3139 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3140 AssertReturn(pState, VERR_INVALID_STATE);
3141
3142 AssertFailed();
3143 return VINF_SUCCESS;
3144}
3145
3146
3147int vmsvga3dSetRenderState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cRenderStates, SVGA3dRenderState *pRenderState)
3148{
3149 RT_NOREF(cid, cRenderStates, pRenderState);
3150
3151 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3152 AssertReturn(pState, VERR_INVALID_STATE);
3153
3154 AssertFailed();
3155 return VINF_SUCCESS;
3156}
3157
3158
3159int vmsvga3dSetRenderTarget(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRenderTargetType type, SVGA3dSurfaceImageId target)
3160{
3161 RT_NOREF(cid, type, target);
3162
3163 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3164 AssertReturn(pState, VERR_INVALID_STATE);
3165
3166 AssertFailed();
3167 return VINF_SUCCESS;
3168}
3169
3170
3171int vmsvga3dSetTextureState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cTextureStates, SVGA3dTextureState *pTextureState)
3172{
3173 RT_NOREF(cid, cTextureStates, pTextureState);
3174
3175 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3176 AssertReturn(pState, VERR_INVALID_STATE);
3177
3178 AssertFailed();
3179 return VINF_SUCCESS;
3180}
3181
3182
3183int vmsvga3dSetMaterial(PVGASTATECC pThisCC, uint32_t cid, SVGA3dFace face, SVGA3dMaterial *pMaterial)
3184{
3185 RT_NOREF(cid, face, pMaterial);
3186
3187 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3188 AssertReturn(pState, VERR_INVALID_STATE);
3189
3190 AssertFailed();
3191 return VINF_SUCCESS;
3192}
3193
3194
3195int vmsvga3dSetLightData(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, SVGA3dLightData *pData)
3196{
3197 RT_NOREF(cid, index, pData);
3198
3199 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3200 AssertReturn(pState, VERR_INVALID_STATE);
3201
3202 AssertFailed();
3203 return VINF_SUCCESS;
3204}
3205
3206
3207int vmsvga3dSetLightEnabled(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, uint32_t enabled)
3208{
3209 RT_NOREF(cid, index, enabled);
3210
3211 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3212 AssertReturn(pState, VERR_INVALID_STATE);
3213
3214 AssertFailed();
3215 return VINF_SUCCESS;
3216}
3217
3218
3219int vmsvga3dSetViewPort(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
3220{
3221 RT_NOREF(cid, pRect);
3222
3223 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3224 AssertReturn(pState, VERR_INVALID_STATE);
3225
3226 AssertFailed();
3227 return VINF_SUCCESS;
3228}
3229
3230
3231int vmsvga3dSetClipPlane(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, float plane[4])
3232{
3233 RT_NOREF(cid, index, plane);
3234
3235 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3236 AssertReturn(pState, VERR_INVALID_STATE);
3237
3238 AssertFailed();
3239 return VINF_SUCCESS;
3240}
3241
3242
3243int vmsvga3dCommandClear(PVGASTATECC pThisCC, uint32_t cid, SVGA3dClearFlag clearFlag, uint32_t color, float depth,
3244 uint32_t stencil, uint32_t cRects, SVGA3dRect *pRect)
3245{
3246 /* From SVGA3D_BeginClear comments:
3247 *
3248 * Clear is not affected by clipping, depth test, or other
3249 * render state which affects the fragment pipeline.
3250 *
3251 * Therefore this code must ignore the current scissor rect.
3252 */
3253
3254 RT_NOREF(cid, clearFlag, color, depth, stencil, cRects, pRect);
3255
3256 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3257 AssertReturn(pState, VERR_INVALID_STATE);
3258
3259 AssertFailed();
3260 return VINF_SUCCESS;
3261}
3262
3263
3264int vmsvga3dDrawPrimitives(PVGASTATECC pThisCC, uint32_t cid, uint32_t numVertexDecls, SVGA3dVertexDecl *pVertexDecl,
3265 uint32_t numRanges, SVGA3dPrimitiveRange *pRange,
3266 uint32_t cVertexDivisor, SVGA3dVertexDivisor *pVertexDivisor)
3267{
3268 RT_NOREF(cid, numVertexDecls, pVertexDecl, numRanges, pRange, cVertexDivisor, pVertexDivisor);
3269
3270 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3271 AssertReturn(pState, VERR_INVALID_STATE);
3272
3273 AssertFailed();
3274 return VINF_SUCCESS;
3275}
3276
3277
3278int vmsvga3dSetScissorRect(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
3279{
3280 RT_NOREF(cid, pRect);
3281
3282 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3283 AssertReturn(pState, VERR_INVALID_STATE);
3284
3285 AssertFailed();
3286 return VINF_SUCCESS;
3287}
3288
3289
3290int vmsvga3dGenerateMipmaps(PVGASTATECC pThisCC, uint32_t sid, SVGA3dTextureFilter filter)
3291{
3292 RT_NOREF(sid, filter);
3293
3294 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3295 AssertReturn(pState, VERR_INVALID_STATE);
3296
3297 AssertFailed();
3298 return VINF_SUCCESS;
3299}
3300
3301
3302int vmsvga3dShaderDefine(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type,
3303 uint32_t cbData, uint32_t *pShaderData)
3304{
3305 RT_NOREF(cid, shid, type, cbData, pShaderData);
3306
3307 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3308 AssertReturn(pState, VERR_INVALID_STATE);
3309
3310 AssertFailed();
3311 return VINF_SUCCESS;
3312}
3313
3314
3315int vmsvga3dShaderDestroy(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type)
3316{
3317 RT_NOREF(cid, shid, type);
3318
3319 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3320 AssertReturn(pState, VERR_INVALID_STATE);
3321
3322 AssertFailed();
3323 return VINF_SUCCESS;
3324}
3325
3326
3327int vmsvga3dShaderSet(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext, uint32_t cid, SVGA3dShaderType type, uint32_t shid)
3328{
3329 RT_NOREF(pContext, cid, type, shid);
3330
3331 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3332 AssertReturn(pState, VERR_INVALID_STATE);
3333
3334 AssertFailed();
3335 return VINF_SUCCESS;
3336}
3337
3338
3339int vmsvga3dShaderSetConst(PVGASTATECC pThisCC, uint32_t cid, uint32_t reg, SVGA3dShaderType type,
3340 SVGA3dShaderConstType ctype, uint32_t cRegisters, uint32_t *pValues)
3341{
3342 RT_NOREF(cid, reg, type, ctype, cRegisters, pValues);
3343
3344 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3345 AssertReturn(pState, VERR_INVALID_STATE);
3346
3347 AssertFailed();
3348 return VINF_SUCCESS;
3349}
3350
3351
3352/**
3353 * Destroy backend specific surface bits (part of SVGA_3D_CMD_SURFACE_DESTROY).
3354 *
3355 * @param pState The VMSVGA3d state.
3356 * @param pSurface The surface being destroyed.
3357 */
3358void vmsvga3dBackSurfaceDestroy(PVMSVGA3DSTATE pState, PVMSVGA3DSURFACE pSurface)
3359{
3360 PVMSVGA3DBACKEND pBackend = pState->pBackend;
3361 AssertReturnVoid(pBackend);
3362
3363 /* The caller should not use the function for system memory surfaces. */
3364 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
3365 if (!pBackendSurface)
3366 return;
3367 pSurface->pBackendSurface = NULL;
3368
3369 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
3370 {
3371 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pStagingTexture);
3372 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pDynamicTexture);
3373 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pTexture);
3374 }
3375 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE)
3376 {
3377 D3D_RELEASE(pBackendSurface->u.Texture.pStagingTexture);
3378 D3D_RELEASE(pBackendSurface->u.Texture.pDynamicTexture);
3379 D3D_RELEASE(pBackendSurface->u.Texture.pTexture);
3380 }
3381 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
3382 {
3383 D3D_RELEASE(pBackendSurface->u.Buffer.pBuffer);
3384 }
3385 else
3386 {
3387 AssertFailed();
3388 }
3389
3390 RTMemFree(pBackendSurface);
3391}
3392
3393
3394/**
3395 * Backend worker for implementing SVGA_3D_CMD_SURFACE_STRETCHBLT.
3396 *
3397 * @returns VBox status code.
3398 * @param pThis The VGA device instance.
3399 * @param pState The VMSVGA3d state.
3400 * @param pDstSurface The destination host surface.
3401 * @param uDstFace The destination face (valid).
3402 * @param uDstMipmap The destination mipmap level (valid).
3403 * @param pDstBox The destination box.
3404 * @param pSrcSurface The source host surface.
3405 * @param uSrcFace The destination face (valid).
3406 * @param uSrcMipmap The source mimap level (valid).
3407 * @param pSrcBox The source box.
3408 * @param enmMode The strecht blt mode .
3409 * @param pContext The VMSVGA3d context (already current for OGL).
3410 */
3411int vmsvga3dBackSurfaceStretchBlt(PVGASTATE pThis, PVMSVGA3DSTATE pState,
3412 PVMSVGA3DSURFACE pDstSurface, uint32_t uDstFace, uint32_t uDstMipmap, SVGA3dBox const *pDstBox,
3413 PVMSVGA3DSURFACE pSrcSurface, uint32_t uSrcFace, uint32_t uSrcMipmap, SVGA3dBox const *pSrcBox,
3414 SVGA3dStretchBltMode enmMode, PVMSVGA3DCONTEXT pContext)
3415{
3416 RT_NOREF(pThis, pState, pDstSurface, uDstFace, uDstMipmap, pDstBox,
3417 pSrcSurface, uSrcFace, uSrcMipmap, pSrcBox, enmMode, pContext);
3418
3419 AssertFailed();
3420 return VINF_SUCCESS;
3421}
3422
3423
3424/**
3425 * Backend worker for implementing SVGA_3D_CMD_SURFACE_DMA that copies one box.
3426 *
3427 * @returns Failure status code or @a rc.
3428 * @param pThis The shared VGA/VMSVGA instance data.
3429 * @param pThisCC The VGA/VMSVGA state for ring-3.
3430 * @param pState The VMSVGA3d state.
3431 * @param pSurface The host surface.
3432 * @param pMipLevel Mipmap level. The caller knows it already.
3433 * @param uHostFace The host face (valid).
3434 * @param uHostMipmap The host mipmap level (valid).
3435 * @param GuestPtr The guest pointer.
3436 * @param cbGuestPitch The guest pitch.
3437 * @param transfer The transfer direction.
3438 * @param pBox The box to copy (clipped, valid, except for guest's srcx, srcy, srcz).
3439 * @param pContext The context (for OpenGL).
3440 * @param rc The current rc for all boxes.
3441 * @param iBox The current box number (for Direct 3D).
3442 */
3443int vmsvga3dBackSurfaceDMACopyBox(PVGASTATE pThis, PVGASTATECC pThisCC, PVMSVGA3DSTATE pState, PVMSVGA3DSURFACE pSurface,
3444 PVMSVGA3DMIPMAPLEVEL pMipLevel, uint32_t uHostFace, uint32_t uHostMipmap,
3445 SVGAGuestPtr GuestPtr, uint32_t cbGuestPitch, SVGA3dTransferType transfer,
3446 SVGA3dCopyBox const *pBox, PVMSVGA3DCONTEXT pContext, int rc, int iBox)
3447{
3448 RT_NOREF(pState, pMipLevel, pContext, iBox);
3449
3450 /* The called should not use the function for system memory surfaces. */
3451 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
3452 AssertReturn(pBackendSurface, VERR_INVALID_PARAMETER);
3453
3454 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
3455 {
3456 /** @todo This is generic code and should be in DevVGA-SVGA3d.cpp for backends which support Map/Unmap. */
3457 AssertReturn(uHostFace == 0 && uHostMipmap == 0, VERR_INVALID_PARAMETER);
3458 AssertReturn(transfer == SVGA3D_WRITE_HOST_VRAM, VERR_NOT_IMPLEMENTED); /** @todo Implement */
3459
3460 uint32_t const u32GuestBlockX = pBox->srcx / pSurface->cxBlock;
3461 uint32_t const u32GuestBlockY = pBox->srcy / pSurface->cyBlock;
3462 Assert(u32GuestBlockX * pSurface->cxBlock == pBox->srcx);
3463 Assert(u32GuestBlockY * pSurface->cyBlock == pBox->srcy);
3464 uint32_t const cBlocksX = (pBox->w + pSurface->cxBlock - 1) / pSurface->cxBlock;
3465 uint32_t const cBlocksY = (pBox->h + pSurface->cyBlock - 1) / pSurface->cyBlock;
3466 AssertMsgReturn(cBlocksX && cBlocksY, ("Empty box %dx%d\n", pBox->w, pBox->h), VERR_INTERNAL_ERROR);
3467
3468 /* vmsvgaR3GmrTransfer verifies uGuestOffset.
3469 * srcx(u32GuestBlockX) and srcy(u32GuestBlockY) have been verified in vmsvga3dSurfaceDMA
3470 * to not cause 32 bit overflow when multiplied by cbBlock and cbGuestPitch.
3471 */
3472 uint64_t const uGuestOffset = u32GuestBlockX * pSurface->cbBlock + u32GuestBlockY * cbGuestPitch;
3473 AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
3474
3475 SVGA3dSurfaceImageId image;
3476 image.sid = pSurface->id;
3477 image.face = uHostFace;
3478 image.mipmap = uHostMipmap;
3479
3480 SVGA3dBox box;
3481 box.x = pBox->x;
3482 box.y = pBox->y;
3483 box.z = 0;
3484 box.w = pBox->w;
3485 box.h = pBox->h;
3486 box.d = 1;
3487
3488 VMSVGA3D_MAPPED_SURFACE map;
3489 rc = vmsvga3dSurfaceMap(pThisCC, pSurface->idAssociatedContext, &image, &box, VMSVGA3D_SURFACE_MAP_WRITE_DISCARD, &map);
3490 if (RT_SUCCESS(rc))
3491 {
3492 /* Prepare parameters for vmsvgaR3GmrTransfer, which needs the host buffer address, size
3493 * and offset of the first scanline.
3494 */
3495 uint32_t const cbLockedBuf = map.cbRowPitch * cBlocksY;
3496 uint8_t *pu8LockedBuf = (uint8_t *)map.pvData;
3497 uint32_t const offLockedBuf = 0;
3498
3499 rc = vmsvgaR3GmrTransfer(pThis,
3500 pThisCC,
3501 transfer,
3502 pu8LockedBuf,
3503 cbLockedBuf,
3504 offLockedBuf,
3505 map.cbRowPitch,
3506 GuestPtr,
3507 (uint32_t)uGuestOffset,
3508 cbGuestPitch,
3509 cBlocksX * pSurface->cbBlock,
3510 cBlocksY);
3511 AssertRC(rc);
3512
3513 // Log4(("first line:\n%.*Rhxd\n", cBlocksX * pSurface->cbBlock, LockedRect.pBits));
3514
3515 //vmsvga3dMapWriteBmpFile(&map, "Dynamic");
3516
3517 vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ true);
3518 }
3519#if 0
3520//ASMBreakpoint();
3521 rc = vmsvga3dSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
3522 if (RT_SUCCESS(rc))
3523 {
3524 vmsvga3dMapWriteBmpFile(&map, "Staging");
3525
3526 vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
3527 }
3528#endif
3529 }
3530 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE)
3531 {
3532 /** @todo This is generic code and should be in DevVGA-SVGA3d.cpp for backends which support Map/Unmap. */
3533 AssertReturn(uHostFace == 0 && uHostMipmap == 0, VERR_INVALID_PARAMETER);
3534
3535 uint32_t const u32GuestBlockX = pBox->srcx / pSurface->cxBlock;
3536 uint32_t const u32GuestBlockY = pBox->srcy / pSurface->cyBlock;
3537 Assert(u32GuestBlockX * pSurface->cxBlock == pBox->srcx);
3538 Assert(u32GuestBlockY * pSurface->cyBlock == pBox->srcy);
3539 uint32_t const cBlocksX = (pBox->w + pSurface->cxBlock - 1) / pSurface->cxBlock;
3540 uint32_t const cBlocksY = (pBox->h + pSurface->cyBlock - 1) / pSurface->cyBlock;
3541 AssertMsgReturn(cBlocksX && cBlocksY, ("Empty box %dx%d\n", pBox->w, pBox->h), VERR_INTERNAL_ERROR);
3542
3543 /* vmsvgaR3GmrTransfer verifies uGuestOffset.
3544 * srcx(u32GuestBlockX) and srcy(u32GuestBlockY) have been verified in vmsvga3dSurfaceDMA
3545 * to not cause 32 bit overflow when multiplied by cbBlock and cbGuestPitch.
3546 */
3547 uint64_t const uGuestOffset = u32GuestBlockX * pSurface->cbBlock + u32GuestBlockY * cbGuestPitch;
3548 AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
3549
3550 SVGA3dSurfaceImageId image;
3551 image.sid = pSurface->id;
3552 image.face = uHostFace;
3553 image.mipmap = uHostMipmap;
3554
3555 SVGA3dBox box;
3556 box.x = pBox->x;
3557 box.y = pBox->y;
3558 box.z = 0;
3559 box.w = pBox->w;
3560 box.h = pBox->h;
3561 box.d = 1;
3562
3563 VMSVGA3D_SURFACE_MAP const enmMap = transfer == SVGA3D_WRITE_HOST_VRAM
3564 ? VMSVGA3D_SURFACE_MAP_WRITE_DISCARD
3565 : VMSVGA3D_SURFACE_MAP_READ;
3566
3567 VMSVGA3D_MAPPED_SURFACE map;
3568 rc = vmsvga3dSurfaceMap(pThisCC, pSurface->idAssociatedContext, &image, &box, enmMap, &map);
3569 if (RT_SUCCESS(rc))
3570 {
3571 /* Prepare parameters for vmsvgaR3GmrTransfer, which needs the host buffer address, size
3572 * and offset of the first scanline.
3573 */
3574 uint32_t const cbLockedBuf = map.cbRowPitch * cBlocksY;
3575 uint8_t *pu8LockedBuf = (uint8_t *)map.pvData;
3576 uint32_t const offLockedBuf = 0;
3577
3578 rc = vmsvgaR3GmrTransfer(pThis,
3579 pThisCC,
3580 transfer,
3581 pu8LockedBuf,
3582 cbLockedBuf,
3583 offLockedBuf,
3584 map.cbRowPitch,
3585 GuestPtr,
3586 (uint32_t)uGuestOffset,
3587 cbGuestPitch,
3588 cBlocksX * pSurface->cbBlock,
3589 cBlocksY);
3590 AssertRC(rc);
3591
3592 bool const fWritten = (transfer == SVGA3D_WRITE_HOST_VRAM);
3593 vmsvga3dSurfaceUnmap(pThisCC, &image, &map, fWritten);
3594 }
3595 }
3596 else
3597 {
3598 AssertMsgFailed(("Unsupported surface type %d\n", pBackendSurface->enmResType));
3599 rc = VERR_NOT_IMPLEMENTED;
3600 }
3601
3602 return rc;
3603}
3604
3605
3606/**
3607 * Create D3D/OpenGL texture object for the specified surface.
3608 *
3609 * Surfaces are created when needed.
3610 *
3611 * @param pState The VMSVGA3d state.
3612 * @param pContext The context.
3613 * @param idAssociatedContext Probably the same as pContext->id.
3614 * @param pSurface The surface to create the texture for.
3615 */
3616int vmsvga3dBackCreateTexture(PVMSVGA3DSTATE pState, PVMSVGA3DCONTEXT pContext, uint32_t idAssociatedContext,
3617 PVMSVGA3DSURFACE pSurface)
3618
3619{
3620 RT_NOREF(pState, pContext, idAssociatedContext, pSurface);
3621
3622 AssertFailed();
3623 return VINF_SUCCESS;
3624}
3625
3626
3627int vmsvga3dOcclusionQueryCreate(PVMSVGA3DSTATE pState, PVMSVGA3DCONTEXT pContext)
3628{
3629 RT_NOREF(pState, pContext);
3630 AssertFailed();
3631 return VINF_SUCCESS;
3632}
3633
3634
3635int vmsvga3dOcclusionQueryBegin(PVMSVGA3DSTATE pState, PVMSVGA3DCONTEXT pContext)
3636{
3637 RT_NOREF(pState, pContext);
3638 AssertFailed();
3639 return VINF_SUCCESS;
3640}
3641
3642
3643int vmsvga3dOcclusionQueryEnd(PVMSVGA3DSTATE pState, PVMSVGA3DCONTEXT pContext)
3644{
3645 RT_NOREF(pState, pContext);
3646 AssertFailed();
3647 return VINF_SUCCESS;
3648}
3649
3650
3651int vmsvga3dOcclusionQueryGetData(PVMSVGA3DSTATE pState, PVMSVGA3DCONTEXT pContext, uint32_t *pu32Pixels)
3652{
3653 RT_NOREF(pState, pContext);
3654 *pu32Pixels = 0;
3655 AssertFailed();
3656 return VINF_SUCCESS;
3657}
3658
3659
3660int vmsvga3dOcclusionQueryDelete(PVMSVGA3DSTATE pState, PVMSVGA3DCONTEXT pContext)
3661{
3662 RT_NOREF(pState, pContext);
3663 AssertFailed();
3664 return VINF_SUCCESS;
3665}
3666
3667
3668/*
3669 * DX callbacks.
3670 */
3671
3672static DECLCALLBACK(int) vmsvga3dBackDXDefineContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3673{
3674 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3675
3676 /* Allocate a backend specific context structure. */
3677 PVMSVGA3DBACKENDDXCONTEXT pBackendDXContext = (PVMSVGA3DBACKENDDXCONTEXT)RTMemAllocZ(sizeof(VMSVGA3DBACKENDDXCONTEXT));
3678 AssertPtrReturn(pBackendDXContext, VERR_NO_MEMORY);
3679 pDXContext->pBackendDXContext = pBackendDXContext;
3680
3681 int rc = dxDeviceCreate(pBackend, &pBackendDXContext->device);
3682 return rc;
3683}
3684
3685
3686static DECLCALLBACK(int) vmsvga3dBackDXDestroyContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3687{
3688 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3689
3690 if (pDXContext->pBackendDXContext)
3691 {
3692 dxDeviceDestroy(pBackend, &pDXContext->pBackendDXContext->device);
3693
3694 RTMemFree(pDXContext->pBackendDXContext);
3695 pDXContext->pBackendDXContext = NULL;
3696 }
3697 return VINF_SUCCESS;
3698}
3699
3700
3701static DECLCALLBACK(int) vmsvga3dBackDXBindContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3702{
3703 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3704 RT_NOREF(pBackend, pDXContext);
3705 return VINF_SUCCESS;
3706}
3707
3708
3709static DECLCALLBACK(int) vmsvga3dBackDXReadbackContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3710{
3711 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3712
3713 RT_NOREF(pBackend, pDXContext);
3714 AssertFailed(); /** @todo Implement */
3715 return VERR_NOT_IMPLEMENTED;
3716}
3717
3718
3719static DECLCALLBACK(int) vmsvga3dBackDXInvalidateContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3720{
3721 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3722
3723 RT_NOREF(pBackend, pDXContext);
3724 AssertFailed(); /** @todo Implement */
3725 return VERR_NOT_IMPLEMENTED;
3726}
3727
3728
3729static DECLCALLBACK(int) vmsvga3dBackDXSetSingleConstantBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t slot, SVGA3dShaderType type, SVGA3dSurfaceId sid, uint32_t offsetInBytes, uint32_t sizeInBytes)
3730{
3731 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3732 RT_NOREF(pBackend);
3733
3734 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3735 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3736
3737 if (sid == SVGA_ID_INVALID)
3738 {
3739 dxConstantBufferSet(pDevice, slot, type, NULL);
3740 return VINF_SUCCESS;
3741 }
3742
3743 PVMSVGA3DSURFACE pSurface;
3744 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
3745 AssertRCReturn(rc, rc);
3746
3747 uint32_t const cbSurface = pSurface->paMipmapLevels[0].cbSurface;
3748 ASSERT_GUEST_RETURN( offsetInBytes < cbSurface
3749 && sizeInBytes <= cbSurface - offsetInBytes, VERR_INVALID_PARAMETER);
3750
3751 if (pSurface->pBackendSurface == NULL)
3752 {
3753 /* Create the resource. */
3754 rc = vmsvga3dBackSurfaceCreateConstantBuffer(pThisCC->svga.p3dState, pDXContext, pSurface);
3755 AssertRCReturn(rc, rc);
3756 }
3757
3758 if (pSurface->fDirty)
3759 {
3760 /* Get mobid for the surface and read from the MOB. */
3761 SVGA3dSurfaceImageId imageId;
3762 imageId.sid = sid;
3763 imageId.face = 0;
3764 imageId.mipmap = 0;
3765
3766 SVGA3dPoint ptSrc;
3767 ptSrc.x = offsetInBytes / pSurface->cbBlock;
3768 ptSrc.y = 0;
3769 ptSrc.z = 0;
3770
3771 SVGA3dBox boxDst;
3772 boxDst.x = 0;
3773 boxDst.y = 0;
3774 boxDst.z = 0;
3775 boxDst.w = sizeInBytes / pSurface->cbBlock;
3776 boxDst.h = 1;
3777 boxDst.d = 1;
3778
3779 rc = vmsvgaR3UpdateGBSurfaceEx(pThisCC, pDXContext->cid, &imageId, &boxDst, &ptSrc);
3780 AssertRCReturn(rc, rc);
3781 }
3782
3783 dxConstantBufferSet(pDevice, slot, type, pSurface->pBackendSurface->u.Buffer.pBuffer);
3784 return VINF_SUCCESS;
3785}
3786
3787
3788static DECLCALLBACK(int) vmsvga3dBackDXSetShaderResources(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startView, SVGA3dShaderType type, uint32_t cShaderResourceViewId, SVGA3dShaderResourceViewId const *paShaderResourceViewId)
3789{
3790 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3791 RT_NOREF(pBackend);
3792
3793 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3794 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3795
3796 uint32_t const idxShaderState = type - SVGA3D_SHADERTYPE_MIN;
3797 ID3D11ShaderResourceView *papShaderResourceView[SVGA3D_DX_MAX_SRVIEWS];
3798 for (uint32_t i = 0; i < cShaderResourceViewId; ++i)
3799 {
3800 SVGA3dShaderResourceViewId shaderResourceViewId = paShaderResourceViewId[i];
3801 if (shaderResourceViewId != SVGA3D_INVALID_ID)
3802 {
3803 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->pBackendDXContext->cShaderResourceView, VERR_INVALID_PARAMETER);
3804 papShaderResourceView[i] = pDXContext->pBackendDXContext->papShaderResourceView[shaderResourceViewId];
3805 }
3806 else
3807 papShaderResourceView[i] = NULL;
3808
3809 pDXContext->svgaDXContext.shaderState[idxShaderState].shaderResources[startView + i] = shaderResourceViewId;
3810 }
3811
3812 dxShaderResourceViewSet(pDevice, type, startView, cShaderResourceViewId, papShaderResourceView);
3813 return VINF_SUCCESS;
3814}
3815
3816
3817static DECLCALLBACK(int) vmsvga3dBackDXSetShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderType type, PVMSVGA3DSHADER pShader)
3818{
3819 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3820 RT_NOREF(pBackend);
3821
3822 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3823 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3824
3825 DXSHADER *pDXShader;
3826 if (pShader)
3827 {
3828 pDXShader = &pDXContext->pBackendDXContext->paShader[pShader->id];
3829 uint32_t const idxShaderState = pDXShader->enmShaderType - SVGA3D_SHADERTYPE_MIN;
3830 pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId = pShader->id;
3831 }
3832 else
3833 pDXShader = NULL;
3834
3835 dxShaderSet(pDevice, type, pDXShader);
3836 return VINF_SUCCESS;
3837}
3838
3839
3840static DECLCALLBACK(int) vmsvga3dBackDXSetSamplers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startSampler, SVGA3dShaderType type, uint32_t cSamplerId, SVGA3dSamplerId const *paSamplerId)
3841{
3842 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3843 RT_NOREF(pBackend);
3844
3845 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3846 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3847
3848 uint32_t const idxShaderState = type - SVGA3D_SHADERTYPE_MIN;
3849 ID3D11SamplerState *papSamplerState[SVGA3D_DX_MAX_SAMPLERS];
3850 for (uint32_t i = 0; i < cSamplerId; ++i)
3851 {
3852 SVGA3dSamplerId samplerId = paSamplerId[i];
3853 if (samplerId != SVGA3D_INVALID_ID)
3854 {
3855 ASSERT_GUEST_RETURN(samplerId < pDXContext->pBackendDXContext->cSamplerState, VERR_INVALID_PARAMETER);
3856 papSamplerState[i] = pDXContext->pBackendDXContext->papSamplerState[samplerId];
3857 }
3858 else
3859 papSamplerState[i] = NULL;
3860
3861 pDXContext->svgaDXContext.shaderState[idxShaderState].samplers[startSampler + i] = samplerId;
3862 }
3863
3864 dxSamplerSet(pDevice, type, startSampler, cSamplerId, papSamplerState);
3865 return VINF_SUCCESS;
3866}
3867
3868
3869static DECLCALLBACK(int) vmsvga3dBackDXDraw(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t vertexCount, uint32_t startVertexLocation)
3870{
3871 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3872 RT_NOREF(pBackend);
3873
3874 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3875 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3876
3877 if (pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN)
3878 pDevice->pImmediateContext->Draw(vertexCount, startVertexLocation);
3879 else
3880 {
3881 /*
3882 * Emulate SVGA3D_PRIMITIVE_TRIANGLEFAN using an indexed draw of a triangle list.
3883 */
3884
3885 /* Make sure that 16 bit indices are enough. 20000 ~= 65536 / 3 */
3886 AssertReturn(vertexCount <= 20000, VERR_NOT_SUPPORTED);
3887
3888 /* Generate indices. */
3889 UINT const IndexCount = 3 * (vertexCount - 2); /* 3_per_triangle * num_triangles */
3890 UINT const cbAlloc = IndexCount * sizeof(USHORT);
3891 USHORT *paIndices = (USHORT *)RTMemAlloc(cbAlloc);
3892 AssertReturn(paIndices, VERR_NO_MEMORY);
3893 USHORT iVertex = 1;
3894 for (UINT i = 0; i < IndexCount; i+= 3)
3895 {
3896 paIndices[i] = 0;
3897 paIndices[i + 1] = iVertex;
3898 ++iVertex;
3899 paIndices[i + 2] = iVertex;
3900 }
3901
3902 D3D11_SUBRESOURCE_DATA InitData;
3903 InitData.pSysMem = paIndices;
3904 InitData.SysMemPitch = cbAlloc;
3905 InitData.SysMemSlicePitch = cbAlloc;
3906
3907 D3D11_BUFFER_DESC bd;
3908 RT_ZERO(bd);
3909 bd.ByteWidth = cbAlloc;
3910 bd.Usage = D3D11_USAGE_IMMUTABLE;
3911 bd.BindFlags = D3D11_BIND_INDEX_BUFFER;
3912 //bd.CPUAccessFlags = 0;
3913 //bd.MiscFlags = 0;
3914 //bd.StructureByteStride = 0;
3915
3916 ID3D11Buffer *pIndexBuffer = 0;
3917 HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, &InitData, &pIndexBuffer);
3918 Assert(SUCCEEDED(hr));RT_NOREF(hr);
3919
3920 /* Save the current index buffer. */
3921 ID3D11Buffer *pSavedIndexBuffer = 0;
3922 DXGI_FORMAT SavedFormat = DXGI_FORMAT_UNKNOWN;
3923 UINT SavedOffset = 0;
3924 pDevice->pImmediateContext->IAGetIndexBuffer(&pSavedIndexBuffer, &SavedFormat, &SavedOffset);
3925
3926 /* Set up the device state. */
3927 pDevice->pImmediateContext->IASetIndexBuffer(pIndexBuffer, DXGI_FORMAT_R16_UINT, 0);
3928 pDevice->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST);
3929
3930 UINT const StartIndexLocation = 0;
3931 INT const BaseVertexLocation = startVertexLocation;
3932 pDevice->pImmediateContext->DrawIndexed(IndexCount, StartIndexLocation, BaseVertexLocation);
3933
3934 /* Restore the device state. */
3935 pDevice->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP);
3936 pDevice->pImmediateContext->IASetIndexBuffer(pSavedIndexBuffer, SavedFormat, SavedOffset);
3937 D3D_RELEASE(pSavedIndexBuffer);
3938
3939 /* Cleanup. */
3940 D3D_RELEASE(pIndexBuffer);
3941 RTMemFree(paIndices);
3942 }
3943
3944 return VINF_SUCCESS;
3945}
3946
3947
3948static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexed(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t indexCount, uint32_t startIndexLocation, int32_t baseVertexLocation)
3949{
3950 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3951 RT_NOREF(pBackend);
3952
3953 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3954 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3955
3956 Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
3957
3958 pDevice->pImmediateContext->DrawIndexed(indexCount, startIndexLocation, baseVertexLocation);
3959 return VINF_SUCCESS;
3960}
3961
3962
3963static DECLCALLBACK(int) vmsvga3dBackDXDrawInstanced(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3964{
3965 Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
3966 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3967
3968 RT_NOREF(pBackend, pDXContext);
3969 AssertFailed(); /** @todo Implement */
3970 return VERR_NOT_IMPLEMENTED;
3971}
3972
3973
3974static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexedInstanced(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3975{
3976 Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
3977 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3978
3979 RT_NOREF(pBackend, pDXContext);
3980 AssertFailed(); /** @todo Implement */
3981 return VERR_NOT_IMPLEMENTED;
3982}
3983
3984
3985static DECLCALLBACK(int) vmsvga3dBackDXDrawAuto(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3986{
3987 Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
3988 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3989
3990 RT_NOREF(pBackend, pDXContext);
3991 AssertFailed(); /** @todo Implement */
3992 return VERR_NOT_IMPLEMENTED;
3993}
3994
3995
3996static DECLCALLBACK(int) vmsvga3dBackDXSetInputLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId)
3997{
3998 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3999 RT_NOREF(pBackend);
4000
4001 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4002 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4003
4004 pDXContext->svgaDXContext.inputAssembly.layoutId = elementLayoutId;
4005
4006 DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
4007 if (!pDXElementLayout->pElementLayout)
4008 {
4009 uint32_t const idxShaderState = SVGA3D_SHADERTYPE_VS - SVGA3D_SHADERTYPE_MIN;
4010 uint32_t const shid = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId;
4011 AssertReturnStmt(shid < pDXContext->pBackendDXContext->cShader,
4012 LogRelMax(16, ("VMSVGA: DX shader is not set in DXSetInputLayout: shid = 0x%x\n", shid)),
4013 VERR_INVALID_STATE);
4014 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[shid];
4015 AssertReturnStmt(pDXShader->pvDXBC,
4016 LogRelMax(16, ("VMSVGA: DX shader bytecode is not available in DXSetInputLayout: shid = %u\n", shid)),
4017 VERR_INVALID_STATE);
4018 HRESULT hr = pDevice->pDevice->CreateInputLayout(pDXElementLayout->aElementDesc,
4019 pDXElementLayout->cElementDesc,
4020 pDXShader->pvDXBC,
4021 pDXShader->cbDXBC,
4022 &pDXElementLayout->pElementLayout);
4023 AssertReturn(SUCCEEDED(hr), VERR_NO_MEMORY);
4024 }
4025
4026 pDevice->pImmediateContext->IASetInputLayout(pDXElementLayout->pElementLayout);
4027 return VINF_SUCCESS;
4028}
4029
4030
4031static DECLCALLBACK(int) vmsvga3dBackDXSetVertexBuffers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startBuffer, uint32_t cVertexBuffer, SVGA3dVertexBuffer const *paVertexBuffer)
4032{
4033 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4034 RT_NOREF(pBackend);
4035
4036 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4037 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4038
4039 /* For each paVertexBuffer[i]:
4040 * If the vertex buffer object does not exist then create it.
4041 * If the surface has been updated by the guest then update the buffer object.
4042 * Use IASetVertexBuffers to set the buffers.
4043 */
4044
4045 ID3D11Buffer *paResources[SVGA3D_DX_MAX_VERTEXBUFFERS];
4046 UINT paStride[SVGA3D_DX_MAX_VERTEXBUFFERS];
4047 UINT paOffset[SVGA3D_DX_MAX_VERTEXBUFFERS];
4048
4049 for (uint32_t i = 0; i < cVertexBuffer; ++i)
4050 {
4051 uint32_t const idxVertexBuffer = startBuffer + i;
4052
4053 /* Get corresponding resource. Create the buffer if does not yet exist. */
4054 if (paVertexBuffer[i].sid != SVGA_ID_INVALID)
4055 {
4056 PVMSVGA3DSURFACE pSurface;
4057 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, paVertexBuffer[i].sid, &pSurface);
4058 AssertRCReturn(rc, rc);
4059
4060 if (pSurface->pBackendSurface == NULL)
4061 {
4062 /* Create the resource. */
4063 rc = vmsvga3dBackSurfaceCreateBuffer(pThisCC->svga.p3dState, pDXContext, pSurface);
4064 AssertRCReturn(rc, rc);
4065 }
4066
4067 if (pSurface->fDirty)
4068 {
4069 /* Get mobid for the surface and read from the MOB. */
4070 SVGA3dSurfaceImageId imageId;
4071 imageId.sid = paVertexBuffer[i].sid;
4072 imageId.face = 0;
4073 imageId.mipmap = 0;
4074
4075 SVGA3dBox box;
4076 box.x = 0;
4077 box.y = 0;
4078 box.z = 0;
4079 box.w = pSurface->paMipmapLevels[0].mipmapSize.width;
4080 box.h = 1;
4081 box.d = 1;
4082
4083 rc = vmsvgaR3UpdateGBSurface(pThisCC, pDXContext->cid, &imageId, &box);
4084 AssertRCReturn(rc, rc);
4085 }
4086
4087 paResources[idxVertexBuffer] = pSurface->pBackendSurface->u.Buffer.pBuffer;
4088 paStride[idxVertexBuffer] = paVertexBuffer[i].stride;
4089 paOffset[idxVertexBuffer] = paVertexBuffer[i].offset;
4090 }
4091 else
4092 {
4093 paResources[idxVertexBuffer] = NULL;
4094 paStride[idxVertexBuffer] = 0;
4095 paOffset[idxVertexBuffer] = 0;
4096 }
4097
4098 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].bufferId = paVertexBuffer[i].sid;
4099 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].stride = paVertexBuffer[i].stride;
4100 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].offset = paVertexBuffer[i].offset;
4101 }
4102
4103 pDevice->pImmediateContext->IASetVertexBuffers(startBuffer, cVertexBuffer, paResources, paStride, paOffset);
4104
4105 return VINF_SUCCESS;
4106}
4107
4108
4109static DECLCALLBACK(int) vmsvga3dBackDXSetIndexBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId sid, SVGA3dSurfaceFormat format, uint32_t offset)
4110{
4111 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4112 RT_NOREF(pBackend);
4113
4114 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4115 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4116
4117 /* Get corresponding resource. Create the buffer if does not yet exist. */
4118 ID3D11Buffer *pResource;
4119 DXGI_FORMAT enmDxgiFormat;
4120
4121 if (sid != SVGA_ID_INVALID)
4122 {
4123 PVMSVGA3DSURFACE pSurface;
4124 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
4125 AssertRCReturn(rc, rc);
4126
4127 if (pSurface->pBackendSurface == NULL)
4128 {
4129 /* Create the resource. */
4130 rc = vmsvga3dBackSurfaceCreateBuffer(pThisCC->svga.p3dState, pDXContext, pSurface);
4131 AssertRCReturn(rc, rc);
4132 }
4133
4134 if (pSurface->fDirty)
4135 {
4136 /* Get mobid for the surface and read from the MOB. */
4137 SVGA3dSurfaceImageId imageId;
4138 imageId.sid = sid;
4139 imageId.face = 0;
4140 imageId.mipmap = 0;
4141
4142 SVGA3dBox box;
4143 box.x = 0;
4144 box.y = 0;
4145 box.z = 0;
4146 box.w = pSurface->paMipmapLevels[0].mipmapSize.width;
4147 box.h = 1;
4148 box.d = 1;
4149
4150 rc = vmsvgaR3UpdateGBSurface(pThisCC, pDXContext->cid, &imageId, &box);
4151 AssertRCReturn(rc, rc);
4152 }
4153
4154 pResource = pSurface->pBackendSurface->u.Buffer.pBuffer;
4155 enmDxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(format);
4156 AssertReturn(enmDxgiFormat == DXGI_FORMAT_R16_UINT || enmDxgiFormat == DXGI_FORMAT_R32_UINT, VERR_INVALID_PARAMETER);
4157 }
4158 else
4159 {
4160 pResource = NULL;
4161 enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
4162 }
4163
4164 pDevice->pImmediateContext->IASetIndexBuffer(pResource, enmDxgiFormat, offset);
4165 return VINF_SUCCESS;
4166}
4167
4168static D3D11_PRIMITIVE_TOPOLOGY dxTopology(SVGA3dPrimitiveType primitiveType)
4169{
4170 static D3D11_PRIMITIVE_TOPOLOGY const aD3D11PrimitiveTopology[SVGA3D_PRIMITIVE_MAX] =
4171 {
4172 D3D11_PRIMITIVE_TOPOLOGY_UNDEFINED,
4173 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST,
4174 D3D11_PRIMITIVE_TOPOLOGY_POINTLIST,
4175 D3D11_PRIMITIVE_TOPOLOGY_LINELIST,
4176 D3D11_PRIMITIVE_TOPOLOGY_LINESTRIP,
4177 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP,
4178 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP, /* SVGA3D_PRIMITIVE_TRIANGLEFAN: No FAN in D3D11. */
4179 D3D11_PRIMITIVE_TOPOLOGY_LINELIST_ADJ,
4180 D3D11_PRIMITIVE_TOPOLOGY_LINESTRIP_ADJ,
4181 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST_ADJ,
4182 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP_ADJ,
4183 D3D11_PRIMITIVE_TOPOLOGY_1_CONTROL_POINT_PATCHLIST,
4184 D3D11_PRIMITIVE_TOPOLOGY_2_CONTROL_POINT_PATCHLIST,
4185 D3D11_PRIMITIVE_TOPOLOGY_3_CONTROL_POINT_PATCHLIST,
4186 D3D11_PRIMITIVE_TOPOLOGY_4_CONTROL_POINT_PATCHLIST,
4187 D3D11_PRIMITIVE_TOPOLOGY_5_CONTROL_POINT_PATCHLIST,
4188 D3D11_PRIMITIVE_TOPOLOGY_6_CONTROL_POINT_PATCHLIST,
4189 D3D11_PRIMITIVE_TOPOLOGY_7_CONTROL_POINT_PATCHLIST,
4190 D3D11_PRIMITIVE_TOPOLOGY_8_CONTROL_POINT_PATCHLIST,
4191 D3D11_PRIMITIVE_TOPOLOGY_9_CONTROL_POINT_PATCHLIST,
4192 D3D11_PRIMITIVE_TOPOLOGY_10_CONTROL_POINT_PATCHLIST,
4193 D3D11_PRIMITIVE_TOPOLOGY_11_CONTROL_POINT_PATCHLIST,
4194 D3D11_PRIMITIVE_TOPOLOGY_12_CONTROL_POINT_PATCHLIST,
4195 D3D11_PRIMITIVE_TOPOLOGY_13_CONTROL_POINT_PATCHLIST,
4196 D3D11_PRIMITIVE_TOPOLOGY_14_CONTROL_POINT_PATCHLIST,
4197 D3D11_PRIMITIVE_TOPOLOGY_15_CONTROL_POINT_PATCHLIST,
4198 D3D11_PRIMITIVE_TOPOLOGY_16_CONTROL_POINT_PATCHLIST,
4199 D3D11_PRIMITIVE_TOPOLOGY_17_CONTROL_POINT_PATCHLIST,
4200 D3D11_PRIMITIVE_TOPOLOGY_18_CONTROL_POINT_PATCHLIST,
4201 D3D11_PRIMITIVE_TOPOLOGY_19_CONTROL_POINT_PATCHLIST,
4202 D3D11_PRIMITIVE_TOPOLOGY_20_CONTROL_POINT_PATCHLIST,
4203 D3D11_PRIMITIVE_TOPOLOGY_21_CONTROL_POINT_PATCHLIST,
4204 D3D11_PRIMITIVE_TOPOLOGY_22_CONTROL_POINT_PATCHLIST,
4205 D3D11_PRIMITIVE_TOPOLOGY_23_CONTROL_POINT_PATCHLIST,
4206 D3D11_PRIMITIVE_TOPOLOGY_24_CONTROL_POINT_PATCHLIST,
4207 D3D11_PRIMITIVE_TOPOLOGY_25_CONTROL_POINT_PATCHLIST,
4208 D3D11_PRIMITIVE_TOPOLOGY_26_CONTROL_POINT_PATCHLIST,
4209 D3D11_PRIMITIVE_TOPOLOGY_27_CONTROL_POINT_PATCHLIST,
4210 D3D11_PRIMITIVE_TOPOLOGY_28_CONTROL_POINT_PATCHLIST,
4211 D3D11_PRIMITIVE_TOPOLOGY_29_CONTROL_POINT_PATCHLIST,
4212 D3D11_PRIMITIVE_TOPOLOGY_30_CONTROL_POINT_PATCHLIST,
4213 D3D11_PRIMITIVE_TOPOLOGY_31_CONTROL_POINT_PATCHLIST,
4214 D3D11_PRIMITIVE_TOPOLOGY_32_CONTROL_POINT_PATCHLIST,
4215 };
4216 return aD3D11PrimitiveTopology[primitiveType];
4217}
4218
4219static DECLCALLBACK(int) vmsvga3dBackDXSetTopology(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dPrimitiveType topology)
4220{
4221 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4222 RT_NOREF(pBackend);
4223
4224 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4225 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4226
4227 D3D11_PRIMITIVE_TOPOLOGY const enmTopology = dxTopology(topology);
4228 pDevice->pImmediateContext->IASetPrimitiveTopology(enmTopology);
4229 return VINF_SUCCESS;
4230}
4231
4232
4233static DECLCALLBACK(int) vmsvga3dBackDXSetRenderTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, uint32_t cRenderTargetViewId, SVGA3dRenderTargetViewId const *paRenderTargetViewId)
4234{
4235 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4236 RT_NOREF(pBackend);
4237
4238 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4239 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4240
4241 ID3D11RenderTargetView *papRenderTargetViews[SVGA3D_MAX_RENDER_TARGETS];
4242 for (uint32_t i = 0; i < cRenderTargetViewId; ++i)
4243 {
4244 SVGA3dRenderTargetViewId const renderTargetViewId = paRenderTargetViewId[i];
4245 if (renderTargetViewId != SVGA3D_INVALID_ID)
4246 {
4247 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->pBackendDXContext->cRenderTargetView, VERR_INVALID_PARAMETER);
4248 papRenderTargetViews[i] = pDXContext->pBackendDXContext->papRenderTargetView[renderTargetViewId];
4249 }
4250 else
4251 papRenderTargetViews[i] = NULL;
4252 }
4253
4254 ID3D11DepthStencilView *pDepthStencilView;
4255 if (depthStencilViewId != SVGA_ID_INVALID)
4256 pDepthStencilView = pDXContext->pBackendDXContext->papDepthStencilView[depthStencilViewId];
4257 else
4258 pDepthStencilView = NULL;
4259
4260 pDevice->pImmediateContext->OMSetRenderTargets(cRenderTargetViewId, papRenderTargetViews, pDepthStencilView);
4261 return VINF_SUCCESS;
4262}
4263
4264
4265static DECLCALLBACK(int) vmsvga3dBackDXSetBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dBlendStateId blendId, float const blendFactor[4], uint32_t sampleMask)
4266{
4267 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4268 RT_NOREF(pBackend);
4269
4270 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4271 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4272
4273 ID3D11BlendState *pBlendState = pDXContext->pBackendDXContext->papBlendState[blendId];
4274 pDevice->pImmediateContext->OMSetBlendState(pBlendState, blendFactor, sampleMask);
4275
4276 pDXContext->svgaDXContext.renderState.blendStateId = blendId;
4277 memcpy(pDXContext->svgaDXContext.renderState.blendFactor, blendFactor, sizeof(blendFactor));
4278 pDXContext->svgaDXContext.renderState.sampleMask = sampleMask;
4279
4280 return VINF_SUCCESS;
4281}
4282
4283
4284static DECLCALLBACK(int) vmsvga3dBackDXSetDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, uint32_t stencilRef)
4285{
4286 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4287 RT_NOREF(pBackend);
4288
4289 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4290 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4291
4292 ID3D11DepthStencilState *pDepthStencilState = pDXContext->pBackendDXContext->papDepthStencilState[depthStencilId];
4293 pDevice->pImmediateContext->OMSetDepthStencilState(pDepthStencilState, stencilRef);
4294
4295 pDXContext->svgaDXContext.renderState.depthStencilStateId = depthStencilId;
4296 pDXContext->svgaDXContext.renderState.stencilRef = stencilRef;
4297
4298 return VINF_SUCCESS;
4299}
4300
4301
4302static DECLCALLBACK(int) vmsvga3dBackDXSetRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId)
4303{
4304 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4305 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4306 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4307
4308 RT_NOREF(pBackend);
4309
4310 pDevice->pImmediateContext->RSSetState(pDXContext->pBackendDXContext->papRasterizerState[rasterizerId]);
4311 return VINF_SUCCESS;
4312}
4313
4314
4315static DECLCALLBACK(int) vmsvga3dBackDXDefineQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4316{
4317 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4318
4319 RT_NOREF(pBackend, pDXContext);
4320 AssertFailed(); /** @todo Implement */
4321 return VERR_NOT_IMPLEMENTED;
4322}
4323
4324
4325static DECLCALLBACK(int) vmsvga3dBackDXDestroyQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4326{
4327 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4328
4329 RT_NOREF(pBackend, pDXContext);
4330 AssertFailed(); /** @todo Implement */
4331 return VERR_NOT_IMPLEMENTED;
4332}
4333
4334
4335static DECLCALLBACK(int) vmsvga3dBackDXBindQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4336{
4337 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4338
4339 RT_NOREF(pBackend, pDXContext);
4340 AssertFailed(); /** @todo Implement */
4341 return VERR_NOT_IMPLEMENTED;
4342}
4343
4344
4345static DECLCALLBACK(int) vmsvga3dBackDXSetQueryOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4346{
4347 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4348
4349 RT_NOREF(pBackend, pDXContext);
4350 AssertFailed(); /** @todo Implement */
4351 return VERR_NOT_IMPLEMENTED;
4352}
4353
4354
4355static DECLCALLBACK(int) vmsvga3dBackDXBeginQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4356{
4357 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4358
4359 RT_NOREF(pBackend, pDXContext);
4360 AssertFailed(); /** @todo Implement */
4361 return VERR_NOT_IMPLEMENTED;
4362}
4363
4364
4365static DECLCALLBACK(int) vmsvga3dBackDXEndQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4366{
4367 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4368
4369 RT_NOREF(pBackend, pDXContext);
4370 AssertFailed(); /** @todo Implement */
4371 return VERR_NOT_IMPLEMENTED;
4372}
4373
4374
4375static DECLCALLBACK(int) vmsvga3dBackDXReadbackQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4376{
4377 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4378
4379 RT_NOREF(pBackend, pDXContext);
4380 AssertFailed(); /** @todo Implement */
4381 return VERR_NOT_IMPLEMENTED;
4382}
4383
4384
4385static DECLCALLBACK(int) vmsvga3dBackDXSetPredication(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4386{
4387 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4388
4389 RT_NOREF(pBackend, pDXContext);
4390 AssertFailed(); /** @todo Implement */
4391 return VERR_NOT_IMPLEMENTED;
4392}
4393
4394
4395static DECLCALLBACK(int) vmsvga3dBackDXSetSOTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4396{
4397 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4398
4399 RT_NOREF(pBackend, pDXContext);
4400 AssertFailed(); /** @todo Implement */
4401 return VERR_NOT_IMPLEMENTED;
4402}
4403
4404
4405static DECLCALLBACK(int) vmsvga3dBackDXSetViewports(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t cViewport, SVGA3dViewport const *paViewport)
4406{
4407 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4408 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4409 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4410
4411 RT_NOREF(pBackend);
4412
4413 /* D3D11_VIEWPORT is identical to SVGA3dViewport. */
4414 D3D11_VIEWPORT *pViewports = (D3D11_VIEWPORT *)paViewport;
4415
4416 pDevice->pImmediateContext->RSSetViewports(cViewport, pViewports);
4417 return VINF_SUCCESS;
4418}
4419
4420
4421static DECLCALLBACK(int) vmsvga3dBackDXSetScissorRects(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t cRect, SVGASignedRect const *paRect)
4422{
4423 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4424 RT_NOREF(pBackend);
4425
4426 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4427 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4428
4429 /* D3D11_RECT is identical to SVGASignedRect. */
4430 D3D11_RECT *pRects = (D3D11_RECT *)paRect;
4431
4432 pDevice->pImmediateContext->RSSetScissorRects(cRect, pRects);
4433 return VINF_SUCCESS;
4434}
4435
4436
4437static DECLCALLBACK(int) vmsvga3dBackDXClearRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGA3dRGBAFloat const *pRGBA)
4438{
4439 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4440 RT_NOREF(pBackend);
4441
4442 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4443 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4444
4445 ID3D11RenderTargetView *pRenderTargetView = pDXContext->pBackendDXContext->papRenderTargetView[renderTargetViewId];
4446 AssertReturn(pRenderTargetView, VERR_INVALID_STATE);
4447 pDevice->pImmediateContext->ClearRenderTargetView(pRenderTargetView, pRGBA->value);
4448 return VINF_SUCCESS;
4449}
4450
4451
4452static DECLCALLBACK(int) vmsvga3dBackDXClearDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t flags, SVGA3dDepthStencilViewId depthStencilViewId, float depth, uint8_t stencil)
4453{
4454 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4455 RT_NOREF(pBackend);
4456
4457 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4458 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4459
4460 ID3D11DepthStencilView *pDepthStencilView = pDXContext->pBackendDXContext->papDepthStencilView[depthStencilViewId];
4461 AssertReturn(pDepthStencilView, VERR_INVALID_STATE);
4462 pDevice->pImmediateContext->ClearDepthStencilView(pDepthStencilView, flags, depth, stencil);
4463 return VINF_SUCCESS;
4464}
4465
4466
4467static DECLCALLBACK(int) vmsvga3dBackDXPredCopyRegion(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId dstSid, uint32_t dstSubResource, SVGA3dSurfaceId srcSid, uint32_t srcSubResource, SVGA3dCopyBox const *pBox)
4468{
4469 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4470 RT_NOREF(pBackend);
4471
4472 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4473 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4474
4475 PVMSVGA3DSURFACE pSrcSurface;
4476 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, srcSid, &pSrcSurface);
4477 AssertRCReturn(rc, rc);
4478
4479 PVMSVGA3DSURFACE pDstSurface;
4480 rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, dstSid, &pDstSurface);
4481 AssertRCReturn(rc, rc);
4482
4483 if (pSrcSurface->pBackendSurface == NULL)
4484 {
4485 /* Create the resource. */
4486 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC->svga.p3dState, pDXContext, pSrcSurface);
4487 AssertRCReturn(rc, rc);
4488 }
4489
4490 if (pDstSurface->pBackendSurface == NULL)
4491 {
4492 /* Create the resource. */
4493 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC->svga.p3dState, pDXContext, pDstSurface);
4494 AssertRCReturn(rc, rc);
4495 }
4496
4497 LogFunc(("cid %d: src cid %d%s -> dst cid %d%s\n",
4498 pDXContext->cid, pSrcSurface->idAssociatedContext,
4499 (pSrcSurface->surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : "",
4500 pDstSurface->idAssociatedContext,
4501 (pDstSurface->surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : ""));
4502
4503 UINT DstSubresource = dstSubResource;
4504 UINT DstX = pBox->x;
4505 UINT DstY = pBox->y;
4506 UINT DstZ = pBox->z;
4507
4508 UINT SrcSubresource = srcSubResource;
4509 D3D11_BOX SrcBox;
4510 SrcBox.left = pBox->x;
4511 SrcBox.top = pBox->y;
4512 SrcBox.front = pBox->z;
4513 SrcBox.right = pBox->x + pBox->w;
4514 SrcBox.bottom = pBox->y + pBox->h;
4515 SrcBox.back = pBox->z + pBox->d;
4516
4517 ID3D11Resource *pDstResource;
4518 ID3D11Resource *pSrcResource;
4519
4520 if (pDstSurface->idAssociatedContext == pSrcSurface->idAssociatedContext)
4521 {
4522 /* Use the context which created the surfaces. */
4523 if (pSrcSurface->idAssociatedContext != SVGA_ID_INVALID)
4524 {
4525 /* One of DXContexts has created the resources. */
4526 if (pDXContext->cid != pSrcSurface->idAssociatedContext)
4527 {
4528 /** @todo test */
4529 /* Get the context which has created the surfaces. */
4530 rc = vmsvga3dDXContextFromCid(pThisCC->svga.p3dState, pSrcSurface->idAssociatedContext, &pDXContext);
4531 AssertRCReturn(rc, rc);
4532
4533 pDevice = &pDXContext->pBackendDXContext->device;
4534 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4535 }
4536
4537 pDstResource = dxResource(pDstSurface, pDXContext);
4538 pSrcResource = dxResource(pSrcSurface, pDXContext);
4539 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
4540 pSrcResource, SrcSubresource, &SrcBox);
4541 }
4542 else
4543 {
4544 /* Backend context has created the resources. */
4545 pDstResource = pDstSurface->pBackendSurface->u.Resource.pResource;
4546 pSrcResource = pSrcSurface->pBackendSurface->u.Resource.pResource;
4547 pBackend->device.pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
4548 pSrcResource, SrcSubresource, &SrcBox);
4549 }
4550 }
4551 else
4552 {
4553 /* Different contexts. */
4554
4555 /* One of the surfaces must be shared. */
4556 AssertReturn( pSrcSurface->idAssociatedContext == SVGA_ID_INVALID
4557 || pDstSurface->idAssociatedContext == SVGA_ID_INVALID, VERR_NOT_SUPPORTED);
4558
4559 /* Use a context which created the not shared resource to do the copy. */
4560 if (pSrcSurface->idAssociatedContext == SVGA_ID_INVALID)
4561 {
4562 if (pDXContext->cid != pDstSurface->idAssociatedContext)
4563 {
4564 /* Get the context which has created the destination resource. */
4565 rc = vmsvga3dDXContextFromCid(pThisCC->svga.p3dState, pDstSurface->idAssociatedContext, &pDXContext);
4566 AssertRCReturn(rc, rc);
4567
4568 pDevice = &pDXContext->pBackendDXContext->device;
4569 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4570 }
4571
4572 pDstResource = dxResource(pDstSurface, pDXContext);
4573 pSrcResource = dxResource(pSrcSurface, pDXContext);
4574 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
4575 pSrcResource, SrcSubresource, &SrcBox);
4576 }
4577 else if (pDstSurface->idAssociatedContext == SVGA_ID_INVALID)
4578 {
4579 if (pDXContext->cid != pSrcSurface->idAssociatedContext)
4580 {
4581 /* Get the context which has created the source surface. */
4582 rc = vmsvga3dDXContextFromCid(pThisCC->svga.p3dState, pSrcSurface->idAssociatedContext, &pDXContext);
4583 AssertRCReturn(rc, rc);
4584
4585 pDevice = &pDXContext->pBackendDXContext->device;
4586 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4587 }
4588
4589 pDstResource = dxResource(pDstSurface, pDXContext);
4590 pSrcResource = dxResource(pSrcSurface, pDXContext);
4591 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
4592 pSrcResource, SrcSubresource, &SrcBox);
4593 }
4594 else
4595 {
4596 AssertFailedReturn(VERR_NOT_SUPPORTED);
4597 }
4598 }
4599 return VINF_SUCCESS;
4600}
4601
4602
4603static DECLCALLBACK(int) vmsvga3dBackDXPredCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4604{
4605 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4606
4607 RT_NOREF(pBackend, pDXContext);
4608 AssertFailed(); /** @todo Implement */
4609 return VERR_NOT_IMPLEMENTED;
4610}
4611
4612
4613static DECLCALLBACK(int) vmsvga3dBackDXPresentBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4614{
4615 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4616
4617 RT_NOREF(pBackend, pDXContext);
4618 AssertFailed(); /** @todo Implement */
4619 return VERR_NOT_IMPLEMENTED;
4620}
4621
4622
4623static DECLCALLBACK(int) vmsvga3dBackDXGenMips(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId)
4624{
4625 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4626 RT_NOREF(pBackend);
4627
4628 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4629 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4630
4631 ID3D11ShaderResourceView *pShaderResourceView = pDXContext->pBackendDXContext->papShaderResourceView[shaderResourceViewId];
4632 AssertReturn(pShaderResourceView, VERR_INVALID_STATE);
4633 pDevice->pImmediateContext->GenerateMips(pShaderResourceView);
4634 return VINF_SUCCESS;
4635}
4636
4637
4638static DECLCALLBACK(int) vmsvga3dBackDXUpdateSubResource(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4639{
4640 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4641
4642 RT_NOREF(pBackend, pDXContext);
4643 AssertFailed(); /** @todo Implement */
4644 return VERR_NOT_IMPLEMENTED;
4645}
4646
4647
4648static DECLCALLBACK(int) vmsvga3dBackDXReadbackSubResource(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4649{
4650 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4651
4652 RT_NOREF(pBackend, pDXContext);
4653 AssertFailed(); /** @todo Implement */
4654 return VERR_NOT_IMPLEMENTED;
4655}
4656
4657
4658static DECLCALLBACK(int) vmsvga3dBackDXInvalidateSubResource(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4659{
4660 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4661
4662 RT_NOREF(pBackend, pDXContext);
4663 AssertFailed(); /** @todo Implement */
4664 return VERR_NOT_IMPLEMENTED;
4665}
4666
4667
4668static DECLCALLBACK(int) vmsvga3dBackDXDefineShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId, SVGACOTableDXSRViewEntry const *pEntry)
4669{
4670 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4671 RT_NOREF(pBackend);
4672
4673 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4674 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4675
4676 /* Get corresponding resource for pEntry->sid. Create the surface if does not yet exist. */
4677 PVMSVGA3DSURFACE pSurface;
4678 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pEntry->sid, &pSurface);
4679 AssertRCReturn(rc, rc);
4680
4681 if (pSurface->pBackendSurface == NULL)
4682 {
4683 /* Create the actual texture. */
4684 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC->svga.p3dState, pDXContext, pSurface);
4685 AssertRCReturn(rc, rc);
4686 }
4687
4688 HRESULT hr = dxShaderResourceViewCreate(pDXContext, pEntry, pSurface, &pDXContext->pBackendDXContext->papShaderResourceView[shaderResourceViewId]);
4689 if (SUCCEEDED(hr))
4690 return VINF_SUCCESS;
4691 return VERR_INVALID_STATE;
4692}
4693
4694
4695static DECLCALLBACK(int) vmsvga3dBackDXDestroyShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId)
4696{
4697 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4698 RT_NOREF(pBackend);
4699
4700 D3D_RELEASE(pDXContext->pBackendDXContext->papShaderResourceView[shaderResourceViewId]);
4701 return VINF_SUCCESS;
4702}
4703
4704
4705static DECLCALLBACK(int) vmsvga3dBackDXDefineRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGACOTableDXRTViewEntry const *pEntry)
4706{
4707 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4708 RT_NOREF(pBackend);
4709
4710 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4711 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4712
4713 /* Get corresponding resource for pEntry->sid. Create the surface if does not yet exist. */
4714 PVMSVGA3DSURFACE pSurface;
4715 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pEntry->sid, &pSurface);
4716 AssertRCReturn(rc, rc);
4717
4718 if (pSurface->pBackendSurface == NULL)
4719 {
4720 /* Create the actual texture. */
4721 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC->svga.p3dState, pDXContext, pSurface);
4722 AssertRCReturn(rc, rc);
4723 }
4724
4725 HRESULT hr = dxRenderTargetViewCreate(pDXContext, pEntry, pSurface, &pDXContext->pBackendDXContext->papRenderTargetView[renderTargetViewId]);
4726 if (SUCCEEDED(hr))
4727 return VINF_SUCCESS;
4728 return VERR_INVALID_STATE;
4729}
4730
4731
4732static DECLCALLBACK(int) vmsvga3dBackDXDestroyRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId)
4733{
4734 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4735 RT_NOREF(pBackend);
4736
4737 D3D_RELEASE(pDXContext->pBackendDXContext->papRenderTargetView[renderTargetViewId]);
4738 return VINF_SUCCESS;
4739}
4740
4741
4742static DECLCALLBACK(int) vmsvga3dBackDXDefineDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, SVGACOTableDXDSViewEntry const *pEntry)
4743{
4744 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4745 RT_NOREF(pBackend);
4746
4747 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4748 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4749
4750 /* Get corresponding resource for pEntry->sid. Create the surface if does not yet exist. */
4751 PVMSVGA3DSURFACE pSurface;
4752 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pEntry->sid, &pSurface);
4753 AssertRCReturn(rc, rc);
4754
4755 if (pSurface->pBackendSurface == NULL)
4756 {
4757 /* Create the actual texture. */
4758 rc = vmsvga3dBackSurfaceCreateDepthStencilTexture(pThisCC->svga.p3dState, pDXContext, pSurface);
4759 AssertRCReturn(rc, rc);
4760 }
4761
4762 HRESULT hr = dxDepthStencilViewCreate(pDevice, pEntry, pSurface->pBackendSurface, &pDXContext->pBackendDXContext->papDepthStencilView[depthStencilViewId]);
4763 if (SUCCEEDED(hr))
4764 return VINF_SUCCESS;
4765 return VERR_INVALID_STATE;
4766}
4767
4768
4769static DECLCALLBACK(int) vmsvga3dBackDXDestroyDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId)
4770{
4771 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4772 RT_NOREF(pBackend);
4773
4774 D3D_RELEASE(pDXContext->pBackendDXContext->papDepthStencilView[depthStencilViewId]);
4775 return VINF_SUCCESS;
4776}
4777
4778
4779static DECLCALLBACK(int) vmsvga3dBackDXDefineElementLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId, SVGACOTableDXElementLayoutEntry const *pEntry)
4780{
4781 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4782 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4783 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4784
4785 RT_NOREF(pBackend, elementLayoutId, pEntry);
4786
4787 /* Not much can be done here because ID3D11Device::CreateInputLayout requires
4788 * a pShaderBytecodeWithInputSignature which is not known at this moment.
4789 * InputLayout object will be created in SVGA_3D_CMD_DX_SET_INPUT_LAYOUT.
4790 */
4791
4792 DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[pEntry->elid];
4793 D3D_RELEASE(pDXElementLayout->pElementLayout);
4794
4795 /* Semantic name is not interpreted by D3D, therefore arbitrary names can be used
4796 * if they are consistent between the element layout and shader input signature.
4797 * "In general, data passed between pipeline stages is completely generic and is not uniquely
4798 * interpreted by the system; arbitrary semantics are allowed ..."
4799 *
4800 * However D3D runtime insists that "SemanticName string ("POSITIO1") cannot end with a number."
4801 *
4802 * System-Value semantics ("SV_*") between shaders require proper names of course.
4803 * But they are irrelevant for input attributes.
4804 */
4805 pDXElementLayout->cElementDesc = pEntry->numDescs;
4806 for (uint32_t i = 0; i < pEntry->numDescs; ++i)
4807 {
4808 D3D11_INPUT_ELEMENT_DESC *pDst = &pDXElementLayout->aElementDesc[i];
4809 SVGA3dInputElementDesc const *pSrc = &pEntry->descs[i];
4810 pDst->SemanticName = "ATTRIB";
4811 pDst->SemanticIndex = i; /// @todo 'pSrc->inputRegister' is unused, maybe it should somehow.
4812 pDst->Format = vmsvgaDXSurfaceFormat2Dxgi(pSrc->format);
4813 AssertReturn(pDst->Format != DXGI_FORMAT_UNKNOWN, VERR_NOT_IMPLEMENTED);
4814 pDst->InputSlot = pSrc->inputSlot;
4815 pDst->AlignedByteOffset = pSrc->alignedByteOffset;
4816 pDst->InputSlotClass = (D3D11_INPUT_CLASSIFICATION)pSrc->inputSlotClass;
4817 pDst->InstanceDataStepRate = pSrc->instanceDataStepRate;
4818 }
4819
4820 return VINF_SUCCESS;
4821}
4822
4823
4824static DECLCALLBACK(int) vmsvga3dBackDXDestroyElementLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4825{
4826 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4827
4828 RT_NOREF(pBackend, pDXContext);
4829 AssertFailed(); /** @todo Implement */
4830 return VERR_NOT_IMPLEMENTED;
4831}
4832
4833
4834static DECLCALLBACK(int) vmsvga3dBackDXDefineBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
4835 SVGA3dBlendStateId blendId, SVGACOTableDXBlendStateEntry const *pEntry)
4836{
4837 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4838 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4839 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4840
4841 RT_NOREF(pBackend);
4842
4843 HRESULT hr = dxBlendStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papBlendState[blendId]);
4844 if (SUCCEEDED(hr))
4845 return VINF_SUCCESS;
4846 return VERR_INVALID_STATE;
4847}
4848
4849
4850static DECLCALLBACK(int) vmsvga3dBackDXDestroyBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4851{
4852 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4853
4854 RT_NOREF(pBackend, pDXContext);
4855 AssertFailed(); /** @todo Implement */
4856 return VERR_NOT_IMPLEMENTED;
4857}
4858
4859
4860static DECLCALLBACK(int) vmsvga3dBackDXDefineDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, SVGACOTableDXDepthStencilEntry *pEntry)
4861{
4862 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4863 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4864 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4865
4866 RT_NOREF(pBackend);
4867
4868 HRESULT hr = dxDepthStencilStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papDepthStencilState[depthStencilId]);
4869 if (SUCCEEDED(hr))
4870 return VINF_SUCCESS;
4871 return VERR_INVALID_STATE;
4872}
4873
4874
4875static DECLCALLBACK(int) vmsvga3dBackDXDestroyDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4876{
4877 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4878
4879 RT_NOREF(pBackend, pDXContext);
4880 AssertFailed(); /** @todo Implement */
4881 return VERR_NOT_IMPLEMENTED;
4882}
4883
4884
4885static DECLCALLBACK(int) vmsvga3dBackDXDefineRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId, SVGACOTableDXRasterizerStateEntry const *pEntry)
4886{
4887 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4888 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4889 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4890
4891 RT_NOREF(pBackend);
4892
4893 HRESULT hr = dxRasterizerStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papRasterizerState[rasterizerId]);
4894 if (SUCCEEDED(hr))
4895 return VINF_SUCCESS;
4896 return VERR_INVALID_STATE;
4897}
4898
4899
4900static DECLCALLBACK(int) vmsvga3dBackDXDestroyRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4901{
4902 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4903
4904 RT_NOREF(pBackend, pDXContext);
4905 AssertFailed(); /** @todo Implement */
4906 return VERR_NOT_IMPLEMENTED;
4907}
4908
4909
4910static DECLCALLBACK(int) vmsvga3dBackDXDefineSamplerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSamplerId samplerId, SVGACOTableDXSamplerEntry const *pEntry)
4911{
4912 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4913 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4914 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4915
4916 RT_NOREF(pBackend);
4917
4918 HRESULT hr = dxSamplerStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papSamplerState[samplerId]);
4919 if (SUCCEEDED(hr))
4920 return VINF_SUCCESS;
4921 return VERR_INVALID_STATE;
4922}
4923
4924
4925static DECLCALLBACK(int) vmsvga3dBackDXDestroySamplerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4926{
4927 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4928
4929 RT_NOREF(pBackend, pDXContext);
4930 AssertFailed(); /** @todo Implement */
4931 return VERR_NOT_IMPLEMENTED;
4932}
4933
4934
4935static DECLCALLBACK(int) vmsvga3dBackDXDefineShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSHADER pShader)
4936{
4937 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4938
4939 RT_NOREF(pBackend);
4940
4941 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[pShader->id];
4942 D3D_RELEASE(pDXShader->pShader);
4943 pDXShader->enmShaderType = pShader->type;
4944 pShader->u.pvBackendShader = pDXShader;
4945 return VINF_SUCCESS;
4946}
4947
4948
4949static DECLCALLBACK(int) vmsvga3dBackDXDestroyShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4950{
4951 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4952
4953 RT_NOREF(pBackend, pDXContext);
4954 AssertFailed(); /** @todo Implement */
4955 return VERR_NOT_IMPLEMENTED;
4956}
4957
4958
4959static DECLCALLBACK(int) vmsvga3dBackDXBindShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSHADER pShader, void const *pvShaderBytecode)
4960{
4961 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4962 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4963 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4964
4965 RT_NOREF(pBackend);
4966
4967 int rc = VINF_SUCCESS;
4968
4969 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[pShader->id];
4970 if (pDXShader->pvDXBC)
4971 {
4972 RTMemFree(pDXShader->pvDXBC);
4973 pDXShader->pvDXBC = NULL;
4974 pDXShader->cbDXBC = 0;
4975 }
4976
4977 if (pvShaderBytecode)
4978 {
4979#ifdef LOG_ENABLED
4980 Log(("Shader: cid=%u shid=%u type=%d:\n", pDXContext->cid, pShader->id, pDXShader->enmShaderType));
4981 uint8_t *pu8 = (uint8_t *)pvShaderBytecode;
4982 for (uint32_t i = 0; i < pShader->cbData; ++i)
4983 {
4984 if ((i % 16) == 0)
4985 {
4986 if (i > 0)
4987 Log((",\n"));
4988
4989 Log((" %#04x", pu8[i]));
4990 }
4991 else
4992 {
4993 Log((", %#04x", pu8[i]));
4994 }
4995 }
4996 Log(("\n"));
4997#endif
4998
4999 rc = DXShaderCreateDXBC(&pShader->shaderInfo, pvShaderBytecode, pShader->cbData, &pDXShader->pvDXBC, &pDXShader->cbDXBC);
5000 if (RT_SUCCESS(rc))
5001 {
5002#ifdef LOG_ENABLED
5003 if (pBackend->pfnD3DDisassemble && LogIs6Enabled())
5004 {
5005 ID3D10Blob *pBlob = 0;
5006 HRESULT hr2 = pBackend->pfnD3DDisassemble(pDXShader->pvDXBC, pDXShader->cbDXBC, 0, NULL, &pBlob);
5007 if (SUCCEEDED(hr2) && pBlob && pBlob->GetBufferSize())
5008 {
5009 Log6(("Shader: cid=%u shid=%u type=%d:\n%s\n",
5010 pDXContext->cid, pShader->id, pDXShader->enmShaderType, pBlob->GetBufferPointer()));
5011 }
5012 else
5013 AssertFailed();
5014 D3D_RELEASE(pBlob);
5015 }
5016#endif
5017
5018 HRESULT hr = dxShaderCreate(pDevice, pShader, pDXShader);
5019 if (FAILED(hr))
5020 rc = VERR_INVALID_STATE;
5021 }
5022 else
5023 rc = VERR_NO_MEMORY;
5024 }
5025
5026 return rc;
5027}
5028
5029
5030static DECLCALLBACK(int) vmsvga3dBackDXDefineStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5031{
5032 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5033
5034 RT_NOREF(pBackend, pDXContext);
5035 AssertFailed(); /** @todo Implement */
5036 return VERR_NOT_IMPLEMENTED;
5037}
5038
5039
5040static DECLCALLBACK(int) vmsvga3dBackDXDestroyStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5041{
5042 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5043
5044 RT_NOREF(pBackend, pDXContext);
5045 AssertFailed(); /** @todo Implement */
5046 return VERR_NOT_IMPLEMENTED;
5047}
5048
5049
5050static DECLCALLBACK(int) vmsvga3dBackDXSetStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5051{
5052 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5053
5054 RT_NOREF(pBackend, pDXContext);
5055 AssertFailed(); /** @todo Implement */
5056 return VERR_NOT_IMPLEMENTED;
5057}
5058
5059
5060static int dxCOTableRealloc(void **ppvCOTable, uint32_t *pcCOTable, uint32_t cbEntry, uint32_t cEntries, uint32_t cValidEntries)
5061{
5062 if (*pcCOTable != cEntries)
5063 {
5064 /* Grow/shrink the array. */
5065 if (cEntries)
5066 {
5067 void *pvNew = RTMemRealloc(*ppvCOTable, cEntries * cbEntry);
5068 AssertReturn(pvNew, VERR_NO_MEMORY);
5069 memset((uint8_t *)pvNew + cValidEntries * cbEntry, 0, (cEntries - cValidEntries) * cbEntry);
5070 *ppvCOTable = pvNew;
5071 }
5072 else
5073 {
5074 RTMemFree(*ppvCOTable);
5075 *ppvCOTable = NULL;
5076 }
5077
5078 *pcCOTable = cEntries;
5079 }
5080
5081 return VINF_SUCCESS;
5082}
5083
5084static DECLCALLBACK(int) vmsvga3dBackDXSetCOTable(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableType type, uint32_t cEntries, uint32_t cValidEntries)
5085{
5086 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5087 RT_NOREF(pBackend);
5088
5089 VMSVGA3DBACKENDDXCONTEXT *pBackendDXContext = pDXContext->pBackendDXContext;
5090
5091 int rc = VINF_SUCCESS;
5092
5093 /* Allocate paBlendState for example. */
5094 /* Keep first cValidEntries. */
5095 switch (type)
5096 {
5097 case SVGA_COTABLE_RTVIEW:
5098 if (pBackendDXContext->papRenderTargetView)
5099 {
5100 /* Clear obsolete entries. */
5101 DX_RELEASE_ARRAY(pBackendDXContext->cRenderTargetView - cValidEntries, &pBackendDXContext->papRenderTargetView[cValidEntries]);
5102 }
5103
5104 rc = dxCOTableRealloc((void **)&pBackendDXContext->papRenderTargetView, &pBackendDXContext->cRenderTargetView,
5105 sizeof(pBackendDXContext->papRenderTargetView[0]), cEntries, cValidEntries);
5106 break;
5107 case SVGA_COTABLE_DSVIEW:
5108 if (pBackendDXContext->papDepthStencilView)
5109 {
5110 /* Clear obsolete entries. */
5111 DX_RELEASE_ARRAY(pBackendDXContext->cDepthStencilView - cValidEntries, &pBackendDXContext->papDepthStencilView[cValidEntries]);
5112 }
5113
5114 rc = dxCOTableRealloc((void **)&pBackendDXContext->papDepthStencilView, &pBackendDXContext->cDepthStencilView,
5115 sizeof(pBackendDXContext->papDepthStencilView[0]), cEntries, cValidEntries);
5116 break;
5117 case SVGA_COTABLE_SRVIEW:
5118 if (pBackendDXContext->papShaderResourceView)
5119 {
5120 /* Clear obsolete entries. */
5121 DX_RELEASE_ARRAY(pBackendDXContext->cShaderResourceView - cValidEntries, &pBackendDXContext->papShaderResourceView[cValidEntries]);
5122 }
5123
5124 rc = dxCOTableRealloc((void **)&pBackendDXContext->papShaderResourceView, &pBackendDXContext->cShaderResourceView,
5125 sizeof(pBackendDXContext->papShaderResourceView[0]), cEntries, cValidEntries);
5126 break;
5127 case SVGA_COTABLE_ELEMENTLAYOUT:
5128 if (pBackendDXContext->paElementLayout)
5129 {
5130 /* Clear obsolete entries. */
5131 for (uint32_t i = cValidEntries; i < pBackendDXContext->cElementLayout; ++i)
5132 D3D_RELEASE(pBackendDXContext->paElementLayout[i].pElementLayout);
5133 }
5134
5135 rc = dxCOTableRealloc((void **)&pBackendDXContext->paElementLayout, &pBackendDXContext->cElementLayout,
5136 sizeof(pBackendDXContext->paElementLayout[0]), cEntries, cValidEntries);
5137 break;
5138 case SVGA_COTABLE_BLENDSTATE:
5139 if (pBackendDXContext->papBlendState)
5140 {
5141 /* Clear obsolete entries. */
5142 DX_RELEASE_ARRAY(pBackendDXContext->cBlendState - cValidEntries, &pBackendDXContext->papBlendState[cValidEntries]);
5143 }
5144
5145 rc = dxCOTableRealloc((void **)&pBackendDXContext->papBlendState, &pBackendDXContext->cBlendState,
5146 sizeof(pBackendDXContext->papBlendState[0]), cEntries, cValidEntries);
5147 break;
5148 case SVGA_COTABLE_DEPTHSTENCIL:
5149 if (pBackendDXContext->papDepthStencilState)
5150 {
5151 /* Clear obsolete entries. */
5152 DX_RELEASE_ARRAY(pBackendDXContext->cDepthStencilState - cValidEntries, &pBackendDXContext->papDepthStencilState[cValidEntries]);
5153 }
5154
5155 rc = dxCOTableRealloc((void **)&pBackendDXContext->papDepthStencilState, &pBackendDXContext->cDepthStencilState,
5156 sizeof(pBackendDXContext->papDepthStencilState[0]), cEntries, cValidEntries);
5157 break;
5158 case SVGA_COTABLE_RASTERIZERSTATE:
5159 if (pBackendDXContext->papRasterizerState)
5160 {
5161 /* Clear obsolete entries. */
5162 DX_RELEASE_ARRAY(pBackendDXContext->cRasterizerState - cValidEntries, &pBackendDXContext->papRasterizerState[cValidEntries]);
5163 }
5164
5165 rc = dxCOTableRealloc((void **)&pBackendDXContext->papRasterizerState, &pBackendDXContext->cRasterizerState,
5166 sizeof(pBackendDXContext->papRasterizerState[0]), cEntries, cValidEntries);
5167 break;
5168 case SVGA_COTABLE_SAMPLER:
5169 if (pBackendDXContext->papSamplerState)
5170 {
5171 /* Clear obsolete entries. */
5172 DX_RELEASE_ARRAY(pBackendDXContext->cSamplerState - cValidEntries, &pBackendDXContext->papSamplerState[cValidEntries]);
5173 }
5174
5175 rc = dxCOTableRealloc((void **)&pBackendDXContext->papSamplerState, &pBackendDXContext->cSamplerState,
5176 sizeof(pBackendDXContext->papSamplerState[0]), cEntries, cValidEntries);
5177 break;
5178 case SVGA_COTABLE_STREAMOUTPUT:
5179 //AssertFailed(); /** @todo Implement */
5180 break;
5181 case SVGA_COTABLE_DXQUERY:
5182 if (pBackendDXContext->papQuery)
5183 {
5184 /* Clear obsolete entries. */
5185 DX_RELEASE_ARRAY(pBackendDXContext->cQuery - cValidEntries, &pBackendDXContext->papQuery[cValidEntries]);
5186 }
5187
5188 rc = dxCOTableRealloc((void **)&pBackendDXContext->papQuery, &pBackendDXContext->cQuery,
5189 sizeof(pBackendDXContext->papQuery[0]), cEntries, cValidEntries);
5190 break;
5191 case SVGA_COTABLE_DXSHADER:
5192 if (pBackendDXContext->paShader)
5193 {
5194 /* Clear obsolete entries. */
5195 for (uint32_t i = cValidEntries; i < pBackendDXContext->cShader; ++i)
5196 D3D_RELEASE(pBackendDXContext->paShader[i].pShader);
5197 }
5198
5199 rc = dxCOTableRealloc((void **)&pBackendDXContext->paShader, &pBackendDXContext->cShader,
5200 sizeof(pBackendDXContext->paShader[0]), cEntries, cValidEntries);
5201 break;
5202 case SVGA_COTABLE_UAVIEW:
5203 AssertFailed(); /** @todo Implement */
5204 break;
5205 case SVGA_COTABLE_MAX: break; /* Compiler warning */
5206 }
5207 return rc;
5208}
5209
5210
5211static DECLCALLBACK(int) vmsvga3dBackDXBufferCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5212{
5213 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5214
5215 RT_NOREF(pBackend, pDXContext);
5216 AssertFailed(); /** @todo Implement */
5217 return VERR_NOT_IMPLEMENTED;
5218}
5219
5220
5221static DECLCALLBACK(int) vmsvga3dBackDXTransferFromBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5222{
5223 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5224
5225 RT_NOREF(pBackend, pDXContext);
5226 AssertFailed(); /** @todo Implement */
5227 return VERR_NOT_IMPLEMENTED;
5228}
5229
5230
5231static DECLCALLBACK(int) vmsvga3dBackDXSurfaceCopyAndReadback(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5232{
5233 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5234
5235 RT_NOREF(pBackend, pDXContext);
5236 AssertFailed(); /** @todo Implement */
5237 return VERR_NOT_IMPLEMENTED;
5238}
5239
5240
5241static DECLCALLBACK(int) vmsvga3dBackDXMoveQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5242{
5243 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5244
5245 RT_NOREF(pBackend, pDXContext);
5246 AssertFailed(); /** @todo Implement */
5247 return VERR_NOT_IMPLEMENTED;
5248}
5249
5250
5251static DECLCALLBACK(int) vmsvga3dBackDXBindAllQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5252{
5253 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5254
5255 RT_NOREF(pBackend, pDXContext);
5256 AssertFailed(); /** @todo Implement */
5257 return VERR_NOT_IMPLEMENTED;
5258}
5259
5260
5261static DECLCALLBACK(int) vmsvga3dBackDXReadbackAllQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5262{
5263 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5264
5265 RT_NOREF(pBackend, pDXContext);
5266 AssertFailed(); /** @todo Implement */
5267 return VERR_NOT_IMPLEMENTED;
5268}
5269
5270
5271static DECLCALLBACK(int) vmsvga3dBackDXPredTransferFromBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5272{
5273 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5274
5275 RT_NOREF(pBackend, pDXContext);
5276 AssertFailed(); /** @todo Implement */
5277 return VERR_NOT_IMPLEMENTED;
5278}
5279
5280
5281static DECLCALLBACK(int) vmsvga3dBackDXMobFence64(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5282{
5283 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5284
5285 RT_NOREF(pBackend, pDXContext);
5286 AssertFailed(); /** @todo Implement */
5287 return VERR_NOT_IMPLEMENTED;
5288}
5289
5290
5291static DECLCALLBACK(int) vmsvga3dBackDXBindAllShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5292{
5293 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5294
5295 RT_NOREF(pBackend, pDXContext);
5296 AssertFailed(); /** @todo Implement */
5297 return VERR_NOT_IMPLEMENTED;
5298}
5299
5300
5301static DECLCALLBACK(int) vmsvga3dBackDXHint(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5302{
5303 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5304
5305 RT_NOREF(pBackend, pDXContext);
5306 AssertFailed(); /** @todo Implement */
5307 return VERR_NOT_IMPLEMENTED;
5308}
5309
5310
5311static DECLCALLBACK(int) vmsvga3dBackDXBufferUpdate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5312{
5313 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5314
5315 RT_NOREF(pBackend, pDXContext);
5316 AssertFailed(); /** @todo Implement */
5317 return VERR_NOT_IMPLEMENTED;
5318}
5319
5320
5321static DECLCALLBACK(int) vmsvga3dBackDXSetVSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5322{
5323 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5324
5325 RT_NOREF(pBackend, pDXContext);
5326 AssertFailed(); /** @todo Implement */
5327 return VERR_NOT_IMPLEMENTED;
5328}
5329
5330
5331static DECLCALLBACK(int) vmsvga3dBackDXSetPSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5332{
5333 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5334
5335 RT_NOREF(pBackend, pDXContext);
5336 AssertFailed(); /** @todo Implement */
5337 return VERR_NOT_IMPLEMENTED;
5338}
5339
5340
5341static DECLCALLBACK(int) vmsvga3dBackDXSetGSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5342{
5343 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5344
5345 RT_NOREF(pBackend, pDXContext);
5346 AssertFailed(); /** @todo Implement */
5347 return VERR_NOT_IMPLEMENTED;
5348}
5349
5350
5351static DECLCALLBACK(int) vmsvga3dBackDXSetHSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5352{
5353 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5354
5355 RT_NOREF(pBackend, pDXContext);
5356 AssertFailed(); /** @todo Implement */
5357 return VERR_NOT_IMPLEMENTED;
5358}
5359
5360
5361static DECLCALLBACK(int) vmsvga3dBackDXSetDSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5362{
5363 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5364
5365 RT_NOREF(pBackend, pDXContext);
5366 AssertFailed(); /** @todo Implement */
5367 return VERR_NOT_IMPLEMENTED;
5368}
5369
5370
5371static DECLCALLBACK(int) vmsvga3dBackDXSetCSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5372{
5373 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5374
5375 RT_NOREF(pBackend, pDXContext);
5376 AssertFailed(); /** @todo Implement */
5377 return VERR_NOT_IMPLEMENTED;
5378}
5379
5380
5381static DECLCALLBACK(int) vmsvga3dBackDXCondBindAllShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5382{
5383 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5384
5385 RT_NOREF(pBackend, pDXContext);
5386 AssertFailed(); /** @todo Implement */
5387 return VERR_NOT_IMPLEMENTED;
5388}
5389
5390
5391static DECLCALLBACK(int) vmsvga3dBackScreenCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5392{
5393 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5394
5395 RT_NOREF(pBackend, pDXContext);
5396 AssertFailed(); /** @todo Implement */
5397 return VERR_NOT_IMPLEMENTED;
5398}
5399
5400
5401static DECLCALLBACK(int) vmsvga3dBackGrowOTable(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5402{
5403 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5404
5405 RT_NOREF(pBackend, pDXContext);
5406 AssertFailed(); /** @todo Implement */
5407 return VERR_NOT_IMPLEMENTED;
5408}
5409
5410
5411static DECLCALLBACK(int) vmsvga3dBackDXGrowCOTable(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5412{
5413 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5414
5415 RT_NOREF(pBackend, pDXContext);
5416 AssertFailed(); /** @todo Implement */
5417 return VERR_NOT_IMPLEMENTED;
5418}
5419
5420
5421static DECLCALLBACK(int) vmsvga3dBackIntraSurfaceCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5422{
5423 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5424
5425 RT_NOREF(pBackend, pDXContext);
5426 AssertFailed(); /** @todo Implement */
5427 return VERR_NOT_IMPLEMENTED;
5428}
5429
5430
5431static DECLCALLBACK(int) vmsvga3dBackDefineGBSurface_v3(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5432{
5433 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5434
5435 RT_NOREF(pBackend, pDXContext);
5436 AssertFailed(); /** @todo Implement */
5437 return VERR_NOT_IMPLEMENTED;
5438}
5439
5440
5441static DECLCALLBACK(int) vmsvga3dBackDXResolveCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5442{
5443 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5444
5445 RT_NOREF(pBackend, pDXContext);
5446 AssertFailed(); /** @todo Implement */
5447 return VERR_NOT_IMPLEMENTED;
5448}
5449
5450
5451static DECLCALLBACK(int) vmsvga3dBackDXPredResolveCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5452{
5453 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5454
5455 RT_NOREF(pBackend, pDXContext);
5456 AssertFailed(); /** @todo Implement */
5457 return VERR_NOT_IMPLEMENTED;
5458}
5459
5460
5461static DECLCALLBACK(int) vmsvga3dBackDXPredConvertRegion(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5462{
5463 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5464
5465 RT_NOREF(pBackend, pDXContext);
5466 AssertFailed(); /** @todo Implement */
5467 return VERR_NOT_IMPLEMENTED;
5468}
5469
5470
5471static DECLCALLBACK(int) vmsvga3dBackDXPredConvert(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5472{
5473 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5474
5475 RT_NOREF(pBackend, pDXContext);
5476 AssertFailed(); /** @todo Implement */
5477 return VERR_NOT_IMPLEMENTED;
5478}
5479
5480
5481static DECLCALLBACK(int) vmsvga3dBackWholeSurfaceCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5482{
5483 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5484
5485 RT_NOREF(pBackend, pDXContext);
5486 AssertFailed(); /** @todo Implement */
5487 return VERR_NOT_IMPLEMENTED;
5488}
5489
5490
5491static DECLCALLBACK(int) vmsvga3dBackDXDefineUAView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5492{
5493 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5494
5495 RT_NOREF(pBackend, pDXContext);
5496 AssertFailed(); /** @todo Implement */
5497 return VERR_NOT_IMPLEMENTED;
5498}
5499
5500
5501static DECLCALLBACK(int) vmsvga3dBackDXDestroyUAView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5502{
5503 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5504
5505 RT_NOREF(pBackend, pDXContext);
5506 AssertFailed(); /** @todo Implement */
5507 return VERR_NOT_IMPLEMENTED;
5508}
5509
5510
5511static DECLCALLBACK(int) vmsvga3dBackDXClearUAViewUint(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5512{
5513 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5514
5515 RT_NOREF(pBackend, pDXContext);
5516 AssertFailed(); /** @todo Implement */
5517 return VERR_NOT_IMPLEMENTED;
5518}
5519
5520
5521static DECLCALLBACK(int) vmsvga3dBackDXClearUAViewFloat(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5522{
5523 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5524
5525 RT_NOREF(pBackend, pDXContext);
5526 AssertFailed(); /** @todo Implement */
5527 return VERR_NOT_IMPLEMENTED;
5528}
5529
5530
5531static DECLCALLBACK(int) vmsvga3dBackDXCopyStructureCount(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5532{
5533 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5534
5535 RT_NOREF(pBackend, pDXContext);
5536 AssertFailed(); /** @todo Implement */
5537 return VERR_NOT_IMPLEMENTED;
5538}
5539
5540
5541static DECLCALLBACK(int) vmsvga3dBackDXSetUAViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5542{
5543 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5544
5545 RT_NOREF(pBackend, pDXContext);
5546 AssertFailed(); /** @todo Implement */
5547 return VERR_NOT_IMPLEMENTED;
5548}
5549
5550
5551static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexedInstancedIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5552{
5553 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5554
5555 RT_NOREF(pBackend, pDXContext);
5556 AssertFailed(); /** @todo Implement */
5557 return VERR_NOT_IMPLEMENTED;
5558}
5559
5560
5561static DECLCALLBACK(int) vmsvga3dBackDXDrawInstancedIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5562{
5563 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5564
5565 RT_NOREF(pBackend, pDXContext);
5566 AssertFailed(); /** @todo Implement */
5567 return VERR_NOT_IMPLEMENTED;
5568}
5569
5570
5571static DECLCALLBACK(int) vmsvga3dBackDXDispatch(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5572{
5573 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5574
5575 RT_NOREF(pBackend, pDXContext);
5576 AssertFailed(); /** @todo Implement */
5577 return VERR_NOT_IMPLEMENTED;
5578}
5579
5580
5581static DECLCALLBACK(int) vmsvga3dBackDXDispatchIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5582{
5583 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5584
5585 RT_NOREF(pBackend, pDXContext);
5586 AssertFailed(); /** @todo Implement */
5587 return VERR_NOT_IMPLEMENTED;
5588}
5589
5590
5591static DECLCALLBACK(int) vmsvga3dBackWriteZeroSurface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5592{
5593 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5594
5595 RT_NOREF(pBackend, pDXContext);
5596 AssertFailed(); /** @todo Implement */
5597 return VERR_NOT_IMPLEMENTED;
5598}
5599
5600
5601static DECLCALLBACK(int) vmsvga3dBackHintZeroSurface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5602{
5603 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5604
5605 RT_NOREF(pBackend, pDXContext);
5606 AssertFailed(); /** @todo Implement */
5607 return VERR_NOT_IMPLEMENTED;
5608}
5609
5610
5611static DECLCALLBACK(int) vmsvga3dBackDXTransferToBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5612{
5613 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5614
5615 RT_NOREF(pBackend, pDXContext);
5616 AssertFailed(); /** @todo Implement */
5617 return VERR_NOT_IMPLEMENTED;
5618}
5619
5620
5621static DECLCALLBACK(int) vmsvga3dBackDXSetStructureCount(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5622{
5623 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5624
5625 RT_NOREF(pBackend, pDXContext);
5626 AssertFailed(); /** @todo Implement */
5627 return VERR_NOT_IMPLEMENTED;
5628}
5629
5630
5631static DECLCALLBACK(int) vmsvga3dBackLogicOpsBitBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5632{
5633 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5634
5635 RT_NOREF(pBackend, pDXContext);
5636 AssertFailed(); /** @todo Implement */
5637 return VERR_NOT_IMPLEMENTED;
5638}
5639
5640
5641static DECLCALLBACK(int) vmsvga3dBackLogicOpsTransBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5642{
5643 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5644
5645 RT_NOREF(pBackend, pDXContext);
5646 AssertFailed(); /** @todo Implement */
5647 return VERR_NOT_IMPLEMENTED;
5648}
5649
5650
5651static DECLCALLBACK(int) vmsvga3dBackLogicOpsStretchBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5652{
5653 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5654
5655 RT_NOREF(pBackend, pDXContext);
5656 AssertFailed(); /** @todo Implement */
5657 return VERR_NOT_IMPLEMENTED;
5658}
5659
5660
5661static DECLCALLBACK(int) vmsvga3dBackLogicOpsColorFill(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5662{
5663 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5664
5665 RT_NOREF(pBackend, pDXContext);
5666 AssertFailed(); /** @todo Implement */
5667 return VERR_NOT_IMPLEMENTED;
5668}
5669
5670
5671static DECLCALLBACK(int) vmsvga3dBackLogicOpsAlphaBlend(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5672{
5673 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5674
5675 RT_NOREF(pBackend, pDXContext);
5676 AssertFailed(); /** @todo Implement */
5677 return VERR_NOT_IMPLEMENTED;
5678}
5679
5680
5681static DECLCALLBACK(int) vmsvga3dBackLogicOpsClearTypeBlend(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5682{
5683 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5684
5685 RT_NOREF(pBackend, pDXContext);
5686 AssertFailed(); /** @todo Implement */
5687 return VERR_NOT_IMPLEMENTED;
5688}
5689
5690
5691static DECLCALLBACK(int) vmsvga3dBackDefineGBSurface_v4(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5692{
5693 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5694
5695 RT_NOREF(pBackend, pDXContext);
5696 AssertFailed(); /** @todo Implement */
5697 return VERR_NOT_IMPLEMENTED;
5698}
5699
5700
5701static DECLCALLBACK(int) vmsvga3dBackDXSetCSUAViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5702{
5703 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5704
5705 RT_NOREF(pBackend, pDXContext);
5706 AssertFailed(); /** @todo Implement */
5707 return VERR_NOT_IMPLEMENTED;
5708}
5709
5710
5711static DECLCALLBACK(int) vmsvga3dBackDXSetMinLOD(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5712{
5713 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5714
5715 RT_NOREF(pBackend, pDXContext);
5716 AssertFailed(); /** @todo Implement */
5717 return VERR_NOT_IMPLEMENTED;
5718}
5719
5720
5721static DECLCALLBACK(int) vmsvga3dBackDXDefineStreamOutputWithMob(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5722{
5723 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5724
5725 RT_NOREF(pBackend, pDXContext);
5726 AssertFailed(); /** @todo Implement */
5727 return VERR_NOT_IMPLEMENTED;
5728}
5729
5730
5731static DECLCALLBACK(int) vmsvga3dBackDXSetShaderIface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5732{
5733 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5734
5735 RT_NOREF(pBackend, pDXContext);
5736 AssertFailed(); /** @todo Implement */
5737 return VERR_NOT_IMPLEMENTED;
5738}
5739
5740
5741static DECLCALLBACK(int) vmsvga3dBackDXBindStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5742{
5743 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5744
5745 RT_NOREF(pBackend, pDXContext);
5746 AssertFailed(); /** @todo Implement */
5747 return VERR_NOT_IMPLEMENTED;
5748}
5749
5750
5751static DECLCALLBACK(int) vmsvga3dBackSurfaceStretchBltNonMSToMS(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5752{
5753 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5754
5755 RT_NOREF(pBackend, pDXContext);
5756 AssertFailed(); /** @todo Implement */
5757 return VERR_NOT_IMPLEMENTED;
5758}
5759
5760
5761static DECLCALLBACK(int) vmsvga3dBackDXBindShaderIface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5762{
5763 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5764
5765 RT_NOREF(pBackend, pDXContext);
5766 AssertFailed(); /** @todo Implement */
5767 return VERR_NOT_IMPLEMENTED;
5768}
5769
5770
5771int vmsvga3dQueryInterface(PVGASTATECC pThisCC, char const *pszInterfaceName, void *pvInterfaceFuncs, size_t cbInterfaceFuncs)
5772{
5773 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
5774 AssertReturn(p3dState, VERR_NOT_SUPPORTED);
5775
5776 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5777 AssertReturn(pBackend, VERR_NOT_SUPPORTED);
5778
5779 if (pvInterfaceFuncs)
5780 RT_BZERO(pvInterfaceFuncs, cbInterfaceFuncs);
5781
5782 int rc = VINF_SUCCESS;
5783 if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_DX) == 0)
5784 {
5785 if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSDX))
5786 {
5787 if (pvInterfaceFuncs)
5788 {
5789 VMSVGA3DBACKENDFUNCSDX *p = (VMSVGA3DBACKENDFUNCSDX *)pvInterfaceFuncs;
5790 p->pfnDXDefineContext = vmsvga3dBackDXDefineContext;
5791 p->pfnDXDestroyContext = vmsvga3dBackDXDestroyContext;
5792 p->pfnDXBindContext = vmsvga3dBackDXBindContext;
5793 p->pfnDXReadbackContext = vmsvga3dBackDXReadbackContext;
5794 p->pfnDXInvalidateContext = vmsvga3dBackDXInvalidateContext;
5795 p->pfnDXSetSingleConstantBuffer = vmsvga3dBackDXSetSingleConstantBuffer;
5796 p->pfnDXSetShaderResources = vmsvga3dBackDXSetShaderResources;
5797 p->pfnDXSetShader = vmsvga3dBackDXSetShader;
5798 p->pfnDXSetSamplers = vmsvga3dBackDXSetSamplers;
5799 p->pfnDXDraw = vmsvga3dBackDXDraw;
5800 p->pfnDXDrawIndexed = vmsvga3dBackDXDrawIndexed;
5801 p->pfnDXDrawInstanced = vmsvga3dBackDXDrawInstanced;
5802 p->pfnDXDrawIndexedInstanced = vmsvga3dBackDXDrawIndexedInstanced;
5803 p->pfnDXDrawAuto = vmsvga3dBackDXDrawAuto;
5804 p->pfnDXSetInputLayout = vmsvga3dBackDXSetInputLayout;
5805 p->pfnDXSetVertexBuffers = vmsvga3dBackDXSetVertexBuffers;
5806 p->pfnDXSetIndexBuffer = vmsvga3dBackDXSetIndexBuffer;
5807 p->pfnDXSetTopology = vmsvga3dBackDXSetTopology;
5808 p->pfnDXSetRenderTargets = vmsvga3dBackDXSetRenderTargets;
5809 p->pfnDXSetBlendState = vmsvga3dBackDXSetBlendState;
5810 p->pfnDXSetDepthStencilState = vmsvga3dBackDXSetDepthStencilState;
5811 p->pfnDXSetRasterizerState = vmsvga3dBackDXSetRasterizerState;
5812 p->pfnDXDefineQuery = vmsvga3dBackDXDefineQuery;
5813 p->pfnDXDestroyQuery = vmsvga3dBackDXDestroyQuery;
5814 p->pfnDXBindQuery = vmsvga3dBackDXBindQuery;
5815 p->pfnDXSetQueryOffset = vmsvga3dBackDXSetQueryOffset;
5816 p->pfnDXBeginQuery = vmsvga3dBackDXBeginQuery;
5817 p->pfnDXEndQuery = vmsvga3dBackDXEndQuery;
5818 p->pfnDXReadbackQuery = vmsvga3dBackDXReadbackQuery;
5819 p->pfnDXSetPredication = vmsvga3dBackDXSetPredication;
5820 p->pfnDXSetSOTargets = vmsvga3dBackDXSetSOTargets;
5821 p->pfnDXSetViewports = vmsvga3dBackDXSetViewports;
5822 p->pfnDXSetScissorRects = vmsvga3dBackDXSetScissorRects;
5823 p->pfnDXClearRenderTargetView = vmsvga3dBackDXClearRenderTargetView;
5824 p->pfnDXClearDepthStencilView = vmsvga3dBackDXClearDepthStencilView;
5825 p->pfnDXPredCopyRegion = vmsvga3dBackDXPredCopyRegion;
5826 p->pfnDXPredCopy = vmsvga3dBackDXPredCopy;
5827 p->pfnDXPresentBlt = vmsvga3dBackDXPresentBlt;
5828 p->pfnDXGenMips = vmsvga3dBackDXGenMips;
5829 p->pfnDXUpdateSubResource = vmsvga3dBackDXUpdateSubResource;
5830 p->pfnDXReadbackSubResource = vmsvga3dBackDXReadbackSubResource;
5831 p->pfnDXInvalidateSubResource = vmsvga3dBackDXInvalidateSubResource;
5832 p->pfnDXDefineShaderResourceView = vmsvga3dBackDXDefineShaderResourceView;
5833 p->pfnDXDestroyShaderResourceView = vmsvga3dBackDXDestroyShaderResourceView;
5834 p->pfnDXDefineRenderTargetView = vmsvga3dBackDXDefineRenderTargetView;
5835 p->pfnDXDestroyRenderTargetView = vmsvga3dBackDXDestroyRenderTargetView;
5836 p->pfnDXDefineDepthStencilView = vmsvga3dBackDXDefineDepthStencilView;
5837 p->pfnDXDestroyDepthStencilView = vmsvga3dBackDXDestroyDepthStencilView;
5838 p->pfnDXDefineElementLayout = vmsvga3dBackDXDefineElementLayout;
5839 p->pfnDXDestroyElementLayout = vmsvga3dBackDXDestroyElementLayout;
5840 p->pfnDXDefineBlendState = vmsvga3dBackDXDefineBlendState;
5841 p->pfnDXDestroyBlendState = vmsvga3dBackDXDestroyBlendState;
5842 p->pfnDXDefineDepthStencilState = vmsvga3dBackDXDefineDepthStencilState;
5843 p->pfnDXDestroyDepthStencilState = vmsvga3dBackDXDestroyDepthStencilState;
5844 p->pfnDXDefineRasterizerState = vmsvga3dBackDXDefineRasterizerState;
5845 p->pfnDXDestroyRasterizerState = vmsvga3dBackDXDestroyRasterizerState;
5846 p->pfnDXDefineSamplerState = vmsvga3dBackDXDefineSamplerState;
5847 p->pfnDXDestroySamplerState = vmsvga3dBackDXDestroySamplerState;
5848 p->pfnDXDefineShader = vmsvga3dBackDXDefineShader;
5849 p->pfnDXDestroyShader = vmsvga3dBackDXDestroyShader;
5850 p->pfnDXBindShader = vmsvga3dBackDXBindShader;
5851 p->pfnDXDefineStreamOutput = vmsvga3dBackDXDefineStreamOutput;
5852 p->pfnDXDestroyStreamOutput = vmsvga3dBackDXDestroyStreamOutput;
5853 p->pfnDXSetStreamOutput = vmsvga3dBackDXSetStreamOutput;
5854 p->pfnDXSetCOTable = vmsvga3dBackDXSetCOTable;
5855 p->pfnDXBufferCopy = vmsvga3dBackDXBufferCopy;
5856 p->pfnDXTransferFromBuffer = vmsvga3dBackDXTransferFromBuffer;
5857 p->pfnDXSurfaceCopyAndReadback = vmsvga3dBackDXSurfaceCopyAndReadback;
5858 p->pfnDXMoveQuery = vmsvga3dBackDXMoveQuery;
5859 p->pfnDXBindAllQuery = vmsvga3dBackDXBindAllQuery;
5860 p->pfnDXReadbackAllQuery = vmsvga3dBackDXReadbackAllQuery;
5861 p->pfnDXPredTransferFromBuffer = vmsvga3dBackDXPredTransferFromBuffer;
5862 p->pfnDXMobFence64 = vmsvga3dBackDXMobFence64;
5863 p->pfnDXBindAllShader = vmsvga3dBackDXBindAllShader;
5864 p->pfnDXHint = vmsvga3dBackDXHint;
5865 p->pfnDXBufferUpdate = vmsvga3dBackDXBufferUpdate;
5866 p->pfnDXSetVSConstantBufferOffset = vmsvga3dBackDXSetVSConstantBufferOffset;
5867 p->pfnDXSetPSConstantBufferOffset = vmsvga3dBackDXSetPSConstantBufferOffset;
5868 p->pfnDXSetGSConstantBufferOffset = vmsvga3dBackDXSetGSConstantBufferOffset;
5869 p->pfnDXSetHSConstantBufferOffset = vmsvga3dBackDXSetHSConstantBufferOffset;
5870 p->pfnDXSetDSConstantBufferOffset = vmsvga3dBackDXSetDSConstantBufferOffset;
5871 p->pfnDXSetCSConstantBufferOffset = vmsvga3dBackDXSetCSConstantBufferOffset;
5872 p->pfnDXCondBindAllShader = vmsvga3dBackDXCondBindAllShader;
5873 p->pfnScreenCopy = vmsvga3dBackScreenCopy;
5874 p->pfnGrowOTable = vmsvga3dBackGrowOTable;
5875 p->pfnDXGrowCOTable = vmsvga3dBackDXGrowCOTable;
5876 p->pfnIntraSurfaceCopy = vmsvga3dBackIntraSurfaceCopy;
5877 p->pfnDefineGBSurface_v3 = vmsvga3dBackDefineGBSurface_v3;
5878 p->pfnDXResolveCopy = vmsvga3dBackDXResolveCopy;
5879 p->pfnDXPredResolveCopy = vmsvga3dBackDXPredResolveCopy;
5880 p->pfnDXPredConvertRegion = vmsvga3dBackDXPredConvertRegion;
5881 p->pfnDXPredConvert = vmsvga3dBackDXPredConvert;
5882 p->pfnWholeSurfaceCopy = vmsvga3dBackWholeSurfaceCopy;
5883 p->pfnDXDefineUAView = vmsvga3dBackDXDefineUAView;
5884 p->pfnDXDestroyUAView = vmsvga3dBackDXDestroyUAView;
5885 p->pfnDXClearUAViewUint = vmsvga3dBackDXClearUAViewUint;
5886 p->pfnDXClearUAViewFloat = vmsvga3dBackDXClearUAViewFloat;
5887 p->pfnDXCopyStructureCount = vmsvga3dBackDXCopyStructureCount;
5888 p->pfnDXSetUAViews = vmsvga3dBackDXSetUAViews;
5889 p->pfnDXDrawIndexedInstancedIndirect = vmsvga3dBackDXDrawIndexedInstancedIndirect;
5890 p->pfnDXDrawInstancedIndirect = vmsvga3dBackDXDrawInstancedIndirect;
5891 p->pfnDXDispatch = vmsvga3dBackDXDispatch;
5892 p->pfnDXDispatchIndirect = vmsvga3dBackDXDispatchIndirect;
5893 p->pfnWriteZeroSurface = vmsvga3dBackWriteZeroSurface;
5894 p->pfnHintZeroSurface = vmsvga3dBackHintZeroSurface;
5895 p->pfnDXTransferToBuffer = vmsvga3dBackDXTransferToBuffer;
5896 p->pfnDXSetStructureCount = vmsvga3dBackDXSetStructureCount;
5897 p->pfnLogicOpsBitBlt = vmsvga3dBackLogicOpsBitBlt;
5898 p->pfnLogicOpsTransBlt = vmsvga3dBackLogicOpsTransBlt;
5899 p->pfnLogicOpsStretchBlt = vmsvga3dBackLogicOpsStretchBlt;
5900 p->pfnLogicOpsColorFill = vmsvga3dBackLogicOpsColorFill;
5901 p->pfnLogicOpsAlphaBlend = vmsvga3dBackLogicOpsAlphaBlend;
5902 p->pfnLogicOpsClearTypeBlend = vmsvga3dBackLogicOpsClearTypeBlend;
5903 p->pfnDefineGBSurface_v4 = vmsvga3dBackDefineGBSurface_v4;
5904 p->pfnDXSetCSUAViews = vmsvga3dBackDXSetCSUAViews;
5905 p->pfnDXSetMinLOD = vmsvga3dBackDXSetMinLOD;
5906 p->pfnDXDefineStreamOutputWithMob = vmsvga3dBackDXDefineStreamOutputWithMob;
5907 p->pfnDXSetShaderIface = vmsvga3dBackDXSetShaderIface;
5908 p->pfnDXBindStreamOutput = vmsvga3dBackDXBindStreamOutput;
5909 p->pfnSurfaceStretchBltNonMSToMS = vmsvga3dBackSurfaceStretchBltNonMSToMS;
5910 p->pfnDXBindShaderIface = vmsvga3dBackDXBindShaderIface;
5911 }
5912 }
5913 else
5914 {
5915 AssertFailed();
5916 rc = VERR_INVALID_PARAMETER;
5917 }
5918 }
5919 else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_MAP) == 0)
5920 {
5921 if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSMAP))
5922 {
5923 if (pvInterfaceFuncs)
5924 {
5925 VMSVGA3DBACKENDFUNCSMAP *p = (VMSVGA3DBACKENDFUNCSMAP *)pvInterfaceFuncs;
5926 p->pfnSurfaceMap = vmsvga3dSurfaceMap;
5927 p->pfnSurfaceUnmap = vmsvga3dSurfaceUnmap;
5928 }
5929 }
5930 else
5931 {
5932 AssertFailed();
5933 rc = VERR_INVALID_PARAMETER;
5934 }
5935 }
5936 else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_GBO) == 0)
5937 {
5938 if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSGBO))
5939 {
5940 if (pvInterfaceFuncs)
5941 {
5942 VMSVGA3DBACKENDFUNCSGBO *p = (VMSVGA3DBACKENDFUNCSGBO *)pvInterfaceFuncs;
5943 p->pfnScreenTargetBind = vmsvga3dScreenTargetBind;
5944 p->pfnScreenTargetUpdate = vmsvga3dScreenTargetUpdate;
5945 }
5946 }
5947 else
5948 {
5949 AssertFailed();
5950 rc = VERR_INVALID_PARAMETER;
5951 }
5952 }
5953 else
5954 rc = VERR_NOT_IMPLEMENTED;
5955 return rc;
5956}
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