VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-win-dx.cpp@ 91348

Last change on this file since 91348 was 89163, checked in by vboxsync, 4 years ago

Devices/Graphics: Build new and old 3D backend. bugref:9830
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1/* $Id: DevVGA-SVGA3d-win-dx.cpp 89163 2021-05-19 13:12:44Z vboxsync $ */
2/** @file
3 * DevVMWare - VMWare SVGA device
4 */
5
6/*
7 * Copyright (C) 2020 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
23#include <VBox/AssertGuest.h>
24#include <VBox/log.h>
25#include <VBox/vmm/pdmdev.h>
26#include <VBox/vmm/pgm.h>
27
28#include <iprt/assert.h>
29#include <iprt/avl.h>
30#include <iprt/errcore.h>
31#include <iprt/mem.h>
32
33#include <VBoxVideo.h> /* required by DevVGA.h */
34#include <VBoxVideo3D.h>
35
36/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
37#include "DevVGA.h"
38
39#include "DevVGA-SVGA.h"
40#include "DevVGA-SVGA3d.h"
41#include "DevVGA-SVGA3d-internal.h"
42#include "DevVGA-SVGA3d-dx-shader.h"
43
44#include <d3d11.h>
45
46#define DX_RELEASE_ARRAY(a_Count, a_papArray) do { \
47 for (uint32_t i = 0; i < (a_Count); ++i) \
48 D3D_RELEASE((a_papArray)[i]); \
49} while (0)
50
51typedef struct DXDEVICE
52{
53 ID3D11Device *pDevice; /* Device. */
54 ID3D11DeviceContext *pImmediateContext; /* Corresponding context. */
55 IDXGIFactory *pDxgiFactory; /* DXGI Factory. */
56 D3D_FEATURE_LEVEL FeatureLevel;
57} DXDEVICE;
58
59/* What kind of resource has been created for the VMSVGA3D surface. */
60typedef enum VMSVGA3DBACKRESTYPE
61{
62 VMSVGA3D_RESTYPE_NONE = 0,
63 VMSVGA3D_RESTYPE_SCREEN_TARGET = 1,
64 VMSVGA3D_RESTYPE_TEXTURE_1D = 2,
65 VMSVGA3D_RESTYPE_TEXTURE = 3,
66 VMSVGA3D_RESTYPE_CUBE_TEXTURE = 4,
67 VMSVGA3D_RESTYPE_TEXTURE_3D = 5,
68 VMSVGA3D_RESTYPE_BUFFER = 6,
69} VMSVGA3DBACKRESTYPE;
70
71typedef struct VMSVGA3DBACKENDSURFACE
72{
73 VMSVGA3DBACKRESTYPE enmResType;
74 DXGI_FORMAT enmDxgiFormat;
75 /** AVL tree containing DXSHAREDTEXTURE structures. */
76 AVLU32TREE SharedTextureTree;
77 union
78 {
79 struct
80 {
81 ID3D11Resource *pResource;
82 } Resource;
83 struct
84 {
85 ID3D11Texture2D *pTexture; /* The texture for the screen content. */
86 ID3D11Texture2D *pDynamicTexture; /* For screen updates from memory. */ /** @todo One for all screens. */
87 ID3D11Texture2D *pStagingTexture; /* For Reading the screen content. */ /** @todo One for all screens. */
88 /* Screen targets are created as shared surfaces. */
89 HANDLE SharedHandle; /* The shared handle of this structure. */
90 } ScreenTarget;
91 struct
92 {
93 ID3D11Texture2D *pTexture; /* The texture for the screen content. */
94 ID3D11Texture2D *pDynamicTexture; /* For screen updates from memory. */ /** @todo One for every format. */
95 ID3D11Texture2D *pStagingTexture; /* For Reading the screen content. */ /** @todo One for every format. */
96 } Texture;
97 struct
98 {
99 ID3D11Buffer *pBuffer;
100 } Buffer;
101 } u;
102} VMSVGA3DBACKENDSURFACE;
103
104/* "The only resources that can be shared are 2D non-mipmapped textures." */
105typedef struct DXSHAREDTEXTURE
106{
107 AVLU32NODECORE Core; /* Key is context id which opened this texture. */
108 ID3D11Texture2D *pTexture; /* The opened shared texture. */
109 uint32_t sid; /* Surface id. */
110} DXSHAREDTEXTURE;
111
112
113typedef struct VMSVGAHWSCREEN
114{
115 ID3D11Texture2D *pTexture; /* Shared texture for the screen content. Only used as CopyResource target. */
116 IDXGIResource *pDxgiResource; /* Interface of the texture. */
117 IDXGIKeyedMutex *pDXGIKeyedMutex; /* Synchronization interface for the render device. */
118 HANDLE SharedHandle; /* The shared handle of this structure. */
119 uint32_t sidScreenTarget; /* The source surface for this screen. */
120} VMSVGAHWSCREEN;
121
122
123typedef struct DXELEMENTLAYOUT
124{
125 ID3D11InputLayout *pElementLayout;
126 uint32_t cElementDesc;
127 D3D11_INPUT_ELEMENT_DESC aElementDesc[32];
128} DXELEMENTLAYOUT;
129
130typedef struct DXSHADER
131{
132 SVGA3dShaderType enmShaderType;
133 union
134 {
135 ID3D11DeviceChild *pShader; /* All. */
136 ID3D11VertexShader *pVertexShader; /* SVGA3D_SHADERTYPE_VS */
137 ID3D11PixelShader *pPixelShader; /* SVGA3D_SHADERTYPE_PS */
138 ID3D11GeometryShader *pGeometryShader; /* SVGA3D_SHADERTYPE_GS */
139 ID3D11HullShader *pHullShader; /* SVGA3D_SHADERTYPE_HS */
140 ID3D11DomainShader *pDomainShader; /* SVGA3D_SHADERTYPE_DS */
141 ID3D11ComputeShader *pComputeShader; /* SVGA3D_SHADERTYPE_CS */
142 };
143 void *pvDXBC;
144 uint32_t cbDXBC;
145} DXSHADER;
146
147typedef struct VMSVGA3DBACKENDDXCONTEXT
148{
149 DXDEVICE device; /* Device for the this context operation. */
150
151 /* Arrays for Context-Object Tables. Number of entries depends on COTable size. */
152 uint32_t cBlendState; /* Number of entries in the papBlendState array. */
153 uint32_t cDepthStencilState; /* papDepthStencilState */
154 uint32_t cSamplerState; /* papSamplerState */
155 uint32_t cRasterizerState; /* papRasterizerState */
156 uint32_t cElementLayout; /* papElementLayout */
157 uint32_t cRenderTargetView; /* papRenderTargetView */
158 uint32_t cDepthStencilView; /* papDepthStencilView */
159 uint32_t cShaderResourceView; /* papShaderResourceView */
160 uint32_t cQuery; /* papQuery */
161 uint32_t cShader; /* papShader */
162 ID3D11BlendState **papBlendState;
163 ID3D11DepthStencilState **papDepthStencilState;
164 ID3D11SamplerState **papSamplerState;
165 ID3D11RasterizerState **papRasterizerState;
166 DXELEMENTLAYOUT *paElementLayout;
167 ID3D11RenderTargetView **papRenderTargetView;
168 ID3D11DepthStencilView **papDepthStencilView;
169 ID3D11ShaderResourceView **papShaderResourceView;
170 ID3D11Query **papQuery;
171 DXSHADER *paShader;
172} VMSVGA3DBACKENDDXCONTEXT;
173
174typedef HRESULT FN_D3D_DISASSEMBLE(LPCVOID pSrcData, SIZE_T SrcDataSize, UINT Flags, LPCSTR szComments, ID3D10Blob **ppDisassembly);
175typedef FN_D3D_DISASSEMBLE *PFN_D3D_DISASSEMBLE;
176
177typedef struct VMSVGA3DBACKEND
178{
179 RTLDRMOD hD3D11;
180 PFN_D3D11_CREATE_DEVICE pfnD3D11CreateDevice;
181
182 RTLDRMOD hD3DCompiler;
183 PFN_D3D_DISASSEMBLE pfnD3DDisassemble;
184
185 DXDEVICE device; /* Device for the VMSVGA3D context independent operation. */
186} VMSVGA3DBACKEND;
187
188
189static DECLCALLBACK(void) vmsvga3dBackSurfaceDestroy(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface);
190
191
192DECLINLINE(D3D11_TEXTURECUBE_FACE) vmsvga3dCubemapFaceFromIndex(uint32_t iFace)
193{
194 D3D11_TEXTURECUBE_FACE Face;
195 switch (iFace)
196 {
197 case 0: Face = D3D11_TEXTURECUBE_FACE_POSITIVE_X; break;
198 case 1: Face = D3D11_TEXTURECUBE_FACE_NEGATIVE_X; break;
199 case 2: Face = D3D11_TEXTURECUBE_FACE_POSITIVE_Y; break;
200 case 3: Face = D3D11_TEXTURECUBE_FACE_NEGATIVE_Y; break;
201 case 4: Face = D3D11_TEXTURECUBE_FACE_POSITIVE_Z; break;
202 default:
203 case 5: Face = D3D11_TEXTURECUBE_FACE_NEGATIVE_Z; break;
204 }
205 return Face;
206}
207
208
209static DXGI_FORMAT vmsvgaDXSurfaceFormat2Dxgi(SVGA3dSurfaceFormat format)
210{
211 /* Ensure that correct headers are used.
212 * SVGA3D_AYUV was equal to 45, then replaced with SVGA3D_FORMAT_DEAD2 = 45, and redefined as SVGA3D_AYUV = 152.
213 */
214 AssertCompile(SVGA3D_AYUV == 152);
215
216#define DXGI_FORMAT_ DXGI_FORMAT_UNKNOWN
217 /** @todo More formats. */
218 switch (format)
219 {
220 case SVGA3D_X8R8G8B8: return DXGI_FORMAT_B8G8R8X8_UNORM;
221 case SVGA3D_A8R8G8B8: return DXGI_FORMAT_B8G8R8A8_UNORM;
222 case SVGA3D_R5G6B5: return DXGI_FORMAT_B5G6R5_UNORM;
223 case SVGA3D_X1R5G5B5: return DXGI_FORMAT_B5G5R5A1_UNORM;
224 case SVGA3D_A1R5G5B5: return DXGI_FORMAT_B5G5R5A1_UNORM;
225 case SVGA3D_A4R4G4B4: break; // 11.1 return DXGI_FORMAT_B4G4R4A4_UNORM;
226 case SVGA3D_Z_D32: break;
227 case SVGA3D_Z_D16: return DXGI_FORMAT_D16_UNORM;
228 case SVGA3D_Z_D24S8: return DXGI_FORMAT_D24_UNORM_S8_UINT;
229 case SVGA3D_Z_D15S1: break;
230 case SVGA3D_LUMINANCE8: return DXGI_FORMAT_;
231 case SVGA3D_LUMINANCE4_ALPHA4: return DXGI_FORMAT_;
232 case SVGA3D_LUMINANCE16: return DXGI_FORMAT_;
233 case SVGA3D_LUMINANCE8_ALPHA8: return DXGI_FORMAT_;
234 case SVGA3D_DXT1: return DXGI_FORMAT_;
235 case SVGA3D_DXT2: return DXGI_FORMAT_;
236 case SVGA3D_DXT3: return DXGI_FORMAT_;
237 case SVGA3D_DXT4: return DXGI_FORMAT_;
238 case SVGA3D_DXT5: return DXGI_FORMAT_;
239 case SVGA3D_BUMPU8V8: return DXGI_FORMAT_;
240 case SVGA3D_BUMPL6V5U5: return DXGI_FORMAT_;
241 case SVGA3D_BUMPX8L8V8U8: return DXGI_FORMAT_;
242 case SVGA3D_FORMAT_DEAD1: break;
243 case SVGA3D_ARGB_S10E5: return DXGI_FORMAT_;
244 case SVGA3D_ARGB_S23E8: return DXGI_FORMAT_;
245 case SVGA3D_A2R10G10B10: return DXGI_FORMAT_;
246 case SVGA3D_V8U8: return DXGI_FORMAT_;
247 case SVGA3D_Q8W8V8U8: return DXGI_FORMAT_;
248 case SVGA3D_CxV8U8: return DXGI_FORMAT_;
249 case SVGA3D_X8L8V8U8: return DXGI_FORMAT_;
250 case SVGA3D_A2W10V10U10: return DXGI_FORMAT_;
251 case SVGA3D_ALPHA8: return DXGI_FORMAT_;
252 case SVGA3D_R_S10E5: return DXGI_FORMAT_;
253 case SVGA3D_R_S23E8: return DXGI_FORMAT_;
254 case SVGA3D_RG_S10E5: return DXGI_FORMAT_;
255 case SVGA3D_RG_S23E8: return DXGI_FORMAT_;
256 case SVGA3D_BUFFER: return DXGI_FORMAT_;
257 case SVGA3D_Z_D24X8: return DXGI_FORMAT_;
258 case SVGA3D_V16U16: return DXGI_FORMAT_;
259 case SVGA3D_G16R16: return DXGI_FORMAT_;
260 case SVGA3D_A16B16G16R16: return DXGI_FORMAT_;
261 case SVGA3D_UYVY: return DXGI_FORMAT_;
262 case SVGA3D_YUY2: return DXGI_FORMAT_;
263 case SVGA3D_NV12: return DXGI_FORMAT_;
264 case SVGA3D_FORMAT_DEAD2: break; /* Old SVGA3D_AYUV */
265 case SVGA3D_R32G32B32A32_TYPELESS: return DXGI_FORMAT_R32G32B32A32_TYPELESS;
266 case SVGA3D_R32G32B32A32_UINT: return DXGI_FORMAT_R32G32B32A32_UINT;
267 case SVGA3D_R32G32B32A32_SINT: return DXGI_FORMAT_R32G32B32A32_SINT;
268 case SVGA3D_R32G32B32_TYPELESS: return DXGI_FORMAT_R32G32B32_TYPELESS;
269 case SVGA3D_R32G32B32_FLOAT: return DXGI_FORMAT_R32G32B32_FLOAT;
270 case SVGA3D_R32G32B32_UINT: return DXGI_FORMAT_R32G32B32_UINT;
271 case SVGA3D_R32G32B32_SINT: return DXGI_FORMAT_R32G32B32_SINT;
272 case SVGA3D_R16G16B16A16_TYPELESS: return DXGI_FORMAT_R16G16B16A16_TYPELESS;
273 case SVGA3D_R16G16B16A16_UINT: return DXGI_FORMAT_R16G16B16A16_UINT;
274 case SVGA3D_R16G16B16A16_SNORM: return DXGI_FORMAT_R16G16B16A16_SNORM;
275 case SVGA3D_R16G16B16A16_SINT: return DXGI_FORMAT_R16G16B16A16_SINT;
276 case SVGA3D_R32G32_TYPELESS: return DXGI_FORMAT_R32G32_TYPELESS;
277 case SVGA3D_R32G32_UINT: return DXGI_FORMAT_R32G32_UINT;
278 case SVGA3D_R32G32_SINT: return DXGI_FORMAT_R32G32_SINT;
279 case SVGA3D_R32G8X24_TYPELESS: return DXGI_FORMAT_R32G8X24_TYPELESS;
280 case SVGA3D_D32_FLOAT_S8X24_UINT: return DXGI_FORMAT_D32_FLOAT_S8X24_UINT;
281 case SVGA3D_R32_FLOAT_X8X24: return DXGI_FORMAT_R32_FLOAT_X8X24_TYPELESS;
282 case SVGA3D_X32_G8X24_UINT: return DXGI_FORMAT_X32_TYPELESS_G8X24_UINT;
283 case SVGA3D_R10G10B10A2_TYPELESS: return DXGI_FORMAT_R10G10B10A2_TYPELESS;
284 case SVGA3D_R10G10B10A2_UINT: return DXGI_FORMAT_R10G10B10A2_UINT;
285 case SVGA3D_R11G11B10_FLOAT: return DXGI_FORMAT_R11G11B10_FLOAT;
286 case SVGA3D_R8G8B8A8_TYPELESS: return DXGI_FORMAT_R8G8B8A8_TYPELESS;
287 case SVGA3D_R8G8B8A8_UNORM: return DXGI_FORMAT_R8G8B8A8_UNORM;
288 case SVGA3D_R8G8B8A8_UNORM_SRGB: return DXGI_FORMAT_R8G8B8A8_UNORM_SRGB;
289 case SVGA3D_R8G8B8A8_UINT: return DXGI_FORMAT_R8G8B8A8_UINT;
290 case SVGA3D_R8G8B8A8_SINT: return DXGI_FORMAT_R8G8B8A8_SINT;
291 case SVGA3D_R16G16_TYPELESS: return DXGI_FORMAT_R16G16_TYPELESS;
292 case SVGA3D_R16G16_UINT: return DXGI_FORMAT_R16G16_UINT;
293 case SVGA3D_R16G16_SINT: return DXGI_FORMAT_R16G16_SINT;
294 case SVGA3D_R32_TYPELESS: return DXGI_FORMAT_R32_TYPELESS;
295 case SVGA3D_D32_FLOAT: return DXGI_FORMAT_D32_FLOAT;
296 case SVGA3D_R32_UINT: return DXGI_FORMAT_R32_UINT;
297 case SVGA3D_R32_SINT: return DXGI_FORMAT_R32_SINT;
298 case SVGA3D_R24G8_TYPELESS: return DXGI_FORMAT_R24G8_TYPELESS;
299 case SVGA3D_D24_UNORM_S8_UINT: return DXGI_FORMAT_D24_UNORM_S8_UINT;
300 case SVGA3D_R24_UNORM_X8: return DXGI_FORMAT_R24_UNORM_X8_TYPELESS;
301 case SVGA3D_X24_G8_UINT: return DXGI_FORMAT_X24_TYPELESS_G8_UINT;
302 case SVGA3D_R8G8_TYPELESS: return DXGI_FORMAT_R8G8_TYPELESS;
303 case SVGA3D_R8G8_UNORM: return DXGI_FORMAT_R8G8_UNORM;
304 case SVGA3D_R8G8_UINT: return DXGI_FORMAT_R8G8_UINT;
305 case SVGA3D_R8G8_SINT: return DXGI_FORMAT_R8G8_SINT;
306 case SVGA3D_R16_TYPELESS: return DXGI_FORMAT_R16_TYPELESS;
307 case SVGA3D_R16_UNORM: return DXGI_FORMAT_R16_UNORM;
308 case SVGA3D_R16_UINT: return DXGI_FORMAT_R16_UINT;
309 case SVGA3D_R16_SNORM: return DXGI_FORMAT_R16_SNORM;
310 case SVGA3D_R16_SINT: return DXGI_FORMAT_R16_SINT;
311 case SVGA3D_R8_TYPELESS: return DXGI_FORMAT_R8_TYPELESS;
312 case SVGA3D_R8_UNORM: return DXGI_FORMAT_R8_UNORM;
313 case SVGA3D_R8_UINT: return DXGI_FORMAT_R8_UINT;
314 case SVGA3D_R8_SNORM: return DXGI_FORMAT_R8_SNORM;
315 case SVGA3D_R8_SINT: return DXGI_FORMAT_R8_SINT;
316 case SVGA3D_P8: break;
317 case SVGA3D_R9G9B9E5_SHAREDEXP: return DXGI_FORMAT_R9G9B9E5_SHAREDEXP;
318 case SVGA3D_R8G8_B8G8_UNORM: return DXGI_FORMAT_R8G8_B8G8_UNORM;
319 case SVGA3D_G8R8_G8B8_UNORM: return DXGI_FORMAT_G8R8_G8B8_UNORM;
320 case SVGA3D_BC1_TYPELESS: return DXGI_FORMAT_BC1_TYPELESS;
321 case SVGA3D_BC1_UNORM_SRGB: return DXGI_FORMAT_BC1_UNORM_SRGB;
322 case SVGA3D_BC2_TYPELESS: return DXGI_FORMAT_BC2_TYPELESS;
323 case SVGA3D_BC2_UNORM_SRGB: return DXGI_FORMAT_BC2_UNORM_SRGB;
324 case SVGA3D_BC3_TYPELESS: return DXGI_FORMAT_BC3_TYPELESS;
325 case SVGA3D_BC3_UNORM_SRGB: return DXGI_FORMAT_BC3_UNORM_SRGB;
326 case SVGA3D_BC4_TYPELESS: return DXGI_FORMAT_BC4_TYPELESS;
327 case SVGA3D_ATI1: break;
328 case SVGA3D_BC4_SNORM: return DXGI_FORMAT_BC4_SNORM;
329 case SVGA3D_BC5_TYPELESS: return DXGI_FORMAT_BC5_TYPELESS;
330 case SVGA3D_ATI2: break;
331 case SVGA3D_BC5_SNORM: return DXGI_FORMAT_BC5_SNORM;
332 case SVGA3D_R10G10B10_XR_BIAS_A2_UNORM: return DXGI_FORMAT_R10G10B10_XR_BIAS_A2_UNORM;
333 case SVGA3D_B8G8R8A8_TYPELESS: return DXGI_FORMAT_B8G8R8A8_TYPELESS;
334 case SVGA3D_B8G8R8A8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8A8_UNORM_SRGB;
335 case SVGA3D_B8G8R8X8_TYPELESS: return DXGI_FORMAT_B8G8R8X8_TYPELESS;
336 case SVGA3D_B8G8R8X8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8X8_UNORM_SRGB;
337 case SVGA3D_Z_DF16: break;
338 case SVGA3D_Z_DF24: break;
339 case SVGA3D_Z_D24S8_INT: return DXGI_FORMAT_D24_UNORM_S8_UINT;
340 case SVGA3D_YV12: break;
341 case SVGA3D_R32G32B32A32_FLOAT: return DXGI_FORMAT_R32G32B32A32_FLOAT;
342 case SVGA3D_R16G16B16A16_FLOAT: return DXGI_FORMAT_R16G16B16A16_FLOAT;
343 case SVGA3D_R16G16B16A16_UNORM: return DXGI_FORMAT_R16G16B16A16_UNORM;
344 case SVGA3D_R32G32_FLOAT: return DXGI_FORMAT_R32G32_FLOAT;
345 case SVGA3D_R10G10B10A2_UNORM: return DXGI_FORMAT_R10G10B10A2_UNORM;
346 case SVGA3D_R8G8B8A8_SNORM: return DXGI_FORMAT_R8G8B8A8_SNORM;
347 case SVGA3D_R16G16_FLOAT: return DXGI_FORMAT_R16G16_FLOAT;
348 case SVGA3D_R16G16_UNORM: return DXGI_FORMAT_R16G16_UNORM;
349 case SVGA3D_R16G16_SNORM: return DXGI_FORMAT_R16G16_SNORM;
350 case SVGA3D_R32_FLOAT: return DXGI_FORMAT_R32_FLOAT;
351 case SVGA3D_R8G8_SNORM: return DXGI_FORMAT_R8G8_SNORM;
352 case SVGA3D_R16_FLOAT: return DXGI_FORMAT_R16_FLOAT;
353 case SVGA3D_D16_UNORM: return DXGI_FORMAT_D16_UNORM;
354 case SVGA3D_A8_UNORM: return DXGI_FORMAT_A8_UNORM;
355 case SVGA3D_BC1_UNORM: return DXGI_FORMAT_BC1_UNORM;
356 case SVGA3D_BC2_UNORM: return DXGI_FORMAT_BC2_UNORM;
357 case SVGA3D_BC3_UNORM: return DXGI_FORMAT_BC3_UNORM;
358 case SVGA3D_B5G6R5_UNORM: return DXGI_FORMAT_B5G6R5_UNORM;
359 case SVGA3D_B5G5R5A1_UNORM: return DXGI_FORMAT_B5G5R5A1_UNORM;
360 case SVGA3D_B8G8R8A8_UNORM: return DXGI_FORMAT_B8G8R8A8_UNORM;
361 case SVGA3D_B8G8R8X8_UNORM: return DXGI_FORMAT_B8G8R8X8_UNORM;
362 case SVGA3D_BC4_UNORM: return DXGI_FORMAT_BC4_UNORM;
363 case SVGA3D_BC5_UNORM: return DXGI_FORMAT_BC5_UNORM;
364
365 case SVGA3D_B4G4R4A4_UNORM: return DXGI_FORMAT_;
366 case SVGA3D_BC6H_TYPELESS: return DXGI_FORMAT_;
367 case SVGA3D_BC6H_UF16: return DXGI_FORMAT_;
368 case SVGA3D_BC6H_SF16: return DXGI_FORMAT_;
369 case SVGA3D_BC7_TYPELESS: return DXGI_FORMAT_;
370 case SVGA3D_BC7_UNORM: return DXGI_FORMAT_;
371 case SVGA3D_BC7_UNORM_SRGB: return DXGI_FORMAT_;
372 case SVGA3D_AYUV: return DXGI_FORMAT_;
373
374 case SVGA3D_FORMAT_INVALID:
375 case SVGA3D_FORMAT_MAX: break;
376 }
377 // AssertFailed();
378 return DXGI_FORMAT_UNKNOWN;
379#undef DXGI_FORMAT_
380}
381
382
383static SVGA3dSurfaceFormat vmsvgaDXDevCapSurfaceFmt2Format(SVGA3dDevCapIndex enmDevCap)
384{
385 switch (enmDevCap)
386 {
387 case SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8: return SVGA3D_X8R8G8B8;
388 case SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8: return SVGA3D_A8R8G8B8;
389 case SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10: return SVGA3D_A2R10G10B10;
390 case SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5: return SVGA3D_X1R5G5B5;
391 case SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5: return SVGA3D_A1R5G5B5;
392 case SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4: return SVGA3D_A4R4G4B4;
393 case SVGA3D_DEVCAP_SURFACEFMT_R5G6B5: return SVGA3D_R5G6B5;
394 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16: return SVGA3D_LUMINANCE16;
395 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8: return SVGA3D_LUMINANCE8_ALPHA8;
396 case SVGA3D_DEVCAP_SURFACEFMT_ALPHA8: return SVGA3D_ALPHA8;
397 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8: return SVGA3D_LUMINANCE8;
398 case SVGA3D_DEVCAP_SURFACEFMT_Z_D16: return SVGA3D_Z_D16;
399 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8: return SVGA3D_Z_D24S8;
400 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8: return SVGA3D_Z_D24X8;
401 case SVGA3D_DEVCAP_SURFACEFMT_DXT1: return SVGA3D_DXT1;
402 case SVGA3D_DEVCAP_SURFACEFMT_DXT2: return SVGA3D_DXT2;
403 case SVGA3D_DEVCAP_SURFACEFMT_DXT3: return SVGA3D_DXT3;
404 case SVGA3D_DEVCAP_SURFACEFMT_DXT4: return SVGA3D_DXT4;
405 case SVGA3D_DEVCAP_SURFACEFMT_DXT5: return SVGA3D_DXT5;
406 case SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8: return SVGA3D_BUMPX8L8V8U8;
407 case SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10: return SVGA3D_A2W10V10U10;
408 case SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8: return SVGA3D_BUMPU8V8;
409 case SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8: return SVGA3D_Q8W8V8U8;
410 case SVGA3D_DEVCAP_SURFACEFMT_CxV8U8: return SVGA3D_CxV8U8;
411 case SVGA3D_DEVCAP_SURFACEFMT_R_S10E5: return SVGA3D_R_S10E5;
412 case SVGA3D_DEVCAP_SURFACEFMT_R_S23E8: return SVGA3D_R_S23E8;
413 case SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5: return SVGA3D_RG_S10E5;
414 case SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8: return SVGA3D_RG_S23E8;
415 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5: return SVGA3D_ARGB_S10E5;
416 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8: return SVGA3D_ARGB_S23E8;
417 case SVGA3D_DEVCAP_SURFACEFMT_V16U16: return SVGA3D_V16U16;
418 case SVGA3D_DEVCAP_SURFACEFMT_G16R16: return SVGA3D_G16R16;
419 case SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16: return SVGA3D_A16B16G16R16;
420 case SVGA3D_DEVCAP_SURFACEFMT_UYVY: return SVGA3D_UYVY;
421 case SVGA3D_DEVCAP_SURFACEFMT_YUY2: return SVGA3D_YUY2;
422 case SVGA3D_DEVCAP_SURFACEFMT_NV12: return SVGA3D_NV12;
423 case SVGA3D_DEVCAP_DEAD10: return SVGA3D_FORMAT_DEAD2; /* SVGA3D_DEVCAP_SURFACEFMT_AYUV -> SVGA3D_AYUV */
424 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF16: return SVGA3D_Z_DF16;
425 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF24: return SVGA3D_Z_DF24;
426 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT: return SVGA3D_Z_D24S8_INT;
427 case SVGA3D_DEVCAP_SURFACEFMT_ATI1: return SVGA3D_ATI1;
428 case SVGA3D_DEVCAP_SURFACEFMT_ATI2: return SVGA3D_ATI2;
429 case SVGA3D_DEVCAP_SURFACEFMT_YV12: return SVGA3D_YV12;
430 default:
431 AssertFailed();
432 break;
433 }
434 return SVGA3D_FORMAT_INVALID;
435}
436
437
438static SVGA3dSurfaceFormat vmsvgaDXDevCapDxfmt2Format(SVGA3dDevCapIndex enmDevCap)
439{
440 switch (enmDevCap)
441 {
442 case SVGA3D_DEVCAP_DXFMT_X8R8G8B8: return SVGA3D_X8R8G8B8;
443 case SVGA3D_DEVCAP_DXFMT_A8R8G8B8: return SVGA3D_A8R8G8B8;
444 case SVGA3D_DEVCAP_DXFMT_R5G6B5: return SVGA3D_R5G6B5;
445 case SVGA3D_DEVCAP_DXFMT_X1R5G5B5: return SVGA3D_X1R5G5B5;
446 case SVGA3D_DEVCAP_DXFMT_A1R5G5B5: return SVGA3D_A1R5G5B5;
447 case SVGA3D_DEVCAP_DXFMT_A4R4G4B4: return SVGA3D_A4R4G4B4;
448 case SVGA3D_DEVCAP_DXFMT_Z_D32: return SVGA3D_Z_D32;
449 case SVGA3D_DEVCAP_DXFMT_Z_D16: return SVGA3D_Z_D16;
450 case SVGA3D_DEVCAP_DXFMT_Z_D24S8: return SVGA3D_Z_D24S8;
451 case SVGA3D_DEVCAP_DXFMT_Z_D15S1: return SVGA3D_Z_D15S1;
452 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8: return SVGA3D_LUMINANCE8;
453 case SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4: return SVGA3D_LUMINANCE4_ALPHA4;
454 case SVGA3D_DEVCAP_DXFMT_LUMINANCE16: return SVGA3D_LUMINANCE16;
455 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8: return SVGA3D_LUMINANCE8_ALPHA8;
456 case SVGA3D_DEVCAP_DXFMT_DXT1: return SVGA3D_DXT1;
457 case SVGA3D_DEVCAP_DXFMT_DXT2: return SVGA3D_DXT2;
458 case SVGA3D_DEVCAP_DXFMT_DXT3: return SVGA3D_DXT3;
459 case SVGA3D_DEVCAP_DXFMT_DXT4: return SVGA3D_DXT4;
460 case SVGA3D_DEVCAP_DXFMT_DXT5: return SVGA3D_DXT5;
461 case SVGA3D_DEVCAP_DXFMT_BUMPU8V8: return SVGA3D_BUMPU8V8;
462 case SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5: return SVGA3D_BUMPL6V5U5;
463 case SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8: return SVGA3D_BUMPX8L8V8U8;
464 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1: return SVGA3D_FORMAT_DEAD1;
465 case SVGA3D_DEVCAP_DXFMT_ARGB_S10E5: return SVGA3D_ARGB_S10E5;
466 case SVGA3D_DEVCAP_DXFMT_ARGB_S23E8: return SVGA3D_ARGB_S23E8;
467 case SVGA3D_DEVCAP_DXFMT_A2R10G10B10: return SVGA3D_A2R10G10B10;
468 case SVGA3D_DEVCAP_DXFMT_V8U8: return SVGA3D_V8U8;
469 case SVGA3D_DEVCAP_DXFMT_Q8W8V8U8: return SVGA3D_Q8W8V8U8;
470 case SVGA3D_DEVCAP_DXFMT_CxV8U8: return SVGA3D_CxV8U8;
471 case SVGA3D_DEVCAP_DXFMT_X8L8V8U8: return SVGA3D_X8L8V8U8;
472 case SVGA3D_DEVCAP_DXFMT_A2W10V10U10: return SVGA3D_A2W10V10U10;
473 case SVGA3D_DEVCAP_DXFMT_ALPHA8: return SVGA3D_ALPHA8;
474 case SVGA3D_DEVCAP_DXFMT_R_S10E5: return SVGA3D_R_S10E5;
475 case SVGA3D_DEVCAP_DXFMT_R_S23E8: return SVGA3D_R_S23E8;
476 case SVGA3D_DEVCAP_DXFMT_RG_S10E5: return SVGA3D_RG_S10E5;
477 case SVGA3D_DEVCAP_DXFMT_RG_S23E8: return SVGA3D_RG_S23E8;
478 case SVGA3D_DEVCAP_DXFMT_BUFFER: return SVGA3D_BUFFER;
479 case SVGA3D_DEVCAP_DXFMT_Z_D24X8: return SVGA3D_Z_D24X8;
480 case SVGA3D_DEVCAP_DXFMT_V16U16: return SVGA3D_V16U16;
481 case SVGA3D_DEVCAP_DXFMT_G16R16: return SVGA3D_G16R16;
482 case SVGA3D_DEVCAP_DXFMT_A16B16G16R16: return SVGA3D_A16B16G16R16;
483 case SVGA3D_DEVCAP_DXFMT_UYVY: return SVGA3D_UYVY;
484 case SVGA3D_DEVCAP_DXFMT_YUY2: return SVGA3D_YUY2;
485 case SVGA3D_DEVCAP_DXFMT_NV12: return SVGA3D_NV12;
486 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD2: return SVGA3D_FORMAT_DEAD2; /* SVGA3D_DEVCAP_DXFMT_AYUV -> SVGA3D_AYUV */
487 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS: return SVGA3D_R32G32B32A32_TYPELESS;
488 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT: return SVGA3D_R32G32B32A32_UINT;
489 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT: return SVGA3D_R32G32B32A32_SINT;
490 case SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS: return SVGA3D_R32G32B32_TYPELESS;
491 case SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT: return SVGA3D_R32G32B32_FLOAT;
492 case SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT: return SVGA3D_R32G32B32_UINT;
493 case SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT: return SVGA3D_R32G32B32_SINT;
494 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS: return SVGA3D_R16G16B16A16_TYPELESS;
495 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT: return SVGA3D_R16G16B16A16_UINT;
496 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM: return SVGA3D_R16G16B16A16_SNORM;
497 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT: return SVGA3D_R16G16B16A16_SINT;
498 case SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS: return SVGA3D_R32G32_TYPELESS;
499 case SVGA3D_DEVCAP_DXFMT_R32G32_UINT: return SVGA3D_R32G32_UINT;
500 case SVGA3D_DEVCAP_DXFMT_R32G32_SINT: return SVGA3D_R32G32_SINT;
501 case SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS: return SVGA3D_R32G8X24_TYPELESS;
502 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT: return SVGA3D_D32_FLOAT_S8X24_UINT;
503 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24: return SVGA3D_R32_FLOAT_X8X24;
504 case SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT: return SVGA3D_X32_G8X24_UINT;
505 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS: return SVGA3D_R10G10B10A2_TYPELESS;
506 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT: return SVGA3D_R10G10B10A2_UINT;
507 case SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT: return SVGA3D_R11G11B10_FLOAT;
508 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS: return SVGA3D_R8G8B8A8_TYPELESS;
509 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM: return SVGA3D_R8G8B8A8_UNORM;
510 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB: return SVGA3D_R8G8B8A8_UNORM_SRGB;
511 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT: return SVGA3D_R8G8B8A8_UINT;
512 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT: return SVGA3D_R8G8B8A8_SINT;
513 case SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS: return SVGA3D_R16G16_TYPELESS;
514 case SVGA3D_DEVCAP_DXFMT_R16G16_UINT: return SVGA3D_R16G16_UINT;
515 case SVGA3D_DEVCAP_DXFMT_R16G16_SINT: return SVGA3D_R16G16_SINT;
516 case SVGA3D_DEVCAP_DXFMT_R32_TYPELESS: return SVGA3D_R32_TYPELESS;
517 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT: return SVGA3D_D32_FLOAT;
518 case SVGA3D_DEVCAP_DXFMT_R32_UINT: return SVGA3D_R32_UINT;
519 case SVGA3D_DEVCAP_DXFMT_R32_SINT: return SVGA3D_R32_SINT;
520 case SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS: return SVGA3D_R24G8_TYPELESS;
521 case SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT: return SVGA3D_D24_UNORM_S8_UINT;
522 case SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8: return SVGA3D_R24_UNORM_X8;
523 case SVGA3D_DEVCAP_DXFMT_X24_G8_UINT: return SVGA3D_X24_G8_UINT;
524 case SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS: return SVGA3D_R8G8_TYPELESS;
525 case SVGA3D_DEVCAP_DXFMT_R8G8_UNORM: return SVGA3D_R8G8_UNORM;
526 case SVGA3D_DEVCAP_DXFMT_R8G8_UINT: return SVGA3D_R8G8_UINT;
527 case SVGA3D_DEVCAP_DXFMT_R8G8_SINT: return SVGA3D_R8G8_SINT;
528 case SVGA3D_DEVCAP_DXFMT_R16_TYPELESS: return SVGA3D_R16_TYPELESS;
529 case SVGA3D_DEVCAP_DXFMT_R16_UNORM: return SVGA3D_R16_UNORM;
530 case SVGA3D_DEVCAP_DXFMT_R16_UINT: return SVGA3D_R16_UINT;
531 case SVGA3D_DEVCAP_DXFMT_R16_SNORM: return SVGA3D_R16_SNORM;
532 case SVGA3D_DEVCAP_DXFMT_R16_SINT: return SVGA3D_R16_SINT;
533 case SVGA3D_DEVCAP_DXFMT_R8_TYPELESS: return SVGA3D_R8_TYPELESS;
534 case SVGA3D_DEVCAP_DXFMT_R8_UNORM: return SVGA3D_R8_UNORM;
535 case SVGA3D_DEVCAP_DXFMT_R8_UINT: return SVGA3D_R8_UINT;
536 case SVGA3D_DEVCAP_DXFMT_R8_SNORM: return SVGA3D_R8_SNORM;
537 case SVGA3D_DEVCAP_DXFMT_R8_SINT: return SVGA3D_R8_SINT;
538 case SVGA3D_DEVCAP_DXFMT_P8: return SVGA3D_P8;
539 case SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP: return SVGA3D_R9G9B9E5_SHAREDEXP;
540 case SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM: return SVGA3D_R8G8_B8G8_UNORM;
541 case SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM: return SVGA3D_G8R8_G8B8_UNORM;
542 case SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS: return SVGA3D_BC1_TYPELESS;
543 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB: return SVGA3D_BC1_UNORM_SRGB;
544 case SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS: return SVGA3D_BC2_TYPELESS;
545 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB: return SVGA3D_BC2_UNORM_SRGB;
546 case SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS: return SVGA3D_BC3_TYPELESS;
547 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB: return SVGA3D_BC3_UNORM_SRGB;
548 case SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS: return SVGA3D_BC4_TYPELESS;
549 case SVGA3D_DEVCAP_DXFMT_ATI1: return SVGA3D_ATI1;
550 case SVGA3D_DEVCAP_DXFMT_BC4_SNORM: return SVGA3D_BC4_SNORM;
551 case SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS: return SVGA3D_BC5_TYPELESS;
552 case SVGA3D_DEVCAP_DXFMT_ATI2: return SVGA3D_ATI2;
553 case SVGA3D_DEVCAP_DXFMT_BC5_SNORM: return SVGA3D_BC5_SNORM;
554 case SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM: return SVGA3D_R10G10B10_XR_BIAS_A2_UNORM;
555 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS: return SVGA3D_B8G8R8A8_TYPELESS;
556 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB: return SVGA3D_B8G8R8A8_UNORM_SRGB;
557 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS: return SVGA3D_B8G8R8X8_TYPELESS;
558 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB: return SVGA3D_B8G8R8X8_UNORM_SRGB;
559 case SVGA3D_DEVCAP_DXFMT_Z_DF16: return SVGA3D_Z_DF16;
560 case SVGA3D_DEVCAP_DXFMT_Z_DF24: return SVGA3D_Z_DF24;
561 case SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT: return SVGA3D_Z_D24S8_INT;
562 case SVGA3D_DEVCAP_DXFMT_YV12: return SVGA3D_YV12;
563 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT: return SVGA3D_R32G32B32A32_FLOAT;
564 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT: return SVGA3D_R16G16B16A16_FLOAT;
565 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM: return SVGA3D_R16G16B16A16_UNORM;
566 case SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT: return SVGA3D_R32G32_FLOAT;
567 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM: return SVGA3D_R10G10B10A2_UNORM;
568 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM: return SVGA3D_R8G8B8A8_SNORM;
569 case SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT: return SVGA3D_R16G16_FLOAT;
570 case SVGA3D_DEVCAP_DXFMT_R16G16_UNORM: return SVGA3D_R16G16_UNORM;
571 case SVGA3D_DEVCAP_DXFMT_R16G16_SNORM: return SVGA3D_R16G16_SNORM;
572 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT: return SVGA3D_R32_FLOAT;
573 case SVGA3D_DEVCAP_DXFMT_R8G8_SNORM: return SVGA3D_R8G8_SNORM;
574 case SVGA3D_DEVCAP_DXFMT_R16_FLOAT: return SVGA3D_R16_FLOAT;
575 case SVGA3D_DEVCAP_DXFMT_D16_UNORM: return SVGA3D_D16_UNORM;
576 case SVGA3D_DEVCAP_DXFMT_A8_UNORM: return SVGA3D_A8_UNORM;
577 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM: return SVGA3D_BC1_UNORM;
578 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM: return SVGA3D_BC2_UNORM;
579 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM: return SVGA3D_BC3_UNORM;
580 case SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM: return SVGA3D_B5G6R5_UNORM;
581 case SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM: return SVGA3D_B5G5R5A1_UNORM;
582 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM: return SVGA3D_B8G8R8A8_UNORM;
583 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM: return SVGA3D_B8G8R8X8_UNORM;
584 case SVGA3D_DEVCAP_DXFMT_BC4_UNORM: return SVGA3D_BC4_UNORM;
585 case SVGA3D_DEVCAP_DXFMT_BC5_UNORM: return SVGA3D_BC5_UNORM;
586 case SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS: return SVGA3D_BC6H_TYPELESS;
587 case SVGA3D_DEVCAP_DXFMT_BC6H_UF16: return SVGA3D_BC6H_UF16;
588 case SVGA3D_DEVCAP_DXFMT_BC6H_SF16: return SVGA3D_BC6H_SF16;
589 case SVGA3D_DEVCAP_DXFMT_BC7_TYPELESS: return SVGA3D_BC7_TYPELESS;
590 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM: return SVGA3D_BC7_UNORM;
591 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM_SRGB: return SVGA3D_BC7_UNORM_SRGB;
592 default:
593 AssertFailed();
594 break;
595 }
596 return SVGA3D_FORMAT_INVALID;
597}
598
599
600static int vmsvgaDXCheckFormatSupportPreDX(PVMSVGA3DSTATE pState, SVGA3dSurfaceFormat enmFormat, uint32_t *pu32DevCap)
601{
602 int rc = VINF_SUCCESS;
603
604 *pu32DevCap = 0;
605
606 DXGI_FORMAT const dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(enmFormat);
607 if (dxgiFormat != DXGI_FORMAT_UNKNOWN)
608 {
609 RT_NOREF(pState);
610 /** @todo Implement */
611 }
612 else
613 rc = VERR_NOT_SUPPORTED;
614 return rc;
615}
616
617static int vmsvgaDXCheckFormatSupport(PVMSVGA3DSTATE pState, SVGA3dSurfaceFormat enmFormat, uint32_t *pu32DevCap)
618{
619 int rc = VINF_SUCCESS;
620
621 *pu32DevCap = 0;
622
623 DXGI_FORMAT const dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(enmFormat);
624 if (dxgiFormat != DXGI_FORMAT_UNKNOWN)
625 {
626 ID3D11Device *pDevice = pState->pBackend->device.pDevice;
627 UINT FormatSupport = 0;
628 HRESULT hr = pDevice->CheckFormatSupport(dxgiFormat, &FormatSupport);
629 if (SUCCEEDED(hr))
630 {
631 *pu32DevCap |= SVGA3D_DXFMT_SUPPORTED;
632
633 if (FormatSupport & D3D11_FORMAT_SUPPORT_SHADER_SAMPLE)
634 *pu32DevCap |= SVGA3D_DXFMT_SHADER_SAMPLE;
635
636 if (FormatSupport & D3D11_FORMAT_SUPPORT_RENDER_TARGET)
637 *pu32DevCap |= SVGA3D_DXFMT_COLOR_RENDERTARGET;
638
639 if (FormatSupport & D3D11_FORMAT_SUPPORT_DEPTH_STENCIL)
640 *pu32DevCap |= SVGA3D_DXFMT_DEPTH_RENDERTARGET;
641
642 if (FormatSupport & D3D11_FORMAT_SUPPORT_BLENDABLE)
643 *pu32DevCap |= SVGA3D_DXFMT_BLENDABLE;
644
645 if (FormatSupport & D3D11_FORMAT_SUPPORT_MIP)
646 *pu32DevCap |= SVGA3D_DXFMT_MIPS;
647
648 if (FormatSupport & D3D11_FORMAT_SUPPORT_TEXTURECUBE)
649 *pu32DevCap |= SVGA3D_DXFMT_ARRAY;
650
651 if (FormatSupport & D3D11_FORMAT_SUPPORT_TEXTURE3D)
652 *pu32DevCap |= SVGA3D_DXFMT_VOLUME;
653
654 if (FormatSupport & D3D11_FORMAT_SUPPORT_IA_VERTEX_BUFFER)
655 *pu32DevCap |= SVGA3D_DXFMT_DX_VERTEX_BUFFER;
656
657 UINT NumQualityLevels;
658 hr = pDevice->CheckMultisampleQualityLevels(dxgiFormat, 2, &NumQualityLevels);
659 if (SUCCEEDED(hr) && NumQualityLevels != 0)
660 *pu32DevCap |= SVGA3D_DXFMT_MULTISAMPLE;
661 }
662 else
663 AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
664 }
665 else
666 rc = VERR_NOT_SUPPORTED;
667 return rc;
668}
669
670
671static int dxDeviceCreate(PVMSVGA3DBACKEND pBackend, DXDEVICE *pDevice)
672{
673 int rc = VINF_SUCCESS;
674
675 IDXGIAdapter *pAdapter = NULL; /* Default adapter. */
676 static D3D_FEATURE_LEVEL const s_aFeatureLevels[] =
677 {
678 /// @todo Requires a Windows 8+ _SDKS: D3D_FEATURE_LEVEL_11_1,
679 D3D_FEATURE_LEVEL_11_0
680 };
681 UINT Flags = D3D11_CREATE_DEVICE_BGRA_SUPPORT;
682#ifdef DEBUG
683 Flags |= D3D11_CREATE_DEVICE_DEBUG;
684#endif
685
686 HRESULT hr = pBackend->pfnD3D11CreateDevice(pAdapter,
687 D3D_DRIVER_TYPE_HARDWARE,
688 NULL,
689 Flags,
690 s_aFeatureLevels,
691 RT_ELEMENTS(s_aFeatureLevels),
692 D3D11_SDK_VERSION,
693 &pDevice->pDevice,
694 &pDevice->FeatureLevel,
695 &pDevice->pImmediateContext);
696 if (SUCCEEDED(hr))
697 {
698 LogRel(("VMSVGA: Feature level %#x\n", pDevice->FeatureLevel));
699
700 IDXGIDevice *pDxgiDevice = 0;
701 hr = pDevice->pDevice->QueryInterface(__uuidof(IDXGIDevice), (void**)&pDxgiDevice);
702 if (SUCCEEDED(hr))
703 {
704 IDXGIAdapter *pDxgiAdapter = 0;
705 hr = pDxgiDevice->GetParent(__uuidof(IDXGIAdapter), (void**)&pDxgiAdapter);
706 if (SUCCEEDED(hr))
707 {
708 hr = pDxgiAdapter->GetParent(__uuidof(IDXGIFactory), (void**)&pDevice->pDxgiFactory);
709 D3D_RELEASE(pDxgiAdapter);
710 }
711
712 D3D_RELEASE(pDxgiDevice);
713 }
714 }
715
716 if (FAILED(hr))
717 rc = VERR_NOT_SUPPORTED;
718
719 return rc;
720}
721
722
723static void dxDeviceDestroy(PVMSVGA3DBACKEND pBackend, DXDEVICE *pDevice)
724{
725 RT_NOREF(pBackend);
726 D3D_RELEASE(pDevice->pDevice);
727 D3D_RELEASE(pDevice->pImmediateContext);
728 D3D_RELEASE(pDevice->pDxgiFactory);
729 RT_ZERO(*pDevice);
730}
731
732
733static ID3D11Resource *dxResource(PVMSVGA3DSURFACE pSurface, VMSVGA3DDXCONTEXT *pDXContext)
734{
735 VMSVGA3DBACKENDSURFACE *pBackendSurface = pSurface->pBackendSurface;
736 if (!pBackendSurface)
737 AssertFailedReturn(NULL);
738
739 if (pDXContext->cid == pSurface->idAssociatedContext)
740 return pBackendSurface->u.Resource.pResource;
741
742 /*
743 * Another context is requesting.
744 */
745 /* Expecting this for screen targets only. */
746 Assert(pSurface->surfaceFlags & SVGA3D_SURFACE_SCREENTARGET);
747 Assert(pSurface->idAssociatedContext == SVGA_ID_INVALID);
748
749 DXSHAREDTEXTURE *pSharedTexture = (DXSHAREDTEXTURE *)RTAvlU32Get(&pBackendSurface->SharedTextureTree, pDXContext->cid);
750 if (!pSharedTexture)
751 {
752 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
753 AssertReturn(pDevice->pDevice, NULL);
754
755 AssertReturn(pBackendSurface->u.ScreenTarget.SharedHandle, NULL);
756
757 /* This context has not yet opened the texture. */
758 pSharedTexture = (DXSHAREDTEXTURE *)RTMemAllocZ(sizeof(DXSHAREDTEXTURE));
759 AssertReturn(pSharedTexture, NULL);
760
761 pSharedTexture->Core.Key = pDXContext->cid;
762 bool const fSuccess = RTAvlU32Insert(&pBackendSurface->SharedTextureTree, &pSharedTexture->Core);
763 AssertReturn(fSuccess, NULL);
764
765 HRESULT hr = pDevice->pDevice->OpenSharedResource(pBackendSurface->u.ScreenTarget.SharedHandle, __uuidof(ID3D11Texture2D), (void**)&pSharedTexture->pTexture);
766 Assert(SUCCEEDED(hr));
767 if (SUCCEEDED(hr))
768 pSharedTexture->sid = pSurface->id;
769 else
770 {
771 RTAvlU32Remove(&pBackendSurface->SharedTextureTree, pDXContext->cid);
772 RTMemFree(pSharedTexture);
773 return NULL;
774 }
775 }
776
777 return pSharedTexture->pTexture;
778}
779
780
781/** @todo AssertCompile for types like D3D11_COMPARISON_FUNC and SVGA3dComparisonFunc */
782static HRESULT dxBlendStateCreate(DXDEVICE *pDevice, SVGACOTableDXBlendStateEntry const *pEntry, ID3D11BlendState **pp)
783{
784 D3D11_BLEND_DESC BlendDesc;
785 BlendDesc.AlphaToCoverageEnable = RT_BOOL(pEntry->alphaToCoverageEnable);
786 BlendDesc.IndependentBlendEnable = RT_BOOL(pEntry->independentBlendEnable);
787 for (int i = 0; i < SVGA3D_MAX_RENDER_TARGETS; ++i)
788 {
789 BlendDesc.RenderTarget[i].BlendEnable = RT_BOOL(pEntry->perRT[i].blendEnable);
790 BlendDesc.RenderTarget[i].SrcBlend = (D3D11_BLEND)pEntry->perRT[i].srcBlend;
791 BlendDesc.RenderTarget[i].DestBlend = (D3D11_BLEND)pEntry->perRT[i].destBlend;
792 BlendDesc.RenderTarget[i].BlendOp = (D3D11_BLEND_OP)pEntry->perRT[i].blendOp;
793 BlendDesc.RenderTarget[i].SrcBlendAlpha = (D3D11_BLEND)pEntry->perRT[i].srcBlendAlpha;
794 BlendDesc.RenderTarget[i].DestBlendAlpha = (D3D11_BLEND)pEntry->perRT[i].destBlendAlpha;
795 BlendDesc.RenderTarget[i].BlendOpAlpha = (D3D11_BLEND_OP)pEntry->perRT[i].blendOpAlpha;
796 BlendDesc.RenderTarget[i].RenderTargetWriteMask = pEntry->perRT[i].renderTargetWriteMask;
797 /** @todo logicOpEnable and logicOp */
798 }
799
800 HRESULT hr = pDevice->pDevice->CreateBlendState(&BlendDesc, pp);
801 Assert(SUCCEEDED(hr));
802 return hr;
803}
804
805
806static HRESULT dxDepthStencilStateCreate(DXDEVICE *pDevice, SVGACOTableDXDepthStencilEntry const *pEntry, ID3D11DepthStencilState **pp)
807{
808 D3D11_DEPTH_STENCIL_DESC desc;
809 desc.DepthEnable = pEntry->depthEnable;
810 desc.DepthWriteMask = (D3D11_DEPTH_WRITE_MASK)pEntry->depthWriteMask;
811 desc.DepthFunc = (D3D11_COMPARISON_FUNC)pEntry->depthFunc;
812 desc.StencilEnable = pEntry->stencilEnable;
813 desc.StencilReadMask = pEntry->stencilReadMask;
814 desc.StencilWriteMask = pEntry->stencilWriteMask;
815 desc.FrontFace.StencilFailOp = (D3D11_STENCIL_OP)pEntry->frontStencilFailOp;
816 desc.FrontFace.StencilDepthFailOp = (D3D11_STENCIL_OP)pEntry->frontStencilDepthFailOp;
817 desc.FrontFace.StencilPassOp = (D3D11_STENCIL_OP)pEntry->frontStencilPassOp;
818 desc.FrontFace.StencilFunc = (D3D11_COMPARISON_FUNC)pEntry->frontStencilFunc;
819 desc.BackFace.StencilFailOp = (D3D11_STENCIL_OP)pEntry->backStencilFailOp;
820 desc.BackFace.StencilDepthFailOp = (D3D11_STENCIL_OP)pEntry->backStencilDepthFailOp;
821 desc.BackFace.StencilPassOp = (D3D11_STENCIL_OP)pEntry->backStencilPassOp;
822 desc.BackFace.StencilFunc = (D3D11_COMPARISON_FUNC)pEntry->backStencilFunc;
823 /** @todo frontEnable, backEnable */
824
825 HRESULT hr = pDevice->pDevice->CreateDepthStencilState(&desc, pp);
826 Assert(SUCCEEDED(hr));
827 return hr;
828}
829
830
831static HRESULT dxSamplerStateCreate(DXDEVICE *pDevice, SVGACOTableDXSamplerEntry const *pEntry, ID3D11SamplerState **pp)
832{
833 D3D11_SAMPLER_DESC desc;
834 desc.Filter = (D3D11_FILTER)pEntry->filter;
835 desc.AddressU = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressU;
836 desc.AddressV = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressV;
837 desc.AddressW = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressW;
838 desc.MipLODBias = pEntry->mipLODBias;
839 desc.MaxAnisotropy = RT_CLAMP(pEntry->maxAnisotropy, 1, 16); /* "Valid values are between 1 and 16" */
840 desc.ComparisonFunc = (D3D11_COMPARISON_FUNC)pEntry->comparisonFunc;
841 desc.BorderColor[0] = pEntry->borderColor.value[0];
842 desc.BorderColor[1] = pEntry->borderColor.value[1];
843 desc.BorderColor[2] = pEntry->borderColor.value[2];
844 desc.BorderColor[3] = pEntry->borderColor.value[3];
845 desc.MinLOD = pEntry->minLOD;
846 desc.MaxLOD = pEntry->maxLOD;
847
848 HRESULT hr = pDevice->pDevice->CreateSamplerState(&desc, pp);
849 Assert(SUCCEEDED(hr));
850 return hr;
851}
852
853
854static HRESULT dxRasterizerStateCreate(DXDEVICE *pDevice, SVGACOTableDXRasterizerStateEntry const *pEntry, ID3D11RasterizerState **pp)
855{
856 D3D11_RASTERIZER_DESC desc;
857 desc.FillMode = (D3D11_FILL_MODE)pEntry->fillMode;
858 desc.CullMode = (D3D11_CULL_MODE)pEntry->cullMode;
859 desc.FrontCounterClockwise = pEntry->frontCounterClockwise;
860 /** @todo provokingVertexLast */
861 desc.DepthBias = pEntry->depthBias;
862 desc.DepthBiasClamp = pEntry->depthBiasClamp;
863 desc.SlopeScaledDepthBias = pEntry->slopeScaledDepthBias;
864 desc.DepthClipEnable = pEntry->depthClipEnable;
865 desc.ScissorEnable = pEntry->scissorEnable;
866 desc.MultisampleEnable = pEntry->multisampleEnable;
867 desc.AntialiasedLineEnable = pEntry->antialiasedLineEnable;
868 /** @todo lineWidth lineStippleEnable lineStippleFactor lineStipplePattern forcedSampleCount */
869
870 HRESULT hr = pDevice->pDevice->CreateRasterizerState(&desc, pp);
871 Assert(SUCCEEDED(hr));
872 return hr;
873}
874
875
876static HRESULT dxRenderTargetViewCreate(PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableDXRTViewEntry const *pEntry, VMSVGA3DSURFACE *pSurface, ID3D11RenderTargetView **pp)
877{
878 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
879
880 ID3D11Resource *pResource = dxResource(pSurface, pDXContext);
881 //pBackendSurface->u.Texture.pTexture;
882
883 D3D11_RENDER_TARGET_VIEW_DESC desc;
884 RT_ZERO(desc);
885 desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
886 AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN, E_FAIL);
887 switch (pEntry->resourceDimension)
888 {
889 case SVGA3D_RESOURCE_BUFFER:
890 desc.ViewDimension = D3D11_RTV_DIMENSION_BUFFER;
891 desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
892 desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
893 break;
894 case SVGA3D_RESOURCE_TEXTURE1D:
895 if (pEntry->desc.tex.arraySize <= 1)
896 {
897 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE1D;
898 desc.Texture1D.MipSlice = pEntry->desc.tex.mipSlice;
899 }
900 else
901 {
902 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE1DARRAY;
903 desc.Texture1DArray.MipSlice = pEntry->desc.tex.mipSlice;
904 desc.Texture1DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
905 desc.Texture1DArray.ArraySize = pEntry->desc.tex.arraySize;
906 }
907 break;
908 case SVGA3D_RESOURCE_TEXTURE2D:
909 if (pEntry->desc.tex.arraySize <= 1)
910 {
911 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2D;
912 desc.Texture2D.MipSlice = pEntry->desc.tex.mipSlice;
913 }
914 else
915 {
916 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2DARRAY;
917 desc.Texture2DArray.MipSlice = pEntry->desc.tex.mipSlice;
918 desc.Texture2DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
919 desc.Texture2DArray.ArraySize = pEntry->desc.tex.arraySize;
920 }
921 break;
922 case SVGA3D_RESOURCE_TEXTURE3D:
923 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE3D;
924 desc.Texture3D.MipSlice = pEntry->desc.tex3D.mipSlice;
925 desc.Texture3D.FirstWSlice = pEntry->desc.tex3D.firstW;
926 desc.Texture3D.WSize = pEntry->desc.tex3D.wSize;
927 break;
928 case SVGA3D_RESOURCE_TEXTURECUBE:
929 AssertFailed(); /** @todo test. Probably not applicable to a render target view. */
930 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2DARRAY;
931 desc.Texture2DArray.MipSlice = pEntry->desc.tex.mipSlice;
932 desc.Texture2DArray.FirstArraySlice = 0;
933 desc.Texture2DArray.ArraySize = 6;
934 break;
935 case SVGA3D_RESOURCE_BUFFEREX:
936 AssertFailed(); /** @todo test. Probably not applicable to a render target view. */
937 desc.ViewDimension = D3D11_RTV_DIMENSION_BUFFER;
938 desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
939 desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
940 break;
941 default:
942 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
943 }
944
945 HRESULT hr = pDevice->pDevice->CreateRenderTargetView(pResource, &desc, pp);
946 Assert(SUCCEEDED(hr));
947 return hr;
948}
949
950
951static HRESULT dxShaderResourceViewCreate(PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableDXSRViewEntry const *pEntry, VMSVGA3DSURFACE *pSurface, ID3D11ShaderResourceView **pp)
952{
953 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
954
955 ID3D11Resource *pResource = dxResource(pSurface, pDXContext);
956// ID3D11Resource *pResource = pBackendSurface->u.Texture.pTexture;
957
958 D3D11_SHADER_RESOURCE_VIEW_DESC desc;
959 RT_ZERO(desc);
960 desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
961 AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN, E_FAIL);
962
963 switch (pEntry->resourceDimension)
964 {
965 case SVGA3D_RESOURCE_BUFFER:
966 desc.ViewDimension = D3D11_SRV_DIMENSION_BUFFER;
967 desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
968 desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
969 break;
970 case SVGA3D_RESOURCE_TEXTURE1D:
971 if (pEntry->desc.tex.arraySize <= 1)
972 {
973 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE1D;
974 desc.Texture1D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
975 desc.Texture1D.MipLevels = pEntry->desc.tex.mipLevels;
976 }
977 else
978 {
979 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE1DARRAY;
980 desc.Texture1DArray.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
981 desc.Texture1DArray.MipLevels = pEntry->desc.tex.mipLevels;
982 desc.Texture1DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
983 desc.Texture1DArray.ArraySize = pEntry->desc.tex.arraySize;
984 }
985 break;
986 case SVGA3D_RESOURCE_TEXTURE2D:
987 if (pEntry->desc.tex.arraySize <= 1)
988 {
989 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE2D;
990 desc.Texture2D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
991 desc.Texture2D.MipLevels = pEntry->desc.tex.mipLevels;
992 }
993 else
994 {
995 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE2DARRAY;
996 desc.Texture2DArray.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
997 desc.Texture2DArray.MipLevels = pEntry->desc.tex.mipLevels;
998 desc.Texture2DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
999 desc.Texture2DArray.ArraySize = pEntry->desc.tex.arraySize;
1000 }
1001 break;
1002 case SVGA3D_RESOURCE_TEXTURE3D:
1003 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE3D;
1004 desc.Texture3D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1005 desc.Texture3D.MipLevels = pEntry->desc.tex.mipLevels;
1006 break;
1007 case SVGA3D_RESOURCE_TEXTURECUBE:
1008 AssertFailed(); /** @todo test. */
1009 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURECUBE;
1010 desc.TextureCube.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1011 desc.TextureCube.MipLevels = pEntry->desc.tex.mipLevels;
1012 break;
1013 case SVGA3D_RESOURCE_BUFFEREX:
1014 AssertFailed(); /** @todo test. */
1015 desc.ViewDimension = D3D11_SRV_DIMENSION_BUFFEREX;
1016 desc.BufferEx.FirstElement = pEntry->desc.bufferex.firstElement;
1017 desc.BufferEx.NumElements = pEntry->desc.bufferex.numElements;
1018 desc.BufferEx.Flags = pEntry->desc.bufferex.flags;
1019 break;
1020 default:
1021 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
1022 }
1023
1024 HRESULT hr = pDevice->pDevice->CreateShaderResourceView(pResource, &desc, pp);
1025 Assert(SUCCEEDED(hr));
1026 return hr;
1027}
1028
1029
1030static HRESULT dxDepthStencilViewCreate(DXDEVICE *pDevice, SVGACOTableDXDSViewEntry const *pEntry, VMSVGA3DBACKENDSURFACE *pBackendSurface, ID3D11DepthStencilView **pp)
1031{
1032 ID3D11Resource *pResource = pBackendSurface->u.Texture.pTexture;
1033
1034 D3D11_DEPTH_STENCIL_VIEW_DESC desc;
1035 RT_ZERO(desc);
1036 desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
1037 AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN, E_FAIL);
1038 desc.Flags = pEntry->flags;
1039 switch (pEntry->resourceDimension)
1040 {
1041 case SVGA3D_RESOURCE_TEXTURE1D:
1042 if (pEntry->arraySize <= 1)
1043 {
1044 desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE1D;
1045 desc.Texture1D.MipSlice = pEntry->mipSlice;
1046 }
1047 else
1048 {
1049 desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE1DARRAY;
1050 desc.Texture1DArray.MipSlice = pEntry->mipSlice;
1051 desc.Texture1DArray.FirstArraySlice = pEntry->firstArraySlice;
1052 desc.Texture1DArray.ArraySize = pEntry->arraySize;
1053 }
1054 break;
1055 case SVGA3D_RESOURCE_TEXTURE2D:
1056 if (pEntry->arraySize <= 1)
1057 {
1058 desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE2D;
1059 desc.Texture2D.MipSlice = pEntry->mipSlice;
1060 }
1061 else
1062 {
1063 desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE2DARRAY;
1064 desc.Texture2DArray.MipSlice = pEntry->mipSlice;
1065 desc.Texture2DArray.FirstArraySlice = pEntry->firstArraySlice;
1066 desc.Texture2DArray.ArraySize = pEntry->arraySize;
1067 }
1068 break;
1069 default:
1070 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
1071 }
1072
1073 HRESULT hr = pDevice->pDevice->CreateDepthStencilView(pResource, &desc, pp);
1074 Assert(SUCCEEDED(hr));
1075 return hr;
1076}
1077
1078
1079static HRESULT dxShaderCreate(DXDEVICE *pDevice, PVMSVGA3DSHADER pShader, DXSHADER *pDXShader)
1080{
1081 HRESULT hr = S_OK;
1082
1083 switch (pShader->type)
1084 {
1085 case SVGA3D_SHADERTYPE_VS:
1086 hr = pDevice->pDevice->CreateVertexShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pVertexShader);
1087 Assert(SUCCEEDED(hr));
1088 break;
1089 case SVGA3D_SHADERTYPE_PS:
1090 hr = pDevice->pDevice->CreatePixelShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pPixelShader);
1091 Assert(SUCCEEDED(hr));
1092 break;
1093 case SVGA3D_SHADERTYPE_GS:
1094 case SVGA3D_SHADERTYPE_HS:
1095 case SVGA3D_SHADERTYPE_DS:
1096 case SVGA3D_SHADERTYPE_CS:
1097 default:
1098 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
1099 }
1100
1101 return hr;
1102}
1103
1104
1105static void dxShaderSet(DXDEVICE *pDevice, SVGA3dShaderType type, DXSHADER *pDXShader)
1106{
1107 switch (type)
1108 {
1109 case SVGA3D_SHADERTYPE_VS:
1110 pDevice->pImmediateContext->VSSetShader(pDXShader ? pDXShader->pVertexShader : NULL, NULL, 0);
1111 break;
1112 case SVGA3D_SHADERTYPE_PS:
1113 pDevice->pImmediateContext->PSSetShader(pDXShader ? pDXShader->pPixelShader : NULL, NULL, 0);
1114 break;
1115 case SVGA3D_SHADERTYPE_GS:
1116 case SVGA3D_SHADERTYPE_HS:
1117 case SVGA3D_SHADERTYPE_DS:
1118 case SVGA3D_SHADERTYPE_CS:
1119 default:
1120 ASSERT_GUEST_FAILED_RETURN_VOID();
1121 }
1122}
1123
1124
1125static void dxConstantBufferSet(DXDEVICE *pDevice, uint32_t slot, SVGA3dShaderType type, ID3D11Buffer *pConstantBuffer)
1126{
1127 switch (type)
1128 {
1129 case SVGA3D_SHADERTYPE_VS:
1130 pDevice->pImmediateContext->VSSetConstantBuffers(slot, 1, &pConstantBuffer);
1131 break;
1132 case SVGA3D_SHADERTYPE_PS:
1133 pDevice->pImmediateContext->PSSetConstantBuffers(slot, 1, &pConstantBuffer);
1134 break;
1135 case SVGA3D_SHADERTYPE_GS:
1136 case SVGA3D_SHADERTYPE_HS:
1137 case SVGA3D_SHADERTYPE_DS:
1138 case SVGA3D_SHADERTYPE_CS:
1139 default:
1140 ASSERT_GUEST_FAILED_RETURN_VOID();
1141 }
1142}
1143
1144
1145static void dxSamplerSet(DXDEVICE *pDevice, SVGA3dShaderType type, uint32_t startSampler, uint32_t cSampler, ID3D11SamplerState * const *papSampler)
1146{
1147 switch (type)
1148 {
1149 case SVGA3D_SHADERTYPE_VS:
1150 pDevice->pImmediateContext->VSSetSamplers(startSampler, cSampler, papSampler);
1151 break;
1152 case SVGA3D_SHADERTYPE_PS:
1153 pDevice->pImmediateContext->PSSetSamplers(startSampler, cSampler, papSampler);
1154 break;
1155 case SVGA3D_SHADERTYPE_GS:
1156 case SVGA3D_SHADERTYPE_HS:
1157 case SVGA3D_SHADERTYPE_DS:
1158 case SVGA3D_SHADERTYPE_CS:
1159 default:
1160 ASSERT_GUEST_FAILED_RETURN_VOID();
1161 }
1162}
1163
1164
1165static void dxShaderResourceViewSet(DXDEVICE *pDevice, SVGA3dShaderType type, uint32_t startView, uint32_t cShaderResourceView, ID3D11ShaderResourceView * const *papShaderResourceView)
1166{
1167 switch (type)
1168 {
1169 case SVGA3D_SHADERTYPE_VS:
1170 pDevice->pImmediateContext->VSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
1171 break;
1172 case SVGA3D_SHADERTYPE_PS:
1173 pDevice->pImmediateContext->PSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
1174 break;
1175 case SVGA3D_SHADERTYPE_GS:
1176 case SVGA3D_SHADERTYPE_HS:
1177 case SVGA3D_SHADERTYPE_DS:
1178 case SVGA3D_SHADERTYPE_CS:
1179 default:
1180 ASSERT_GUEST_FAILED_RETURN_VOID();
1181 }
1182}
1183
1184
1185static int vmsvga3dBackSurfaceCreateScreenTarget(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface)
1186{
1187 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1188 AssertReturn(p3dState, VERR_INVALID_STATE);
1189
1190 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
1191 AssertReturn(pBackend, VERR_INVALID_STATE);
1192
1193 DXDEVICE *pDXDevice = &pBackend->device;
1194 AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
1195
1196 /* Surface must have SCREEN_TARGET flag. */
1197 ASSERT_GUEST_RETURN(RT_BOOL(pSurface->surfaceFlags & SVGA3D_SURFACE_SCREENTARGET), VERR_INVALID_PARAMETER);
1198
1199 if (VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
1200 {
1201 AssertFailed(); /* Should the function not be used like that? */
1202 vmsvga3dBackSurfaceDestroy(pThisCC, pSurface);
1203 }
1204
1205 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
1206 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
1207
1208 D3D11_TEXTURE2D_DESC td;
1209 RT_ZERO(td);
1210 td.Width = pSurface->paMipmapLevels[0].mipmapSize.width;
1211 td.Height = pSurface->paMipmapLevels[0].mipmapSize.height;
1212 Assert(pSurface->cLevels == 1);
1213 td.MipLevels = 1;
1214 td.ArraySize = 1;
1215 td.Format = vmsvgaDXSurfaceFormat2Dxgi(pSurface->format);
1216 td.SampleDesc.Count = 1;
1217 td.SampleDesc.Quality = 0;
1218 td.Usage = D3D11_USAGE_DEFAULT;
1219 td.BindFlags = D3D11_BIND_RENDER_TARGET | D3D11_BIND_SHADER_RESOURCE;
1220 td.CPUAccessFlags = 0;
1221 td.MiscFlags = D3D11_RESOURCE_MISC_SHARED;
1222
1223 HRESULT hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.ScreenTarget.pTexture);
1224 Assert(SUCCEEDED(hr));
1225 if (SUCCEEDED(hr))
1226 {
1227 /* Map-able texture. */
1228 td.Usage = D3D11_USAGE_DYNAMIC;
1229 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
1230 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1231 td.MiscFlags = 0;
1232 hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.ScreenTarget.pDynamicTexture);
1233 Assert(SUCCEEDED(hr));
1234 }
1235
1236 if (SUCCEEDED(hr))
1237 {
1238 /* Staging texture. */
1239 td.Usage = D3D11_USAGE_STAGING;
1240 td.BindFlags = 0; /* No flags allowed. */
1241 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ;
1242 hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.ScreenTarget.pStagingTexture);
1243 Assert(SUCCEEDED(hr));
1244 }
1245
1246 if (SUCCEEDED(hr))
1247 {
1248 /* Get the shared handle. */
1249 IDXGIResource *pDxgiResource = NULL;
1250 hr = pBackendSurface->u.ScreenTarget.pTexture->QueryInterface(__uuidof(IDXGIResource), (void**)&pDxgiResource);
1251 Assert(SUCCEEDED(hr));
1252 if (SUCCEEDED(hr))
1253 {
1254 hr = pDxgiResource->GetSharedHandle(&pBackendSurface->u.ScreenTarget.SharedHandle);
1255 Assert(SUCCEEDED(hr));
1256 D3D_RELEASE(pDxgiResource);
1257 }
1258 }
1259
1260 if (SUCCEEDED(hr))
1261 {
1262 /*
1263 * Success.
1264 */
1265 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_SCREEN_TARGET;
1266 pBackendSurface->enmDxgiFormat = td.Format;
1267 pSurface->pBackendSurface = pBackendSurface;
1268 pSurface->idAssociatedContext = SVGA_ID_INVALID;
1269 pSurface->fDirty = true;
1270 return VINF_SUCCESS;
1271 }
1272
1273 /* Failure. */
1274 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pStagingTexture);
1275 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pDynamicTexture);
1276 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pTexture);
1277 RTMemFree(pBackendSurface);
1278 return VERR_NO_MEMORY;
1279}
1280
1281
1282static UINT dxBindFlags(SVGA3dSurfaceAllFlags surfaceFlags)
1283{
1284 /* Catch unimplemented flags. */
1285 Assert(!RT_BOOL(surfaceFlags & (SVGA3D_SURFACE_BIND_LOGICOPS | SVGA3D_SURFACE_BIND_RAW_VIEWS)));
1286
1287 UINT BindFlags = 0;
1288
1289 if (surfaceFlags & SVGA3D_SURFACE_BIND_VERTEX_BUFFER) BindFlags |= D3D11_BIND_VERTEX_BUFFER;
1290 if (surfaceFlags & SVGA3D_SURFACE_BIND_INDEX_BUFFER) BindFlags |= D3D11_BIND_INDEX_BUFFER;
1291 if (surfaceFlags & SVGA3D_SURFACE_BIND_CONSTANT_BUFFER) BindFlags |= D3D11_BIND_CONSTANT_BUFFER;
1292 if (surfaceFlags & SVGA3D_SURFACE_BIND_SHADER_RESOURCE) BindFlags |= D3D11_BIND_SHADER_RESOURCE;
1293 if (surfaceFlags & SVGA3D_SURFACE_BIND_RENDER_TARGET) BindFlags |= D3D11_BIND_RENDER_TARGET;
1294 if (surfaceFlags & SVGA3D_SURFACE_BIND_DEPTH_STENCIL) BindFlags |= D3D11_BIND_DEPTH_STENCIL;
1295 if (surfaceFlags & SVGA3D_SURFACE_BIND_STREAM_OUTPUT) BindFlags |= D3D11_BIND_STREAM_OUTPUT;
1296 if (surfaceFlags & SVGA3D_SURFACE_BIND_UAVIEW) BindFlags |= D3D11_BIND_UNORDERED_ACCESS;
1297
1298 return BindFlags;
1299}
1300
1301
1302static int vmsvga3dBackSurfaceCreateTexture(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
1303{
1304 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1305 AssertReturn(p3dState, VERR_INVALID_STATE);
1306
1307 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
1308 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
1309
1310 if (pSurface->pBackendSurface != NULL)
1311 {
1312 AssertFailed(); /** @todo Should the function not be used like that? */
1313 vmsvga3dBackSurfaceDestroy(pThisCC, pSurface);
1314 }
1315
1316 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
1317 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
1318
1319 uint32_t const cWidth = pSurface->paMipmapLevels[0].mipmapSize.width;
1320 uint32_t const cHeight = pSurface->paMipmapLevels[0].mipmapSize.height;
1321 uint32_t const cDepth = pSurface->paMipmapLevels[0].mipmapSize.depth;
1322 uint32_t const numMipLevels = pSurface->cLevels;
1323
1324 DXGI_FORMAT dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(pSurface->format);
1325 AssertReturn(dxgiFormat != DXGI_FORMAT_UNKNOWN, E_FAIL);
1326
1327 /*
1328 * Create D3D11 texture object.
1329 */
1330 HRESULT hr = S_OK;
1331 if (pSurface->surfaceFlags & SVGA3D_SURFACE_SCREENTARGET)
1332 {
1333 /*
1334 * Create the texture in backend device and open for the specified context.
1335 */
1336 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
1337 AssertReturn(pBackend, VERR_INVALID_STATE);
1338
1339 DXDEVICE *pDXDevice = &pBackend->device;
1340 AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
1341
1342 D3D11_TEXTURE2D_DESC td;
1343 RT_ZERO(td);
1344 td.Width = pSurface->paMipmapLevels[0].mipmapSize.width;
1345 td.Height = pSurface->paMipmapLevels[0].mipmapSize.height;
1346 Assert(pSurface->cLevels == 1);
1347 td.MipLevels = 1;
1348 td.ArraySize = 1;
1349 td.Format = dxgiFormat;
1350 td.SampleDesc.Count = 1;
1351 td.SampleDesc.Quality = 0;
1352 td.Usage = D3D11_USAGE_DEFAULT;
1353 td.BindFlags = D3D11_BIND_RENDER_TARGET | D3D11_BIND_SHADER_RESOURCE;
1354 td.CPUAccessFlags = 0;
1355 td.MiscFlags = D3D11_RESOURCE_MISC_SHARED;
1356
1357 hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.ScreenTarget.pTexture);
1358 Assert(SUCCEEDED(hr));
1359 if (SUCCEEDED(hr))
1360 {
1361 /* Map-able texture. */
1362 td.Usage = D3D11_USAGE_DYNAMIC;
1363 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
1364 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1365 td.MiscFlags = 0;
1366 hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.ScreenTarget.pDynamicTexture);
1367 Assert(SUCCEEDED(hr));
1368 }
1369
1370 if (SUCCEEDED(hr))
1371 {
1372 /* Staging texture. */
1373 td.Usage = D3D11_USAGE_STAGING;
1374 td.BindFlags = 0; /* No flags allowed. */
1375 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ;
1376 hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.ScreenTarget.pStagingTexture);
1377 Assert(SUCCEEDED(hr));
1378 }
1379
1380 if (SUCCEEDED(hr))
1381 {
1382 /* Get the shared handle. */
1383 IDXGIResource *pDxgiResource = NULL;
1384 hr = pBackendSurface->u.ScreenTarget.pTexture->QueryInterface(__uuidof(IDXGIResource), (void**)&pDxgiResource);
1385 Assert(SUCCEEDED(hr));
1386 if (SUCCEEDED(hr))
1387 {
1388 hr = pDxgiResource->GetSharedHandle(&pBackendSurface->u.ScreenTarget.SharedHandle);
1389 Assert(SUCCEEDED(hr));
1390 D3D_RELEASE(pDxgiResource);
1391 }
1392 }
1393
1394 if (SUCCEEDED(hr))
1395 {
1396 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_SCREEN_TARGET;
1397 }
1398 }
1399 else if (pSurface->surfaceFlags & SVGA3D_SURFACE_CUBEMAP)
1400 {
1401 Assert(pSurface->cFaces == 6);
1402 Assert(cWidth == cHeight);
1403 Assert(cDepth == 1);
1404
1405 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_CUBE_TEXTURE;
1406 AssertFailed(); /** @todo implement */
1407 hr = E_FAIL;
1408 }
1409 else if (pSurface->surfaceFlags & SVGA3D_SURFACE_1D)
1410 {
1411 AssertFailed(); /** @todo implement */
1412 hr = E_FAIL;
1413 }
1414 else
1415 {
1416 if (cDepth > 1)
1417 {
1418 /*
1419 * Volume texture.
1420 */
1421 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE_3D;
1422 AssertFailed(); /** @todo implement */
1423 hr = E_FAIL;
1424 }
1425 else
1426 {
1427 /*
1428 * 2D texture.
1429 */
1430 Assert(pSurface->cFaces == 1);
1431
1432 D3D11_SUBRESOURCE_DATA *paInitialData = NULL;
1433 D3D11_SUBRESOURCE_DATA aInitialData[SVGA3D_MAX_MIP_LEVELS];
1434 if (pSurface->paMipmapLevels[0].pSurfaceData)
1435 {
1436 /** @todo Can happen for a non GBO surface. Test this. */
1437 for (uint32_t i = 0; i < numMipLevels; ++i)
1438 {
1439 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
1440 D3D11_SUBRESOURCE_DATA *p = &aInitialData[i];
1441 p->pSysMem = pMipmapLevel->pSurfaceData;
1442 p->SysMemPitch = pMipmapLevel->cbSurfacePitch;
1443 p->SysMemSlicePitch = pMipmapLevel->cbSurfacePlane;
1444 }
1445 paInitialData = &aInitialData[0];
1446 }
1447
1448 D3D11_TEXTURE2D_DESC td;
1449 RT_ZERO(td);
1450 td.Width = cWidth;
1451 td.Height = cHeight;
1452 td.MipLevels = numMipLevels;
1453 td.ArraySize = 1; /** @todo */
1454 td.Format = dxgiFormat;
1455 td.SampleDesc.Count = 1;
1456 td.SampleDesc.Quality = 0;
1457 td.Usage = D3D11_USAGE_DEFAULT;
1458 td.BindFlags = dxBindFlags(pSurface->surfaceFlags);
1459 td.CPUAccessFlags = 0; /** @todo */
1460 td.MiscFlags = 0; /** @todo */
1461 if ( numMipLevels > 1
1462 && (td.BindFlags & (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET)) == (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET))
1463 td.MiscFlags |= D3D11_RESOURCE_MISC_GENERATE_MIPS; /* Required for GenMips. */
1464
1465 hr = pDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->u.Texture.pTexture);
1466 Assert(SUCCEEDED(hr));
1467 if (SUCCEEDED(hr))
1468 {
1469 /* Map-able texture. */
1470 td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
1471 td.Usage = D3D11_USAGE_DYNAMIC;
1472 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
1473 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1474 td.MiscFlags = 0;
1475 hr = pDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->u.Texture.pDynamicTexture);
1476 Assert(SUCCEEDED(hr));
1477 }
1478
1479 if (SUCCEEDED(hr))
1480 {
1481 /* Staging texture. */
1482 td.Usage = D3D11_USAGE_STAGING;
1483 td.BindFlags = 0; /* No flags allowed. */
1484 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ;
1485 td.MiscFlags = 0;
1486 hr = pDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->u.Texture.pStagingTexture);
1487 Assert(SUCCEEDED(hr));
1488 }
1489
1490 if (SUCCEEDED(hr))
1491 {
1492 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE;
1493 }
1494 }
1495 }
1496
1497 Assert(hr == S_OK);
1498
1499 if (pSurface->autogenFilter != SVGA3D_TEX_FILTER_NONE)
1500 {
1501 }
1502
1503 if (SUCCEEDED(hr))
1504 {
1505 /*
1506 * Success.
1507 */
1508 pBackendSurface->enmDxgiFormat = dxgiFormat;
1509 pSurface->pBackendSurface = pBackendSurface;
1510 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
1511 pSurface->idAssociatedContext = SVGA_ID_INVALID;
1512 else
1513 pSurface->idAssociatedContext = pDXContext->cid;
1514 return VINF_SUCCESS;
1515 }
1516
1517 /* Failure. */
1518 D3D_RELEASE(pBackendSurface->u.Texture.pStagingTexture);
1519 D3D_RELEASE(pBackendSurface->u.Texture.pDynamicTexture);
1520 D3D_RELEASE(pBackendSurface->u.Texture.pTexture);
1521 RTMemFree(pBackendSurface);
1522 return VERR_NO_MEMORY;
1523}
1524
1525
1526static int vmsvga3dBackSurfaceCreateDepthStencilTexture(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
1527{
1528 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
1529 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
1530
1531 if (pSurface->pBackendSurface != NULL)
1532 {
1533 AssertFailed(); /** @todo Should the function not be used like that? */
1534 vmsvga3dBackSurfaceDestroy(pThisCC, pSurface);
1535 }
1536
1537 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
1538 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
1539
1540 D3D11_TEXTURE2D_DESC td;
1541 RT_ZERO(td);
1542 td.Width = pSurface->paMipmapLevels[0].mipmapSize.width;
1543 td.Height = pSurface->paMipmapLevels[0].mipmapSize.height;
1544 Assert(pSurface->cLevels == 1);
1545 td.MipLevels = 1;
1546 td.ArraySize = 1;
1547 td.Format = vmsvgaDXSurfaceFormat2Dxgi(pSurface->format);
1548 AssertReturn(td.Format != DXGI_FORMAT_UNKNOWN, E_FAIL);
1549 td.SampleDesc.Count = 1;
1550 td.SampleDesc.Quality = 0;
1551 td.Usage = D3D11_USAGE_DEFAULT;
1552 td.BindFlags = D3D11_BIND_DEPTH_STENCIL;
1553 td.CPUAccessFlags = 0;
1554 td.MiscFlags = 0;
1555
1556 HRESULT hr = pDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.Texture.pTexture);
1557 Assert(SUCCEEDED(hr));
1558 if (SUCCEEDED(hr))
1559 {
1560 /*
1561 * Success.
1562 */
1563 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE;
1564 pBackendSurface->enmDxgiFormat = td.Format;
1565 pSurface->pBackendSurface = pBackendSurface;
1566 pSurface->idAssociatedContext = pDXContext->cid;
1567 pSurface->fDirty = true;
1568 return VINF_SUCCESS;
1569 }
1570
1571 /* Failure. */
1572 D3D_RELEASE(pBackendSurface->u.Texture.pStagingTexture);
1573 D3D_RELEASE(pBackendSurface->u.Texture.pDynamicTexture);
1574 D3D_RELEASE(pBackendSurface->u.Texture.pTexture);
1575 RTMemFree(pBackendSurface);
1576 return VERR_NO_MEMORY;
1577}
1578
1579
1580static int vmsvga3dBackSurfaceCreateBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
1581{
1582 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
1583 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
1584
1585 /* Buffers should be created as such. */
1586 AssertReturn(RT_BOOL(pSurface->surfaceFlags & ( SVGA3D_SURFACE_HINT_INDEXBUFFER
1587 | SVGA3D_SURFACE_HINT_VERTEXBUFFER
1588 | SVGA3D_SURFACE_BIND_VERTEX_BUFFER
1589 | SVGA3D_SURFACE_BIND_INDEX_BUFFER
1590 /// @todo only for constant buffers| SVGA3D_SURFACE_BIND_CONSTANT_BUFFER
1591 //| SVGA3D_SURFACE_BIND_STREAM_OUTPUT
1592 )), VERR_INVALID_PARAMETER);
1593
1594 if (pSurface->pBackendSurface != NULL)
1595 {
1596 AssertFailed(); /** @todo Should the function not be used like that? */
1597 vmsvga3dBackSurfaceDestroy(pThisCC, pSurface);
1598 }
1599
1600 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
1601 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
1602
1603 D3D11_BUFFER_DESC bd;
1604 RT_ZERO(bd);
1605 bd.ByteWidth = pSurface->paMipmapLevels[0].cbSurface;
1606 bd.Usage = D3D11_USAGE_DYNAMIC;
1607 bd.BindFlags = D3D11_BIND_VERTEX_BUFFER
1608 | D3D11_BIND_INDEX_BUFFER
1609 //| D3D11_BIND_CONSTANT_BUFFER
1610 //| D3D11_BIND_STREAM_OUTPUT
1611 ;
1612 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1613 bd.MiscFlags = 0;
1614 bd.StructureByteStride = 0;
1615
1616 HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, 0, &pBackendSurface->u.Buffer.pBuffer);
1617 if (SUCCEEDED(hr))
1618 {
1619 /*
1620 * Success.
1621 */
1622 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
1623 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
1624 pSurface->pBackendSurface = pBackendSurface;
1625 pSurface->idAssociatedContext = pDXContext->cid;
1626 pSurface->fDirty = true;
1627 return VINF_SUCCESS;
1628 }
1629
1630 /* Failure. */
1631 D3D_RELEASE(pBackendSurface->u.Buffer.pBuffer);
1632 RTMemFree(pBackendSurface);
1633 return VERR_NO_MEMORY;
1634}
1635
1636
1637static int vmsvga3dBackSurfaceCreateConstantBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
1638{
1639 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
1640 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
1641
1642 /* Buffers should be created as such. */
1643 AssertReturn(RT_BOOL(pSurface->surfaceFlags & ( SVGA3D_SURFACE_BIND_CONSTANT_BUFFER)), VERR_INVALID_PARAMETER);
1644
1645 if (pSurface->pBackendSurface != NULL)
1646 {
1647 AssertFailed(); /** @todo Should the function not be used like that? */
1648 vmsvga3dBackSurfaceDestroy(pThisCC, pSurface);
1649 }
1650
1651 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
1652 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
1653
1654 D3D11_BUFFER_DESC bd;
1655 RT_ZERO(bd);
1656 bd.ByteWidth = pSurface->paMipmapLevels[0].cbSurface;
1657 bd.Usage = D3D11_USAGE_DYNAMIC;
1658 bd.BindFlags = D3D11_BIND_CONSTANT_BUFFER;
1659 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1660 bd.MiscFlags = 0;
1661 bd.StructureByteStride = 0;
1662
1663 HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, 0, &pBackendSurface->u.Buffer.pBuffer);
1664 if (SUCCEEDED(hr))
1665 {
1666 /*
1667 * Success.
1668 */
1669 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
1670 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
1671 pSurface->pBackendSurface = pBackendSurface;
1672 pSurface->idAssociatedContext = pDXContext->cid;
1673 pSurface->fDirty = true;
1674 return VINF_SUCCESS;
1675 }
1676
1677 /* Failure. */
1678 D3D_RELEASE(pBackendSurface->u.Buffer.pBuffer);
1679 RTMemFree(pBackendSurface);
1680 return VERR_NO_MEMORY;
1681}
1682
1683
1684static HRESULT dxCreateConstantBuffer(DXDEVICE *pDevice, VMSVGA3DSURFACE const *pSurface, PVMSVGA3DBACKENDSURFACE pBackendSurface)
1685{
1686 D3D11_SUBRESOURCE_DATA *pInitialData = NULL; /** @todo */
1687 D3D11_BUFFER_DESC bd;
1688 RT_ZERO(bd);
1689 bd.ByteWidth = pSurface->paMipmapLevels[0].cbSurface;
1690 bd.Usage = D3D11_USAGE_DYNAMIC; /** @todo HINT_STATIC */
1691 bd.BindFlags = D3D11_BIND_CONSTANT_BUFFER;
1692 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1693 bd.MiscFlags = 0;
1694 bd.StructureByteStride = 0;
1695
1696 return pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->u.Buffer.pBuffer);
1697}
1698
1699
1700static HRESULT dxCreateBuffer(DXDEVICE *pDevice, VMSVGA3DSURFACE const *pSurface, PVMSVGA3DBACKENDSURFACE pBackendSurface)
1701{
1702 D3D11_SUBRESOURCE_DATA *pInitialData = NULL; /** @todo */
1703 D3D11_BUFFER_DESC bd;
1704 RT_ZERO(bd);
1705 bd.ByteWidth = pSurface->paMipmapLevels[0].cbSurface;
1706 bd.Usage = D3D11_USAGE_DYNAMIC; /** @todo HINT_STATIC */
1707 bd.BindFlags = D3D11_BIND_VERTEX_BUFFER
1708 | D3D11_BIND_INDEX_BUFFER;
1709 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1710 bd.MiscFlags = 0;
1711 bd.StructureByteStride = 0;
1712
1713 return pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->u.Buffer.pBuffer);
1714}
1715
1716
1717static int vmsvga3dBackSurfaceCreate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
1718{
1719 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
1720 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
1721
1722 if (pSurface->pBackendSurface != NULL)
1723 {
1724 AssertFailed(); /** @todo Should the function not be used like that? */
1725 vmsvga3dBackSurfaceDestroy(pThisCC, pSurface);
1726 }
1727
1728 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
1729 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
1730
1731 HRESULT hr;
1732
1733 /*
1734 * Figure out the type of the surface.
1735 */
1736 if (pSurface->surfaceFlags & SVGA3D_SURFACE_BIND_CONSTANT_BUFFER)
1737 {
1738 hr = dxCreateConstantBuffer(pDevice, pSurface, pBackendSurface);
1739 if (SUCCEEDED(hr))
1740 {
1741 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
1742 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
1743 }
1744 else
1745 D3D_RELEASE(pBackendSurface->u.Buffer.pBuffer);
1746 }
1747 else if (pSurface->surfaceFlags & ( SVGA3D_SURFACE_BIND_VERTEX_BUFFER
1748 | SVGA3D_SURFACE_BIND_INDEX_BUFFER
1749 | SVGA3D_SURFACE_HINT_VERTEXBUFFER
1750 | SVGA3D_SURFACE_HINT_INDEXBUFFER))
1751 {
1752 hr = dxCreateBuffer(pDevice, pSurface, pBackendSurface);
1753 if (SUCCEEDED(hr))
1754 {
1755 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
1756 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
1757 }
1758 else
1759 D3D_RELEASE(pBackendSurface->u.Buffer.pBuffer);
1760 }
1761 else
1762 {
1763 AssertFailed(); /** @todo implement */
1764 hr = E_FAIL;
1765 }
1766
1767 if (SUCCEEDED(hr))
1768 {
1769 /*
1770 * Success.
1771 */
1772 pSurface->pBackendSurface = pBackendSurface;
1773 pSurface->idAssociatedContext = pDXContext->cid;
1774 return VINF_SUCCESS;
1775 }
1776
1777 /* Failure. */
1778 RTMemFree(pBackendSurface);
1779 return VERR_NO_MEMORY;
1780}
1781
1782
1783static DECLCALLBACK(int) vmsvga3dBackInit(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC)
1784{
1785 RT_NOREF(pDevIns, pThis);
1786
1787 PVMSVGA3DSTATE pState = (PVMSVGA3DSTATE)RTMemAllocZ(sizeof(VMSVGA3DSTATE));
1788 AssertReturn(pState, VERR_NO_MEMORY);
1789 pThisCC->svga.p3dState = pState;
1790
1791 PVMSVGA3DBACKEND pBackend = (PVMSVGA3DBACKEND)RTMemAllocZ(sizeof(VMSVGA3DBACKEND));
1792 AssertReturn(pBackend, VERR_NO_MEMORY);
1793 pState->pBackend = pBackend;
1794
1795 int rc = RTLdrLoadSystem("d3d11", /* fNoUnload = */ true, &pBackend->hD3D11);
1796 AssertRC(rc);
1797 if (RT_SUCCESS(rc))
1798 {
1799 rc = RTLdrGetSymbol(pBackend->hD3D11, "D3D11CreateDevice", (void **)&pBackend->pfnD3D11CreateDevice);
1800 AssertRC(rc);
1801 }
1802
1803 rc = RTLdrLoadSystem("D3DCompiler_47", /* fNoUnload = */ true, &pBackend->hD3DCompiler);
1804 AssertRC(rc);
1805 if (RT_SUCCESS(rc))
1806 {
1807 rc = RTLdrGetSymbol(pBackend->hD3DCompiler, "D3DDisassemble", (void **)&pBackend->pfnD3DDisassemble);
1808 AssertRC(rc);
1809 }
1810
1811 return rc;
1812}
1813
1814
1815static DECLCALLBACK(int) vmsvga3dBackPowerOn(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC)
1816{
1817 RT_NOREF(pDevIns, pThis);
1818
1819 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1820 AssertReturn(pState, VERR_INVALID_STATE);
1821
1822 PVMSVGA3DBACKEND pBackend = pState->pBackend;
1823 AssertReturn(pBackend, VERR_INVALID_STATE);
1824
1825 int rc = dxDeviceCreate(pBackend, &pBackend->device);
1826 return rc;
1827}
1828
1829
1830static DECLCALLBACK(int) vmsvga3dBackTerminate(PVGASTATECC pThisCC)
1831{
1832 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1833 AssertReturn(pState, VERR_INVALID_STATE);
1834
1835 if (pState->pBackend)
1836 {
1837 dxDeviceDestroy(pState->pBackend, &pState->pBackend->device);
1838
1839 RTMemFree(pState->pBackend);
1840 pState->pBackend = NULL;
1841 }
1842
1843 return VINF_SUCCESS;
1844}
1845
1846
1847static DECLCALLBACK(int) vmsvga3dBackReset(PVGASTATECC pThisCC)
1848{
1849 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
1850 AssertReturn(pState, VERR_INVALID_STATE);
1851
1852 /** @todo Cleanup all resources and recreate Device, ImmediateContext etc to be at the same state as after poweron. */
1853
1854 return VINF_SUCCESS;
1855}
1856
1857
1858static int vmsvga3dDrvNotifyDefineScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
1859{
1860 /** @todo Such structures must be in VBoxVideo3D.h */
1861 typedef struct VBOX3DNOTIFYDEFINESCREEN
1862 {
1863 VBOX3DNOTIFY Core;
1864 uint32_t cWidth;
1865 uint32_t cHeight;
1866 int32_t xRoot;
1867 int32_t yRoot;
1868 uint32_t fPrimary;
1869 uint32_t cDpi;
1870 } VBOX3DNOTIFYDEFINESCREEN;
1871
1872 VBOX3DNOTIFYDEFINESCREEN n;
1873 n.Core.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_CREATED;
1874 n.Core.iDisplay = pScreen->idScreen;
1875 n.Core.u32Reserved = 0;
1876 n.Core.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
1877 RT_ZERO(n.Core.au8Data);
1878 n.cWidth = pScreen->cWidth;
1879 n.cHeight = pScreen->cHeight;
1880 n.xRoot = pScreen->xOrigin;
1881 n.yRoot = pScreen->yOrigin;
1882 n.fPrimary = RT_BOOL(pScreen->fuScreen & SVGA_SCREEN_IS_PRIMARY);
1883 n.cDpi = pScreen->cDpi;
1884
1885 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n.Core);
1886}
1887
1888
1889static int vmsvga3dDrvNotifyDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
1890{
1891 VBOX3DNOTIFY n;
1892 n.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_DESTROYED;
1893 n.iDisplay = pScreen->idScreen;
1894 n.u32Reserved = 0;
1895 n.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
1896 RT_ZERO(n.au8Data);
1897
1898 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n);
1899}
1900
1901
1902static int vmsvga3dDrvNotifyBindSurface(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, HANDLE hSharedSurface)
1903{
1904 VBOX3DNOTIFY n;
1905 n.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_BIND_SURFACE;
1906 n.iDisplay = pScreen->idScreen;
1907 n.u32Reserved = 0;
1908 n.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
1909 *(uint64_t *)&n.au8Data[0] = (uint64_t)hSharedSurface;
1910
1911 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n);
1912}
1913
1914
1915static int vmsvga3dDrvNotifyUpdate(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen,
1916 uint32_t x, uint32_t y, uint32_t w, uint32_t h)
1917{
1918 typedef struct VBOX3DNOTIFYUPDATE
1919 {
1920 VBOX3DNOTIFY Core;
1921 uint32_t x;
1922 uint32_t y;
1923 uint32_t w;
1924 uint32_t h;
1925 } VBOX3DNOTIFYUPDATE;
1926
1927 VBOX3DNOTIFYUPDATE n;
1928 n.Core.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_UPDATE_END;
1929 n.Core.iDisplay = pScreen->idScreen;
1930 n.Core.u32Reserved = 0;
1931 n.Core.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
1932 RT_ZERO(n.Core.au8Data);
1933 n.x = x;
1934 n.y = y;
1935 n.w = w;
1936 n.h = h;
1937
1938 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n.Core);
1939}
1940
1941static int vmsvga3dHwScreenCreate(PVMSVGA3DSTATE pState, uint32_t cWidth, uint32_t cHeight, VMSVGAHWSCREEN *p)
1942{
1943 PVMSVGA3DBACKEND pBackend = pState->pBackend;
1944
1945 DXDEVICE *pDXDevice = &pBackend->device;
1946 AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
1947
1948 D3D11_TEXTURE2D_DESC td;
1949 RT_ZERO(td);
1950 td.Width = cWidth;
1951 td.Height = cHeight;
1952 td.MipLevels = 1;
1953 td.ArraySize = 1;
1954 td.Format = DXGI_FORMAT_B8G8R8A8_UNORM;
1955 td.SampleDesc.Count = 1;
1956 td.SampleDesc.Quality = 0;
1957 td.Usage = D3D11_USAGE_DEFAULT;
1958 td.BindFlags = D3D11_BIND_RENDER_TARGET | D3D11_BIND_SHADER_RESOURCE;
1959 td.CPUAccessFlags = 0;
1960 td.MiscFlags = D3D11_RESOURCE_MISC_SHARED_KEYEDMUTEX;
1961
1962 HRESULT hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &p->pTexture);
1963 if (SUCCEEDED(hr))
1964 {
1965 /* Get the shared handle. */
1966 hr = p->pTexture->QueryInterface(__uuidof(IDXGIResource), (void**)&p->pDxgiResource);
1967 if (SUCCEEDED(hr))
1968 {
1969 hr = p->pDxgiResource->GetSharedHandle(&p->SharedHandle);
1970 if (SUCCEEDED(hr))
1971 hr = p->pTexture->QueryInterface(__uuidof(IDXGIKeyedMutex), (void**)&p->pDXGIKeyedMutex);
1972 }
1973 }
1974
1975 if (SUCCEEDED(hr))
1976 return VINF_SUCCESS;
1977
1978 AssertFailed();
1979 return VERR_NOT_SUPPORTED;
1980}
1981
1982
1983static void vmsvga3dHwScreenDestroy(PVMSVGA3DSTATE pState, VMSVGAHWSCREEN *p)
1984{
1985 RT_NOREF(pState);
1986 D3D_RELEASE(p->pDXGIKeyedMutex);
1987 D3D_RELEASE(p->pDxgiResource);
1988 D3D_RELEASE(p->pTexture);
1989 p->SharedHandle = 0;
1990 p->sidScreenTarget = SVGA_ID_INVALID;
1991}
1992
1993
1994static DECLCALLBACK(int) vmsvga3dBackDefineScreen(PVGASTATE pThis, PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
1995{
1996 RT_NOREF(pThis, pThisCC, pScreen);
1997
1998 LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: screen %u\n", pScreen->idScreen));
1999
2000 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2001 AssertReturn(pState, VERR_INVALID_STATE);
2002
2003 PVMSVGA3DBACKEND pBackend = pState->pBackend;
2004 AssertReturn(pBackend, VERR_INVALID_STATE);
2005
2006 Assert(pScreen->pHwScreen == NULL);
2007
2008 VMSVGAHWSCREEN *p = (VMSVGAHWSCREEN *)RTMemAllocZ(sizeof(VMSVGAHWSCREEN));
2009 AssertPtrReturn(p, VERR_NO_MEMORY);
2010
2011 p->sidScreenTarget = SVGA_ID_INVALID;
2012
2013 int rc = vmsvga3dDrvNotifyDefineScreen(pThisCC, pScreen);
2014 if (RT_SUCCESS(rc))
2015 {
2016 /* The frontend supports the screen. Create the actual resource. */
2017 rc = vmsvga3dHwScreenCreate(pState, pScreen->cWidth, pScreen->cHeight, p);
2018 if (RT_SUCCESS(rc))
2019 LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: created\n"));
2020 }
2021
2022 if (RT_SUCCESS(rc))
2023 {
2024 LogRel(("VMSVGA: Using HW accelerated screen %u\n", pScreen->idScreen));
2025 pScreen->pHwScreen = p;
2026 }
2027 else
2028 {
2029 LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: %Rrc\n", rc));
2030 vmsvga3dHwScreenDestroy(pState, p);
2031 RTMemFree(p);
2032 }
2033
2034 return rc;
2035}
2036
2037
2038static DECLCALLBACK(int) vmsvga3dBackDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
2039{
2040 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2041 AssertReturn(pState, VERR_INVALID_STATE);
2042
2043 vmsvga3dDrvNotifyDestroyScreen(pThisCC, pScreen);
2044
2045 if (pScreen->pHwScreen)
2046 {
2047 vmsvga3dHwScreenDestroy(pState, pScreen->pHwScreen);
2048 RTMemFree(pScreen->pHwScreen);
2049 pScreen->pHwScreen = NULL;
2050 }
2051
2052 return VINF_SUCCESS;
2053}
2054
2055
2056static DECLCALLBACK(int) vmsvga3dBackSurfaceBlitToScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen,
2057 SVGASignedRect destRect, SVGA3dSurfaceImageId srcImage,
2058 SVGASignedRect srcRect, uint32_t cRects, SVGASignedRect *paRects)
2059{
2060 RT_NOREF(pThisCC, pScreen, destRect, srcImage, srcRect, cRects, paRects);
2061
2062 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2063 AssertReturn(pState, VERR_INVALID_STATE);
2064
2065 PVMSVGA3DBACKEND pBackend = pState->pBackend;
2066 AssertReturn(pBackend, VERR_INVALID_STATE);
2067
2068 VMSVGAHWSCREEN *p = pScreen->pHwScreen;
2069 AssertReturn(p, VERR_NOT_SUPPORTED);
2070
2071 PVMSVGA3DSURFACE pSurface;
2072 int rc = vmsvga3dSurfaceFromSid(pState, srcImage.sid, &pSurface);
2073 AssertRCReturn(rc, rc);
2074
2075 /** @todo Implement. */
2076 AssertFailed();
2077 return VERR_NOT_IMPLEMENTED;
2078}
2079
2080
2081static DECLCALLBACK(int) dxContextFlushShared(PAVLU32NODECORE pCore, void *pvUser)
2082{
2083 PVMSVGA3DSTATE pState = (PVMSVGA3DSTATE)pvUser;
2084
2085 // Flush pCore->Key context and issue a query.
2086 PVMSVGA3DDXCONTEXT pDXContextDrawing;
2087 int rc = vmsvga3dDXContextFromCid(pState, pCore->Key, &pDXContextDrawing);
2088 AssertRCReturn(rc, rc);
2089
2090 DXDEVICE *pDeviceDrawing = &pDXContextDrawing->pBackendDXContext->device;
2091 pDeviceDrawing->pImmediateContext->Flush();
2092
2093 ID3D11Query *pQuery = 0;
2094 D3D11_QUERY_DESC qd;
2095 RT_ZERO(qd);
2096 qd.Query = D3D11_QUERY_EVENT;
2097 HRESULT hr2 = pDeviceDrawing->pDevice->CreateQuery(&qd, &pQuery);
2098 Assert(hr2 == S_OK); RT_NOREF(hr2);
2099
2100 pDeviceDrawing->pImmediateContext->End(pQuery);
2101
2102 BOOL queryData;
2103 while (pDeviceDrawing->pImmediateContext->GetData(pQuery, &queryData, sizeof(queryData), 0) != S_OK)
2104 {
2105 RTThreadYield();
2106 }
2107 D3D_RELEASE(pQuery);
2108
2109 return VINF_SUCCESS;
2110}
2111
2112
2113
2114static DECLCALLBACK(int) vmsvga3dSurfaceMap(PVGASTATECC pThisCC, uint32_t idDXContext, SVGA3dSurfaceImageId const *pImage, SVGA3dBox const *pBox,
2115 VMSVGA3D_SURFACE_MAP enmMapType, VMSVGA3D_MAPPED_SURFACE *pMap)
2116{
2117 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2118 AssertReturn(pState, VERR_INVALID_STATE);
2119
2120 PVMSVGA3DBACKEND pBackend = pState->pBackend;
2121 AssertReturn(pBackend, VERR_INVALID_STATE);
2122
2123 PVMSVGA3DSURFACE pSurface;
2124 int rc = vmsvga3dSurfaceFromSid(pState, pImage->sid, &pSurface);
2125 AssertRCReturn(rc, rc);
2126
2127 Assert(pImage->face == 0 && pImage->mipmap == 0); /** @todo implement. */
2128
2129 PVMSVGA3DDXCONTEXT pDXContext;
2130
2131 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
2132 if (!pBackendSurface)
2133 {
2134 /* This means that the guest uploads new data to the surface.
2135 * So the data should be copied either to a host memory buffer,
2136 * or to the actual surface.
2137 * In the latter case the BackendSurface must be created here.
2138 */
2139 rc = vmsvga3dDXContextFromCid(pState, idDXContext, &pDXContext);
2140 AssertRCReturn(rc, rc);
2141
2142 rc = vmsvga3dBackSurfaceCreate(pThisCC, pDXContext, pSurface);
2143 AssertRCReturn(rc, rc);
2144
2145 pBackendSurface = pSurface->pBackendSurface;
2146 }
2147
2148 /* Figure out whether the surface belongs to a DXContext or to the backend. */
2149 if (pSurface->idAssociatedContext != SVGA_ID_INVALID)
2150 vmsvga3dDXContextFromCid(pState, pSurface->idAssociatedContext, &pDXContext);
2151 else
2152 pDXContext = NULL;
2153
2154 DXDEVICE *pDevice;
2155 if (pDXContext)
2156 pDevice = &pDXContext->pBackendDXContext->device;
2157 else
2158 pDevice = &pBackend->device;
2159 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
2160
2161 SVGA3dBox clipBox;
2162 if (pBox)
2163 {
2164 clipBox = *pBox;
2165 vmsvgaR3ClipBox(&pSurface->paMipmapLevels[0].mipmapSize, &clipBox);
2166 ASSERT_GUEST_RETURN(clipBox.w && clipBox.h && clipBox.d, VERR_INVALID_PARAMETER);
2167 }
2168 else
2169 {
2170 clipBox.x = 0;
2171 clipBox.y = 0;
2172 clipBox.z = 0;
2173 clipBox.w = pSurface->paMipmapLevels[0].mipmapSize.width;
2174 clipBox.h = pSurface->paMipmapLevels[0].mipmapSize.height;
2175 clipBox.d = pSurface->paMipmapLevels[0].mipmapSize.depth;
2176 }
2177
2178 /** @todo D3D11_MAP_WRITE does not work with D3D11_USAGE_DYNAMIC resources. Probably VMSVGA3D_SURFACE_MAP_WRITE is not necessary. */
2179 D3D11_MAP d3d11MapType;
2180 switch (enmMapType)
2181 {
2182 case VMSVGA3D_SURFACE_MAP_READ: d3d11MapType = D3D11_MAP_READ; break;
2183 case VMSVGA3D_SURFACE_MAP_WRITE: d3d11MapType = D3D11_MAP_WRITE; break;
2184 case VMSVGA3D_SURFACE_MAP_READ_WRITE: d3d11MapType = D3D11_MAP_READ_WRITE; break;
2185 case VMSVGA3D_SURFACE_MAP_WRITE_DISCARD: d3d11MapType = D3D11_MAP_WRITE_DISCARD; break;
2186 default:
2187 AssertFailed();
2188 return VERR_INVALID_PARAMETER;
2189 }
2190
2191 D3D11_MAPPED_SUBRESOURCE mappedResource;
2192 RT_ZERO(mappedResource);
2193
2194 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
2195 {
2196 ID3D11Texture2D *pMappedTexture;
2197 if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
2198 {
2199 pMappedTexture = pBackendSurface->u.ScreenTarget.pStagingTexture;
2200
2201 /** @todo Wait for the surface to finish drawing. */
2202 if (pBackendSurface->SharedTextureTree)
2203 {
2204 int rc2 = RTAvlU32DoWithAll(&pBackendSurface->SharedTextureTree, 0, dxContextFlushShared, pState);
2205 AssertRC(rc2);
2206 }
2207
2208 /* Copy the texture content to the staging texture. */
2209 pDevice->pImmediateContext->CopyResource(pBackendSurface->u.ScreenTarget.pStagingTexture, pBackendSurface->u.ScreenTarget.pTexture);
2210 }
2211 else
2212 pMappedTexture = pBackendSurface->u.ScreenTarget.pDynamicTexture;
2213
2214 UINT const Subresource = 0; /* Screen target surfaces have only one subresource. */
2215 HRESULT hr = pDevice->pImmediateContext->Map(pMappedTexture, Subresource,
2216 d3d11MapType, /* MapFlags = */ 0, &mappedResource);
2217 if (SUCCEEDED(hr))
2218 {
2219 pMap->enmMapType = enmMapType;
2220 pMap->box = clipBox;
2221 pMap->cbPixel = pSurface->cbBlock;
2222 pMap->cbRowPitch = mappedResource.RowPitch;
2223 pMap->cbDepthPitch = mappedResource.DepthPitch;
2224 pMap->pvData = (uint8_t *)mappedResource.pData
2225 + pMap->box.x * pMap->cbPixel
2226 + pMap->box.y * pMap->cbRowPitch
2227 + pMap->box.z * pMap->cbDepthPitch;
2228 }
2229 else
2230 rc = VERR_NOT_SUPPORTED;
2231 }
2232 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE)
2233 {
2234 ID3D11Texture2D *pMappedTexture;
2235 if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
2236 {
2237 pMappedTexture = pBackendSurface->u.ScreenTarget.pStagingTexture;
2238
2239 /* Copy the texture content to the staging texture. */
2240 pDevice->pImmediateContext->CopyResource(pBackendSurface->u.ScreenTarget.pStagingTexture, pBackendSurface->u.ScreenTarget.pTexture);
2241 }
2242 else
2243 pMappedTexture = pBackendSurface->u.ScreenTarget.pDynamicTexture;
2244
2245 UINT const Subresource = 0; /* Screen target surfaces have only one subresource. */
2246 HRESULT hr = pDevice->pImmediateContext->Map(pMappedTexture, Subresource,
2247 d3d11MapType, /* MapFlags = */ 0, &mappedResource);
2248 if (SUCCEEDED(hr))
2249 {
2250 pMap->enmMapType = enmMapType;
2251 pMap->box = clipBox;
2252 pMap->cbPixel = pSurface->cbBlock;
2253 pMap->cbRowPitch = mappedResource.RowPitch;
2254 pMap->cbDepthPitch = mappedResource.DepthPitch;
2255 pMap->pvData = (uint8_t *)mappedResource.pData
2256 + pMap->box.x * pMap->cbPixel
2257 + pMap->box.y * pMap->cbRowPitch
2258 + pMap->box.z * pMap->cbDepthPitch;
2259 }
2260 else
2261 rc = VERR_NOT_SUPPORTED;
2262 }
2263 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
2264 {
2265 UINT const Subresource = 0; /* Buffers have only one subresource. */
2266 HRESULT hr = pDevice->pImmediateContext->Map(pSurface->pBackendSurface->u.Buffer.pBuffer, Subresource,
2267 d3d11MapType, /* MapFlags = */ 0, &mappedResource);
2268 if (SUCCEEDED(hr))
2269 {
2270 pMap->enmMapType = enmMapType;
2271 pMap->box = clipBox;
2272 pMap->cbPixel = pSurface->cbBlock;
2273 pMap->cbRowPitch = mappedResource.RowPitch;
2274 pMap->cbDepthPitch = mappedResource.DepthPitch;
2275 pMap->pvData = (uint8_t *)mappedResource.pData
2276 + pMap->box.x * pMap->cbPixel
2277 + pMap->box.y * pMap->cbRowPitch
2278 + pMap->box.z * pMap->cbDepthPitch;
2279 }
2280 else
2281 rc = VERR_NOT_SUPPORTED;
2282 }
2283 else
2284 {
2285 // UINT D3D11CalcSubresource(UINT MipSlice, UINT ArraySlice, UINT MipLevels);
2286 /** @todo Implement. */
2287 AssertFailed();
2288 rc = VERR_NOT_IMPLEMENTED;
2289 }
2290
2291 return rc;
2292}
2293
2294
2295static DECLCALLBACK(int) vmsvga3dSurfaceUnmap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImage, VMSVGA3D_MAPPED_SURFACE *pMap, bool fWritten)
2296{
2297 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2298 AssertReturn(pState, VERR_INVALID_STATE);
2299
2300 PVMSVGA3DBACKEND pBackend = pState->pBackend;
2301 AssertReturn(pBackend, VERR_INVALID_STATE);
2302
2303 PVMSVGA3DSURFACE pSurface;
2304 int rc = vmsvga3dSurfaceFromSid(pState, pImage->sid, &pSurface);
2305 AssertRCReturn(rc, rc);
2306
2307 /* The called should not use the function for system memory surfaces. */
2308 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
2309 AssertReturn(pBackendSurface, VERR_INVALID_PARAMETER);
2310
2311 PVMSVGA3DDXCONTEXT pDXContext;
2312 /* Figure out whether the surface belongs to a DXContext or to the backend. */
2313 if (pSurface->idAssociatedContext != SVGA_ID_INVALID)
2314 vmsvga3dDXContextFromCid(pState, pSurface->idAssociatedContext, &pDXContext);
2315 else
2316 pDXContext = NULL;
2317
2318 DXDEVICE *pDevice;
2319 if (pDXContext)
2320 pDevice = &pDXContext->pBackendDXContext->device;
2321 else
2322 pDevice = &pBackend->device;
2323 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
2324
2325 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
2326 {
2327 ID3D11Texture2D *pMappedTexture;
2328 if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ)
2329 pMappedTexture = pBackendSurface->u.ScreenTarget.pStagingTexture;
2330 else
2331 pMappedTexture = pBackendSurface->u.ScreenTarget.pDynamicTexture;
2332
2333 UINT const Subresource = 0; /* Screen target surfaces have only one subresource. */
2334 pDevice->pImmediateContext->Unmap(pMappedTexture, Subresource);
2335
2336 if ( fWritten
2337 && ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
2338 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
2339 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
2340 {
2341 ID3D11Resource *pDstResource = pBackendSurface->u.ScreenTarget.pTexture;
2342 UINT DstSubresource = Subresource;
2343 UINT DstX = pMap->box.x;
2344 UINT DstY = pMap->box.y;
2345 UINT DstZ = pMap->box.z;
2346 ID3D11Resource *pSrcResource = pBackendSurface->u.ScreenTarget.pDynamicTexture;
2347 UINT SrcSubresource = Subresource;
2348 D3D11_BOX SrcBox;
2349 SrcBox.left = pMap->box.x;
2350 SrcBox.top = pMap->box.y;
2351 SrcBox.front = pMap->box.z;
2352 SrcBox.right = pMap->box.x + pMap->box.w;
2353 SrcBox.bottom = pMap->box.y + pMap->box.h;
2354 SrcBox.back = pMap->box.z + pMap->box.d;
2355 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
2356 pSrcResource, SrcSubresource, &SrcBox);
2357 }
2358 }
2359 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE)
2360 {
2361 ID3D11Texture2D *pMappedTexture;
2362 if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ)
2363 pMappedTexture = pBackendSurface->u.ScreenTarget.pStagingTexture;
2364 else
2365 pMappedTexture = pBackendSurface->u.ScreenTarget.pDynamicTexture;
2366
2367 UINT const Subresource = 0; /* Screen target surfaces have only one subresource. */
2368 pDevice->pImmediateContext->Unmap(pMappedTexture, Subresource);
2369
2370 if ( fWritten
2371 && ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
2372 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
2373 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
2374 {
2375 ID3D11Resource *pDstResource = pBackendSurface->u.ScreenTarget.pTexture;
2376 UINT DstSubresource = Subresource;
2377 UINT DstX = pMap->box.x;
2378 UINT DstY = pMap->box.y;
2379 UINT DstZ = pMap->box.z;
2380 ID3D11Resource *pSrcResource = pBackendSurface->u.ScreenTarget.pDynamicTexture;
2381 UINT SrcSubresource = Subresource;
2382 D3D11_BOX SrcBox;
2383 SrcBox.left = pMap->box.x;
2384 SrcBox.top = pMap->box.y;
2385 SrcBox.front = pMap->box.z;
2386 SrcBox.right = pMap->box.x + pMap->box.w;
2387 SrcBox.bottom = pMap->box.y + pMap->box.h;
2388 SrcBox.back = pMap->box.z + pMap->box.d;
2389 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
2390 pSrcResource, SrcSubresource, &SrcBox);
2391 }
2392 }
2393 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
2394 {
2395 UINT const Subresource = 0; /* Buffers have only one subresource. */
2396 pDevice->pImmediateContext->Unmap(pBackendSurface->u.Buffer.pBuffer, Subresource);
2397 }
2398 else
2399 {
2400 AssertFailed();
2401 rc = VERR_NOT_IMPLEMENTED;
2402 }
2403
2404 return rc;
2405}
2406
2407
2408static DECLCALLBACK(int) vmsvga3dScreenTargetBind(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, uint32_t sid)
2409{
2410 int rc = VINF_SUCCESS;
2411
2412 PVMSVGA3DSURFACE pSurface;
2413 if (sid != SVGA_ID_INVALID)
2414 {
2415 /* Create the surface if does not yet exist. */
2416 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2417 AssertReturn(pState, VERR_INVALID_STATE);
2418
2419 rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
2420 AssertRCReturn(rc, rc);
2421
2422 if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
2423 {
2424 /* Create the actual texture. */
2425 rc = vmsvga3dBackSurfaceCreateScreenTarget(pThisCC, pSurface);
2426 AssertRCReturn(rc, rc);
2427 }
2428 }
2429 else
2430 pSurface = NULL;
2431
2432 /* Notify the HW accelerated screen if it is used. */
2433 VMSVGAHWSCREEN *pHwScreen = pScreen->pHwScreen;
2434 if (!pHwScreen)
2435 return VINF_SUCCESS;
2436
2437 /* Same surface -> do nothing. */
2438 if (pHwScreen->sidScreenTarget == sid)
2439 return VINF_SUCCESS;
2440
2441 if (sid != SVGA_ID_INVALID)
2442 {
2443 AssertReturn( pSurface->pBackendSurface
2444 && pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET, VERR_INVALID_PARAMETER);
2445
2446 HANDLE const hSharedSurface = pHwScreen->SharedHandle;
2447 rc = vmsvga3dDrvNotifyBindSurface(pThisCC, pScreen, hSharedSurface);
2448 }
2449
2450 if (RT_SUCCESS(rc))
2451 {
2452 pHwScreen->sidScreenTarget = sid;
2453 }
2454
2455 return rc;
2456}
2457
2458
2459static DECLCALLBACK(int) vmsvga3dScreenTargetUpdate(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, SVGA3dRect const *pRect)
2460{
2461 VMSVGAHWSCREEN *pHwScreen = pScreen->pHwScreen;
2462 AssertReturn(pHwScreen, VERR_NOT_SUPPORTED);
2463
2464 if (pHwScreen->sidScreenTarget == SVGA_ID_INVALID)
2465 return VINF_SUCCESS; /* No surface bound. */
2466
2467 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2468 AssertReturn(pState, VERR_INVALID_STATE);
2469
2470 PVMSVGA3DBACKEND pBackend = pState->pBackend;
2471 AssertReturn(pBackend, VERR_INVALID_STATE);
2472
2473 PVMSVGA3DSURFACE pSurface;
2474 int rc = vmsvga3dSurfaceFromSid(pState, pHwScreen->sidScreenTarget, &pSurface);
2475 AssertRCReturn(rc, rc);
2476
2477 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
2478 AssertReturn(pBackendSurface && pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET, VERR_INVALID_PARAMETER);
2479
2480 SVGA3dRect boundRect;
2481 boundRect.x = 0;
2482 boundRect.y = 0;
2483 boundRect.w = pSurface->paMipmapLevels[0].mipmapSize.width;
2484 boundRect.h = pSurface->paMipmapLevels[0].mipmapSize.height;
2485 SVGA3dRect clipRect = *pRect;
2486 vmsvgaR3Clip3dRect(&boundRect, &clipRect);
2487 ASSERT_GUEST_RETURN(clipRect.w && clipRect.h, VERR_INVALID_PARAMETER);
2488
2489 /* Copy the screen texture to the shared surface. */
2490 DWORD result = pHwScreen->pDXGIKeyedMutex->AcquireSync(0, 10000);
2491 if (result == WAIT_OBJECT_0)
2492 {
2493 ID3D11Query *pQuery = 0;
2494 D3D11_QUERY_DESC qd;
2495 RT_ZERO(qd);
2496 qd.Query = D3D11_QUERY_EVENT;
2497 HRESULT hr2 = pBackend->device.pDevice->CreateQuery(&qd, &pQuery);
2498 Assert(hr2 == S_OK); RT_NOREF(hr2);
2499
2500 pBackend->device.pImmediateContext->CopyResource(pHwScreen->pTexture, pBackendSurface->u.ScreenTarget.pTexture);
2501
2502 pBackend->device.pImmediateContext->Flush();
2503
2504 pBackend->device.pImmediateContext->End(pQuery);
2505
2506 BOOL queryData;
2507 while (pBackend->device.pImmediateContext->GetData(pQuery, &queryData, sizeof(queryData), 0) != S_OK)
2508 {
2509 RTThreadYield();
2510 }
2511 D3D_RELEASE(pQuery);
2512
2513 result = pHwScreen->pDXGIKeyedMutex->ReleaseSync(1);
2514 }
2515 else
2516 AssertFailed();
2517
2518 rc = vmsvga3dDrvNotifyUpdate(pThisCC, pScreen, pRect->x, pRect->y, pRect->w, pRect->h);
2519 return rc;
2520}
2521
2522
2523/*
2524 *
2525 * 3D interface.
2526 *
2527 */
2528
2529static DECLCALLBACK(int) vmsvga3dBackQueryCaps(PVGASTATECC pThisCC, SVGA3dDevCapIndex idx3dCaps, uint32_t *pu32Val)
2530{
2531 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2532 AssertReturn(pState, VERR_INVALID_STATE);
2533
2534 int rc = VINF_SUCCESS;
2535
2536 *pu32Val = 0;
2537
2538 if (idx3dCaps > SVGA3D_DEVCAP_MAX)
2539 {
2540 LogRelMax(16, ("VMSVGA: unsupported SVGA3D_DEVCAP %d\n", idx3dCaps));
2541 return VERR_NOT_SUPPORTED;
2542 }
2543
2544 D3D_FEATURE_LEVEL const FeatureLevel = pState->pBackend->device.FeatureLevel;
2545
2546 /* Most values are taken from:
2547 * https://docs.microsoft.com/en-us/windows/win32/direct3d11/overviews-direct3d-11-devices-downlevel-intro
2548 *
2549 * Shader values are from
2550 * https://docs.microsoft.com/en-us/windows/win32/direct3dhlsl/dx-graphics-hlsl-models
2551 */
2552
2553 switch (idx3dCaps)
2554 {
2555 case SVGA3D_DEVCAP_3D:
2556 *pu32Val = 1;
2557 break;
2558
2559 case SVGA3D_DEVCAP_MAX_LIGHTS:
2560 *pu32Val = SVGA3D_NUM_LIGHTS; /* VGPU9. Not applicable to DX11. */
2561 break;
2562
2563 case SVGA3D_DEVCAP_MAX_TEXTURES:
2564 *pu32Val = SVGA3D_NUM_TEXTURE_UNITS; /* VGPU9. Not applicable to DX11. */
2565 break;
2566
2567 case SVGA3D_DEVCAP_MAX_CLIP_PLANES:
2568 *pu32Val = SVGA3D_NUM_CLIPPLANES;
2569 break;
2570
2571 case SVGA3D_DEVCAP_VERTEX_SHADER_VERSION:
2572 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2573 *pu32Val = SVGA3DVSVERSION_40;
2574 else
2575 *pu32Val = SVGA3DVSVERSION_30;
2576 break;
2577
2578 case SVGA3D_DEVCAP_VERTEX_SHADER:
2579 *pu32Val = 1;
2580 break;
2581
2582 case SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION:
2583 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2584 *pu32Val = SVGA3DPSVERSION_40;
2585 else
2586 *pu32Val = SVGA3DPSVERSION_30;
2587 break;
2588
2589 case SVGA3D_DEVCAP_FRAGMENT_SHADER:
2590 *pu32Val = 1;
2591 break;
2592
2593 case SVGA3D_DEVCAP_MAX_RENDER_TARGETS:
2594 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2595 *pu32Val = 8;
2596 else
2597 *pu32Val = 4;
2598 break;
2599
2600 case SVGA3D_DEVCAP_S23E8_TEXTURES:
2601 case SVGA3D_DEVCAP_S10E5_TEXTURES:
2602 /* Must be obsolete by now; surface format caps specify the same thing. */
2603 break;
2604
2605 case SVGA3D_DEVCAP_MAX_FIXED_VERTEXBLEND:
2606 /* Obsolete */
2607 break;
2608
2609 /*
2610 * 2. The BUFFER_FORMAT capabilities are deprecated, and they always
2611 * return TRUE. Even on physical hardware that does not support
2612 * these formats natively, the SVGA3D device will provide an emulation
2613 * which should be invisible to the guest OS.
2614 */
2615 case SVGA3D_DEVCAP_D16_BUFFER_FORMAT:
2616 case SVGA3D_DEVCAP_D24S8_BUFFER_FORMAT:
2617 case SVGA3D_DEVCAP_D24X8_BUFFER_FORMAT:
2618 *pu32Val = 1;
2619 break;
2620
2621 case SVGA3D_DEVCAP_QUERY_TYPES:
2622 /* Obsolete */
2623 break;
2624
2625 case SVGA3D_DEVCAP_TEXTURE_GRADIENT_SAMPLING:
2626 /* Obsolete */
2627 break;
2628
2629 case SVGA3D_DEVCAP_MAX_POINT_SIZE:
2630 AssertCompile(sizeof(uint32_t) == sizeof(float));
2631 *(float *)pu32Val = 256.0f; /* VGPU9. Not applicable to DX11. */
2632 break;
2633
2634 case SVGA3D_DEVCAP_MAX_SHADER_TEXTURES:
2635 /* Obsolete */
2636 break;
2637
2638 case SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH:
2639 case SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT:
2640 if (FeatureLevel >= D3D_FEATURE_LEVEL_11_0)
2641 *pu32Val = 16384;
2642 else if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2643 *pu32Val = 8192;
2644 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
2645 *pu32Val = 4096;
2646 else
2647 *pu32Val = 2048;
2648 break;
2649
2650 case SVGA3D_DEVCAP_MAX_VOLUME_EXTENT:
2651 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2652 *pu32Val = 2048;
2653 else
2654 *pu32Val = 256;
2655 break;
2656
2657 case SVGA3D_DEVCAP_MAX_TEXTURE_REPEAT:
2658 if (FeatureLevel >= D3D_FEATURE_LEVEL_11_0)
2659 *pu32Val = 16384;
2660 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
2661 *pu32Val = 8192;
2662 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
2663 *pu32Val = 2048;
2664 else
2665 *pu32Val = 128;
2666 break;
2667
2668 case SVGA3D_DEVCAP_MAX_TEXTURE_ASPECT_RATIO:
2669 /* Obsolete */
2670 break;
2671
2672 case SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY:
2673 if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
2674 *pu32Val = D3D11_REQ_MAXANISOTROPY;
2675 else
2676 *pu32Val = 2; // D3D_FL9_1_DEFAULT_MAX_ANISOTROPY;
2677 break;
2678
2679 case SVGA3D_DEVCAP_MAX_PRIMITIVE_COUNT:
2680 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2681 *pu32Val = UINT32_MAX;
2682 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
2683 *pu32Val = 1048575; // D3D_FL9_2_IA_PRIMITIVE_MAX_COUNT;
2684 else
2685 *pu32Val = 65535; // D3D_FL9_1_IA_PRIMITIVE_MAX_COUNT;
2686 break;
2687
2688 case SVGA3D_DEVCAP_MAX_VERTEX_INDEX:
2689 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2690 *pu32Val = UINT32_MAX;
2691 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
2692 *pu32Val = 1048575;
2693 else
2694 *pu32Val = 65534;
2695 break;
2696
2697 case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS:
2698 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2699 *pu32Val = UINT32_MAX;
2700 else
2701 *pu32Val = 512;
2702 break;
2703
2704 case SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_INSTRUCTIONS:
2705 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2706 *pu32Val = UINT32_MAX;
2707 else
2708 *pu32Val = 512;
2709 break;
2710
2711 case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS:
2712 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2713 *pu32Val = 4096;
2714 else
2715 *pu32Val = 32;
2716 break;
2717
2718 case SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS:
2719 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2720 *pu32Val = 4096;
2721 else
2722 *pu32Val = 32;
2723 break;
2724
2725 case SVGA3D_DEVCAP_TEXTURE_OPS:
2726 /* Obsolete */
2727 break;
2728
2729 case SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8:
2730 case SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8:
2731 case SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10:
2732 case SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5:
2733 case SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5:
2734 case SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4:
2735 case SVGA3D_DEVCAP_SURFACEFMT_R5G6B5:
2736 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16:
2737 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8:
2738 case SVGA3D_DEVCAP_SURFACEFMT_ALPHA8:
2739 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8:
2740 case SVGA3D_DEVCAP_SURFACEFMT_Z_D16:
2741 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8:
2742 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8:
2743 case SVGA3D_DEVCAP_SURFACEFMT_DXT1:
2744 case SVGA3D_DEVCAP_SURFACEFMT_DXT2:
2745 case SVGA3D_DEVCAP_SURFACEFMT_DXT3:
2746 case SVGA3D_DEVCAP_SURFACEFMT_DXT4:
2747 case SVGA3D_DEVCAP_SURFACEFMT_DXT5:
2748 case SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8:
2749 case SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10:
2750 case SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8:
2751 case SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8:
2752 case SVGA3D_DEVCAP_SURFACEFMT_CxV8U8:
2753 case SVGA3D_DEVCAP_SURFACEFMT_R_S10E5:
2754 case SVGA3D_DEVCAP_SURFACEFMT_R_S23E8:
2755 case SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5:
2756 case SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8:
2757 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5:
2758 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8:
2759 case SVGA3D_DEVCAP_SURFACEFMT_V16U16:
2760 case SVGA3D_DEVCAP_SURFACEFMT_G16R16:
2761 case SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16:
2762 case SVGA3D_DEVCAP_SURFACEFMT_UYVY:
2763 case SVGA3D_DEVCAP_SURFACEFMT_YUY2:
2764 case SVGA3D_DEVCAP_SURFACEFMT_NV12:
2765 case SVGA3D_DEVCAP_DEAD10: /* SVGA3D_DEVCAP_SURFACEFMT_AYUV */
2766 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF16:
2767 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF24:
2768 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT:
2769 case SVGA3D_DEVCAP_SURFACEFMT_ATI1:
2770 case SVGA3D_DEVCAP_SURFACEFMT_ATI2:
2771 case SVGA3D_DEVCAP_SURFACEFMT_YV12:
2772 {
2773 SVGA3dSurfaceFormat const enmFormat = vmsvgaDXDevCapSurfaceFmt2Format(idx3dCaps);
2774 rc = vmsvgaDXCheckFormatSupportPreDX(pState, enmFormat, pu32Val);
2775 break;
2776 }
2777
2778 case SVGA3D_DEVCAP_MISSING62:
2779 /* Unused */
2780 break;
2781
2782 case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEXTURES:
2783 /* Obsolete */
2784 break;
2785
2786 case SVGA3D_DEVCAP_MAX_SIMULTANEOUS_RENDER_TARGETS:
2787 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
2788 *pu32Val = 8;
2789 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
2790 *pu32Val = 4; // D3D_FL9_3_SIMULTANEOUS_RENDER_TARGET_COUNT
2791 else
2792 *pu32Val = 1; // D3D_FL9_1_SIMULTANEOUS_RENDER_TARGET_COUNT
2793 break;
2794
2795 case SVGA3D_DEVCAP_DEAD4: /* SVGA3D_DEVCAP_MULTISAMPLE_NONMASKABLESAMPLES */
2796 case SVGA3D_DEVCAP_DEAD5: /* SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES */
2797 *pu32Val = (1 << (2-1)) | (1 << (4-1)) | (1 << (8-1)); /* 2x, 4x, 8x */
2798 break;
2799
2800 case SVGA3D_DEVCAP_DEAD7: /* SVGA3D_DEVCAP_ALPHATOCOVERAGE */
2801 /* Obsolete */
2802 break;
2803
2804 case SVGA3D_DEVCAP_DEAD6: /* SVGA3D_DEVCAP_SUPERSAMPLE */
2805 /* Obsolete */
2806 break;
2807
2808 case SVGA3D_DEVCAP_AUTOGENMIPMAPS:
2809 *pu32Val = 1;
2810 break;
2811
2812 case SVGA3D_DEVCAP_MAX_CONTEXT_IDS:
2813 *pu32Val = SVGA3D_MAX_CONTEXT_IDS;
2814 break;
2815
2816 case SVGA3D_DEVCAP_MAX_SURFACE_IDS:
2817 *pu32Val = SVGA3D_MAX_SURFACE_IDS;
2818 break;
2819
2820 case SVGA3D_DEVCAP_DEAD1:
2821 /* Obsolete */
2822 break;
2823
2824 case SVGA3D_DEVCAP_DEAD8: /* SVGA3D_DEVCAP_VIDEO_DECODE */
2825 /* Obsolete */
2826 break;
2827
2828 case SVGA3D_DEVCAP_DEAD9: /* SVGA3D_DEVCAP_VIDEO_PROCESS */
2829 /* Obsolete */
2830 break;
2831
2832 case SVGA3D_DEVCAP_LINE_AA:
2833 *pu32Val = 1;
2834 break;
2835
2836 case SVGA3D_DEVCAP_LINE_STIPPLE:
2837 *pu32Val = 0; /* DX11 does not seem to support this directly. */
2838 break;
2839
2840 case SVGA3D_DEVCAP_MAX_LINE_WIDTH:
2841 AssertCompile(sizeof(uint32_t) == sizeof(float));
2842 *(float *)pu32Val = 1.0f;
2843 break;
2844
2845 case SVGA3D_DEVCAP_MAX_AA_LINE_WIDTH:
2846 AssertCompile(sizeof(uint32_t) == sizeof(float));
2847 *(float *)pu32Val = 1.0f;
2848 break;
2849
2850 case SVGA3D_DEVCAP_DEAD3: /* Old SVGA3D_DEVCAP_LOGICOPS */
2851 /* Deprecated. */
2852 AssertCompile(SVGA3D_DEVCAP_DEAD3 == 92); /* Newer SVGA headers redefine this. */
2853 break;
2854
2855 case SVGA3D_DEVCAP_TS_COLOR_KEY:
2856 *pu32Val = 0; /* DX11 does not seem to support this directly. */
2857 break;
2858
2859 case SVGA3D_DEVCAP_DEAD2:
2860 break;
2861
2862 case SVGA3D_DEVCAP_DXCONTEXT:
2863 *pu32Val = 1;
2864 break;
2865
2866 case SVGA3D_DEVCAP_DEAD11: /* SVGA3D_DEVCAP_MAX_TEXTURE_ARRAY_SIZE */
2867 *pu32Val = D3D11_REQ_TEXTURE2D_ARRAY_AXIS_DIMENSION;
2868 break;
2869
2870 case SVGA3D_DEVCAP_DX_MAX_VERTEXBUFFERS:
2871 *pu32Val = D3D11_IA_VERTEX_INPUT_RESOURCE_SLOT_COUNT;
2872 break;
2873
2874 case SVGA3D_DEVCAP_DX_MAX_CONSTANT_BUFFERS:
2875 *pu32Val = D3D11_COMMONSHADER_CONSTANT_BUFFER_HW_SLOT_COUNT;
2876 break;
2877
2878 case SVGA3D_DEVCAP_DX_PROVOKING_VERTEX:
2879 *pu32Val = 0; /* boolean */
2880 break;
2881
2882 case SVGA3D_DEVCAP_DXFMT_X8R8G8B8:
2883 case SVGA3D_DEVCAP_DXFMT_A8R8G8B8:
2884 case SVGA3D_DEVCAP_DXFMT_R5G6B5:
2885 case SVGA3D_DEVCAP_DXFMT_X1R5G5B5:
2886 case SVGA3D_DEVCAP_DXFMT_A1R5G5B5:
2887 case SVGA3D_DEVCAP_DXFMT_A4R4G4B4:
2888 case SVGA3D_DEVCAP_DXFMT_Z_D32:
2889 case SVGA3D_DEVCAP_DXFMT_Z_D16:
2890 case SVGA3D_DEVCAP_DXFMT_Z_D24S8:
2891 case SVGA3D_DEVCAP_DXFMT_Z_D15S1:
2892 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8:
2893 case SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4:
2894 case SVGA3D_DEVCAP_DXFMT_LUMINANCE16:
2895 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8:
2896 case SVGA3D_DEVCAP_DXFMT_DXT1:
2897 case SVGA3D_DEVCAP_DXFMT_DXT2:
2898 case SVGA3D_DEVCAP_DXFMT_DXT3:
2899 case SVGA3D_DEVCAP_DXFMT_DXT4:
2900 case SVGA3D_DEVCAP_DXFMT_DXT5:
2901 case SVGA3D_DEVCAP_DXFMT_BUMPU8V8:
2902 case SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5:
2903 case SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8:
2904 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1:
2905 case SVGA3D_DEVCAP_DXFMT_ARGB_S10E5:
2906 case SVGA3D_DEVCAP_DXFMT_ARGB_S23E8:
2907 case SVGA3D_DEVCAP_DXFMT_A2R10G10B10:
2908 case SVGA3D_DEVCAP_DXFMT_V8U8:
2909 case SVGA3D_DEVCAP_DXFMT_Q8W8V8U8:
2910 case SVGA3D_DEVCAP_DXFMT_CxV8U8:
2911 case SVGA3D_DEVCAP_DXFMT_X8L8V8U8:
2912 case SVGA3D_DEVCAP_DXFMT_A2W10V10U10:
2913 case SVGA3D_DEVCAP_DXFMT_ALPHA8:
2914 case SVGA3D_DEVCAP_DXFMT_R_S10E5:
2915 case SVGA3D_DEVCAP_DXFMT_R_S23E8:
2916 case SVGA3D_DEVCAP_DXFMT_RG_S10E5:
2917 case SVGA3D_DEVCAP_DXFMT_RG_S23E8:
2918 case SVGA3D_DEVCAP_DXFMT_BUFFER:
2919 case SVGA3D_DEVCAP_DXFMT_Z_D24X8:
2920 case SVGA3D_DEVCAP_DXFMT_V16U16:
2921 case SVGA3D_DEVCAP_DXFMT_G16R16:
2922 case SVGA3D_DEVCAP_DXFMT_A16B16G16R16:
2923 case SVGA3D_DEVCAP_DXFMT_UYVY:
2924 case SVGA3D_DEVCAP_DXFMT_YUY2:
2925 case SVGA3D_DEVCAP_DXFMT_NV12:
2926 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD2: /* SVGA3D_DEVCAP_DXFMT_AYUV */
2927 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS:
2928 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT:
2929 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT:
2930 case SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS:
2931 case SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT:
2932 case SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT:
2933 case SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT:
2934 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS:
2935 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT:
2936 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM:
2937 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT:
2938 case SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS:
2939 case SVGA3D_DEVCAP_DXFMT_R32G32_UINT:
2940 case SVGA3D_DEVCAP_DXFMT_R32G32_SINT:
2941 case SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS:
2942 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT:
2943 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24:
2944 case SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT:
2945 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS:
2946 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT:
2947 case SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT:
2948 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS:
2949 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM:
2950 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB:
2951 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT:
2952 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT:
2953 case SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS:
2954 case SVGA3D_DEVCAP_DXFMT_R16G16_UINT:
2955 case SVGA3D_DEVCAP_DXFMT_R16G16_SINT:
2956 case SVGA3D_DEVCAP_DXFMT_R32_TYPELESS:
2957 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT:
2958 case SVGA3D_DEVCAP_DXFMT_R32_UINT:
2959 case SVGA3D_DEVCAP_DXFMT_R32_SINT:
2960 case SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS:
2961 case SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT:
2962 case SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8:
2963 case SVGA3D_DEVCAP_DXFMT_X24_G8_UINT:
2964 case SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS:
2965 case SVGA3D_DEVCAP_DXFMT_R8G8_UNORM:
2966 case SVGA3D_DEVCAP_DXFMT_R8G8_UINT:
2967 case SVGA3D_DEVCAP_DXFMT_R8G8_SINT:
2968 case SVGA3D_DEVCAP_DXFMT_R16_TYPELESS:
2969 case SVGA3D_DEVCAP_DXFMT_R16_UNORM:
2970 case SVGA3D_DEVCAP_DXFMT_R16_UINT:
2971 case SVGA3D_DEVCAP_DXFMT_R16_SNORM:
2972 case SVGA3D_DEVCAP_DXFMT_R16_SINT:
2973 case SVGA3D_DEVCAP_DXFMT_R8_TYPELESS:
2974 case SVGA3D_DEVCAP_DXFMT_R8_UNORM:
2975 case SVGA3D_DEVCAP_DXFMT_R8_UINT:
2976 case SVGA3D_DEVCAP_DXFMT_R8_SNORM:
2977 case SVGA3D_DEVCAP_DXFMT_R8_SINT:
2978 case SVGA3D_DEVCAP_DXFMT_P8:
2979 case SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP:
2980 case SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM:
2981 case SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM:
2982 case SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS:
2983 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB:
2984 case SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS:
2985 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB:
2986 case SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS:
2987 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB:
2988 case SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS:
2989 case SVGA3D_DEVCAP_DXFMT_ATI1:
2990 case SVGA3D_DEVCAP_DXFMT_BC4_SNORM:
2991 case SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS:
2992 case SVGA3D_DEVCAP_DXFMT_ATI2:
2993 case SVGA3D_DEVCAP_DXFMT_BC5_SNORM:
2994 case SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM:
2995 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS:
2996 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB:
2997 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS:
2998 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB:
2999 case SVGA3D_DEVCAP_DXFMT_Z_DF16:
3000 case SVGA3D_DEVCAP_DXFMT_Z_DF24:
3001 case SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT:
3002 case SVGA3D_DEVCAP_DXFMT_YV12:
3003 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT:
3004 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT:
3005 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM:
3006 case SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT:
3007 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM:
3008 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM:
3009 case SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT:
3010 case SVGA3D_DEVCAP_DXFMT_R16G16_UNORM:
3011 case SVGA3D_DEVCAP_DXFMT_R16G16_SNORM:
3012 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT:
3013 case SVGA3D_DEVCAP_DXFMT_R8G8_SNORM:
3014 case SVGA3D_DEVCAP_DXFMT_R16_FLOAT:
3015 case SVGA3D_DEVCAP_DXFMT_D16_UNORM:
3016 case SVGA3D_DEVCAP_DXFMT_A8_UNORM:
3017 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM:
3018 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM:
3019 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM:
3020 case SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM:
3021 case SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM:
3022 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM:
3023 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM:
3024 case SVGA3D_DEVCAP_DXFMT_BC4_UNORM:
3025 case SVGA3D_DEVCAP_DXFMT_BC5_UNORM:
3026 case SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS:
3027 case SVGA3D_DEVCAP_DXFMT_BC6H_UF16:
3028 case SVGA3D_DEVCAP_DXFMT_BC6H_SF16:
3029 case SVGA3D_DEVCAP_DXFMT_BC7_TYPELESS:
3030 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM:
3031 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM_SRGB:
3032 {
3033 SVGA3dSurfaceFormat const enmFormat = vmsvgaDXDevCapDxfmt2Format(idx3dCaps);
3034 rc = vmsvgaDXCheckFormatSupport(pState, enmFormat, pu32Val);
3035 break;
3036 }
3037
3038 case SVGA3D_DEVCAP_SM41:
3039 *pu32Val = 0; /* boolean */
3040 break;
3041
3042 case SVGA3D_DEVCAP_MULTISAMPLE_2X:
3043 *pu32Val = 0; /* boolean */
3044 break;
3045
3046 case SVGA3D_DEVCAP_MULTISAMPLE_4X:
3047 *pu32Val = 0; /* boolean */
3048 break;
3049
3050 case SVGA3D_DEVCAP_MS_FULL_QUALITY:
3051 *pu32Val = 0; /* boolean */
3052 break;
3053
3054 case SVGA3D_DEVCAP_LOGICOPS:
3055 AssertCompile(SVGA3D_DEVCAP_LOGICOPS == 248);
3056 *pu32Val = 0; /* boolean */
3057 break;
3058
3059 case SVGA3D_DEVCAP_LOGIC_BLENDOPS:
3060 *pu32Val = 0; /* boolean */
3061 break;
3062
3063 case SVGA3D_DEVCAP_RESERVED_1:
3064 break;
3065
3066 case SVGA3D_DEVCAP_RESERVED_2:
3067 break;
3068
3069 case SVGA3D_DEVCAP_SM5:
3070 *pu32Val = 0; /* boolean */
3071 break;
3072
3073 case SVGA3D_DEVCAP_MULTISAMPLE_8X:
3074 *pu32Val = 0; /* boolean */
3075 break;
3076
3077 case SVGA3D_DEVCAP_MAX:
3078 case SVGA3D_DEVCAP_INVALID:
3079 rc = VERR_NOT_SUPPORTED;
3080 break;
3081 }
3082
3083 return rc;
3084}
3085
3086
3087static DECLCALLBACK(int) vmsvga3dBackChangeMode(PVGASTATECC pThisCC)
3088{
3089 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3090 AssertReturn(pState, VERR_INVALID_STATE);
3091
3092 return VINF_SUCCESS;
3093}
3094
3095
3096static DECLCALLBACK(int) vmsvga3dBackSurfaceCopy(PVGASTATECC pThisCC, SVGA3dSurfaceImageId dest, SVGA3dSurfaceImageId src,
3097 uint32_t cCopyBoxes, SVGA3dCopyBox *pBox)
3098{
3099 RT_NOREF(dest, src, cCopyBoxes, pBox);
3100
3101 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3102 AssertReturn(pState, VERR_INVALID_STATE);
3103
3104 AssertFailed();
3105 return VERR_NOT_IMPLEMENTED;
3106}
3107
3108
3109static DECLCALLBACK(void) vmsvga3dBackUpdateHostScreenViewport(PVGASTATECC pThisCC, uint32_t idScreen, VMSVGAVIEWPORT const *pOldViewport)
3110{
3111 RT_NOREF(pThisCC, idScreen, pOldViewport);
3112 /** @todo Scroll the screen content without requiring the guest to redraw. */
3113}
3114
3115
3116static DECLCALLBACK(int) vmsvga3dBackSurfaceUpdateHeapBuffers(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface)
3117{
3118 /** @todo */
3119 RT_NOREF(pThisCC, pSurface);
3120 return VERR_NOT_IMPLEMENTED;
3121}
3122
3123
3124/**
3125 * Create a new 3d context
3126 *
3127 * @returns VBox status code.
3128 * @param pThisCC The VGA/VMSVGA state for ring-3.
3129 * @param cid Context id
3130 */
3131static DECLCALLBACK(int) vmsvga3dBackContextDefine(PVGASTATECC pThisCC, uint32_t cid)
3132{
3133 RT_NOREF(cid);
3134
3135 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3136 AssertReturn(pState, VERR_INVALID_STATE);
3137
3138 AssertFailed();
3139 return VERR_NOT_IMPLEMENTED;
3140}
3141
3142
3143/**
3144 * Destroy an existing 3d context
3145 *
3146 * @returns VBox status code.
3147 * @param pThisCC The VGA/VMSVGA state for ring-3.
3148 * @param cid Context id
3149 */
3150static DECLCALLBACK(int) vmsvga3dBackContextDestroy(PVGASTATECC pThisCC, uint32_t cid)
3151{
3152 RT_NOREF(cid);
3153
3154 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3155 AssertReturn(pState, VERR_INVALID_STATE);
3156
3157 AssertFailed();
3158 return VINF_SUCCESS;
3159}
3160
3161
3162static DECLCALLBACK(int) vmsvga3dBackSetTransform(PVGASTATECC pThisCC, uint32_t cid, SVGA3dTransformType type, float matrix[16])
3163{
3164 RT_NOREF(cid, type, matrix);
3165
3166 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3167 AssertReturn(pState, VERR_INVALID_STATE);
3168
3169 AssertFailed();
3170 return VINF_SUCCESS;
3171}
3172
3173
3174static DECLCALLBACK(int) vmsvga3dBackSetZRange(PVGASTATECC pThisCC, uint32_t cid, SVGA3dZRange zRange)
3175{
3176 RT_NOREF(cid, zRange);
3177
3178 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3179 AssertReturn(pState, VERR_INVALID_STATE);
3180
3181 AssertFailed();
3182 return VINF_SUCCESS;
3183}
3184
3185
3186static DECLCALLBACK(int) vmsvga3dBackSetRenderState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cRenderStates, SVGA3dRenderState *pRenderState)
3187{
3188 RT_NOREF(cid, cRenderStates, pRenderState);
3189
3190 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3191 AssertReturn(pState, VERR_INVALID_STATE);
3192
3193 AssertFailed();
3194 return VINF_SUCCESS;
3195}
3196
3197
3198static DECLCALLBACK(int) vmsvga3dBackSetRenderTarget(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRenderTargetType type, SVGA3dSurfaceImageId target)
3199{
3200 RT_NOREF(cid, type, target);
3201
3202 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3203 AssertReturn(pState, VERR_INVALID_STATE);
3204
3205 AssertFailed();
3206 return VINF_SUCCESS;
3207}
3208
3209
3210static DECLCALLBACK(int) vmsvga3dBackSetTextureState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cTextureStates, SVGA3dTextureState *pTextureState)
3211{
3212 RT_NOREF(cid, cTextureStates, pTextureState);
3213
3214 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3215 AssertReturn(pState, VERR_INVALID_STATE);
3216
3217 AssertFailed();
3218 return VINF_SUCCESS;
3219}
3220
3221
3222static DECLCALLBACK(int) vmsvga3dBackSetMaterial(PVGASTATECC pThisCC, uint32_t cid, SVGA3dFace face, SVGA3dMaterial *pMaterial)
3223{
3224 RT_NOREF(cid, face, pMaterial);
3225
3226 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3227 AssertReturn(pState, VERR_INVALID_STATE);
3228
3229 AssertFailed();
3230 return VINF_SUCCESS;
3231}
3232
3233
3234static DECLCALLBACK(int) vmsvga3dBackSetLightData(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, SVGA3dLightData *pData)
3235{
3236 RT_NOREF(cid, index, pData);
3237
3238 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3239 AssertReturn(pState, VERR_INVALID_STATE);
3240
3241 AssertFailed();
3242 return VINF_SUCCESS;
3243}
3244
3245
3246static DECLCALLBACK(int) vmsvga3dBackSetLightEnabled(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, uint32_t enabled)
3247{
3248 RT_NOREF(cid, index, enabled);
3249
3250 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3251 AssertReturn(pState, VERR_INVALID_STATE);
3252
3253 AssertFailed();
3254 return VINF_SUCCESS;
3255}
3256
3257
3258static DECLCALLBACK(int) vmsvga3dBackSetViewPort(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
3259{
3260 RT_NOREF(cid, pRect);
3261
3262 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3263 AssertReturn(pState, VERR_INVALID_STATE);
3264
3265 AssertFailed();
3266 return VINF_SUCCESS;
3267}
3268
3269
3270static DECLCALLBACK(int) vmsvga3dBackSetClipPlane(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, float plane[4])
3271{
3272 RT_NOREF(cid, index, plane);
3273
3274 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3275 AssertReturn(pState, VERR_INVALID_STATE);
3276
3277 AssertFailed();
3278 return VINF_SUCCESS;
3279}
3280
3281
3282static DECLCALLBACK(int) vmsvga3dBackCommandClear(PVGASTATECC pThisCC, uint32_t cid, SVGA3dClearFlag clearFlag, uint32_t color, float depth,
3283 uint32_t stencil, uint32_t cRects, SVGA3dRect *pRect)
3284{
3285 /* From SVGA3D_BeginClear comments:
3286 *
3287 * Clear is not affected by clipping, depth test, or other
3288 * render state which affects the fragment pipeline.
3289 *
3290 * Therefore this code must ignore the current scissor rect.
3291 */
3292
3293 RT_NOREF(cid, clearFlag, color, depth, stencil, cRects, pRect);
3294
3295 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3296 AssertReturn(pState, VERR_INVALID_STATE);
3297
3298 AssertFailed();
3299 return VINF_SUCCESS;
3300}
3301
3302
3303static DECLCALLBACK(int) vmsvga3dBackDrawPrimitives(PVGASTATECC pThisCC, uint32_t cid, uint32_t numVertexDecls, SVGA3dVertexDecl *pVertexDecl,
3304 uint32_t numRanges, SVGA3dPrimitiveRange *pRange,
3305 uint32_t cVertexDivisor, SVGA3dVertexDivisor *pVertexDivisor)
3306{
3307 RT_NOREF(cid, numVertexDecls, pVertexDecl, numRanges, pRange, cVertexDivisor, pVertexDivisor);
3308
3309 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3310 AssertReturn(pState, VERR_INVALID_STATE);
3311
3312 AssertFailed();
3313 return VINF_SUCCESS;
3314}
3315
3316
3317static DECLCALLBACK(int) vmsvga3dBackSetScissorRect(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
3318{
3319 RT_NOREF(cid, pRect);
3320
3321 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3322 AssertReturn(pState, VERR_INVALID_STATE);
3323
3324 AssertFailed();
3325 return VINF_SUCCESS;
3326}
3327
3328
3329static DECLCALLBACK(int) vmsvga3dBackGenerateMipmaps(PVGASTATECC pThisCC, uint32_t sid, SVGA3dTextureFilter filter)
3330{
3331 RT_NOREF(sid, filter);
3332
3333 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3334 AssertReturn(pState, VERR_INVALID_STATE);
3335
3336 AssertFailed();
3337 return VINF_SUCCESS;
3338}
3339
3340
3341static DECLCALLBACK(int) vmsvga3dBackShaderDefine(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type,
3342 uint32_t cbData, uint32_t *pShaderData)
3343{
3344 RT_NOREF(cid, shid, type, cbData, pShaderData);
3345
3346 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3347 AssertReturn(pState, VERR_INVALID_STATE);
3348
3349 AssertFailed();
3350 return VINF_SUCCESS;
3351}
3352
3353
3354static DECLCALLBACK(int) vmsvga3dBackShaderDestroy(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type)
3355{
3356 RT_NOREF(cid, shid, type);
3357
3358 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3359 AssertReturn(pState, VERR_INVALID_STATE);
3360
3361 AssertFailed();
3362 return VINF_SUCCESS;
3363}
3364
3365
3366static DECLCALLBACK(int) vmsvga3dBackShaderSet(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext, uint32_t cid, SVGA3dShaderType type, uint32_t shid)
3367{
3368 RT_NOREF(pContext, cid, type, shid);
3369
3370 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3371 AssertReturn(pState, VERR_INVALID_STATE);
3372
3373 AssertFailed();
3374 return VINF_SUCCESS;
3375}
3376
3377
3378static DECLCALLBACK(int) vmsvga3dBackShaderSetConst(PVGASTATECC pThisCC, uint32_t cid, uint32_t reg, SVGA3dShaderType type,
3379 SVGA3dShaderConstType ctype, uint32_t cRegisters, uint32_t *pValues)
3380{
3381 RT_NOREF(cid, reg, type, ctype, cRegisters, pValues);
3382
3383 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3384 AssertReturn(pState, VERR_INVALID_STATE);
3385
3386 AssertFailed();
3387 return VINF_SUCCESS;
3388}
3389
3390
3391/**
3392 * Destroy backend specific surface bits (part of SVGA_3D_CMD_SURFACE_DESTROY).
3393 *
3394 * @param pThisCC The device context.
3395 * @param pSurface The surface being destroyed.
3396 */
3397static DECLCALLBACK(void) vmsvga3dBackSurfaceDestroy(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface)
3398{
3399 RT_NOREF(pThisCC);
3400
3401 /* The caller should not use the function for system memory surfaces. */
3402 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
3403 if (!pBackendSurface)
3404 return;
3405 pSurface->pBackendSurface = NULL;
3406
3407 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
3408 {
3409 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pStagingTexture);
3410 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pDynamicTexture);
3411 D3D_RELEASE(pBackendSurface->u.ScreenTarget.pTexture);
3412 }
3413 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE)
3414 {
3415 D3D_RELEASE(pBackendSurface->u.Texture.pStagingTexture);
3416 D3D_RELEASE(pBackendSurface->u.Texture.pDynamicTexture);
3417 D3D_RELEASE(pBackendSurface->u.Texture.pTexture);
3418 }
3419 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
3420 {
3421 D3D_RELEASE(pBackendSurface->u.Buffer.pBuffer);
3422 }
3423 else
3424 {
3425 AssertFailed();
3426 }
3427
3428 RTMemFree(pBackendSurface);
3429}
3430
3431
3432/**
3433 * Backend worker for implementing SVGA_3D_CMD_SURFACE_STRETCHBLT.
3434 *
3435 * @returns VBox status code.
3436 * @param pThis The VGA device instance.
3437 * @param pState The VMSVGA3d state.
3438 * @param pDstSurface The destination host surface.
3439 * @param uDstFace The destination face (valid).
3440 * @param uDstMipmap The destination mipmap level (valid).
3441 * @param pDstBox The destination box.
3442 * @param pSrcSurface The source host surface.
3443 * @param uSrcFace The destination face (valid).
3444 * @param uSrcMipmap The source mimap level (valid).
3445 * @param pSrcBox The source box.
3446 * @param enmMode The strecht blt mode .
3447 * @param pContext The VMSVGA3d context (already current for OGL).
3448 */
3449static DECLCALLBACK(int) vmsvga3dBackSurfaceStretchBlt(PVGASTATE pThis, PVMSVGA3DSTATE pState,
3450 PVMSVGA3DSURFACE pDstSurface, uint32_t uDstFace, uint32_t uDstMipmap, SVGA3dBox const *pDstBox,
3451 PVMSVGA3DSURFACE pSrcSurface, uint32_t uSrcFace, uint32_t uSrcMipmap, SVGA3dBox const *pSrcBox,
3452 SVGA3dStretchBltMode enmMode, PVMSVGA3DCONTEXT pContext)
3453{
3454 RT_NOREF(pThis, pState, pDstSurface, uDstFace, uDstMipmap, pDstBox,
3455 pSrcSurface, uSrcFace, uSrcMipmap, pSrcBox, enmMode, pContext);
3456
3457 AssertFailed();
3458 return VINF_SUCCESS;
3459}
3460
3461
3462/**
3463 * Backend worker for implementing SVGA_3D_CMD_SURFACE_DMA that copies one box.
3464 *
3465 * @returns Failure status code or @a rc.
3466 * @param pThis The shared VGA/VMSVGA instance data.
3467 * @param pThisCC The VGA/VMSVGA state for ring-3.
3468 * @param pState The VMSVGA3d state.
3469 * @param pSurface The host surface.
3470 * @param pMipLevel Mipmap level. The caller knows it already.
3471 * @param uHostFace The host face (valid).
3472 * @param uHostMipmap The host mipmap level (valid).
3473 * @param GuestPtr The guest pointer.
3474 * @param cbGuestPitch The guest pitch.
3475 * @param transfer The transfer direction.
3476 * @param pBox The box to copy (clipped, valid, except for guest's srcx, srcy, srcz).
3477 * @param pContext The context (for OpenGL).
3478 * @param rc The current rc for all boxes.
3479 * @param iBox The current box number (for Direct 3D).
3480 */
3481static DECLCALLBACK(int) vmsvga3dBackSurfaceDMACopyBox(PVGASTATE pThis, PVGASTATECC pThisCC, PVMSVGA3DSTATE pState, PVMSVGA3DSURFACE pSurface,
3482 PVMSVGA3DMIPMAPLEVEL pMipLevel, uint32_t uHostFace, uint32_t uHostMipmap,
3483 SVGAGuestPtr GuestPtr, uint32_t cbGuestPitch, SVGA3dTransferType transfer,
3484 SVGA3dCopyBox const *pBox, PVMSVGA3DCONTEXT pContext, int rc, int iBox)
3485{
3486 RT_NOREF(pState, pMipLevel, pContext, iBox);
3487
3488 /* The called should not use the function for system memory surfaces. */
3489 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
3490 AssertReturn(pBackendSurface, VERR_INVALID_PARAMETER);
3491
3492 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
3493 {
3494 /** @todo This is generic code and should be in DevVGA-SVGA3d.cpp for backends which support Map/Unmap. */
3495 AssertReturn(uHostFace == 0 && uHostMipmap == 0, VERR_INVALID_PARAMETER);
3496 AssertReturn(transfer == SVGA3D_WRITE_HOST_VRAM, VERR_NOT_IMPLEMENTED); /** @todo Implement */
3497
3498 uint32_t const u32GuestBlockX = pBox->srcx / pSurface->cxBlock;
3499 uint32_t const u32GuestBlockY = pBox->srcy / pSurface->cyBlock;
3500 Assert(u32GuestBlockX * pSurface->cxBlock == pBox->srcx);
3501 Assert(u32GuestBlockY * pSurface->cyBlock == pBox->srcy);
3502 uint32_t const cBlocksX = (pBox->w + pSurface->cxBlock - 1) / pSurface->cxBlock;
3503 uint32_t const cBlocksY = (pBox->h + pSurface->cyBlock - 1) / pSurface->cyBlock;
3504 AssertMsgReturn(cBlocksX && cBlocksY, ("Empty box %dx%d\n", pBox->w, pBox->h), VERR_INTERNAL_ERROR);
3505
3506 /* vmsvgaR3GmrTransfer verifies uGuestOffset.
3507 * srcx(u32GuestBlockX) and srcy(u32GuestBlockY) have been verified in vmsvga3dSurfaceDMA
3508 * to not cause 32 bit overflow when multiplied by cbBlock and cbGuestPitch.
3509 */
3510 uint64_t const uGuestOffset = u32GuestBlockX * pSurface->cbBlock + u32GuestBlockY * cbGuestPitch;
3511 AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
3512
3513 SVGA3dSurfaceImageId image;
3514 image.sid = pSurface->id;
3515 image.face = uHostFace;
3516 image.mipmap = uHostMipmap;
3517
3518 SVGA3dBox box;
3519 box.x = pBox->x;
3520 box.y = pBox->y;
3521 box.z = 0;
3522 box.w = pBox->w;
3523 box.h = pBox->h;
3524 box.d = 1;
3525
3526 VMSVGA3D_MAPPED_SURFACE map;
3527 rc = vmsvga3dSurfaceMap(pThisCC, pSurface->idAssociatedContext, &image, &box, VMSVGA3D_SURFACE_MAP_WRITE_DISCARD, &map);
3528 if (RT_SUCCESS(rc))
3529 {
3530 /* Prepare parameters for vmsvgaR3GmrTransfer, which needs the host buffer address, size
3531 * and offset of the first scanline.
3532 */
3533 uint32_t const cbLockedBuf = map.cbRowPitch * cBlocksY;
3534 uint8_t *pu8LockedBuf = (uint8_t *)map.pvData;
3535 uint32_t const offLockedBuf = 0;
3536
3537 rc = vmsvgaR3GmrTransfer(pThis,
3538 pThisCC,
3539 transfer,
3540 pu8LockedBuf,
3541 cbLockedBuf,
3542 offLockedBuf,
3543 map.cbRowPitch,
3544 GuestPtr,
3545 (uint32_t)uGuestOffset,
3546 cbGuestPitch,
3547 cBlocksX * pSurface->cbBlock,
3548 cBlocksY);
3549 AssertRC(rc);
3550
3551 // Log4(("first line:\n%.*Rhxd\n", cBlocksX * pSurface->cbBlock, LockedRect.pBits));
3552
3553 //vmsvga3dMapWriteBmpFile(&map, "Dynamic");
3554
3555 vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ true);
3556 }
3557#if 0
3558//ASMBreakpoint();
3559 rc = vmsvga3dSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
3560 if (RT_SUCCESS(rc))
3561 {
3562 vmsvga3dMapWriteBmpFile(&map, "Staging");
3563
3564 vmsvga3dSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
3565 }
3566#endif
3567 }
3568 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE)
3569 {
3570 /** @todo This is generic code and should be in DevVGA-SVGA3d.cpp for backends which support Map/Unmap. */
3571 AssertReturn(uHostFace == 0 && uHostMipmap == 0, VERR_INVALID_PARAMETER);
3572
3573 uint32_t const u32GuestBlockX = pBox->srcx / pSurface->cxBlock;
3574 uint32_t const u32GuestBlockY = pBox->srcy / pSurface->cyBlock;
3575 Assert(u32GuestBlockX * pSurface->cxBlock == pBox->srcx);
3576 Assert(u32GuestBlockY * pSurface->cyBlock == pBox->srcy);
3577 uint32_t const cBlocksX = (pBox->w + pSurface->cxBlock - 1) / pSurface->cxBlock;
3578 uint32_t const cBlocksY = (pBox->h + pSurface->cyBlock - 1) / pSurface->cyBlock;
3579 AssertMsgReturn(cBlocksX && cBlocksY, ("Empty box %dx%d\n", pBox->w, pBox->h), VERR_INTERNAL_ERROR);
3580
3581 /* vmsvgaR3GmrTransfer verifies uGuestOffset.
3582 * srcx(u32GuestBlockX) and srcy(u32GuestBlockY) have been verified in vmsvga3dSurfaceDMA
3583 * to not cause 32 bit overflow when multiplied by cbBlock and cbGuestPitch.
3584 */
3585 uint64_t const uGuestOffset = u32GuestBlockX * pSurface->cbBlock + u32GuestBlockY * cbGuestPitch;
3586 AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
3587
3588 SVGA3dSurfaceImageId image;
3589 image.sid = pSurface->id;
3590 image.face = uHostFace;
3591 image.mipmap = uHostMipmap;
3592
3593 SVGA3dBox box;
3594 box.x = pBox->x;
3595 box.y = pBox->y;
3596 box.z = 0;
3597 box.w = pBox->w;
3598 box.h = pBox->h;
3599 box.d = 1;
3600
3601 VMSVGA3D_SURFACE_MAP const enmMap = transfer == SVGA3D_WRITE_HOST_VRAM
3602 ? VMSVGA3D_SURFACE_MAP_WRITE_DISCARD
3603 : VMSVGA3D_SURFACE_MAP_READ;
3604
3605 VMSVGA3D_MAPPED_SURFACE map;
3606 rc = vmsvga3dSurfaceMap(pThisCC, pSurface->idAssociatedContext, &image, &box, enmMap, &map);
3607 if (RT_SUCCESS(rc))
3608 {
3609 /* Prepare parameters for vmsvgaR3GmrTransfer, which needs the host buffer address, size
3610 * and offset of the first scanline.
3611 */
3612 uint32_t const cbLockedBuf = map.cbRowPitch * cBlocksY;
3613 uint8_t *pu8LockedBuf = (uint8_t *)map.pvData;
3614 uint32_t const offLockedBuf = 0;
3615
3616 rc = vmsvgaR3GmrTransfer(pThis,
3617 pThisCC,
3618 transfer,
3619 pu8LockedBuf,
3620 cbLockedBuf,
3621 offLockedBuf,
3622 map.cbRowPitch,
3623 GuestPtr,
3624 (uint32_t)uGuestOffset,
3625 cbGuestPitch,
3626 cBlocksX * pSurface->cbBlock,
3627 cBlocksY);
3628 AssertRC(rc);
3629
3630 bool const fWritten = (transfer == SVGA3D_WRITE_HOST_VRAM);
3631 vmsvga3dSurfaceUnmap(pThisCC, &image, &map, fWritten);
3632 }
3633 }
3634 else
3635 {
3636 AssertMsgFailed(("Unsupported surface type %d\n", pBackendSurface->enmResType));
3637 rc = VERR_NOT_IMPLEMENTED;
3638 }
3639
3640 return rc;
3641}
3642
3643
3644/**
3645 * Create D3D/OpenGL texture object for the specified surface.
3646 *
3647 * Surfaces are created when needed.
3648 *
3649 * @param pThisCC The device context.
3650 * @param pContext The context.
3651 * @param idAssociatedContext Probably the same as pContext->id.
3652 * @param pSurface The surface to create the texture for.
3653 */
3654static DECLCALLBACK(int) vmsvga3dBackCreateTexture(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext, uint32_t idAssociatedContext,
3655 PVMSVGA3DSURFACE pSurface)
3656
3657{
3658 RT_NOREF(pThisCC, pContext, idAssociatedContext, pSurface);
3659
3660 AssertFailed();
3661 return VINF_SUCCESS;
3662}
3663
3664
3665static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryCreate(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
3666{
3667 RT_NOREF(pThisCC, pContext);
3668 AssertFailed();
3669 return VINF_SUCCESS;
3670}
3671
3672
3673static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryBegin(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
3674{
3675 RT_NOREF(pThisCC, pContext);
3676 AssertFailed();
3677 return VINF_SUCCESS;
3678}
3679
3680
3681static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryEnd(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
3682{
3683 RT_NOREF(pThisCC, pContext);
3684 AssertFailed();
3685 return VINF_SUCCESS;
3686}
3687
3688
3689static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryGetData(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext, uint32_t *pu32Pixels)
3690{
3691 RT_NOREF(pThisCC, pContext);
3692 *pu32Pixels = 0;
3693 AssertFailed();
3694 return VINF_SUCCESS;
3695}
3696
3697
3698static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryDelete(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
3699{
3700 RT_NOREF(pThisCC, pContext);
3701 AssertFailed();
3702 return VINF_SUCCESS;
3703}
3704
3705
3706/*
3707 * DX callbacks.
3708 */
3709
3710static DECLCALLBACK(int) vmsvga3dBackDXDefineContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3711{
3712 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3713
3714 /* Allocate a backend specific context structure. */
3715 PVMSVGA3DBACKENDDXCONTEXT pBackendDXContext = (PVMSVGA3DBACKENDDXCONTEXT)RTMemAllocZ(sizeof(VMSVGA3DBACKENDDXCONTEXT));
3716 AssertPtrReturn(pBackendDXContext, VERR_NO_MEMORY);
3717 pDXContext->pBackendDXContext = pBackendDXContext;
3718
3719 int rc = dxDeviceCreate(pBackend, &pBackendDXContext->device);
3720 return rc;
3721}
3722
3723
3724static DECLCALLBACK(int) vmsvga3dBackDXDestroyContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3725{
3726 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3727
3728 if (pDXContext->pBackendDXContext)
3729 {
3730 dxDeviceDestroy(pBackend, &pDXContext->pBackendDXContext->device);
3731
3732 RTMemFree(pDXContext->pBackendDXContext);
3733 pDXContext->pBackendDXContext = NULL;
3734 }
3735 return VINF_SUCCESS;
3736}
3737
3738
3739static DECLCALLBACK(int) vmsvga3dBackDXBindContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3740{
3741 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3742 RT_NOREF(pBackend, pDXContext);
3743 return VINF_SUCCESS;
3744}
3745
3746
3747static DECLCALLBACK(int) vmsvga3dBackDXReadbackContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3748{
3749 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3750
3751 RT_NOREF(pBackend, pDXContext);
3752 AssertFailed(); /** @todo Implement */
3753 return VERR_NOT_IMPLEMENTED;
3754}
3755
3756
3757static DECLCALLBACK(int) vmsvga3dBackDXInvalidateContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
3758{
3759 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3760
3761 RT_NOREF(pBackend, pDXContext);
3762 AssertFailed(); /** @todo Implement */
3763 return VERR_NOT_IMPLEMENTED;
3764}
3765
3766
3767static DECLCALLBACK(int) vmsvga3dBackDXSetSingleConstantBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t slot, SVGA3dShaderType type, SVGA3dSurfaceId sid, uint32_t offsetInBytes, uint32_t sizeInBytes)
3768{
3769 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3770 RT_NOREF(pBackend);
3771
3772 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3773 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3774
3775 if (sid == SVGA_ID_INVALID)
3776 {
3777 dxConstantBufferSet(pDevice, slot, type, NULL);
3778 return VINF_SUCCESS;
3779 }
3780
3781 PVMSVGA3DSURFACE pSurface;
3782 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
3783 AssertRCReturn(rc, rc);
3784
3785 uint32_t const cbSurface = pSurface->paMipmapLevels[0].cbSurface;
3786 ASSERT_GUEST_RETURN( offsetInBytes < cbSurface
3787 && sizeInBytes <= cbSurface - offsetInBytes, VERR_INVALID_PARAMETER);
3788
3789 if (pSurface->pBackendSurface == NULL)
3790 {
3791 /* Create the resource. */
3792 rc = vmsvga3dBackSurfaceCreateConstantBuffer(pThisCC, pDXContext, pSurface);
3793 AssertRCReturn(rc, rc);
3794 }
3795
3796 if (pSurface->fDirty)
3797 {
3798 /* Get mobid for the surface and read from the MOB. */
3799 SVGA3dSurfaceImageId imageId;
3800 imageId.sid = sid;
3801 imageId.face = 0;
3802 imageId.mipmap = 0;
3803
3804 SVGA3dPoint ptSrc;
3805 ptSrc.x = offsetInBytes / pSurface->cbBlock;
3806 ptSrc.y = 0;
3807 ptSrc.z = 0;
3808
3809 SVGA3dBox boxDst;
3810 boxDst.x = 0;
3811 boxDst.y = 0;
3812 boxDst.z = 0;
3813 boxDst.w = sizeInBytes / pSurface->cbBlock;
3814 boxDst.h = 1;
3815 boxDst.d = 1;
3816
3817 rc = vmsvgaR3UpdateGBSurfaceEx(pThisCC, pDXContext->cid, &imageId, &boxDst, &ptSrc);
3818 AssertRCReturn(rc, rc);
3819 }
3820
3821 dxConstantBufferSet(pDevice, slot, type, pSurface->pBackendSurface->u.Buffer.pBuffer);
3822 return VINF_SUCCESS;
3823}
3824
3825
3826static DECLCALLBACK(int) vmsvga3dBackDXSetShaderResources(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startView, SVGA3dShaderType type, uint32_t cShaderResourceViewId, SVGA3dShaderResourceViewId const *paShaderResourceViewId)
3827{
3828 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3829 RT_NOREF(pBackend);
3830
3831 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3832 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3833
3834 uint32_t const idxShaderState = type - SVGA3D_SHADERTYPE_MIN;
3835 ID3D11ShaderResourceView *papShaderResourceView[SVGA3D_DX_MAX_SRVIEWS];
3836 for (uint32_t i = 0; i < cShaderResourceViewId; ++i)
3837 {
3838 SVGA3dShaderResourceViewId shaderResourceViewId = paShaderResourceViewId[i];
3839 if (shaderResourceViewId != SVGA3D_INVALID_ID)
3840 {
3841 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->pBackendDXContext->cShaderResourceView, VERR_INVALID_PARAMETER);
3842 papShaderResourceView[i] = pDXContext->pBackendDXContext->papShaderResourceView[shaderResourceViewId];
3843 }
3844 else
3845 papShaderResourceView[i] = NULL;
3846
3847 pDXContext->svgaDXContext.shaderState[idxShaderState].shaderResources[startView + i] = shaderResourceViewId;
3848 }
3849
3850 dxShaderResourceViewSet(pDevice, type, startView, cShaderResourceViewId, papShaderResourceView);
3851 return VINF_SUCCESS;
3852}
3853
3854
3855static DECLCALLBACK(int) vmsvga3dBackDXSetShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderType type, PVMSVGA3DSHADER pShader)
3856{
3857 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3858 RT_NOREF(pBackend);
3859
3860 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3861 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3862
3863 DXSHADER *pDXShader;
3864 if (pShader)
3865 {
3866 pDXShader = &pDXContext->pBackendDXContext->paShader[pShader->id];
3867 uint32_t const idxShaderState = pDXShader->enmShaderType - SVGA3D_SHADERTYPE_MIN;
3868 pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId = pShader->id;
3869 }
3870 else
3871 pDXShader = NULL;
3872
3873 dxShaderSet(pDevice, type, pDXShader);
3874 return VINF_SUCCESS;
3875}
3876
3877
3878static DECLCALLBACK(int) vmsvga3dBackDXSetSamplers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startSampler, SVGA3dShaderType type, uint32_t cSamplerId, SVGA3dSamplerId const *paSamplerId)
3879{
3880 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3881 RT_NOREF(pBackend);
3882
3883 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3884 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3885
3886 uint32_t const idxShaderState = type - SVGA3D_SHADERTYPE_MIN;
3887 ID3D11SamplerState *papSamplerState[SVGA3D_DX_MAX_SAMPLERS];
3888 for (uint32_t i = 0; i < cSamplerId; ++i)
3889 {
3890 SVGA3dSamplerId samplerId = paSamplerId[i];
3891 if (samplerId != SVGA3D_INVALID_ID)
3892 {
3893 ASSERT_GUEST_RETURN(samplerId < pDXContext->pBackendDXContext->cSamplerState, VERR_INVALID_PARAMETER);
3894 papSamplerState[i] = pDXContext->pBackendDXContext->papSamplerState[samplerId];
3895 }
3896 else
3897 papSamplerState[i] = NULL;
3898
3899 pDXContext->svgaDXContext.shaderState[idxShaderState].samplers[startSampler + i] = samplerId;
3900 }
3901
3902 dxSamplerSet(pDevice, type, startSampler, cSamplerId, papSamplerState);
3903 return VINF_SUCCESS;
3904}
3905
3906
3907static DECLCALLBACK(int) vmsvga3dBackDXDraw(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t vertexCount, uint32_t startVertexLocation)
3908{
3909 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3910 RT_NOREF(pBackend);
3911
3912 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3913 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3914
3915 if (pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN)
3916 pDevice->pImmediateContext->Draw(vertexCount, startVertexLocation);
3917 else
3918 {
3919 /*
3920 * Emulate SVGA3D_PRIMITIVE_TRIANGLEFAN using an indexed draw of a triangle list.
3921 */
3922
3923 /* Make sure that 16 bit indices are enough. 20000 ~= 65536 / 3 */
3924 AssertReturn(vertexCount <= 20000, VERR_NOT_SUPPORTED);
3925
3926 /* Generate indices. */
3927 UINT const IndexCount = 3 * (vertexCount - 2); /* 3_per_triangle * num_triangles */
3928 UINT const cbAlloc = IndexCount * sizeof(USHORT);
3929 USHORT *paIndices = (USHORT *)RTMemAlloc(cbAlloc);
3930 AssertReturn(paIndices, VERR_NO_MEMORY);
3931 USHORT iVertex = 1;
3932 for (UINT i = 0; i < IndexCount; i+= 3)
3933 {
3934 paIndices[i] = 0;
3935 paIndices[i + 1] = iVertex;
3936 ++iVertex;
3937 paIndices[i + 2] = iVertex;
3938 }
3939
3940 D3D11_SUBRESOURCE_DATA InitData;
3941 InitData.pSysMem = paIndices;
3942 InitData.SysMemPitch = cbAlloc;
3943 InitData.SysMemSlicePitch = cbAlloc;
3944
3945 D3D11_BUFFER_DESC bd;
3946 RT_ZERO(bd);
3947 bd.ByteWidth = cbAlloc;
3948 bd.Usage = D3D11_USAGE_IMMUTABLE;
3949 bd.BindFlags = D3D11_BIND_INDEX_BUFFER;
3950 //bd.CPUAccessFlags = 0;
3951 //bd.MiscFlags = 0;
3952 //bd.StructureByteStride = 0;
3953
3954 ID3D11Buffer *pIndexBuffer = 0;
3955 HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, &InitData, &pIndexBuffer);
3956 Assert(SUCCEEDED(hr));RT_NOREF(hr);
3957
3958 /* Save the current index buffer. */
3959 ID3D11Buffer *pSavedIndexBuffer = 0;
3960 DXGI_FORMAT SavedFormat = DXGI_FORMAT_UNKNOWN;
3961 UINT SavedOffset = 0;
3962 pDevice->pImmediateContext->IAGetIndexBuffer(&pSavedIndexBuffer, &SavedFormat, &SavedOffset);
3963
3964 /* Set up the device state. */
3965 pDevice->pImmediateContext->IASetIndexBuffer(pIndexBuffer, DXGI_FORMAT_R16_UINT, 0);
3966 pDevice->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST);
3967
3968 UINT const StartIndexLocation = 0;
3969 INT const BaseVertexLocation = startVertexLocation;
3970 pDevice->pImmediateContext->DrawIndexed(IndexCount, StartIndexLocation, BaseVertexLocation);
3971
3972 /* Restore the device state. */
3973 pDevice->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP);
3974 pDevice->pImmediateContext->IASetIndexBuffer(pSavedIndexBuffer, SavedFormat, SavedOffset);
3975 D3D_RELEASE(pSavedIndexBuffer);
3976
3977 /* Cleanup. */
3978 D3D_RELEASE(pIndexBuffer);
3979 RTMemFree(paIndices);
3980 }
3981
3982 return VINF_SUCCESS;
3983}
3984
3985
3986static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexed(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t indexCount, uint32_t startIndexLocation, int32_t baseVertexLocation)
3987{
3988 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
3989 RT_NOREF(pBackend);
3990
3991 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3992 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3993
3994 Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
3995
3996 pDevice->pImmediateContext->DrawIndexed(indexCount, startIndexLocation, baseVertexLocation);
3997 return VINF_SUCCESS;
3998}
3999
4000
4001static DECLCALLBACK(int) vmsvga3dBackDXDrawInstanced(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4002{
4003 Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
4004 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4005
4006 RT_NOREF(pBackend, pDXContext);
4007 AssertFailed(); /** @todo Implement */
4008 return VERR_NOT_IMPLEMENTED;
4009}
4010
4011
4012static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexedInstanced(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4013{
4014 Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
4015 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4016
4017 RT_NOREF(pBackend, pDXContext);
4018 AssertFailed(); /** @todo Implement */
4019 return VERR_NOT_IMPLEMENTED;
4020}
4021
4022
4023static DECLCALLBACK(int) vmsvga3dBackDXDrawAuto(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4024{
4025 Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
4026 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4027
4028 RT_NOREF(pBackend, pDXContext);
4029 AssertFailed(); /** @todo Implement */
4030 return VERR_NOT_IMPLEMENTED;
4031}
4032
4033
4034static DECLCALLBACK(int) vmsvga3dBackDXSetInputLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId)
4035{
4036 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4037 RT_NOREF(pBackend);
4038
4039 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4040 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4041
4042 pDXContext->svgaDXContext.inputAssembly.layoutId = elementLayoutId;
4043
4044 DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
4045 if (!pDXElementLayout->pElementLayout)
4046 {
4047 uint32_t const idxShaderState = SVGA3D_SHADERTYPE_VS - SVGA3D_SHADERTYPE_MIN;
4048 uint32_t const shid = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId;
4049 AssertReturnStmt(shid < pDXContext->pBackendDXContext->cShader,
4050 LogRelMax(16, ("VMSVGA: DX shader is not set in DXSetInputLayout: shid = 0x%x\n", shid)),
4051 VERR_INVALID_STATE);
4052 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[shid];
4053 AssertReturnStmt(pDXShader->pvDXBC,
4054 LogRelMax(16, ("VMSVGA: DX shader bytecode is not available in DXSetInputLayout: shid = %u\n", shid)),
4055 VERR_INVALID_STATE);
4056 HRESULT hr = pDevice->pDevice->CreateInputLayout(pDXElementLayout->aElementDesc,
4057 pDXElementLayout->cElementDesc,
4058 pDXShader->pvDXBC,
4059 pDXShader->cbDXBC,
4060 &pDXElementLayout->pElementLayout);
4061 AssertReturn(SUCCEEDED(hr), VERR_NO_MEMORY);
4062 }
4063
4064 pDevice->pImmediateContext->IASetInputLayout(pDXElementLayout->pElementLayout);
4065 return VINF_SUCCESS;
4066}
4067
4068
4069static DECLCALLBACK(int) vmsvga3dBackDXSetVertexBuffers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startBuffer, uint32_t cVertexBuffer, SVGA3dVertexBuffer const *paVertexBuffer)
4070{
4071 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4072 RT_NOREF(pBackend);
4073
4074 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4075 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4076
4077 /* For each paVertexBuffer[i]:
4078 * If the vertex buffer object does not exist then create it.
4079 * If the surface has been updated by the guest then update the buffer object.
4080 * Use IASetVertexBuffers to set the buffers.
4081 */
4082
4083 ID3D11Buffer *paResources[SVGA3D_DX_MAX_VERTEXBUFFERS];
4084 UINT paStride[SVGA3D_DX_MAX_VERTEXBUFFERS];
4085 UINT paOffset[SVGA3D_DX_MAX_VERTEXBUFFERS];
4086
4087 for (uint32_t i = 0; i < cVertexBuffer; ++i)
4088 {
4089 uint32_t const idxVertexBuffer = startBuffer + i;
4090
4091 /* Get corresponding resource. Create the buffer if does not yet exist. */
4092 if (paVertexBuffer[i].sid != SVGA_ID_INVALID)
4093 {
4094 PVMSVGA3DSURFACE pSurface;
4095 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, paVertexBuffer[i].sid, &pSurface);
4096 AssertRCReturn(rc, rc);
4097
4098 if (pSurface->pBackendSurface == NULL)
4099 {
4100 /* Create the resource. */
4101 rc = vmsvga3dBackSurfaceCreateBuffer(pThisCC, pDXContext, pSurface);
4102 AssertRCReturn(rc, rc);
4103 }
4104
4105 if (pSurface->fDirty)
4106 {
4107 /* Get mobid for the surface and read from the MOB. */
4108 SVGA3dSurfaceImageId imageId;
4109 imageId.sid = paVertexBuffer[i].sid;
4110 imageId.face = 0;
4111 imageId.mipmap = 0;
4112
4113 SVGA3dBox box;
4114 box.x = 0;
4115 box.y = 0;
4116 box.z = 0;
4117 box.w = pSurface->paMipmapLevels[0].mipmapSize.width;
4118 box.h = 1;
4119 box.d = 1;
4120
4121 rc = vmsvgaR3UpdateGBSurface(pThisCC, pDXContext->cid, &imageId, &box);
4122 AssertRCReturn(rc, rc);
4123 }
4124
4125 paResources[idxVertexBuffer] = pSurface->pBackendSurface->u.Buffer.pBuffer;
4126 paStride[idxVertexBuffer] = paVertexBuffer[i].stride;
4127 paOffset[idxVertexBuffer] = paVertexBuffer[i].offset;
4128 }
4129 else
4130 {
4131 paResources[idxVertexBuffer] = NULL;
4132 paStride[idxVertexBuffer] = 0;
4133 paOffset[idxVertexBuffer] = 0;
4134 }
4135
4136 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].bufferId = paVertexBuffer[i].sid;
4137 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].stride = paVertexBuffer[i].stride;
4138 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].offset = paVertexBuffer[i].offset;
4139 }
4140
4141 pDevice->pImmediateContext->IASetVertexBuffers(startBuffer, cVertexBuffer, paResources, paStride, paOffset);
4142
4143 return VINF_SUCCESS;
4144}
4145
4146
4147static DECLCALLBACK(int) vmsvga3dBackDXSetIndexBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId sid, SVGA3dSurfaceFormat format, uint32_t offset)
4148{
4149 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4150 RT_NOREF(pBackend);
4151
4152 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4153 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4154
4155 /* Get corresponding resource. Create the buffer if does not yet exist. */
4156 ID3D11Buffer *pResource;
4157 DXGI_FORMAT enmDxgiFormat;
4158
4159 if (sid != SVGA_ID_INVALID)
4160 {
4161 PVMSVGA3DSURFACE pSurface;
4162 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
4163 AssertRCReturn(rc, rc);
4164
4165 if (pSurface->pBackendSurface == NULL)
4166 {
4167 /* Create the resource. */
4168 rc = vmsvga3dBackSurfaceCreateBuffer(pThisCC, pDXContext, pSurface);
4169 AssertRCReturn(rc, rc);
4170 }
4171
4172 if (pSurface->fDirty)
4173 {
4174 /* Get mobid for the surface and read from the MOB. */
4175 SVGA3dSurfaceImageId imageId;
4176 imageId.sid = sid;
4177 imageId.face = 0;
4178 imageId.mipmap = 0;
4179
4180 SVGA3dBox box;
4181 box.x = 0;
4182 box.y = 0;
4183 box.z = 0;
4184 box.w = pSurface->paMipmapLevels[0].mipmapSize.width;
4185 box.h = 1;
4186 box.d = 1;
4187
4188 rc = vmsvgaR3UpdateGBSurface(pThisCC, pDXContext->cid, &imageId, &box);
4189 AssertRCReturn(rc, rc);
4190 }
4191
4192 pResource = pSurface->pBackendSurface->u.Buffer.pBuffer;
4193 enmDxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(format);
4194 AssertReturn(enmDxgiFormat == DXGI_FORMAT_R16_UINT || enmDxgiFormat == DXGI_FORMAT_R32_UINT, VERR_INVALID_PARAMETER);
4195 }
4196 else
4197 {
4198 pResource = NULL;
4199 enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
4200 }
4201
4202 pDevice->pImmediateContext->IASetIndexBuffer(pResource, enmDxgiFormat, offset);
4203 return VINF_SUCCESS;
4204}
4205
4206static D3D11_PRIMITIVE_TOPOLOGY dxTopology(SVGA3dPrimitiveType primitiveType)
4207{
4208 static D3D11_PRIMITIVE_TOPOLOGY const aD3D11PrimitiveTopology[SVGA3D_PRIMITIVE_MAX] =
4209 {
4210 D3D11_PRIMITIVE_TOPOLOGY_UNDEFINED,
4211 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST,
4212 D3D11_PRIMITIVE_TOPOLOGY_POINTLIST,
4213 D3D11_PRIMITIVE_TOPOLOGY_LINELIST,
4214 D3D11_PRIMITIVE_TOPOLOGY_LINESTRIP,
4215 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP,
4216 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP, /* SVGA3D_PRIMITIVE_TRIANGLEFAN: No FAN in D3D11. */
4217 D3D11_PRIMITIVE_TOPOLOGY_LINELIST_ADJ,
4218 D3D11_PRIMITIVE_TOPOLOGY_LINESTRIP_ADJ,
4219 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST_ADJ,
4220 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP_ADJ,
4221 D3D11_PRIMITIVE_TOPOLOGY_1_CONTROL_POINT_PATCHLIST,
4222 D3D11_PRIMITIVE_TOPOLOGY_2_CONTROL_POINT_PATCHLIST,
4223 D3D11_PRIMITIVE_TOPOLOGY_3_CONTROL_POINT_PATCHLIST,
4224 D3D11_PRIMITIVE_TOPOLOGY_4_CONTROL_POINT_PATCHLIST,
4225 D3D11_PRIMITIVE_TOPOLOGY_5_CONTROL_POINT_PATCHLIST,
4226 D3D11_PRIMITIVE_TOPOLOGY_6_CONTROL_POINT_PATCHLIST,
4227 D3D11_PRIMITIVE_TOPOLOGY_7_CONTROL_POINT_PATCHLIST,
4228 D3D11_PRIMITIVE_TOPOLOGY_8_CONTROL_POINT_PATCHLIST,
4229 D3D11_PRIMITIVE_TOPOLOGY_9_CONTROL_POINT_PATCHLIST,
4230 D3D11_PRIMITIVE_TOPOLOGY_10_CONTROL_POINT_PATCHLIST,
4231 D3D11_PRIMITIVE_TOPOLOGY_11_CONTROL_POINT_PATCHLIST,
4232 D3D11_PRIMITIVE_TOPOLOGY_12_CONTROL_POINT_PATCHLIST,
4233 D3D11_PRIMITIVE_TOPOLOGY_13_CONTROL_POINT_PATCHLIST,
4234 D3D11_PRIMITIVE_TOPOLOGY_14_CONTROL_POINT_PATCHLIST,
4235 D3D11_PRIMITIVE_TOPOLOGY_15_CONTROL_POINT_PATCHLIST,
4236 D3D11_PRIMITIVE_TOPOLOGY_16_CONTROL_POINT_PATCHLIST,
4237 D3D11_PRIMITIVE_TOPOLOGY_17_CONTROL_POINT_PATCHLIST,
4238 D3D11_PRIMITIVE_TOPOLOGY_18_CONTROL_POINT_PATCHLIST,
4239 D3D11_PRIMITIVE_TOPOLOGY_19_CONTROL_POINT_PATCHLIST,
4240 D3D11_PRIMITIVE_TOPOLOGY_20_CONTROL_POINT_PATCHLIST,
4241 D3D11_PRIMITIVE_TOPOLOGY_21_CONTROL_POINT_PATCHLIST,
4242 D3D11_PRIMITIVE_TOPOLOGY_22_CONTROL_POINT_PATCHLIST,
4243 D3D11_PRIMITIVE_TOPOLOGY_23_CONTROL_POINT_PATCHLIST,
4244 D3D11_PRIMITIVE_TOPOLOGY_24_CONTROL_POINT_PATCHLIST,
4245 D3D11_PRIMITIVE_TOPOLOGY_25_CONTROL_POINT_PATCHLIST,
4246 D3D11_PRIMITIVE_TOPOLOGY_26_CONTROL_POINT_PATCHLIST,
4247 D3D11_PRIMITIVE_TOPOLOGY_27_CONTROL_POINT_PATCHLIST,
4248 D3D11_PRIMITIVE_TOPOLOGY_28_CONTROL_POINT_PATCHLIST,
4249 D3D11_PRIMITIVE_TOPOLOGY_29_CONTROL_POINT_PATCHLIST,
4250 D3D11_PRIMITIVE_TOPOLOGY_30_CONTROL_POINT_PATCHLIST,
4251 D3D11_PRIMITIVE_TOPOLOGY_31_CONTROL_POINT_PATCHLIST,
4252 D3D11_PRIMITIVE_TOPOLOGY_32_CONTROL_POINT_PATCHLIST,
4253 };
4254 return aD3D11PrimitiveTopology[primitiveType];
4255}
4256
4257static DECLCALLBACK(int) vmsvga3dBackDXSetTopology(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dPrimitiveType topology)
4258{
4259 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4260 RT_NOREF(pBackend);
4261
4262 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4263 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4264
4265 D3D11_PRIMITIVE_TOPOLOGY const enmTopology = dxTopology(topology);
4266 pDevice->pImmediateContext->IASetPrimitiveTopology(enmTopology);
4267 return VINF_SUCCESS;
4268}
4269
4270
4271static DECLCALLBACK(int) vmsvga3dBackDXSetRenderTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, uint32_t cRenderTargetViewId, SVGA3dRenderTargetViewId const *paRenderTargetViewId)
4272{
4273 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4274 RT_NOREF(pBackend);
4275
4276 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4277 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4278
4279 ID3D11RenderTargetView *papRenderTargetViews[SVGA3D_MAX_RENDER_TARGETS];
4280 for (uint32_t i = 0; i < cRenderTargetViewId; ++i)
4281 {
4282 SVGA3dRenderTargetViewId const renderTargetViewId = paRenderTargetViewId[i];
4283 if (renderTargetViewId != SVGA3D_INVALID_ID)
4284 {
4285 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->pBackendDXContext->cRenderTargetView, VERR_INVALID_PARAMETER);
4286 papRenderTargetViews[i] = pDXContext->pBackendDXContext->papRenderTargetView[renderTargetViewId];
4287 }
4288 else
4289 papRenderTargetViews[i] = NULL;
4290 }
4291
4292 ID3D11DepthStencilView *pDepthStencilView;
4293 if (depthStencilViewId != SVGA_ID_INVALID)
4294 pDepthStencilView = pDXContext->pBackendDXContext->papDepthStencilView[depthStencilViewId];
4295 else
4296 pDepthStencilView = NULL;
4297
4298 pDevice->pImmediateContext->OMSetRenderTargets(cRenderTargetViewId, papRenderTargetViews, pDepthStencilView);
4299 return VINF_SUCCESS;
4300}
4301
4302
4303static DECLCALLBACK(int) vmsvga3dBackDXSetBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dBlendStateId blendId, float const blendFactor[4], uint32_t sampleMask)
4304{
4305 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4306 RT_NOREF(pBackend);
4307
4308 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4309 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4310
4311 ID3D11BlendState *pBlendState = pDXContext->pBackendDXContext->papBlendState[blendId];
4312 pDevice->pImmediateContext->OMSetBlendState(pBlendState, blendFactor, sampleMask);
4313
4314 pDXContext->svgaDXContext.renderState.blendStateId = blendId;
4315 memcpy(pDXContext->svgaDXContext.renderState.blendFactor, blendFactor, sizeof(blendFactor));
4316 pDXContext->svgaDXContext.renderState.sampleMask = sampleMask;
4317
4318 return VINF_SUCCESS;
4319}
4320
4321
4322static DECLCALLBACK(int) vmsvga3dBackDXSetDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, uint32_t stencilRef)
4323{
4324 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4325 RT_NOREF(pBackend);
4326
4327 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4328 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4329
4330 ID3D11DepthStencilState *pDepthStencilState = pDXContext->pBackendDXContext->papDepthStencilState[depthStencilId];
4331 pDevice->pImmediateContext->OMSetDepthStencilState(pDepthStencilState, stencilRef);
4332
4333 pDXContext->svgaDXContext.renderState.depthStencilStateId = depthStencilId;
4334 pDXContext->svgaDXContext.renderState.stencilRef = stencilRef;
4335
4336 return VINF_SUCCESS;
4337}
4338
4339
4340static DECLCALLBACK(int) vmsvga3dBackDXSetRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId)
4341{
4342 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4343 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4344 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4345
4346 RT_NOREF(pBackend);
4347
4348 pDevice->pImmediateContext->RSSetState(pDXContext->pBackendDXContext->papRasterizerState[rasterizerId]);
4349 return VINF_SUCCESS;
4350}
4351
4352
4353static DECLCALLBACK(int) vmsvga3dBackDXDefineQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4354{
4355 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4356
4357 RT_NOREF(pBackend, pDXContext);
4358 AssertFailed(); /** @todo Implement */
4359 return VERR_NOT_IMPLEMENTED;
4360}
4361
4362
4363static DECLCALLBACK(int) vmsvga3dBackDXDestroyQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4364{
4365 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4366
4367 RT_NOREF(pBackend, pDXContext);
4368 AssertFailed(); /** @todo Implement */
4369 return VERR_NOT_IMPLEMENTED;
4370}
4371
4372
4373static DECLCALLBACK(int) vmsvga3dBackDXBindQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4374{
4375 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4376
4377 RT_NOREF(pBackend, pDXContext);
4378 AssertFailed(); /** @todo Implement */
4379 return VERR_NOT_IMPLEMENTED;
4380}
4381
4382
4383static DECLCALLBACK(int) vmsvga3dBackDXSetQueryOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4384{
4385 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4386
4387 RT_NOREF(pBackend, pDXContext);
4388 AssertFailed(); /** @todo Implement */
4389 return VERR_NOT_IMPLEMENTED;
4390}
4391
4392
4393static DECLCALLBACK(int) vmsvga3dBackDXBeginQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4394{
4395 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4396
4397 RT_NOREF(pBackend, pDXContext);
4398 AssertFailed(); /** @todo Implement */
4399 return VERR_NOT_IMPLEMENTED;
4400}
4401
4402
4403static DECLCALLBACK(int) vmsvga3dBackDXEndQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4404{
4405 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4406
4407 RT_NOREF(pBackend, pDXContext);
4408 AssertFailed(); /** @todo Implement */
4409 return VERR_NOT_IMPLEMENTED;
4410}
4411
4412
4413static DECLCALLBACK(int) vmsvga3dBackDXReadbackQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4414{
4415 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4416
4417 RT_NOREF(pBackend, pDXContext);
4418 AssertFailed(); /** @todo Implement */
4419 return VERR_NOT_IMPLEMENTED;
4420}
4421
4422
4423static DECLCALLBACK(int) vmsvga3dBackDXSetPredication(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4424{
4425 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4426
4427 RT_NOREF(pBackend, pDXContext);
4428 AssertFailed(); /** @todo Implement */
4429 return VERR_NOT_IMPLEMENTED;
4430}
4431
4432
4433static DECLCALLBACK(int) vmsvga3dBackDXSetSOTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4434{
4435 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4436
4437 RT_NOREF(pBackend, pDXContext);
4438 AssertFailed(); /** @todo Implement */
4439 return VERR_NOT_IMPLEMENTED;
4440}
4441
4442
4443static DECLCALLBACK(int) vmsvga3dBackDXSetViewports(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t cViewport, SVGA3dViewport const *paViewport)
4444{
4445 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4446 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4447 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4448
4449 RT_NOREF(pBackend);
4450
4451 /* D3D11_VIEWPORT is identical to SVGA3dViewport. */
4452 D3D11_VIEWPORT *pViewports = (D3D11_VIEWPORT *)paViewport;
4453
4454 pDevice->pImmediateContext->RSSetViewports(cViewport, pViewports);
4455 return VINF_SUCCESS;
4456}
4457
4458
4459static DECLCALLBACK(int) vmsvga3dBackDXSetScissorRects(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t cRect, SVGASignedRect const *paRect)
4460{
4461 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4462 RT_NOREF(pBackend);
4463
4464 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4465 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4466
4467 /* D3D11_RECT is identical to SVGASignedRect. */
4468 D3D11_RECT *pRects = (D3D11_RECT *)paRect;
4469
4470 pDevice->pImmediateContext->RSSetScissorRects(cRect, pRects);
4471 return VINF_SUCCESS;
4472}
4473
4474
4475static DECLCALLBACK(int) vmsvga3dBackDXClearRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGA3dRGBAFloat const *pRGBA)
4476{
4477 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4478 RT_NOREF(pBackend);
4479
4480 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4481 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4482
4483 ID3D11RenderTargetView *pRenderTargetView = pDXContext->pBackendDXContext->papRenderTargetView[renderTargetViewId];
4484 AssertReturn(pRenderTargetView, VERR_INVALID_STATE);
4485 pDevice->pImmediateContext->ClearRenderTargetView(pRenderTargetView, pRGBA->value);
4486 return VINF_SUCCESS;
4487}
4488
4489
4490static DECLCALLBACK(int) vmsvga3dBackDXClearDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t flags, SVGA3dDepthStencilViewId depthStencilViewId, float depth, uint8_t stencil)
4491{
4492 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4493 RT_NOREF(pBackend);
4494
4495 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4496 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4497
4498 ID3D11DepthStencilView *pDepthStencilView = pDXContext->pBackendDXContext->papDepthStencilView[depthStencilViewId];
4499 AssertReturn(pDepthStencilView, VERR_INVALID_STATE);
4500 pDevice->pImmediateContext->ClearDepthStencilView(pDepthStencilView, flags, depth, stencil);
4501 return VINF_SUCCESS;
4502}
4503
4504
4505static DECLCALLBACK(int) vmsvga3dBackDXPredCopyRegion(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId dstSid, uint32_t dstSubResource, SVGA3dSurfaceId srcSid, uint32_t srcSubResource, SVGA3dCopyBox const *pBox)
4506{
4507 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4508 RT_NOREF(pBackend);
4509
4510 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4511 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4512
4513 PVMSVGA3DSURFACE pSrcSurface;
4514 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, srcSid, &pSrcSurface);
4515 AssertRCReturn(rc, rc);
4516
4517 PVMSVGA3DSURFACE pDstSurface;
4518 rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, dstSid, &pDstSurface);
4519 AssertRCReturn(rc, rc);
4520
4521 if (pSrcSurface->pBackendSurface == NULL)
4522 {
4523 /* Create the resource. */
4524 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pSrcSurface);
4525 AssertRCReturn(rc, rc);
4526 }
4527
4528 if (pDstSurface->pBackendSurface == NULL)
4529 {
4530 /* Create the resource. */
4531 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pDstSurface);
4532 AssertRCReturn(rc, rc);
4533 }
4534
4535 LogFunc(("cid %d: src cid %d%s -> dst cid %d%s\n",
4536 pDXContext->cid, pSrcSurface->idAssociatedContext,
4537 (pSrcSurface->surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : "",
4538 pDstSurface->idAssociatedContext,
4539 (pDstSurface->surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : ""));
4540
4541 UINT DstSubresource = dstSubResource;
4542 UINT DstX = pBox->x;
4543 UINT DstY = pBox->y;
4544 UINT DstZ = pBox->z;
4545
4546 UINT SrcSubresource = srcSubResource;
4547 D3D11_BOX SrcBox;
4548 SrcBox.left = pBox->x;
4549 SrcBox.top = pBox->y;
4550 SrcBox.front = pBox->z;
4551 SrcBox.right = pBox->x + pBox->w;
4552 SrcBox.bottom = pBox->y + pBox->h;
4553 SrcBox.back = pBox->z + pBox->d;
4554
4555 ID3D11Resource *pDstResource;
4556 ID3D11Resource *pSrcResource;
4557
4558 if (pDstSurface->idAssociatedContext == pSrcSurface->idAssociatedContext)
4559 {
4560 /* Use the context which created the surfaces. */
4561 if (pSrcSurface->idAssociatedContext != SVGA_ID_INVALID)
4562 {
4563 /* One of DXContexts has created the resources. */
4564 if (pDXContext->cid != pSrcSurface->idAssociatedContext)
4565 {
4566 /** @todo test */
4567 /* Get the context which has created the surfaces. */
4568 rc = vmsvga3dDXContextFromCid(pThisCC->svga.p3dState, pSrcSurface->idAssociatedContext, &pDXContext);
4569 AssertRCReturn(rc, rc);
4570
4571 pDevice = &pDXContext->pBackendDXContext->device;
4572 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4573 }
4574
4575 pDstResource = dxResource(pDstSurface, pDXContext);
4576 pSrcResource = dxResource(pSrcSurface, pDXContext);
4577 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
4578 pSrcResource, SrcSubresource, &SrcBox);
4579 }
4580 else
4581 {
4582 /* Backend context has created the resources. */
4583 pDstResource = pDstSurface->pBackendSurface->u.Resource.pResource;
4584 pSrcResource = pSrcSurface->pBackendSurface->u.Resource.pResource;
4585 pBackend->device.pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
4586 pSrcResource, SrcSubresource, &SrcBox);
4587 }
4588 }
4589 else
4590 {
4591 /* Different contexts. */
4592
4593 /* One of the surfaces must be shared. */
4594 AssertReturn( pSrcSurface->idAssociatedContext == SVGA_ID_INVALID
4595 || pDstSurface->idAssociatedContext == SVGA_ID_INVALID, VERR_NOT_SUPPORTED);
4596
4597 /* Use a context which created the not shared resource to do the copy. */
4598 if (pSrcSurface->idAssociatedContext == SVGA_ID_INVALID)
4599 {
4600 if (pDXContext->cid != pDstSurface->idAssociatedContext)
4601 {
4602 /* Get the context which has created the destination resource. */
4603 rc = vmsvga3dDXContextFromCid(pThisCC->svga.p3dState, pDstSurface->idAssociatedContext, &pDXContext);
4604 AssertRCReturn(rc, rc);
4605
4606 pDevice = &pDXContext->pBackendDXContext->device;
4607 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4608 }
4609
4610 pDstResource = dxResource(pDstSurface, pDXContext);
4611 pSrcResource = dxResource(pSrcSurface, pDXContext);
4612 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
4613 pSrcResource, SrcSubresource, &SrcBox);
4614 }
4615 else if (pDstSurface->idAssociatedContext == SVGA_ID_INVALID)
4616 {
4617 if (pDXContext->cid != pSrcSurface->idAssociatedContext)
4618 {
4619 /* Get the context which has created the source surface. */
4620 rc = vmsvga3dDXContextFromCid(pThisCC->svga.p3dState, pSrcSurface->idAssociatedContext, &pDXContext);
4621 AssertRCReturn(rc, rc);
4622
4623 pDevice = &pDXContext->pBackendDXContext->device;
4624 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4625 }
4626
4627 pDstResource = dxResource(pDstSurface, pDXContext);
4628 pSrcResource = dxResource(pSrcSurface, pDXContext);
4629 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
4630 pSrcResource, SrcSubresource, &SrcBox);
4631 }
4632 else
4633 {
4634 AssertFailedReturn(VERR_NOT_SUPPORTED);
4635 }
4636 }
4637 return VINF_SUCCESS;
4638}
4639
4640
4641static DECLCALLBACK(int) vmsvga3dBackDXPredCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4642{
4643 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4644
4645 RT_NOREF(pBackend, pDXContext);
4646 AssertFailed(); /** @todo Implement */
4647 return VERR_NOT_IMPLEMENTED;
4648}
4649
4650
4651static DECLCALLBACK(int) vmsvga3dBackDXPresentBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4652{
4653 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4654
4655 RT_NOREF(pBackend, pDXContext);
4656 AssertFailed(); /** @todo Implement */
4657 return VERR_NOT_IMPLEMENTED;
4658}
4659
4660
4661static DECLCALLBACK(int) vmsvga3dBackDXGenMips(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId)
4662{
4663 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4664 RT_NOREF(pBackend);
4665
4666 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4667 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4668
4669 ID3D11ShaderResourceView *pShaderResourceView = pDXContext->pBackendDXContext->papShaderResourceView[shaderResourceViewId];
4670 AssertReturn(pShaderResourceView, VERR_INVALID_STATE);
4671 pDevice->pImmediateContext->GenerateMips(pShaderResourceView);
4672 return VINF_SUCCESS;
4673}
4674
4675
4676static DECLCALLBACK(int) vmsvga3dBackDXUpdateSubResource(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4677{
4678 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4679
4680 RT_NOREF(pBackend, pDXContext);
4681 AssertFailed(); /** @todo Implement */
4682 return VERR_NOT_IMPLEMENTED;
4683}
4684
4685
4686static DECLCALLBACK(int) vmsvga3dBackDXReadbackSubResource(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4687{
4688 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4689
4690 RT_NOREF(pBackend, pDXContext);
4691 AssertFailed(); /** @todo Implement */
4692 return VERR_NOT_IMPLEMENTED;
4693}
4694
4695
4696static DECLCALLBACK(int) vmsvga3dBackDXInvalidateSubResource(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4697{
4698 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4699
4700 RT_NOREF(pBackend, pDXContext);
4701 AssertFailed(); /** @todo Implement */
4702 return VERR_NOT_IMPLEMENTED;
4703}
4704
4705
4706static DECLCALLBACK(int) vmsvga3dBackDXDefineShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId, SVGACOTableDXSRViewEntry const *pEntry)
4707{
4708 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4709 RT_NOREF(pBackend);
4710
4711 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4712 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4713
4714 /* Get corresponding resource for pEntry->sid. Create the surface if does not yet exist. */
4715 PVMSVGA3DSURFACE pSurface;
4716 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pEntry->sid, &pSurface);
4717 AssertRCReturn(rc, rc);
4718
4719 if (pSurface->pBackendSurface == NULL)
4720 {
4721 /* Create the actual texture. */
4722 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pSurface);
4723 AssertRCReturn(rc, rc);
4724 }
4725
4726 HRESULT hr = dxShaderResourceViewCreate(pDXContext, pEntry, pSurface, &pDXContext->pBackendDXContext->papShaderResourceView[shaderResourceViewId]);
4727 if (SUCCEEDED(hr))
4728 return VINF_SUCCESS;
4729 return VERR_INVALID_STATE;
4730}
4731
4732
4733static DECLCALLBACK(int) vmsvga3dBackDXDestroyShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId)
4734{
4735 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4736 RT_NOREF(pBackend);
4737
4738 D3D_RELEASE(pDXContext->pBackendDXContext->papShaderResourceView[shaderResourceViewId]);
4739 return VINF_SUCCESS;
4740}
4741
4742
4743static DECLCALLBACK(int) vmsvga3dBackDXDefineRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGACOTableDXRTViewEntry const *pEntry)
4744{
4745 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4746 RT_NOREF(pBackend);
4747
4748 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4749 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4750
4751 /* Get corresponding resource for pEntry->sid. Create the surface if does not yet exist. */
4752 PVMSVGA3DSURFACE pSurface;
4753 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pEntry->sid, &pSurface);
4754 AssertRCReturn(rc, rc);
4755
4756 if (pSurface->pBackendSurface == NULL)
4757 {
4758 /* Create the actual texture. */
4759 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pSurface);
4760 AssertRCReturn(rc, rc);
4761 }
4762
4763 HRESULT hr = dxRenderTargetViewCreate(pDXContext, pEntry, pSurface, &pDXContext->pBackendDXContext->papRenderTargetView[renderTargetViewId]);
4764 if (SUCCEEDED(hr))
4765 return VINF_SUCCESS;
4766 return VERR_INVALID_STATE;
4767}
4768
4769
4770static DECLCALLBACK(int) vmsvga3dBackDXDestroyRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId)
4771{
4772 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4773 RT_NOREF(pBackend);
4774
4775 D3D_RELEASE(pDXContext->pBackendDXContext->papRenderTargetView[renderTargetViewId]);
4776 return VINF_SUCCESS;
4777}
4778
4779
4780static DECLCALLBACK(int) vmsvga3dBackDXDefineDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, SVGACOTableDXDSViewEntry const *pEntry)
4781{
4782 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4783 RT_NOREF(pBackend);
4784
4785 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4786 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4787
4788 /* Get corresponding resource for pEntry->sid. Create the surface if does not yet exist. */
4789 PVMSVGA3DSURFACE pSurface;
4790 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pEntry->sid, &pSurface);
4791 AssertRCReturn(rc, rc);
4792
4793 if (pSurface->pBackendSurface == NULL)
4794 {
4795 /* Create the actual texture. */
4796 rc = vmsvga3dBackSurfaceCreateDepthStencilTexture(pThisCC, pDXContext, pSurface);
4797 AssertRCReturn(rc, rc);
4798 }
4799
4800 HRESULT hr = dxDepthStencilViewCreate(pDevice, pEntry, pSurface->pBackendSurface, &pDXContext->pBackendDXContext->papDepthStencilView[depthStencilViewId]);
4801 if (SUCCEEDED(hr))
4802 return VINF_SUCCESS;
4803 return VERR_INVALID_STATE;
4804}
4805
4806
4807static DECLCALLBACK(int) vmsvga3dBackDXDestroyDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId)
4808{
4809 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4810 RT_NOREF(pBackend);
4811
4812 D3D_RELEASE(pDXContext->pBackendDXContext->papDepthStencilView[depthStencilViewId]);
4813 return VINF_SUCCESS;
4814}
4815
4816
4817static DECLCALLBACK(int) vmsvga3dBackDXDefineElementLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId, SVGACOTableDXElementLayoutEntry const *pEntry)
4818{
4819 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4820 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4821 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4822
4823 RT_NOREF(pBackend, elementLayoutId, pEntry);
4824
4825 /* Not much can be done here because ID3D11Device::CreateInputLayout requires
4826 * a pShaderBytecodeWithInputSignature which is not known at this moment.
4827 * InputLayout object will be created in SVGA_3D_CMD_DX_SET_INPUT_LAYOUT.
4828 */
4829
4830 DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[pEntry->elid];
4831 D3D_RELEASE(pDXElementLayout->pElementLayout);
4832
4833 /* Semantic name is not interpreted by D3D, therefore arbitrary names can be used
4834 * if they are consistent between the element layout and shader input signature.
4835 * "In general, data passed between pipeline stages is completely generic and is not uniquely
4836 * interpreted by the system; arbitrary semantics are allowed ..."
4837 *
4838 * However D3D runtime insists that "SemanticName string ("POSITIO1") cannot end with a number."
4839 *
4840 * System-Value semantics ("SV_*") between shaders require proper names of course.
4841 * But they are irrelevant for input attributes.
4842 */
4843 pDXElementLayout->cElementDesc = pEntry->numDescs;
4844 for (uint32_t i = 0; i < pEntry->numDescs; ++i)
4845 {
4846 D3D11_INPUT_ELEMENT_DESC *pDst = &pDXElementLayout->aElementDesc[i];
4847 SVGA3dInputElementDesc const *pSrc = &pEntry->descs[i];
4848 pDst->SemanticName = "ATTRIB";
4849 pDst->SemanticIndex = i; /// @todo 'pSrc->inputRegister' is unused, maybe it should somehow.
4850 pDst->Format = vmsvgaDXSurfaceFormat2Dxgi(pSrc->format);
4851 AssertReturn(pDst->Format != DXGI_FORMAT_UNKNOWN, VERR_NOT_IMPLEMENTED);
4852 pDst->InputSlot = pSrc->inputSlot;
4853 pDst->AlignedByteOffset = pSrc->alignedByteOffset;
4854 pDst->InputSlotClass = (D3D11_INPUT_CLASSIFICATION)pSrc->inputSlotClass;
4855 pDst->InstanceDataStepRate = pSrc->instanceDataStepRate;
4856 }
4857
4858 return VINF_SUCCESS;
4859}
4860
4861
4862static DECLCALLBACK(int) vmsvga3dBackDXDestroyElementLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4863{
4864 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4865
4866 RT_NOREF(pBackend, pDXContext);
4867 AssertFailed(); /** @todo Implement */
4868 return VERR_NOT_IMPLEMENTED;
4869}
4870
4871
4872static DECLCALLBACK(int) vmsvga3dBackDXDefineBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
4873 SVGA3dBlendStateId blendId, SVGACOTableDXBlendStateEntry const *pEntry)
4874{
4875 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4876 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4877 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4878
4879 RT_NOREF(pBackend);
4880
4881 HRESULT hr = dxBlendStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papBlendState[blendId]);
4882 if (SUCCEEDED(hr))
4883 return VINF_SUCCESS;
4884 return VERR_INVALID_STATE;
4885}
4886
4887
4888static DECLCALLBACK(int) vmsvga3dBackDXDestroyBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4889{
4890 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4891
4892 RT_NOREF(pBackend, pDXContext);
4893 AssertFailed(); /** @todo Implement */
4894 return VERR_NOT_IMPLEMENTED;
4895}
4896
4897
4898static DECLCALLBACK(int) vmsvga3dBackDXDefineDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, SVGACOTableDXDepthStencilEntry *pEntry)
4899{
4900 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4901 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4902 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4903
4904 RT_NOREF(pBackend);
4905
4906 HRESULT hr = dxDepthStencilStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papDepthStencilState[depthStencilId]);
4907 if (SUCCEEDED(hr))
4908 return VINF_SUCCESS;
4909 return VERR_INVALID_STATE;
4910}
4911
4912
4913static DECLCALLBACK(int) vmsvga3dBackDXDestroyDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4914{
4915 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4916
4917 RT_NOREF(pBackend, pDXContext);
4918 AssertFailed(); /** @todo Implement */
4919 return VERR_NOT_IMPLEMENTED;
4920}
4921
4922
4923static DECLCALLBACK(int) vmsvga3dBackDXDefineRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId, SVGACOTableDXRasterizerStateEntry const *pEntry)
4924{
4925 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4926 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4927 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4928
4929 RT_NOREF(pBackend);
4930
4931 HRESULT hr = dxRasterizerStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papRasterizerState[rasterizerId]);
4932 if (SUCCEEDED(hr))
4933 return VINF_SUCCESS;
4934 return VERR_INVALID_STATE;
4935}
4936
4937
4938static DECLCALLBACK(int) vmsvga3dBackDXDestroyRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4939{
4940 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4941
4942 RT_NOREF(pBackend, pDXContext);
4943 AssertFailed(); /** @todo Implement */
4944 return VERR_NOT_IMPLEMENTED;
4945}
4946
4947
4948static DECLCALLBACK(int) vmsvga3dBackDXDefineSamplerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSamplerId samplerId, SVGACOTableDXSamplerEntry const *pEntry)
4949{
4950 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4951 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4952 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4953
4954 RT_NOREF(pBackend);
4955
4956 HRESULT hr = dxSamplerStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papSamplerState[samplerId]);
4957 if (SUCCEEDED(hr))
4958 return VINF_SUCCESS;
4959 return VERR_INVALID_STATE;
4960}
4961
4962
4963static DECLCALLBACK(int) vmsvga3dBackDXDestroySamplerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4964{
4965 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4966
4967 RT_NOREF(pBackend, pDXContext);
4968 AssertFailed(); /** @todo Implement */
4969 return VERR_NOT_IMPLEMENTED;
4970}
4971
4972
4973static DECLCALLBACK(int) vmsvga3dBackDXDefineShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSHADER pShader)
4974{
4975 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4976
4977 RT_NOREF(pBackend);
4978
4979 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[pShader->id];
4980 D3D_RELEASE(pDXShader->pShader);
4981 pDXShader->enmShaderType = pShader->type;
4982 pShader->u.pvBackendShader = pDXShader;
4983 return VINF_SUCCESS;
4984}
4985
4986
4987static DECLCALLBACK(int) vmsvga3dBackDXDestroyShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4988{
4989 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4990
4991 RT_NOREF(pBackend, pDXContext);
4992 AssertFailed(); /** @todo Implement */
4993 return VERR_NOT_IMPLEMENTED;
4994}
4995
4996
4997static DECLCALLBACK(int) vmsvga3dBackDXBindShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSHADER pShader, void const *pvShaderBytecode)
4998{
4999 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5000 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
5001 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5002
5003 RT_NOREF(pBackend);
5004
5005 int rc = VINF_SUCCESS;
5006
5007 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[pShader->id];
5008 if (pDXShader->pvDXBC)
5009 {
5010 RTMemFree(pDXShader->pvDXBC);
5011 pDXShader->pvDXBC = NULL;
5012 pDXShader->cbDXBC = 0;
5013 }
5014
5015 if (pvShaderBytecode)
5016 {
5017#ifdef LOG_ENABLED
5018 Log(("Shader: cid=%u shid=%u type=%d:\n", pDXContext->cid, pShader->id, pDXShader->enmShaderType));
5019 uint8_t *pu8 = (uint8_t *)pvShaderBytecode;
5020 for (uint32_t i = 0; i < pShader->cbData; ++i)
5021 {
5022 if ((i % 16) == 0)
5023 {
5024 if (i > 0)
5025 Log((",\n"));
5026
5027 Log((" %#04x", pu8[i]));
5028 }
5029 else
5030 {
5031 Log((", %#04x", pu8[i]));
5032 }
5033 }
5034 Log(("\n"));
5035#endif
5036
5037 rc = DXShaderCreateDXBC(&pShader->shaderInfo, pvShaderBytecode, pShader->cbData, &pDXShader->pvDXBC, &pDXShader->cbDXBC);
5038 if (RT_SUCCESS(rc))
5039 {
5040#ifdef LOG_ENABLED
5041 if (pBackend->pfnD3DDisassemble && LogIs6Enabled())
5042 {
5043 ID3D10Blob *pBlob = 0;
5044 HRESULT hr2 = pBackend->pfnD3DDisassemble(pDXShader->pvDXBC, pDXShader->cbDXBC, 0, NULL, &pBlob);
5045 if (SUCCEEDED(hr2) && pBlob && pBlob->GetBufferSize())
5046 {
5047 Log6(("Shader: cid=%u shid=%u type=%d:\n%s\n",
5048 pDXContext->cid, pShader->id, pDXShader->enmShaderType, pBlob->GetBufferPointer()));
5049 }
5050 else
5051 AssertFailed();
5052 D3D_RELEASE(pBlob);
5053 }
5054#endif
5055
5056 HRESULT hr = dxShaderCreate(pDevice, pShader, pDXShader);
5057 if (FAILED(hr))
5058 rc = VERR_INVALID_STATE;
5059 }
5060 else
5061 rc = VERR_NO_MEMORY;
5062 }
5063
5064 return rc;
5065}
5066
5067
5068static DECLCALLBACK(int) vmsvga3dBackDXDefineStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5069{
5070 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5071
5072 RT_NOREF(pBackend, pDXContext);
5073 AssertFailed(); /** @todo Implement */
5074 return VERR_NOT_IMPLEMENTED;
5075}
5076
5077
5078static DECLCALLBACK(int) vmsvga3dBackDXDestroyStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5079{
5080 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5081
5082 RT_NOREF(pBackend, pDXContext);
5083 AssertFailed(); /** @todo Implement */
5084 return VERR_NOT_IMPLEMENTED;
5085}
5086
5087
5088static DECLCALLBACK(int) vmsvga3dBackDXSetStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5089{
5090 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5091
5092 RT_NOREF(pBackend, pDXContext);
5093 AssertFailed(); /** @todo Implement */
5094 return VERR_NOT_IMPLEMENTED;
5095}
5096
5097
5098static int dxCOTableRealloc(void **ppvCOTable, uint32_t *pcCOTable, uint32_t cbEntry, uint32_t cEntries, uint32_t cValidEntries)
5099{
5100 if (*pcCOTable != cEntries)
5101 {
5102 /* Grow/shrink the array. */
5103 if (cEntries)
5104 {
5105 void *pvNew = RTMemRealloc(*ppvCOTable, cEntries * cbEntry);
5106 AssertReturn(pvNew, VERR_NO_MEMORY);
5107 memset((uint8_t *)pvNew + cValidEntries * cbEntry, 0, (cEntries - cValidEntries) * cbEntry);
5108 *ppvCOTable = pvNew;
5109 }
5110 else
5111 {
5112 RTMemFree(*ppvCOTable);
5113 *ppvCOTable = NULL;
5114 }
5115
5116 *pcCOTable = cEntries;
5117 }
5118
5119 return VINF_SUCCESS;
5120}
5121
5122static DECLCALLBACK(int) vmsvga3dBackDXSetCOTable(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableType type, uint32_t cEntries, uint32_t cValidEntries)
5123{
5124 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5125 RT_NOREF(pBackend);
5126
5127 VMSVGA3DBACKENDDXCONTEXT *pBackendDXContext = pDXContext->pBackendDXContext;
5128
5129 int rc = VINF_SUCCESS;
5130
5131 /* Allocate paBlendState for example. */
5132 /* Keep first cValidEntries. */
5133 switch (type)
5134 {
5135 case SVGA_COTABLE_RTVIEW:
5136 if (pBackendDXContext->papRenderTargetView)
5137 {
5138 /* Clear obsolete entries. */
5139 DX_RELEASE_ARRAY(pBackendDXContext->cRenderTargetView - cValidEntries, &pBackendDXContext->papRenderTargetView[cValidEntries]);
5140 }
5141
5142 rc = dxCOTableRealloc((void **)&pBackendDXContext->papRenderTargetView, &pBackendDXContext->cRenderTargetView,
5143 sizeof(pBackendDXContext->papRenderTargetView[0]), cEntries, cValidEntries);
5144 break;
5145 case SVGA_COTABLE_DSVIEW:
5146 if (pBackendDXContext->papDepthStencilView)
5147 {
5148 /* Clear obsolete entries. */
5149 DX_RELEASE_ARRAY(pBackendDXContext->cDepthStencilView - cValidEntries, &pBackendDXContext->papDepthStencilView[cValidEntries]);
5150 }
5151
5152 rc = dxCOTableRealloc((void **)&pBackendDXContext->papDepthStencilView, &pBackendDXContext->cDepthStencilView,
5153 sizeof(pBackendDXContext->papDepthStencilView[0]), cEntries, cValidEntries);
5154 break;
5155 case SVGA_COTABLE_SRVIEW:
5156 if (pBackendDXContext->papShaderResourceView)
5157 {
5158 /* Clear obsolete entries. */
5159 DX_RELEASE_ARRAY(pBackendDXContext->cShaderResourceView - cValidEntries, &pBackendDXContext->papShaderResourceView[cValidEntries]);
5160 }
5161
5162 rc = dxCOTableRealloc((void **)&pBackendDXContext->papShaderResourceView, &pBackendDXContext->cShaderResourceView,
5163 sizeof(pBackendDXContext->papShaderResourceView[0]), cEntries, cValidEntries);
5164 break;
5165 case SVGA_COTABLE_ELEMENTLAYOUT:
5166 if (pBackendDXContext->paElementLayout)
5167 {
5168 /* Clear obsolete entries. */
5169 for (uint32_t i = cValidEntries; i < pBackendDXContext->cElementLayout; ++i)
5170 D3D_RELEASE(pBackendDXContext->paElementLayout[i].pElementLayout);
5171 }
5172
5173 rc = dxCOTableRealloc((void **)&pBackendDXContext->paElementLayout, &pBackendDXContext->cElementLayout,
5174 sizeof(pBackendDXContext->paElementLayout[0]), cEntries, cValidEntries);
5175 break;
5176 case SVGA_COTABLE_BLENDSTATE:
5177 if (pBackendDXContext->papBlendState)
5178 {
5179 /* Clear obsolete entries. */
5180 DX_RELEASE_ARRAY(pBackendDXContext->cBlendState - cValidEntries, &pBackendDXContext->papBlendState[cValidEntries]);
5181 }
5182
5183 rc = dxCOTableRealloc((void **)&pBackendDXContext->papBlendState, &pBackendDXContext->cBlendState,
5184 sizeof(pBackendDXContext->papBlendState[0]), cEntries, cValidEntries);
5185 break;
5186 case SVGA_COTABLE_DEPTHSTENCIL:
5187 if (pBackendDXContext->papDepthStencilState)
5188 {
5189 /* Clear obsolete entries. */
5190 DX_RELEASE_ARRAY(pBackendDXContext->cDepthStencilState - cValidEntries, &pBackendDXContext->papDepthStencilState[cValidEntries]);
5191 }
5192
5193 rc = dxCOTableRealloc((void **)&pBackendDXContext->papDepthStencilState, &pBackendDXContext->cDepthStencilState,
5194 sizeof(pBackendDXContext->papDepthStencilState[0]), cEntries, cValidEntries);
5195 break;
5196 case SVGA_COTABLE_RASTERIZERSTATE:
5197 if (pBackendDXContext->papRasterizerState)
5198 {
5199 /* Clear obsolete entries. */
5200 DX_RELEASE_ARRAY(pBackendDXContext->cRasterizerState - cValidEntries, &pBackendDXContext->papRasterizerState[cValidEntries]);
5201 }
5202
5203 rc = dxCOTableRealloc((void **)&pBackendDXContext->papRasterizerState, &pBackendDXContext->cRasterizerState,
5204 sizeof(pBackendDXContext->papRasterizerState[0]), cEntries, cValidEntries);
5205 break;
5206 case SVGA_COTABLE_SAMPLER:
5207 if (pBackendDXContext->papSamplerState)
5208 {
5209 /* Clear obsolete entries. */
5210 DX_RELEASE_ARRAY(pBackendDXContext->cSamplerState - cValidEntries, &pBackendDXContext->papSamplerState[cValidEntries]);
5211 }
5212
5213 rc = dxCOTableRealloc((void **)&pBackendDXContext->papSamplerState, &pBackendDXContext->cSamplerState,
5214 sizeof(pBackendDXContext->papSamplerState[0]), cEntries, cValidEntries);
5215 break;
5216 case SVGA_COTABLE_STREAMOUTPUT:
5217 //AssertFailed(); /** @todo Implement */
5218 break;
5219 case SVGA_COTABLE_DXQUERY:
5220 if (pBackendDXContext->papQuery)
5221 {
5222 /* Clear obsolete entries. */
5223 DX_RELEASE_ARRAY(pBackendDXContext->cQuery - cValidEntries, &pBackendDXContext->papQuery[cValidEntries]);
5224 }
5225
5226 rc = dxCOTableRealloc((void **)&pBackendDXContext->papQuery, &pBackendDXContext->cQuery,
5227 sizeof(pBackendDXContext->papQuery[0]), cEntries, cValidEntries);
5228 break;
5229 case SVGA_COTABLE_DXSHADER:
5230 if (pBackendDXContext->paShader)
5231 {
5232 /* Clear obsolete entries. */
5233 for (uint32_t i = cValidEntries; i < pBackendDXContext->cShader; ++i)
5234 D3D_RELEASE(pBackendDXContext->paShader[i].pShader);
5235 }
5236
5237 rc = dxCOTableRealloc((void **)&pBackendDXContext->paShader, &pBackendDXContext->cShader,
5238 sizeof(pBackendDXContext->paShader[0]), cEntries, cValidEntries);
5239 break;
5240 case SVGA_COTABLE_UAVIEW:
5241 AssertFailed(); /** @todo Implement */
5242 break;
5243 case SVGA_COTABLE_MAX: break; /* Compiler warning */
5244 }
5245 return rc;
5246}
5247
5248
5249static DECLCALLBACK(int) vmsvga3dBackDXBufferCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5250{
5251 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5252
5253 RT_NOREF(pBackend, pDXContext);
5254 AssertFailed(); /** @todo Implement */
5255 return VERR_NOT_IMPLEMENTED;
5256}
5257
5258
5259static DECLCALLBACK(int) vmsvga3dBackDXTransferFromBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5260{
5261 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5262
5263 RT_NOREF(pBackend, pDXContext);
5264 AssertFailed(); /** @todo Implement */
5265 return VERR_NOT_IMPLEMENTED;
5266}
5267
5268
5269static DECLCALLBACK(int) vmsvga3dBackDXSurfaceCopyAndReadback(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5270{
5271 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5272
5273 RT_NOREF(pBackend, pDXContext);
5274 AssertFailed(); /** @todo Implement */
5275 return VERR_NOT_IMPLEMENTED;
5276}
5277
5278
5279static DECLCALLBACK(int) vmsvga3dBackDXMoveQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5280{
5281 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5282
5283 RT_NOREF(pBackend, pDXContext);
5284 AssertFailed(); /** @todo Implement */
5285 return VERR_NOT_IMPLEMENTED;
5286}
5287
5288
5289static DECLCALLBACK(int) vmsvga3dBackDXBindAllQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5290{
5291 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5292
5293 RT_NOREF(pBackend, pDXContext);
5294 AssertFailed(); /** @todo Implement */
5295 return VERR_NOT_IMPLEMENTED;
5296}
5297
5298
5299static DECLCALLBACK(int) vmsvga3dBackDXReadbackAllQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5300{
5301 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5302
5303 RT_NOREF(pBackend, pDXContext);
5304 AssertFailed(); /** @todo Implement */
5305 return VERR_NOT_IMPLEMENTED;
5306}
5307
5308
5309static DECLCALLBACK(int) vmsvga3dBackDXPredTransferFromBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5310{
5311 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5312
5313 RT_NOREF(pBackend, pDXContext);
5314 AssertFailed(); /** @todo Implement */
5315 return VERR_NOT_IMPLEMENTED;
5316}
5317
5318
5319static DECLCALLBACK(int) vmsvga3dBackDXMobFence64(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5320{
5321 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5322
5323 RT_NOREF(pBackend, pDXContext);
5324 AssertFailed(); /** @todo Implement */
5325 return VERR_NOT_IMPLEMENTED;
5326}
5327
5328
5329static DECLCALLBACK(int) vmsvga3dBackDXBindAllShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5330{
5331 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5332
5333 RT_NOREF(pBackend, pDXContext);
5334 AssertFailed(); /** @todo Implement */
5335 return VERR_NOT_IMPLEMENTED;
5336}
5337
5338
5339static DECLCALLBACK(int) vmsvga3dBackDXHint(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5340{
5341 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5342
5343 RT_NOREF(pBackend, pDXContext);
5344 AssertFailed(); /** @todo Implement */
5345 return VERR_NOT_IMPLEMENTED;
5346}
5347
5348
5349static DECLCALLBACK(int) vmsvga3dBackDXBufferUpdate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5350{
5351 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5352
5353 RT_NOREF(pBackend, pDXContext);
5354 AssertFailed(); /** @todo Implement */
5355 return VERR_NOT_IMPLEMENTED;
5356}
5357
5358
5359static DECLCALLBACK(int) vmsvga3dBackDXSetVSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5360{
5361 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5362
5363 RT_NOREF(pBackend, pDXContext);
5364 AssertFailed(); /** @todo Implement */
5365 return VERR_NOT_IMPLEMENTED;
5366}
5367
5368
5369static DECLCALLBACK(int) vmsvga3dBackDXSetPSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5370{
5371 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5372
5373 RT_NOREF(pBackend, pDXContext);
5374 AssertFailed(); /** @todo Implement */
5375 return VERR_NOT_IMPLEMENTED;
5376}
5377
5378
5379static DECLCALLBACK(int) vmsvga3dBackDXSetGSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5380{
5381 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5382
5383 RT_NOREF(pBackend, pDXContext);
5384 AssertFailed(); /** @todo Implement */
5385 return VERR_NOT_IMPLEMENTED;
5386}
5387
5388
5389static DECLCALLBACK(int) vmsvga3dBackDXSetHSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5390{
5391 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5392
5393 RT_NOREF(pBackend, pDXContext);
5394 AssertFailed(); /** @todo Implement */
5395 return VERR_NOT_IMPLEMENTED;
5396}
5397
5398
5399static DECLCALLBACK(int) vmsvga3dBackDXSetDSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5400{
5401 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5402
5403 RT_NOREF(pBackend, pDXContext);
5404 AssertFailed(); /** @todo Implement */
5405 return VERR_NOT_IMPLEMENTED;
5406}
5407
5408
5409static DECLCALLBACK(int) vmsvga3dBackDXSetCSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5410{
5411 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5412
5413 RT_NOREF(pBackend, pDXContext);
5414 AssertFailed(); /** @todo Implement */
5415 return VERR_NOT_IMPLEMENTED;
5416}
5417
5418
5419static DECLCALLBACK(int) vmsvga3dBackDXCondBindAllShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5420{
5421 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5422
5423 RT_NOREF(pBackend, pDXContext);
5424 AssertFailed(); /** @todo Implement */
5425 return VERR_NOT_IMPLEMENTED;
5426}
5427
5428
5429static DECLCALLBACK(int) vmsvga3dBackScreenCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5430{
5431 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5432
5433 RT_NOREF(pBackend, pDXContext);
5434 AssertFailed(); /** @todo Implement */
5435 return VERR_NOT_IMPLEMENTED;
5436}
5437
5438
5439static DECLCALLBACK(int) vmsvga3dBackGrowOTable(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5440{
5441 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5442
5443 RT_NOREF(pBackend, pDXContext);
5444 AssertFailed(); /** @todo Implement */
5445 return VERR_NOT_IMPLEMENTED;
5446}
5447
5448
5449static DECLCALLBACK(int) vmsvga3dBackDXGrowCOTable(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5450{
5451 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5452
5453 RT_NOREF(pBackend, pDXContext);
5454 AssertFailed(); /** @todo Implement */
5455 return VERR_NOT_IMPLEMENTED;
5456}
5457
5458
5459static DECLCALLBACK(int) vmsvga3dBackIntraSurfaceCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5460{
5461 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5462
5463 RT_NOREF(pBackend, pDXContext);
5464 AssertFailed(); /** @todo Implement */
5465 return VERR_NOT_IMPLEMENTED;
5466}
5467
5468
5469static DECLCALLBACK(int) vmsvga3dBackDefineGBSurface_v3(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5470{
5471 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5472
5473 RT_NOREF(pBackend, pDXContext);
5474 AssertFailed(); /** @todo Implement */
5475 return VERR_NOT_IMPLEMENTED;
5476}
5477
5478
5479static DECLCALLBACK(int) vmsvga3dBackDXResolveCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5480{
5481 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5482
5483 RT_NOREF(pBackend, pDXContext);
5484 AssertFailed(); /** @todo Implement */
5485 return VERR_NOT_IMPLEMENTED;
5486}
5487
5488
5489static DECLCALLBACK(int) vmsvga3dBackDXPredResolveCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5490{
5491 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5492
5493 RT_NOREF(pBackend, pDXContext);
5494 AssertFailed(); /** @todo Implement */
5495 return VERR_NOT_IMPLEMENTED;
5496}
5497
5498
5499static DECLCALLBACK(int) vmsvga3dBackDXPredConvertRegion(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5500{
5501 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5502
5503 RT_NOREF(pBackend, pDXContext);
5504 AssertFailed(); /** @todo Implement */
5505 return VERR_NOT_IMPLEMENTED;
5506}
5507
5508
5509static DECLCALLBACK(int) vmsvga3dBackDXPredConvert(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5510{
5511 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5512
5513 RT_NOREF(pBackend, pDXContext);
5514 AssertFailed(); /** @todo Implement */
5515 return VERR_NOT_IMPLEMENTED;
5516}
5517
5518
5519static DECLCALLBACK(int) vmsvga3dBackWholeSurfaceCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5520{
5521 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5522
5523 RT_NOREF(pBackend, pDXContext);
5524 AssertFailed(); /** @todo Implement */
5525 return VERR_NOT_IMPLEMENTED;
5526}
5527
5528
5529static DECLCALLBACK(int) vmsvga3dBackDXDefineUAView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5530{
5531 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5532
5533 RT_NOREF(pBackend, pDXContext);
5534 AssertFailed(); /** @todo Implement */
5535 return VERR_NOT_IMPLEMENTED;
5536}
5537
5538
5539static DECLCALLBACK(int) vmsvga3dBackDXDestroyUAView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5540{
5541 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5542
5543 RT_NOREF(pBackend, pDXContext);
5544 AssertFailed(); /** @todo Implement */
5545 return VERR_NOT_IMPLEMENTED;
5546}
5547
5548
5549static DECLCALLBACK(int) vmsvga3dBackDXClearUAViewUint(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5550{
5551 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5552
5553 RT_NOREF(pBackend, pDXContext);
5554 AssertFailed(); /** @todo Implement */
5555 return VERR_NOT_IMPLEMENTED;
5556}
5557
5558
5559static DECLCALLBACK(int) vmsvga3dBackDXClearUAViewFloat(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5560{
5561 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5562
5563 RT_NOREF(pBackend, pDXContext);
5564 AssertFailed(); /** @todo Implement */
5565 return VERR_NOT_IMPLEMENTED;
5566}
5567
5568
5569static DECLCALLBACK(int) vmsvga3dBackDXCopyStructureCount(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5570{
5571 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5572
5573 RT_NOREF(pBackend, pDXContext);
5574 AssertFailed(); /** @todo Implement */
5575 return VERR_NOT_IMPLEMENTED;
5576}
5577
5578
5579static DECLCALLBACK(int) vmsvga3dBackDXSetUAViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5580{
5581 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5582
5583 RT_NOREF(pBackend, pDXContext);
5584 AssertFailed(); /** @todo Implement */
5585 return VERR_NOT_IMPLEMENTED;
5586}
5587
5588
5589static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexedInstancedIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5590{
5591 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5592
5593 RT_NOREF(pBackend, pDXContext);
5594 AssertFailed(); /** @todo Implement */
5595 return VERR_NOT_IMPLEMENTED;
5596}
5597
5598
5599static DECLCALLBACK(int) vmsvga3dBackDXDrawInstancedIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5600{
5601 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5602
5603 RT_NOREF(pBackend, pDXContext);
5604 AssertFailed(); /** @todo Implement */
5605 return VERR_NOT_IMPLEMENTED;
5606}
5607
5608
5609static DECLCALLBACK(int) vmsvga3dBackDXDispatch(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5610{
5611 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5612
5613 RT_NOREF(pBackend, pDXContext);
5614 AssertFailed(); /** @todo Implement */
5615 return VERR_NOT_IMPLEMENTED;
5616}
5617
5618
5619static DECLCALLBACK(int) vmsvga3dBackDXDispatchIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5620{
5621 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5622
5623 RT_NOREF(pBackend, pDXContext);
5624 AssertFailed(); /** @todo Implement */
5625 return VERR_NOT_IMPLEMENTED;
5626}
5627
5628
5629static DECLCALLBACK(int) vmsvga3dBackWriteZeroSurface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5630{
5631 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5632
5633 RT_NOREF(pBackend, pDXContext);
5634 AssertFailed(); /** @todo Implement */
5635 return VERR_NOT_IMPLEMENTED;
5636}
5637
5638
5639static DECLCALLBACK(int) vmsvga3dBackHintZeroSurface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5640{
5641 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5642
5643 RT_NOREF(pBackend, pDXContext);
5644 AssertFailed(); /** @todo Implement */
5645 return VERR_NOT_IMPLEMENTED;
5646}
5647
5648
5649static DECLCALLBACK(int) vmsvga3dBackDXTransferToBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5650{
5651 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5652
5653 RT_NOREF(pBackend, pDXContext);
5654 AssertFailed(); /** @todo Implement */
5655 return VERR_NOT_IMPLEMENTED;
5656}
5657
5658
5659static DECLCALLBACK(int) vmsvga3dBackDXSetStructureCount(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5660{
5661 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5662
5663 RT_NOREF(pBackend, pDXContext);
5664 AssertFailed(); /** @todo Implement */
5665 return VERR_NOT_IMPLEMENTED;
5666}
5667
5668
5669static DECLCALLBACK(int) vmsvga3dBackLogicOpsBitBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5670{
5671 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5672
5673 RT_NOREF(pBackend, pDXContext);
5674 AssertFailed(); /** @todo Implement */
5675 return VERR_NOT_IMPLEMENTED;
5676}
5677
5678
5679static DECLCALLBACK(int) vmsvga3dBackLogicOpsTransBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5680{
5681 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5682
5683 RT_NOREF(pBackend, pDXContext);
5684 AssertFailed(); /** @todo Implement */
5685 return VERR_NOT_IMPLEMENTED;
5686}
5687
5688
5689static DECLCALLBACK(int) vmsvga3dBackLogicOpsStretchBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5690{
5691 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5692
5693 RT_NOREF(pBackend, pDXContext);
5694 AssertFailed(); /** @todo Implement */
5695 return VERR_NOT_IMPLEMENTED;
5696}
5697
5698
5699static DECLCALLBACK(int) vmsvga3dBackLogicOpsColorFill(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5700{
5701 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5702
5703 RT_NOREF(pBackend, pDXContext);
5704 AssertFailed(); /** @todo Implement */
5705 return VERR_NOT_IMPLEMENTED;
5706}
5707
5708
5709static DECLCALLBACK(int) vmsvga3dBackLogicOpsAlphaBlend(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5710{
5711 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5712
5713 RT_NOREF(pBackend, pDXContext);
5714 AssertFailed(); /** @todo Implement */
5715 return VERR_NOT_IMPLEMENTED;
5716}
5717
5718
5719static DECLCALLBACK(int) vmsvga3dBackLogicOpsClearTypeBlend(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5720{
5721 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5722
5723 RT_NOREF(pBackend, pDXContext);
5724 AssertFailed(); /** @todo Implement */
5725 return VERR_NOT_IMPLEMENTED;
5726}
5727
5728
5729static DECLCALLBACK(int) vmsvga3dBackDefineGBSurface_v4(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5730{
5731 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5732
5733 RT_NOREF(pBackend, pDXContext);
5734 AssertFailed(); /** @todo Implement */
5735 return VERR_NOT_IMPLEMENTED;
5736}
5737
5738
5739static DECLCALLBACK(int) vmsvga3dBackDXSetCSUAViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5740{
5741 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5742
5743 RT_NOREF(pBackend, pDXContext);
5744 AssertFailed(); /** @todo Implement */
5745 return VERR_NOT_IMPLEMENTED;
5746}
5747
5748
5749static DECLCALLBACK(int) vmsvga3dBackDXSetMinLOD(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5750{
5751 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5752
5753 RT_NOREF(pBackend, pDXContext);
5754 AssertFailed(); /** @todo Implement */
5755 return VERR_NOT_IMPLEMENTED;
5756}
5757
5758
5759static DECLCALLBACK(int) vmsvga3dBackDXDefineStreamOutputWithMob(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5760{
5761 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5762
5763 RT_NOREF(pBackend, pDXContext);
5764 AssertFailed(); /** @todo Implement */
5765 return VERR_NOT_IMPLEMENTED;
5766}
5767
5768
5769static DECLCALLBACK(int) vmsvga3dBackDXSetShaderIface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5770{
5771 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5772
5773 RT_NOREF(pBackend, pDXContext);
5774 AssertFailed(); /** @todo Implement */
5775 return VERR_NOT_IMPLEMENTED;
5776}
5777
5778
5779static DECLCALLBACK(int) vmsvga3dBackDXBindStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5780{
5781 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5782
5783 RT_NOREF(pBackend, pDXContext);
5784 AssertFailed(); /** @todo Implement */
5785 return VERR_NOT_IMPLEMENTED;
5786}
5787
5788
5789static DECLCALLBACK(int) vmsvga3dBackSurfaceStretchBltNonMSToMS(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5790{
5791 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5792
5793 RT_NOREF(pBackend, pDXContext);
5794 AssertFailed(); /** @todo Implement */
5795 return VERR_NOT_IMPLEMENTED;
5796}
5797
5798
5799static DECLCALLBACK(int) vmsvga3dBackDXBindShaderIface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5800{
5801 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5802
5803 RT_NOREF(pBackend, pDXContext);
5804 AssertFailed(); /** @todo Implement */
5805 return VERR_NOT_IMPLEMENTED;
5806}
5807
5808
5809static DECLCALLBACK(int) vmsvga3dBackQueryInterface(PVGASTATECC pThisCC, char const *pszInterfaceName, void *pvInterfaceFuncs, size_t cbInterfaceFuncs)
5810{
5811 RT_NOREF(pThisCC);
5812
5813 int rc = VINF_SUCCESS;
5814 if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_DX) == 0)
5815 {
5816 if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSDX))
5817 {
5818 if (pvInterfaceFuncs)
5819 {
5820 VMSVGA3DBACKENDFUNCSDX *p = (VMSVGA3DBACKENDFUNCSDX *)pvInterfaceFuncs;
5821 p->pfnDXDefineContext = vmsvga3dBackDXDefineContext;
5822 p->pfnDXDestroyContext = vmsvga3dBackDXDestroyContext;
5823 p->pfnDXBindContext = vmsvga3dBackDXBindContext;
5824 p->pfnDXReadbackContext = vmsvga3dBackDXReadbackContext;
5825 p->pfnDXInvalidateContext = vmsvga3dBackDXInvalidateContext;
5826 p->pfnDXSetSingleConstantBuffer = vmsvga3dBackDXSetSingleConstantBuffer;
5827 p->pfnDXSetShaderResources = vmsvga3dBackDXSetShaderResources;
5828 p->pfnDXSetShader = vmsvga3dBackDXSetShader;
5829 p->pfnDXSetSamplers = vmsvga3dBackDXSetSamplers;
5830 p->pfnDXDraw = vmsvga3dBackDXDraw;
5831 p->pfnDXDrawIndexed = vmsvga3dBackDXDrawIndexed;
5832 p->pfnDXDrawInstanced = vmsvga3dBackDXDrawInstanced;
5833 p->pfnDXDrawIndexedInstanced = vmsvga3dBackDXDrawIndexedInstanced;
5834 p->pfnDXDrawAuto = vmsvga3dBackDXDrawAuto;
5835 p->pfnDXSetInputLayout = vmsvga3dBackDXSetInputLayout;
5836 p->pfnDXSetVertexBuffers = vmsvga3dBackDXSetVertexBuffers;
5837 p->pfnDXSetIndexBuffer = vmsvga3dBackDXSetIndexBuffer;
5838 p->pfnDXSetTopology = vmsvga3dBackDXSetTopology;
5839 p->pfnDXSetRenderTargets = vmsvga3dBackDXSetRenderTargets;
5840 p->pfnDXSetBlendState = vmsvga3dBackDXSetBlendState;
5841 p->pfnDXSetDepthStencilState = vmsvga3dBackDXSetDepthStencilState;
5842 p->pfnDXSetRasterizerState = vmsvga3dBackDXSetRasterizerState;
5843 p->pfnDXDefineQuery = vmsvga3dBackDXDefineQuery;
5844 p->pfnDXDestroyQuery = vmsvga3dBackDXDestroyQuery;
5845 p->pfnDXBindQuery = vmsvga3dBackDXBindQuery;
5846 p->pfnDXSetQueryOffset = vmsvga3dBackDXSetQueryOffset;
5847 p->pfnDXBeginQuery = vmsvga3dBackDXBeginQuery;
5848 p->pfnDXEndQuery = vmsvga3dBackDXEndQuery;
5849 p->pfnDXReadbackQuery = vmsvga3dBackDXReadbackQuery;
5850 p->pfnDXSetPredication = vmsvga3dBackDXSetPredication;
5851 p->pfnDXSetSOTargets = vmsvga3dBackDXSetSOTargets;
5852 p->pfnDXSetViewports = vmsvga3dBackDXSetViewports;
5853 p->pfnDXSetScissorRects = vmsvga3dBackDXSetScissorRects;
5854 p->pfnDXClearRenderTargetView = vmsvga3dBackDXClearRenderTargetView;
5855 p->pfnDXClearDepthStencilView = vmsvga3dBackDXClearDepthStencilView;
5856 p->pfnDXPredCopyRegion = vmsvga3dBackDXPredCopyRegion;
5857 p->pfnDXPredCopy = vmsvga3dBackDXPredCopy;
5858 p->pfnDXPresentBlt = vmsvga3dBackDXPresentBlt;
5859 p->pfnDXGenMips = vmsvga3dBackDXGenMips;
5860 p->pfnDXUpdateSubResource = vmsvga3dBackDXUpdateSubResource;
5861 p->pfnDXReadbackSubResource = vmsvga3dBackDXReadbackSubResource;
5862 p->pfnDXInvalidateSubResource = vmsvga3dBackDXInvalidateSubResource;
5863 p->pfnDXDefineShaderResourceView = vmsvga3dBackDXDefineShaderResourceView;
5864 p->pfnDXDestroyShaderResourceView = vmsvga3dBackDXDestroyShaderResourceView;
5865 p->pfnDXDefineRenderTargetView = vmsvga3dBackDXDefineRenderTargetView;
5866 p->pfnDXDestroyRenderTargetView = vmsvga3dBackDXDestroyRenderTargetView;
5867 p->pfnDXDefineDepthStencilView = vmsvga3dBackDXDefineDepthStencilView;
5868 p->pfnDXDestroyDepthStencilView = vmsvga3dBackDXDestroyDepthStencilView;
5869 p->pfnDXDefineElementLayout = vmsvga3dBackDXDefineElementLayout;
5870 p->pfnDXDestroyElementLayout = vmsvga3dBackDXDestroyElementLayout;
5871 p->pfnDXDefineBlendState = vmsvga3dBackDXDefineBlendState;
5872 p->pfnDXDestroyBlendState = vmsvga3dBackDXDestroyBlendState;
5873 p->pfnDXDefineDepthStencilState = vmsvga3dBackDXDefineDepthStencilState;
5874 p->pfnDXDestroyDepthStencilState = vmsvga3dBackDXDestroyDepthStencilState;
5875 p->pfnDXDefineRasterizerState = vmsvga3dBackDXDefineRasterizerState;
5876 p->pfnDXDestroyRasterizerState = vmsvga3dBackDXDestroyRasterizerState;
5877 p->pfnDXDefineSamplerState = vmsvga3dBackDXDefineSamplerState;
5878 p->pfnDXDestroySamplerState = vmsvga3dBackDXDestroySamplerState;
5879 p->pfnDXDefineShader = vmsvga3dBackDXDefineShader;
5880 p->pfnDXDestroyShader = vmsvga3dBackDXDestroyShader;
5881 p->pfnDXBindShader = vmsvga3dBackDXBindShader;
5882 p->pfnDXDefineStreamOutput = vmsvga3dBackDXDefineStreamOutput;
5883 p->pfnDXDestroyStreamOutput = vmsvga3dBackDXDestroyStreamOutput;
5884 p->pfnDXSetStreamOutput = vmsvga3dBackDXSetStreamOutput;
5885 p->pfnDXSetCOTable = vmsvga3dBackDXSetCOTable;
5886 p->pfnDXBufferCopy = vmsvga3dBackDXBufferCopy;
5887 p->pfnDXTransferFromBuffer = vmsvga3dBackDXTransferFromBuffer;
5888 p->pfnDXSurfaceCopyAndReadback = vmsvga3dBackDXSurfaceCopyAndReadback;
5889 p->pfnDXMoveQuery = vmsvga3dBackDXMoveQuery;
5890 p->pfnDXBindAllQuery = vmsvga3dBackDXBindAllQuery;
5891 p->pfnDXReadbackAllQuery = vmsvga3dBackDXReadbackAllQuery;
5892 p->pfnDXPredTransferFromBuffer = vmsvga3dBackDXPredTransferFromBuffer;
5893 p->pfnDXMobFence64 = vmsvga3dBackDXMobFence64;
5894 p->pfnDXBindAllShader = vmsvga3dBackDXBindAllShader;
5895 p->pfnDXHint = vmsvga3dBackDXHint;
5896 p->pfnDXBufferUpdate = vmsvga3dBackDXBufferUpdate;
5897 p->pfnDXSetVSConstantBufferOffset = vmsvga3dBackDXSetVSConstantBufferOffset;
5898 p->pfnDXSetPSConstantBufferOffset = vmsvga3dBackDXSetPSConstantBufferOffset;
5899 p->pfnDXSetGSConstantBufferOffset = vmsvga3dBackDXSetGSConstantBufferOffset;
5900 p->pfnDXSetHSConstantBufferOffset = vmsvga3dBackDXSetHSConstantBufferOffset;
5901 p->pfnDXSetDSConstantBufferOffset = vmsvga3dBackDXSetDSConstantBufferOffset;
5902 p->pfnDXSetCSConstantBufferOffset = vmsvga3dBackDXSetCSConstantBufferOffset;
5903 p->pfnDXCondBindAllShader = vmsvga3dBackDXCondBindAllShader;
5904 p->pfnScreenCopy = vmsvga3dBackScreenCopy;
5905 p->pfnGrowOTable = vmsvga3dBackGrowOTable;
5906 p->pfnDXGrowCOTable = vmsvga3dBackDXGrowCOTable;
5907 p->pfnIntraSurfaceCopy = vmsvga3dBackIntraSurfaceCopy;
5908 p->pfnDefineGBSurface_v3 = vmsvga3dBackDefineGBSurface_v3;
5909 p->pfnDXResolveCopy = vmsvga3dBackDXResolveCopy;
5910 p->pfnDXPredResolveCopy = vmsvga3dBackDXPredResolveCopy;
5911 p->pfnDXPredConvertRegion = vmsvga3dBackDXPredConvertRegion;
5912 p->pfnDXPredConvert = vmsvga3dBackDXPredConvert;
5913 p->pfnWholeSurfaceCopy = vmsvga3dBackWholeSurfaceCopy;
5914 p->pfnDXDefineUAView = vmsvga3dBackDXDefineUAView;
5915 p->pfnDXDestroyUAView = vmsvga3dBackDXDestroyUAView;
5916 p->pfnDXClearUAViewUint = vmsvga3dBackDXClearUAViewUint;
5917 p->pfnDXClearUAViewFloat = vmsvga3dBackDXClearUAViewFloat;
5918 p->pfnDXCopyStructureCount = vmsvga3dBackDXCopyStructureCount;
5919 p->pfnDXSetUAViews = vmsvga3dBackDXSetUAViews;
5920 p->pfnDXDrawIndexedInstancedIndirect = vmsvga3dBackDXDrawIndexedInstancedIndirect;
5921 p->pfnDXDrawInstancedIndirect = vmsvga3dBackDXDrawInstancedIndirect;
5922 p->pfnDXDispatch = vmsvga3dBackDXDispatch;
5923 p->pfnDXDispatchIndirect = vmsvga3dBackDXDispatchIndirect;
5924 p->pfnWriteZeroSurface = vmsvga3dBackWriteZeroSurface;
5925 p->pfnHintZeroSurface = vmsvga3dBackHintZeroSurface;
5926 p->pfnDXTransferToBuffer = vmsvga3dBackDXTransferToBuffer;
5927 p->pfnDXSetStructureCount = vmsvga3dBackDXSetStructureCount;
5928 p->pfnLogicOpsBitBlt = vmsvga3dBackLogicOpsBitBlt;
5929 p->pfnLogicOpsTransBlt = vmsvga3dBackLogicOpsTransBlt;
5930 p->pfnLogicOpsStretchBlt = vmsvga3dBackLogicOpsStretchBlt;
5931 p->pfnLogicOpsColorFill = vmsvga3dBackLogicOpsColorFill;
5932 p->pfnLogicOpsAlphaBlend = vmsvga3dBackLogicOpsAlphaBlend;
5933 p->pfnLogicOpsClearTypeBlend = vmsvga3dBackLogicOpsClearTypeBlend;
5934 p->pfnDefineGBSurface_v4 = vmsvga3dBackDefineGBSurface_v4;
5935 p->pfnDXSetCSUAViews = vmsvga3dBackDXSetCSUAViews;
5936 p->pfnDXSetMinLOD = vmsvga3dBackDXSetMinLOD;
5937 p->pfnDXDefineStreamOutputWithMob = vmsvga3dBackDXDefineStreamOutputWithMob;
5938 p->pfnDXSetShaderIface = vmsvga3dBackDXSetShaderIface;
5939 p->pfnDXBindStreamOutput = vmsvga3dBackDXBindStreamOutput;
5940 p->pfnSurfaceStretchBltNonMSToMS = vmsvga3dBackSurfaceStretchBltNonMSToMS;
5941 p->pfnDXBindShaderIface = vmsvga3dBackDXBindShaderIface;
5942 }
5943 }
5944 else
5945 {
5946 AssertFailed();
5947 rc = VERR_INVALID_PARAMETER;
5948 }
5949 }
5950 else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_MAP) == 0)
5951 {
5952 if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSMAP))
5953 {
5954 if (pvInterfaceFuncs)
5955 {
5956 VMSVGA3DBACKENDFUNCSMAP *p = (VMSVGA3DBACKENDFUNCSMAP *)pvInterfaceFuncs;
5957 p->pfnSurfaceMap = vmsvga3dSurfaceMap;
5958 p->pfnSurfaceUnmap = vmsvga3dSurfaceUnmap;
5959 }
5960 }
5961 else
5962 {
5963 AssertFailed();
5964 rc = VERR_INVALID_PARAMETER;
5965 }
5966 }
5967 else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_GBO) == 0)
5968 {
5969 if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSGBO))
5970 {
5971 if (pvInterfaceFuncs)
5972 {
5973 VMSVGA3DBACKENDFUNCSGBO *p = (VMSVGA3DBACKENDFUNCSGBO *)pvInterfaceFuncs;
5974 p->pfnScreenTargetBind = vmsvga3dScreenTargetBind;
5975 p->pfnScreenTargetUpdate = vmsvga3dScreenTargetUpdate;
5976 }
5977 }
5978 else
5979 {
5980 AssertFailed();
5981 rc = VERR_INVALID_PARAMETER;
5982 }
5983 }
5984 else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_3D) == 0)
5985 {
5986 if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCS3D))
5987 {
5988 if (pvInterfaceFuncs)
5989 {
5990 VMSVGA3DBACKENDFUNCS3D *p = (VMSVGA3DBACKENDFUNCS3D *)pvInterfaceFuncs;
5991 p->pfnInit = vmsvga3dBackInit;
5992 p->pfnPowerOn = vmsvga3dBackPowerOn;
5993 p->pfnTerminate = vmsvga3dBackTerminate;
5994 p->pfnReset = vmsvga3dBackReset;
5995 p->pfnQueryCaps = vmsvga3dBackQueryCaps;
5996 p->pfnChangeMode = vmsvga3dBackChangeMode;
5997 p->pfnCreateTexture = vmsvga3dBackCreateTexture;
5998 p->pfnSurfaceDestroy = vmsvga3dBackSurfaceDestroy;
5999 p->pfnSurfaceCopy = vmsvga3dBackSurfaceCopy;
6000 p->pfnSurfaceDMACopyBox = vmsvga3dBackSurfaceDMACopyBox;
6001 p->pfnSurfaceStretchBlt = vmsvga3dBackSurfaceStretchBlt;
6002 p->pfnUpdateHostScreenViewport = vmsvga3dBackUpdateHostScreenViewport;
6003 p->pfnDefineScreen = vmsvga3dBackDefineScreen;
6004 p->pfnDestroyScreen = vmsvga3dBackDestroyScreen;
6005 p->pfnSurfaceBlitToScreen = vmsvga3dBackSurfaceBlitToScreen;
6006 p->pfnSurfaceUpdateHeapBuffers = vmsvga3dBackSurfaceUpdateHeapBuffers;
6007 }
6008 }
6009 else
6010 {
6011 AssertFailed();
6012 rc = VERR_INVALID_PARAMETER;
6013 }
6014 }
6015 else
6016 rc = VERR_NOT_IMPLEMENTED;
6017 return rc;
6018}
6019
6020
6021extern VMSVGA3DBACKENDDESC const g_BackendDX =
6022{
6023 "DX",
6024 vmsvga3dBackQueryInterface
6025};
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