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source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d-win-dx.cpp@ 91441

Last change on this file since 91441 was 91441, checked in by vboxsync, 3 years ago

Devices/Graphics: staging buffer for transfers; stream output: bugref:9830
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1/* $Id: DevVGA-SVGA3d-win-dx.cpp 91441 2021-09-28 17:37:53Z vboxsync $ */
2/** @file
3 * DevVMWare - VMWare SVGA device
4 */
5
6/*
7 * Copyright (C) 2020 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
23#include <VBox/AssertGuest.h>
24#include <VBox/log.h>
25#include <VBox/vmm/pdmdev.h>
26#include <VBox/vmm/pgm.h>
27
28#include <iprt/assert.h>
29#include <iprt/avl.h>
30#include <iprt/errcore.h>
31#include <iprt/mem.h>
32
33#include <VBoxVideo.h> /* required by DevVGA.h */
34#include <VBoxVideo3D.h>
35
36/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
37#include "DevVGA.h"
38
39#include "DevVGA-SVGA.h"
40#include "DevVGA-SVGA3d.h"
41#include "DevVGA-SVGA3d-internal.h"
42#include "DevVGA-SVGA3d-dx-shader.h"
43
44#include <d3d11.h>
45
46
47/** Fake ID for the backend DX context. The context creates all shared textures. */
48#define DX_CID_BACKEND UINT32_C(0xfffffffe)
49
50#define DX_RELEASE_ARRAY(a_Count, a_papArray) do { \
51 for (uint32_t i = 0; i < (a_Count); ++i) \
52 D3D_RELEASE((a_papArray)[i]); \
53} while (0)
54
55typedef struct DXDEVICE
56{
57 ID3D11Device *pDevice; /* Device. */
58 ID3D11DeviceContext *pImmediateContext; /* Corresponding context. */
59 IDXGIFactory *pDxgiFactory; /* DXGI Factory. */
60 D3D_FEATURE_LEVEL FeatureLevel;
61
62 /* Staging buffer for transfer to surface buffers. */
63 ID3D11Buffer *pStagingBuffer; /* The staging buffer resource. */
64 uint32_t cbStagingBuffer; /* Current size of the staging buffer resource. */
65} DXDEVICE;
66
67/* What kind of resource has been created for the VMSVGA3D surface. */
68typedef enum VMSVGA3DBACKRESTYPE
69{
70 VMSVGA3D_RESTYPE_NONE = 0,
71 VMSVGA3D_RESTYPE_SCREEN_TARGET = 1,
72 VMSVGA3D_RESTYPE_TEXTURE_1D = 2,
73 VMSVGA3D_RESTYPE_TEXTURE = 3,
74 VMSVGA3D_RESTYPE_CUBE_TEXTURE = 4,
75 VMSVGA3D_RESTYPE_TEXTURE_3D = 5,
76 VMSVGA3D_RESTYPE_BUFFER = 6,
77} VMSVGA3DBACKRESTYPE;
78
79typedef struct VMSVGA3DBACKENDSURFACE
80{
81 VMSVGA3DBACKRESTYPE enmResType;
82 DXGI_FORMAT enmDxgiFormat;
83 union
84 {
85 ID3D11Resource *pResource;
86 ID3D11Texture2D *pTexture2D;
87 ID3D11Texture3D *pTexture3D;
88 ID3D11Buffer *pBuffer;
89 } u;
90
91 ID3D11Texture2D *pDynamicTexture; /* For screen updates from memory. */ /** @todo One for all screens. */
92 ID3D11Texture2D *pStagingTexture; /* For Reading the screen content. */ /** @todo One for all screens. */
93 ID3D11Texture3D *pDynamicTexture3D; /* For screen updates from memory. */ /** @todo One for all screens. */
94 ID3D11Texture3D *pStagingTexture3D; /* For Reading the screen content. */ /** @todo One for all screens. */
95
96 /* Screen targets are created as shared surfaces. */
97 HANDLE SharedHandle; /* The shared handle of this structure. */
98
99 /* DX context which last rendered to the texture.
100 * This is only for render targets and screen targets, which can be shared between contexts.
101 * The backend context (cid == DX_CID_BACKEND) can also be a drawing context.
102 */
103 uint32_t cidDrawing;
104
105 /** AVL tree containing DXSHAREDTEXTURE structures. */
106 AVLU32TREE SharedTextureTree;
107
108} VMSVGA3DBACKENDSURFACE;
109
110/* "The only resources that can be shared are 2D non-mipmapped textures." */
111typedef struct DXSHAREDTEXTURE
112{
113 AVLU32NODECORE Core; /* Key is context id which opened this texture. */
114 ID3D11Texture2D *pTexture; /* The opened shared texture. */
115 uint32_t sid; /* Surface id. */
116} DXSHAREDTEXTURE;
117
118
119typedef struct VMSVGAHWSCREEN
120{
121 ID3D11Texture2D *pTexture; /* Shared texture for the screen content. Only used as CopyResource target. */
122 IDXGIResource *pDxgiResource; /* Interface of the texture. */
123 IDXGIKeyedMutex *pDXGIKeyedMutex; /* Synchronization interface for the render device. */
124 HANDLE SharedHandle; /* The shared handle of this structure. */
125 uint32_t sidScreenTarget; /* The source surface for this screen. */
126} VMSVGAHWSCREEN;
127
128
129typedef struct DXELEMENTLAYOUT
130{
131 ID3D11InputLayout *pElementLayout;
132 uint32_t cElementDesc;
133 D3D11_INPUT_ELEMENT_DESC aElementDesc[32];
134} DXELEMENTLAYOUT;
135
136typedef struct DXSHADER
137{
138 SVGA3dShaderType enmShaderType;
139 union
140 {
141 ID3D11DeviceChild *pShader; /* All. */
142 ID3D11VertexShader *pVertexShader; /* SVGA3D_SHADERTYPE_VS */
143 ID3D11PixelShader *pPixelShader; /* SVGA3D_SHADERTYPE_PS */
144 ID3D11GeometryShader *pGeometryShader; /* SVGA3D_SHADERTYPE_GS */
145 ID3D11HullShader *pHullShader; /* SVGA3D_SHADERTYPE_HS */
146 ID3D11DomainShader *pDomainShader; /* SVGA3D_SHADERTYPE_DS */
147 ID3D11ComputeShader *pComputeShader; /* SVGA3D_SHADERTYPE_CS */
148 };
149 void *pvDXBC;
150 uint32_t cbDXBC;
151
152 uint32_t soid; /* Stream output declarations for geometry shaders. */
153} DXSHADER;
154
155typedef struct DXSTREAMOUTPUT
156{
157 UINT cDeclarationEntry;
158 D3D11_SO_DECLARATION_ENTRY aDeclarationEntry[SVGA3D_MAX_STREAMOUT_DECLS];
159} DXSTREAMOUTPUT;
160
161#define DX_DEFERRED_SET_RENDER_TARGETS
162typedef struct VMSVGA3DBACKENDDXCONTEXT
163{
164 DXDEVICE device; /* DX device interfaces for this context operations. */
165
166 /* Arrays for Context-Object Tables. Number of entries depends on COTable size. */
167 uint32_t cBlendState; /* Number of entries in the papBlendState array. */
168 uint32_t cDepthStencilState; /* papDepthStencilState */
169 uint32_t cSamplerState; /* papSamplerState */
170 uint32_t cRasterizerState; /* papRasterizerState */
171 uint32_t cElementLayout; /* papElementLayout */
172 uint32_t cRenderTargetView; /* papRenderTargetView */
173 uint32_t cDepthStencilView; /* papDepthStencilView */
174 uint32_t cShaderResourceView; /* papShaderResourceView */
175 uint32_t cQuery; /* papQuery */
176 uint32_t cShader; /* papShader */
177 uint32_t cStreamOutput; /* papStreamOutput */
178 ID3D11BlendState **papBlendState;
179 ID3D11DepthStencilState **papDepthStencilState;
180 ID3D11SamplerState **papSamplerState;
181 ID3D11RasterizerState **papRasterizerState;
182 DXELEMENTLAYOUT *paElementLayout;
183 ID3D11RenderTargetView **papRenderTargetView;
184 ID3D11DepthStencilView **papDepthStencilView;
185 ID3D11ShaderResourceView **papShaderResourceView;
186 ID3D11Query **papQuery;
187 DXSHADER *paShader;
188 DXSTREAMOUTPUT *paStreamOutput;
189
190#ifdef DX_DEFERRED_SET_RENDER_TARGETS
191 struct
192 {
193 ID3D11RenderTargetView *papRenderTargetViews[SVGA3D_MAX_RENDER_TARGETS];
194 uint32_t cRenderTargetViews;
195 ID3D11DepthStencilView *pDepthStencilView;
196 } state;
197#endif
198
199 uint32_t cSOTarget; /* How many SO targets are currently set (SetSOTargets) */
200} VMSVGA3DBACKENDDXCONTEXT;
201
202typedef HRESULT FN_D3D_DISASSEMBLE(LPCVOID pSrcData, SIZE_T SrcDataSize, UINT Flags, LPCSTR szComments, ID3D10Blob **ppDisassembly);
203typedef FN_D3D_DISASSEMBLE *PFN_D3D_DISASSEMBLE;
204
205typedef struct VMSVGA3DBACKEND
206{
207 RTLDRMOD hD3D11;
208 PFN_D3D11_CREATE_DEVICE pfnD3D11CreateDevice;
209
210 RTLDRMOD hD3DCompiler;
211 PFN_D3D_DISASSEMBLE pfnD3DDisassemble;
212
213 DXDEVICE device; /* Device for the VMSVGA3D context independent operation. */
214} VMSVGA3DBACKEND;
215
216
217static DECLCALLBACK(void) vmsvga3dBackSurfaceDestroy(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface);
218
219
220DECLINLINE(D3D11_TEXTURECUBE_FACE) vmsvga3dCubemapFaceFromIndex(uint32_t iFace)
221{
222 D3D11_TEXTURECUBE_FACE Face;
223 switch (iFace)
224 {
225 case 0: Face = D3D11_TEXTURECUBE_FACE_POSITIVE_X; break;
226 case 1: Face = D3D11_TEXTURECUBE_FACE_NEGATIVE_X; break;
227 case 2: Face = D3D11_TEXTURECUBE_FACE_POSITIVE_Y; break;
228 case 3: Face = D3D11_TEXTURECUBE_FACE_NEGATIVE_Y; break;
229 case 4: Face = D3D11_TEXTURECUBE_FACE_POSITIVE_Z; break;
230 default:
231 case 5: Face = D3D11_TEXTURECUBE_FACE_NEGATIVE_Z; break;
232 }
233 return Face;
234}
235
236#define DX_REPLACE_X8_WITH_A8
237static DXGI_FORMAT vmsvgaDXSurfaceFormat2Dxgi(SVGA3dSurfaceFormat format)
238{
239 /* Ensure that correct headers are used.
240 * SVGA3D_AYUV was equal to 45, then replaced with SVGA3D_FORMAT_DEAD2 = 45, and redefined as SVGA3D_AYUV = 152.
241 */
242 AssertCompile(SVGA3D_AYUV == 152);
243
244#define DXGI_FORMAT_ DXGI_FORMAT_UNKNOWN
245 /** @todo More formats. */
246 switch (format)
247 {
248#ifdef DX_REPLACE_X8_WITH_A8
249 case SVGA3D_X8R8G8B8: return DXGI_FORMAT_B8G8R8A8_UNORM;
250#else
251 case SVGA3D_X8R8G8B8: return DXGI_FORMAT_B8G8R8X8_UNORM;
252#endif
253 case SVGA3D_A8R8G8B8: return DXGI_FORMAT_B8G8R8A8_UNORM;
254 case SVGA3D_R5G6B5: return DXGI_FORMAT_B5G6R5_UNORM;
255 case SVGA3D_X1R5G5B5: return DXGI_FORMAT_B5G5R5A1_UNORM;
256 case SVGA3D_A1R5G5B5: return DXGI_FORMAT_B5G5R5A1_UNORM;
257 case SVGA3D_A4R4G4B4: break; // 11.1 return DXGI_FORMAT_B4G4R4A4_UNORM;
258 case SVGA3D_Z_D32: break;
259 case SVGA3D_Z_D16: return DXGI_FORMAT_D16_UNORM;
260 case SVGA3D_Z_D24S8: return DXGI_FORMAT_D24_UNORM_S8_UINT;
261 case SVGA3D_Z_D15S1: break;
262 case SVGA3D_LUMINANCE8: return DXGI_FORMAT_;
263 case SVGA3D_LUMINANCE4_ALPHA4: return DXGI_FORMAT_;
264 case SVGA3D_LUMINANCE16: return DXGI_FORMAT_;
265 case SVGA3D_LUMINANCE8_ALPHA8: return DXGI_FORMAT_;
266 case SVGA3D_DXT1: return DXGI_FORMAT_;
267 case SVGA3D_DXT2: return DXGI_FORMAT_;
268 case SVGA3D_DXT3: return DXGI_FORMAT_;
269 case SVGA3D_DXT4: return DXGI_FORMAT_;
270 case SVGA3D_DXT5: return DXGI_FORMAT_;
271 case SVGA3D_BUMPU8V8: return DXGI_FORMAT_;
272 case SVGA3D_BUMPL6V5U5: return DXGI_FORMAT_;
273 case SVGA3D_BUMPX8L8V8U8: return DXGI_FORMAT_;
274 case SVGA3D_FORMAT_DEAD1: break;
275 case SVGA3D_ARGB_S10E5: return DXGI_FORMAT_;
276 case SVGA3D_ARGB_S23E8: return DXGI_FORMAT_;
277 case SVGA3D_A2R10G10B10: return DXGI_FORMAT_;
278 case SVGA3D_V8U8: return DXGI_FORMAT_;
279 case SVGA3D_Q8W8V8U8: return DXGI_FORMAT_;
280 case SVGA3D_CxV8U8: return DXGI_FORMAT_;
281 case SVGA3D_X8L8V8U8: return DXGI_FORMAT_;
282 case SVGA3D_A2W10V10U10: return DXGI_FORMAT_;
283 case SVGA3D_ALPHA8: return DXGI_FORMAT_;
284 case SVGA3D_R_S10E5: return DXGI_FORMAT_;
285 case SVGA3D_R_S23E8: return DXGI_FORMAT_;
286 case SVGA3D_RG_S10E5: return DXGI_FORMAT_;
287 case SVGA3D_RG_S23E8: return DXGI_FORMAT_;
288 case SVGA3D_BUFFER: return DXGI_FORMAT_;
289 case SVGA3D_Z_D24X8: return DXGI_FORMAT_;
290 case SVGA3D_V16U16: return DXGI_FORMAT_;
291 case SVGA3D_G16R16: return DXGI_FORMAT_;
292 case SVGA3D_A16B16G16R16: return DXGI_FORMAT_;
293 case SVGA3D_UYVY: return DXGI_FORMAT_;
294 case SVGA3D_YUY2: return DXGI_FORMAT_;
295 case SVGA3D_NV12: return DXGI_FORMAT_;
296 case SVGA3D_FORMAT_DEAD2: break; /* Old SVGA3D_AYUV */
297 case SVGA3D_R32G32B32A32_TYPELESS: return DXGI_FORMAT_R32G32B32A32_TYPELESS;
298 case SVGA3D_R32G32B32A32_UINT: return DXGI_FORMAT_R32G32B32A32_UINT;
299 case SVGA3D_R32G32B32A32_SINT: return DXGI_FORMAT_R32G32B32A32_SINT;
300 case SVGA3D_R32G32B32_TYPELESS: return DXGI_FORMAT_R32G32B32_TYPELESS;
301 case SVGA3D_R32G32B32_FLOAT: return DXGI_FORMAT_R32G32B32_FLOAT;
302 case SVGA3D_R32G32B32_UINT: return DXGI_FORMAT_R32G32B32_UINT;
303 case SVGA3D_R32G32B32_SINT: return DXGI_FORMAT_R32G32B32_SINT;
304 case SVGA3D_R16G16B16A16_TYPELESS: return DXGI_FORMAT_R16G16B16A16_TYPELESS;
305 case SVGA3D_R16G16B16A16_UINT: return DXGI_FORMAT_R16G16B16A16_UINT;
306 case SVGA3D_R16G16B16A16_SNORM: return DXGI_FORMAT_R16G16B16A16_SNORM;
307 case SVGA3D_R16G16B16A16_SINT: return DXGI_FORMAT_R16G16B16A16_SINT;
308 case SVGA3D_R32G32_TYPELESS: return DXGI_FORMAT_R32G32_TYPELESS;
309 case SVGA3D_R32G32_UINT: return DXGI_FORMAT_R32G32_UINT;
310 case SVGA3D_R32G32_SINT: return DXGI_FORMAT_R32G32_SINT;
311 case SVGA3D_R32G8X24_TYPELESS: return DXGI_FORMAT_R32G8X24_TYPELESS;
312 case SVGA3D_D32_FLOAT_S8X24_UINT: return DXGI_FORMAT_D32_FLOAT_S8X24_UINT;
313 case SVGA3D_R32_FLOAT_X8X24: return DXGI_FORMAT_R32_FLOAT_X8X24_TYPELESS;
314 case SVGA3D_X32_G8X24_UINT: return DXGI_FORMAT_X32_TYPELESS_G8X24_UINT;
315 case SVGA3D_R10G10B10A2_TYPELESS: return DXGI_FORMAT_R10G10B10A2_TYPELESS;
316 case SVGA3D_R10G10B10A2_UINT: return DXGI_FORMAT_R10G10B10A2_UINT;
317 case SVGA3D_R11G11B10_FLOAT: return DXGI_FORMAT_R11G11B10_FLOAT;
318 case SVGA3D_R8G8B8A8_TYPELESS: return DXGI_FORMAT_R8G8B8A8_TYPELESS;
319 case SVGA3D_R8G8B8A8_UNORM: return DXGI_FORMAT_R8G8B8A8_UNORM;
320 case SVGA3D_R8G8B8A8_UNORM_SRGB: return DXGI_FORMAT_R8G8B8A8_UNORM_SRGB;
321 case SVGA3D_R8G8B8A8_UINT: return DXGI_FORMAT_R8G8B8A8_UINT;
322 case SVGA3D_R8G8B8A8_SINT: return DXGI_FORMAT_R8G8B8A8_SINT;
323 case SVGA3D_R16G16_TYPELESS: return DXGI_FORMAT_R16G16_TYPELESS;
324 case SVGA3D_R16G16_UINT: return DXGI_FORMAT_R16G16_UINT;
325 case SVGA3D_R16G16_SINT: return DXGI_FORMAT_R16G16_SINT;
326 case SVGA3D_R32_TYPELESS: return DXGI_FORMAT_R32_TYPELESS;
327 case SVGA3D_D32_FLOAT: return DXGI_FORMAT_D32_FLOAT;
328 case SVGA3D_R32_UINT: return DXGI_FORMAT_R32_UINT;
329 case SVGA3D_R32_SINT: return DXGI_FORMAT_R32_SINT;
330 case SVGA3D_R24G8_TYPELESS: return DXGI_FORMAT_R24G8_TYPELESS;
331 case SVGA3D_D24_UNORM_S8_UINT: return DXGI_FORMAT_D24_UNORM_S8_UINT;
332 case SVGA3D_R24_UNORM_X8: return DXGI_FORMAT_R24_UNORM_X8_TYPELESS;
333 case SVGA3D_X24_G8_UINT: return DXGI_FORMAT_X24_TYPELESS_G8_UINT;
334 case SVGA3D_R8G8_TYPELESS: return DXGI_FORMAT_R8G8_TYPELESS;
335 case SVGA3D_R8G8_UNORM: return DXGI_FORMAT_R8G8_UNORM;
336 case SVGA3D_R8G8_UINT: return DXGI_FORMAT_R8G8_UINT;
337 case SVGA3D_R8G8_SINT: return DXGI_FORMAT_R8G8_SINT;
338 case SVGA3D_R16_TYPELESS: return DXGI_FORMAT_R16_TYPELESS;
339 case SVGA3D_R16_UNORM: return DXGI_FORMAT_R16_UNORM;
340 case SVGA3D_R16_UINT: return DXGI_FORMAT_R16_UINT;
341 case SVGA3D_R16_SNORM: return DXGI_FORMAT_R16_SNORM;
342 case SVGA3D_R16_SINT: return DXGI_FORMAT_R16_SINT;
343 case SVGA3D_R8_TYPELESS: return DXGI_FORMAT_R8_TYPELESS;
344 case SVGA3D_R8_UNORM: return DXGI_FORMAT_R8_UNORM;
345 case SVGA3D_R8_UINT: return DXGI_FORMAT_R8_UINT;
346 case SVGA3D_R8_SNORM: return DXGI_FORMAT_R8_SNORM;
347 case SVGA3D_R8_SINT: return DXGI_FORMAT_R8_SINT;
348 case SVGA3D_P8: break;
349 case SVGA3D_R9G9B9E5_SHAREDEXP: return DXGI_FORMAT_R9G9B9E5_SHAREDEXP;
350 case SVGA3D_R8G8_B8G8_UNORM: return DXGI_FORMAT_R8G8_B8G8_UNORM;
351 case SVGA3D_G8R8_G8B8_UNORM: return DXGI_FORMAT_G8R8_G8B8_UNORM;
352 case SVGA3D_BC1_TYPELESS: return DXGI_FORMAT_BC1_TYPELESS;
353 case SVGA3D_BC1_UNORM_SRGB: return DXGI_FORMAT_BC1_UNORM_SRGB;
354 case SVGA3D_BC2_TYPELESS: return DXGI_FORMAT_BC2_TYPELESS;
355 case SVGA3D_BC2_UNORM_SRGB: return DXGI_FORMAT_BC2_UNORM_SRGB;
356 case SVGA3D_BC3_TYPELESS: return DXGI_FORMAT_BC3_TYPELESS;
357 case SVGA3D_BC3_UNORM_SRGB: return DXGI_FORMAT_BC3_UNORM_SRGB;
358 case SVGA3D_BC4_TYPELESS: return DXGI_FORMAT_BC4_TYPELESS;
359 case SVGA3D_ATI1: break;
360 case SVGA3D_BC4_SNORM: return DXGI_FORMAT_BC4_SNORM;
361 case SVGA3D_BC5_TYPELESS: return DXGI_FORMAT_BC5_TYPELESS;
362 case SVGA3D_ATI2: break;
363 case SVGA3D_BC5_SNORM: return DXGI_FORMAT_BC5_SNORM;
364 case SVGA3D_R10G10B10_XR_BIAS_A2_UNORM: return DXGI_FORMAT_R10G10B10_XR_BIAS_A2_UNORM;
365 case SVGA3D_B8G8R8A8_TYPELESS: return DXGI_FORMAT_B8G8R8A8_TYPELESS;
366 case SVGA3D_B8G8R8A8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8A8_UNORM_SRGB;
367#ifdef DX_REPLACE_X8_WITH_A8
368 case SVGA3D_B8G8R8X8_TYPELESS: return DXGI_FORMAT_B8G8R8A8_TYPELESS;
369 case SVGA3D_B8G8R8X8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8A8_UNORM_SRGB;
370#else
371 case SVGA3D_B8G8R8X8_TYPELESS: return DXGI_FORMAT_B8G8R8X8_TYPELESS;
372 case SVGA3D_B8G8R8X8_UNORM_SRGB: return DXGI_FORMAT_B8G8R8X8_UNORM_SRGB;
373#endif
374 case SVGA3D_Z_DF16: break;
375 case SVGA3D_Z_DF24: break;
376 case SVGA3D_Z_D24S8_INT: return DXGI_FORMAT_D24_UNORM_S8_UINT;
377 case SVGA3D_YV12: break;
378 case SVGA3D_R32G32B32A32_FLOAT: return DXGI_FORMAT_R32G32B32A32_FLOAT;
379 case SVGA3D_R16G16B16A16_FLOAT: return DXGI_FORMAT_R16G16B16A16_FLOAT;
380 case SVGA3D_R16G16B16A16_UNORM: return DXGI_FORMAT_R16G16B16A16_UNORM;
381 case SVGA3D_R32G32_FLOAT: return DXGI_FORMAT_R32G32_FLOAT;
382 case SVGA3D_R10G10B10A2_UNORM: return DXGI_FORMAT_R10G10B10A2_UNORM;
383 case SVGA3D_R8G8B8A8_SNORM: return DXGI_FORMAT_R8G8B8A8_SNORM;
384 case SVGA3D_R16G16_FLOAT: return DXGI_FORMAT_R16G16_FLOAT;
385 case SVGA3D_R16G16_UNORM: return DXGI_FORMAT_R16G16_UNORM;
386 case SVGA3D_R16G16_SNORM: return DXGI_FORMAT_R16G16_SNORM;
387 case SVGA3D_R32_FLOAT: return DXGI_FORMAT_R32_FLOAT;
388 case SVGA3D_R8G8_SNORM: return DXGI_FORMAT_R8G8_SNORM;
389 case SVGA3D_R16_FLOAT: return DXGI_FORMAT_R16_FLOAT;
390 case SVGA3D_D16_UNORM: return DXGI_FORMAT_D16_UNORM;
391 case SVGA3D_A8_UNORM: return DXGI_FORMAT_A8_UNORM;
392 case SVGA3D_BC1_UNORM: return DXGI_FORMAT_BC1_UNORM;
393 case SVGA3D_BC2_UNORM: return DXGI_FORMAT_BC2_UNORM;
394 case SVGA3D_BC3_UNORM: return DXGI_FORMAT_BC3_UNORM;
395 case SVGA3D_B5G6R5_UNORM: return DXGI_FORMAT_B5G6R5_UNORM;
396 case SVGA3D_B5G5R5A1_UNORM: return DXGI_FORMAT_B5G5R5A1_UNORM;
397 case SVGA3D_B8G8R8A8_UNORM: return DXGI_FORMAT_B8G8R8A8_UNORM;
398#ifdef DX_REPLACE_X8_WITH_A8
399 case SVGA3D_B8G8R8X8_UNORM: return DXGI_FORMAT_B8G8R8A8_UNORM;
400#else
401 case SVGA3D_B8G8R8X8_UNORM: return DXGI_FORMAT_B8G8R8X8_UNORM;
402#endif
403 case SVGA3D_BC4_UNORM: return DXGI_FORMAT_BC4_UNORM;
404 case SVGA3D_BC5_UNORM: return DXGI_FORMAT_BC5_UNORM;
405
406 case SVGA3D_B4G4R4A4_UNORM: return DXGI_FORMAT_;
407 case SVGA3D_BC6H_TYPELESS: return DXGI_FORMAT_;
408 case SVGA3D_BC6H_UF16: return DXGI_FORMAT_;
409 case SVGA3D_BC6H_SF16: return DXGI_FORMAT_;
410 case SVGA3D_BC7_TYPELESS: return DXGI_FORMAT_;
411 case SVGA3D_BC7_UNORM: return DXGI_FORMAT_;
412 case SVGA3D_BC7_UNORM_SRGB: return DXGI_FORMAT_;
413 case SVGA3D_AYUV: return DXGI_FORMAT_;
414
415 case SVGA3D_FORMAT_INVALID:
416 case SVGA3D_FORMAT_MAX: break;
417 }
418 // AssertFailed();
419 return DXGI_FORMAT_UNKNOWN;
420#undef DXGI_FORMAT_
421}
422
423
424static SVGA3dSurfaceFormat vmsvgaDXDevCapSurfaceFmt2Format(SVGA3dDevCapIndex enmDevCap)
425{
426 switch (enmDevCap)
427 {
428 case SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8: return SVGA3D_X8R8G8B8;
429 case SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8: return SVGA3D_A8R8G8B8;
430 case SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10: return SVGA3D_A2R10G10B10;
431 case SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5: return SVGA3D_X1R5G5B5;
432 case SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5: return SVGA3D_A1R5G5B5;
433 case SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4: return SVGA3D_A4R4G4B4;
434 case SVGA3D_DEVCAP_SURFACEFMT_R5G6B5: return SVGA3D_R5G6B5;
435 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16: return SVGA3D_LUMINANCE16;
436 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8: return SVGA3D_LUMINANCE8_ALPHA8;
437 case SVGA3D_DEVCAP_SURFACEFMT_ALPHA8: return SVGA3D_ALPHA8;
438 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8: return SVGA3D_LUMINANCE8;
439 case SVGA3D_DEVCAP_SURFACEFMT_Z_D16: return SVGA3D_Z_D16;
440 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8: return SVGA3D_Z_D24S8;
441 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8: return SVGA3D_Z_D24X8;
442 case SVGA3D_DEVCAP_SURFACEFMT_DXT1: return SVGA3D_DXT1;
443 case SVGA3D_DEVCAP_SURFACEFMT_DXT2: return SVGA3D_DXT2;
444 case SVGA3D_DEVCAP_SURFACEFMT_DXT3: return SVGA3D_DXT3;
445 case SVGA3D_DEVCAP_SURFACEFMT_DXT4: return SVGA3D_DXT4;
446 case SVGA3D_DEVCAP_SURFACEFMT_DXT5: return SVGA3D_DXT5;
447 case SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8: return SVGA3D_BUMPX8L8V8U8;
448 case SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10: return SVGA3D_A2W10V10U10;
449 case SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8: return SVGA3D_BUMPU8V8;
450 case SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8: return SVGA3D_Q8W8V8U8;
451 case SVGA3D_DEVCAP_SURFACEFMT_CxV8U8: return SVGA3D_CxV8U8;
452 case SVGA3D_DEVCAP_SURFACEFMT_R_S10E5: return SVGA3D_R_S10E5;
453 case SVGA3D_DEVCAP_SURFACEFMT_R_S23E8: return SVGA3D_R_S23E8;
454 case SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5: return SVGA3D_RG_S10E5;
455 case SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8: return SVGA3D_RG_S23E8;
456 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5: return SVGA3D_ARGB_S10E5;
457 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8: return SVGA3D_ARGB_S23E8;
458 case SVGA3D_DEVCAP_SURFACEFMT_V16U16: return SVGA3D_V16U16;
459 case SVGA3D_DEVCAP_SURFACEFMT_G16R16: return SVGA3D_G16R16;
460 case SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16: return SVGA3D_A16B16G16R16;
461 case SVGA3D_DEVCAP_SURFACEFMT_UYVY: return SVGA3D_UYVY;
462 case SVGA3D_DEVCAP_SURFACEFMT_YUY2: return SVGA3D_YUY2;
463 case SVGA3D_DEVCAP_SURFACEFMT_NV12: return SVGA3D_NV12;
464 case SVGA3D_DEVCAP_DEAD10: return SVGA3D_FORMAT_DEAD2; /* SVGA3D_DEVCAP_SURFACEFMT_AYUV -> SVGA3D_AYUV */
465 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF16: return SVGA3D_Z_DF16;
466 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF24: return SVGA3D_Z_DF24;
467 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT: return SVGA3D_Z_D24S8_INT;
468 case SVGA3D_DEVCAP_SURFACEFMT_ATI1: return SVGA3D_ATI1;
469 case SVGA3D_DEVCAP_SURFACEFMT_ATI2: return SVGA3D_ATI2;
470 case SVGA3D_DEVCAP_SURFACEFMT_YV12: return SVGA3D_YV12;
471 default:
472 AssertFailed();
473 break;
474 }
475 return SVGA3D_FORMAT_INVALID;
476}
477
478
479static SVGA3dSurfaceFormat vmsvgaDXDevCapDxfmt2Format(SVGA3dDevCapIndex enmDevCap)
480{
481 switch (enmDevCap)
482 {
483 case SVGA3D_DEVCAP_DXFMT_X8R8G8B8: return SVGA3D_X8R8G8B8;
484 case SVGA3D_DEVCAP_DXFMT_A8R8G8B8: return SVGA3D_A8R8G8B8;
485 case SVGA3D_DEVCAP_DXFMT_R5G6B5: return SVGA3D_R5G6B5;
486 case SVGA3D_DEVCAP_DXFMT_X1R5G5B5: return SVGA3D_X1R5G5B5;
487 case SVGA3D_DEVCAP_DXFMT_A1R5G5B5: return SVGA3D_A1R5G5B5;
488 case SVGA3D_DEVCAP_DXFMT_A4R4G4B4: return SVGA3D_A4R4G4B4;
489 case SVGA3D_DEVCAP_DXFMT_Z_D32: return SVGA3D_Z_D32;
490 case SVGA3D_DEVCAP_DXFMT_Z_D16: return SVGA3D_Z_D16;
491 case SVGA3D_DEVCAP_DXFMT_Z_D24S8: return SVGA3D_Z_D24S8;
492 case SVGA3D_DEVCAP_DXFMT_Z_D15S1: return SVGA3D_Z_D15S1;
493 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8: return SVGA3D_LUMINANCE8;
494 case SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4: return SVGA3D_LUMINANCE4_ALPHA4;
495 case SVGA3D_DEVCAP_DXFMT_LUMINANCE16: return SVGA3D_LUMINANCE16;
496 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8: return SVGA3D_LUMINANCE8_ALPHA8;
497 case SVGA3D_DEVCAP_DXFMT_DXT1: return SVGA3D_DXT1;
498 case SVGA3D_DEVCAP_DXFMT_DXT2: return SVGA3D_DXT2;
499 case SVGA3D_DEVCAP_DXFMT_DXT3: return SVGA3D_DXT3;
500 case SVGA3D_DEVCAP_DXFMT_DXT4: return SVGA3D_DXT4;
501 case SVGA3D_DEVCAP_DXFMT_DXT5: return SVGA3D_DXT5;
502 case SVGA3D_DEVCAP_DXFMT_BUMPU8V8: return SVGA3D_BUMPU8V8;
503 case SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5: return SVGA3D_BUMPL6V5U5;
504 case SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8: return SVGA3D_BUMPX8L8V8U8;
505 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1: return SVGA3D_FORMAT_DEAD1;
506 case SVGA3D_DEVCAP_DXFMT_ARGB_S10E5: return SVGA3D_ARGB_S10E5;
507 case SVGA3D_DEVCAP_DXFMT_ARGB_S23E8: return SVGA3D_ARGB_S23E8;
508 case SVGA3D_DEVCAP_DXFMT_A2R10G10B10: return SVGA3D_A2R10G10B10;
509 case SVGA3D_DEVCAP_DXFMT_V8U8: return SVGA3D_V8U8;
510 case SVGA3D_DEVCAP_DXFMT_Q8W8V8U8: return SVGA3D_Q8W8V8U8;
511 case SVGA3D_DEVCAP_DXFMT_CxV8U8: return SVGA3D_CxV8U8;
512 case SVGA3D_DEVCAP_DXFMT_X8L8V8U8: return SVGA3D_X8L8V8U8;
513 case SVGA3D_DEVCAP_DXFMT_A2W10V10U10: return SVGA3D_A2W10V10U10;
514 case SVGA3D_DEVCAP_DXFMT_ALPHA8: return SVGA3D_ALPHA8;
515 case SVGA3D_DEVCAP_DXFMT_R_S10E5: return SVGA3D_R_S10E5;
516 case SVGA3D_DEVCAP_DXFMT_R_S23E8: return SVGA3D_R_S23E8;
517 case SVGA3D_DEVCAP_DXFMT_RG_S10E5: return SVGA3D_RG_S10E5;
518 case SVGA3D_DEVCAP_DXFMT_RG_S23E8: return SVGA3D_RG_S23E8;
519 case SVGA3D_DEVCAP_DXFMT_BUFFER: return SVGA3D_BUFFER;
520 case SVGA3D_DEVCAP_DXFMT_Z_D24X8: return SVGA3D_Z_D24X8;
521 case SVGA3D_DEVCAP_DXFMT_V16U16: return SVGA3D_V16U16;
522 case SVGA3D_DEVCAP_DXFMT_G16R16: return SVGA3D_G16R16;
523 case SVGA3D_DEVCAP_DXFMT_A16B16G16R16: return SVGA3D_A16B16G16R16;
524 case SVGA3D_DEVCAP_DXFMT_UYVY: return SVGA3D_UYVY;
525 case SVGA3D_DEVCAP_DXFMT_YUY2: return SVGA3D_YUY2;
526 case SVGA3D_DEVCAP_DXFMT_NV12: return SVGA3D_NV12;
527 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD2: return SVGA3D_FORMAT_DEAD2; /* SVGA3D_DEVCAP_DXFMT_AYUV -> SVGA3D_AYUV */
528 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS: return SVGA3D_R32G32B32A32_TYPELESS;
529 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT: return SVGA3D_R32G32B32A32_UINT;
530 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT: return SVGA3D_R32G32B32A32_SINT;
531 case SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS: return SVGA3D_R32G32B32_TYPELESS;
532 case SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT: return SVGA3D_R32G32B32_FLOAT;
533 case SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT: return SVGA3D_R32G32B32_UINT;
534 case SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT: return SVGA3D_R32G32B32_SINT;
535 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS: return SVGA3D_R16G16B16A16_TYPELESS;
536 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT: return SVGA3D_R16G16B16A16_UINT;
537 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM: return SVGA3D_R16G16B16A16_SNORM;
538 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT: return SVGA3D_R16G16B16A16_SINT;
539 case SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS: return SVGA3D_R32G32_TYPELESS;
540 case SVGA3D_DEVCAP_DXFMT_R32G32_UINT: return SVGA3D_R32G32_UINT;
541 case SVGA3D_DEVCAP_DXFMT_R32G32_SINT: return SVGA3D_R32G32_SINT;
542 case SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS: return SVGA3D_R32G8X24_TYPELESS;
543 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT: return SVGA3D_D32_FLOAT_S8X24_UINT;
544 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24: return SVGA3D_R32_FLOAT_X8X24;
545 case SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT: return SVGA3D_X32_G8X24_UINT;
546 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS: return SVGA3D_R10G10B10A2_TYPELESS;
547 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT: return SVGA3D_R10G10B10A2_UINT;
548 case SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT: return SVGA3D_R11G11B10_FLOAT;
549 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS: return SVGA3D_R8G8B8A8_TYPELESS;
550 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM: return SVGA3D_R8G8B8A8_UNORM;
551 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB: return SVGA3D_R8G8B8A8_UNORM_SRGB;
552 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT: return SVGA3D_R8G8B8A8_UINT;
553 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT: return SVGA3D_R8G8B8A8_SINT;
554 case SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS: return SVGA3D_R16G16_TYPELESS;
555 case SVGA3D_DEVCAP_DXFMT_R16G16_UINT: return SVGA3D_R16G16_UINT;
556 case SVGA3D_DEVCAP_DXFMT_R16G16_SINT: return SVGA3D_R16G16_SINT;
557 case SVGA3D_DEVCAP_DXFMT_R32_TYPELESS: return SVGA3D_R32_TYPELESS;
558 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT: return SVGA3D_D32_FLOAT;
559 case SVGA3D_DEVCAP_DXFMT_R32_UINT: return SVGA3D_R32_UINT;
560 case SVGA3D_DEVCAP_DXFMT_R32_SINT: return SVGA3D_R32_SINT;
561 case SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS: return SVGA3D_R24G8_TYPELESS;
562 case SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT: return SVGA3D_D24_UNORM_S8_UINT;
563 case SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8: return SVGA3D_R24_UNORM_X8;
564 case SVGA3D_DEVCAP_DXFMT_X24_G8_UINT: return SVGA3D_X24_G8_UINT;
565 case SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS: return SVGA3D_R8G8_TYPELESS;
566 case SVGA3D_DEVCAP_DXFMT_R8G8_UNORM: return SVGA3D_R8G8_UNORM;
567 case SVGA3D_DEVCAP_DXFMT_R8G8_UINT: return SVGA3D_R8G8_UINT;
568 case SVGA3D_DEVCAP_DXFMT_R8G8_SINT: return SVGA3D_R8G8_SINT;
569 case SVGA3D_DEVCAP_DXFMT_R16_TYPELESS: return SVGA3D_R16_TYPELESS;
570 case SVGA3D_DEVCAP_DXFMT_R16_UNORM: return SVGA3D_R16_UNORM;
571 case SVGA3D_DEVCAP_DXFMT_R16_UINT: return SVGA3D_R16_UINT;
572 case SVGA3D_DEVCAP_DXFMT_R16_SNORM: return SVGA3D_R16_SNORM;
573 case SVGA3D_DEVCAP_DXFMT_R16_SINT: return SVGA3D_R16_SINT;
574 case SVGA3D_DEVCAP_DXFMT_R8_TYPELESS: return SVGA3D_R8_TYPELESS;
575 case SVGA3D_DEVCAP_DXFMT_R8_UNORM: return SVGA3D_R8_UNORM;
576 case SVGA3D_DEVCAP_DXFMT_R8_UINT: return SVGA3D_R8_UINT;
577 case SVGA3D_DEVCAP_DXFMT_R8_SNORM: return SVGA3D_R8_SNORM;
578 case SVGA3D_DEVCAP_DXFMT_R8_SINT: return SVGA3D_R8_SINT;
579 case SVGA3D_DEVCAP_DXFMT_P8: return SVGA3D_P8;
580 case SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP: return SVGA3D_R9G9B9E5_SHAREDEXP;
581 case SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM: return SVGA3D_R8G8_B8G8_UNORM;
582 case SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM: return SVGA3D_G8R8_G8B8_UNORM;
583 case SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS: return SVGA3D_BC1_TYPELESS;
584 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB: return SVGA3D_BC1_UNORM_SRGB;
585 case SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS: return SVGA3D_BC2_TYPELESS;
586 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB: return SVGA3D_BC2_UNORM_SRGB;
587 case SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS: return SVGA3D_BC3_TYPELESS;
588 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB: return SVGA3D_BC3_UNORM_SRGB;
589 case SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS: return SVGA3D_BC4_TYPELESS;
590 case SVGA3D_DEVCAP_DXFMT_ATI1: return SVGA3D_ATI1;
591 case SVGA3D_DEVCAP_DXFMT_BC4_SNORM: return SVGA3D_BC4_SNORM;
592 case SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS: return SVGA3D_BC5_TYPELESS;
593 case SVGA3D_DEVCAP_DXFMT_ATI2: return SVGA3D_ATI2;
594 case SVGA3D_DEVCAP_DXFMT_BC5_SNORM: return SVGA3D_BC5_SNORM;
595 case SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM: return SVGA3D_R10G10B10_XR_BIAS_A2_UNORM;
596 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS: return SVGA3D_B8G8R8A8_TYPELESS;
597 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB: return SVGA3D_B8G8R8A8_UNORM_SRGB;
598 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS: return SVGA3D_B8G8R8X8_TYPELESS;
599 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB: return SVGA3D_B8G8R8X8_UNORM_SRGB;
600 case SVGA3D_DEVCAP_DXFMT_Z_DF16: return SVGA3D_Z_DF16;
601 case SVGA3D_DEVCAP_DXFMT_Z_DF24: return SVGA3D_Z_DF24;
602 case SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT: return SVGA3D_Z_D24S8_INT;
603 case SVGA3D_DEVCAP_DXFMT_YV12: return SVGA3D_YV12;
604 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT: return SVGA3D_R32G32B32A32_FLOAT;
605 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT: return SVGA3D_R16G16B16A16_FLOAT;
606 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM: return SVGA3D_R16G16B16A16_UNORM;
607 case SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT: return SVGA3D_R32G32_FLOAT;
608 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM: return SVGA3D_R10G10B10A2_UNORM;
609 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM: return SVGA3D_R8G8B8A8_SNORM;
610 case SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT: return SVGA3D_R16G16_FLOAT;
611 case SVGA3D_DEVCAP_DXFMT_R16G16_UNORM: return SVGA3D_R16G16_UNORM;
612 case SVGA3D_DEVCAP_DXFMT_R16G16_SNORM: return SVGA3D_R16G16_SNORM;
613 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT: return SVGA3D_R32_FLOAT;
614 case SVGA3D_DEVCAP_DXFMT_R8G8_SNORM: return SVGA3D_R8G8_SNORM;
615 case SVGA3D_DEVCAP_DXFMT_R16_FLOAT: return SVGA3D_R16_FLOAT;
616 case SVGA3D_DEVCAP_DXFMT_D16_UNORM: return SVGA3D_D16_UNORM;
617 case SVGA3D_DEVCAP_DXFMT_A8_UNORM: return SVGA3D_A8_UNORM;
618 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM: return SVGA3D_BC1_UNORM;
619 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM: return SVGA3D_BC2_UNORM;
620 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM: return SVGA3D_BC3_UNORM;
621 case SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM: return SVGA3D_B5G6R5_UNORM;
622 case SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM: return SVGA3D_B5G5R5A1_UNORM;
623 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM: return SVGA3D_B8G8R8A8_UNORM;
624 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM: return SVGA3D_B8G8R8X8_UNORM;
625 case SVGA3D_DEVCAP_DXFMT_BC4_UNORM: return SVGA3D_BC4_UNORM;
626 case SVGA3D_DEVCAP_DXFMT_BC5_UNORM: return SVGA3D_BC5_UNORM;
627 case SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS: return SVGA3D_BC6H_TYPELESS;
628 case SVGA3D_DEVCAP_DXFMT_BC6H_UF16: return SVGA3D_BC6H_UF16;
629 case SVGA3D_DEVCAP_DXFMT_BC6H_SF16: return SVGA3D_BC6H_SF16;
630 case SVGA3D_DEVCAP_DXFMT_BC7_TYPELESS: return SVGA3D_BC7_TYPELESS;
631 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM: return SVGA3D_BC7_UNORM;
632 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM_SRGB: return SVGA3D_BC7_UNORM_SRGB;
633 default:
634 AssertFailed();
635 break;
636 }
637 return SVGA3D_FORMAT_INVALID;
638}
639
640
641static int vmsvgaDXCheckFormatSupportPreDX(PVMSVGA3DSTATE pState, SVGA3dSurfaceFormat enmFormat, uint32_t *pu32DevCap)
642{
643 int rc = VINF_SUCCESS;
644
645 *pu32DevCap = 0;
646
647 DXGI_FORMAT const dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(enmFormat);
648 if (dxgiFormat != DXGI_FORMAT_UNKNOWN)
649 {
650 RT_NOREF(pState);
651 /** @todo Implement */
652 }
653 else
654 rc = VERR_NOT_SUPPORTED;
655 return rc;
656}
657
658static int vmsvgaDXCheckFormatSupport(PVMSVGA3DSTATE pState, SVGA3dSurfaceFormat enmFormat, uint32_t *pu32DevCap)
659{
660 int rc = VINF_SUCCESS;
661
662 *pu32DevCap = 0;
663
664 DXGI_FORMAT const dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(enmFormat);
665 if (dxgiFormat != DXGI_FORMAT_UNKNOWN)
666 {
667 ID3D11Device *pDevice = pState->pBackend->device.pDevice;
668 UINT FormatSupport = 0;
669 HRESULT hr = pDevice->CheckFormatSupport(dxgiFormat, &FormatSupport);
670 if (SUCCEEDED(hr))
671 {
672 *pu32DevCap |= SVGA3D_DXFMT_SUPPORTED;
673
674 if (FormatSupport & D3D11_FORMAT_SUPPORT_SHADER_SAMPLE)
675 *pu32DevCap |= SVGA3D_DXFMT_SHADER_SAMPLE;
676
677 if (FormatSupport & D3D11_FORMAT_SUPPORT_RENDER_TARGET)
678 *pu32DevCap |= SVGA3D_DXFMT_COLOR_RENDERTARGET;
679
680 if (FormatSupport & D3D11_FORMAT_SUPPORT_DEPTH_STENCIL)
681 *pu32DevCap |= SVGA3D_DXFMT_DEPTH_RENDERTARGET;
682
683 if (FormatSupport & D3D11_FORMAT_SUPPORT_BLENDABLE)
684 *pu32DevCap |= SVGA3D_DXFMT_BLENDABLE;
685
686 if (FormatSupport & D3D11_FORMAT_SUPPORT_MIP)
687 *pu32DevCap |= SVGA3D_DXFMT_MIPS;
688
689 if (FormatSupport & D3D11_FORMAT_SUPPORT_TEXTURECUBE)
690 *pu32DevCap |= SVGA3D_DXFMT_ARRAY;
691
692 if (FormatSupport & D3D11_FORMAT_SUPPORT_TEXTURE3D)
693 *pu32DevCap |= SVGA3D_DXFMT_VOLUME;
694
695 if (FormatSupport & D3D11_FORMAT_SUPPORT_IA_VERTEX_BUFFER)
696 *pu32DevCap |= SVGA3D_DXFMT_DX_VERTEX_BUFFER;
697
698 UINT NumQualityLevels;
699 hr = pDevice->CheckMultisampleQualityLevels(dxgiFormat, 2, &NumQualityLevels);
700 if (SUCCEEDED(hr) && NumQualityLevels != 0)
701 *pu32DevCap |= SVGA3D_DXFMT_MULTISAMPLE;
702 }
703 else
704 AssertFailedStmt(rc = VERR_NOT_SUPPORTED);
705 }
706 else
707 rc = VERR_NOT_SUPPORTED;
708 return rc;
709}
710
711
712static int dxDeviceCreate(PVMSVGA3DBACKEND pBackend, DXDEVICE *pDevice)
713{
714 int rc = VINF_SUCCESS;
715
716 IDXGIAdapter *pAdapter = NULL; /* Default adapter. */
717 static D3D_FEATURE_LEVEL const s_aFeatureLevels[] =
718 {
719 /// @todo Requires a Windows 8+ _SDKS: D3D_FEATURE_LEVEL_11_1,
720 D3D_FEATURE_LEVEL_11_0
721 };
722 UINT Flags = D3D11_CREATE_DEVICE_BGRA_SUPPORT;
723#ifdef DEBUG
724 Flags |= D3D11_CREATE_DEVICE_DEBUG;
725#endif
726
727 HRESULT hr = pBackend->pfnD3D11CreateDevice(pAdapter,
728 D3D_DRIVER_TYPE_HARDWARE,
729 NULL,
730 Flags,
731 s_aFeatureLevels,
732 RT_ELEMENTS(s_aFeatureLevels),
733 D3D11_SDK_VERSION,
734 &pDevice->pDevice,
735 &pDevice->FeatureLevel,
736 &pDevice->pImmediateContext);
737 if (SUCCEEDED(hr))
738 {
739 LogRel(("VMSVGA: Feature level %#x\n", pDevice->FeatureLevel));
740
741#ifdef DEBUG
742 /* Break into debugger when DX runtime detects anything unusual. */
743 HRESULT hr2;
744 ID3D11Debug *pDebug = 0;
745 hr2 = pDevice->pDevice->QueryInterface(__uuidof(ID3D11Debug), (void**)&pDebug);
746 if (SUCCEEDED(hr2))
747 {
748 ID3D11InfoQueue *pInfoQueue = 0;
749 hr2 = pDebug->QueryInterface(__uuidof(ID3D11InfoQueue), (void**)&pInfoQueue);
750 if (SUCCEEDED(hr2))
751 {
752 pInfoQueue->SetBreakOnSeverity(D3D11_MESSAGE_SEVERITY_CORRUPTION, true);
753 pInfoQueue->SetBreakOnSeverity(D3D11_MESSAGE_SEVERITY_ERROR, true);
754 pInfoQueue->SetBreakOnSeverity(D3D11_MESSAGE_SEVERITY_WARNING, true);
755
756 /* No breakpoints for the following messages. */
757 D3D11_MESSAGE_ID saIgnoredMessageIds[] =
758 {
759 /* Message ID: Caused by: */
760 D3D11_MESSAGE_ID_CREATEINPUTLAYOUT_TYPE_MISMATCH, /* Autogenerated input signatures. */
761 D3D11_MESSAGE_ID_LIVE_DEVICE, /* Live object report. Does not seem to prevent a breakpoint. */
762 (D3D11_MESSAGE_ID)3146081 /*DEVICE_DRAW_RENDERTARGETVIEW_NOT_SET*/, /* U. */
763 D3D11_MESSAGE_ID_DEVICE_DRAW_SAMPLER_NOT_SET, /* U. */
764 D3D11_MESSAGE_ID_DEVICE_DRAW_SAMPLER_MISMATCH, /* U. */
765 D3D11_MESSAGE_ID_CREATEINPUTLAYOUT_EMPTY_LAYOUT, /* P. */
766 };
767
768 D3D11_INFO_QUEUE_FILTER filter;
769 RT_ZERO(filter);
770 filter.DenyList.NumIDs = RT_ELEMENTS(saIgnoredMessageIds);
771 filter.DenyList.pIDList = saIgnoredMessageIds;
772 pInfoQueue->AddStorageFilterEntries(&filter);
773
774 D3D_RELEASE(pInfoQueue);
775 }
776 D3D_RELEASE(pDebug);
777 }
778#endif
779
780 IDXGIDevice *pDxgiDevice = 0;
781 hr = pDevice->pDevice->QueryInterface(__uuidof(IDXGIDevice), (void**)&pDxgiDevice);
782 if (SUCCEEDED(hr))
783 {
784 IDXGIAdapter *pDxgiAdapter = 0;
785 hr = pDxgiDevice->GetParent(__uuidof(IDXGIAdapter), (void**)&pDxgiAdapter);
786 if (SUCCEEDED(hr))
787 {
788 hr = pDxgiAdapter->GetParent(__uuidof(IDXGIFactory), (void**)&pDevice->pDxgiFactory);
789 D3D_RELEASE(pDxgiAdapter);
790 }
791
792 D3D_RELEASE(pDxgiDevice);
793 }
794 }
795
796 if (FAILED(hr))
797 rc = VERR_NOT_SUPPORTED;
798
799 return rc;
800}
801
802
803static void dxDeviceDestroy(PVMSVGA3DBACKEND pBackend, DXDEVICE *pDevice)
804{
805 RT_NOREF(pBackend);
806
807 D3D_RELEASE(pDevice->pStagingBuffer);
808
809 if (pDevice->pImmediateContext)
810 pDevice->pImmediateContext->ClearState();
811
812 D3D_RELEASE(pDevice->pDxgiFactory);
813 D3D_RELEASE(pDevice->pImmediateContext);
814
815#ifdef DEBUG
816 HRESULT hr2;
817 ID3D11Debug *pDebug = 0;
818 hr2 = pDevice->pDevice->QueryInterface(__uuidof(ID3D11Debug), (void**)&pDebug);
819 if (SUCCEEDED(hr2))
820 {
821 //pDebug->ReportLiveDeviceObjects(D3D11_RLDO_DETAIL | (D3D11_RLDO_FLAGS)0x4 /*D3D11_RLDO_IGNORE_INTERNAL*/);
822 D3D_RELEASE(pDebug);
823 }
824#endif
825
826 D3D_RELEASE(pDevice->pDevice);
827 RT_ZERO(*pDevice);
828}
829
830
831DECLINLINE(bool) dxIsSurfaceShareable(PVMSVGA3DSURFACE pSurface)
832{
833 /* It is not expected that volume textures will be shared between contexts. */
834 if (pSurface->surfaceFlags & SVGA3D_SURFACE_VOLUME)
835 return false;
836
837 return pSurface->surfaceFlags & SVGA3D_SURFACE_SCREENTARGET
838 || pSurface->surfaceFlags & SVGA3D_SURFACE_BIND_RENDER_TARGET;
839}
840
841
842DXDEVICE *dxDeviceFromCid(uint32_t cid, PVMSVGA3DSTATE pState)
843{
844 if (cid != DX_CID_BACKEND)
845 {
846 VMSVGA3DDXCONTEXT *pDXContext;
847 int rc = vmsvga3dDXContextFromCid(pState, cid, &pDXContext);
848 if (RT_SUCCESS(rc))
849 return &pDXContext->pBackendDXContext->device;
850 }
851 else
852 return &pState->pBackend->device;
853
854 AssertFailed();
855 return NULL;
856}
857
858
859static int dxDeviceFlush(DXDEVICE *pDevice)
860{
861 /** @todo Should the flush follow the query submission? */
862 pDevice->pImmediateContext->Flush();
863
864 ID3D11Query *pQuery = 0;
865 D3D11_QUERY_DESC qd;
866 RT_ZERO(qd);
867 qd.Query = D3D11_QUERY_EVENT;
868
869 HRESULT hr = pDevice->pDevice->CreateQuery(&qd, &pQuery);
870 Assert(hr == S_OK); RT_NOREF(hr);
871 pDevice->pImmediateContext->End(pQuery);
872
873 BOOL queryData;
874 while (pDevice->pImmediateContext->GetData(pQuery, &queryData, sizeof(queryData), 0) != S_OK)
875 RTThreadYield();
876
877 D3D_RELEASE(pQuery);
878
879 return VINF_SUCCESS;
880}
881
882
883static int dxContextWait(uint32_t cidDrawing, PVMSVGA3DSTATE pState)
884{
885 /* Flush cidDrawing context and issue a query. */
886 DXDEVICE *pDXDevice = dxDeviceFromCid(cidDrawing, pState);
887 return dxDeviceFlush(pDXDevice);
888}
889
890
891static ID3D11Resource *dxResource(PVMSVGA3DSTATE pState, PVMSVGA3DSURFACE pSurface, VMSVGA3DDXCONTEXT *pDXContext)
892{
893 VMSVGA3DBACKENDSURFACE *pBackendSurface = pSurface->pBackendSurface;
894 if (!pBackendSurface)
895 AssertFailedReturn(NULL);
896
897 uint32_t const cidRequesting = pDXContext ? pDXContext->cid : DX_CID_BACKEND;
898 if (cidRequesting == pSurface->idAssociatedContext)
899 return pBackendSurface->u.pResource;
900
901 AssertReturn(pDXContext, NULL);
902
903 /*
904 * Another context is requesting.
905 */
906 Assert(dxIsSurfaceShareable(pSurface));
907 Assert(pSurface->idAssociatedContext == DX_CID_BACKEND);
908
909 DXSHAREDTEXTURE *pSharedTexture = (DXSHAREDTEXTURE *)RTAvlU32Get(&pBackendSurface->SharedTextureTree, pDXContext->cid);
910 if (!pSharedTexture)
911 {
912 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
913 AssertReturn(pDevice->pDevice, NULL);
914
915 AssertReturn(pBackendSurface->SharedHandle, NULL);
916
917 /* This context has not yet opened the texture. */
918 pSharedTexture = (DXSHAREDTEXTURE *)RTMemAllocZ(sizeof(DXSHAREDTEXTURE));
919 AssertReturn(pSharedTexture, NULL);
920
921 pSharedTexture->Core.Key = pDXContext->cid;
922 bool const fSuccess = RTAvlU32Insert(&pBackendSurface->SharedTextureTree, &pSharedTexture->Core);
923 AssertReturn(fSuccess, NULL);
924
925 HRESULT hr = pDevice->pDevice->OpenSharedResource(pBackendSurface->SharedHandle, __uuidof(ID3D11Texture2D), (void**)&pSharedTexture->pTexture);
926 Assert(SUCCEEDED(hr));
927 if (SUCCEEDED(hr))
928 pSharedTexture->sid = pSurface->id;
929 else
930 {
931 RTAvlU32Remove(&pBackendSurface->SharedTextureTree, pDXContext->cid);
932 RTMemFree(pSharedTexture);
933 return NULL;
934 }
935 }
936
937 /* Wait for drawing to finish. */
938 if (pBackendSurface->cidDrawing != SVGA_ID_INVALID)
939 {
940 if (pBackendSurface->cidDrawing != pDXContext->cid)
941 {
942 dxContextWait(pBackendSurface->cidDrawing, pState);
943 pBackendSurface->cidDrawing = SVGA_ID_INVALID;
944 }
945 }
946
947 return pSharedTexture->pTexture;
948}
949
950
951static int dxTrackRenderTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
952{
953 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
954 AssertReturn(pState, VERR_INVALID_STATE);
955
956 for (int i = 0; i < RT_ELEMENTS(pDXContext->svgaDXContext.renderState.renderTargetViewIds); ++i)
957 {
958 uint32_t const renderTargetViewId = pDXContext->svgaDXContext.renderState.renderTargetViewIds[i];
959 if (renderTargetViewId == SVGA_ID_INVALID)
960 continue;
961
962 AssertContinue(renderTargetViewId < pDXContext->cot.cRTView);
963
964 SVGACOTableDXRTViewEntry const *pRTViewEntry = &pDXContext->cot.paRTView[renderTargetViewId];
965
966 PVMSVGA3DSURFACE pSurface;
967 int rc = vmsvga3dSurfaceFromSid(pState, pRTViewEntry->sid, &pSurface);
968 if ( RT_SUCCESS(rc)
969 && pSurface->pBackendSurface)
970 {
971 pSurface->pBackendSurface->cidDrawing = pDXContext->cid;
972 }
973 }
974 return VINF_SUCCESS;
975}
976
977
978static int dxDefineStreamOutput(PVMSVGA3DDXCONTEXT pDXContext, SVGA3dStreamOutputId soid, SVGACOTableDXStreamOutputEntry const *pEntry)
979{
980 DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[soid];
981
982 /* Make D3D11_SO_DECLARATION_ENTRY array from SVGA3dStreamOutputDeclarationEntry. */
983 pDXStreamOutput->cDeclarationEntry = pEntry->numOutputStreamEntries;
984 for (uint32_t i = 0; i < pDXStreamOutput->cDeclarationEntry; ++i)
985 {
986 D3D11_SO_DECLARATION_ENTRY *pDst = &pDXStreamOutput->aDeclarationEntry[i];
987 SVGA3dStreamOutputDeclarationEntry const *pSrc = &pEntry->decl[i];
988
989 uint32_t const registerMask = pSrc->registerMask & 0xF;
990 unsigned const iFirstBit = ASMBitFirstSetU32(registerMask);
991 unsigned const iLastBit = ASMBitLastSetU32(registerMask);
992
993 pDst->Stream = pSrc->stream;
994 pDst->SemanticName = NULL; /* Will be taken from the shader output declaration. */
995 pDst->SemanticIndex = 0;
996 pDst->StartComponent = iFirstBit > 0 ? iFirstBit - 1 : 0;
997 pDst->ComponentCount = iFirstBit > 0 ? iLastBit - (iFirstBit - 1) : 0;
998 pDst->OutputSlot = pSrc->outputSlot;
999 }
1000
1001 return VINF_SUCCESS;
1002}
1003
1004static void dxDestroyStreamOutput(DXSTREAMOUTPUT *pDXStreamOutput)
1005{
1006 RT_NOREF(pDXStreamOutput);
1007}
1008
1009static D3D11_BLEND dxBlendFactorAlpha(uint8_t svgaBlend)
1010{
1011 /* "Blend options that end in _COLOR are not allowed." but the guest sometimes sends them. */
1012 switch (svgaBlend)
1013 {
1014 case SVGA3D_BLENDOP_SRCCOLOR: return D3D11_BLEND_SRC_ALPHA;
1015 case SVGA3D_BLENDOP_INVSRCCOLOR: return D3D11_BLEND_INV_SRC_ALPHA;
1016 case SVGA3D_BLENDOP_DESTCOLOR: return D3D11_BLEND_DEST_ALPHA;
1017 case SVGA3D_BLENDOP_INVDESTCOLOR: return D3D11_BLEND_INV_DEST_ALPHA;
1018 case SVGA3D_BLENDOP_SRC1COLOR: return D3D11_BLEND_SRC1_ALPHA;
1019 case SVGA3D_BLENDOP_INVSRC1COLOR: return D3D11_BLEND_INV_SRC1_ALPHA;
1020 default:
1021 break;
1022 }
1023 return (D3D11_BLEND)svgaBlend;
1024}
1025
1026
1027static D3D11_BLEND dxBlendFactorColor(uint8_t svgaBlend)
1028{
1029 return (D3D11_BLEND)svgaBlend;
1030}
1031
1032
1033static D3D11_BLEND_OP dxBlendOp(uint8_t svgaBlendEq)
1034{
1035 return (D3D11_BLEND_OP)svgaBlendEq;
1036}
1037
1038
1039/** @todo AssertCompile for types like D3D11_COMPARISON_FUNC and SVGA3dComparisonFunc */
1040static HRESULT dxBlendStateCreate(DXDEVICE *pDevice, SVGACOTableDXBlendStateEntry const *pEntry, ID3D11BlendState **pp)
1041{
1042 D3D11_BLEND_DESC BlendDesc;
1043 BlendDesc.AlphaToCoverageEnable = RT_BOOL(pEntry->alphaToCoverageEnable);
1044 BlendDesc.IndependentBlendEnable = RT_BOOL(pEntry->independentBlendEnable);
1045 for (int i = 0; i < SVGA3D_MAX_RENDER_TARGETS; ++i)
1046 {
1047 BlendDesc.RenderTarget[i].BlendEnable = RT_BOOL(pEntry->perRT[i].blendEnable);
1048 BlendDesc.RenderTarget[i].SrcBlend = dxBlendFactorColor(pEntry->perRT[i].srcBlend);
1049 BlendDesc.RenderTarget[i].DestBlend = dxBlendFactorColor(pEntry->perRT[i].destBlend);
1050 BlendDesc.RenderTarget[i].BlendOp = dxBlendOp (pEntry->perRT[i].blendOp);
1051 BlendDesc.RenderTarget[i].SrcBlendAlpha = dxBlendFactorAlpha(pEntry->perRT[i].srcBlendAlpha);
1052 BlendDesc.RenderTarget[i].DestBlendAlpha = dxBlendFactorAlpha(pEntry->perRT[i].destBlendAlpha);
1053 BlendDesc.RenderTarget[i].BlendOpAlpha = dxBlendOp (pEntry->perRT[i].blendOpAlpha);
1054 BlendDesc.RenderTarget[i].RenderTargetWriteMask = pEntry->perRT[i].renderTargetWriteMask;
1055 /** @todo logicOpEnable and logicOp */
1056 }
1057
1058 HRESULT hr = pDevice->pDevice->CreateBlendState(&BlendDesc, pp);
1059 Assert(SUCCEEDED(hr));
1060 return hr;
1061}
1062
1063
1064static HRESULT dxDepthStencilStateCreate(DXDEVICE *pDevice, SVGACOTableDXDepthStencilEntry const *pEntry, ID3D11DepthStencilState **pp)
1065{
1066 D3D11_DEPTH_STENCIL_DESC desc;
1067 desc.DepthEnable = pEntry->depthEnable;
1068 desc.DepthWriteMask = (D3D11_DEPTH_WRITE_MASK)pEntry->depthWriteMask;
1069 desc.DepthFunc = (D3D11_COMPARISON_FUNC)pEntry->depthFunc;
1070 desc.StencilEnable = pEntry->stencilEnable;
1071 desc.StencilReadMask = pEntry->stencilReadMask;
1072 desc.StencilWriteMask = pEntry->stencilWriteMask;
1073 desc.FrontFace.StencilFailOp = (D3D11_STENCIL_OP)pEntry->frontStencilFailOp;
1074 desc.FrontFace.StencilDepthFailOp = (D3D11_STENCIL_OP)pEntry->frontStencilDepthFailOp;
1075 desc.FrontFace.StencilPassOp = (D3D11_STENCIL_OP)pEntry->frontStencilPassOp;
1076 desc.FrontFace.StencilFunc = (D3D11_COMPARISON_FUNC)pEntry->frontStencilFunc;
1077 desc.BackFace.StencilFailOp = (D3D11_STENCIL_OP)pEntry->backStencilFailOp;
1078 desc.BackFace.StencilDepthFailOp = (D3D11_STENCIL_OP)pEntry->backStencilDepthFailOp;
1079 desc.BackFace.StencilPassOp = (D3D11_STENCIL_OP)pEntry->backStencilPassOp;
1080 desc.BackFace.StencilFunc = (D3D11_COMPARISON_FUNC)pEntry->backStencilFunc;
1081 /** @todo frontEnable, backEnable */
1082
1083 HRESULT hr = pDevice->pDevice->CreateDepthStencilState(&desc, pp);
1084 Assert(SUCCEEDED(hr));
1085 return hr;
1086}
1087
1088
1089static HRESULT dxSamplerStateCreate(DXDEVICE *pDevice, SVGACOTableDXSamplerEntry const *pEntry, ID3D11SamplerState **pp)
1090{
1091 D3D11_SAMPLER_DESC desc;
1092 /* Guest sometimes sends inconsistent (from D3D11 point of view) set of filter flags. */
1093 if (pEntry->filter & SVGA3D_FILTER_ANISOTROPIC)
1094 desc.Filter = (pEntry->filter & SVGA3D_FILTER_COMPARE)
1095 ? D3D11_FILTER_COMPARISON_ANISOTROPIC
1096 : D3D11_FILTER_ANISOTROPIC;
1097 else
1098 desc.Filter = (D3D11_FILTER)pEntry->filter;
1099 desc.AddressU = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressU;
1100 desc.AddressV = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressV;
1101 desc.AddressW = (D3D11_TEXTURE_ADDRESS_MODE)pEntry->addressW;
1102 desc.MipLODBias = pEntry->mipLODBias;
1103 desc.MaxAnisotropy = RT_CLAMP(pEntry->maxAnisotropy, 1, 16); /* "Valid values are between 1 and 16" */
1104 desc.ComparisonFunc = (D3D11_COMPARISON_FUNC)pEntry->comparisonFunc;
1105 desc.BorderColor[0] = pEntry->borderColor.value[0];
1106 desc.BorderColor[1] = pEntry->borderColor.value[1];
1107 desc.BorderColor[2] = pEntry->borderColor.value[2];
1108 desc.BorderColor[3] = pEntry->borderColor.value[3];
1109 desc.MinLOD = pEntry->minLOD;
1110 desc.MaxLOD = pEntry->maxLOD;
1111
1112 HRESULT hr = pDevice->pDevice->CreateSamplerState(&desc, pp);
1113 Assert(SUCCEEDED(hr));
1114 return hr;
1115}
1116
1117
1118static HRESULT dxRasterizerStateCreate(DXDEVICE *pDevice, SVGACOTableDXRasterizerStateEntry const *pEntry, ID3D11RasterizerState **pp)
1119{
1120 D3D11_RASTERIZER_DESC desc;
1121 desc.FillMode = (D3D11_FILL_MODE)pEntry->fillMode;
1122 desc.CullMode = (D3D11_CULL_MODE)pEntry->cullMode;
1123 desc.FrontCounterClockwise = pEntry->frontCounterClockwise;
1124 /** @todo provokingVertexLast */
1125 desc.DepthBias = pEntry->depthBias;
1126 desc.DepthBiasClamp = pEntry->depthBiasClamp;
1127 desc.SlopeScaledDepthBias = pEntry->slopeScaledDepthBias;
1128 desc.DepthClipEnable = pEntry->depthClipEnable;
1129 desc.ScissorEnable = pEntry->scissorEnable;
1130 desc.MultisampleEnable = pEntry->multisampleEnable;
1131 desc.AntialiasedLineEnable = pEntry->antialiasedLineEnable;
1132 /** @todo lineWidth lineStippleEnable lineStippleFactor lineStipplePattern forcedSampleCount */
1133
1134 HRESULT hr = pDevice->pDevice->CreateRasterizerState(&desc, pp);
1135 Assert(SUCCEEDED(hr));
1136 return hr;
1137}
1138
1139
1140static HRESULT dxRenderTargetViewCreate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableDXRTViewEntry const *pEntry, VMSVGA3DSURFACE *pSurface, ID3D11RenderTargetView **pp)
1141{
1142 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
1143
1144 ID3D11Resource *pResource = dxResource(pThisCC->svga.p3dState, pSurface, pDXContext);
1145
1146 D3D11_RENDER_TARGET_VIEW_DESC desc;
1147 RT_ZERO(desc);
1148 desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
1149 AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN, E_FAIL);
1150 switch (pEntry->resourceDimension)
1151 {
1152 case SVGA3D_RESOURCE_BUFFER:
1153 desc.ViewDimension = D3D11_RTV_DIMENSION_BUFFER;
1154 desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
1155 desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
1156 break;
1157 case SVGA3D_RESOURCE_TEXTURE1D:
1158 if (pEntry->desc.tex.arraySize <= 1)
1159 {
1160 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE1D;
1161 desc.Texture1D.MipSlice = pEntry->desc.tex.mipSlice;
1162 }
1163 else
1164 {
1165 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE1DARRAY;
1166 desc.Texture1DArray.MipSlice = pEntry->desc.tex.mipSlice;
1167 desc.Texture1DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1168 desc.Texture1DArray.ArraySize = pEntry->desc.tex.arraySize;
1169 }
1170 break;
1171 case SVGA3D_RESOURCE_TEXTURE2D:
1172 if (pEntry->desc.tex.arraySize <= 1)
1173 {
1174 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2D;
1175 desc.Texture2D.MipSlice = pEntry->desc.tex.mipSlice;
1176 }
1177 else
1178 {
1179 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2DARRAY;
1180 desc.Texture2DArray.MipSlice = pEntry->desc.tex.mipSlice;
1181 desc.Texture2DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1182 desc.Texture2DArray.ArraySize = pEntry->desc.tex.arraySize;
1183 }
1184 break;
1185 case SVGA3D_RESOURCE_TEXTURE3D:
1186 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE3D;
1187 desc.Texture3D.MipSlice = pEntry->desc.tex3D.mipSlice;
1188 desc.Texture3D.FirstWSlice = pEntry->desc.tex3D.firstW;
1189 desc.Texture3D.WSize = pEntry->desc.tex3D.wSize;
1190 break;
1191 case SVGA3D_RESOURCE_TEXTURECUBE:
1192 AssertFailed(); /** @todo test. Probably not applicable to a render target view. */
1193 desc.ViewDimension = D3D11_RTV_DIMENSION_TEXTURE2DARRAY;
1194 desc.Texture2DArray.MipSlice = pEntry->desc.tex.mipSlice;
1195 desc.Texture2DArray.FirstArraySlice = 0;
1196 desc.Texture2DArray.ArraySize = 6;
1197 break;
1198 case SVGA3D_RESOURCE_BUFFEREX:
1199 AssertFailed(); /** @todo test. Probably not applicable to a render target view. */
1200 desc.ViewDimension = D3D11_RTV_DIMENSION_BUFFER;
1201 desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
1202 desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
1203 break;
1204 default:
1205 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
1206 }
1207
1208 HRESULT hr = pDevice->pDevice->CreateRenderTargetView(pResource, &desc, pp);
1209 Assert(SUCCEEDED(hr));
1210 return hr;
1211}
1212
1213
1214static HRESULT dxShaderResourceViewCreate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableDXSRViewEntry const *pEntry, VMSVGA3DSURFACE *pSurface, ID3D11ShaderResourceView **pp)
1215{
1216 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
1217
1218 ID3D11Resource *pResource = dxResource(pThisCC->svga.p3dState, pSurface, pDXContext);
1219
1220 D3D11_SHADER_RESOURCE_VIEW_DESC desc;
1221 RT_ZERO(desc);
1222 desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
1223 AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN, E_FAIL);
1224
1225 switch (pEntry->resourceDimension)
1226 {
1227 case SVGA3D_RESOURCE_BUFFER:
1228 desc.ViewDimension = D3D11_SRV_DIMENSION_BUFFER;
1229 desc.Buffer.FirstElement = pEntry->desc.buffer.firstElement;
1230 desc.Buffer.NumElements = pEntry->desc.buffer.numElements;
1231 break;
1232 case SVGA3D_RESOURCE_TEXTURE1D:
1233 if (pEntry->desc.tex.arraySize <= 1)
1234 {
1235 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE1D;
1236 desc.Texture1D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1237 desc.Texture1D.MipLevels = pEntry->desc.tex.mipLevels;
1238 }
1239 else
1240 {
1241 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE1DARRAY;
1242 desc.Texture1DArray.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1243 desc.Texture1DArray.MipLevels = pEntry->desc.tex.mipLevels;
1244 desc.Texture1DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1245 desc.Texture1DArray.ArraySize = pEntry->desc.tex.arraySize;
1246 }
1247 break;
1248 case SVGA3D_RESOURCE_TEXTURE2D:
1249 if (pEntry->desc.tex.arraySize <= 1)
1250 {
1251 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE2D;
1252 desc.Texture2D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1253 desc.Texture2D.MipLevels = pEntry->desc.tex.mipLevels;
1254 }
1255 else
1256 {
1257 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE2DARRAY;
1258 desc.Texture2DArray.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1259 desc.Texture2DArray.MipLevels = pEntry->desc.tex.mipLevels;
1260 desc.Texture2DArray.FirstArraySlice = pEntry->desc.tex.firstArraySlice;
1261 desc.Texture2DArray.ArraySize = pEntry->desc.tex.arraySize;
1262 }
1263 break;
1264 case SVGA3D_RESOURCE_TEXTURE3D:
1265 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURE3D;
1266 desc.Texture3D.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1267 desc.Texture3D.MipLevels = pEntry->desc.tex.mipLevels;
1268 break;
1269 case SVGA3D_RESOURCE_TEXTURECUBE:
1270 desc.ViewDimension = D3D11_SRV_DIMENSION_TEXTURECUBE;
1271 desc.TextureCube.MostDetailedMip = pEntry->desc.tex.mostDetailedMip;
1272 desc.TextureCube.MipLevels = pEntry->desc.tex.mipLevels;
1273 break;
1274 case SVGA3D_RESOURCE_BUFFEREX:
1275 AssertFailed(); /** @todo test. */
1276 desc.ViewDimension = D3D11_SRV_DIMENSION_BUFFEREX;
1277 desc.BufferEx.FirstElement = pEntry->desc.bufferex.firstElement;
1278 desc.BufferEx.NumElements = pEntry->desc.bufferex.numElements;
1279 desc.BufferEx.Flags = pEntry->desc.bufferex.flags;
1280 break;
1281 default:
1282 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
1283 }
1284
1285 HRESULT hr = pDevice->pDevice->CreateShaderResourceView(pResource, &desc, pp);
1286 Assert(SUCCEEDED(hr));
1287 return hr;
1288}
1289
1290
1291static HRESULT dxDepthStencilViewCreate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableDXDSViewEntry const *pEntry, VMSVGA3DSURFACE *pSurface, ID3D11DepthStencilView **pp)
1292{
1293 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
1294
1295 ID3D11Resource *pResource = dxResource(pThisCC->svga.p3dState, pSurface, pDXContext);
1296
1297 D3D11_DEPTH_STENCIL_VIEW_DESC desc;
1298 RT_ZERO(desc);
1299 desc.Format = vmsvgaDXSurfaceFormat2Dxgi(pEntry->format);
1300 AssertReturn(desc.Format != DXGI_FORMAT_UNKNOWN, E_FAIL);
1301 desc.Flags = pEntry->flags;
1302 switch (pEntry->resourceDimension)
1303 {
1304 case SVGA3D_RESOURCE_TEXTURE1D:
1305 if (pEntry->arraySize <= 1)
1306 {
1307 desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE1D;
1308 desc.Texture1D.MipSlice = pEntry->mipSlice;
1309 }
1310 else
1311 {
1312 desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE1DARRAY;
1313 desc.Texture1DArray.MipSlice = pEntry->mipSlice;
1314 desc.Texture1DArray.FirstArraySlice = pEntry->firstArraySlice;
1315 desc.Texture1DArray.ArraySize = pEntry->arraySize;
1316 }
1317 break;
1318 case SVGA3D_RESOURCE_TEXTURE2D:
1319 if (pEntry->arraySize <= 1)
1320 {
1321 desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE2D;
1322 desc.Texture2D.MipSlice = pEntry->mipSlice;
1323 }
1324 else
1325 {
1326 desc.ViewDimension = D3D11_DSV_DIMENSION_TEXTURE2DARRAY;
1327 desc.Texture2DArray.MipSlice = pEntry->mipSlice;
1328 desc.Texture2DArray.FirstArraySlice = pEntry->firstArraySlice;
1329 desc.Texture2DArray.ArraySize = pEntry->arraySize;
1330 }
1331 break;
1332 default:
1333 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
1334 }
1335
1336 HRESULT hr = pDevice->pDevice->CreateDepthStencilView(pResource, &desc, pp);
1337 Assert(SUCCEEDED(hr));
1338 return hr;
1339}
1340
1341
1342static HRESULT dxShaderCreate(PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSHADER pShader, DXSHADER *pDXShader)
1343{
1344 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
1345
1346 HRESULT hr = S_OK;
1347
1348 switch (pShader->type)
1349 {
1350 case SVGA3D_SHADERTYPE_VS:
1351 hr = pDevice->pDevice->CreateVertexShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pVertexShader);
1352 Assert(SUCCEEDED(hr));
1353 break;
1354 case SVGA3D_SHADERTYPE_PS:
1355 hr = pDevice->pDevice->CreatePixelShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pPixelShader);
1356 Assert(SUCCEEDED(hr));
1357 break;
1358 case SVGA3D_SHADERTYPE_GS:
1359 {
1360 SVGA3dStreamOutputId const soid = pDXContext->svgaDXContext.streamOut.soid;
1361 if (soid == SVGA_ID_INVALID)
1362 hr = pDevice->pDevice->CreateGeometryShader(pDXShader->pvDXBC, pDXShader->cbDXBC, NULL, &pDXShader->pGeometryShader);
1363 else
1364 {
1365 ASSERT_GUEST_RETURN(soid < pDXContext->pBackendDXContext->cStreamOutput, E_INVALIDARG);
1366
1367 SVGACOTableDXStreamOutputEntry const *pEntry = &pDXContext->cot.paStreamOutput[soid];
1368 DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[soid];
1369 uint32_t const cSOTarget = pDXContext->pBackendDXContext->cSOTarget;
1370
1371 for (uint32_t i = 0; i < pDXStreamOutput->cDeclarationEntry; ++i)
1372 {
1373 D3D11_SO_DECLARATION_ENTRY *p = &pDXStreamOutput->aDeclarationEntry[i];
1374 SVGA3dStreamOutputDeclarationEntry const *decl = &pEntry->decl[i];
1375 p->SemanticName = DXShaderGetOutputSemanticName(&pShader->shaderInfo, decl->registerIndex);
1376 }
1377
1378 hr = pDevice->pDevice->CreateGeometryShaderWithStreamOutput(pDXShader->pvDXBC, pDXShader->cbDXBC,
1379 pDXStreamOutput->aDeclarationEntry, pDXStreamOutput->cDeclarationEntry,
1380 pEntry->streamOutputStrideInBytes, cSOTarget, pEntry->rasterizedStream,
1381 /*pClassLinkage=*/ NULL, &pDXShader->pGeometryShader);
1382 if (SUCCEEDED(hr))
1383 pDXShader->soid = soid;
1384 }
1385 Assert(SUCCEEDED(hr));
1386 break;
1387 }
1388 case SVGA3D_SHADERTYPE_HS:
1389 case SVGA3D_SHADERTYPE_DS:
1390 case SVGA3D_SHADERTYPE_CS:
1391 default:
1392 ASSERT_GUEST_FAILED_RETURN(E_INVALIDARG);
1393 }
1394
1395 return hr;
1396}
1397
1398
1399static void dxShaderSet(PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderType type, DXSHADER *pDXShader)
1400{
1401 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
1402
1403 switch (type)
1404 {
1405 case SVGA3D_SHADERTYPE_VS:
1406 pDevice->pImmediateContext->VSSetShader(pDXShader ? pDXShader->pVertexShader : NULL, NULL, 0);
1407 break;
1408 case SVGA3D_SHADERTYPE_PS:
1409 pDevice->pImmediateContext->PSSetShader(pDXShader ? pDXShader->pPixelShader : NULL, NULL, 0);
1410 break;
1411 case SVGA3D_SHADERTYPE_GS:
1412 {
1413 Assert(!pDXShader || (pDXShader->soid == pDXContext->svgaDXContext.streamOut.soid));
1414 pDevice->pImmediateContext->GSSetShader(pDXShader ? pDXShader->pGeometryShader : NULL, NULL, 0);
1415 } break;
1416 case SVGA3D_SHADERTYPE_HS:
1417 case SVGA3D_SHADERTYPE_DS:
1418 case SVGA3D_SHADERTYPE_CS:
1419 default:
1420 ASSERT_GUEST_FAILED_RETURN_VOID();
1421 }
1422}
1423
1424
1425static void dxConstantBufferSet(DXDEVICE *pDevice, uint32_t slot, SVGA3dShaderType type, ID3D11Buffer *pConstantBuffer)
1426{
1427 switch (type)
1428 {
1429 case SVGA3D_SHADERTYPE_VS:
1430 pDevice->pImmediateContext->VSSetConstantBuffers(slot, 1, &pConstantBuffer);
1431 break;
1432 case SVGA3D_SHADERTYPE_PS:
1433 pDevice->pImmediateContext->PSSetConstantBuffers(slot, 1, &pConstantBuffer);
1434 break;
1435 case SVGA3D_SHADERTYPE_GS:
1436 pDevice->pImmediateContext->GSSetConstantBuffers(slot, 1, &pConstantBuffer);
1437 break;
1438 case SVGA3D_SHADERTYPE_HS:
1439 case SVGA3D_SHADERTYPE_DS:
1440 case SVGA3D_SHADERTYPE_CS:
1441 default:
1442 ASSERT_GUEST_FAILED_RETURN_VOID();
1443 }
1444}
1445
1446
1447static void dxSamplerSet(DXDEVICE *pDevice, SVGA3dShaderType type, uint32_t startSampler, uint32_t cSampler, ID3D11SamplerState * const *papSampler)
1448{
1449 switch (type)
1450 {
1451 case SVGA3D_SHADERTYPE_VS:
1452 pDevice->pImmediateContext->VSSetSamplers(startSampler, cSampler, papSampler);
1453 break;
1454 case SVGA3D_SHADERTYPE_PS:
1455 pDevice->pImmediateContext->PSSetSamplers(startSampler, cSampler, papSampler);
1456 break;
1457 case SVGA3D_SHADERTYPE_GS:
1458 pDevice->pImmediateContext->GSSetSamplers(startSampler, cSampler, papSampler);
1459 break;
1460 case SVGA3D_SHADERTYPE_HS:
1461 case SVGA3D_SHADERTYPE_DS:
1462 case SVGA3D_SHADERTYPE_CS:
1463 default:
1464 ASSERT_GUEST_FAILED_RETURN_VOID();
1465 }
1466}
1467
1468
1469static void dxShaderResourceViewSet(DXDEVICE *pDevice, SVGA3dShaderType type, uint32_t startView, uint32_t cShaderResourceView, ID3D11ShaderResourceView * const *papShaderResourceView)
1470{
1471 switch (type)
1472 {
1473 case SVGA3D_SHADERTYPE_VS:
1474 pDevice->pImmediateContext->VSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
1475 break;
1476 case SVGA3D_SHADERTYPE_PS:
1477 pDevice->pImmediateContext->PSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
1478 break;
1479 case SVGA3D_SHADERTYPE_GS:
1480 pDevice->pImmediateContext->GSSetShaderResources(startView, cShaderResourceView, papShaderResourceView);
1481 break;
1482 case SVGA3D_SHADERTYPE_HS:
1483 case SVGA3D_SHADERTYPE_DS:
1484 case SVGA3D_SHADERTYPE_CS:
1485 default:
1486 ASSERT_GUEST_FAILED_RETURN_VOID();
1487 }
1488}
1489
1490
1491static int dxBackendSurfaceAlloc(PVMSVGA3DBACKENDSURFACE *ppBackendSurface)
1492{
1493 PVMSVGA3DBACKENDSURFACE pBackendSurface = (PVMSVGA3DBACKENDSURFACE)RTMemAllocZ(sizeof(VMSVGA3DBACKENDSURFACE));
1494 AssertPtrReturn(pBackendSurface, VERR_NO_MEMORY);
1495 pBackendSurface->cidDrawing = SVGA_ID_INVALID;
1496 *ppBackendSurface = pBackendSurface;
1497 return VINF_SUCCESS;
1498}
1499
1500
1501static int vmsvga3dBackSurfaceCreateScreenTarget(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface)
1502{
1503 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1504 AssertReturn(p3dState, VERR_INVALID_STATE);
1505
1506 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
1507 AssertReturn(pBackend, VERR_INVALID_STATE);
1508
1509 DXDEVICE *pDXDevice = &pBackend->device;
1510 AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
1511
1512 /* Surface must have SCREEN_TARGET flag. */
1513 ASSERT_GUEST_RETURN(RT_BOOL(pSurface->surfaceFlags & SVGA3D_SURFACE_SCREENTARGET), VERR_INVALID_PARAMETER);
1514
1515 if (VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
1516 {
1517 AssertFailed(); /* Should the function not be used like that? */
1518 vmsvga3dBackSurfaceDestroy(pThisCC, pSurface);
1519 }
1520
1521 PVMSVGA3DBACKENDSURFACE pBackendSurface;
1522 int rc = dxBackendSurfaceAlloc(&pBackendSurface);
1523 AssertRCReturn(rc, rc);
1524
1525 D3D11_TEXTURE2D_DESC td;
1526 RT_ZERO(td);
1527 td.Width = pSurface->paMipmapLevels[0].mipmapSize.width;
1528 td.Height = pSurface->paMipmapLevels[0].mipmapSize.height;
1529 Assert(pSurface->cLevels == 1);
1530 td.MipLevels = 1;
1531 td.ArraySize = 1;
1532 td.Format = vmsvgaDXSurfaceFormat2Dxgi(pSurface->format);
1533 td.SampleDesc.Count = 1;
1534 td.SampleDesc.Quality = 0;
1535 td.Usage = D3D11_USAGE_DEFAULT;
1536 td.BindFlags = D3D11_BIND_RENDER_TARGET | D3D11_BIND_SHADER_RESOURCE;
1537 td.CPUAccessFlags = 0;
1538 td.MiscFlags = D3D11_RESOURCE_MISC_SHARED;
1539
1540 HRESULT hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.pTexture2D);
1541 Assert(SUCCEEDED(hr));
1542 if (SUCCEEDED(hr))
1543 {
1544 /* Map-able texture. */
1545 td.Usage = D3D11_USAGE_DYNAMIC;
1546 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
1547 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1548 td.MiscFlags = 0;
1549 hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->pDynamicTexture);
1550 Assert(SUCCEEDED(hr));
1551 }
1552
1553 if (SUCCEEDED(hr))
1554 {
1555 /* Staging texture. */
1556 td.Usage = D3D11_USAGE_STAGING;
1557 td.BindFlags = 0; /* No flags allowed. */
1558 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ | D3D11_CPU_ACCESS_WRITE;
1559 hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->pStagingTexture);
1560 Assert(SUCCEEDED(hr));
1561 }
1562
1563 if (SUCCEEDED(hr))
1564 {
1565 /* Get the shared handle. */
1566 IDXGIResource *pDxgiResource = NULL;
1567 hr = pBackendSurface->u.pTexture2D->QueryInterface(__uuidof(IDXGIResource), (void**)&pDxgiResource);
1568 Assert(SUCCEEDED(hr));
1569 if (SUCCEEDED(hr))
1570 {
1571 hr = pDxgiResource->GetSharedHandle(&pBackendSurface->SharedHandle);
1572 Assert(SUCCEEDED(hr));
1573 D3D_RELEASE(pDxgiResource);
1574 }
1575 }
1576
1577 if (SUCCEEDED(hr))
1578 {
1579 /*
1580 * Success.
1581 */
1582 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_SCREEN_TARGET;
1583 pBackendSurface->enmDxgiFormat = td.Format;
1584 pSurface->pBackendSurface = pBackendSurface;
1585 pSurface->idAssociatedContext = DX_CID_BACKEND;
1586 pSurface->fDirty = true;
1587 return VINF_SUCCESS;
1588 }
1589
1590 /* Failure. */
1591 D3D_RELEASE(pBackendSurface->pStagingTexture);
1592 D3D_RELEASE(pBackendSurface->pDynamicTexture);
1593 D3D_RELEASE(pBackendSurface->u.pTexture2D);
1594 RTMemFree(pBackendSurface);
1595 return VERR_NO_MEMORY;
1596}
1597
1598
1599static UINT dxBindFlags(SVGA3dSurfaceAllFlags surfaceFlags)
1600{
1601 /* Catch unimplemented flags. */
1602 Assert(!RT_BOOL(surfaceFlags & (SVGA3D_SURFACE_BIND_LOGICOPS | SVGA3D_SURFACE_BIND_RAW_VIEWS)));
1603
1604 UINT BindFlags = 0;
1605
1606 if (surfaceFlags & SVGA3D_SURFACE_BIND_VERTEX_BUFFER) BindFlags |= D3D11_BIND_VERTEX_BUFFER;
1607 if (surfaceFlags & SVGA3D_SURFACE_BIND_INDEX_BUFFER) BindFlags |= D3D11_BIND_INDEX_BUFFER;
1608 if (surfaceFlags & SVGA3D_SURFACE_BIND_CONSTANT_BUFFER) BindFlags |= D3D11_BIND_CONSTANT_BUFFER;
1609 if (surfaceFlags & SVGA3D_SURFACE_BIND_SHADER_RESOURCE) BindFlags |= D3D11_BIND_SHADER_RESOURCE;
1610 if (surfaceFlags & SVGA3D_SURFACE_BIND_RENDER_TARGET) BindFlags |= D3D11_BIND_RENDER_TARGET;
1611 if (surfaceFlags & SVGA3D_SURFACE_BIND_DEPTH_STENCIL) BindFlags |= D3D11_BIND_DEPTH_STENCIL;
1612 if (surfaceFlags & SVGA3D_SURFACE_BIND_STREAM_OUTPUT) BindFlags |= D3D11_BIND_STREAM_OUTPUT;
1613 if (surfaceFlags & SVGA3D_SURFACE_BIND_UAVIEW) BindFlags |= D3D11_BIND_UNORDERED_ACCESS;
1614
1615 return BindFlags;
1616}
1617
1618
1619static int vmsvga3dBackSurfaceCreateTexture(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
1620{
1621 PVMSVGA3DSTATE p3dState = pThisCC->svga.p3dState;
1622 AssertReturn(p3dState, VERR_INVALID_STATE);
1623
1624 PVMSVGA3DBACKEND pBackend = p3dState->pBackend;
1625 AssertReturn(pBackend, VERR_INVALID_STATE);
1626
1627 UINT MiscFlags;
1628 DXDEVICE *pDXDevice;
1629 if (dxIsSurfaceShareable(pSurface))
1630 {
1631 pDXDevice = &pBackend->device;
1632 MiscFlags = D3D11_RESOURCE_MISC_SHARED;
1633 }
1634 else
1635 {
1636 pDXDevice = &pDXContext->pBackendDXContext->device;
1637 MiscFlags = 0;
1638 }
1639 AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
1640
1641 if (pSurface->pBackendSurface != NULL)
1642 {
1643 AssertFailed(); /** @todo Should the function not be used like that? */
1644 vmsvga3dBackSurfaceDestroy(pThisCC, pSurface);
1645 }
1646
1647 PVMSVGA3DBACKENDSURFACE pBackendSurface;
1648 int rc = dxBackendSurfaceAlloc(&pBackendSurface);
1649 AssertRCReturn(rc, rc);
1650
1651 uint32_t const cWidth = pSurface->paMipmapLevels[0].mipmapSize.width;
1652 uint32_t const cHeight = pSurface->paMipmapLevels[0].mipmapSize.height;
1653 uint32_t const cDepth = pSurface->paMipmapLevels[0].mipmapSize.depth;
1654 uint32_t const numMipLevels = pSurface->cLevels;
1655
1656 DXGI_FORMAT dxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(pSurface->format);
1657 AssertReturn(dxgiFormat != DXGI_FORMAT_UNKNOWN, E_FAIL);
1658
1659 /*
1660 * Create D3D11 texture object.
1661 */
1662 HRESULT hr = S_OK;
1663 if (pSurface->surfaceFlags & SVGA3D_SURFACE_SCREENTARGET)
1664 {
1665 /*
1666 * Create the texture in backend device and open for the specified context.
1667 */
1668 D3D11_TEXTURE2D_DESC td;
1669 RT_ZERO(td);
1670 td.Width = pSurface->paMipmapLevels[0].mipmapSize.width;
1671 td.Height = pSurface->paMipmapLevels[0].mipmapSize.height;
1672 Assert(pSurface->cLevels == 1);
1673 td.MipLevels = 1;
1674 td.ArraySize = 1;
1675 td.Format = dxgiFormat;
1676 td.SampleDesc.Count = 1;
1677 td.SampleDesc.Quality = 0;
1678 td.Usage = D3D11_USAGE_DEFAULT;
1679 td.BindFlags = D3D11_BIND_RENDER_TARGET | D3D11_BIND_SHADER_RESOURCE;
1680 td.CPUAccessFlags = 0;
1681 td.MiscFlags = MiscFlags;
1682
1683 hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.pTexture2D);
1684 Assert(SUCCEEDED(hr));
1685 if (SUCCEEDED(hr))
1686 {
1687 /* Map-able texture. */
1688 td.Usage = D3D11_USAGE_DYNAMIC;
1689 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
1690 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1691 td.MiscFlags = 0;
1692 hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->pDynamicTexture);
1693 Assert(SUCCEEDED(hr));
1694 }
1695
1696 if (SUCCEEDED(hr))
1697 {
1698 /* Staging texture. */
1699 td.Usage = D3D11_USAGE_STAGING;
1700 td.BindFlags = 0; /* No flags allowed. */
1701 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ | D3D11_CPU_ACCESS_WRITE;
1702 hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->pStagingTexture);
1703 Assert(SUCCEEDED(hr));
1704 }
1705
1706 if (SUCCEEDED(hr))
1707 {
1708 /* Get the shared handle. */
1709 IDXGIResource *pDxgiResource = NULL;
1710 hr = pBackendSurface->u.pTexture2D->QueryInterface(__uuidof(IDXGIResource), (void**)&pDxgiResource);
1711 Assert(SUCCEEDED(hr));
1712 if (SUCCEEDED(hr))
1713 {
1714 hr = pDxgiResource->GetSharedHandle(&pBackendSurface->SharedHandle);
1715 Assert(SUCCEEDED(hr));
1716 D3D_RELEASE(pDxgiResource);
1717 }
1718 }
1719
1720 if (SUCCEEDED(hr))
1721 {
1722 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_SCREEN_TARGET;
1723 }
1724 }
1725 else if (pSurface->surfaceFlags & SVGA3D_SURFACE_CUBEMAP)
1726 {
1727 Assert(pSurface->cFaces == 6);
1728 Assert(cWidth == cHeight);
1729 Assert(cDepth == 1);
1730//DEBUG_BREAKPOINT_TEST();
1731 D3D11_SUBRESOURCE_DATA *paInitialData = NULL;
1732 D3D11_SUBRESOURCE_DATA aInitialData[6 * SVGA3D_MAX_MIP_LEVELS];
1733 if (pSurface->paMipmapLevels[0].pSurfaceData)
1734 {
1735 /** @todo Can happen for a non GBO surface or if GBO texture was updated prior to creation if the hardware resource. Test this. */
1736 /** @todo for (i = 0; i < pSurface->cFaces * numMipLevels; ++i) */
1737 for (uint32_t iFace = 0; iFace < 6; ++iFace)
1738 {
1739 for (uint32_t i = 0; i < numMipLevels; ++i)
1740 {
1741 uint32_t const iSubresource = vmsvga3dCalcSubresource(i, iFace, numMipLevels);
1742
1743 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[iSubresource];
1744 D3D11_SUBRESOURCE_DATA *p = &aInitialData[iSubresource];
1745 p->pSysMem = pMipmapLevel->pSurfaceData;
1746 p->SysMemPitch = pMipmapLevel->cbSurfacePitch;
1747 p->SysMemSlicePitch = pMipmapLevel->cbSurfacePlane;
1748 }
1749 }
1750 paInitialData = &aInitialData[0];
1751 }
1752
1753 D3D11_TEXTURE2D_DESC td;
1754 RT_ZERO(td);
1755 td.Width = cWidth;
1756 td.Height = cHeight;
1757 td.MipLevels = numMipLevels;
1758 td.ArraySize = 6;
1759 td.Format = dxgiFormat;
1760 td.SampleDesc.Count = 1;
1761 td.SampleDesc.Quality = 0;
1762 td.Usage = D3D11_USAGE_DEFAULT;
1763 td.BindFlags = dxBindFlags(pSurface->surfaceFlags);
1764 td.CPUAccessFlags = 0; /** @todo */
1765 td.MiscFlags = MiscFlags | D3D11_RESOURCE_MISC_TEXTURECUBE; /** @todo */
1766 if ( numMipLevels > 1
1767 && (td.BindFlags & (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET)) == (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET))
1768 td.MiscFlags |= D3D11_RESOURCE_MISC_GENERATE_MIPS; /* Required for GenMips. */
1769
1770 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->u.pTexture2D);
1771 Assert(SUCCEEDED(hr));
1772 if (SUCCEEDED(hr))
1773 {
1774 /* Map-able texture. */
1775 td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
1776 td.ArraySize = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
1777 td.Usage = D3D11_USAGE_DYNAMIC;
1778 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
1779 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1780 td.MiscFlags = 0;
1781 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->pDynamicTexture);
1782 Assert(SUCCEEDED(hr));
1783 }
1784
1785 if (SUCCEEDED(hr))
1786 {
1787 /* Staging texture. */
1788 td.Usage = D3D11_USAGE_STAGING;
1789 td.BindFlags = 0; /* No flags allowed. */
1790 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ | D3D11_CPU_ACCESS_WRITE;
1791 td.MiscFlags = 0;
1792 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->pStagingTexture);
1793 Assert(SUCCEEDED(hr));
1794 }
1795
1796 if ( SUCCEEDED(hr)
1797 && MiscFlags == D3D11_RESOURCE_MISC_SHARED)
1798 {
1799 /* Get the shared handle. */
1800 IDXGIResource *pDxgiResource = NULL;
1801 hr = pBackendSurface->u.pTexture2D->QueryInterface(__uuidof(IDXGIResource), (void**)&pDxgiResource);
1802 Assert(SUCCEEDED(hr));
1803 if (SUCCEEDED(hr))
1804 {
1805 hr = pDxgiResource->GetSharedHandle(&pBackendSurface->SharedHandle);
1806 Assert(SUCCEEDED(hr));
1807 D3D_RELEASE(pDxgiResource);
1808 }
1809 }
1810
1811 if (SUCCEEDED(hr))
1812 {
1813 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_CUBE_TEXTURE;
1814 }
1815 }
1816 else if (pSurface->surfaceFlags & SVGA3D_SURFACE_1D)
1817 {
1818 AssertFailed(); /** @todo implement */
1819 hr = E_FAIL;
1820 }
1821 else
1822 {
1823 if (cDepth > 1)
1824 {
1825 /*
1826 * Volume texture.
1827 */
1828 Assert(pSurface->cFaces == 1);
1829
1830 D3D11_SUBRESOURCE_DATA *paInitialData = NULL;
1831 D3D11_SUBRESOURCE_DATA aInitialData[SVGA3D_MAX_MIP_LEVELS];
1832 if (pSurface->paMipmapLevels[0].pSurfaceData)
1833 {
1834 /** @todo Can happen for a non GBO surface or if GBO texture was updated prior to creation if the hardware resource. Test this. */
1835 for (uint32_t i = 0; i < numMipLevels; ++i)
1836 {
1837 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
1838 D3D11_SUBRESOURCE_DATA *p = &aInitialData[i];
1839 p->pSysMem = pMipmapLevel->pSurfaceData;
1840 p->SysMemPitch = pMipmapLevel->cbSurfacePitch;
1841 p->SysMemSlicePitch = pMipmapLevel->cbSurfacePlane;
1842 }
1843 paInitialData = &aInitialData[0];
1844 }
1845
1846 D3D11_TEXTURE3D_DESC td;
1847 RT_ZERO(td);
1848 td.Width = cWidth;
1849 td.Height = cHeight;
1850 td.Depth = cDepth;
1851 td.MipLevels = numMipLevels;
1852 td.Format = dxgiFormat;
1853 td.Usage = D3D11_USAGE_DEFAULT;
1854 td.BindFlags = dxBindFlags(pSurface->surfaceFlags);
1855 td.CPUAccessFlags = 0; /** @todo */
1856 td.MiscFlags = MiscFlags; /** @todo */
1857 if ( numMipLevels > 1
1858 && (td.BindFlags & (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET)) == (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET))
1859 td.MiscFlags |= D3D11_RESOURCE_MISC_GENERATE_MIPS; /* Required for GenMips. */
1860
1861 hr = pDXDevice->pDevice->CreateTexture3D(&td, paInitialData, &pBackendSurface->u.pTexture3D);
1862 Assert(SUCCEEDED(hr));
1863 if (SUCCEEDED(hr))
1864 {
1865 /* Map-able texture. */
1866 td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
1867 td.Usage = D3D11_USAGE_DYNAMIC;
1868 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
1869 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1870 td.MiscFlags = 0;
1871 hr = pDXDevice->pDevice->CreateTexture3D(&td, paInitialData, &pBackendSurface->pDynamicTexture3D);
1872 Assert(SUCCEEDED(hr));
1873 }
1874
1875 if (SUCCEEDED(hr))
1876 {
1877 /* Staging texture. */
1878 td.Usage = D3D11_USAGE_STAGING;
1879 td.BindFlags = 0; /* No flags allowed. */
1880 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ | D3D11_CPU_ACCESS_WRITE;
1881 td.MiscFlags = 0;
1882 hr = pDXDevice->pDevice->CreateTexture3D(&td, paInitialData, &pBackendSurface->pStagingTexture3D);
1883 Assert(SUCCEEDED(hr));
1884 }
1885
1886 if ( SUCCEEDED(hr)
1887 && MiscFlags == D3D11_RESOURCE_MISC_SHARED)
1888 {
1889 /* Get the shared handle. */
1890 IDXGIResource *pDxgiResource = NULL;
1891 hr = pBackendSurface->u.pTexture3D->QueryInterface(__uuidof(IDXGIResource), (void**)&pDxgiResource);
1892 Assert(SUCCEEDED(hr));
1893 if (SUCCEEDED(hr))
1894 {
1895 hr = pDxgiResource->GetSharedHandle(&pBackendSurface->SharedHandle);
1896 Assert(SUCCEEDED(hr));
1897 D3D_RELEASE(pDxgiResource);
1898 }
1899 }
1900
1901 if (SUCCEEDED(hr))
1902 {
1903 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE_3D;
1904 }
1905 }
1906 else
1907 {
1908 /*
1909 * 2D texture.
1910 */
1911 Assert(pSurface->cFaces == 1);
1912
1913 D3D11_SUBRESOURCE_DATA *paInitialData = NULL;
1914 D3D11_SUBRESOURCE_DATA aInitialData[SVGA3D_MAX_MIP_LEVELS];
1915 if (pSurface->paMipmapLevels[0].pSurfaceData)
1916 {
1917 /** @todo Can happen for a non GBO surface or if GBO texture was updated prior to creation if the hardware resource. Test this. */
1918 for (uint32_t i = 0; i < numMipLevels; ++i)
1919 {
1920 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
1921 D3D11_SUBRESOURCE_DATA *p = &aInitialData[i];
1922 p->pSysMem = pMipmapLevel->pSurfaceData;
1923 p->SysMemPitch = pMipmapLevel->cbSurfacePitch;
1924 p->SysMemSlicePitch = pMipmapLevel->cbSurfacePlane;
1925 }
1926 paInitialData = &aInitialData[0];
1927 }
1928
1929 D3D11_TEXTURE2D_DESC td;
1930 RT_ZERO(td);
1931 td.Width = cWidth;
1932 td.Height = cHeight;
1933 td.MipLevels = numMipLevels;
1934 td.ArraySize = 1; /** @todo */
1935 td.Format = dxgiFormat;
1936 td.SampleDesc.Count = 1;
1937 td.SampleDesc.Quality = 0;
1938 td.Usage = D3D11_USAGE_DEFAULT;
1939 td.BindFlags = dxBindFlags(pSurface->surfaceFlags);
1940 td.CPUAccessFlags = 0; /** @todo */
1941 td.MiscFlags = MiscFlags; /** @todo */
1942 if ( numMipLevels > 1
1943 && (td.BindFlags & (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET)) == (D3D11_BIND_SHADER_RESOURCE | D3D11_BIND_RENDER_TARGET))
1944 td.MiscFlags |= D3D11_RESOURCE_MISC_GENERATE_MIPS; /* Required for GenMips. */
1945
1946 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->u.pTexture2D);
1947 Assert(SUCCEEDED(hr));
1948 if (SUCCEEDED(hr))
1949 {
1950 /* Map-able texture. */
1951 td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
1952 td.Usage = D3D11_USAGE_DYNAMIC;
1953 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
1954 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
1955 td.MiscFlags = 0;
1956 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->pDynamicTexture);
1957 Assert(SUCCEEDED(hr));
1958 }
1959
1960 if (SUCCEEDED(hr))
1961 {
1962 /* Staging texture. */
1963 td.Usage = D3D11_USAGE_STAGING;
1964 td.BindFlags = 0; /* No flags allowed. */
1965 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ | D3D11_CPU_ACCESS_WRITE;
1966 td.MiscFlags = 0;
1967 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->pStagingTexture);
1968 Assert(SUCCEEDED(hr));
1969 }
1970
1971 if ( SUCCEEDED(hr)
1972 && MiscFlags == D3D11_RESOURCE_MISC_SHARED)
1973 {
1974 /* Get the shared handle. */
1975 IDXGIResource *pDxgiResource = NULL;
1976 hr = pBackendSurface->u.pTexture2D->QueryInterface(__uuidof(IDXGIResource), (void**)&pDxgiResource);
1977 Assert(SUCCEEDED(hr));
1978 if (SUCCEEDED(hr))
1979 {
1980 hr = pDxgiResource->GetSharedHandle(&pBackendSurface->SharedHandle);
1981 Assert(SUCCEEDED(hr));
1982 D3D_RELEASE(pDxgiResource);
1983 }
1984 }
1985
1986 if (SUCCEEDED(hr))
1987 {
1988 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE;
1989 }
1990 }
1991 }
1992
1993 Assert(hr == S_OK);
1994
1995 if (pSurface->autogenFilter != SVGA3D_TEX_FILTER_NONE)
1996 {
1997 }
1998
1999 if (SUCCEEDED(hr))
2000 {
2001 /*
2002 * Success.
2003 */
2004 pBackendSurface->enmDxgiFormat = dxgiFormat;
2005 pSurface->pBackendSurface = pBackendSurface;
2006 if (RT_BOOL(MiscFlags & D3D11_RESOURCE_MISC_SHARED))
2007 pSurface->idAssociatedContext = DX_CID_BACKEND;
2008 else
2009 pSurface->idAssociatedContext = pDXContext->cid;
2010 return VINF_SUCCESS;
2011 }
2012
2013 /* Failure. */
2014 D3D_RELEASE(pBackendSurface->pStagingTexture);
2015 D3D_RELEASE(pBackendSurface->pDynamicTexture);
2016 D3D_RELEASE(pBackendSurface->u.pTexture2D);
2017 RTMemFree(pBackendSurface);
2018 return VERR_NO_MEMORY;
2019}
2020
2021
2022static int vmsvga3dBackSurfaceCreateDepthStencilTexture(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
2023{
2024 DXDEVICE *pDXDevice = &pDXContext->pBackendDXContext->device;
2025 AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
2026
2027 if (pSurface->pBackendSurface != NULL)
2028 {
2029 AssertFailed(); /** @todo Should the function not be used like that? */
2030 vmsvga3dBackSurfaceDestroy(pThisCC, pSurface);
2031 }
2032
2033 PVMSVGA3DBACKENDSURFACE pBackendSurface;
2034 int rc = dxBackendSurfaceAlloc(&pBackendSurface);
2035 AssertRCReturn(rc, rc);
2036
2037 uint32_t const cWidth = pSurface->paMipmapLevels[0].mipmapSize.width;
2038 uint32_t const cHeight = pSurface->paMipmapLevels[0].mipmapSize.height;
2039 uint32_t const numMipLevels = pSurface->cLevels;
2040
2041 D3D11_SUBRESOURCE_DATA *paInitialData = NULL;
2042 D3D11_SUBRESOURCE_DATA aInitialData[SVGA3D_MAX_MIP_LEVELS];
2043 if (pSurface->paMipmapLevels[0].pSurfaceData)
2044 {
2045 /** @todo Can happen for a non GBO surface or if GBO texture was updated prior to creation if the hardware resource. Test this. */
2046 for (uint32_t i = 0; i < numMipLevels; ++i)
2047 {
2048 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
2049 D3D11_SUBRESOURCE_DATA *p = &aInitialData[i];
2050 p->pSysMem = pMipmapLevel->pSurfaceData;
2051 p->SysMemPitch = pMipmapLevel->cbSurfacePitch;
2052 p->SysMemSlicePitch = pMipmapLevel->cbSurfacePlane;
2053 }
2054 paInitialData = &aInitialData[0];
2055 }
2056
2057 D3D11_TEXTURE2D_DESC td;
2058 RT_ZERO(td);
2059 td.Width = cWidth;
2060 td.Height = cHeight;
2061 Assert(pSurface->cLevels == 1);
2062 td.MipLevels = 1;
2063 td.ArraySize = 1;
2064 td.Format = vmsvgaDXSurfaceFormat2Dxgi(pSurface->format);
2065 AssertReturn(td.Format != DXGI_FORMAT_UNKNOWN, E_FAIL);
2066 td.SampleDesc.Count = 1;
2067 td.SampleDesc.Quality = 0;
2068 td.Usage = D3D11_USAGE_DEFAULT;
2069 td.BindFlags = dxBindFlags(pSurface->surfaceFlags);
2070 td.CPUAccessFlags = 0;
2071 td.MiscFlags = 0;
2072
2073 HRESULT hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &pBackendSurface->u.pTexture2D);
2074 Assert(SUCCEEDED(hr));
2075 if (SUCCEEDED(hr))
2076 {
2077 /* Map-able texture. */
2078 td.MipLevels = 1; /* Must be for D3D11_USAGE_DYNAMIC. */
2079 td.Usage = D3D11_USAGE_DYNAMIC;
2080 td.BindFlags = D3D11_BIND_SHADER_RESOURCE; /* Have to specify a supported flag, otherwise E_INVALIDARG will be returned. */
2081 td.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2082 td.MiscFlags = 0;
2083 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->pDynamicTexture);
2084 Assert(SUCCEEDED(hr));
2085 }
2086
2087 if (SUCCEEDED(hr))
2088 {
2089 /* Staging texture. */
2090 td.Usage = D3D11_USAGE_STAGING;
2091 td.BindFlags = 0; /* No flags allowed. */
2092 td.CPUAccessFlags = D3D11_CPU_ACCESS_READ | D3D11_CPU_ACCESS_WRITE;
2093 td.MiscFlags = 0;
2094 hr = pDXDevice->pDevice->CreateTexture2D(&td, paInitialData, &pBackendSurface->pStagingTexture);
2095 Assert(SUCCEEDED(hr));
2096 }
2097
2098 if (SUCCEEDED(hr))
2099 {
2100 /*
2101 * Success.
2102 */
2103 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_TEXTURE;
2104 pBackendSurface->enmDxgiFormat = td.Format;
2105 pSurface->pBackendSurface = pBackendSurface;
2106 pSurface->idAssociatedContext = pDXContext->cid;
2107 //pSurface->fDirty = true;
2108 return VINF_SUCCESS;
2109 }
2110
2111 /* Failure. */
2112 D3D_RELEASE(pBackendSurface->pStagingTexture);
2113 D3D_RELEASE(pBackendSurface->pDynamicTexture);
2114 D3D_RELEASE(pBackendSurface->u.pTexture2D);
2115 RTMemFree(pBackendSurface);
2116 return VERR_NO_MEMORY;
2117}
2118
2119
2120static int vmsvga3dBackSurfaceCreateBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
2121{
2122 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
2123 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
2124
2125 /* Buffers should be created as such. */
2126 AssertReturn(RT_BOOL(pSurface->surfaceFlags & ( SVGA3D_SURFACE_HINT_INDEXBUFFER
2127 | SVGA3D_SURFACE_HINT_VERTEXBUFFER
2128 | SVGA3D_SURFACE_BIND_VERTEX_BUFFER
2129 | SVGA3D_SURFACE_BIND_INDEX_BUFFER
2130 )), VERR_INVALID_PARAMETER);
2131
2132 if (pSurface->pBackendSurface != NULL)
2133 {
2134 AssertFailed(); /** @todo Should the function not be used like that? */
2135 vmsvga3dBackSurfaceDestroy(pThisCC, pSurface);
2136 }
2137
2138 PVMSVGA3DMIPMAPLEVEL pMipLevel;
2139 int rc = vmsvga3dMipmapLevel(pSurface, 0, 0, &pMipLevel);
2140 AssertRCReturn(rc, rc);
2141
2142 PVMSVGA3DBACKENDSURFACE pBackendSurface;
2143 rc = dxBackendSurfaceAlloc(&pBackendSurface);
2144 AssertRCReturn(rc, rc);
2145
2146 /* Upload the current data, if any. */
2147 D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
2148 D3D11_SUBRESOURCE_DATA initialData;
2149 if (pMipLevel->pSurfaceData)
2150 {
2151 initialData.pSysMem = pMipLevel->pSurfaceData;
2152 initialData.SysMemPitch = pMipLevel->cbSurface;
2153 initialData.SysMemSlicePitch = pMipLevel->cbSurface;
2154
2155 pInitialData = &initialData;
2156
2157 pMipLevel->fDirty = false;
2158 pSurface->fDirty = false;
2159 }
2160
2161 D3D11_BUFFER_DESC bd;
2162 RT_ZERO(bd);
2163 bd.ByteWidth = pMipLevel->cbSurface;
2164 bd.Usage = D3D11_USAGE_DEFAULT;
2165 bd.BindFlags = D3D11_BIND_VERTEX_BUFFER
2166 | D3D11_BIND_INDEX_BUFFER;
2167
2168 HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->u.pBuffer);
2169 if (SUCCEEDED(hr))
2170 {
2171 /*
2172 * Success.
2173 */
2174 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
2175 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
2176 pSurface->pBackendSurface = pBackendSurface;
2177 pSurface->idAssociatedContext = pDXContext->cid;
2178 return VINF_SUCCESS;
2179 }
2180
2181 /* Failure. */
2182 D3D_RELEASE(pBackendSurface->u.pBuffer);
2183 RTMemFree(pBackendSurface);
2184 return VERR_NO_MEMORY;
2185}
2186
2187
2188static int vmsvga3dBackSurfaceCreateSoBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
2189{
2190 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
2191 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
2192
2193 /* Buffers should be created as such. */
2194 AssertReturn(RT_BOOL(pSurface->surfaceFlags & SVGA3D_SURFACE_BIND_STREAM_OUTPUT), VERR_INVALID_PARAMETER);
2195
2196 if (pSurface->pBackendSurface != NULL)
2197 {
2198 AssertFailed(); /** @todo Should the function not be used like that? */
2199 vmsvga3dBackSurfaceDestroy(pThisCC, pSurface);
2200 }
2201
2202 PVMSVGA3DBACKENDSURFACE pBackendSurface;
2203 int rc = dxBackendSurfaceAlloc(&pBackendSurface);
2204 AssertRCReturn(rc, rc);
2205
2206 D3D11_BUFFER_DESC bd;
2207 RT_ZERO(bd);
2208 bd.ByteWidth = pSurface->paMipmapLevels[0].cbSurface;
2209 bd.Usage = D3D11_USAGE_DEFAULT;
2210 bd.BindFlags = dxBindFlags(pSurface->surfaceFlags); // D3D11_BIND_VERTEX_BUFFER | D3D11_BIND_STREAM_OUTPUT;
2211 bd.CPUAccessFlags = 0; /// @todo ? D3D11_CPU_ACCESS_READ;
2212 bd.MiscFlags = 0;
2213 bd.StructureByteStride = 0;
2214
2215 HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, 0, &pBackendSurface->u.pBuffer);
2216 if (SUCCEEDED(hr))
2217 {
2218 /*
2219 * Success.
2220 */
2221 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
2222 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
2223 pSurface->pBackendSurface = pBackendSurface;
2224 pSurface->idAssociatedContext = pDXContext->cid;
2225 pSurface->fDirty = true;
2226 return VINF_SUCCESS;
2227 }
2228
2229 /* Failure. */
2230 D3D_RELEASE(pBackendSurface->u.pBuffer);
2231 RTMemFree(pBackendSurface);
2232 return VERR_NO_MEMORY;
2233}
2234
2235/** @todo Not needed */
2236static int vmsvga3dBackSurfaceCreateConstantBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
2237{
2238 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
2239 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
2240
2241 /* Buffers should be created as such. */
2242 AssertReturn(RT_BOOL(pSurface->surfaceFlags & ( SVGA3D_SURFACE_BIND_CONSTANT_BUFFER)), VERR_INVALID_PARAMETER);
2243
2244 if (pSurface->pBackendSurface != NULL)
2245 {
2246 AssertFailed(); /** @todo Should the function not be used like that? */
2247 vmsvga3dBackSurfaceDestroy(pThisCC, pSurface);
2248 }
2249
2250 PVMSVGA3DMIPMAPLEVEL pMipLevel;
2251 int rc = vmsvga3dMipmapLevel(pSurface, 0, 0, &pMipLevel);
2252 AssertRCReturn(rc, rc);
2253
2254 PVMSVGA3DBACKENDSURFACE pBackendSurface;
2255 rc = dxBackendSurfaceAlloc(&pBackendSurface);
2256 AssertRCReturn(rc, rc);
2257
2258 /* Upload the current data, if any. */
2259 D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
2260 D3D11_SUBRESOURCE_DATA initialData;
2261 if (pMipLevel->pSurfaceData)
2262 {
2263 initialData.pSysMem = pMipLevel->pSurfaceData;
2264 initialData.SysMemPitch = pMipLevel->cbSurface;
2265 initialData.SysMemSlicePitch = pMipLevel->cbSurface;
2266
2267 pInitialData = &initialData;
2268
2269 pMipLevel->fDirty = false;
2270 pSurface->fDirty = false;
2271 }
2272
2273 D3D11_BUFFER_DESC bd;
2274 RT_ZERO(bd);
2275 bd.ByteWidth = pMipLevel->cbSurface;
2276 bd.Usage = D3D11_USAGE_DYNAMIC;
2277 bd.BindFlags = D3D11_BIND_CONSTANT_BUFFER;
2278 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2279 bd.MiscFlags = 0;
2280 bd.StructureByteStride = 0;
2281
2282 HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->u.pBuffer);
2283 if (SUCCEEDED(hr))
2284 {
2285 /*
2286 * Success.
2287 */
2288 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
2289 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
2290 pSurface->pBackendSurface = pBackendSurface;
2291 pSurface->idAssociatedContext = pDXContext->cid;
2292 return VINF_SUCCESS;
2293 }
2294
2295 /* Failure. */
2296 D3D_RELEASE(pBackendSurface->u.pBuffer);
2297 RTMemFree(pBackendSurface);
2298 return VERR_NO_MEMORY;
2299}
2300
2301
2302static HRESULT dxCreateConstantBuffer(DXDEVICE *pDevice, VMSVGA3DSURFACE const *pSurface, PVMSVGA3DBACKENDSURFACE pBackendSurface)
2303{
2304 D3D11_SUBRESOURCE_DATA *pInitialData = NULL; /** @todo */
2305 D3D11_BUFFER_DESC bd;
2306 RT_ZERO(bd);
2307 bd.ByteWidth = pSurface->paMipmapLevels[0].cbSurface;
2308 bd.Usage = D3D11_USAGE_DYNAMIC; /** @todo HINT_STATIC */
2309 bd.BindFlags = D3D11_BIND_CONSTANT_BUFFER;
2310 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2311 bd.MiscFlags = 0;
2312 bd.StructureByteStride = 0;
2313
2314 return pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->u.pBuffer);
2315}
2316
2317
2318static HRESULT dxCreateBuffer(DXDEVICE *pDevice, VMSVGA3DSURFACE const *pSurface, PVMSVGA3DBACKENDSURFACE pBackendSurface)
2319{
2320 D3D11_SUBRESOURCE_DATA *pInitialData = NULL; /** @todo */
2321 D3D11_BUFFER_DESC bd;
2322 RT_ZERO(bd);
2323 bd.ByteWidth = pSurface->paMipmapLevels[0].cbSurface;
2324 bd.Usage = D3D11_USAGE_DYNAMIC; /** @todo HINT_STATIC */
2325 bd.BindFlags = D3D11_BIND_VERTEX_BUFFER
2326 | D3D11_BIND_INDEX_BUFFER;
2327 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE;
2328 bd.MiscFlags = 0;
2329 bd.StructureByteStride = 0;
2330
2331 return pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBackendSurface->u.pBuffer);
2332}
2333
2334/** @todo Not needed? */
2335static int vmsvga3dBackSurfaceCreate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSURFACE pSurface)
2336{
2337 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
2338 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
2339
2340 if (pSurface->pBackendSurface != NULL)
2341 {
2342 AssertFailed(); /** @todo Should the function not be used like that? */
2343 vmsvga3dBackSurfaceDestroy(pThisCC, pSurface);
2344 }
2345
2346 PVMSVGA3DBACKENDSURFACE pBackendSurface;
2347 int rc = dxBackendSurfaceAlloc(&pBackendSurface);
2348 AssertRCReturn(rc, rc);
2349
2350 HRESULT hr;
2351
2352 /*
2353 * Figure out the type of the surface.
2354 */
2355 if (pSurface->surfaceFlags & SVGA3D_SURFACE_BIND_CONSTANT_BUFFER)
2356 {
2357 hr = dxCreateConstantBuffer(pDevice, pSurface, pBackendSurface);
2358 if (SUCCEEDED(hr))
2359 {
2360 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
2361 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
2362 }
2363 else
2364 D3D_RELEASE(pBackendSurface->u.pBuffer);
2365 }
2366 else if (pSurface->surfaceFlags & ( SVGA3D_SURFACE_BIND_VERTEX_BUFFER
2367 | SVGA3D_SURFACE_BIND_INDEX_BUFFER
2368 | SVGA3D_SURFACE_HINT_VERTEXBUFFER
2369 | SVGA3D_SURFACE_HINT_INDEXBUFFER))
2370 {
2371 hr = dxCreateBuffer(pDevice, pSurface, pBackendSurface);
2372 if (SUCCEEDED(hr))
2373 {
2374 pBackendSurface->enmResType = VMSVGA3D_RESTYPE_BUFFER;
2375 pBackendSurface->enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
2376 }
2377 else
2378 D3D_RELEASE(pBackendSurface->u.pBuffer);
2379 }
2380 else
2381 {
2382 AssertFailed(); /** @todo implement */
2383 hr = E_FAIL;
2384 }
2385
2386 if (SUCCEEDED(hr))
2387 {
2388 /*
2389 * Success.
2390 */
2391 pSurface->pBackendSurface = pBackendSurface;
2392 pSurface->idAssociatedContext = pDXContext->cid;
2393 return VINF_SUCCESS;
2394 }
2395
2396 /* Failure. */
2397 RTMemFree(pBackendSurface);
2398 return VERR_NO_MEMORY;
2399}
2400
2401
2402static int dxStagingBufferRealloc(DXDEVICE *pDXDevice, uint32_t cbRequiredSize)
2403{
2404 AssertReturn(cbRequiredSize < SVGA3D_MAX_SURFACE_MEM_SIZE, VERR_INVALID_PARAMETER);
2405
2406 if (RT_LIKELY(cbRequiredSize <= pDXDevice->cbStagingBuffer))
2407 return VINF_SUCCESS;
2408
2409 D3D_RELEASE(pDXDevice->pStagingBuffer);
2410
2411 uint32_t const cbAlloc = RT_ALIGN_32(cbRequiredSize, _64K);
2412
2413 D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
2414 D3D11_BUFFER_DESC bd;
2415 RT_ZERO(bd);
2416 bd.ByteWidth = cbAlloc;
2417 bd.Usage = D3D11_USAGE_STAGING;
2418 //bd.BindFlags = 0; /* No bind flags are allowed for staging resources. */
2419 bd.CPUAccessFlags = D3D11_CPU_ACCESS_WRITE | D3D11_CPU_ACCESS_READ;
2420
2421 int rc = VINF_SUCCESS;
2422 ID3D11Buffer *pBuffer;
2423 HRESULT hr = pDXDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBuffer);
2424 if (SUCCEEDED(hr))
2425 {
2426 pDXDevice->pStagingBuffer = pBuffer;
2427 pDXDevice->cbStagingBuffer = cbAlloc;
2428 }
2429 else
2430 {
2431 pDXDevice->cbStagingBuffer = 0;
2432 rc = VERR_NO_MEMORY;
2433 }
2434
2435 return rc;
2436}
2437
2438
2439static DECLCALLBACK(int) vmsvga3dBackInit(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC)
2440{
2441 RT_NOREF(pDevIns, pThis);
2442
2443 PVMSVGA3DSTATE pState = (PVMSVGA3DSTATE)RTMemAllocZ(sizeof(VMSVGA3DSTATE));
2444 AssertReturn(pState, VERR_NO_MEMORY);
2445 pThisCC->svga.p3dState = pState;
2446
2447 PVMSVGA3DBACKEND pBackend = (PVMSVGA3DBACKEND)RTMemAllocZ(sizeof(VMSVGA3DBACKEND));
2448 AssertReturn(pBackend, VERR_NO_MEMORY);
2449 pState->pBackend = pBackend;
2450
2451 int rc = RTLdrLoadSystem("d3d11", /* fNoUnload = */ true, &pBackend->hD3D11);
2452 AssertRC(rc);
2453 if (RT_SUCCESS(rc))
2454 {
2455 rc = RTLdrGetSymbol(pBackend->hD3D11, "D3D11CreateDevice", (void **)&pBackend->pfnD3D11CreateDevice);
2456 AssertRC(rc);
2457 }
2458
2459 if (RT_SUCCESS(rc))
2460 {
2461 /* Failure to load the shader disassembler is ignored. */
2462 int rc2 = RTLdrLoadSystem("D3DCompiler_47", /* fNoUnload = */ true, &pBackend->hD3DCompiler);
2463 AssertRC(rc2);
2464 if (RT_SUCCESS(rc2))
2465 {
2466 rc2 = RTLdrGetSymbol(pBackend->hD3DCompiler, "D3DDisassemble", (void **)&pBackend->pfnD3DDisassemble);
2467 AssertRC(rc2);
2468 }
2469 Log6Func(("Load D3DDisassemble: %Rrc\n", rc2));
2470 }
2471//DEBUG_BREAKPOINT_TEST();
2472 return rc;
2473}
2474
2475
2476static DECLCALLBACK(int) vmsvga3dBackPowerOn(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC)
2477{
2478 RT_NOREF(pDevIns, pThis);
2479
2480 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2481 AssertReturn(pState, VERR_INVALID_STATE);
2482
2483 PVMSVGA3DBACKEND pBackend = pState->pBackend;
2484 AssertReturn(pBackend, VERR_INVALID_STATE);
2485
2486 int rc = dxDeviceCreate(pBackend, &pBackend->device);
2487 return rc;
2488}
2489
2490
2491static DECLCALLBACK(int) vmsvga3dBackTerminate(PVGASTATECC pThisCC)
2492{
2493 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2494 AssertReturn(pState, VERR_INVALID_STATE);
2495
2496 if (pState->pBackend)
2497 {
2498 /** @todo Clean up backends. */
2499
2500 dxDeviceDestroy(pState->pBackend, &pState->pBackend->device);
2501
2502 RTMemFree(pState->pBackend);
2503 pState->pBackend = NULL;
2504 }
2505
2506 return VINF_SUCCESS;
2507}
2508
2509
2510static DECLCALLBACK(int) vmsvga3dBackReset(PVGASTATECC pThisCC)
2511{
2512 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2513 AssertReturn(pState, VERR_INVALID_STATE);
2514
2515 /** @todo Cleanup all resources and recreate Device, ImmediateContext etc to be at the same state as after poweron. */
2516
2517 return VINF_SUCCESS;
2518}
2519
2520
2521static int vmsvga3dDrvNotifyDefineScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
2522{
2523 /** @todo Such structures must be in VBoxVideo3D.h */
2524 typedef struct VBOX3DNOTIFYDEFINESCREEN
2525 {
2526 VBOX3DNOTIFY Core;
2527 uint32_t cWidth;
2528 uint32_t cHeight;
2529 int32_t xRoot;
2530 int32_t yRoot;
2531 uint32_t fPrimary;
2532 uint32_t cDpi;
2533 } VBOX3DNOTIFYDEFINESCREEN;
2534
2535 VBOX3DNOTIFYDEFINESCREEN n;
2536 n.Core.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_CREATED;
2537 n.Core.iDisplay = pScreen->idScreen;
2538 n.Core.u32Reserved = 0;
2539 n.Core.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
2540 RT_ZERO(n.Core.au8Data);
2541 n.cWidth = pScreen->cWidth;
2542 n.cHeight = pScreen->cHeight;
2543 n.xRoot = pScreen->xOrigin;
2544 n.yRoot = pScreen->yOrigin;
2545 n.fPrimary = RT_BOOL(pScreen->fuScreen & SVGA_SCREEN_IS_PRIMARY);
2546 n.cDpi = pScreen->cDpi;
2547
2548 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n.Core);
2549}
2550
2551
2552static int vmsvga3dDrvNotifyDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
2553{
2554 VBOX3DNOTIFY n;
2555 n.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_DESTROYED;
2556 n.iDisplay = pScreen->idScreen;
2557 n.u32Reserved = 0;
2558 n.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
2559 RT_ZERO(n.au8Data);
2560
2561 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n);
2562}
2563
2564
2565static int vmsvga3dDrvNotifyBindSurface(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, HANDLE hSharedSurface)
2566{
2567 VBOX3DNOTIFY n;
2568 n.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_BIND_SURFACE;
2569 n.iDisplay = pScreen->idScreen;
2570 n.u32Reserved = 0;
2571 n.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
2572 *(uint64_t *)&n.au8Data[0] = (uint64_t)hSharedSurface;
2573
2574 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n);
2575}
2576
2577
2578static int vmsvga3dDrvNotifyUpdate(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen,
2579 uint32_t x, uint32_t y, uint32_t w, uint32_t h)
2580{
2581 typedef struct VBOX3DNOTIFYUPDATE
2582 {
2583 VBOX3DNOTIFY Core;
2584 uint32_t x;
2585 uint32_t y;
2586 uint32_t w;
2587 uint32_t h;
2588 } VBOX3DNOTIFYUPDATE;
2589
2590 VBOX3DNOTIFYUPDATE n;
2591 n.Core.enmNotification = VBOX3D_NOTIFY_TYPE_HW_SCREEN_UPDATE_END;
2592 n.Core.iDisplay = pScreen->idScreen;
2593 n.Core.u32Reserved = 0;
2594 n.Core.cbData = sizeof(n) - RT_UOFFSETOF(VBOX3DNOTIFY, au8Data);
2595 RT_ZERO(n.Core.au8Data);
2596 n.x = x;
2597 n.y = y;
2598 n.w = w;
2599 n.h = h;
2600
2601 return pThisCC->pDrv->pfn3DNotifyProcess(pThisCC->pDrv, &n.Core);
2602}
2603
2604static int vmsvga3dHwScreenCreate(PVMSVGA3DSTATE pState, uint32_t cWidth, uint32_t cHeight, VMSVGAHWSCREEN *p)
2605{
2606 PVMSVGA3DBACKEND pBackend = pState->pBackend;
2607
2608 DXDEVICE *pDXDevice = &pBackend->device;
2609 AssertReturn(pDXDevice->pDevice, VERR_INVALID_STATE);
2610
2611 D3D11_TEXTURE2D_DESC td;
2612 RT_ZERO(td);
2613 td.Width = cWidth;
2614 td.Height = cHeight;
2615 td.MipLevels = 1;
2616 td.ArraySize = 1;
2617 td.Format = DXGI_FORMAT_B8G8R8A8_UNORM;
2618 td.SampleDesc.Count = 1;
2619 td.SampleDesc.Quality = 0;
2620 td.Usage = D3D11_USAGE_DEFAULT;
2621 td.BindFlags = D3D11_BIND_RENDER_TARGET | D3D11_BIND_SHADER_RESOURCE;
2622 td.CPUAccessFlags = 0;
2623 td.MiscFlags = D3D11_RESOURCE_MISC_SHARED_KEYEDMUTEX;
2624
2625 HRESULT hr = pDXDevice->pDevice->CreateTexture2D(&td, 0, &p->pTexture);
2626 if (SUCCEEDED(hr))
2627 {
2628 /* Get the shared handle. */
2629 hr = p->pTexture->QueryInterface(__uuidof(IDXGIResource), (void**)&p->pDxgiResource);
2630 if (SUCCEEDED(hr))
2631 {
2632 hr = p->pDxgiResource->GetSharedHandle(&p->SharedHandle);
2633 if (SUCCEEDED(hr))
2634 hr = p->pTexture->QueryInterface(__uuidof(IDXGIKeyedMutex), (void**)&p->pDXGIKeyedMutex);
2635 }
2636 }
2637
2638 if (SUCCEEDED(hr))
2639 return VINF_SUCCESS;
2640
2641 AssertFailed();
2642 return VERR_NOT_SUPPORTED;
2643}
2644
2645
2646static void vmsvga3dHwScreenDestroy(PVMSVGA3DSTATE pState, VMSVGAHWSCREEN *p)
2647{
2648 RT_NOREF(pState);
2649 D3D_RELEASE(p->pDXGIKeyedMutex);
2650 D3D_RELEASE(p->pDxgiResource);
2651 D3D_RELEASE(p->pTexture);
2652 p->SharedHandle = 0;
2653 p->sidScreenTarget = SVGA_ID_INVALID;
2654}
2655
2656
2657static DECLCALLBACK(int) vmsvga3dBackDefineScreen(PVGASTATE pThis, PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
2658{
2659 RT_NOREF(pThis, pThisCC, pScreen);
2660
2661 LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: screen %u\n", pScreen->idScreen));
2662
2663 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2664 AssertReturn(pState, VERR_INVALID_STATE);
2665
2666 PVMSVGA3DBACKEND pBackend = pState->pBackend;
2667 AssertReturn(pBackend, VERR_INVALID_STATE);
2668
2669 Assert(pScreen->pHwScreen == NULL);
2670
2671 VMSVGAHWSCREEN *p = (VMSVGAHWSCREEN *)RTMemAllocZ(sizeof(VMSVGAHWSCREEN));
2672 AssertPtrReturn(p, VERR_NO_MEMORY);
2673
2674 p->sidScreenTarget = SVGA_ID_INVALID;
2675
2676 int rc = vmsvga3dDrvNotifyDefineScreen(pThisCC, pScreen);
2677 if (RT_SUCCESS(rc))
2678 {
2679 /* The frontend supports the screen. Create the actual resource. */
2680 rc = vmsvga3dHwScreenCreate(pState, pScreen->cWidth, pScreen->cHeight, p);
2681 if (RT_SUCCESS(rc))
2682 LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: created\n"));
2683 }
2684
2685 if (RT_SUCCESS(rc))
2686 {
2687 LogRel(("VMSVGA: Using HW accelerated screen %u\n", pScreen->idScreen));
2688 pScreen->pHwScreen = p;
2689 }
2690 else
2691 {
2692 LogRel4(("VMSVGA: vmsvga3dBackDefineScreen: %Rrc\n", rc));
2693 vmsvga3dHwScreenDestroy(pState, p);
2694 RTMemFree(p);
2695 }
2696
2697 return rc;
2698}
2699
2700
2701static DECLCALLBACK(int) vmsvga3dBackDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
2702{
2703 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2704 AssertReturn(pState, VERR_INVALID_STATE);
2705
2706 vmsvga3dDrvNotifyDestroyScreen(pThisCC, pScreen);
2707
2708 if (pScreen->pHwScreen)
2709 {
2710 vmsvga3dHwScreenDestroy(pState, pScreen->pHwScreen);
2711 RTMemFree(pScreen->pHwScreen);
2712 pScreen->pHwScreen = NULL;
2713 }
2714
2715 return VINF_SUCCESS;
2716}
2717
2718
2719static DECLCALLBACK(int) vmsvga3dBackSurfaceBlitToScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen,
2720 SVGASignedRect destRect, SVGA3dSurfaceImageId srcImage,
2721 SVGASignedRect srcRect, uint32_t cRects, SVGASignedRect *paRects)
2722{
2723 RT_NOREF(pThisCC, pScreen, destRect, srcImage, srcRect, cRects, paRects);
2724
2725 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2726 AssertReturn(pState, VERR_INVALID_STATE);
2727
2728 PVMSVGA3DBACKEND pBackend = pState->pBackend;
2729 AssertReturn(pBackend, VERR_INVALID_STATE);
2730
2731 VMSVGAHWSCREEN *p = pScreen->pHwScreen;
2732 AssertReturn(p, VERR_NOT_SUPPORTED);
2733
2734 PVMSVGA3DSURFACE pSurface;
2735 int rc = vmsvga3dSurfaceFromSid(pState, srcImage.sid, &pSurface);
2736 AssertRCReturn(rc, rc);
2737
2738 /** @todo Implement. */
2739 AssertFailed();
2740 return VERR_NOT_IMPLEMENTED;
2741}
2742
2743
2744static DECLCALLBACK(int) vmsvga3dBackSurfaceMap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImage, SVGA3dBox const *pBox,
2745 VMSVGA3D_SURFACE_MAP enmMapType, VMSVGA3D_MAPPED_SURFACE *pMap)
2746{
2747 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2748 AssertReturn(pState, VERR_INVALID_STATE);
2749
2750 PVMSVGA3DBACKEND pBackend = pState->pBackend;
2751 AssertReturn(pBackend, VERR_INVALID_STATE);
2752
2753 PVMSVGA3DSURFACE pSurface;
2754 int rc = vmsvga3dSurfaceFromSid(pState, pImage->sid, &pSurface);
2755 AssertRCReturn(rc, rc);
2756
2757 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
2758 AssertPtrReturn(pBackendSurface, VERR_INVALID_STATE);
2759
2760 PVMSVGA3DMIPMAPLEVEL pMipLevel;
2761 rc = vmsvga3dMipmapLevel(pSurface, pImage->face, pImage->mipmap, &pMipLevel);
2762 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
2763
2764 /* A surface is always mapped by the DX context which has created the surface. */
2765 DXDEVICE *pDevice = dxDeviceFromCid(pSurface->idAssociatedContext, pState);
2766 AssertReturn(pDevice && pDevice->pDevice, VERR_INVALID_STATE);
2767
2768 SVGA3dBox clipBox;
2769 if (pBox)
2770 {
2771 clipBox = *pBox;
2772 vmsvgaR3ClipBox(&pMipLevel->mipmapSize, &clipBox);
2773 ASSERT_GUEST_RETURN(clipBox.w && clipBox.h && clipBox.d, VERR_INVALID_PARAMETER);
2774 }
2775 else
2776 {
2777 clipBox.x = 0;
2778 clipBox.y = 0;
2779 clipBox.z = 0;
2780 clipBox.w = pMipLevel->mipmapSize.width;
2781 clipBox.h = pMipLevel->mipmapSize.height;
2782 clipBox.d = pMipLevel->mipmapSize.depth;
2783 }
2784
2785 D3D11_MAP d3d11MapType;
2786 switch (enmMapType)
2787 {
2788 case VMSVGA3D_SURFACE_MAP_READ: d3d11MapType = D3D11_MAP_READ; break;
2789 case VMSVGA3D_SURFACE_MAP_WRITE: d3d11MapType = D3D11_MAP_WRITE; break;
2790 case VMSVGA3D_SURFACE_MAP_READ_WRITE: d3d11MapType = D3D11_MAP_READ_WRITE; break;
2791 case VMSVGA3D_SURFACE_MAP_WRITE_DISCARD: d3d11MapType = D3D11_MAP_WRITE_DISCARD; break;
2792 default:
2793 AssertFailed();
2794 return VERR_INVALID_PARAMETER;
2795 }
2796
2797 D3D11_MAPPED_SUBRESOURCE mappedResource;
2798 RT_ZERO(mappedResource);
2799
2800 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
2801 {
2802 Assert(pImage->face == 0 && pImage->mipmap == 0);
2803
2804 ID3D11Texture2D *pMappedTexture;
2805 if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
2806 {
2807 pMappedTexture = pBackendSurface->pStagingTexture;
2808
2809 /* Wait for the surface to finish drawing. */
2810 if (pBackendSurface->cidDrawing != SVGA_ID_INVALID)
2811 {
2812 dxContextWait(pBackendSurface->cidDrawing, pState);
2813 pBackendSurface->cidDrawing = SVGA_ID_INVALID;
2814 }
2815
2816 /* Copy the texture content to the staging texture. */
2817 pDevice->pImmediateContext->CopyResource(pBackendSurface->pStagingTexture, pBackendSurface->u.pTexture2D);
2818 }
2819 else if (enmMapType == VMSVGA3D_SURFACE_MAP_WRITE)
2820 pMappedTexture = pBackendSurface->pStagingTexture;
2821 else
2822 pMappedTexture = pBackendSurface->pDynamicTexture;
2823
2824 UINT const Subresource = 0; /* Screen target surfaces have only one subresource. */
2825 HRESULT hr = pDevice->pImmediateContext->Map(pMappedTexture, Subresource,
2826 d3d11MapType, /* MapFlags = */ 0, &mappedResource);
2827 if (SUCCEEDED(hr))
2828 {
2829 pMap->enmMapType = enmMapType;
2830 pMap->box = clipBox;
2831 pMap->cbPixel = pSurface->cbBlock;
2832 pMap->cbRowPitch = mappedResource.RowPitch;
2833 pMap->cbDepthPitch = mappedResource.DepthPitch;
2834 pMap->pvData = (uint8_t *)mappedResource.pData
2835 + pMap->box.x * pMap->cbPixel
2836 + pMap->box.y * pMap->cbRowPitch
2837 + pMap->box.z * pMap->cbDepthPitch;
2838 }
2839 else
2840 rc = VERR_NOT_SUPPORTED;
2841 }
2842 else if ( pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE
2843 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_CUBE_TEXTURE
2844 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
2845 {
2846//Assert(pImage->face == 0 && pImage->mipmap == 0);
2847if (!( (pBackendSurface->pStagingTexture && pBackendSurface->pDynamicTexture)
2848 || (pBackendSurface->pStagingTexture3D && pBackendSurface->pDynamicTexture3D)
2849 )
2850 )
2851{
2852 AssertFailed();
2853 return VERR_NOT_IMPLEMENTED;
2854}
2855
2856 ID3D11Resource *pMappedResource;
2857 if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
2858 {
2859 pMappedResource = (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
2860 ? (ID3D11Resource *)pBackendSurface->pStagingTexture3D
2861 : (ID3D11Resource *)pBackendSurface->pStagingTexture;
2862
2863 /* Wait for the surface to finish drawing. */
2864 if (pBackendSurface->cidDrawing != SVGA_ID_INVALID)
2865 {
2866 dxContextWait(pBackendSurface->cidDrawing, pState);
2867 pBackendSurface->cidDrawing = SVGA_ID_INVALID;
2868 }
2869
2870 /* Copy the texture content to the staging texture.
2871 * The requested miplevel of the texture is copied to the miplevel 0 of the staging texture,
2872 * because the staging (and dynamic) structures do not have miplevels.
2873 * Always copy entire miplevel so all Dst are zero and pSrcBox is NULL, as D3D11 requires.
2874 */
2875 ID3D11Resource *pDstResource = pMappedResource;
2876 UINT DstSubresource = 0;
2877 UINT DstX = 0;
2878 UINT DstY = 0;
2879 UINT DstZ = 0;
2880 ID3D11Resource *pSrcResource = pBackendSurface->u.pResource;
2881 UINT SrcSubresource = D3D11CalcSubresource(pImage->mipmap, pImage->face, pSurface->cLevels);
2882 D3D11_BOX *pSrcBox = NULL;
2883 //D3D11_BOX SrcBox;
2884 //SrcBox.left = 0;
2885 //SrcBox.top = 0;
2886 //SrcBox.front = 0;
2887 //SrcBox.right = pMipLevel->mipmapSize.width;
2888 //SrcBox.bottom = pMipLevel->mipmapSize.height;
2889 //SrcBox.back = pMipLevel->mipmapSize.depth;
2890 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
2891 pSrcResource, SrcSubresource, pSrcBox);
2892 }
2893 else if (enmMapType == VMSVGA3D_SURFACE_MAP_WRITE)
2894 pMappedResource = (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
2895 ? (ID3D11Resource *)pBackendSurface->pStagingTexture3D
2896 : (ID3D11Resource *)pBackendSurface->pStagingTexture;
2897 else
2898 pMappedResource = (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
2899 ? (ID3D11Resource *)pBackendSurface->pDynamicTexture3D
2900 : (ID3D11Resource *)pBackendSurface->pDynamicTexture;
2901
2902 UINT const Subresource = 0;
2903 HRESULT hr = pDevice->pImmediateContext->Map(pMappedResource, Subresource,
2904 d3d11MapType, /* MapFlags = */ 0, &mappedResource);
2905 if (SUCCEEDED(hr))
2906 {
2907 pMap->enmMapType = enmMapType;
2908 pMap->box = clipBox;
2909 pMap->cbPixel = pSurface->cbBlock;
2910 pMap->cbRowPitch = mappedResource.RowPitch;
2911 pMap->cbDepthPitch = mappedResource.DepthPitch;
2912 pMap->pvData = (uint8_t *)mappedResource.pData
2913 + pMap->box.x * pMap->cbPixel
2914 + pMap->box.y * pMap->cbRowPitch
2915 + pMap->box.z * pMap->cbDepthPitch;
2916 }
2917 else
2918 rc = VERR_NOT_SUPPORTED;
2919 }
2920 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
2921 {
2922 /* Map the staging buffer. */
2923 rc = dxStagingBufferRealloc(pDevice, pMipLevel->cbSurface);
2924 if (RT_SUCCESS(rc))
2925 {
2926 if (enmMapType == VMSVGA3D_SURFACE_MAP_READ)
2927 {
2928 /* Copy from the buffer to the staging buffer. */
2929 ID3D11Resource *pDstResource = pDevice->pStagingBuffer;
2930 UINT DstSubresource = 0;
2931 UINT DstX = clipBox.x;
2932 UINT DstY = clipBox.y;
2933 UINT DstZ = clipBox.z;
2934 ID3D11Resource *pSrcResource = pBackendSurface->u.pResource;
2935 UINT SrcSubresource = 0;
2936 D3D11_BOX SrcBox;
2937 SrcBox.left = clipBox.x;
2938 SrcBox.top = clipBox.y;
2939 SrcBox.front = clipBox.z;
2940 SrcBox.right = clipBox.w;
2941 SrcBox.bottom = clipBox.h;
2942 SrcBox.back = clipBox.d;
2943 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
2944 pSrcResource, SrcSubresource, &SrcBox);
2945 }
2946
2947 UINT const Subresource = 0; /* Buffers have only one subresource. */
2948 HRESULT hr = pDevice->pImmediateContext->Map(pDevice->pStagingBuffer, Subresource,
2949 d3d11MapType, /* MapFlags = */ 0, &mappedResource);
2950 if (SUCCEEDED(hr))
2951 {
2952 pMap->enmMapType = enmMapType;
2953 pMap->box = clipBox;
2954 pMap->cbPixel = pSurface->cbBlock;
2955 pMap->cbRowPitch = mappedResource.RowPitch;
2956 pMap->cbDepthPitch = mappedResource.DepthPitch;
2957 pMap->pvData = (uint8_t *)mappedResource.pData
2958 + pMap->box.x * pMap->cbPixel
2959 + pMap->box.y * pMap->cbRowPitch
2960 + pMap->box.z * pMap->cbDepthPitch;
2961 }
2962 else
2963 rc = VERR_NOT_SUPPORTED;
2964 }
2965 }
2966 else
2967 {
2968 // UINT D3D11CalcSubresource(UINT MipSlice, UINT ArraySlice, UINT MipLevels);
2969 /** @todo Implement. */
2970 AssertFailed();
2971 rc = VERR_NOT_IMPLEMENTED;
2972 }
2973
2974 return rc;
2975}
2976
2977
2978static DECLCALLBACK(int) vmsvga3dBackSurfaceUnmap(PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pImage, VMSVGA3D_MAPPED_SURFACE *pMap, bool fWritten)
2979{
2980 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
2981 AssertReturn(pState, VERR_INVALID_STATE);
2982
2983 PVMSVGA3DBACKEND pBackend = pState->pBackend;
2984 AssertReturn(pBackend, VERR_INVALID_STATE);
2985
2986 PVMSVGA3DSURFACE pSurface;
2987 int rc = vmsvga3dSurfaceFromSid(pState, pImage->sid, &pSurface);
2988 AssertRCReturn(rc, rc);
2989
2990 /* The called should not use the function for system memory surfaces. */
2991 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
2992 AssertReturn(pBackendSurface, VERR_INVALID_PARAMETER);
2993
2994 PVMSVGA3DMIPMAPLEVEL pMipLevel;
2995 rc = vmsvga3dMipmapLevel(pSurface, pImage->face, pImage->mipmap, &pMipLevel);
2996 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
2997
2998 /* A surface is always mapped by the DX context which has created the surface. */
2999 DXDEVICE *pDevice = dxDeviceFromCid(pSurface->idAssociatedContext, pState);
3000 AssertReturn(pDevice && pDevice->pDevice, VERR_INVALID_STATE);
3001
3002 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
3003 {
3004 ID3D11Texture2D *pMappedTexture;
3005 if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ)
3006 pMappedTexture = pBackendSurface->pStagingTexture;
3007 else if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE)
3008 pMappedTexture = pBackendSurface->pStagingTexture;
3009 else
3010 pMappedTexture = pBackendSurface->pDynamicTexture;
3011
3012 UINT const Subresource = 0; /* Screen target surfaces have only one subresource. */
3013 pDevice->pImmediateContext->Unmap(pMappedTexture, Subresource);
3014
3015 if ( fWritten
3016 && ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
3017 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
3018 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
3019 {
3020 ID3D11Resource *pDstResource = pBackendSurface->u.pTexture2D;
3021 UINT DstSubresource = Subresource;
3022 UINT DstX = pMap->box.x;
3023 UINT DstY = pMap->box.y;
3024 UINT DstZ = pMap->box.z;
3025 ID3D11Resource *pSrcResource = pMappedTexture;
3026 UINT SrcSubresource = Subresource;
3027 D3D11_BOX SrcBox;
3028 SrcBox.left = pMap->box.x;
3029 SrcBox.top = pMap->box.y;
3030 SrcBox.front = pMap->box.z;
3031 SrcBox.right = pMap->box.x + pMap->box.w;
3032 SrcBox.bottom = pMap->box.y + pMap->box.h;
3033 SrcBox.back = pMap->box.z + pMap->box.d;
3034
3035 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3036 pSrcResource, SrcSubresource, &SrcBox);
3037
3038 pBackendSurface->cidDrawing = pSurface->idAssociatedContext;
3039 }
3040 }
3041 else if ( pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE
3042 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_CUBE_TEXTURE
3043 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
3044 {
3045 ID3D11Resource *pMappedResource;
3046 if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ)
3047 pMappedResource = (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
3048 ? (ID3D11Resource *)pBackendSurface->pStagingTexture3D
3049 : (ID3D11Resource *)pBackendSurface->pStagingTexture;
3050 else if (pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE)
3051 pMappedResource = (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
3052 ? (ID3D11Resource *)pBackendSurface->pStagingTexture3D
3053 : (ID3D11Resource *)pBackendSurface->pStagingTexture;
3054 else
3055 pMappedResource = (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
3056 ? (ID3D11Resource *)pBackendSurface->pDynamicTexture3D
3057 : (ID3D11Resource *)pBackendSurface->pDynamicTexture;
3058
3059 UINT const Subresource = 0; /* Staging or dynamic textures have one subresource. */
3060 pDevice->pImmediateContext->Unmap(pMappedResource, Subresource);
3061
3062 if ( fWritten
3063 && ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
3064 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
3065 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
3066 {
3067 /* If entire resource must be copied then use pSrcBox = NULL and dst point (0,0,0)
3068 * Because DX11 insists on this for some resource types, for example DEPTH_STENCIL resources.
3069 */
3070 uint32_t const cWidth0 = pSurface->paMipmapLevels[0].mipmapSize.width;
3071 uint32_t const cHeight0 = pSurface->paMipmapLevels[0].mipmapSize.height;
3072 uint32_t const cDepth0 = pSurface->paMipmapLevels[0].mipmapSize.depth;
3073 bool const fEntireResource = pMap->box.x == 0 && pMap->box.y == 0 && pMap->box.z == 0
3074 && pMap->box.w == cWidth0 && pMap->box.h == cHeight0 && pMap->box.d == cDepth0;
3075
3076 ID3D11Resource *pDstResource = pBackendSurface->u.pResource;
3077 UINT DstSubresource = D3D11CalcSubresource(pImage->mipmap, pImage->face, pSurface->cLevels);
3078 UINT DstX = (pMap->box.x / pSurface->cxBlock) * pSurface->cxBlock;
3079 UINT DstY = (pMap->box.y / pSurface->cyBlock) * pSurface->cyBlock;
3080 UINT DstZ = pMap->box.z;
3081 ID3D11Resource *pSrcResource = pMappedResource;
3082 UINT SrcSubresource = Subresource;
3083 D3D11_BOX *pSrcBox;
3084 D3D11_BOX SrcBox;
3085 if (fEntireResource)
3086 pSrcBox = NULL;
3087 else
3088 {
3089 uint32_t const cxBlocks = (pMap->box.w + pSurface->cxBlock - 1) / pSurface->cxBlock;
3090 uint32_t const cyBlocks = (pMap->box.h + pSurface->cyBlock - 1) / pSurface->cyBlock;
3091
3092 SrcBox.left = DstX;
3093 SrcBox.top = DstY;
3094 SrcBox.front = DstZ;
3095 SrcBox.right = DstX + cxBlocks * pSurface->cxBlock;
3096 SrcBox.bottom = DstY + cyBlocks * pSurface->cyBlock;
3097 SrcBox.back = DstZ + pMap->box.d;
3098 pSrcBox = &SrcBox;
3099 }
3100
3101 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3102 pSrcResource, SrcSubresource, pSrcBox);
3103
3104 pBackendSurface->cidDrawing = pSurface->idAssociatedContext;
3105 }
3106 }
3107 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
3108 {
3109 /* Unmap the staging buffer. */
3110 UINT const Subresource = 0; /* Buffers have only one subresource. */
3111 pDevice->pImmediateContext->Unmap(pDevice->pStagingBuffer, Subresource);
3112
3113 /* Copy from the staging buffer to the actual buffer */
3114 if ( fWritten
3115 && ( pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE
3116 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_READ_WRITE
3117 || pMap->enmMapType == VMSVGA3D_SURFACE_MAP_WRITE_DISCARD))
3118 {
3119 ID3D11Resource *pDstResource = pBackendSurface->u.pResource;
3120 UINT DstSubresource = 0;
3121 UINT DstX = (pMap->box.x / pSurface->cxBlock) * pSurface->cxBlock;
3122 UINT DstY = (pMap->box.y / pSurface->cyBlock) * pSurface->cyBlock;
3123 UINT DstZ = pMap->box.z;
3124 ID3D11Resource *pSrcResource = pDevice->pStagingBuffer;
3125 UINT SrcSubresource = 0;
3126 D3D11_BOX SrcBox;
3127
3128 uint32_t const cxBlocks = (pMap->box.w + pSurface->cxBlock - 1) / pSurface->cxBlock;
3129 uint32_t const cyBlocks = (pMap->box.h + pSurface->cyBlock - 1) / pSurface->cyBlock;
3130
3131 SrcBox.left = DstX;
3132 SrcBox.top = DstY;
3133 SrcBox.front = DstZ;
3134 SrcBox.right = DstX + cxBlocks * pSurface->cxBlock;
3135 SrcBox.bottom = DstY + cyBlocks * pSurface->cyBlock;
3136 SrcBox.back = DstZ + pMap->box.d;
3137
3138 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3139 pSrcResource, SrcSubresource, &SrcBox);
3140 }
3141 }
3142 else
3143 {
3144 AssertFailed();
3145 rc = VERR_NOT_IMPLEMENTED;
3146 }
3147
3148 return rc;
3149}
3150
3151
3152static DECLCALLBACK(int) vmsvga3dScreenTargetBind(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, uint32_t sid)
3153{
3154 int rc = VINF_SUCCESS;
3155
3156 PVMSVGA3DSURFACE pSurface;
3157 if (sid != SVGA_ID_INVALID)
3158 {
3159 /* Create the surface if does not yet exist. */
3160 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3161 AssertReturn(pState, VERR_INVALID_STATE);
3162
3163 rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
3164 AssertRCReturn(rc, rc);
3165
3166 if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
3167 {
3168 /* Create the actual texture. */
3169 rc = vmsvga3dBackSurfaceCreateScreenTarget(pThisCC, pSurface);
3170 AssertRCReturn(rc, rc);
3171 }
3172 }
3173 else
3174 pSurface = NULL;
3175
3176 /* Notify the HW accelerated screen if it is used. */
3177 VMSVGAHWSCREEN *pHwScreen = pScreen->pHwScreen;
3178 if (!pHwScreen)
3179 return VINF_SUCCESS;
3180
3181 /* Same surface -> do nothing. */
3182 if (pHwScreen->sidScreenTarget == sid)
3183 return VINF_SUCCESS;
3184
3185 if (sid != SVGA_ID_INVALID)
3186 {
3187 AssertReturn( pSurface->pBackendSurface
3188 && pSurface->pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET, VERR_INVALID_PARAMETER);
3189
3190 HANDLE const hSharedSurface = pHwScreen->SharedHandle;
3191 rc = vmsvga3dDrvNotifyBindSurface(pThisCC, pScreen, hSharedSurface);
3192 }
3193
3194 if (RT_SUCCESS(rc))
3195 {
3196 pHwScreen->sidScreenTarget = sid;
3197 }
3198
3199 return rc;
3200}
3201
3202
3203static DECLCALLBACK(int) vmsvga3dScreenTargetUpdate(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen, SVGA3dRect const *pRect)
3204{
3205 VMSVGAHWSCREEN *pHwScreen = pScreen->pHwScreen;
3206 AssertReturn(pHwScreen, VERR_NOT_SUPPORTED);
3207
3208 if (pHwScreen->sidScreenTarget == SVGA_ID_INVALID)
3209 return VINF_SUCCESS; /* No surface bound. */
3210
3211 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3212 AssertReturn(pState, VERR_INVALID_STATE);
3213
3214 PVMSVGA3DBACKEND pBackend = pState->pBackend;
3215 AssertReturn(pBackend, VERR_INVALID_STATE);
3216
3217 PVMSVGA3DSURFACE pSurface;
3218 int rc = vmsvga3dSurfaceFromSid(pState, pHwScreen->sidScreenTarget, &pSurface);
3219 AssertRCReturn(rc, rc);
3220
3221 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
3222 AssertReturn(pBackendSurface && pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET, VERR_INVALID_PARAMETER);
3223
3224 SVGA3dRect boundRect;
3225 boundRect.x = 0;
3226 boundRect.y = 0;
3227 boundRect.w = pSurface->paMipmapLevels[0].mipmapSize.width;
3228 boundRect.h = pSurface->paMipmapLevels[0].mipmapSize.height;
3229 SVGA3dRect clipRect = *pRect;
3230 vmsvgaR3Clip3dRect(&boundRect, &clipRect);
3231 ASSERT_GUEST_RETURN(clipRect.w && clipRect.h, VERR_INVALID_PARAMETER);
3232
3233 /* Wait for the surface to finish drawing. */
3234 if (pBackendSurface->cidDrawing != SVGA_ID_INVALID)
3235 {
3236 dxContextWait(pBackendSurface->cidDrawing, pState);
3237 pBackendSurface->cidDrawing = SVGA_ID_INVALID;
3238 }
3239
3240 /* Copy the screen texture to the shared surface. */
3241 DWORD result = pHwScreen->pDXGIKeyedMutex->AcquireSync(0, 10000);
3242 if (result == WAIT_OBJECT_0)
3243 {
3244 pBackend->device.pImmediateContext->CopyResource(pHwScreen->pTexture, pBackendSurface->u.pTexture2D);
3245
3246 dxDeviceFlush(&pBackend->device);
3247
3248 result = pHwScreen->pDXGIKeyedMutex->ReleaseSync(1);
3249 }
3250 else
3251 AssertFailed();
3252
3253 rc = vmsvga3dDrvNotifyUpdate(pThisCC, pScreen, pRect->x, pRect->y, pRect->w, pRect->h);
3254 return rc;
3255}
3256
3257
3258/*
3259 *
3260 * 3D interface.
3261 *
3262 */
3263
3264static DECLCALLBACK(int) vmsvga3dBackQueryCaps(PVGASTATECC pThisCC, SVGA3dDevCapIndex idx3dCaps, uint32_t *pu32Val)
3265{
3266 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3267 AssertReturn(pState, VERR_INVALID_STATE);
3268
3269 int rc = VINF_SUCCESS;
3270
3271 *pu32Val = 0;
3272
3273 if (idx3dCaps > SVGA3D_DEVCAP_MAX)
3274 {
3275 LogRelMax(16, ("VMSVGA: unsupported SVGA3D_DEVCAP %d\n", idx3dCaps));
3276 return VERR_NOT_SUPPORTED;
3277 }
3278
3279 D3D_FEATURE_LEVEL const FeatureLevel = pState->pBackend->device.FeatureLevel;
3280
3281 /* Most values are taken from:
3282 * https://docs.microsoft.com/en-us/windows/win32/direct3d11/overviews-direct3d-11-devices-downlevel-intro
3283 *
3284 * Shader values are from
3285 * https://docs.microsoft.com/en-us/windows/win32/direct3dhlsl/dx-graphics-hlsl-models
3286 */
3287
3288 switch (idx3dCaps)
3289 {
3290 case SVGA3D_DEVCAP_3D:
3291 *pu32Val = 1;
3292 break;
3293
3294 case SVGA3D_DEVCAP_MAX_LIGHTS:
3295 *pu32Val = SVGA3D_NUM_LIGHTS; /* VGPU9. Not applicable to DX11. */
3296 break;
3297
3298 case SVGA3D_DEVCAP_MAX_TEXTURES:
3299 *pu32Val = SVGA3D_NUM_TEXTURE_UNITS; /* VGPU9. Not applicable to DX11. */
3300 break;
3301
3302 case SVGA3D_DEVCAP_MAX_CLIP_PLANES:
3303 *pu32Val = SVGA3D_NUM_CLIPPLANES;
3304 break;
3305
3306 case SVGA3D_DEVCAP_VERTEX_SHADER_VERSION:
3307 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
3308 *pu32Val = SVGA3DVSVERSION_40;
3309 else
3310 *pu32Val = SVGA3DVSVERSION_30;
3311 break;
3312
3313 case SVGA3D_DEVCAP_VERTEX_SHADER:
3314 *pu32Val = 1;
3315 break;
3316
3317 case SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION:
3318 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
3319 *pu32Val = SVGA3DPSVERSION_40;
3320 else
3321 *pu32Val = SVGA3DPSVERSION_30;
3322 break;
3323
3324 case SVGA3D_DEVCAP_FRAGMENT_SHADER:
3325 *pu32Val = 1;
3326 break;
3327
3328 case SVGA3D_DEVCAP_MAX_RENDER_TARGETS:
3329 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
3330 *pu32Val = 8;
3331 else
3332 *pu32Val = 4;
3333 break;
3334
3335 case SVGA3D_DEVCAP_S23E8_TEXTURES:
3336 case SVGA3D_DEVCAP_S10E5_TEXTURES:
3337 /* Must be obsolete by now; surface format caps specify the same thing. */
3338 break;
3339
3340 case SVGA3D_DEVCAP_MAX_FIXED_VERTEXBLEND:
3341 /* Obsolete */
3342 break;
3343
3344 /*
3345 * 2. The BUFFER_FORMAT capabilities are deprecated, and they always
3346 * return TRUE. Even on physical hardware that does not support
3347 * these formats natively, the SVGA3D device will provide an emulation
3348 * which should be invisible to the guest OS.
3349 */
3350 case SVGA3D_DEVCAP_D16_BUFFER_FORMAT:
3351 case SVGA3D_DEVCAP_D24S8_BUFFER_FORMAT:
3352 case SVGA3D_DEVCAP_D24X8_BUFFER_FORMAT:
3353 *pu32Val = 1;
3354 break;
3355
3356 case SVGA3D_DEVCAP_QUERY_TYPES:
3357 /* Obsolete */
3358 break;
3359
3360 case SVGA3D_DEVCAP_TEXTURE_GRADIENT_SAMPLING:
3361 /* Obsolete */
3362 break;
3363
3364 case SVGA3D_DEVCAP_MAX_POINT_SIZE:
3365 AssertCompile(sizeof(uint32_t) == sizeof(float));
3366 *(float *)pu32Val = 256.0f; /* VGPU9. Not applicable to DX11. */
3367 break;
3368
3369 case SVGA3D_DEVCAP_MAX_SHADER_TEXTURES:
3370 /* Obsolete */
3371 break;
3372
3373 case SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH:
3374 case SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT:
3375 if (FeatureLevel >= D3D_FEATURE_LEVEL_11_0)
3376 *pu32Val = 16384;
3377 else if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
3378 *pu32Val = 8192;
3379 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
3380 *pu32Val = 4096;
3381 else
3382 *pu32Val = 2048;
3383 break;
3384
3385 case SVGA3D_DEVCAP_MAX_VOLUME_EXTENT:
3386 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
3387 *pu32Val = 2048;
3388 else
3389 *pu32Val = 256;
3390 break;
3391
3392 case SVGA3D_DEVCAP_MAX_TEXTURE_REPEAT:
3393 if (FeatureLevel >= D3D_FEATURE_LEVEL_11_0)
3394 *pu32Val = 16384;
3395 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
3396 *pu32Val = 8192;
3397 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
3398 *pu32Val = 2048;
3399 else
3400 *pu32Val = 128;
3401 break;
3402
3403 case SVGA3D_DEVCAP_MAX_TEXTURE_ASPECT_RATIO:
3404 /* Obsolete */
3405 break;
3406
3407 case SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY:
3408 if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
3409 *pu32Val = D3D11_REQ_MAXANISOTROPY;
3410 else
3411 *pu32Val = 2; // D3D_FL9_1_DEFAULT_MAX_ANISOTROPY;
3412 break;
3413
3414 case SVGA3D_DEVCAP_MAX_PRIMITIVE_COUNT:
3415 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
3416 *pu32Val = UINT32_MAX;
3417 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
3418 *pu32Val = 1048575; // D3D_FL9_2_IA_PRIMITIVE_MAX_COUNT;
3419 else
3420 *pu32Val = 65535; // D3D_FL9_1_IA_PRIMITIVE_MAX_COUNT;
3421 break;
3422
3423 case SVGA3D_DEVCAP_MAX_VERTEX_INDEX:
3424 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
3425 *pu32Val = UINT32_MAX;
3426 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_2)
3427 *pu32Val = 1048575;
3428 else
3429 *pu32Val = 65534;
3430 break;
3431
3432 case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS:
3433 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
3434 *pu32Val = UINT32_MAX;
3435 else
3436 *pu32Val = 512;
3437 break;
3438
3439 case SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_INSTRUCTIONS:
3440 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
3441 *pu32Val = UINT32_MAX;
3442 else
3443 *pu32Val = 512;
3444 break;
3445
3446 case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS:
3447 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
3448 *pu32Val = 4096;
3449 else
3450 *pu32Val = 32;
3451 break;
3452
3453 case SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS:
3454 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
3455 *pu32Val = 4096;
3456 else
3457 *pu32Val = 32;
3458 break;
3459
3460 case SVGA3D_DEVCAP_TEXTURE_OPS:
3461 /* Obsolete */
3462 break;
3463
3464 case SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8:
3465 case SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8:
3466 case SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10:
3467 case SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5:
3468 case SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5:
3469 case SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4:
3470 case SVGA3D_DEVCAP_SURFACEFMT_R5G6B5:
3471 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16:
3472 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8:
3473 case SVGA3D_DEVCAP_SURFACEFMT_ALPHA8:
3474 case SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8:
3475 case SVGA3D_DEVCAP_SURFACEFMT_Z_D16:
3476 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8:
3477 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8:
3478 case SVGA3D_DEVCAP_SURFACEFMT_DXT1:
3479 case SVGA3D_DEVCAP_SURFACEFMT_DXT2:
3480 case SVGA3D_DEVCAP_SURFACEFMT_DXT3:
3481 case SVGA3D_DEVCAP_SURFACEFMT_DXT4:
3482 case SVGA3D_DEVCAP_SURFACEFMT_DXT5:
3483 case SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8:
3484 case SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10:
3485 case SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8:
3486 case SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8:
3487 case SVGA3D_DEVCAP_SURFACEFMT_CxV8U8:
3488 case SVGA3D_DEVCAP_SURFACEFMT_R_S10E5:
3489 case SVGA3D_DEVCAP_SURFACEFMT_R_S23E8:
3490 case SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5:
3491 case SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8:
3492 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5:
3493 case SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8:
3494 case SVGA3D_DEVCAP_SURFACEFMT_V16U16:
3495 case SVGA3D_DEVCAP_SURFACEFMT_G16R16:
3496 case SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16:
3497 case SVGA3D_DEVCAP_SURFACEFMT_UYVY:
3498 case SVGA3D_DEVCAP_SURFACEFMT_YUY2:
3499 case SVGA3D_DEVCAP_SURFACEFMT_NV12:
3500 case SVGA3D_DEVCAP_DEAD10: /* SVGA3D_DEVCAP_SURFACEFMT_AYUV */
3501 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF16:
3502 case SVGA3D_DEVCAP_SURFACEFMT_Z_DF24:
3503 case SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT:
3504 case SVGA3D_DEVCAP_SURFACEFMT_ATI1:
3505 case SVGA3D_DEVCAP_SURFACEFMT_ATI2:
3506 case SVGA3D_DEVCAP_SURFACEFMT_YV12:
3507 {
3508 SVGA3dSurfaceFormat const enmFormat = vmsvgaDXDevCapSurfaceFmt2Format(idx3dCaps);
3509 rc = vmsvgaDXCheckFormatSupportPreDX(pState, enmFormat, pu32Val);
3510 break;
3511 }
3512
3513 case SVGA3D_DEVCAP_MISSING62:
3514 /* Unused */
3515 break;
3516
3517 case SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEXTURES:
3518 /* Obsolete */
3519 break;
3520
3521 case SVGA3D_DEVCAP_MAX_SIMULTANEOUS_RENDER_TARGETS:
3522 if (FeatureLevel >= D3D_FEATURE_LEVEL_10_0)
3523 *pu32Val = 8;
3524 else if (FeatureLevel >= D3D_FEATURE_LEVEL_9_3)
3525 *pu32Val = 4; // D3D_FL9_3_SIMULTANEOUS_RENDER_TARGET_COUNT
3526 else
3527 *pu32Val = 1; // D3D_FL9_1_SIMULTANEOUS_RENDER_TARGET_COUNT
3528 break;
3529
3530 case SVGA3D_DEVCAP_DEAD4: /* SVGA3D_DEVCAP_MULTISAMPLE_NONMASKABLESAMPLES */
3531 case SVGA3D_DEVCAP_DEAD5: /* SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES */
3532 *pu32Val = (1 << (2-1)) | (1 << (4-1)) | (1 << (8-1)); /* 2x, 4x, 8x */
3533 break;
3534
3535 case SVGA3D_DEVCAP_DEAD7: /* SVGA3D_DEVCAP_ALPHATOCOVERAGE */
3536 /* Obsolete */
3537 break;
3538
3539 case SVGA3D_DEVCAP_DEAD6: /* SVGA3D_DEVCAP_SUPERSAMPLE */
3540 /* Obsolete */
3541 break;
3542
3543 case SVGA3D_DEVCAP_AUTOGENMIPMAPS:
3544 *pu32Val = 1;
3545 break;
3546
3547 case SVGA3D_DEVCAP_MAX_CONTEXT_IDS:
3548 *pu32Val = SVGA3D_MAX_CONTEXT_IDS;
3549 break;
3550
3551 case SVGA3D_DEVCAP_MAX_SURFACE_IDS:
3552 *pu32Val = SVGA3D_MAX_SURFACE_IDS;
3553 break;
3554
3555 case SVGA3D_DEVCAP_DEAD1:
3556 /* Obsolete */
3557 break;
3558
3559 case SVGA3D_DEVCAP_DEAD8: /* SVGA3D_DEVCAP_VIDEO_DECODE */
3560 /* Obsolete */
3561 break;
3562
3563 case SVGA3D_DEVCAP_DEAD9: /* SVGA3D_DEVCAP_VIDEO_PROCESS */
3564 /* Obsolete */
3565 break;
3566
3567 case SVGA3D_DEVCAP_LINE_AA:
3568 *pu32Val = 1;
3569 break;
3570
3571 case SVGA3D_DEVCAP_LINE_STIPPLE:
3572 *pu32Val = 0; /* DX11 does not seem to support this directly. */
3573 break;
3574
3575 case SVGA3D_DEVCAP_MAX_LINE_WIDTH:
3576 AssertCompile(sizeof(uint32_t) == sizeof(float));
3577 *(float *)pu32Val = 1.0f;
3578 break;
3579
3580 case SVGA3D_DEVCAP_MAX_AA_LINE_WIDTH:
3581 AssertCompile(sizeof(uint32_t) == sizeof(float));
3582 *(float *)pu32Val = 1.0f;
3583 break;
3584
3585 case SVGA3D_DEVCAP_DEAD3: /* Old SVGA3D_DEVCAP_LOGICOPS */
3586 /* Deprecated. */
3587 AssertCompile(SVGA3D_DEVCAP_DEAD3 == 92); /* Newer SVGA headers redefine this. */
3588 break;
3589
3590 case SVGA3D_DEVCAP_TS_COLOR_KEY:
3591 *pu32Val = 0; /* DX11 does not seem to support this directly. */
3592 break;
3593
3594 case SVGA3D_DEVCAP_DEAD2:
3595 break;
3596
3597 case SVGA3D_DEVCAP_DXCONTEXT:
3598 *pu32Val = 1;
3599 break;
3600
3601 case SVGA3D_DEVCAP_DEAD11: /* SVGA3D_DEVCAP_MAX_TEXTURE_ARRAY_SIZE */
3602 *pu32Val = D3D11_REQ_TEXTURE2D_ARRAY_AXIS_DIMENSION;
3603 break;
3604
3605 case SVGA3D_DEVCAP_DX_MAX_VERTEXBUFFERS:
3606 *pu32Val = D3D11_IA_VERTEX_INPUT_RESOURCE_SLOT_COUNT;
3607 break;
3608
3609 case SVGA3D_DEVCAP_DX_MAX_CONSTANT_BUFFERS:
3610 *pu32Val = D3D11_COMMONSHADER_CONSTANT_BUFFER_HW_SLOT_COUNT;
3611 break;
3612
3613 case SVGA3D_DEVCAP_DX_PROVOKING_VERTEX:
3614 *pu32Val = 0; /* boolean */
3615 break;
3616
3617 case SVGA3D_DEVCAP_DXFMT_X8R8G8B8:
3618 case SVGA3D_DEVCAP_DXFMT_A8R8G8B8:
3619 case SVGA3D_DEVCAP_DXFMT_R5G6B5:
3620 case SVGA3D_DEVCAP_DXFMT_X1R5G5B5:
3621 case SVGA3D_DEVCAP_DXFMT_A1R5G5B5:
3622 case SVGA3D_DEVCAP_DXFMT_A4R4G4B4:
3623 case SVGA3D_DEVCAP_DXFMT_Z_D32:
3624 case SVGA3D_DEVCAP_DXFMT_Z_D16:
3625 case SVGA3D_DEVCAP_DXFMT_Z_D24S8:
3626 case SVGA3D_DEVCAP_DXFMT_Z_D15S1:
3627 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8:
3628 case SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4:
3629 case SVGA3D_DEVCAP_DXFMT_LUMINANCE16:
3630 case SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8:
3631 case SVGA3D_DEVCAP_DXFMT_DXT1:
3632 case SVGA3D_DEVCAP_DXFMT_DXT2:
3633 case SVGA3D_DEVCAP_DXFMT_DXT3:
3634 case SVGA3D_DEVCAP_DXFMT_DXT4:
3635 case SVGA3D_DEVCAP_DXFMT_DXT5:
3636 case SVGA3D_DEVCAP_DXFMT_BUMPU8V8:
3637 case SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5:
3638 case SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8:
3639 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1:
3640 case SVGA3D_DEVCAP_DXFMT_ARGB_S10E5:
3641 case SVGA3D_DEVCAP_DXFMT_ARGB_S23E8:
3642 case SVGA3D_DEVCAP_DXFMT_A2R10G10B10:
3643 case SVGA3D_DEVCAP_DXFMT_V8U8:
3644 case SVGA3D_DEVCAP_DXFMT_Q8W8V8U8:
3645 case SVGA3D_DEVCAP_DXFMT_CxV8U8:
3646 case SVGA3D_DEVCAP_DXFMT_X8L8V8U8:
3647 case SVGA3D_DEVCAP_DXFMT_A2W10V10U10:
3648 case SVGA3D_DEVCAP_DXFMT_ALPHA8:
3649 case SVGA3D_DEVCAP_DXFMT_R_S10E5:
3650 case SVGA3D_DEVCAP_DXFMT_R_S23E8:
3651 case SVGA3D_DEVCAP_DXFMT_RG_S10E5:
3652 case SVGA3D_DEVCAP_DXFMT_RG_S23E8:
3653 case SVGA3D_DEVCAP_DXFMT_BUFFER:
3654 case SVGA3D_DEVCAP_DXFMT_Z_D24X8:
3655 case SVGA3D_DEVCAP_DXFMT_V16U16:
3656 case SVGA3D_DEVCAP_DXFMT_G16R16:
3657 case SVGA3D_DEVCAP_DXFMT_A16B16G16R16:
3658 case SVGA3D_DEVCAP_DXFMT_UYVY:
3659 case SVGA3D_DEVCAP_DXFMT_YUY2:
3660 case SVGA3D_DEVCAP_DXFMT_NV12:
3661 case SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD2: /* SVGA3D_DEVCAP_DXFMT_AYUV */
3662 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS:
3663 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT:
3664 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT:
3665 case SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS:
3666 case SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT:
3667 case SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT:
3668 case SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT:
3669 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS:
3670 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT:
3671 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM:
3672 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT:
3673 case SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS:
3674 case SVGA3D_DEVCAP_DXFMT_R32G32_UINT:
3675 case SVGA3D_DEVCAP_DXFMT_R32G32_SINT:
3676 case SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS:
3677 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT:
3678 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24:
3679 case SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT:
3680 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS:
3681 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT:
3682 case SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT:
3683 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS:
3684 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM:
3685 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB:
3686 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT:
3687 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT:
3688 case SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS:
3689 case SVGA3D_DEVCAP_DXFMT_R16G16_UINT:
3690 case SVGA3D_DEVCAP_DXFMT_R16G16_SINT:
3691 case SVGA3D_DEVCAP_DXFMT_R32_TYPELESS:
3692 case SVGA3D_DEVCAP_DXFMT_D32_FLOAT:
3693 case SVGA3D_DEVCAP_DXFMT_R32_UINT:
3694 case SVGA3D_DEVCAP_DXFMT_R32_SINT:
3695 case SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS:
3696 case SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT:
3697 case SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8:
3698 case SVGA3D_DEVCAP_DXFMT_X24_G8_UINT:
3699 case SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS:
3700 case SVGA3D_DEVCAP_DXFMT_R8G8_UNORM:
3701 case SVGA3D_DEVCAP_DXFMT_R8G8_UINT:
3702 case SVGA3D_DEVCAP_DXFMT_R8G8_SINT:
3703 case SVGA3D_DEVCAP_DXFMT_R16_TYPELESS:
3704 case SVGA3D_DEVCAP_DXFMT_R16_UNORM:
3705 case SVGA3D_DEVCAP_DXFMT_R16_UINT:
3706 case SVGA3D_DEVCAP_DXFMT_R16_SNORM:
3707 case SVGA3D_DEVCAP_DXFMT_R16_SINT:
3708 case SVGA3D_DEVCAP_DXFMT_R8_TYPELESS:
3709 case SVGA3D_DEVCAP_DXFMT_R8_UNORM:
3710 case SVGA3D_DEVCAP_DXFMT_R8_UINT:
3711 case SVGA3D_DEVCAP_DXFMT_R8_SNORM:
3712 case SVGA3D_DEVCAP_DXFMT_R8_SINT:
3713 case SVGA3D_DEVCAP_DXFMT_P8:
3714 case SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP:
3715 case SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM:
3716 case SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM:
3717 case SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS:
3718 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB:
3719 case SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS:
3720 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB:
3721 case SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS:
3722 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB:
3723 case SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS:
3724 case SVGA3D_DEVCAP_DXFMT_ATI1:
3725 case SVGA3D_DEVCAP_DXFMT_BC4_SNORM:
3726 case SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS:
3727 case SVGA3D_DEVCAP_DXFMT_ATI2:
3728 case SVGA3D_DEVCAP_DXFMT_BC5_SNORM:
3729 case SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM:
3730 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS:
3731 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB:
3732 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS:
3733 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB:
3734 case SVGA3D_DEVCAP_DXFMT_Z_DF16:
3735 case SVGA3D_DEVCAP_DXFMT_Z_DF24:
3736 case SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT:
3737 case SVGA3D_DEVCAP_DXFMT_YV12:
3738 case SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT:
3739 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT:
3740 case SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM:
3741 case SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT:
3742 case SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM:
3743 case SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM:
3744 case SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT:
3745 case SVGA3D_DEVCAP_DXFMT_R16G16_UNORM:
3746 case SVGA3D_DEVCAP_DXFMT_R16G16_SNORM:
3747 case SVGA3D_DEVCAP_DXFMT_R32_FLOAT:
3748 case SVGA3D_DEVCAP_DXFMT_R8G8_SNORM:
3749 case SVGA3D_DEVCAP_DXFMT_R16_FLOAT:
3750 case SVGA3D_DEVCAP_DXFMT_D16_UNORM:
3751 case SVGA3D_DEVCAP_DXFMT_A8_UNORM:
3752 case SVGA3D_DEVCAP_DXFMT_BC1_UNORM:
3753 case SVGA3D_DEVCAP_DXFMT_BC2_UNORM:
3754 case SVGA3D_DEVCAP_DXFMT_BC3_UNORM:
3755 case SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM:
3756 case SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM:
3757 case SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM:
3758 case SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM:
3759 case SVGA3D_DEVCAP_DXFMT_BC4_UNORM:
3760 case SVGA3D_DEVCAP_DXFMT_BC5_UNORM:
3761 case SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS:
3762 case SVGA3D_DEVCAP_DXFMT_BC6H_UF16:
3763 case SVGA3D_DEVCAP_DXFMT_BC6H_SF16:
3764 case SVGA3D_DEVCAP_DXFMT_BC7_TYPELESS:
3765 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM:
3766 case SVGA3D_DEVCAP_DXFMT_BC7_UNORM_SRGB:
3767 {
3768 SVGA3dSurfaceFormat const enmFormat = vmsvgaDXDevCapDxfmt2Format(idx3dCaps);
3769 rc = vmsvgaDXCheckFormatSupport(pState, enmFormat, pu32Val);
3770 break;
3771 }
3772
3773 case SVGA3D_DEVCAP_SM41:
3774 *pu32Val = 0; /* boolean */
3775 break;
3776
3777 case SVGA3D_DEVCAP_MULTISAMPLE_2X:
3778 *pu32Val = 0; /* boolean */
3779 break;
3780
3781 case SVGA3D_DEVCAP_MULTISAMPLE_4X:
3782 *pu32Val = 0; /* boolean */
3783 break;
3784
3785 case SVGA3D_DEVCAP_MS_FULL_QUALITY:
3786 *pu32Val = 0; /* boolean */
3787 break;
3788
3789 case SVGA3D_DEVCAP_LOGICOPS:
3790 AssertCompile(SVGA3D_DEVCAP_LOGICOPS == 248);
3791 *pu32Val = 0; /* boolean */
3792 break;
3793
3794 case SVGA3D_DEVCAP_LOGIC_BLENDOPS:
3795 *pu32Val = 0; /* boolean */
3796 break;
3797
3798 case SVGA3D_DEVCAP_RESERVED_1:
3799 break;
3800
3801 case SVGA3D_DEVCAP_RESERVED_2:
3802 break;
3803
3804 case SVGA3D_DEVCAP_SM5:
3805 *pu32Val = 0; /* boolean */
3806 break;
3807
3808 case SVGA3D_DEVCAP_MULTISAMPLE_8X:
3809 *pu32Val = 0; /* boolean */
3810 break;
3811
3812 case SVGA3D_DEVCAP_MAX:
3813 case SVGA3D_DEVCAP_INVALID:
3814 rc = VERR_NOT_SUPPORTED;
3815 break;
3816 }
3817
3818 return rc;
3819}
3820
3821
3822static DECLCALLBACK(int) vmsvga3dBackChangeMode(PVGASTATECC pThisCC)
3823{
3824 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3825 AssertReturn(pState, VERR_INVALID_STATE);
3826
3827 return VINF_SUCCESS;
3828}
3829
3830
3831static DECLCALLBACK(int) vmsvga3dBackSurfaceCopy(PVGASTATECC pThisCC, SVGA3dSurfaceImageId dest, SVGA3dSurfaceImageId src,
3832 uint32_t cCopyBoxes, SVGA3dCopyBox *pBox)
3833{
3834 RT_NOREF(cCopyBoxes, pBox);
3835
3836 LogFunc(("src sid %d -> dst sid %d\n", src.sid, dest.sid));
3837
3838 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3839 AssertReturn(pState, VERR_INVALID_STATE);
3840
3841 PVMSVGA3DBACKEND pBackend = pState->pBackend;
3842
3843 PVMSVGA3DSURFACE pSrcSurface;
3844 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, src.sid, &pSrcSurface);
3845 AssertRCReturn(rc, rc);
3846
3847 PVMSVGA3DSURFACE pDstSurface;
3848 rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, dest.sid, &pDstSurface);
3849 AssertRCReturn(rc, rc);
3850
3851 LogFunc(("src%s cid %d -> dst%s cid %d\n",
3852 pSrcSurface->pBackendSurface ? "" : " sysmem",
3853 pSrcSurface ? pSrcSurface->idAssociatedContext : SVGA_ID_INVALID,
3854 pDstSurface->pBackendSurface ? "" : " sysmem",
3855 pDstSurface ? pDstSurface->idAssociatedContext : SVGA_ID_INVALID));
3856
3857 //DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
3858 //AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
3859
3860 if (pSrcSurface->pBackendSurface)
3861 {
3862 if (pDstSurface->pBackendSurface == NULL)
3863 {
3864 /* Create the target if it can be used as a device context shared resource (render or screen target). */
3865 if (dxIsSurfaceShareable(pDstSurface))
3866 {
3867 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, NULL, pDstSurface);
3868 AssertRCReturn(rc, rc);
3869 }
3870 }
3871
3872 if (pDstSurface->pBackendSurface)
3873 {
3874 /* Surface -> Surface. */
3875 /* Expect both of them to be shared surfaces created by the backend context. */
3876 Assert(pSrcSurface->idAssociatedContext == DX_CID_BACKEND && pDstSurface->idAssociatedContext == DX_CID_BACKEND);
3877
3878 /* Wait for the source surface to finish drawing. */
3879 if (pSrcSurface->pBackendSurface->cidDrawing != SVGA_ID_INVALID)
3880 {
3881 dxContextWait(pSrcSurface->pBackendSurface->cidDrawing, pState);
3882 pSrcSurface->pBackendSurface->cidDrawing = SVGA_ID_INVALID;
3883 }
3884
3885 DXDEVICE *pDXDevice = &pBackend->device;
3886
3887 /* Clip the box. */
3888 PVMSVGA3DMIPMAPLEVEL pSrcMipLevel;
3889 rc = vmsvga3dMipmapLevel(pSrcSurface, src.face, src.mipmap, &pSrcMipLevel);
3890 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
3891
3892 PVMSVGA3DMIPMAPLEVEL pDstMipLevel;
3893 rc = vmsvga3dMipmapLevel(pDstSurface, dest.face, dest.mipmap, &pDstMipLevel);
3894 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
3895
3896 SVGA3dCopyBox clipBox = *pBox;
3897 vmsvgaR3ClipCopyBox(&pSrcMipLevel->mipmapSize, &pDstMipLevel->mipmapSize, &clipBox);
3898
3899 UINT DstSubresource = vmsvga3dCalcSubresource(dest.mipmap, dest.face, pDstSurface->cLevels);
3900 UINT DstX = clipBox.x;
3901 UINT DstY = clipBox.y;
3902 UINT DstZ = clipBox.z;
3903
3904 UINT SrcSubresource = vmsvga3dCalcSubresource(src.mipmap, src.face, pSrcSurface->cLevels);
3905 D3D11_BOX SrcBox;
3906 SrcBox.left = clipBox.srcx;
3907 SrcBox.top = clipBox.srcy;
3908 SrcBox.front = clipBox.srcz;
3909 SrcBox.right = clipBox.srcx + clipBox.w;
3910 SrcBox.bottom = clipBox.srcy + clipBox.h;
3911 SrcBox.back = clipBox.srcz + clipBox.d;
3912
3913 Assert(cCopyBoxes == 1); /** @todo */
3914
3915 ID3D11Resource *pDstResource;
3916 ID3D11Resource *pSrcResource;
3917 pDstResource = dxResource(pState, pDstSurface, NULL);
3918 pSrcResource = dxResource(pState, pSrcSurface, NULL);
3919
3920 pDXDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
3921 pSrcResource, SrcSubresource, &SrcBox);
3922
3923 pDstSurface->pBackendSurface->cidDrawing = DX_CID_BACKEND;
3924 }
3925 else
3926 {
3927 /* Surface -> Memory. */
3928 AssertFailed(); /** @todo implement */
3929 }
3930 }
3931 else
3932 {
3933 /* Memory -> Surface. */
3934 AssertFailed(); /** @todo implement */
3935 }
3936
3937 return rc;
3938}
3939
3940
3941static DECLCALLBACK(void) vmsvga3dBackUpdateHostScreenViewport(PVGASTATECC pThisCC, uint32_t idScreen, VMSVGAVIEWPORT const *pOldViewport)
3942{
3943 RT_NOREF(pThisCC, idScreen, pOldViewport);
3944 /** @todo Scroll the screen content without requiring the guest to redraw. */
3945}
3946
3947
3948static DECLCALLBACK(int) vmsvga3dBackSurfaceUpdateHeapBuffers(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface)
3949{
3950 /** @todo */
3951 RT_NOREF(pThisCC, pSurface);
3952 return VERR_NOT_IMPLEMENTED;
3953}
3954
3955
3956/**
3957 * Create a new 3d context
3958 *
3959 * @returns VBox status code.
3960 * @param pThisCC The VGA/VMSVGA state for ring-3.
3961 * @param cid Context id
3962 */
3963static DECLCALLBACK(int) vmsvga3dBackContextDefine(PVGASTATECC pThisCC, uint32_t cid)
3964{
3965 RT_NOREF(cid);
3966
3967 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3968 AssertReturn(pState, VERR_INVALID_STATE);
3969
3970 AssertFailed();
3971 return VERR_NOT_IMPLEMENTED;
3972}
3973
3974
3975/**
3976 * Destroy an existing 3d context
3977 *
3978 * @returns VBox status code.
3979 * @param pThisCC The VGA/VMSVGA state for ring-3.
3980 * @param cid Context id
3981 */
3982static DECLCALLBACK(int) vmsvga3dBackContextDestroy(PVGASTATECC pThisCC, uint32_t cid)
3983{
3984 RT_NOREF(cid);
3985
3986 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3987 AssertReturn(pState, VERR_INVALID_STATE);
3988
3989 AssertFailed();
3990 return VINF_SUCCESS;
3991}
3992
3993
3994static DECLCALLBACK(int) vmsvga3dBackSetTransform(PVGASTATECC pThisCC, uint32_t cid, SVGA3dTransformType type, float matrix[16])
3995{
3996 RT_NOREF(cid, type, matrix);
3997
3998 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
3999 AssertReturn(pState, VERR_INVALID_STATE);
4000
4001 AssertFailed();
4002 return VINF_SUCCESS;
4003}
4004
4005
4006static DECLCALLBACK(int) vmsvga3dBackSetZRange(PVGASTATECC pThisCC, uint32_t cid, SVGA3dZRange zRange)
4007{
4008 RT_NOREF(cid, zRange);
4009
4010 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4011 AssertReturn(pState, VERR_INVALID_STATE);
4012
4013 AssertFailed();
4014 return VINF_SUCCESS;
4015}
4016
4017
4018static DECLCALLBACK(int) vmsvga3dBackSetRenderState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cRenderStates, SVGA3dRenderState *pRenderState)
4019{
4020 RT_NOREF(cid, cRenderStates, pRenderState);
4021
4022 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4023 AssertReturn(pState, VERR_INVALID_STATE);
4024
4025 AssertFailed();
4026 return VINF_SUCCESS;
4027}
4028
4029
4030static DECLCALLBACK(int) vmsvga3dBackSetRenderTarget(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRenderTargetType type, SVGA3dSurfaceImageId target)
4031{
4032 RT_NOREF(cid, type, target);
4033
4034 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4035 AssertReturn(pState, VERR_INVALID_STATE);
4036
4037 AssertFailed();
4038 return VINF_SUCCESS;
4039}
4040
4041
4042static DECLCALLBACK(int) vmsvga3dBackSetTextureState(PVGASTATECC pThisCC, uint32_t cid, uint32_t cTextureStates, SVGA3dTextureState *pTextureState)
4043{
4044 RT_NOREF(cid, cTextureStates, pTextureState);
4045
4046 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4047 AssertReturn(pState, VERR_INVALID_STATE);
4048
4049 AssertFailed();
4050 return VINF_SUCCESS;
4051}
4052
4053
4054static DECLCALLBACK(int) vmsvga3dBackSetMaterial(PVGASTATECC pThisCC, uint32_t cid, SVGA3dFace face, SVGA3dMaterial *pMaterial)
4055{
4056 RT_NOREF(cid, face, pMaterial);
4057
4058 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4059 AssertReturn(pState, VERR_INVALID_STATE);
4060
4061 AssertFailed();
4062 return VINF_SUCCESS;
4063}
4064
4065
4066static DECLCALLBACK(int) vmsvga3dBackSetLightData(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, SVGA3dLightData *pData)
4067{
4068 RT_NOREF(cid, index, pData);
4069
4070 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4071 AssertReturn(pState, VERR_INVALID_STATE);
4072
4073 AssertFailed();
4074 return VINF_SUCCESS;
4075}
4076
4077
4078static DECLCALLBACK(int) vmsvga3dBackSetLightEnabled(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, uint32_t enabled)
4079{
4080 RT_NOREF(cid, index, enabled);
4081
4082 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4083 AssertReturn(pState, VERR_INVALID_STATE);
4084
4085 AssertFailed();
4086 return VINF_SUCCESS;
4087}
4088
4089
4090static DECLCALLBACK(int) vmsvga3dBackSetViewPort(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
4091{
4092 RT_NOREF(cid, pRect);
4093
4094 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4095 AssertReturn(pState, VERR_INVALID_STATE);
4096
4097 AssertFailed();
4098 return VINF_SUCCESS;
4099}
4100
4101
4102static DECLCALLBACK(int) vmsvga3dBackSetClipPlane(PVGASTATECC pThisCC, uint32_t cid, uint32_t index, float plane[4])
4103{
4104 RT_NOREF(cid, index, plane);
4105
4106 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4107 AssertReturn(pState, VERR_INVALID_STATE);
4108
4109 AssertFailed();
4110 return VINF_SUCCESS;
4111}
4112
4113
4114static DECLCALLBACK(int) vmsvga3dBackCommandClear(PVGASTATECC pThisCC, uint32_t cid, SVGA3dClearFlag clearFlag, uint32_t color, float depth,
4115 uint32_t stencil, uint32_t cRects, SVGA3dRect *pRect)
4116{
4117 /* From SVGA3D_BeginClear comments:
4118 *
4119 * Clear is not affected by clipping, depth test, or other
4120 * render state which affects the fragment pipeline.
4121 *
4122 * Therefore this code must ignore the current scissor rect.
4123 */
4124
4125 RT_NOREF(cid, clearFlag, color, depth, stencil, cRects, pRect);
4126
4127 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4128 AssertReturn(pState, VERR_INVALID_STATE);
4129
4130 AssertFailed();
4131 return VINF_SUCCESS;
4132}
4133
4134
4135static DECLCALLBACK(int) vmsvga3dBackDrawPrimitives(PVGASTATECC pThisCC, uint32_t cid, uint32_t numVertexDecls, SVGA3dVertexDecl *pVertexDecl,
4136 uint32_t numRanges, SVGA3dPrimitiveRange *pRange,
4137 uint32_t cVertexDivisor, SVGA3dVertexDivisor *pVertexDivisor)
4138{
4139 RT_NOREF(cid, numVertexDecls, pVertexDecl, numRanges, pRange, cVertexDivisor, pVertexDivisor);
4140
4141 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4142 AssertReturn(pState, VERR_INVALID_STATE);
4143
4144 AssertFailed();
4145 return VINF_SUCCESS;
4146}
4147
4148
4149static DECLCALLBACK(int) vmsvga3dBackSetScissorRect(PVGASTATECC pThisCC, uint32_t cid, SVGA3dRect *pRect)
4150{
4151 RT_NOREF(cid, pRect);
4152
4153 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4154 AssertReturn(pState, VERR_INVALID_STATE);
4155
4156 AssertFailed();
4157 return VINF_SUCCESS;
4158}
4159
4160
4161static DECLCALLBACK(int) vmsvga3dBackGenerateMipmaps(PVGASTATECC pThisCC, uint32_t sid, SVGA3dTextureFilter filter)
4162{
4163 RT_NOREF(sid, filter);
4164
4165 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4166 AssertReturn(pState, VERR_INVALID_STATE);
4167
4168 AssertFailed();
4169 return VINF_SUCCESS;
4170}
4171
4172
4173static DECLCALLBACK(int) vmsvga3dBackShaderDefine(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type,
4174 uint32_t cbData, uint32_t *pShaderData)
4175{
4176 RT_NOREF(cid, shid, type, cbData, pShaderData);
4177
4178 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4179 AssertReturn(pState, VERR_INVALID_STATE);
4180
4181 AssertFailed();
4182 return VINF_SUCCESS;
4183}
4184
4185
4186static DECLCALLBACK(int) vmsvga3dBackShaderDestroy(PVGASTATECC pThisCC, uint32_t cid, uint32_t shid, SVGA3dShaderType type)
4187{
4188 RT_NOREF(cid, shid, type);
4189
4190 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4191 AssertReturn(pState, VERR_INVALID_STATE);
4192
4193 AssertFailed();
4194 return VINF_SUCCESS;
4195}
4196
4197
4198static DECLCALLBACK(int) vmsvga3dBackShaderSet(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext, uint32_t cid, SVGA3dShaderType type, uint32_t shid)
4199{
4200 RT_NOREF(pContext, cid, type, shid);
4201
4202 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4203 AssertReturn(pState, VERR_INVALID_STATE);
4204
4205 AssertFailed();
4206 return VINF_SUCCESS;
4207}
4208
4209
4210static DECLCALLBACK(int) vmsvga3dBackShaderSetConst(PVGASTATECC pThisCC, uint32_t cid, uint32_t reg, SVGA3dShaderType type,
4211 SVGA3dShaderConstType ctype, uint32_t cRegisters, uint32_t *pValues)
4212{
4213 RT_NOREF(cid, reg, type, ctype, cRegisters, pValues);
4214
4215 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
4216 AssertReturn(pState, VERR_INVALID_STATE);
4217
4218 AssertFailed();
4219 return VINF_SUCCESS;
4220}
4221
4222
4223/**
4224 * Destroy backend specific surface bits (part of SVGA_3D_CMD_SURFACE_DESTROY).
4225 *
4226 * @param pThisCC The device context.
4227 * @param pSurface The surface being destroyed.
4228 */
4229static DECLCALLBACK(void) vmsvga3dBackSurfaceDestroy(PVGASTATECC pThisCC, PVMSVGA3DSURFACE pSurface)
4230{
4231 RT_NOREF(pThisCC);
4232
4233 /* The caller should not use the function for system memory surfaces. */
4234 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
4235 if (!pBackendSurface)
4236 return;
4237 pSurface->pBackendSurface = NULL;
4238
4239 LogFunc(("sid=%u\n", pSurface->id));
4240
4241 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
4242 {
4243 D3D_RELEASE(pBackendSurface->pStagingTexture);
4244 D3D_RELEASE(pBackendSurface->pDynamicTexture);
4245 D3D_RELEASE(pBackendSurface->u.pTexture2D);
4246 }
4247 else if ( pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE
4248 || pBackendSurface->enmResType == VMSVGA3D_RESTYPE_CUBE_TEXTURE)
4249 {
4250 D3D_RELEASE(pBackendSurface->pStagingTexture);
4251 D3D_RELEASE(pBackendSurface->pDynamicTexture);
4252 D3D_RELEASE(pBackendSurface->u.pTexture2D);
4253 }
4254 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE_3D)
4255 {
4256 D3D_RELEASE(pBackendSurface->pStagingTexture3D);
4257 D3D_RELEASE(pBackendSurface->pDynamicTexture3D);
4258 D3D_RELEASE(pBackendSurface->u.pTexture3D);
4259 }
4260 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_BUFFER)
4261 {
4262 D3D_RELEASE(pBackendSurface->u.pBuffer);
4263 }
4264 else
4265 {
4266 AssertFailed();
4267 }
4268
4269 RTMemFree(pBackendSurface);
4270
4271 /* No context has created the surface, because the surface does not exist anymore. */
4272 pSurface->idAssociatedContext = SVGA_ID_INVALID;
4273}
4274
4275
4276/**
4277 * Backend worker for implementing SVGA_3D_CMD_SURFACE_STRETCHBLT.
4278 *
4279 * @returns VBox status code.
4280 * @param pThis The VGA device instance.
4281 * @param pState The VMSVGA3d state.
4282 * @param pDstSurface The destination host surface.
4283 * @param uDstFace The destination face (valid).
4284 * @param uDstMipmap The destination mipmap level (valid).
4285 * @param pDstBox The destination box.
4286 * @param pSrcSurface The source host surface.
4287 * @param uSrcFace The destination face (valid).
4288 * @param uSrcMipmap The source mimap level (valid).
4289 * @param pSrcBox The source box.
4290 * @param enmMode The strecht blt mode .
4291 * @param pContext The VMSVGA3d context (already current for OGL).
4292 */
4293static DECLCALLBACK(int) vmsvga3dBackSurfaceStretchBlt(PVGASTATE pThis, PVMSVGA3DSTATE pState,
4294 PVMSVGA3DSURFACE pDstSurface, uint32_t uDstFace, uint32_t uDstMipmap, SVGA3dBox const *pDstBox,
4295 PVMSVGA3DSURFACE pSrcSurface, uint32_t uSrcFace, uint32_t uSrcMipmap, SVGA3dBox const *pSrcBox,
4296 SVGA3dStretchBltMode enmMode, PVMSVGA3DCONTEXT pContext)
4297{
4298 RT_NOREF(pThis, pState, pDstSurface, uDstFace, uDstMipmap, pDstBox,
4299 pSrcSurface, uSrcFace, uSrcMipmap, pSrcBox, enmMode, pContext);
4300
4301 AssertFailed();
4302 return VINF_SUCCESS;
4303}
4304
4305
4306/**
4307 * Backend worker for implementing SVGA_3D_CMD_SURFACE_DMA that copies one box.
4308 *
4309 * @returns Failure status code or @a rc.
4310 * @param pThis The shared VGA/VMSVGA instance data.
4311 * @param pThisCC The VGA/VMSVGA state for ring-3.
4312 * @param pState The VMSVGA3d state.
4313 * @param pSurface The host surface.
4314 * @param pMipLevel Mipmap level. The caller knows it already.
4315 * @param uHostFace The host face (valid).
4316 * @param uHostMipmap The host mipmap level (valid).
4317 * @param GuestPtr The guest pointer.
4318 * @param cbGuestPitch The guest pitch.
4319 * @param transfer The transfer direction.
4320 * @param pBox The box to copy (clipped, valid, except for guest's srcx, srcy, srcz).
4321 * @param pContext The context (for OpenGL).
4322 * @param rc The current rc for all boxes.
4323 * @param iBox The current box number (for Direct 3D).
4324 */
4325static DECLCALLBACK(int) vmsvga3dBackSurfaceDMACopyBox(PVGASTATE pThis, PVGASTATECC pThisCC, PVMSVGA3DSTATE pState, PVMSVGA3DSURFACE pSurface,
4326 PVMSVGA3DMIPMAPLEVEL pMipLevel, uint32_t uHostFace, uint32_t uHostMipmap,
4327 SVGAGuestPtr GuestPtr, uint32_t cbGuestPitch, SVGA3dTransferType transfer,
4328 SVGA3dCopyBox const *pBox, PVMSVGA3DCONTEXT pContext, int rc, int iBox)
4329{
4330 RT_NOREF(pState, pMipLevel, pContext, iBox);
4331
4332 /* The called should not use the function for system memory surfaces. */
4333 PVMSVGA3DBACKENDSURFACE pBackendSurface = pSurface->pBackendSurface;
4334 AssertReturn(pBackendSurface, VERR_INVALID_PARAMETER);
4335
4336 if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_SCREEN_TARGET)
4337 {
4338 /** @todo This is generic code and should be in DevVGA-SVGA3d.cpp for backends which support Map/Unmap. */
4339 AssertReturn(uHostFace == 0 && uHostMipmap == 0, VERR_INVALID_PARAMETER);
4340 AssertReturn(transfer == SVGA3D_WRITE_HOST_VRAM, VERR_NOT_IMPLEMENTED); /** @todo Implement */
4341
4342 uint32_t const u32GuestBlockX = pBox->srcx / pSurface->cxBlock;
4343 uint32_t const u32GuestBlockY = pBox->srcy / pSurface->cyBlock;
4344 Assert(u32GuestBlockX * pSurface->cxBlock == pBox->srcx);
4345 Assert(u32GuestBlockY * pSurface->cyBlock == pBox->srcy);
4346 uint32_t const cBlocksX = (pBox->w + pSurface->cxBlock - 1) / pSurface->cxBlock;
4347 uint32_t const cBlocksY = (pBox->h + pSurface->cyBlock - 1) / pSurface->cyBlock;
4348 AssertMsgReturn(cBlocksX && cBlocksY, ("Empty box %dx%d\n", pBox->w, pBox->h), VERR_INTERNAL_ERROR);
4349
4350 /* vmsvgaR3GmrTransfer verifies uGuestOffset.
4351 * srcx(u32GuestBlockX) and srcy(u32GuestBlockY) have been verified in vmsvga3dSurfaceDMA
4352 * to not cause 32 bit overflow when multiplied by cbBlock and cbGuestPitch.
4353 */
4354 uint64_t const uGuestOffset = u32GuestBlockX * pSurface->cbBlock + u32GuestBlockY * cbGuestPitch;
4355 AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
4356
4357 SVGA3dSurfaceImageId image;
4358 image.sid = pSurface->id;
4359 image.face = uHostFace;
4360 image.mipmap = uHostMipmap;
4361
4362 SVGA3dBox box;
4363 box.x = pBox->x;
4364 box.y = pBox->y;
4365 box.z = 0;
4366 box.w = pBox->w;
4367 box.h = pBox->h;
4368 box.d = 1;
4369
4370 VMSVGA3D_MAPPED_SURFACE map;
4371 rc = vmsvga3dBackSurfaceMap(pThisCC, &image, &box, VMSVGA3D_SURFACE_MAP_WRITE, &map);
4372 if (RT_SUCCESS(rc))
4373 {
4374 /* Prepare parameters for vmsvgaR3GmrTransfer, which needs the host buffer address, size
4375 * and offset of the first scanline.
4376 */
4377 uint32_t const cbLockedBuf = map.cbRowPitch * cBlocksY;
4378 uint8_t *pu8LockedBuf = (uint8_t *)map.pvData;
4379 uint32_t const offLockedBuf = 0;
4380
4381 rc = vmsvgaR3GmrTransfer(pThis,
4382 pThisCC,
4383 transfer,
4384 pu8LockedBuf,
4385 cbLockedBuf,
4386 offLockedBuf,
4387 map.cbRowPitch,
4388 GuestPtr,
4389 (uint32_t)uGuestOffset,
4390 cbGuestPitch,
4391 cBlocksX * pSurface->cbBlock,
4392 cBlocksY);
4393 AssertRC(rc);
4394
4395 // Log4(("first line:\n%.*Rhxd\n", cBlocksX * pSurface->cbBlock, LockedRect.pBits));
4396
4397 //vmsvga3dMapWriteBmpFile(&map, "Dynamic");
4398
4399 vmsvga3dBackSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ true);
4400 }
4401#if 0
4402 //DEBUG_BREAKPOINT_TEST();
4403 rc = vmsvga3dBackSurfaceMap(pThisCC, &image, NULL, VMSVGA3D_SURFACE_MAP_READ, &map);
4404 if (RT_SUCCESS(rc))
4405 {
4406 vmsvga3dMapWriteBmpFile(&map, "Staging");
4407
4408 vmsvga3dBackSurfaceUnmap(pThisCC, &image, &map, /* fWritten = */ false);
4409 }
4410#endif
4411 }
4412 else if (pBackendSurface->enmResType == VMSVGA3D_RESTYPE_TEXTURE)
4413 {
4414 /** @todo This is generic code and should be in DevVGA-SVGA3d.cpp for backends which support Map/Unmap. */
4415 AssertReturn(uHostFace == 0 && uHostMipmap == 0, VERR_INVALID_PARAMETER);
4416
4417 uint32_t const u32GuestBlockX = pBox->srcx / pSurface->cxBlock;
4418 uint32_t const u32GuestBlockY = pBox->srcy / pSurface->cyBlock;
4419 Assert(u32GuestBlockX * pSurface->cxBlock == pBox->srcx);
4420 Assert(u32GuestBlockY * pSurface->cyBlock == pBox->srcy);
4421 uint32_t const cBlocksX = (pBox->w + pSurface->cxBlock - 1) / pSurface->cxBlock;
4422 uint32_t const cBlocksY = (pBox->h + pSurface->cyBlock - 1) / pSurface->cyBlock;
4423 AssertMsgReturn(cBlocksX && cBlocksY, ("Empty box %dx%d\n", pBox->w, pBox->h), VERR_INTERNAL_ERROR);
4424
4425 /* vmsvgaR3GmrTransfer verifies uGuestOffset.
4426 * srcx(u32GuestBlockX) and srcy(u32GuestBlockY) have been verified in vmsvga3dSurfaceDMA
4427 * to not cause 32 bit overflow when multiplied by cbBlock and cbGuestPitch.
4428 */
4429 uint64_t const uGuestOffset = u32GuestBlockX * pSurface->cbBlock + u32GuestBlockY * cbGuestPitch;
4430 AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
4431
4432 SVGA3dSurfaceImageId image;
4433 image.sid = pSurface->id;
4434 image.face = uHostFace;
4435 image.mipmap = uHostMipmap;
4436
4437 SVGA3dBox box;
4438 box.x = pBox->x;
4439 box.y = pBox->y;
4440 box.z = 0;
4441 box.w = pBox->w;
4442 box.h = pBox->h;
4443 box.d = 1;
4444
4445 VMSVGA3D_SURFACE_MAP const enmMap = transfer == SVGA3D_WRITE_HOST_VRAM
4446 ? VMSVGA3D_SURFACE_MAP_WRITE
4447 : VMSVGA3D_SURFACE_MAP_READ;
4448
4449 VMSVGA3D_MAPPED_SURFACE map;
4450 rc = vmsvga3dBackSurfaceMap(pThisCC, &image, &box, enmMap, &map);
4451 if (RT_SUCCESS(rc))
4452 {
4453#if 0
4454 if (box.w == 250 && box.h == 250 && box.d == 1 && enmMap == VMSVGA3D_SURFACE_MAP_READ)
4455 {
4456 DEBUG_BREAKPOINT_TEST();
4457 vmsvga3dMapWriteBmpFile(&map, "P");
4458 }
4459#endif
4460 /* Prepare parameters for vmsvgaR3GmrTransfer, which needs the host buffer address, size
4461 * and offset of the first scanline.
4462 */
4463 uint32_t const cbLockedBuf = map.cbRowPitch * cBlocksY;
4464 uint8_t *pu8LockedBuf = (uint8_t *)map.pvData;
4465 uint32_t const offLockedBuf = 0;
4466
4467 rc = vmsvgaR3GmrTransfer(pThis,
4468 pThisCC,
4469 transfer,
4470 pu8LockedBuf,
4471 cbLockedBuf,
4472 offLockedBuf,
4473 map.cbRowPitch,
4474 GuestPtr,
4475 (uint32_t)uGuestOffset,
4476 cbGuestPitch,
4477 cBlocksX * pSurface->cbBlock,
4478 cBlocksY);
4479 AssertRC(rc);
4480
4481 bool const fWritten = (transfer == SVGA3D_WRITE_HOST_VRAM);
4482 vmsvga3dBackSurfaceUnmap(pThisCC, &image, &map, fWritten);
4483 }
4484 }
4485 else
4486 {
4487 AssertMsgFailed(("Unsupported surface type %d\n", pBackendSurface->enmResType));
4488 rc = VERR_NOT_IMPLEMENTED;
4489 }
4490
4491 return rc;
4492}
4493
4494
4495/**
4496 * Create D3D/OpenGL texture object for the specified surface.
4497 *
4498 * Surfaces are created when needed.
4499 *
4500 * @param pThisCC The device context.
4501 * @param pContext The context.
4502 * @param idAssociatedContext Probably the same as pContext->id.
4503 * @param pSurface The surface to create the texture for.
4504 */
4505static DECLCALLBACK(int) vmsvga3dBackCreateTexture(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext, uint32_t idAssociatedContext,
4506 PVMSVGA3DSURFACE pSurface)
4507
4508{
4509 RT_NOREF(pThisCC, pContext, idAssociatedContext, pSurface);
4510
4511 AssertFailed();
4512 return VINF_SUCCESS;
4513}
4514
4515
4516static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryCreate(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
4517{
4518 RT_NOREF(pThisCC, pContext);
4519 AssertFailed();
4520 return VINF_SUCCESS;
4521}
4522
4523
4524static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryBegin(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
4525{
4526 RT_NOREF(pThisCC, pContext);
4527 AssertFailed();
4528 return VINF_SUCCESS;
4529}
4530
4531
4532static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryEnd(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
4533{
4534 RT_NOREF(pThisCC, pContext);
4535 AssertFailed();
4536 return VINF_SUCCESS;
4537}
4538
4539
4540static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryGetData(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext, uint32_t *pu32Pixels)
4541{
4542 RT_NOREF(pThisCC, pContext);
4543 *pu32Pixels = 0;
4544 AssertFailed();
4545 return VINF_SUCCESS;
4546}
4547
4548
4549static DECLCALLBACK(int) vmsvga3dBackOcclusionQueryDelete(PVGASTATECC pThisCC, PVMSVGA3DCONTEXT pContext)
4550{
4551 RT_NOREF(pThisCC, pContext);
4552 AssertFailed();
4553 return VINF_SUCCESS;
4554}
4555
4556
4557/*
4558 * DX callbacks.
4559 */
4560
4561static DECLCALLBACK(int) vmsvga3dBackDXDefineContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4562{
4563 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4564
4565 /* Allocate a backend specific context structure. */
4566 PVMSVGA3DBACKENDDXCONTEXT pBackendDXContext = (PVMSVGA3DBACKENDDXCONTEXT)RTMemAllocZ(sizeof(VMSVGA3DBACKENDDXCONTEXT));
4567 AssertPtrReturn(pBackendDXContext, VERR_NO_MEMORY);
4568 pDXContext->pBackendDXContext = pBackendDXContext;
4569
4570 LogFunc(("cid %d\n", pDXContext->cid));
4571
4572 int rc = dxDeviceCreate(pBackend, &pBackendDXContext->device);
4573 return rc;
4574}
4575
4576
4577static DECLCALLBACK(int) vmsvga3dBackDXDestroyContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4578{
4579 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4580
4581 LogFunc(("cid %d\n", pDXContext->cid));
4582
4583 if (pDXContext->pBackendDXContext)
4584 {
4585 /* Clean up context resources. */
4586 VMSVGA3DBACKENDDXCONTEXT *pBackendDXContext = pDXContext->pBackendDXContext;
4587
4588 if (pBackendDXContext->papRenderTargetView)
4589 DX_RELEASE_ARRAY(pBackendDXContext->cRenderTargetView, pBackendDXContext->papRenderTargetView);
4590 if (pBackendDXContext->papDepthStencilView)
4591 DX_RELEASE_ARRAY(pBackendDXContext->cDepthStencilView, pBackendDXContext->papDepthStencilView);
4592 if (pBackendDXContext->papShaderResourceView)
4593 DX_RELEASE_ARRAY(pBackendDXContext->cShaderResourceView, pBackendDXContext->papShaderResourceView);
4594 if (pBackendDXContext->paElementLayout)
4595 {
4596 for (uint32_t i = 0; i < pBackendDXContext->cElementLayout; ++i)
4597 D3D_RELEASE(pBackendDXContext->paElementLayout[i].pElementLayout);
4598 }
4599 if (pBackendDXContext->papBlendState)
4600 DX_RELEASE_ARRAY(pBackendDXContext->cBlendState, pBackendDXContext->papBlendState);
4601 if (pBackendDXContext->papDepthStencilState)
4602 DX_RELEASE_ARRAY(pBackendDXContext->cDepthStencilState, pBackendDXContext->papDepthStencilState);
4603 if (pBackendDXContext->papRasterizerState)
4604 DX_RELEASE_ARRAY(pBackendDXContext->cRasterizerState, pBackendDXContext->papRasterizerState);
4605 if (pBackendDXContext->papSamplerState)
4606 DX_RELEASE_ARRAY(pBackendDXContext->cSamplerState, pBackendDXContext->papSamplerState);
4607 if (pBackendDXContext->papQuery)
4608 DX_RELEASE_ARRAY(pBackendDXContext->cQuery, pBackendDXContext->papQuery);
4609 if (pBackendDXContext->paShader)
4610 {
4611 for (uint32_t i = 0; i < pBackendDXContext->cShader; ++i)
4612 D3D_RELEASE(pBackendDXContext->paShader[i].pShader); /// @todo dxDestroyShader
4613 }
4614 if (pBackendDXContext->paStreamOutput)
4615 {
4616 for (uint32_t i = 0; i < pBackendDXContext->cStreamOutput; ++i)
4617 dxDestroyStreamOutput(&pBackendDXContext->paStreamOutput[i]);
4618 }
4619
4620 RTMemFreeZ(pBackendDXContext->papBlendState, sizeof(pBackendDXContext->papBlendState[0]) * pBackendDXContext->cBlendState);
4621 RTMemFreeZ(pBackendDXContext->papDepthStencilState, sizeof(pBackendDXContext->papDepthStencilState[0]) * pBackendDXContext->cDepthStencilState);
4622 RTMemFreeZ(pBackendDXContext->papSamplerState, sizeof(pBackendDXContext->papSamplerState[0]) * pBackendDXContext->cSamplerState);
4623 RTMemFreeZ(pBackendDXContext->papRasterizerState, sizeof(pBackendDXContext->papRasterizerState[0]) * pBackendDXContext->cRasterizerState);
4624 RTMemFreeZ(pBackendDXContext->paElementLayout, sizeof(pBackendDXContext->paElementLayout[0]) * pBackendDXContext->cElementLayout);
4625 RTMemFreeZ(pBackendDXContext->papRenderTargetView, sizeof(pBackendDXContext->papRenderTargetView[0]) * pBackendDXContext->cRenderTargetView);
4626 RTMemFreeZ(pBackendDXContext->papDepthStencilView, sizeof(pBackendDXContext->papDepthStencilView[0]) * pBackendDXContext->cDepthStencilView);
4627 RTMemFreeZ(pBackendDXContext->papShaderResourceView, sizeof(pBackendDXContext->papShaderResourceView[0]) * pBackendDXContext->cShaderResourceView);
4628 RTMemFreeZ(pBackendDXContext->papQuery, sizeof(pBackendDXContext->papQuery[0]) * pBackendDXContext->cQuery);
4629 RTMemFreeZ(pBackendDXContext->paShader, sizeof(pBackendDXContext->paShader[0]) * pBackendDXContext->cShader);
4630 RTMemFreeZ(pBackendDXContext->paStreamOutput, sizeof(pBackendDXContext->paStreamOutput[0]) * pBackendDXContext->cStreamOutput);
4631
4632 /* Destroy backend surfaces which belong to this context. */
4633 /** @todo The context should have a list of surfaces (and also shared resources). */
4634 for (uint32_t sid = 0; sid < pThisCC->svga.p3dState->cSurfaces; ++sid)
4635 {
4636 PVMSVGA3DSURFACE const pSurface = pThisCC->svga.p3dState->papSurfaces[sid];
4637 if ( pSurface
4638 && pSurface->id == sid)
4639 {
4640 if (pSurface->idAssociatedContext == pDXContext->cid)
4641 {
4642 Assert(pSurface->pBackendSurface);
4643 vmsvga3dBackSurfaceDestroy(pThisCC, pSurface);
4644 }
4645 else if (pSurface->idAssociatedContext == DX_CID_BACKEND)
4646 {
4647 /* May have shared resources in this context. */
4648 Assert(pSurface->pBackendSurface);
4649 DXSHAREDTEXTURE *pSharedTexture = (DXSHAREDTEXTURE *)RTAvlU32Get(&pSurface->pBackendSurface->SharedTextureTree, pDXContext->cid);
4650 if (pSharedTexture)
4651 {
4652 Assert(pSharedTexture->sid == sid);
4653 RTAvlU32Remove(&pSurface->pBackendSurface->SharedTextureTree, pDXContext->cid);
4654 D3D_RELEASE(pSharedTexture->pTexture);
4655 RTMemFreeZ(pSharedTexture, sizeof(*pSharedTexture));
4656 }
4657 }
4658 }
4659 }
4660
4661 dxDeviceDestroy(pBackend, &pBackendDXContext->device);
4662
4663 RTMemFreeZ(pBackendDXContext, sizeof(*pBackendDXContext));
4664 pDXContext->pBackendDXContext = NULL;
4665 }
4666 return VINF_SUCCESS;
4667}
4668
4669
4670static DECLCALLBACK(int) vmsvga3dBackDXBindContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4671{
4672 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4673 RT_NOREF(pBackend, pDXContext);
4674 return VINF_SUCCESS;
4675}
4676
4677
4678static DECLCALLBACK(int) vmsvga3dBackDXReadbackContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4679{
4680 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4681 RT_NOREF(pBackend, pDXContext);
4682 return VINF_SUCCESS;
4683}
4684
4685
4686static DECLCALLBACK(int) vmsvga3dBackDXInvalidateContext(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
4687{
4688 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4689
4690 RT_NOREF(pBackend, pDXContext);
4691 AssertFailed(); /** @todo Implement */
4692 return VERR_NOT_IMPLEMENTED;
4693}
4694
4695
4696static DECLCALLBACK(int) vmsvga3dBackDXSetSingleConstantBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t slot, SVGA3dShaderType type, SVGA3dSurfaceId sid, uint32_t offsetInBytes, uint32_t sizeInBytes)
4697{
4698 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4699 RT_NOREF(pBackend);
4700
4701 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4702 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4703
4704 if (sid == SVGA_ID_INVALID)
4705 {
4706 dxConstantBufferSet(pDevice, slot, type, NULL);
4707 return VINF_SUCCESS;
4708 }
4709
4710 PVMSVGA3DSURFACE pSurface;
4711 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
4712 AssertRCReturn(rc, rc);
4713
4714 PVMSVGA3DMIPMAPLEVEL pMipLevel;
4715 rc = vmsvga3dMipmapLevel(pSurface, 0, 0, &pMipLevel);
4716 AssertRCReturn(rc, rc);
4717
4718 uint32_t const cbSurface = pMipLevel->cbSurface;
4719 ASSERT_GUEST_RETURN( offsetInBytes < cbSurface
4720 && sizeInBytes <= cbSurface - offsetInBytes, VERR_INVALID_PARAMETER);
4721
4722 /* Constant buffers are created on demand. */
4723 Assert(pSurface->pBackendSurface == NULL);
4724
4725 /* Upload the current data, if any. */
4726 D3D11_SUBRESOURCE_DATA *pInitialData = NULL;
4727 D3D11_SUBRESOURCE_DATA initialData;
4728 if (pMipLevel->pSurfaceData)
4729 {
4730 initialData.pSysMem = (uint8_t *)pMipLevel->pSurfaceData + offsetInBytes;
4731 initialData.SysMemPitch = sizeInBytes;
4732 initialData.SysMemSlicePitch = sizeInBytes;
4733
4734 pInitialData = &initialData;
4735 }
4736
4737 D3D11_BUFFER_DESC bd;
4738 RT_ZERO(bd);
4739 bd.ByteWidth = sizeInBytes;
4740 bd.Usage = D3D11_USAGE_DEFAULT;
4741 bd.BindFlags = D3D11_BIND_CONSTANT_BUFFER;
4742 bd.CPUAccessFlags = 0;
4743 bd.MiscFlags = 0;
4744 bd.StructureByteStride = 0;
4745
4746 ID3D11Buffer *pBuffer = 0;
4747 HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, pInitialData, &pBuffer);
4748 if (SUCCEEDED(hr))
4749 {
4750 dxConstantBufferSet(pDevice, slot, type, pBuffer);
4751 D3D_RELEASE(pBuffer);
4752 }
4753
4754 return VINF_SUCCESS;
4755}
4756
4757
4758static DECLCALLBACK(int) vmsvga3dBackDXSetShaderResources(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startView, SVGA3dShaderType type, uint32_t cShaderResourceViewId, SVGA3dShaderResourceViewId const *paShaderResourceViewId)
4759{
4760 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4761 RT_NOREF(pBackend);
4762
4763 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4764 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4765
4766 uint32_t const idxShaderState = type - SVGA3D_SHADERTYPE_MIN;
4767 ID3D11ShaderResourceView *papShaderResourceView[SVGA3D_DX_MAX_SRVIEWS];
4768 for (uint32_t i = 0; i < cShaderResourceViewId; ++i)
4769 {
4770 SVGA3dShaderResourceViewId shaderResourceViewId = paShaderResourceViewId[i];
4771 if (shaderResourceViewId != SVGA3D_INVALID_ID)
4772 {
4773 ASSERT_GUEST_RETURN(shaderResourceViewId < pDXContext->pBackendDXContext->cShaderResourceView, VERR_INVALID_PARAMETER);
4774 papShaderResourceView[i] = pDXContext->pBackendDXContext->papShaderResourceView[shaderResourceViewId];
4775 }
4776 else
4777 papShaderResourceView[i] = NULL;
4778
4779 pDXContext->svgaDXContext.shaderState[idxShaderState].shaderResources[startView + i] = shaderResourceViewId;
4780 }
4781
4782 dxShaderResourceViewSet(pDevice, type, startView, cShaderResourceViewId, papShaderResourceView);
4783 return VINF_SUCCESS;
4784}
4785
4786
4787static DECLCALLBACK(int) vmsvga3dBackDXSetShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderType type, PVMSVGA3DSHADER pShader)
4788{
4789 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4790 RT_NOREF(pBackend);
4791
4792 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4793 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4794
4795 DXSHADER *pDXShader;
4796 if (pShader)
4797 {
4798 pDXShader = &pDXContext->pBackendDXContext->paShader[pShader->id];
4799 Assert(pDXShader->pShader);
4800 Assert(pDXShader->enmShaderType >= SVGA3D_SHADERTYPE_MIN && pDXShader->enmShaderType < SVGA3D_SHADERTYPE_MAX);
4801 uint32_t const idxShaderState = pDXShader->enmShaderType - SVGA3D_SHADERTYPE_MIN;
4802 pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId = pShader->id;
4803 }
4804 else
4805 pDXShader = NULL;
4806
4807 dxShaderSet(pDXContext, type, pDXShader);
4808 return VINF_SUCCESS;
4809}
4810
4811
4812static DECLCALLBACK(int) vmsvga3dBackDXSetSamplers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startSampler, SVGA3dShaderType type, uint32_t cSamplerId, SVGA3dSamplerId const *paSamplerId)
4813{
4814 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4815 RT_NOREF(pBackend);
4816
4817 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4818 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4819
4820 uint32_t const idxShaderState = type - SVGA3D_SHADERTYPE_MIN;
4821 ID3D11SamplerState *papSamplerState[SVGA3D_DX_MAX_SAMPLERS];
4822 for (uint32_t i = 0; i < cSamplerId; ++i)
4823 {
4824 SVGA3dSamplerId samplerId = paSamplerId[i];
4825 if (samplerId != SVGA3D_INVALID_ID)
4826 {
4827 ASSERT_GUEST_RETURN(samplerId < pDXContext->pBackendDXContext->cSamplerState, VERR_INVALID_PARAMETER);
4828 papSamplerState[i] = pDXContext->pBackendDXContext->papSamplerState[samplerId];
4829 }
4830 else
4831 papSamplerState[i] = NULL;
4832
4833 pDXContext->svgaDXContext.shaderState[idxShaderState].samplers[startSampler + i] = samplerId;
4834 }
4835
4836 dxSamplerSet(pDevice, type, startSampler, cSamplerId, papSamplerState);
4837 return VINF_SUCCESS;
4838}
4839
4840
4841#ifdef DX_DEFERRED_SET_RENDER_TARGETS
4842static void dxSetupPipeline(PVMSVGA3DDXCONTEXT pDXContext)
4843{
4844 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4845 AssertReturnVoid(pDevice->pDevice);
4846
4847 pDevice->pImmediateContext->OMSetRenderTargets(pDXContext->pBackendDXContext->state.cRenderTargetViews,
4848 pDXContext->pBackendDXContext->state.papRenderTargetViews,
4849 pDXContext->pBackendDXContext->state.pDepthStencilView);
4850}
4851#endif
4852
4853
4854static DECLCALLBACK(int) vmsvga3dBackDXDraw(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t vertexCount, uint32_t startVertexLocation)
4855{
4856 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4857 RT_NOREF(pBackend);
4858
4859 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4860 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4861
4862#ifdef DX_DEFERRED_SET_RENDER_TARGETS
4863 dxSetupPipeline(pDXContext);
4864#endif
4865
4866 if (pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN)
4867 pDevice->pImmediateContext->Draw(vertexCount, startVertexLocation);
4868 else
4869 {
4870 /*
4871 * Emulate SVGA3D_PRIMITIVE_TRIANGLEFAN using an indexed draw of a triangle list.
4872 */
4873
4874 /* Make sure that 16 bit indices are enough. 20000 ~= 65536 / 3 */
4875 AssertReturn(vertexCount <= 20000, VERR_NOT_SUPPORTED);
4876
4877 /* Generate indices. */
4878 UINT const IndexCount = 3 * (vertexCount - 2); /* 3_per_triangle * num_triangles */
4879 UINT const cbAlloc = IndexCount * sizeof(USHORT);
4880 USHORT *paIndices = (USHORT *)RTMemAlloc(cbAlloc);
4881 AssertReturn(paIndices, VERR_NO_MEMORY);
4882 USHORT iVertex = 1;
4883 for (UINT i = 0; i < IndexCount; i+= 3)
4884 {
4885 paIndices[i] = 0;
4886 paIndices[i + 1] = iVertex;
4887 ++iVertex;
4888 paIndices[i + 2] = iVertex;
4889 }
4890
4891 D3D11_SUBRESOURCE_DATA InitData;
4892 InitData.pSysMem = paIndices;
4893 InitData.SysMemPitch = cbAlloc;
4894 InitData.SysMemSlicePitch = cbAlloc;
4895
4896 D3D11_BUFFER_DESC bd;
4897 RT_ZERO(bd);
4898 bd.ByteWidth = cbAlloc;
4899 bd.Usage = D3D11_USAGE_IMMUTABLE;
4900 bd.BindFlags = D3D11_BIND_INDEX_BUFFER;
4901 //bd.CPUAccessFlags = 0;
4902 //bd.MiscFlags = 0;
4903 //bd.StructureByteStride = 0;
4904
4905 ID3D11Buffer *pIndexBuffer = 0;
4906 HRESULT hr = pDevice->pDevice->CreateBuffer(&bd, &InitData, &pIndexBuffer);
4907 Assert(SUCCEEDED(hr));RT_NOREF(hr);
4908
4909 /* Save the current index buffer. */
4910 ID3D11Buffer *pSavedIndexBuffer = 0;
4911 DXGI_FORMAT SavedFormat = DXGI_FORMAT_UNKNOWN;
4912 UINT SavedOffset = 0;
4913 pDevice->pImmediateContext->IAGetIndexBuffer(&pSavedIndexBuffer, &SavedFormat, &SavedOffset);
4914
4915 /* Set up the device state. */
4916 pDevice->pImmediateContext->IASetIndexBuffer(pIndexBuffer, DXGI_FORMAT_R16_UINT, 0);
4917 pDevice->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST);
4918
4919 UINT const StartIndexLocation = 0;
4920 INT const BaseVertexLocation = startVertexLocation;
4921 pDevice->pImmediateContext->DrawIndexed(IndexCount, StartIndexLocation, BaseVertexLocation);
4922
4923 /* Restore the device state. */
4924 pDevice->pImmediateContext->IASetPrimitiveTopology(D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP);
4925 pDevice->pImmediateContext->IASetIndexBuffer(pSavedIndexBuffer, SavedFormat, SavedOffset);
4926 D3D_RELEASE(pSavedIndexBuffer);
4927
4928 /* Cleanup. */
4929 D3D_RELEASE(pIndexBuffer);
4930 RTMemFree(paIndices);
4931 }
4932
4933 /* Note which surfaces are being drawn. */
4934 dxTrackRenderTargets(pThisCC, pDXContext);
4935
4936 return VINF_SUCCESS;
4937}
4938
4939
4940static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexed(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t indexCount, uint32_t startIndexLocation, int32_t baseVertexLocation)
4941{
4942 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4943 RT_NOREF(pBackend);
4944
4945 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4946 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4947
4948#ifdef DX_DEFERRED_SET_RENDER_TARGETS
4949 dxSetupPipeline(pDXContext);
4950#endif
4951
4952 Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
4953
4954 pDevice->pImmediateContext->DrawIndexed(indexCount, startIndexLocation, baseVertexLocation);
4955
4956 /* Note which surfaces are being drawn. */
4957 dxTrackRenderTargets(pThisCC, pDXContext);
4958
4959 return VINF_SUCCESS;
4960}
4961
4962
4963static DECLCALLBACK(int) vmsvga3dBackDXDrawInstanced(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
4964 uint32_t vertexCountPerInstance, uint32_t instanceCount, uint32_t startVertexLocation, uint32_t startInstanceLocation)
4965{
4966 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4967 RT_NOREF(pBackend);
4968
4969 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4970 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4971
4972#ifdef DX_DEFERRED_SET_RENDER_TARGETS
4973 dxSetupPipeline(pDXContext);
4974#endif
4975
4976 Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
4977
4978 pDevice->pImmediateContext->DrawInstanced(vertexCountPerInstance, instanceCount, startVertexLocation, startInstanceLocation);
4979
4980 /* Note which surfaces are being drawn. */
4981 dxTrackRenderTargets(pThisCC, pDXContext);
4982
4983 return VINF_SUCCESS;
4984}
4985
4986
4987static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexedInstanced(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
4988 uint32_t indexCountPerInstance, uint32_t instanceCount, uint32_t startIndexLocation, int32_t baseVertexLocation, uint32_t startInstanceLocation)
4989{
4990 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
4991 RT_NOREF(pBackend);
4992
4993 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
4994 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
4995
4996#ifdef DX_DEFERRED_SET_RENDER_TARGETS
4997 dxSetupPipeline(pDXContext);
4998#endif
4999
5000 Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
5001
5002 pDevice->pImmediateContext->DrawIndexedInstanced(indexCountPerInstance, instanceCount, startIndexLocation, baseVertexLocation, startInstanceLocation);
5003
5004 /* Note which surfaces are being drawn. */
5005 dxTrackRenderTargets(pThisCC, pDXContext);
5006
5007 return VINF_SUCCESS;
5008}
5009
5010
5011static DECLCALLBACK(int) vmsvga3dBackDXDrawAuto(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5012{
5013 Assert(pDXContext->svgaDXContext.inputAssembly.topology != SVGA3D_PRIMITIVE_TRIANGLEFAN);
5014 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5015
5016#ifdef DX_DEFERRED_SET_RENDER_TARGETS
5017 dxSetupPipeline(pDXContext);
5018#endif
5019
5020 RT_NOREF(pBackend, pDXContext);
5021 AssertFailed(); /** @todo Implement */
5022 return VERR_NOT_IMPLEMENTED;
5023}
5024
5025
5026static DECLCALLBACK(int) vmsvga3dBackDXSetInputLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId)
5027{
5028 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5029 RT_NOREF(pBackend);
5030
5031 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
5032 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5033
5034 pDXContext->svgaDXContext.inputAssembly.layoutId = elementLayoutId;
5035
5036 DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
5037 if (!pDXElementLayout->pElementLayout)
5038 {
5039 uint32_t const idxShaderState = SVGA3D_SHADERTYPE_VS - SVGA3D_SHADERTYPE_MIN;
5040 uint32_t const shid = pDXContext->svgaDXContext.shaderState[idxShaderState].shaderId;
5041 AssertReturnStmt(shid < pDXContext->pBackendDXContext->cShader,
5042 LogRelMax(16, ("VMSVGA: DX shader is not set in DXSetInputLayout: shid = 0x%x\n", shid)),
5043 VERR_INVALID_STATE);
5044 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[shid];
5045 AssertReturnStmt(pDXShader->pvDXBC,
5046 LogRelMax(16, ("VMSVGA: DX shader bytecode is not available in DXSetInputLayout: shid = %u\n", shid)),
5047 VERR_INVALID_STATE);
5048 HRESULT hr = pDevice->pDevice->CreateInputLayout(pDXElementLayout->aElementDesc,
5049 pDXElementLayout->cElementDesc,
5050 pDXShader->pvDXBC,
5051 pDXShader->cbDXBC,
5052 &pDXElementLayout->pElementLayout);
5053 AssertReturn(SUCCEEDED(hr), VERR_NO_MEMORY);
5054 }
5055
5056 pDevice->pImmediateContext->IASetInputLayout(pDXElementLayout->pElementLayout);
5057 return VINF_SUCCESS;
5058}
5059
5060
5061static DECLCALLBACK(int) vmsvga3dBackDXSetVertexBuffers(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t startBuffer, uint32_t cVertexBuffer, SVGA3dVertexBuffer const *paVertexBuffer)
5062{
5063 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5064 RT_NOREF(pBackend);
5065
5066 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
5067 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5068
5069 /* For each paVertexBuffer[i]:
5070 * If the vertex buffer object does not exist then create it.
5071 * If the surface has been updated by the guest then update the buffer object.
5072 * Use IASetVertexBuffers to set the buffers.
5073 */
5074
5075 ID3D11Buffer *paResources[SVGA3D_DX_MAX_VERTEXBUFFERS];
5076 UINT paStride[SVGA3D_DX_MAX_VERTEXBUFFERS];
5077 UINT paOffset[SVGA3D_DX_MAX_VERTEXBUFFERS];
5078
5079 for (uint32_t i = 0; i < cVertexBuffer; ++i)
5080 {
5081 uint32_t const idxVertexBuffer = startBuffer + i;
5082
5083 /* Get corresponding resource. Create the buffer if does not yet exist. */
5084 if (paVertexBuffer[i].sid != SVGA_ID_INVALID)
5085 {
5086 PVMSVGA3DSURFACE pSurface;
5087 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, paVertexBuffer[i].sid, &pSurface);
5088 AssertRCReturn(rc, rc);
5089
5090 if (pSurface->pBackendSurface == NULL)
5091 {
5092 /* Create the resource and initialize it with the current surface data. */
5093 rc = vmsvga3dBackSurfaceCreateBuffer(pThisCC, pDXContext, pSurface);
5094 AssertRCReturn(rc, rc);
5095 }
5096#if 0
5097 if (pSurface->fDirty)
5098 {
5099 /* Get mobid for the surface and read from the MOB. */
5100 SVGA3dSurfaceImageId imageId;
5101 imageId.sid = paVertexBuffer[i].sid;
5102 imageId.face = 0;
5103 imageId.mipmap = 0;
5104
5105 SVGA3dBox box;
5106 box.x = 0;
5107 box.y = 0;
5108 box.z = 0;
5109 box.w = pSurface->paMipmapLevels[0].mipmapSize.width;
5110 box.h = 1;
5111 box.d = 1;
5112
5113 rc = vmsvgaR3UpdateGBSurface(pThisCC, &imageId, &box);
5114 AssertRCReturn(rc, rc);
5115 }
5116#endif
5117
5118 Assert(pSurface->pBackendSurface->u.pBuffer);
5119 paResources[idxVertexBuffer] = pSurface->pBackendSurface->u.pBuffer;
5120 paStride[idxVertexBuffer] = paVertexBuffer[i].stride;
5121 paOffset[idxVertexBuffer] = paVertexBuffer[i].offset;
5122 }
5123 else
5124 {
5125 paResources[idxVertexBuffer] = NULL;
5126 paStride[idxVertexBuffer] = 0;
5127 paOffset[idxVertexBuffer] = 0;
5128 }
5129
5130 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].bufferId = paVertexBuffer[i].sid;
5131 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].stride = paVertexBuffer[i].stride;
5132 pDXContext->svgaDXContext.inputAssembly.vertexBuffers[idxVertexBuffer].offset = paVertexBuffer[i].offset;
5133 }
5134
5135 pDevice->pImmediateContext->IASetVertexBuffers(startBuffer, cVertexBuffer,
5136 &paResources[startBuffer], &paStride[startBuffer], &paOffset[startBuffer]);
5137
5138 return VINF_SUCCESS;
5139}
5140
5141
5142static DECLCALLBACK(int) vmsvga3dBackDXSetIndexBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId sid, SVGA3dSurfaceFormat format, uint32_t offset)
5143{
5144 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5145 RT_NOREF(pBackend);
5146
5147 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
5148 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5149
5150 /* Get corresponding resource. Create the buffer if does not yet exist. */
5151 ID3D11Buffer *pResource;
5152 DXGI_FORMAT enmDxgiFormat;
5153
5154 if (sid != SVGA_ID_INVALID)
5155 {
5156 PVMSVGA3DSURFACE pSurface;
5157 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, sid, &pSurface);
5158 AssertRCReturn(rc, rc);
5159
5160 if (pSurface->pBackendSurface == NULL)
5161 {
5162 /* Create the resource and initialize it with the current surface data. */
5163 rc = vmsvga3dBackSurfaceCreateBuffer(pThisCC, pDXContext, pSurface);
5164 AssertRCReturn(rc, rc);
5165 }
5166#if 0
5167 if (pSurface->fDirty)
5168 {
5169 /* Get mobid for the surface and read from the MOB. */
5170 SVGA3dSurfaceImageId imageId;
5171 imageId.sid = sid;
5172 imageId.face = 0;
5173 imageId.mipmap = 0;
5174
5175 SVGA3dBox box;
5176 box.x = 0;
5177 box.y = 0;
5178 box.z = 0;
5179 box.w = pSurface->paMipmapLevels[0].mipmapSize.width;
5180 box.h = 1;
5181 box.d = 1;
5182
5183 rc = vmsvgaR3UpdateGBSurface(pThisCC, &imageId, &box);
5184 AssertRCReturn(rc, rc);
5185 }
5186#endif
5187 pResource = pSurface->pBackendSurface->u.pBuffer;
5188 enmDxgiFormat = vmsvgaDXSurfaceFormat2Dxgi(format);
5189 AssertReturn(enmDxgiFormat == DXGI_FORMAT_R16_UINT || enmDxgiFormat == DXGI_FORMAT_R32_UINT, VERR_INVALID_PARAMETER);
5190 }
5191 else
5192 {
5193 pResource = NULL;
5194 enmDxgiFormat = DXGI_FORMAT_UNKNOWN;
5195 }
5196
5197 pDevice->pImmediateContext->IASetIndexBuffer(pResource, enmDxgiFormat, offset);
5198 return VINF_SUCCESS;
5199}
5200
5201static D3D11_PRIMITIVE_TOPOLOGY dxTopology(SVGA3dPrimitiveType primitiveType)
5202{
5203 static D3D11_PRIMITIVE_TOPOLOGY const aD3D11PrimitiveTopology[SVGA3D_PRIMITIVE_MAX] =
5204 {
5205 D3D11_PRIMITIVE_TOPOLOGY_UNDEFINED,
5206 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST,
5207 D3D11_PRIMITIVE_TOPOLOGY_POINTLIST,
5208 D3D11_PRIMITIVE_TOPOLOGY_LINELIST,
5209 D3D11_PRIMITIVE_TOPOLOGY_LINESTRIP,
5210 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP,
5211 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP, /* SVGA3D_PRIMITIVE_TRIANGLEFAN: No FAN in D3D11. */
5212 D3D11_PRIMITIVE_TOPOLOGY_LINELIST_ADJ,
5213 D3D11_PRIMITIVE_TOPOLOGY_LINESTRIP_ADJ,
5214 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLELIST_ADJ,
5215 D3D11_PRIMITIVE_TOPOLOGY_TRIANGLESTRIP_ADJ,
5216 D3D11_PRIMITIVE_TOPOLOGY_1_CONTROL_POINT_PATCHLIST,
5217 D3D11_PRIMITIVE_TOPOLOGY_2_CONTROL_POINT_PATCHLIST,
5218 D3D11_PRIMITIVE_TOPOLOGY_3_CONTROL_POINT_PATCHLIST,
5219 D3D11_PRIMITIVE_TOPOLOGY_4_CONTROL_POINT_PATCHLIST,
5220 D3D11_PRIMITIVE_TOPOLOGY_5_CONTROL_POINT_PATCHLIST,
5221 D3D11_PRIMITIVE_TOPOLOGY_6_CONTROL_POINT_PATCHLIST,
5222 D3D11_PRIMITIVE_TOPOLOGY_7_CONTROL_POINT_PATCHLIST,
5223 D3D11_PRIMITIVE_TOPOLOGY_8_CONTROL_POINT_PATCHLIST,
5224 D3D11_PRIMITIVE_TOPOLOGY_9_CONTROL_POINT_PATCHLIST,
5225 D3D11_PRIMITIVE_TOPOLOGY_10_CONTROL_POINT_PATCHLIST,
5226 D3D11_PRIMITIVE_TOPOLOGY_11_CONTROL_POINT_PATCHLIST,
5227 D3D11_PRIMITIVE_TOPOLOGY_12_CONTROL_POINT_PATCHLIST,
5228 D3D11_PRIMITIVE_TOPOLOGY_13_CONTROL_POINT_PATCHLIST,
5229 D3D11_PRIMITIVE_TOPOLOGY_14_CONTROL_POINT_PATCHLIST,
5230 D3D11_PRIMITIVE_TOPOLOGY_15_CONTROL_POINT_PATCHLIST,
5231 D3D11_PRIMITIVE_TOPOLOGY_16_CONTROL_POINT_PATCHLIST,
5232 D3D11_PRIMITIVE_TOPOLOGY_17_CONTROL_POINT_PATCHLIST,
5233 D3D11_PRIMITIVE_TOPOLOGY_18_CONTROL_POINT_PATCHLIST,
5234 D3D11_PRIMITIVE_TOPOLOGY_19_CONTROL_POINT_PATCHLIST,
5235 D3D11_PRIMITIVE_TOPOLOGY_20_CONTROL_POINT_PATCHLIST,
5236 D3D11_PRIMITIVE_TOPOLOGY_21_CONTROL_POINT_PATCHLIST,
5237 D3D11_PRIMITIVE_TOPOLOGY_22_CONTROL_POINT_PATCHLIST,
5238 D3D11_PRIMITIVE_TOPOLOGY_23_CONTROL_POINT_PATCHLIST,
5239 D3D11_PRIMITIVE_TOPOLOGY_24_CONTROL_POINT_PATCHLIST,
5240 D3D11_PRIMITIVE_TOPOLOGY_25_CONTROL_POINT_PATCHLIST,
5241 D3D11_PRIMITIVE_TOPOLOGY_26_CONTROL_POINT_PATCHLIST,
5242 D3D11_PRIMITIVE_TOPOLOGY_27_CONTROL_POINT_PATCHLIST,
5243 D3D11_PRIMITIVE_TOPOLOGY_28_CONTROL_POINT_PATCHLIST,
5244 D3D11_PRIMITIVE_TOPOLOGY_29_CONTROL_POINT_PATCHLIST,
5245 D3D11_PRIMITIVE_TOPOLOGY_30_CONTROL_POINT_PATCHLIST,
5246 D3D11_PRIMITIVE_TOPOLOGY_31_CONTROL_POINT_PATCHLIST,
5247 D3D11_PRIMITIVE_TOPOLOGY_32_CONTROL_POINT_PATCHLIST,
5248 };
5249 return aD3D11PrimitiveTopology[primitiveType];
5250}
5251
5252static DECLCALLBACK(int) vmsvga3dBackDXSetTopology(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dPrimitiveType topology)
5253{
5254 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5255 RT_NOREF(pBackend);
5256
5257 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
5258 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5259
5260 D3D11_PRIMITIVE_TOPOLOGY const enmTopology = dxTopology(topology);
5261 pDevice->pImmediateContext->IASetPrimitiveTopology(enmTopology);
5262 return VINF_SUCCESS;
5263}
5264
5265
5266static DECLCALLBACK(int) vmsvga3dBackDXSetRenderTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, uint32_t cRenderTargetViewId, SVGA3dRenderTargetViewId const *paRenderTargetViewId)
5267{
5268 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5269 RT_NOREF(pBackend);
5270
5271 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
5272 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5273
5274 ID3D11RenderTargetView *papRenderTargetViews[SVGA3D_MAX_RENDER_TARGETS];
5275 RT_ZERO(papRenderTargetViews);
5276 for (uint32_t i = 0; i < cRenderTargetViewId; ++i)
5277 {
5278 SVGA3dRenderTargetViewId const renderTargetViewId = paRenderTargetViewId[i];
5279 if (renderTargetViewId != SVGA3D_INVALID_ID)
5280 {
5281 ASSERT_GUEST_RETURN(renderTargetViewId < pDXContext->pBackendDXContext->cRenderTargetView, VERR_INVALID_PARAMETER);
5282 papRenderTargetViews[i] = pDXContext->pBackendDXContext->papRenderTargetView[renderTargetViewId];
5283 }
5284 }
5285
5286 ID3D11DepthStencilView *pDepthStencilView;
5287 if (depthStencilViewId != SVGA_ID_INVALID)
5288 pDepthStencilView = pDXContext->pBackendDXContext->papDepthStencilView[depthStencilViewId];
5289 else
5290 pDepthStencilView = NULL;
5291
5292#ifdef DX_DEFERRED_SET_RENDER_TARGETS
5293 memcpy(pDXContext->pBackendDXContext->state.papRenderTargetViews, papRenderTargetViews, sizeof(papRenderTargetViews));
5294 pDXContext->pBackendDXContext->state.cRenderTargetViews = cRenderTargetViewId;
5295 pDXContext->pBackendDXContext->state.pDepthStencilView = pDepthStencilView;
5296 pDevice->pImmediateContext->OMSetRenderTargets(0, NULL, NULL);
5297#else
5298 pDevice->pImmediateContext->OMSetRenderTargets(cRenderTargetViewId, papRenderTargetViews, pDepthStencilView);
5299#endif
5300 return VINF_SUCCESS;
5301}
5302
5303
5304static DECLCALLBACK(int) vmsvga3dBackDXSetBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dBlendStateId blendId, float const blendFactor[4], uint32_t sampleMask)
5305{
5306 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5307 RT_NOREF(pBackend);
5308
5309 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
5310 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5311
5312 ID3D11BlendState *pBlendState = pDXContext->pBackendDXContext->papBlendState[blendId];
5313 pDevice->pImmediateContext->OMSetBlendState(pBlendState, blendFactor, sampleMask);
5314
5315 pDXContext->svgaDXContext.renderState.blendStateId = blendId;
5316 memcpy(pDXContext->svgaDXContext.renderState.blendFactor, blendFactor, sizeof(blendFactor));
5317 pDXContext->svgaDXContext.renderState.sampleMask = sampleMask;
5318
5319 return VINF_SUCCESS;
5320}
5321
5322
5323static DECLCALLBACK(int) vmsvga3dBackDXSetDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, uint32_t stencilRef)
5324{
5325 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5326 RT_NOREF(pBackend);
5327
5328 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
5329 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5330
5331 ID3D11DepthStencilState *pDepthStencilState = pDXContext->pBackendDXContext->papDepthStencilState[depthStencilId];
5332 pDevice->pImmediateContext->OMSetDepthStencilState(pDepthStencilState, stencilRef);
5333
5334 pDXContext->svgaDXContext.renderState.depthStencilStateId = depthStencilId;
5335 pDXContext->svgaDXContext.renderState.stencilRef = stencilRef;
5336
5337 return VINF_SUCCESS;
5338}
5339
5340
5341static DECLCALLBACK(int) vmsvga3dBackDXSetRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId)
5342{
5343 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5344 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
5345 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5346
5347 RT_NOREF(pBackend);
5348
5349 pDevice->pImmediateContext->RSSetState(pDXContext->pBackendDXContext->papRasterizerState[rasterizerId]);
5350 return VINF_SUCCESS;
5351}
5352
5353
5354static DECLCALLBACK(int) vmsvga3dBackDXDefineQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5355{
5356 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5357
5358 RT_NOREF(pBackend, pDXContext);
5359 AssertFailed(); /** @todo Implement */
5360 return VERR_NOT_IMPLEMENTED;
5361}
5362
5363
5364static DECLCALLBACK(int) vmsvga3dBackDXDestroyQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5365{
5366 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5367
5368 RT_NOREF(pBackend, pDXContext);
5369 AssertFailed(); /** @todo Implement */
5370 return VERR_NOT_IMPLEMENTED;
5371}
5372
5373
5374static DECLCALLBACK(int) vmsvga3dBackDXBindQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5375{
5376 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5377
5378 RT_NOREF(pBackend, pDXContext);
5379 AssertFailed(); /** @todo Implement */
5380 return VERR_NOT_IMPLEMENTED;
5381}
5382
5383
5384static DECLCALLBACK(int) vmsvga3dBackDXSetQueryOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5385{
5386 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5387
5388 RT_NOREF(pBackend, pDXContext);
5389 AssertFailed(); /** @todo Implement */
5390 return VERR_NOT_IMPLEMENTED;
5391}
5392
5393
5394static DECLCALLBACK(int) vmsvga3dBackDXBeginQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5395{
5396 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5397
5398 RT_NOREF(pBackend, pDXContext);
5399 AssertFailed(); /** @todo Implement */
5400 return VERR_NOT_IMPLEMENTED;
5401}
5402
5403
5404static DECLCALLBACK(int) vmsvga3dBackDXEndQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5405{
5406 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5407
5408 RT_NOREF(pBackend, pDXContext);
5409 AssertFailed(); /** @todo Implement */
5410 return VERR_NOT_IMPLEMENTED;
5411}
5412
5413
5414static DECLCALLBACK(int) vmsvga3dBackDXReadbackQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5415{
5416 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5417
5418 RT_NOREF(pBackend, pDXContext);
5419 AssertFailed(); /** @todo Implement */
5420 return VERR_NOT_IMPLEMENTED;
5421}
5422
5423
5424static DECLCALLBACK(int) vmsvga3dBackDXSetPredication(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5425{
5426 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5427
5428 RT_NOREF(pBackend, pDXContext);
5429 AssertFailed(); /** @todo Implement */
5430 return VERR_NOT_IMPLEMENTED;
5431}
5432
5433
5434static DECLCALLBACK(int) vmsvga3dBackDXSetSOTargets(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t cSOTarget, SVGA3dSoTarget const *paSoTarget)
5435{
5436 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5437 RT_NOREF(pBackend);
5438
5439 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
5440 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5441
5442 /* For each paSoTarget[i]:
5443 * If the stream outout buffer object does not exist then create it.
5444 * If the surface has been updated by the guest then update the buffer object.
5445 * Use SOSetTargets to set the buffers.
5446 */
5447
5448 ID3D11Buffer *paResource[SVGA3D_DX_MAX_SOTARGETS];
5449 UINT paOffset[SVGA3D_DX_MAX_SOTARGETS];
5450
5451 /* Always re-bind all 4 SO targets. They can be NULL. */
5452 for (uint32_t i = 0; i < SVGA3D_DX_MAX_SOTARGETS; ++i)
5453 {
5454 /* Get corresponding resource. Create the buffer if does not yet exist. */
5455 if (i < cSOTarget && paSoTarget[i].sid != SVGA_ID_INVALID)
5456 {
5457 PVMSVGA3DSURFACE pSurface;
5458 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, paSoTarget[i].sid, &pSurface);
5459 AssertRCReturn(rc, rc);
5460
5461 if (pSurface->pBackendSurface == NULL)
5462 {
5463 /* Create the resource. */
5464 rc = vmsvga3dBackSurfaceCreateSoBuffer(pThisCC, pDXContext, pSurface);
5465 AssertRCReturn(rc, rc);
5466 }
5467
5468 /** @todo How paSoTarget[i].sizeInBytes is used? Maybe when the buffer is created? */
5469 paResource[i] = pSurface->pBackendSurface->u.pBuffer;
5470 paOffset[i] = paSoTarget[i].offset;
5471
5472 /** @todo This should be in the caller. */
5473 pDXContext->svgaDXContext.streamOut.targets[i] = paSoTarget[i].sid;
5474 }
5475 else
5476 {
5477 paResource[i] = NULL;
5478 paOffset[i] = 0;
5479
5480 /** @todo This should be in the caller. */
5481 pDXContext->svgaDXContext.streamOut.targets[i] = SVGA_ID_INVALID;
5482 }
5483 }
5484
5485 pDevice->pImmediateContext->SOSetTargets(SVGA3D_DX_MAX_SOTARGETS, paResource, paOffset);
5486
5487 pDXContext->pBackendDXContext->cSOTarget = cSOTarget;
5488
5489 return VINF_SUCCESS;
5490}
5491
5492
5493static DECLCALLBACK(int) vmsvga3dBackDXSetViewports(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t cViewport, SVGA3dViewport const *paViewport)
5494{
5495 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5496 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
5497 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5498
5499 RT_NOREF(pBackend);
5500
5501 /* D3D11_VIEWPORT is identical to SVGA3dViewport. */
5502 D3D11_VIEWPORT *pViewports = (D3D11_VIEWPORT *)paViewport;
5503
5504 pDevice->pImmediateContext->RSSetViewports(cViewport, pViewports);
5505 return VINF_SUCCESS;
5506}
5507
5508
5509static DECLCALLBACK(int) vmsvga3dBackDXSetScissorRects(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t cRect, SVGASignedRect const *paRect)
5510{
5511 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5512 RT_NOREF(pBackend);
5513
5514 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
5515 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5516
5517 /* D3D11_RECT is identical to SVGASignedRect. */
5518 D3D11_RECT *pRects = (D3D11_RECT *)paRect;
5519
5520 pDevice->pImmediateContext->RSSetScissorRects(cRect, pRects);
5521 return VINF_SUCCESS;
5522}
5523
5524
5525static DECLCALLBACK(int) vmsvga3dBackDXClearRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGA3dRGBAFloat const *pRGBA)
5526{
5527 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5528 RT_NOREF(pBackend);
5529
5530 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
5531 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5532
5533 ID3D11RenderTargetView *pRenderTargetView = pDXContext->pBackendDXContext->papRenderTargetView[renderTargetViewId];
5534 AssertReturn(pRenderTargetView, VERR_INVALID_STATE);
5535 pDevice->pImmediateContext->ClearRenderTargetView(pRenderTargetView, pRGBA->value);
5536 return VINF_SUCCESS;
5537}
5538
5539
5540static DECLCALLBACK(int) vmsvga3dBackDXClearDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, uint32_t flags, SVGA3dDepthStencilViewId depthStencilViewId, float depth, uint8_t stencil)
5541{
5542 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5543 RT_NOREF(pBackend);
5544
5545 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
5546 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5547
5548 ID3D11DepthStencilView *pDepthStencilView = pDXContext->pBackendDXContext->papDepthStencilView[depthStencilViewId];
5549 AssertReturn(pDepthStencilView, VERR_INVALID_STATE);
5550 pDevice->pImmediateContext->ClearDepthStencilView(pDepthStencilView, flags, depth, stencil);
5551 return VINF_SUCCESS;
5552}
5553
5554
5555static DECLCALLBACK(int) vmsvga3dBackDXPredCopyRegion(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSurfaceId dstSid, uint32_t dstSubResource, SVGA3dSurfaceId srcSid, uint32_t srcSubResource, SVGA3dCopyBox const *pBox)
5556{
5557 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5558 RT_NOREF(pBackend);
5559
5560 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
5561 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5562
5563 PVMSVGA3DSURFACE pSrcSurface;
5564 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, srcSid, &pSrcSurface);
5565 AssertRCReturn(rc, rc);
5566
5567 PVMSVGA3DSURFACE pDstSurface;
5568 rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, dstSid, &pDstSurface);
5569 AssertRCReturn(rc, rc);
5570
5571 if (pSrcSurface->pBackendSurface == NULL)
5572 {
5573 /* Create the resource. */
5574 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pSrcSurface);
5575 AssertRCReturn(rc, rc);
5576 }
5577
5578 if (pDstSurface->pBackendSurface == NULL)
5579 {
5580 /* Create the resource. */
5581 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pDstSurface);
5582 AssertRCReturn(rc, rc);
5583 }
5584
5585 LogFunc(("cid %d: src cid %d%s -> dst cid %d%s\n",
5586 pDXContext->cid, pSrcSurface->idAssociatedContext,
5587 (pSrcSurface->surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : "",
5588 pDstSurface->idAssociatedContext,
5589 (pDstSurface->surfaceFlags & SVGA3D_SURFACE_SCREENTARGET) ? " st" : ""));
5590
5591 /* Clip the box. */
5592 /** @todo Use [src|dst]SubResource to index p[Src|Dst]Surface->paMipmapLevels array directly. */
5593 uint32_t iSrcFace;
5594 uint32_t iSrcMipmap;
5595 vmsvga3dCalcMipmapAndFace(pSrcSurface->cLevels, srcSubResource, &iSrcMipmap, &iSrcFace);
5596
5597 uint32_t iDstFace;
5598 uint32_t iDstMipmap;
5599 vmsvga3dCalcMipmapAndFace(pDstSurface->cLevels, dstSubResource, &iDstMipmap, &iDstFace);
5600
5601 PVMSVGA3DMIPMAPLEVEL pSrcMipLevel;
5602 rc = vmsvga3dMipmapLevel(pSrcSurface, iSrcFace, iSrcMipmap, &pSrcMipLevel);
5603 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
5604
5605 PVMSVGA3DMIPMAPLEVEL pDstMipLevel;
5606 rc = vmsvga3dMipmapLevel(pDstSurface, iDstFace, iDstMipmap, &pDstMipLevel);
5607 ASSERT_GUEST_RETURN(RT_SUCCESS(rc), rc);
5608
5609 SVGA3dCopyBox clipBox = *pBox;
5610 vmsvgaR3ClipCopyBox(&pSrcMipLevel->mipmapSize, &pDstMipLevel->mipmapSize, &clipBox);
5611
5612 UINT DstSubresource = dstSubResource;
5613 UINT DstX = clipBox.x;
5614 UINT DstY = clipBox.y;
5615 UINT DstZ = clipBox.z;
5616
5617 UINT SrcSubresource = srcSubResource;
5618 D3D11_BOX SrcBox;
5619 SrcBox.left = clipBox.srcx;
5620 SrcBox.top = clipBox.srcy;
5621 SrcBox.front = clipBox.srcz;
5622 SrcBox.right = clipBox.srcx + clipBox.w;
5623 SrcBox.bottom = clipBox.srcy + clipBox.h;
5624 SrcBox.back = clipBox.srcz + clipBox.d;
5625
5626 ID3D11Resource *pDstResource;
5627 ID3D11Resource *pSrcResource;
5628
5629 pDstResource = dxResource(pThisCC->svga.p3dState, pDstSurface, pDXContext);
5630 pSrcResource = dxResource(pThisCC->svga.p3dState, pSrcSurface, pDXContext);
5631
5632 pDevice->pImmediateContext->CopySubresourceRegion(pDstResource, DstSubresource, DstX, DstY, DstZ,
5633 pSrcResource, SrcSubresource, &SrcBox);
5634
5635 pDstSurface->pBackendSurface->cidDrawing = pDXContext->cid;
5636 return VINF_SUCCESS;
5637}
5638
5639
5640static DECLCALLBACK(int) vmsvga3dBackDXPredCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5641{
5642 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5643
5644 RT_NOREF(pBackend, pDXContext);
5645 AssertFailed(); /** @todo Implement */
5646 return VERR_NOT_IMPLEMENTED;
5647}
5648
5649
5650static DECLCALLBACK(int) vmsvga3dBackDXPresentBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5651{
5652 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5653
5654 RT_NOREF(pBackend, pDXContext);
5655 AssertFailed(); /** @todo Implement */
5656 return VERR_NOT_IMPLEMENTED;
5657}
5658
5659
5660static DECLCALLBACK(int) vmsvga3dBackDXGenMips(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId)
5661{
5662 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5663 RT_NOREF(pBackend);
5664
5665 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
5666 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5667
5668 ID3D11ShaderResourceView *pShaderResourceView = pDXContext->pBackendDXContext->papShaderResourceView[shaderResourceViewId];
5669 AssertReturn(pShaderResourceView, VERR_INVALID_STATE);
5670 pDevice->pImmediateContext->GenerateMips(pShaderResourceView);
5671 return VINF_SUCCESS;
5672}
5673
5674
5675static int dxDefineShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId, SVGACOTableDXSRViewEntry const *pEntry)
5676{
5677 /* Get corresponding resource for pEntry->sid. Create the surface if does not yet exist. */
5678 PVMSVGA3DSURFACE pSurface;
5679 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pEntry->sid, &pSurface);
5680 AssertRCReturn(rc, rc);
5681
5682 if (pSurface->pBackendSurface == NULL)
5683 {
5684 /* Create the actual texture. */
5685 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pSurface);
5686 AssertRCReturn(rc, rc);
5687 }
5688
5689 HRESULT hr = dxShaderResourceViewCreate(pThisCC, pDXContext, pEntry, pSurface, &pDXContext->pBackendDXContext->papShaderResourceView[shaderResourceViewId]);
5690 if (SUCCEEDED(hr))
5691 return VINF_SUCCESS;
5692 return VERR_INVALID_STATE;
5693}
5694
5695
5696static DECLCALLBACK(int) vmsvga3dBackDXDefineShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId, SVGACOTableDXSRViewEntry const *pEntry)
5697{
5698 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5699 RT_NOREF(pBackend);
5700
5701 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
5702 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5703
5704 return dxDefineShaderResourceView(pThisCC, pDXContext, shaderResourceViewId, pEntry);
5705}
5706
5707
5708static DECLCALLBACK(int) vmsvga3dBackDXDestroyShaderResourceView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderResourceViewId shaderResourceViewId)
5709{
5710 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5711 RT_NOREF(pBackend);
5712
5713 D3D_RELEASE(pDXContext->pBackendDXContext->papShaderResourceView[shaderResourceViewId]);
5714 return VINF_SUCCESS;
5715}
5716
5717
5718static int dxDefineRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGACOTableDXRTViewEntry const *pEntry)
5719{
5720 /* Get corresponding resource for pEntry->sid. Create the surface if does not yet exist. */
5721 PVMSVGA3DSURFACE pSurface;
5722 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pEntry->sid, &pSurface);
5723 AssertRCReturn(rc, rc);
5724
5725 if (pSurface->pBackendSurface == NULL)
5726 {
5727 /* Create the actual texture. */
5728 rc = vmsvga3dBackSurfaceCreateTexture(pThisCC, pDXContext, pSurface);
5729 AssertRCReturn(rc, rc);
5730 }
5731
5732 HRESULT hr = dxRenderTargetViewCreate(pThisCC, pDXContext, pEntry, pSurface, &pDXContext->pBackendDXContext->papRenderTargetView[renderTargetViewId]);
5733 if (SUCCEEDED(hr))
5734 return VINF_SUCCESS;
5735
5736 return VERR_INVALID_STATE;
5737}
5738
5739
5740static DECLCALLBACK(int) vmsvga3dBackDXDefineRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId, SVGACOTableDXRTViewEntry const *pEntry)
5741{
5742 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5743 RT_NOREF(pBackend);
5744
5745 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
5746 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5747
5748 return dxDefineRenderTargetView(pThisCC, pDXContext, renderTargetViewId, pEntry);
5749}
5750
5751
5752static DECLCALLBACK(int) vmsvga3dBackDXDestroyRenderTargetView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRenderTargetViewId renderTargetViewId)
5753{
5754 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5755 RT_NOREF(pBackend);
5756
5757 D3D_RELEASE(pDXContext->pBackendDXContext->papRenderTargetView[renderTargetViewId]);
5758 return VINF_SUCCESS;
5759}
5760
5761
5762static int dxDefineDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, SVGACOTableDXDSViewEntry const *pEntry)
5763{
5764 /* Get corresponding resource for pEntry->sid. Create the surface if does not yet exist. */
5765 PVMSVGA3DSURFACE pSurface;
5766 int rc = vmsvga3dSurfaceFromSid(pThisCC->svga.p3dState, pEntry->sid, &pSurface);
5767 AssertRCReturn(rc, rc);
5768
5769 if ( pSurface->pBackendSurface != NULL
5770 && pDXContext->cid != pSurface->idAssociatedContext)
5771 {
5772 /* Supposed to be per context. Sometimes the guest reuses the texture in another context. */
5773 vmsvga3dBackSurfaceDestroy(pThisCC, pSurface);
5774 }
5775
5776 if (pSurface->pBackendSurface == NULL)
5777 {
5778 /* Create the actual texture. */
5779 rc = vmsvga3dBackSurfaceCreateDepthStencilTexture(pThisCC, pDXContext, pSurface);
5780 AssertRCReturn(rc, rc);
5781 }
5782
5783 HRESULT hr = dxDepthStencilViewCreate(pThisCC, pDXContext, pEntry, pSurface, &pDXContext->pBackendDXContext->papDepthStencilView[depthStencilViewId]);
5784 if (SUCCEEDED(hr))
5785 return VINF_SUCCESS;
5786 return VERR_INVALID_STATE;
5787}
5788
5789static DECLCALLBACK(int) vmsvga3dBackDXDefineDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId, SVGACOTableDXDSViewEntry const *pEntry)
5790{
5791 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5792 RT_NOREF(pBackend);
5793
5794 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
5795 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5796
5797 return dxDefineDepthStencilView(pThisCC, pDXContext, depthStencilViewId, pEntry);
5798}
5799
5800
5801static DECLCALLBACK(int) vmsvga3dBackDXDestroyDepthStencilView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilViewId depthStencilViewId)
5802{
5803 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5804 RT_NOREF(pBackend);
5805
5806 D3D_RELEASE(pDXContext->pBackendDXContext->papDepthStencilView[depthStencilViewId]);
5807 return VINF_SUCCESS;
5808}
5809
5810
5811static int dxDefineElementLayout(PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId, SVGACOTableDXElementLayoutEntry const *pEntry)
5812{
5813 DXELEMENTLAYOUT *pDXElementLayout = &pDXContext->pBackendDXContext->paElementLayout[elementLayoutId];
5814 D3D_RELEASE(pDXElementLayout->pElementLayout);
5815
5816 /* Semantic name is not interpreted by D3D, therefore arbitrary names can be used
5817 * if they are consistent between the element layout and shader input signature.
5818 * "In general, data passed between pipeline stages is completely generic and is not uniquely
5819 * interpreted by the system; arbitrary semantics are allowed ..."
5820 *
5821 * However D3D runtime insists that "SemanticName string ("POSITIO1") cannot end with a number."
5822 *
5823 * System-Value semantics ("SV_*") between shaders require proper names of course.
5824 * But they are irrelevant for input attributes.
5825 */
5826 pDXElementLayout->cElementDesc = pEntry->numDescs;
5827 for (uint32_t i = 0; i < pEntry->numDescs; ++i)
5828 {
5829 D3D11_INPUT_ELEMENT_DESC *pDst = &pDXElementLayout->aElementDesc[i];
5830 SVGA3dInputElementDesc const *pSrc = &pEntry->descs[i];
5831 pDst->SemanticName = "ATTRIB";
5832 pDst->SemanticIndex = i; /// @todo 'pSrc->inputRegister' is unused, maybe it should somehow.
5833 pDst->Format = vmsvgaDXSurfaceFormat2Dxgi(pSrc->format);
5834 AssertReturn(pDst->Format != DXGI_FORMAT_UNKNOWN, VERR_NOT_IMPLEMENTED);
5835 pDst->InputSlot = pSrc->inputSlot;
5836 pDst->AlignedByteOffset = pSrc->alignedByteOffset;
5837 pDst->InputSlotClass = (D3D11_INPUT_CLASSIFICATION)pSrc->inputSlotClass;
5838 pDst->InstanceDataStepRate = pSrc->instanceDataStepRate;
5839 }
5840
5841 return VINF_SUCCESS;
5842}
5843
5844
5845static DECLCALLBACK(int) vmsvga3dBackDXDefineElementLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dElementLayoutId elementLayoutId, SVGACOTableDXElementLayoutEntry const *pEntry)
5846{
5847 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5848 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
5849 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5850
5851 RT_NOREF(pBackend);
5852
5853 /* Not much can be done here because ID3D11Device::CreateInputLayout requires
5854 * a pShaderBytecodeWithInputSignature which is not known at this moment.
5855 * InputLayout object will be created in SVGA_3D_CMD_DX_SET_INPUT_LAYOUT.
5856 */
5857
5858 Assert(elementLayoutId == pEntry->elid);
5859
5860 return dxDefineElementLayout(pDXContext, elementLayoutId, pEntry);
5861}
5862
5863
5864static DECLCALLBACK(int) vmsvga3dBackDXDestroyElementLayout(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5865{
5866 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5867
5868 RT_NOREF(pBackend, pDXContext);
5869 AssertFailed(); /** @todo Implement */
5870 return VERR_NOT_IMPLEMENTED;
5871}
5872
5873
5874static int dxDefineBlendState(PVMSVGA3DDXCONTEXT pDXContext,
5875 SVGA3dBlendStateId blendId, SVGACOTableDXBlendStateEntry const *pEntry)
5876{
5877 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
5878 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5879
5880 HRESULT hr = dxBlendStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papBlendState[blendId]);
5881 if (SUCCEEDED(hr))
5882 return VINF_SUCCESS;
5883 return VERR_INVALID_STATE;
5884}
5885
5886static DECLCALLBACK(int) vmsvga3dBackDXDefineBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext,
5887 SVGA3dBlendStateId blendId, SVGACOTableDXBlendStateEntry const *pEntry)
5888{
5889 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5890 RT_NOREF(pBackend);
5891
5892 return dxDefineBlendState(pDXContext, blendId, pEntry);
5893}
5894
5895
5896static DECLCALLBACK(int) vmsvga3dBackDXDestroyBlendState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5897{
5898 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5899
5900 RT_NOREF(pBackend, pDXContext);
5901 AssertFailed(); /** @todo Implement */
5902 return VERR_NOT_IMPLEMENTED;
5903}
5904
5905
5906static int dxDefineDepthStencilState(PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, SVGACOTableDXDepthStencilEntry const *pEntry)
5907{
5908 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
5909 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5910
5911 HRESULT hr = dxDepthStencilStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papDepthStencilState[depthStencilId]);
5912 if (SUCCEEDED(hr))
5913 return VINF_SUCCESS;
5914 return VERR_INVALID_STATE;
5915}
5916
5917
5918static DECLCALLBACK(int) vmsvga3dBackDXDefineDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dDepthStencilStateId depthStencilId, SVGACOTableDXDepthStencilEntry const *pEntry)
5919{
5920 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5921 RT_NOREF(pBackend);
5922
5923 return dxDefineDepthStencilState(pDXContext, depthStencilId, pEntry);
5924}
5925
5926
5927static DECLCALLBACK(int) vmsvga3dBackDXDestroyDepthStencilState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5928{
5929 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5930
5931 RT_NOREF(pBackend, pDXContext);
5932 AssertFailed(); /** @todo Implement */
5933 return VERR_NOT_IMPLEMENTED;
5934}
5935
5936
5937static int dxDefineRasterizerState(PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId, SVGACOTableDXRasterizerStateEntry const *pEntry)
5938{
5939 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
5940 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5941
5942 HRESULT hr = dxRasterizerStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papRasterizerState[rasterizerId]);
5943 if (SUCCEEDED(hr))
5944 return VINF_SUCCESS;
5945 return VERR_INVALID_STATE;
5946}
5947
5948
5949static DECLCALLBACK(int) vmsvga3dBackDXDefineRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dRasterizerStateId rasterizerId, SVGACOTableDXRasterizerStateEntry const *pEntry)
5950{
5951 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5952 RT_NOREF(pBackend);
5953
5954 return dxDefineRasterizerState(pDXContext, rasterizerId, pEntry);
5955}
5956
5957
5958static DECLCALLBACK(int) vmsvga3dBackDXDestroyRasterizerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5959{
5960 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5961
5962 RT_NOREF(pBackend, pDXContext);
5963 AssertFailed(); /** @todo Implement */
5964 return VERR_NOT_IMPLEMENTED;
5965}
5966
5967
5968static int dxDefineSamplerState(PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSamplerId samplerId, SVGACOTableDXSamplerEntry const *pEntry)
5969{
5970 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
5971 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
5972
5973 HRESULT hr = dxSamplerStateCreate(pDevice, pEntry, &pDXContext->pBackendDXContext->papSamplerState[samplerId]);
5974 if (SUCCEEDED(hr))
5975 return VINF_SUCCESS;
5976 return VERR_INVALID_STATE;
5977}
5978
5979
5980static DECLCALLBACK(int) vmsvga3dBackDXDefineSamplerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dSamplerId samplerId, SVGACOTableDXSamplerEntry const *pEntry)
5981{
5982 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5983 RT_NOREF(pBackend);
5984
5985 return dxDefineSamplerState(pDXContext, samplerId, pEntry);
5986}
5987
5988
5989static DECLCALLBACK(int) vmsvga3dBackDXDestroySamplerState(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
5990{
5991 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
5992
5993 RT_NOREF(pBackend, pDXContext);
5994 AssertFailed(); /** @todo Implement */
5995 return VERR_NOT_IMPLEMENTED;
5996}
5997
5998
5999
6000static int dxDefineShader(PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderId shaderId, SVGACOTableDXShaderEntry const *pEntry)
6001{
6002 /** @todo A common approach for creation of COTable backend objects: runtime, empty DX COTable, live DX COTable. */
6003 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[shaderId];
6004 if (pDXShader->enmShaderType == SVGA3D_SHADERTYPE_INVALID)
6005 {
6006 /* Init the shader structure. */
6007 pDXShader->enmShaderType = pEntry->type;
6008 pDXShader->soid = SVGA_ID_INVALID;
6009 }
6010
6011 PVMSVGA3DSHADER pShader = &pDXContext->paShader[shaderId];
6012 pShader->u.pvBackendShader = pDXShader;
6013
6014 return VINF_SUCCESS;
6015}
6016
6017
6018static int dxDestroyShader(DXSHADER *pDXShader)
6019{
6020 pDXShader->enmShaderType = SVGA3D_SHADERTYPE_INVALID;
6021 D3D_RELEASE(pDXShader->pShader);
6022 RTMemFree(pDXShader->pvDXBC);
6023 pDXShader->pvDXBC = NULL;
6024 pDXShader->cbDXBC = 0;
6025 pDXShader->soid = SVGA_ID_INVALID;
6026 return VINF_SUCCESS;
6027}
6028
6029
6030static DECLCALLBACK(int) vmsvga3dBackDXDefineShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderId shaderId, SVGACOTableDXShaderEntry const *pEntry)
6031{
6032 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6033 RT_NOREF(pBackend);
6034
6035 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[shaderId];
6036 dxDestroyShader(pDXShader);
6037
6038 return dxDefineShader(pDXContext, shaderId, pEntry);
6039}
6040
6041
6042static DECLCALLBACK(int) vmsvga3dBackDXDestroyShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dShaderId shaderId)
6043{
6044 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6045 RT_NOREF(pBackend);
6046
6047 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[shaderId];
6048 dxDestroyShader(pDXShader);
6049
6050 return VINF_SUCCESS;
6051}
6052
6053
6054static DECLCALLBACK(int) vmsvga3dBackDXBindShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, PVMSVGA3DSHADER pShader, void const *pvShaderBytecode)
6055{
6056 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6057 DXDEVICE *pDevice = &pDXContext->pBackendDXContext->device;
6058 AssertReturn(pDevice->pDevice, VERR_INVALID_STATE);
6059
6060 RT_NOREF(pBackend);
6061
6062 int rc = VINF_SUCCESS;
6063
6064 DXSHADER *pDXShader = &pDXContext->pBackendDXContext->paShader[pShader->id];
6065 Assert(pDXShader->enmShaderType == pShader->type);
6066
6067 if (pDXShader->pvDXBC)
6068 {
6069 RTMemFree(pDXShader->pvDXBC);
6070 pDXShader->pvDXBC = NULL;
6071 pDXShader->cbDXBC = 0;
6072 }
6073
6074 if (pvShaderBytecode)
6075 {
6076#ifdef LOG_ENABLED
6077 Log(("Shader: cid=%u shid=%u type=%d:\n", pDXContext->cid, pShader->id, pDXShader->enmShaderType));
6078 uint8_t *pu8 = (uint8_t *)pvShaderBytecode;
6079 for (uint32_t i = 0; i < pShader->cbData; ++i)
6080 {
6081 if ((i % 16) == 0)
6082 {
6083 if (i > 0)
6084 Log6((",\n"));
6085
6086 Log6((" %#04x", pu8[i]));
6087 }
6088 else
6089 {
6090 Log6((", %#04x", pu8[i]));
6091 }
6092 }
6093 Log6(("\n"));
6094#endif
6095
6096 rc = DXShaderCreateDXBC(&pShader->shaderInfo, pvShaderBytecode, pShader->cbData, &pDXShader->pvDXBC, &pDXShader->cbDXBC);
6097 if (RT_SUCCESS(rc))
6098 {
6099#ifdef LOG_ENABLED
6100 if (pBackend->pfnD3DDisassemble && LogIs6Enabled())
6101 {
6102 ID3D10Blob *pBlob = 0;
6103 HRESULT hr2 = pBackend->pfnD3DDisassemble(pDXShader->pvDXBC, pDXShader->cbDXBC, 0, NULL, &pBlob);
6104 if (SUCCEEDED(hr2) && pBlob && pBlob->GetBufferSize())
6105 {
6106 Log6(("Shader: cid=%u shid=%u type=%d:\n%s\n",
6107 pDXContext->cid, pShader->id, pDXShader->enmShaderType, pBlob->GetBufferPointer()));
6108 }
6109 else
6110 AssertFailed();
6111 D3D_RELEASE(pBlob);
6112 }
6113#endif
6114
6115 HRESULT hr = dxShaderCreate(pDXContext, pShader, pDXShader);
6116 if (SUCCEEDED(hr))
6117 {
6118 }
6119 else
6120 rc = VERR_INVALID_STATE;
6121 }
6122 else
6123 rc = VERR_NO_MEMORY;
6124 }
6125
6126 return rc;
6127}
6128
6129
6130static DECLCALLBACK(int) vmsvga3dBackDXDefineStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dStreamOutputId soid, SVGACOTableDXStreamOutputEntry const *pEntry)
6131{
6132 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6133 RT_NOREF(pBackend);
6134
6135 DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[soid];
6136 dxDestroyStreamOutput(pDXStreamOutput);
6137
6138 return dxDefineStreamOutput(pDXContext, soid, pEntry);
6139}
6140
6141
6142static DECLCALLBACK(int) vmsvga3dBackDXDestroyStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dStreamOutputId soid)
6143{
6144 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6145 RT_NOREF(pBackend);
6146
6147 DXSTREAMOUTPUT *pDXStreamOutput = &pDXContext->pBackendDXContext->paStreamOutput[soid];
6148 dxDestroyStreamOutput(pDXStreamOutput);
6149
6150 return VINF_SUCCESS;
6151}
6152
6153
6154static DECLCALLBACK(int) vmsvga3dBackDXSetStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGA3dStreamOutputId soid)
6155{
6156 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6157 RT_NOREF(pBackend, pDXContext, soid);
6158
6159 return VINF_SUCCESS;
6160}
6161
6162
6163static int dxCOTableRealloc(void **ppvCOTable, uint32_t *pcCOTable, uint32_t cbEntry, uint32_t cEntries, uint32_t cValidEntries)
6164{
6165 uint32_t const cCOTableCurrent = *pcCOTable;
6166
6167 if (*pcCOTable != cEntries)
6168 {
6169 /* Grow/shrink the array. */
6170 if (cEntries)
6171 {
6172 void *pvNew = RTMemRealloc(*ppvCOTable, cEntries * cbEntry);
6173 AssertReturn(pvNew, VERR_NO_MEMORY);
6174 *ppvCOTable = pvNew;
6175 }
6176 else
6177 {
6178 RTMemFree(*ppvCOTable);
6179 *ppvCOTable = NULL;
6180 }
6181
6182 *pcCOTable = cEntries;
6183 }
6184
6185 if (*ppvCOTable)
6186 {
6187 uint32_t const cEntriesToKeep = RT_MIN(cCOTableCurrent, cValidEntries);
6188 memset((uint8_t *)(*ppvCOTable) + cEntriesToKeep * cbEntry, 0, (cEntries - cEntriesToKeep) * cbEntry);
6189 }
6190
6191 return VINF_SUCCESS;
6192}
6193
6194static DECLCALLBACK(int) vmsvga3dBackDXSetCOTable(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext, SVGACOTableType type, uint32_t cValidEntries)
6195{
6196 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6197 RT_NOREF(pBackend);
6198
6199 VMSVGA3DBACKENDDXCONTEXT *pBackendDXContext = pDXContext->pBackendDXContext;
6200
6201 int rc = VINF_SUCCESS;
6202
6203 /*
6204 * 1) Release current backend table, if exists;
6205 * 2) Reallocate memory for the new backend table;
6206 * 3) If cValidEntries is not zero, then re-define corresponding backend table elements.
6207 */
6208 switch (type)
6209 {
6210 case SVGA_COTABLE_RTVIEW:
6211 /* Clear current entries. */
6212 if (pBackendDXContext->papRenderTargetView)
6213 {
6214 for (uint32_t i = cValidEntries; i < pBackendDXContext->cRenderTargetView; ++i)
6215 D3D_RELEASE(pBackendDXContext->papRenderTargetView[i]);
6216 }
6217
6218 rc = dxCOTableRealloc((void **)&pBackendDXContext->papRenderTargetView, &pBackendDXContext->cRenderTargetView,
6219 sizeof(pBackendDXContext->papRenderTargetView[0]), pDXContext->cot.cRTView, cValidEntries);
6220 AssertRCBreak(rc);
6221
6222 for (uint32_t i = 0; i < cValidEntries; ++i)
6223 {
6224 SVGACOTableDXRTViewEntry const *pEntry = &pDXContext->cot.paRTView[i];
6225 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
6226 continue; /* Skip uninitialized entry. */
6227
6228 dxDefineRenderTargetView(pThisCC, pDXContext, i, pEntry);
6229 }
6230 break;
6231 case SVGA_COTABLE_DSVIEW:
6232 if (pBackendDXContext->papDepthStencilView)
6233 {
6234 for (uint32_t i = cValidEntries; i < pBackendDXContext->cDepthStencilView; ++i)
6235 D3D_RELEASE(pBackendDXContext->papDepthStencilView[i]);
6236 }
6237
6238 rc = dxCOTableRealloc((void **)&pBackendDXContext->papDepthStencilView, &pBackendDXContext->cDepthStencilView,
6239 sizeof(pBackendDXContext->papDepthStencilView[0]), pDXContext->cot.cDSView, cValidEntries);
6240 AssertRCBreak(rc);
6241
6242 for (uint32_t i = 0; i < cValidEntries; ++i)
6243 {
6244 SVGACOTableDXDSViewEntry const *pEntry = &pDXContext->cot.paDSView[i];
6245 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
6246 continue; /* Skip uninitialized entry. */
6247
6248 dxDefineDepthStencilView(pThisCC, pDXContext, i, pEntry);
6249 }
6250 break;
6251 case SVGA_COTABLE_SRVIEW:
6252 if (pBackendDXContext->papShaderResourceView)
6253 {
6254 for (uint32_t i = cValidEntries; i < pBackendDXContext->cShaderResourceView; ++i)
6255 D3D_RELEASE(pBackendDXContext->papShaderResourceView[i]);
6256 }
6257
6258 rc = dxCOTableRealloc((void **)&pBackendDXContext->papShaderResourceView, &pBackendDXContext->cShaderResourceView,
6259 sizeof(pBackendDXContext->papShaderResourceView[0]), pDXContext->cot.cSRView, cValidEntries);
6260 AssertRCBreak(rc);
6261
6262 for (uint32_t i = 0; i < cValidEntries; ++i)
6263 {
6264 SVGACOTableDXSRViewEntry const *pEntry = &pDXContext->cot.paSRView[i];
6265 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
6266 continue; /* Skip uninitialized entry. */
6267
6268 dxDefineShaderResourceView(pThisCC, pDXContext, i, pEntry);
6269 }
6270 break;
6271 case SVGA_COTABLE_ELEMENTLAYOUT:
6272 if (pBackendDXContext->paElementLayout)
6273 {
6274 for (uint32_t i = cValidEntries; i < pBackendDXContext->cElementLayout; ++i)
6275 D3D_RELEASE(pBackendDXContext->paElementLayout[i].pElementLayout);
6276 }
6277
6278 rc = dxCOTableRealloc((void **)&pBackendDXContext->paElementLayout, &pBackendDXContext->cElementLayout,
6279 sizeof(pBackendDXContext->paElementLayout[0]), pDXContext->cot.cElementLayout, cValidEntries);
6280 AssertRCBreak(rc);
6281
6282 for (uint32_t i = 0; i < cValidEntries; ++i)
6283 {
6284 SVGACOTableDXElementLayoutEntry const *pEntry = &pDXContext->cot.paElementLayout[i];
6285 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
6286 continue; /* Skip uninitialized entry. */
6287
6288 dxDefineElementLayout(pDXContext, i, pEntry);
6289 }
6290 break;
6291 case SVGA_COTABLE_BLENDSTATE:
6292 if (pBackendDXContext->papBlendState)
6293 {
6294 for (uint32_t i = cValidEntries; i < pBackendDXContext->cBlendState; ++i)
6295 D3D_RELEASE(pBackendDXContext->papBlendState[i]);
6296 }
6297
6298 rc = dxCOTableRealloc((void **)&pBackendDXContext->papBlendState, &pBackendDXContext->cBlendState,
6299 sizeof(pBackendDXContext->papBlendState[0]), pDXContext->cot.cBlendState, cValidEntries);
6300 AssertRCBreak(rc);
6301
6302 for (uint32_t i = 0; i < cValidEntries; ++i)
6303 {
6304 SVGACOTableDXBlendStateEntry const *pEntry = &pDXContext->cot.paBlendState[i];
6305 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
6306 continue; /* Skip uninitialized entry. */
6307
6308 dxDefineBlendState(pDXContext, i, pEntry);
6309 }
6310 break;
6311 case SVGA_COTABLE_DEPTHSTENCIL:
6312 if (pBackendDXContext->papDepthStencilState)
6313 {
6314 for (uint32_t i = cValidEntries; i < pBackendDXContext->cDepthStencilState; ++i)
6315 D3D_RELEASE(pBackendDXContext->papDepthStencilState[i]);
6316 }
6317
6318 rc = dxCOTableRealloc((void **)&pBackendDXContext->papDepthStencilState, &pBackendDXContext->cDepthStencilState,
6319 sizeof(pBackendDXContext->papDepthStencilState[0]), pDXContext->cot.cDepthStencil, cValidEntries);
6320 AssertRCBreak(rc);
6321
6322 for (uint32_t i = 0; i < cValidEntries; ++i)
6323 {
6324 SVGACOTableDXDepthStencilEntry const *pEntry = &pDXContext->cot.paDepthStencil[i];
6325 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
6326 continue; /* Skip uninitialized entry. */
6327
6328 dxDefineDepthStencilState(pDXContext, i, pEntry);
6329 }
6330 break;
6331 case SVGA_COTABLE_RASTERIZERSTATE:
6332 if (pBackendDXContext->papRasterizerState)
6333 {
6334 for (uint32_t i = cValidEntries; i < pBackendDXContext->cRasterizerState; ++i)
6335 D3D_RELEASE(pBackendDXContext->papRasterizerState[i]);
6336 }
6337
6338 rc = dxCOTableRealloc((void **)&pBackendDXContext->papRasterizerState, &pBackendDXContext->cRasterizerState,
6339 sizeof(pBackendDXContext->papRasterizerState[0]), pDXContext->cot.cRasterizerState, cValidEntries);
6340 AssertRCBreak(rc);
6341
6342 for (uint32_t i = 0; i < cValidEntries; ++i)
6343 {
6344 SVGACOTableDXRasterizerStateEntry const *pEntry = &pDXContext->cot.paRasterizerState[i];
6345 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
6346 continue; /* Skip uninitialized entry. */
6347
6348 dxDefineRasterizerState(pDXContext, i, pEntry);
6349 }
6350 break;
6351 case SVGA_COTABLE_SAMPLER:
6352 if (pBackendDXContext->papSamplerState)
6353 {
6354 for (uint32_t i = cValidEntries; i < pBackendDXContext->cSamplerState; ++i)
6355 D3D_RELEASE(pBackendDXContext->papSamplerState[i]);
6356 }
6357
6358 rc = dxCOTableRealloc((void **)&pBackendDXContext->papSamplerState, &pBackendDXContext->cSamplerState,
6359 sizeof(pBackendDXContext->papSamplerState[0]), pDXContext->cot.cSampler, cValidEntries);
6360 AssertRCBreak(rc);
6361
6362 for (uint32_t i = 0; i < cValidEntries; ++i)
6363 {
6364 SVGACOTableDXSamplerEntry const *pEntry = &pDXContext->cot.paSampler[i];
6365 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
6366 continue; /* Skip uninitialized entry. */
6367
6368 dxDefineSamplerState(pDXContext, i, pEntry);
6369 }
6370 break;
6371 case SVGA_COTABLE_STREAMOUTPUT:
6372 if (pBackendDXContext->paStreamOutput)
6373 {
6374 for (uint32_t i = cValidEntries; i < pBackendDXContext->cStreamOutput; ++i)
6375 dxDestroyStreamOutput(&pBackendDXContext->paStreamOutput[i]);
6376 }
6377
6378 rc = dxCOTableRealloc((void **)&pBackendDXContext->paStreamOutput, &pBackendDXContext->cStreamOutput,
6379 sizeof(pBackendDXContext->paStreamOutput[0]), pDXContext->cot.cStreamOutput, cValidEntries);
6380 AssertRCBreak(rc);
6381
6382 for (uint32_t i = 0; i < cValidEntries; ++i)
6383 {
6384 SVGACOTableDXStreamOutputEntry const *pEntry = &pDXContext->cot.paStreamOutput[i];
6385 /** @todo The caller must verify the COTable content using same rules as when a new entry is defined. */
6386 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
6387 continue; /* Skip uninitialized entry. */
6388
6389 dxDefineStreamOutput(pDXContext, i, pEntry);
6390 }
6391 break;
6392 case SVGA_COTABLE_DXQUERY:
6393 if (pBackendDXContext->papQuery)
6394 {
6395 for (uint32_t i = cValidEntries; i < pBackendDXContext->cQuery; ++i)
6396 D3D_RELEASE(pBackendDXContext->papQuery[i]);
6397 }
6398
6399 rc = dxCOTableRealloc((void **)&pBackendDXContext->papQuery, &pBackendDXContext->cQuery,
6400 sizeof(pBackendDXContext->papQuery[0]), pDXContext->cot.cQuery, cValidEntries);
6401 AssertRCBreak(rc);
6402
6403 for (uint32_t i = 0; i < cValidEntries; ++i)
6404 {
6405 SVGACOTableDXQueryEntry const *pEntry = &pDXContext->cot.paQuery[i];
6406 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
6407 continue; /* Skip uninitialized entry. */
6408
6409 AssertFailed(); /** @todo implement */
6410 }
6411 break;
6412 case SVGA_COTABLE_DXSHADER:
6413 if (pBackendDXContext->paShader)
6414 {
6415 /* Destroy the no longer used entries. */
6416 for (uint32_t i = cValidEntries; i < pBackendDXContext->cShader; ++i)
6417 dxDestroyShader(&pBackendDXContext->paShader[i]);
6418 }
6419
6420 rc = dxCOTableRealloc((void **)&pBackendDXContext->paShader, &pBackendDXContext->cShader,
6421 sizeof(pBackendDXContext->paShader[0]), pDXContext->cot.cShader, cValidEntries);
6422 AssertRCBreak(rc);
6423
6424 for (uint32_t i = 0; i < cValidEntries; ++i)
6425 {
6426 SVGACOTableDXShaderEntry const *pEntry = &pDXContext->cot.paShader[i];
6427 /** @todo The caller must verify the COTable content using same rules as when a new entry is defined. */
6428 if (ASMMemFirstNonZero(pEntry, sizeof(*pEntry)) == NULL)
6429 continue; /* Skip uninitialized entry. */
6430
6431 /** @todo this should be in the common DX code (the caller). */
6432 PVMSVGA3DSHADER pShader = &pDXContext->paShader[i];
6433 pShader->id = i;
6434 pShader->cid = pDXContext->cid;
6435 pShader->type = pEntry->type;
6436 pShader->cbData = pEntry->sizeInBytes;
6437 pShader->pShaderProgram = NULL;
6438 pShader->u.pvBackendShader = NULL;
6439
6440 dxDefineShader(pDXContext, i, pEntry);
6441 }
6442 break;
6443 case SVGA_COTABLE_UAVIEW:
6444 AssertFailed(); /** @todo Implement */
6445 break;
6446 case SVGA_COTABLE_MAX: break; /* Compiler warning */
6447 }
6448 return rc;
6449}
6450
6451
6452static DECLCALLBACK(int) vmsvga3dBackDXBufferCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6453{
6454 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6455
6456 RT_NOREF(pBackend, pDXContext);
6457 AssertFailed(); /** @todo Implement */
6458 return VERR_NOT_IMPLEMENTED;
6459}
6460
6461
6462static DECLCALLBACK(int) vmsvga3dBackDXSurfaceCopyAndReadback(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6463{
6464 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6465
6466 RT_NOREF(pBackend, pDXContext);
6467 AssertFailed(); /** @todo Implement */
6468 return VERR_NOT_IMPLEMENTED;
6469}
6470
6471
6472static DECLCALLBACK(int) vmsvga3dBackDXMoveQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6473{
6474 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6475
6476 RT_NOREF(pBackend, pDXContext);
6477 AssertFailed(); /** @todo Implement */
6478 return VERR_NOT_IMPLEMENTED;
6479}
6480
6481
6482static DECLCALLBACK(int) vmsvga3dBackDXBindAllQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6483{
6484 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6485
6486 RT_NOREF(pBackend, pDXContext);
6487 AssertFailed(); /** @todo Implement */
6488 return VERR_NOT_IMPLEMENTED;
6489}
6490
6491
6492static DECLCALLBACK(int) vmsvga3dBackDXReadbackAllQuery(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6493{
6494 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6495
6496 RT_NOREF(pBackend, pDXContext);
6497 AssertFailed(); /** @todo Implement */
6498 return VERR_NOT_IMPLEMENTED;
6499}
6500
6501
6502static DECLCALLBACK(int) vmsvga3dBackDXMobFence64(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6503{
6504 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6505
6506 RT_NOREF(pBackend, pDXContext);
6507 AssertFailed(); /** @todo Implement */
6508 return VERR_NOT_IMPLEMENTED;
6509}
6510
6511
6512static DECLCALLBACK(int) vmsvga3dBackDXBindAllShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6513{
6514 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6515
6516 RT_NOREF(pBackend, pDXContext);
6517 AssertFailed(); /** @todo Implement */
6518 return VERR_NOT_IMPLEMENTED;
6519}
6520
6521
6522static DECLCALLBACK(int) vmsvga3dBackDXHint(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6523{
6524 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6525
6526 RT_NOREF(pBackend, pDXContext);
6527 AssertFailed(); /** @todo Implement */
6528 return VERR_NOT_IMPLEMENTED;
6529}
6530
6531
6532static DECLCALLBACK(int) vmsvga3dBackDXBufferUpdate(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6533{
6534 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6535
6536 RT_NOREF(pBackend, pDXContext);
6537 AssertFailed(); /** @todo Implement */
6538 return VERR_NOT_IMPLEMENTED;
6539}
6540
6541
6542static DECLCALLBACK(int) vmsvga3dBackDXSetVSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6543{
6544 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6545
6546 RT_NOREF(pBackend, pDXContext);
6547 AssertFailed(); /** @todo Implement */
6548 return VERR_NOT_IMPLEMENTED;
6549}
6550
6551
6552static DECLCALLBACK(int) vmsvga3dBackDXSetPSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6553{
6554 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6555
6556 RT_NOREF(pBackend, pDXContext);
6557 AssertFailed(); /** @todo Implement */
6558 return VERR_NOT_IMPLEMENTED;
6559}
6560
6561
6562static DECLCALLBACK(int) vmsvga3dBackDXSetGSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6563{
6564 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6565
6566 RT_NOREF(pBackend, pDXContext);
6567 AssertFailed(); /** @todo Implement */
6568 return VERR_NOT_IMPLEMENTED;
6569}
6570
6571
6572static DECLCALLBACK(int) vmsvga3dBackDXSetHSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6573{
6574 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6575
6576 RT_NOREF(pBackend, pDXContext);
6577 AssertFailed(); /** @todo Implement */
6578 return VERR_NOT_IMPLEMENTED;
6579}
6580
6581
6582static DECLCALLBACK(int) vmsvga3dBackDXSetDSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6583{
6584 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6585
6586 RT_NOREF(pBackend, pDXContext);
6587 AssertFailed(); /** @todo Implement */
6588 return VERR_NOT_IMPLEMENTED;
6589}
6590
6591
6592static DECLCALLBACK(int) vmsvga3dBackDXSetCSConstantBufferOffset(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6593{
6594 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6595
6596 RT_NOREF(pBackend, pDXContext);
6597 AssertFailed(); /** @todo Implement */
6598 return VERR_NOT_IMPLEMENTED;
6599}
6600
6601
6602static DECLCALLBACK(int) vmsvga3dBackDXCondBindAllShader(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6603{
6604 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6605
6606 RT_NOREF(pBackend, pDXContext);
6607 AssertFailed(); /** @todo Implement */
6608 return VERR_NOT_IMPLEMENTED;
6609}
6610
6611
6612static DECLCALLBACK(int) vmsvga3dBackScreenCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6613{
6614 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6615
6616 RT_NOREF(pBackend, pDXContext);
6617 AssertFailed(); /** @todo Implement */
6618 return VERR_NOT_IMPLEMENTED;
6619}
6620
6621
6622static DECLCALLBACK(int) vmsvga3dBackGrowOTable(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6623{
6624 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6625
6626 RT_NOREF(pBackend, pDXContext);
6627 AssertFailed(); /** @todo Implement */
6628 return VERR_NOT_IMPLEMENTED;
6629}
6630
6631
6632static DECLCALLBACK(int) vmsvga3dBackDXGrowCOTable(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6633{
6634 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6635
6636 RT_NOREF(pBackend, pDXContext);
6637 AssertFailed(); /** @todo Implement */
6638 return VERR_NOT_IMPLEMENTED;
6639}
6640
6641
6642static DECLCALLBACK(int) vmsvga3dBackIntraSurfaceCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6643{
6644 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6645
6646 RT_NOREF(pBackend, pDXContext);
6647 AssertFailed(); /** @todo Implement */
6648 return VERR_NOT_IMPLEMENTED;
6649}
6650
6651
6652static DECLCALLBACK(int) vmsvga3dBackDefineGBSurface_v3(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6653{
6654 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6655
6656 RT_NOREF(pBackend, pDXContext);
6657 AssertFailed(); /** @todo Implement */
6658 return VERR_NOT_IMPLEMENTED;
6659}
6660
6661
6662static DECLCALLBACK(int) vmsvga3dBackDXResolveCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6663{
6664 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6665
6666 RT_NOREF(pBackend, pDXContext);
6667 AssertFailed(); /** @todo Implement */
6668 return VERR_NOT_IMPLEMENTED;
6669}
6670
6671
6672static DECLCALLBACK(int) vmsvga3dBackDXPredResolveCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6673{
6674 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6675
6676 RT_NOREF(pBackend, pDXContext);
6677 AssertFailed(); /** @todo Implement */
6678 return VERR_NOT_IMPLEMENTED;
6679}
6680
6681
6682static DECLCALLBACK(int) vmsvga3dBackDXPredConvertRegion(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6683{
6684 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6685
6686 RT_NOREF(pBackend, pDXContext);
6687 AssertFailed(); /** @todo Implement */
6688 return VERR_NOT_IMPLEMENTED;
6689}
6690
6691
6692static DECLCALLBACK(int) vmsvga3dBackDXPredConvert(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6693{
6694 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6695
6696 RT_NOREF(pBackend, pDXContext);
6697 AssertFailed(); /** @todo Implement */
6698 return VERR_NOT_IMPLEMENTED;
6699}
6700
6701
6702static DECLCALLBACK(int) vmsvga3dBackWholeSurfaceCopy(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6703{
6704 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6705
6706 RT_NOREF(pBackend, pDXContext);
6707 AssertFailed(); /** @todo Implement */
6708 return VERR_NOT_IMPLEMENTED;
6709}
6710
6711
6712static DECLCALLBACK(int) vmsvga3dBackDXDefineUAView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6713{
6714 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6715
6716 RT_NOREF(pBackend, pDXContext);
6717 AssertFailed(); /** @todo Implement */
6718 return VERR_NOT_IMPLEMENTED;
6719}
6720
6721
6722static DECLCALLBACK(int) vmsvga3dBackDXDestroyUAView(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6723{
6724 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6725
6726 RT_NOREF(pBackend, pDXContext);
6727 AssertFailed(); /** @todo Implement */
6728 return VERR_NOT_IMPLEMENTED;
6729}
6730
6731
6732static DECLCALLBACK(int) vmsvga3dBackDXClearUAViewUint(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6733{
6734 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6735
6736 RT_NOREF(pBackend, pDXContext);
6737 AssertFailed(); /** @todo Implement */
6738 return VERR_NOT_IMPLEMENTED;
6739}
6740
6741
6742static DECLCALLBACK(int) vmsvga3dBackDXClearUAViewFloat(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6743{
6744 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6745
6746 RT_NOREF(pBackend, pDXContext);
6747 AssertFailed(); /** @todo Implement */
6748 return VERR_NOT_IMPLEMENTED;
6749}
6750
6751
6752static DECLCALLBACK(int) vmsvga3dBackDXCopyStructureCount(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6753{
6754 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6755
6756 RT_NOREF(pBackend, pDXContext);
6757 AssertFailed(); /** @todo Implement */
6758 return VERR_NOT_IMPLEMENTED;
6759}
6760
6761
6762static DECLCALLBACK(int) vmsvga3dBackDXSetUAViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6763{
6764 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6765
6766 RT_NOREF(pBackend, pDXContext);
6767 AssertFailed(); /** @todo Implement */
6768 return VERR_NOT_IMPLEMENTED;
6769}
6770
6771
6772static DECLCALLBACK(int) vmsvga3dBackDXDrawIndexedInstancedIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6773{
6774 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6775
6776 RT_NOREF(pBackend, pDXContext);
6777 AssertFailed(); /** @todo Implement */
6778 return VERR_NOT_IMPLEMENTED;
6779}
6780
6781
6782static DECLCALLBACK(int) vmsvga3dBackDXDrawInstancedIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6783{
6784 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6785
6786 RT_NOREF(pBackend, pDXContext);
6787 AssertFailed(); /** @todo Implement */
6788 return VERR_NOT_IMPLEMENTED;
6789}
6790
6791
6792static DECLCALLBACK(int) vmsvga3dBackDXDispatch(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6793{
6794 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6795
6796 RT_NOREF(pBackend, pDXContext);
6797 AssertFailed(); /** @todo Implement */
6798 return VERR_NOT_IMPLEMENTED;
6799}
6800
6801
6802static DECLCALLBACK(int) vmsvga3dBackDXDispatchIndirect(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6803{
6804 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6805
6806 RT_NOREF(pBackend, pDXContext);
6807 AssertFailed(); /** @todo Implement */
6808 return VERR_NOT_IMPLEMENTED;
6809}
6810
6811
6812static DECLCALLBACK(int) vmsvga3dBackWriteZeroSurface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6813{
6814 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6815
6816 RT_NOREF(pBackend, pDXContext);
6817 AssertFailed(); /** @todo Implement */
6818 return VERR_NOT_IMPLEMENTED;
6819}
6820
6821
6822static DECLCALLBACK(int) vmsvga3dBackHintZeroSurface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6823{
6824 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6825
6826 RT_NOREF(pBackend, pDXContext);
6827 AssertFailed(); /** @todo Implement */
6828 return VERR_NOT_IMPLEMENTED;
6829}
6830
6831
6832static DECLCALLBACK(int) vmsvga3dBackDXTransferToBuffer(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6833{
6834 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6835
6836 RT_NOREF(pBackend, pDXContext);
6837 AssertFailed(); /** @todo Implement */
6838 return VERR_NOT_IMPLEMENTED;
6839}
6840
6841
6842static DECLCALLBACK(int) vmsvga3dBackDXSetStructureCount(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6843{
6844 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6845
6846 RT_NOREF(pBackend, pDXContext);
6847 AssertFailed(); /** @todo Implement */
6848 return VERR_NOT_IMPLEMENTED;
6849}
6850
6851
6852static DECLCALLBACK(int) vmsvga3dBackLogicOpsBitBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6853{
6854 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6855
6856 RT_NOREF(pBackend, pDXContext);
6857 AssertFailed(); /** @todo Implement */
6858 return VERR_NOT_IMPLEMENTED;
6859}
6860
6861
6862static DECLCALLBACK(int) vmsvga3dBackLogicOpsTransBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6863{
6864 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6865
6866 RT_NOREF(pBackend, pDXContext);
6867 AssertFailed(); /** @todo Implement */
6868 return VERR_NOT_IMPLEMENTED;
6869}
6870
6871
6872static DECLCALLBACK(int) vmsvga3dBackLogicOpsStretchBlt(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6873{
6874 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6875
6876 RT_NOREF(pBackend, pDXContext);
6877 AssertFailed(); /** @todo Implement */
6878 return VERR_NOT_IMPLEMENTED;
6879}
6880
6881
6882static DECLCALLBACK(int) vmsvga3dBackLogicOpsColorFill(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6883{
6884 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6885
6886 RT_NOREF(pBackend, pDXContext);
6887 AssertFailed(); /** @todo Implement */
6888 return VERR_NOT_IMPLEMENTED;
6889}
6890
6891
6892static DECLCALLBACK(int) vmsvga3dBackLogicOpsAlphaBlend(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6893{
6894 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6895
6896 RT_NOREF(pBackend, pDXContext);
6897 AssertFailed(); /** @todo Implement */
6898 return VERR_NOT_IMPLEMENTED;
6899}
6900
6901
6902static DECLCALLBACK(int) vmsvga3dBackLogicOpsClearTypeBlend(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6903{
6904 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6905
6906 RT_NOREF(pBackend, pDXContext);
6907 AssertFailed(); /** @todo Implement */
6908 return VERR_NOT_IMPLEMENTED;
6909}
6910
6911
6912static DECLCALLBACK(int) vmsvga3dBackDefineGBSurface_v4(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6913{
6914 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6915
6916 RT_NOREF(pBackend, pDXContext);
6917 AssertFailed(); /** @todo Implement */
6918 return VERR_NOT_IMPLEMENTED;
6919}
6920
6921
6922static DECLCALLBACK(int) vmsvga3dBackDXSetCSUAViews(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6923{
6924 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6925
6926 RT_NOREF(pBackend, pDXContext);
6927 AssertFailed(); /** @todo Implement */
6928 return VERR_NOT_IMPLEMENTED;
6929}
6930
6931
6932static DECLCALLBACK(int) vmsvga3dBackDXSetMinLOD(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6933{
6934 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6935
6936 RT_NOREF(pBackend, pDXContext);
6937 AssertFailed(); /** @todo Implement */
6938 return VERR_NOT_IMPLEMENTED;
6939}
6940
6941
6942static DECLCALLBACK(int) vmsvga3dBackDXDefineStreamOutputWithMob(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6943{
6944 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6945
6946 RT_NOREF(pBackend, pDXContext);
6947 AssertFailed(); /** @todo Implement */
6948 return VERR_NOT_IMPLEMENTED;
6949}
6950
6951
6952static DECLCALLBACK(int) vmsvga3dBackDXSetShaderIface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6953{
6954 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6955
6956 RT_NOREF(pBackend, pDXContext);
6957 AssertFailed(); /** @todo Implement */
6958 return VERR_NOT_IMPLEMENTED;
6959}
6960
6961
6962static DECLCALLBACK(int) vmsvga3dBackDXBindStreamOutput(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6963{
6964 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6965
6966 RT_NOREF(pBackend, pDXContext);
6967 AssertFailed(); /** @todo Implement */
6968 return VERR_NOT_IMPLEMENTED;
6969}
6970
6971
6972static DECLCALLBACK(int) vmsvga3dBackSurfaceStretchBltNonMSToMS(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6973{
6974 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6975
6976 RT_NOREF(pBackend, pDXContext);
6977 AssertFailed(); /** @todo Implement */
6978 return VERR_NOT_IMPLEMENTED;
6979}
6980
6981
6982static DECLCALLBACK(int) vmsvga3dBackDXBindShaderIface(PVGASTATECC pThisCC, PVMSVGA3DDXCONTEXT pDXContext)
6983{
6984 PVMSVGA3DBACKEND pBackend = pThisCC->svga.p3dState->pBackend;
6985
6986 RT_NOREF(pBackend, pDXContext);
6987 AssertFailed(); /** @todo Implement */
6988 return VERR_NOT_IMPLEMENTED;
6989}
6990
6991
6992static DECLCALLBACK(int) vmsvga3dBackQueryInterface(PVGASTATECC pThisCC, char const *pszInterfaceName, void *pvInterfaceFuncs, size_t cbInterfaceFuncs)
6993{
6994 RT_NOREF(pThisCC);
6995
6996 int rc = VINF_SUCCESS;
6997 if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_DX) == 0)
6998 {
6999 if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSDX))
7000 {
7001 if (pvInterfaceFuncs)
7002 {
7003 VMSVGA3DBACKENDFUNCSDX *p = (VMSVGA3DBACKENDFUNCSDX *)pvInterfaceFuncs;
7004 p->pfnDXDefineContext = vmsvga3dBackDXDefineContext;
7005 p->pfnDXDestroyContext = vmsvga3dBackDXDestroyContext;
7006 p->pfnDXBindContext = vmsvga3dBackDXBindContext;
7007 p->pfnDXReadbackContext = vmsvga3dBackDXReadbackContext;
7008 p->pfnDXInvalidateContext = vmsvga3dBackDXInvalidateContext;
7009 p->pfnDXSetSingleConstantBuffer = vmsvga3dBackDXSetSingleConstantBuffer;
7010 p->pfnDXSetShaderResources = vmsvga3dBackDXSetShaderResources;
7011 p->pfnDXSetShader = vmsvga3dBackDXSetShader;
7012 p->pfnDXSetSamplers = vmsvga3dBackDXSetSamplers;
7013 p->pfnDXDraw = vmsvga3dBackDXDraw;
7014 p->pfnDXDrawIndexed = vmsvga3dBackDXDrawIndexed;
7015 p->pfnDXDrawInstanced = vmsvga3dBackDXDrawInstanced;
7016 p->pfnDXDrawIndexedInstanced = vmsvga3dBackDXDrawIndexedInstanced;
7017 p->pfnDXDrawAuto = vmsvga3dBackDXDrawAuto;
7018 p->pfnDXSetInputLayout = vmsvga3dBackDXSetInputLayout;
7019 p->pfnDXSetVertexBuffers = vmsvga3dBackDXSetVertexBuffers;
7020 p->pfnDXSetIndexBuffer = vmsvga3dBackDXSetIndexBuffer;
7021 p->pfnDXSetTopology = vmsvga3dBackDXSetTopology;
7022 p->pfnDXSetRenderTargets = vmsvga3dBackDXSetRenderTargets;
7023 p->pfnDXSetBlendState = vmsvga3dBackDXSetBlendState;
7024 p->pfnDXSetDepthStencilState = vmsvga3dBackDXSetDepthStencilState;
7025 p->pfnDXSetRasterizerState = vmsvga3dBackDXSetRasterizerState;
7026 p->pfnDXDefineQuery = vmsvga3dBackDXDefineQuery;
7027 p->pfnDXDestroyQuery = vmsvga3dBackDXDestroyQuery;
7028 p->pfnDXBindQuery = vmsvga3dBackDXBindQuery;
7029 p->pfnDXSetQueryOffset = vmsvga3dBackDXSetQueryOffset;
7030 p->pfnDXBeginQuery = vmsvga3dBackDXBeginQuery;
7031 p->pfnDXEndQuery = vmsvga3dBackDXEndQuery;
7032 p->pfnDXReadbackQuery = vmsvga3dBackDXReadbackQuery;
7033 p->pfnDXSetPredication = vmsvga3dBackDXSetPredication;
7034 p->pfnDXSetSOTargets = vmsvga3dBackDXSetSOTargets;
7035 p->pfnDXSetViewports = vmsvga3dBackDXSetViewports;
7036 p->pfnDXSetScissorRects = vmsvga3dBackDXSetScissorRects;
7037 p->pfnDXClearRenderTargetView = vmsvga3dBackDXClearRenderTargetView;
7038 p->pfnDXClearDepthStencilView = vmsvga3dBackDXClearDepthStencilView;
7039 p->pfnDXPredCopyRegion = vmsvga3dBackDXPredCopyRegion;
7040 p->pfnDXPredCopy = vmsvga3dBackDXPredCopy;
7041 p->pfnDXPresentBlt = vmsvga3dBackDXPresentBlt;
7042 p->pfnDXGenMips = vmsvga3dBackDXGenMips;
7043 p->pfnDXDefineShaderResourceView = vmsvga3dBackDXDefineShaderResourceView;
7044 p->pfnDXDestroyShaderResourceView = vmsvga3dBackDXDestroyShaderResourceView;
7045 p->pfnDXDefineRenderTargetView = vmsvga3dBackDXDefineRenderTargetView;
7046 p->pfnDXDestroyRenderTargetView = vmsvga3dBackDXDestroyRenderTargetView;
7047 p->pfnDXDefineDepthStencilView = vmsvga3dBackDXDefineDepthStencilView;
7048 p->pfnDXDestroyDepthStencilView = vmsvga3dBackDXDestroyDepthStencilView;
7049 p->pfnDXDefineElementLayout = vmsvga3dBackDXDefineElementLayout;
7050 p->pfnDXDestroyElementLayout = vmsvga3dBackDXDestroyElementLayout;
7051 p->pfnDXDefineBlendState = vmsvga3dBackDXDefineBlendState;
7052 p->pfnDXDestroyBlendState = vmsvga3dBackDXDestroyBlendState;
7053 p->pfnDXDefineDepthStencilState = vmsvga3dBackDXDefineDepthStencilState;
7054 p->pfnDXDestroyDepthStencilState = vmsvga3dBackDXDestroyDepthStencilState;
7055 p->pfnDXDefineRasterizerState = vmsvga3dBackDXDefineRasterizerState;
7056 p->pfnDXDestroyRasterizerState = vmsvga3dBackDXDestroyRasterizerState;
7057 p->pfnDXDefineSamplerState = vmsvga3dBackDXDefineSamplerState;
7058 p->pfnDXDestroySamplerState = vmsvga3dBackDXDestroySamplerState;
7059 p->pfnDXDefineShader = vmsvga3dBackDXDefineShader;
7060 p->pfnDXDestroyShader = vmsvga3dBackDXDestroyShader;
7061 p->pfnDXBindShader = vmsvga3dBackDXBindShader;
7062 p->pfnDXDefineStreamOutput = vmsvga3dBackDXDefineStreamOutput;
7063 p->pfnDXDestroyStreamOutput = vmsvga3dBackDXDestroyStreamOutput;
7064 p->pfnDXSetStreamOutput = vmsvga3dBackDXSetStreamOutput;
7065 p->pfnDXSetCOTable = vmsvga3dBackDXSetCOTable;
7066 p->pfnDXBufferCopy = vmsvga3dBackDXBufferCopy;
7067 p->pfnDXSurfaceCopyAndReadback = vmsvga3dBackDXSurfaceCopyAndReadback;
7068 p->pfnDXMoveQuery = vmsvga3dBackDXMoveQuery;
7069 p->pfnDXBindAllQuery = vmsvga3dBackDXBindAllQuery;
7070 p->pfnDXReadbackAllQuery = vmsvga3dBackDXReadbackAllQuery;
7071 p->pfnDXMobFence64 = vmsvga3dBackDXMobFence64;
7072 p->pfnDXBindAllShader = vmsvga3dBackDXBindAllShader;
7073 p->pfnDXHint = vmsvga3dBackDXHint;
7074 p->pfnDXBufferUpdate = vmsvga3dBackDXBufferUpdate;
7075 p->pfnDXSetVSConstantBufferOffset = vmsvga3dBackDXSetVSConstantBufferOffset;
7076 p->pfnDXSetPSConstantBufferOffset = vmsvga3dBackDXSetPSConstantBufferOffset;
7077 p->pfnDXSetGSConstantBufferOffset = vmsvga3dBackDXSetGSConstantBufferOffset;
7078 p->pfnDXSetHSConstantBufferOffset = vmsvga3dBackDXSetHSConstantBufferOffset;
7079 p->pfnDXSetDSConstantBufferOffset = vmsvga3dBackDXSetDSConstantBufferOffset;
7080 p->pfnDXSetCSConstantBufferOffset = vmsvga3dBackDXSetCSConstantBufferOffset;
7081 p->pfnDXCondBindAllShader = vmsvga3dBackDXCondBindAllShader;
7082 p->pfnScreenCopy = vmsvga3dBackScreenCopy;
7083 p->pfnGrowOTable = vmsvga3dBackGrowOTable;
7084 p->pfnDXGrowCOTable = vmsvga3dBackDXGrowCOTable;
7085 p->pfnIntraSurfaceCopy = vmsvga3dBackIntraSurfaceCopy;
7086 p->pfnDefineGBSurface_v3 = vmsvga3dBackDefineGBSurface_v3;
7087 p->pfnDXResolveCopy = vmsvga3dBackDXResolveCopy;
7088 p->pfnDXPredResolveCopy = vmsvga3dBackDXPredResolveCopy;
7089 p->pfnDXPredConvertRegion = vmsvga3dBackDXPredConvertRegion;
7090 p->pfnDXPredConvert = vmsvga3dBackDXPredConvert;
7091 p->pfnWholeSurfaceCopy = vmsvga3dBackWholeSurfaceCopy;
7092 p->pfnDXDefineUAView = vmsvga3dBackDXDefineUAView;
7093 p->pfnDXDestroyUAView = vmsvga3dBackDXDestroyUAView;
7094 p->pfnDXClearUAViewUint = vmsvga3dBackDXClearUAViewUint;
7095 p->pfnDXClearUAViewFloat = vmsvga3dBackDXClearUAViewFloat;
7096 p->pfnDXCopyStructureCount = vmsvga3dBackDXCopyStructureCount;
7097 p->pfnDXSetUAViews = vmsvga3dBackDXSetUAViews;
7098 p->pfnDXDrawIndexedInstancedIndirect = vmsvga3dBackDXDrawIndexedInstancedIndirect;
7099 p->pfnDXDrawInstancedIndirect = vmsvga3dBackDXDrawInstancedIndirect;
7100 p->pfnDXDispatch = vmsvga3dBackDXDispatch;
7101 p->pfnDXDispatchIndirect = vmsvga3dBackDXDispatchIndirect;
7102 p->pfnWriteZeroSurface = vmsvga3dBackWriteZeroSurface;
7103 p->pfnHintZeroSurface = vmsvga3dBackHintZeroSurface;
7104 p->pfnDXTransferToBuffer = vmsvga3dBackDXTransferToBuffer;
7105 p->pfnDXSetStructureCount = vmsvga3dBackDXSetStructureCount;
7106 p->pfnLogicOpsBitBlt = vmsvga3dBackLogicOpsBitBlt;
7107 p->pfnLogicOpsTransBlt = vmsvga3dBackLogicOpsTransBlt;
7108 p->pfnLogicOpsStretchBlt = vmsvga3dBackLogicOpsStretchBlt;
7109 p->pfnLogicOpsColorFill = vmsvga3dBackLogicOpsColorFill;
7110 p->pfnLogicOpsAlphaBlend = vmsvga3dBackLogicOpsAlphaBlend;
7111 p->pfnLogicOpsClearTypeBlend = vmsvga3dBackLogicOpsClearTypeBlend;
7112 p->pfnDefineGBSurface_v4 = vmsvga3dBackDefineGBSurface_v4;
7113 p->pfnDXSetCSUAViews = vmsvga3dBackDXSetCSUAViews;
7114 p->pfnDXSetMinLOD = vmsvga3dBackDXSetMinLOD;
7115 p->pfnDXDefineStreamOutputWithMob = vmsvga3dBackDXDefineStreamOutputWithMob;
7116 p->pfnDXSetShaderIface = vmsvga3dBackDXSetShaderIface;
7117 p->pfnDXBindStreamOutput = vmsvga3dBackDXBindStreamOutput;
7118 p->pfnSurfaceStretchBltNonMSToMS = vmsvga3dBackSurfaceStretchBltNonMSToMS;
7119 p->pfnDXBindShaderIface = vmsvga3dBackDXBindShaderIface;
7120 }
7121 }
7122 else
7123 {
7124 AssertFailed();
7125 rc = VERR_INVALID_PARAMETER;
7126 }
7127 }
7128 else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_MAP) == 0)
7129 {
7130 if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSMAP))
7131 {
7132 if (pvInterfaceFuncs)
7133 {
7134 VMSVGA3DBACKENDFUNCSMAP *p = (VMSVGA3DBACKENDFUNCSMAP *)pvInterfaceFuncs;
7135 p->pfnSurfaceMap = vmsvga3dBackSurfaceMap;
7136 p->pfnSurfaceUnmap = vmsvga3dBackSurfaceUnmap;
7137 }
7138 }
7139 else
7140 {
7141 AssertFailed();
7142 rc = VERR_INVALID_PARAMETER;
7143 }
7144 }
7145 else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_GBO) == 0)
7146 {
7147 if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCSGBO))
7148 {
7149 if (pvInterfaceFuncs)
7150 {
7151 VMSVGA3DBACKENDFUNCSGBO *p = (VMSVGA3DBACKENDFUNCSGBO *)pvInterfaceFuncs;
7152 p->pfnScreenTargetBind = vmsvga3dScreenTargetBind;
7153 p->pfnScreenTargetUpdate = vmsvga3dScreenTargetUpdate;
7154 }
7155 }
7156 else
7157 {
7158 AssertFailed();
7159 rc = VERR_INVALID_PARAMETER;
7160 }
7161 }
7162 else if (RTStrCmp(pszInterfaceName, VMSVGA3D_BACKEND_INTERFACE_NAME_3D) == 0)
7163 {
7164 if (cbInterfaceFuncs == sizeof(VMSVGA3DBACKENDFUNCS3D))
7165 {
7166 if (pvInterfaceFuncs)
7167 {
7168 VMSVGA3DBACKENDFUNCS3D *p = (VMSVGA3DBACKENDFUNCS3D *)pvInterfaceFuncs;
7169 p->pfnInit = vmsvga3dBackInit;
7170 p->pfnPowerOn = vmsvga3dBackPowerOn;
7171 p->pfnTerminate = vmsvga3dBackTerminate;
7172 p->pfnReset = vmsvga3dBackReset;
7173 p->pfnQueryCaps = vmsvga3dBackQueryCaps;
7174 p->pfnChangeMode = vmsvga3dBackChangeMode;
7175 p->pfnCreateTexture = vmsvga3dBackCreateTexture;
7176 p->pfnSurfaceDestroy = vmsvga3dBackSurfaceDestroy;
7177 p->pfnSurfaceCopy = vmsvga3dBackSurfaceCopy;
7178 p->pfnSurfaceDMACopyBox = vmsvga3dBackSurfaceDMACopyBox;
7179 p->pfnSurfaceStretchBlt = vmsvga3dBackSurfaceStretchBlt;
7180 p->pfnUpdateHostScreenViewport = vmsvga3dBackUpdateHostScreenViewport;
7181 p->pfnDefineScreen = vmsvga3dBackDefineScreen;
7182 p->pfnDestroyScreen = vmsvga3dBackDestroyScreen;
7183 p->pfnSurfaceBlitToScreen = vmsvga3dBackSurfaceBlitToScreen;
7184 p->pfnSurfaceUpdateHeapBuffers = vmsvga3dBackSurfaceUpdateHeapBuffers;
7185 }
7186 }
7187 else
7188 {
7189 AssertFailed();
7190 rc = VERR_INVALID_PARAMETER;
7191 }
7192 }
7193 else
7194 rc = VERR_NOT_IMPLEMENTED;
7195 return rc;
7196}
7197
7198
7199extern VMSVGA3DBACKENDDESC const g_BackendDX =
7200{
7201 "DX",
7202 vmsvga3dBackQueryInterface
7203};
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