DevVGA-SVGA3d.cpp@ 84677

Last change on this file since 84677 was 83559, checked in by vboxsync, 5 years ago
DevVGA-SVGA3d.cpp: Use RTMemFreeZ on surface data. bugref:9698
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1	/* $Id: DevVGA-SVGA3d.cpp 83559 2020-04-04 23:50:05Z vboxsync $ */
2	/** @file
3	* DevSVGA3d - VMWare SVGA device, 3D parts - Common core code.
4	*/
5
6	/*
7	* Copyright (C) 2013-2020 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18
19	/*********************************************************************************************************************************
20	* Header Files *
21	*********************************************************************************************************************************/
22	#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
23	#include <VBox/vmm/pdmdev.h>
24	#include <iprt/errcore.h>
25	#include <VBox/log.h>
26
27	#include <iprt/assert.h>
28	#include <iprt/mem.h>
29
30	#include <VBox/vmm/pgm.h> /* required by DevVGA.h */
31	#include <VBoxVideo.h> /* required by DevVGA.h */
32
33	/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
34	#include "DevVGA.h"
35
36	#include "DevVGA-SVGA.h"
37	#include "DevVGA-SVGA3d.h"
38	#define VMSVGA3D_INCL_STRUCTURE_DESCRIPTORS
39	#include "DevVGA-SVGA3d-internal.h"
40
41
42
43	/**
44	* Implements the SVGA_3D_CMD_SURFACE_DEFINE_V2 and SVGA_3D_CMD_SURFACE_DEFINE
45	* commands (fifo).
46	*
47	* @returns VBox status code (currently ignored).
48	* @param pThisCC The VGA/VMSVGA state for ring-3.
49	* @param sid The ID of the surface to (re-)define.
50	* @param surfaceFlags .
51	* @param format .
52	* @param face .
53	* @param multisampleCount .
54	* @param autogenFilter .
55	* @param cMipLevels .
56	* @param paMipLevelSizes .
57	*/
58	int vmsvga3dSurfaceDefine(PVGASTATECC pThisCC, uint32_t sid, uint32_t surfaceFlags, SVGA3dSurfaceFormat format,
59	SVGA3dSurfaceFace face[SVGA3D_MAX_SURFACE_FACES], uint32_t multisampleCount,
60	SVGA3dTextureFilter autogenFilter, uint32_t cMipLevels, SVGA3dSize *paMipLevelSizes)
61	{
62	PVMSVGA3DSURFACE pSurface;
63	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
64	AssertReturn(pState, VERR_NO_MEMORY);
65
66	Log(("vmsvga3dSurfaceDefine: sid=%u surfaceFlags=%x format=%s (%x) multiSampleCount=%d autogenFilter=%d, cMipLevels=%d size=(%d,%d,%d)\n",
67	sid, surfaceFlags, vmsvgaLookupEnum((int)format, &g_SVGA3dSurfaceFormat2String), format, multisampleCount, autogenFilter,
68	cMipLevels, paMipLevelSizes->width, paMipLevelSizes->height, paMipLevelSizes->depth));
69
70	AssertReturn(sid < SVGA3D_MAX_SURFACE_IDS, VERR_INVALID_PARAMETER);
71	AssertReturn(cMipLevels >= 1, VERR_INVALID_PARAMETER);
72
73	/* Number of faces (cFaces) is specified as the number of the first non-zero elements in the 'face' array.
74	* Since only plain surfaces (cFaces == 1) and cubemaps (cFaces == 6) are supported
75	* (see also SVGA3dCmdDefineSurface definition in svga3d_reg.h), we ignore anything else.
76	*/
77	uint32_t cRemainingMipLevels = cMipLevels;
78	uint32_t cFaces = 0;
79	for (uint32_t i = 0; i < SVGA3D_MAX_SURFACE_FACES; ++i)
80	{
81	if (face[i].numMipLevels == 0)
82	break;
83
84	/* All SVGA3dSurfaceFace structures must have the same value of numMipLevels field */
85	AssertReturn(face[i].numMipLevels == face[0].numMipLevels, VERR_INVALID_PARAMETER);
86
87	/* numMipLevels value can't be greater than the number of remaining elements in the paMipLevelSizes array. */
88	AssertReturn(face[i].numMipLevels <= cRemainingMipLevels, VERR_INVALID_PARAMETER);
89	cRemainingMipLevels -= face[i].numMipLevels;
90
91	++cFaces;
92	}
93	for (uint32_t i = cFaces; i < SVGA3D_MAX_SURFACE_FACES; ++i)
94	AssertReturn(face[i].numMipLevels == 0, VERR_INVALID_PARAMETER);
95
96	/* cFaces must be 6 for a cubemap and 1 otherwise. */
97	AssertReturn(cFaces == (uint32_t)((surfaceFlags & SVGA3D_SURFACE_CUBEMAP) ? 6 : 1), VERR_INVALID_PARAMETER);
98
99	/* Sum of face[i].numMipLevels must be equal to cMipLevels. */
100	AssertReturn(cRemainingMipLevels == 0, VERR_INVALID_PARAMETER);
101
102	if (sid >= pState->cSurfaces)
103	{
104	/* Grow the array. */
105	uint32_t cNew = RT_ALIGN(sid + 15, 16);
106	void pvNew = RTMemRealloc(pState->papSurfaces, sizeof(pState->papSurfaces[0]) cNew);
107	AssertReturn(pvNew, VERR_NO_MEMORY);
108	pState->papSurfaces = (PVMSVGA3DSURFACE *)pvNew;
109	while (pState->cSurfaces < cNew)
110	{
111	pSurface = (PVMSVGA3DSURFACE)RTMemAllocZ(sizeof(*pSurface));
112	AssertReturn(pSurface, VERR_NO_MEMORY);
113	pSurface->id = SVGA3D_INVALID_ID;
114	pState->papSurfaces[pState->cSurfaces++] = pSurface;
115	}
116	}
117	pSurface = pState->papSurfaces[sid];
118
119	/* If one already exists with this id, then destroy it now. */
120	if (pSurface->id != SVGA3D_INVALID_ID)
121	vmsvga3dSurfaceDestroy(pThisCC, sid);
122
123	RT_ZERO(*pSurface);
124	pSurface->id = sid;
125	#ifdef VMSVGA3D_OPENGL
126	pSurface->idWeakContextAssociation = SVGA3D_INVALID_ID;
127	pSurface->oglId.buffer = OPENGL_INVALID_ID;
128	#else /* VMSVGA3D_DIRECT3D */
129	pSurface->idAssociatedContext = SVGA3D_INVALID_ID;
130	pSurface->hSharedObject = NULL;
131	pSurface->pSharedObjectTree = NULL;
132	#endif
133
134	/* The surface type is sort of undefined now, even though the hints and format can help to clear that up.
135	* In some case we'll have to wait until the surface is used to create the D3D object.
136	*/
137	switch (format)
138	{
139	case SVGA3D_Z_D32:
140	case SVGA3D_Z_D16:
141	case SVGA3D_Z_D24S8:
142	case SVGA3D_Z_D15S1:
143	case SVGA3D_Z_D24X8:
144	case SVGA3D_Z_DF16:
145	case SVGA3D_Z_DF24:
146	case SVGA3D_Z_D24S8_INT:
147	surfaceFlags \|= SVGA3D_SURFACE_HINT_DEPTHSTENCIL;
148	break;
149
150	/* Texture compression formats */
151	case SVGA3D_DXT1:
152	case SVGA3D_DXT2:
153	case SVGA3D_DXT3:
154	case SVGA3D_DXT4:
155	case SVGA3D_DXT5:
156	/* Bump-map formats */
157	case SVGA3D_BUMPU8V8:
158	case SVGA3D_BUMPL6V5U5:
159	case SVGA3D_BUMPX8L8V8U8:
160	case SVGA3D_BUMPL8V8U8:
161	case SVGA3D_V8U8:
162	case SVGA3D_Q8W8V8U8:
163	case SVGA3D_CxV8U8:
164	case SVGA3D_X8L8V8U8:
165	case SVGA3D_A2W10V10U10:
166	case SVGA3D_V16U16:
167	/* Typical render target formats; we should allow render target buffers to be used as textures. */
168	case SVGA3D_X8R8G8B8:
169	case SVGA3D_A8R8G8B8:
170	case SVGA3D_R5G6B5:
171	case SVGA3D_X1R5G5B5:
172	case SVGA3D_A1R5G5B5:
173	case SVGA3D_A4R4G4B4:
174	surfaceFlags \|= SVGA3D_SURFACE_HINT_TEXTURE;
175	break;
176
177	case SVGA3D_LUMINANCE8:
178	case SVGA3D_LUMINANCE4_ALPHA4:
179	case SVGA3D_LUMINANCE16:
180	case SVGA3D_LUMINANCE8_ALPHA8:
181	case SVGA3D_ARGB_S10E5: /* 16-bit floating-point ARGB */
182	case SVGA3D_ARGB_S23E8: /* 32-bit floating-point ARGB */
183	case SVGA3D_A2R10G10B10:
184	case SVGA3D_ALPHA8:
185	case SVGA3D_R_S10E5:
186	case SVGA3D_R_S23E8:
187	case SVGA3D_RG_S10E5:
188	case SVGA3D_RG_S23E8:
189	case SVGA3D_G16R16:
190	case SVGA3D_A16B16G16R16:
191	case SVGA3D_UYVY:
192	case SVGA3D_YUY2:
193	case SVGA3D_NV12:
194	case SVGA3D_AYUV:
195	case SVGA3D_BC4_UNORM:
196	case SVGA3D_BC5_UNORM:
197	break;
198
199	/*
200	* Any surface can be used as a buffer object, but SVGA3D_BUFFER is
201	* the most efficient format to use when creating new surfaces
202	* expressly for index or vertex data.
203	*/
204	case SVGA3D_BUFFER:
205	break;
206
207	default:
208	break;
209	}
210
211	pSurface->surfaceFlags = surfaceFlags;
212	pSurface->format = format;
213	memcpy(pSurface->faces, face, sizeof(pSurface->faces));
214	pSurface->cFaces = cFaces;
215	pSurface->multiSampleCount = multisampleCount;
216	pSurface->autogenFilter = autogenFilter;
217	Assert(autogenFilter != SVGA3D_TEX_FILTER_FLATCUBIC);
218	Assert(autogenFilter != SVGA3D_TEX_FILTER_GAUSSIANCUBIC);
219	pSurface->cMipmapLevels = cMipLevels;
220	pSurface->paMipmapLevels = (PVMSVGA3DMIPMAPLEVEL)RTMemAllocZ(cMipLevels * sizeof(VMSVGA3DMIPMAPLEVEL));
221	AssertReturn(pSurface->paMipmapLevels, VERR_NO_MEMORY);
222
223	for (uint32_t i=0; i < cMipLevels; i++)
224	pSurface->paMipmapLevels[i].mipmapSize = paMipLevelSizes[i];
225
226	pSurface->cbBlock = vmsvga3dSurfaceFormatSize(format, &pSurface->cxBlock, &pSurface->cyBlock);
227	AssertReturn(pSurface->cbBlock, VERR_INVALID_PARAMETER);
228
229	#ifdef VMSVGA3D_DIRECT3D
230	/* Translate the format and usage flags to D3D. */
231	pSurface->d3dfmtRequested = vmsvga3dSurfaceFormat2D3D(format);
232	pSurface->formatD3D = D3D9GetActualFormat(pState, pSurface->d3dfmtRequested);
233	pSurface->multiSampleTypeD3D= vmsvga3dMultipeSampleCount2D3D(multisampleCount);
234	pSurface->fUsageD3D = 0;
235	if (surfaceFlags & SVGA3D_SURFACE_HINT_DYNAMIC)
236	pSurface->fUsageD3D \|= D3DUSAGE_DYNAMIC;
237	if (surfaceFlags & SVGA3D_SURFACE_HINT_RENDERTARGET)
238	pSurface->fUsageD3D \|= D3DUSAGE_RENDERTARGET;
239	if (surfaceFlags & SVGA3D_SURFACE_HINT_DEPTHSTENCIL)
240	pSurface->fUsageD3D \|= D3DUSAGE_DEPTHSTENCIL;
241	if (surfaceFlags & SVGA3D_SURFACE_HINT_WRITEONLY)
242	pSurface->fUsageD3D \|= D3DUSAGE_WRITEONLY;
243	if (surfaceFlags & SVGA3D_SURFACE_AUTOGENMIPMAPS)
244	pSurface->fUsageD3D \|= D3DUSAGE_AUTOGENMIPMAP;
245	pSurface->enmD3DResType = VMSVGA3D_D3DRESTYPE_NONE;
246	/* pSurface->u.pSurface = NULL; */
247	/* pSurface->bounce.pTexture = NULL; */
248	/* pSurface->emulated.pTexture = NULL; */
249	#else
250	/* pSurface->fEmulated = false; */
251	/* pSurface->idEmulated = OPENGL_INVALID_ID; */
252	vmsvga3dSurfaceFormat2OGL(pSurface, format);
253	#endif
254
255	LogFunc(("surface hint(s):%s%s%s%s%s%s\n",
256	(surfaceFlags & SVGA3D_SURFACE_HINT_INDEXBUFFER) ? " SVGA3D_SURFACE_HINT_INDEXBUFFER" : "",
257	(surfaceFlags & SVGA3D_SURFACE_HINT_VERTEXBUFFER) ? " SVGA3D_SURFACE_HINT_VERTEXBUFFER" : "",
258	(surfaceFlags & SVGA3D_SURFACE_HINT_TEXTURE) ? " SVGA3D_SURFACE_HINT_TEXTURE" : "",
259	(surfaceFlags & SVGA3D_SURFACE_HINT_DEPTHSTENCIL) ? " SVGA3D_SURFACE_HINT_DEPTHSTENCIL" : "",
260	(surfaceFlags & SVGA3D_SURFACE_HINT_RENDERTARGET) ? " SVGA3D_SURFACE_HINT_RENDERTARGET" : "",
261	(surfaceFlags & SVGA3D_SURFACE_CUBEMAP) ? " SVGA3D_SURFACE_CUBEMAP" : ""
262	));
263
264	Assert(!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface));
265
266	/* Allocate buffer to hold the surface data until we can move it into a D3D object */
267	uint32_t cbMemRemaining = SVGA3D_MAX_SURFACE_MEM_SIZE; /* Do not allow more than this for a surface. */
268	for (uint32_t i = 0; i < cMipLevels; ++i)
269	{
270	PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
271	LogFunc(("[%d] face %d mip level %d (%d,%d,%d) cbBlock=0x%x block %dx%d\n",
272	i, i / pSurface->faces[0].numMipLevels, i % pSurface->faces[0].numMipLevels,
273	pMipmapLevel->mipmapSize.width, pMipmapLevel->mipmapSize.height, pMipmapLevel->mipmapSize.depth,
274	pSurface->cbBlock, pSurface->cxBlock, pSurface->cyBlock));
275
276	uint32_t cBlocksX;
277	uint32_t cBlocksY;
278	if (RT_LIKELY(pSurface->cxBlock == 1 && pSurface->cyBlock == 1))
279	{
280	cBlocksX = pMipmapLevel->mipmapSize.width;
281	cBlocksY = pMipmapLevel->mipmapSize.height;
282	}
283	else
284	{
285	cBlocksX = pMipmapLevel->mipmapSize.width / pSurface->cxBlock;
286	if (pMipmapLevel->mipmapSize.width % pSurface->cxBlock)
287	++cBlocksX;
288	cBlocksY = pMipmapLevel->mipmapSize.height / pSurface->cyBlock;
289	if (pMipmapLevel->mipmapSize.height % pSurface->cyBlock)
290	++cBlocksY;
291	}
292
293	if ( cBlocksX == 0
294	\|\| cBlocksY == 0
295	\|\| pMipmapLevel->mipmapSize.depth == 0)
296	return VERR_INVALID_PARAMETER;
297
298	const uint32_t cMaxBlocksX = cbMemRemaining / pSurface->cbBlock;
299	if (cBlocksX > cMaxBlocksX)
300	return VERR_INVALID_PARAMETER;
301	const uint32_t cbSurfacePitch = pSurface->cbBlock * cBlocksX;
302	LogFunc(("cbSurfacePitch=0x%x\n", cbSurfacePitch));
303
304	const uint32_t cMaxBlocksY = cbMemRemaining / cbSurfacePitch;
305	if (cBlocksY > cMaxBlocksY)
306	return VERR_INVALID_PARAMETER;
307	const uint32_t cbSurfacePlane = cbSurfacePitch * cBlocksY;
308
309	const uint32_t cMaxDepth = cbMemRemaining / cbSurfacePlane;
310	if (pMipmapLevel->mipmapSize.depth > cMaxDepth)
311	return VERR_INVALID_PARAMETER;
312	const uint32_t cbSurface = cbSurfacePlane * pMipmapLevel->mipmapSize.depth;
313
314	pMipmapLevel->cBlocksX = cBlocksX;
315	pMipmapLevel->cBlocksY = cBlocksY;
316	pMipmapLevel->cBlocks = cBlocksX * cBlocksY * pMipmapLevel->mipmapSize.depth;
317	pMipmapLevel->cbSurfacePitch = cbSurfacePitch;
318	pMipmapLevel->cbSurfacePlane = cbSurfacePlane;
319	pMipmapLevel->cbSurface = cbSurface;
320	pMipmapLevel->pSurfaceData = RTMemAllocZ(cbSurface);
321	AssertReturn(pMipmapLevel->pSurfaceData, VERR_NO_MEMORY);
322
323	cbMemRemaining -= cbSurface;
324	}
325	return VINF_SUCCESS;
326	}
327
328
329	/**
330	* Implements the SVGA_3D_CMD_SURFACE_DESTROY command (fifo).
331	*
332	* @returns VBox status code (currently ignored).
333	* @param pThisCC The VGA/VMSVGA state for ring-3.
334	* @param sid The ID of the surface to destroy.
335	*/
336	int vmsvga3dSurfaceDestroy(PVGASTATECC pThisCC, uint32_t sid)
337	{
338	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
339	AssertReturn(pState, VERR_NO_MEMORY);
340
341	PVMSVGA3DSURFACE pSurface;
342	int rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
343	AssertRCReturn(rc, rc);
344
345	LogFunc(("sid=%u\n", sid));
346
347	/* Check all contexts if this surface is used as a render target or active texture. */
348	for (uint32_t cid = 0; cid < pState->cContexts; cid++)
349	{
350	PVMSVGA3DCONTEXT pContext = pState->papContexts[cid];
351	if (pContext->id == cid)
352	{
353	for (uint32_t i = 0; i < RT_ELEMENTS(pContext->aSidActiveTextures); ++i)
354	if (pContext->aSidActiveTextures[i] == sid)
355	pContext->aSidActiveTextures[i] = SVGA3D_INVALID_ID;
356	for (uint32_t i = 0; i < RT_ELEMENTS(pContext->state.aRenderTargets); ++i)
357	if (pContext->state.aRenderTargets[i] == sid)
358	pContext->state.aRenderTargets[i] = SVGA3D_INVALID_ID;
359	}
360	}
361
362	vmsvga3dBackSurfaceDestroy(pState, pSurface);
363
364	if (pSurface->paMipmapLevels)
365	{
366	for (uint32_t i = 0; i < pSurface->cMipmapLevels; ++i)
367	RTMemFreeZ(pSurface->paMipmapLevels[i].pSurfaceData, pSurface->paMipmapLevels[i].cbSurface);
368	RTMemFree(pSurface->paMipmapLevels);
369	}
370
371	memset(pSurface, 0, sizeof(*pSurface));
372	pSurface->id = SVGA3D_INVALID_ID;
373
374	return VINF_SUCCESS;
375	}
376
377
378	/**
379	* Implements the SVGA_3D_CMD_SURFACE_STRETCHBLT command (fifo).
380	*
381	* @returns VBox status code (currently ignored).
382	* @param pThis The shared VGA/VMSVGA state.
383	* @param pThisCC The VGA/VMSVGA state for ring-3.
384	* @param pDstSfcImg
385	* @param pDstBox
386	* @param pSrcSfcImg
387	* @param pSrcBox
388	* @param enmMode
389	*/
390	int vmsvga3dSurfaceStretchBlt(PVGASTATE pThis, PVGASTATECC pThisCC, SVGA3dSurfaceImageId const pDstSfcImg, SVGA3dBox const pDstBox,
391	SVGA3dSurfaceImageId const pSrcSfcImg, SVGA3dBox const pSrcBox, SVGA3dStretchBltMode enmMode)
392	{
393	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
394	AssertReturn(pState, VERR_NO_MEMORY);
395
396	int rc;
397
398	uint32_t const sidSrc = pSrcSfcImg->sid;
399	PVMSVGA3DSURFACE pSrcSurface;
400	rc = vmsvga3dSurfaceFromSid(pState, sidSrc, &pSrcSurface);
401	AssertRCReturn(rc, rc);
402
403	uint32_t const sidDst = pDstSfcImg->sid;
404	PVMSVGA3DSURFACE pDstSurface;
405	rc = vmsvga3dSurfaceFromSid(pState, sidDst, &pDstSurface);
406	AssertRCReturn(rc, rc);
407
408	/* Can use faces[0].numMipLevels, because numMipLevels is the same for all faces. */
409	AssertReturn(pSrcSfcImg->face < pSrcSurface->cFaces, VERR_INVALID_PARAMETER);
410	AssertReturn(pSrcSfcImg->mipmap < pSrcSurface->faces[0].numMipLevels, VERR_INVALID_PARAMETER);
411	AssertReturn(pDstSfcImg->face < pDstSurface->cFaces, VERR_INVALID_PARAMETER);
412	AssertReturn(pDstSfcImg->mipmap < pDstSurface->faces[0].numMipLevels, VERR_INVALID_PARAMETER);
413
414	PVMSVGA3DCONTEXT pContext;
415	#ifdef VMSVGA3D_OPENGL
416	LogFunc(("src sid=%u (%d,%d)(%d,%d) dest sid=%u (%d,%d)(%d,%d) mode=%x\n",
417	sidSrc, pSrcBox->x, pSrcBox->y, pSrcBox->x + pSrcBox->w, pSrcBox->y + pSrcBox->h,
418	sidDst, pDstBox->x, pDstBox->y, pDstBox->x + pDstBox->w, pDstBox->y + pDstBox->h, enmMode));
419	pContext = &pState->SharedCtx;
420	VMSVGA3D_SET_CURRENT_CONTEXT(pState, pContext);
421	#else
422	LogFunc(("src sid=%u cid=%u (%d,%d)(%d,%d) dest sid=%u cid=%u (%d,%d)(%d,%d) mode=%x\n",
423	sidSrc, pSrcSurface->idAssociatedContext, pSrcBox->x, pSrcBox->y, pSrcBox->x + pSrcBox->w, pSrcBox->y + pSrcBox->h,
424	sidDst, pDstSurface->idAssociatedContext, pDstBox->x, pDstBox->y, pDstBox->x + pDstBox->w, pDstBox->y + pDstBox->h, enmMode));
425
426	uint32_t cid = pDstSurface->idAssociatedContext;
427	if (cid == SVGA3D_INVALID_ID)
428	cid = pSrcSurface->idAssociatedContext;
429
430	/* At least one of surfaces must be in hardware. */
431	AssertReturn(cid != SVGA3D_INVALID_ID, VERR_INVALID_PARAMETER);
432
433	rc = vmsvga3dContextFromCid(pState, cid, &pContext);
434	AssertRCReturn(rc, rc);
435	#endif
436
437	if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSrcSurface))
438	{
439	/* Unknown surface type; turn it into a texture, which can be used for other purposes too. */
440	LogFunc(("unknown src sid=%u type=%d format=%d -> create texture\n", sidSrc, pSrcSurface->surfaceFlags, pSrcSurface->format));
441	rc = vmsvga3dBackCreateTexture(pState, pContext, pContext->id, pSrcSurface);
442	AssertRCReturn(rc, rc);
443	}
444
445	if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pDstSurface))
446	{
447	/* Unknown surface type; turn it into a texture, which can be used for other purposes too. */
448	LogFunc(("unknown dest sid=%u type=%d format=%d -> create texture\n", sidDst, pDstSurface->surfaceFlags, pDstSurface->format));
449	rc = vmsvga3dBackCreateTexture(pState, pContext, pContext->id, pDstSurface);
450	AssertRCReturn(rc, rc);
451	}
452
453	PVMSVGA3DMIPMAPLEVEL pSrcMipmapLevel;
454	rc = vmsvga3dMipmapLevel(pSrcSurface, pSrcSfcImg->face, pSrcSfcImg->mipmap, &pSrcMipmapLevel);
455	AssertRCReturn(rc, rc);
456
457	PVMSVGA3DMIPMAPLEVEL pDstMipmapLevel;
458	rc = vmsvga3dMipmapLevel(pDstSurface, pDstSfcImg->face, pDstSfcImg->mipmap, &pDstMipmapLevel);
459	AssertRCReturn(rc, rc);
460
461	SVGA3dBox clipSrcBox = *pSrcBox;
462	SVGA3dBox clipDstBox = *pDstBox;
463	vmsvgaR3ClipBox(&pSrcMipmapLevel->mipmapSize, &clipSrcBox);
464	vmsvgaR3ClipBox(&pDstMipmapLevel->mipmapSize, &clipDstBox);
465
466	return vmsvga3dBackSurfaceStretchBlt(pThis, pState,
467	pDstSurface, pDstSfcImg->face, pDstSfcImg->mipmap, &clipDstBox,
468	pSrcSurface, pSrcSfcImg->face, pSrcSfcImg->mipmap, &clipSrcBox,
469	enmMode, pContext);
470	}
471
472	/**
473	* Implements the SVGA_3D_CMD_SURFACE_DMA command (fifo).
474	*
475	* @returns VBox status code (currently ignored).
476	* @param pThis The shared VGA/VMSVGA instance data.
477	* @param pThisCC The VGA/VMSVGA state for ring-3.
478	* @param guest .
479	* @param host .
480	* @param transfer .
481	* @param cCopyBoxes .
482	* @param paBoxes .
483	*/
484	int vmsvga3dSurfaceDMA(PVGASTATE pThis, PVGASTATECC pThisCC, SVGA3dGuestImage guest, SVGA3dSurfaceImageId host,
485	SVGA3dTransferType transfer, uint32_t cCopyBoxes, SVGA3dCopyBox *paBoxes)
486	{
487	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
488	AssertReturn(pState, VERR_NO_MEMORY);
489
490	PVMSVGA3DSURFACE pSurface;
491	int rc = vmsvga3dSurfaceFromSid(pState, host.sid, &pSurface);
492	AssertRCReturn(rc, rc);
493
494	LogFunc(("%sguestptr gmr=%x offset=%x pitch=%x host sid=%u face=%d mipmap=%d transfer=%s cCopyBoxes=%d\n",
495	(pSurface->surfaceFlags & SVGA3D_SURFACE_HINT_TEXTURE) ? "TEXTURE " : "",
496	guest.ptr.gmrId, guest.ptr.offset, guest.pitch,
497	host.sid, host.face, host.mipmap, (transfer == SVGA3D_WRITE_HOST_VRAM) ? "READ" : "WRITE", cCopyBoxes));
498
499	PVMSVGA3DMIPMAPLEVEL pMipLevel;
500	rc = vmsvga3dMipmapLevel(pSurface, host.face, host.mipmap, &pMipLevel);
501	AssertRCReturn(rc, rc);
502
503	PVMSVGA3DCONTEXT pContext = NULL;
504	if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
505	{
506	/*
507	* Not realized in host hardware/library yet, we have to work with
508	* the copy of the data we've got in VMSVGA3DMIMAPLEVEL::pSurfaceData.
509	*/
510	AssertReturn(pMipLevel->pSurfaceData, VERR_INTERNAL_ERROR);
511	}
512	else
513	{
514	#ifdef VMSVGA3D_DIRECT3D
515	/* Flush the drawing pipeline for this surface as it could be used in a shared context. */
516	vmsvga3dSurfaceFlush(pSurface);
517
518	#else /* VMSVGA3D_OPENGL */
519	pContext = &pState->SharedCtx;
520	VMSVGA3D_SET_CURRENT_CONTEXT(pState, pContext);
521	#endif
522	}
523
524	/* SVGA_3D_CMD_SURFACE_DMA:
525	* "define the 'source' in each copyBox as the guest image and the
526	* 'destination' as the host image, regardless of transfer direction."
527	*/
528	for (uint32_t i = 0; i < cCopyBoxes; ++i)
529	{
530	Log(("Copy box (%s) %d (%d,%d,%d)(%d,%d,%d) dest (%d,%d)\n",
531	VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface) ? "hw" : "mem",
532	i, paBoxes[i].srcx, paBoxes[i].srcy, paBoxes[i].srcz, paBoxes[i].w, paBoxes[i].h, paBoxes[i].d, paBoxes[i].x, paBoxes[i].y));
533
534	/* Apparently we're supposed to clip it (gmr test sample) */
535
536	/* The copybox's "dest" is coords in the host surface. Verify them against the surface's mipmap size. */
537	SVGA3dBox hostBox;
538	hostBox.x = paBoxes[i].x;
539	hostBox.y = paBoxes[i].y;
540	hostBox.z = paBoxes[i].z;
541	hostBox.w = paBoxes[i].w;
542	hostBox.h = paBoxes[i].h;
543	hostBox.d = paBoxes[i].d;
544	vmsvgaR3ClipBox(&pMipLevel->mipmapSize, &hostBox);
545
546	if ( !hostBox.w
547	\|\| !hostBox.h
548	\|\| !hostBox.d)
549	{
550	Log(("Skip empty box\n"));
551	continue;
552	}
553	RT_UNTRUSTED_VALIDATED_FENCE();
554
555	/* Adjust the guest, i.e. "src", point.
556	* Do not try to verify them here because vmsvgaR3GmrTransfer takes care of this.
557	*/
558	uint32_t const srcx = paBoxes[i].srcx + (hostBox.x - paBoxes[i].x);
559	uint32_t const srcy = paBoxes[i].srcy + (hostBox.y - paBoxes[i].y);
560	uint32_t const srcz = paBoxes[i].srcz + (hostBox.z - paBoxes[i].z);
561
562	/* Calculate offsets of the image blocks for the transfer. */
563	uint32_t u32HostBlockX;
564	uint32_t u32HostBlockY;
565	uint32_t u32GuestBlockX;
566	uint32_t u32GuestBlockY;
567	uint32_t cBlocksX;
568	uint32_t cBlocksY;
569	if (RT_LIKELY(pSurface->cxBlock == 1 && pSurface->cyBlock == 1))
570	{
571	u32HostBlockX = hostBox.x;
572	u32HostBlockY = hostBox.y;
573
574	u32GuestBlockX = srcx;
575	u32GuestBlockY = srcy;
576
577	cBlocksX = hostBox.w;
578	cBlocksY = hostBox.h;
579	}
580	else
581	{
582	/* Pixels to blocks. */
583	u32HostBlockX = hostBox.x / pSurface->cxBlock;
584	u32HostBlockY = hostBox.y / pSurface->cyBlock;
585	Assert(u32HostBlockX * pSurface->cxBlock == hostBox.x);
586	Assert(u32HostBlockY * pSurface->cyBlock == hostBox.y);
587
588	u32GuestBlockX = srcx / pSurface->cxBlock;
589	u32GuestBlockY = srcy / pSurface->cyBlock;
590	Assert(u32GuestBlockX * pSurface->cxBlock == srcx);
591	Assert(u32GuestBlockY * pSurface->cyBlock == srcy);
592
593	cBlocksX = (hostBox.w + pSurface->cxBlock - 1) / pSurface->cxBlock;
594	cBlocksY = (hostBox.h + pSurface->cyBlock - 1) / pSurface->cyBlock;
595	}
596
597	uint32_t cbGuestPitch = guest.pitch;
598	if (cbGuestPitch == 0)
599	{
600	/* Host must "assume image is tightly packed". Our surfaces are. */
601	cbGuestPitch = pMipLevel->cbSurfacePitch;
602	}
603	else
604	{
605	/* vmsvgaR3GmrTransfer will verify the value, just check it is sane. */
606	AssertReturn(cbGuestPitch <= SVGA3D_MAX_SURFACE_MEM_SIZE, VERR_INVALID_PARAMETER);
607	RT_UNTRUSTED_VALIDATED_FENCE();
608	}
609
610	/* srcx, srcy and srcz values are used to calculate the guest offset.
611	* The offset will be verified by vmsvgaR3GmrTransfer, so just check for overflows here.
612	*/
613	AssertReturn(srcz < UINT32_MAX / pMipLevel->mipmapSize.height / cbGuestPitch, VERR_INVALID_PARAMETER);
614	AssertReturn(u32GuestBlockY < UINT32_MAX / cbGuestPitch, VERR_INVALID_PARAMETER);
615	AssertReturn(u32GuestBlockX < UINT32_MAX / pSurface->cbBlock, VERR_INVALID_PARAMETER);
616	RT_UNTRUSTED_VALIDATED_FENCE();
617
618	if ( !VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface)
619	\|\| VMSVGA3DSURFACE_NEEDS_DATA(pSurface))
620	{
621	uint64_t uGuestOffset = u32GuestBlockX * pSurface->cbBlock +
622	u32GuestBlockY * cbGuestPitch +
623	srcz * pMipLevel->mipmapSize.height * cbGuestPitch;
624	AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
625
626	/* vmsvga3dSurfaceDefine verifies the surface dimensions and clipBox is within them. */
627	uint32_t uHostOffset = u32HostBlockX * pSurface->cbBlock +
628	u32HostBlockY * pMipLevel->cbSurfacePitch +
629	hostBox.z * pMipLevel->cbSurfacePlane;
630	AssertReturn(uHostOffset < pMipLevel->cbSurface, VERR_INTERNAL_ERROR);
631
632	for (uint32_t z = 0; z < hostBox.d; ++z)
633	{
634	rc = vmsvgaR3GmrTransfer(pThis,
635	pThisCC,
636	transfer,
637	(uint8_t *)pMipLevel->pSurfaceData,
638	pMipLevel->cbSurface,
639	uHostOffset,
640	(int32_t)pMipLevel->cbSurfacePitch,
641	guest.ptr,
642	(uint32_t)uGuestOffset,
643	cbGuestPitch,
644	cBlocksX * pSurface->cbBlock,
645	cBlocksY);
646	AssertRC(rc);
647
648	Log4(("first line [z=%d] (updated at offset 0x%x):\n%.*Rhxd\n",
649	z, uHostOffset, pMipLevel->cbSurfacePitch, pMipLevel->pSurfaceData));
650
651	uHostOffset += pMipLevel->cbSurfacePlane;
652	uGuestOffset += pMipLevel->mipmapSize.height * cbGuestPitch;
653	AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
654	}
655	}
656
657	if (VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
658	{
659	SVGA3dCopyBox clipBox;
660	clipBox.x = hostBox.x;
661	clipBox.y = hostBox.y;
662	clipBox.z = hostBox.z;
663	clipBox.w = hostBox.w;
664	clipBox.h = hostBox.h;
665	clipBox.d = hostBox.d;
666	clipBox.srcx = srcx;
667	clipBox.srcy = srcy;
668	clipBox.srcz = srcz;
669	rc = vmsvga3dBackSurfaceDMACopyBox(pThis, pThisCC, pState, pSurface, pMipLevel, host.face, host.mipmap,
670	guest.ptr, cbGuestPitch, transfer,
671	&clipBox, pContext, rc, i);
672	AssertRC(rc);
673	}
674	}
675
676	if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
677	{
678	pMipLevel->fDirty = true;
679	pSurface->fDirty = true;
680	}
681
682	return rc;
683	}
684
685	static int vmsvga3dQueryWriteResult(PVGASTATE pThis, PVGASTATECC pThisCC, SVGAGuestPtr guestResult,
686	SVGA3dQueryState enmState, uint32_t u32Result)
687	{
688	SVGA3dQueryResult queryResult;
689	queryResult.totalSize = sizeof(queryResult); /* Set by guest before query is ended. */
690	queryResult.state = enmState; /* Set by host or guest. See SVGA3dQueryState. */
691	queryResult.result32 = u32Result;
692
693	int rc = vmsvgaR3GmrTransfer(pThis, pThisCC, SVGA3D_READ_HOST_VRAM,
694	(uint8_t *)&queryResult, sizeof(queryResult), 0, sizeof(queryResult),
695	guestResult, 0, sizeof(queryResult), sizeof(queryResult), 1);
696	AssertRC(rc);
697	return rc;
698	}
699
700	int vmsvga3dQueryBegin(PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type)
701	{
702	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
703	AssertReturn(pState, VERR_NO_MEMORY);
704
705	LogFunc(("cid=%u type=%d\n", cid, type));
706
707	PVMSVGA3DCONTEXT pContext;
708	int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
709	AssertRCReturn(rc, rc);
710
711	if (type == SVGA3D_QUERYTYPE_OCCLUSION)
712	{
713	VMSVGA3DQUERY *p = &pContext->occlusion;
714	if (!VMSVGA3DQUERY_EXISTS(p))
715	{
716	/* Lazy creation of the query object. */
717	rc = vmsvga3dOcclusionQueryCreate(pState, pContext);
718	AssertRCReturn(rc, rc);
719	}
720
721	rc = vmsvga3dOcclusionQueryBegin(pState, pContext);
722	AssertRCReturn(rc, rc);
723
724	p->enmQueryState = VMSVGA3DQUERYSTATE_BUILDING;
725	p->u32QueryResult = 0;
726
727	return VINF_SUCCESS;
728	}
729
730	/* Nothing else for VGPU9. */
731	AssertFailedReturn(VERR_NOT_IMPLEMENTED);
732	}
733
734	int vmsvga3dQueryEnd(PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type, SVGAGuestPtr guestResult)
735	{
736	RT_NOREF(guestResult);
737	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
738	AssertReturn(pState, VERR_NO_MEMORY);
739
740	LogFunc(("cid=%u type=%d guestResult %d:0x%x\n", cid, type, guestResult.gmrId, guestResult.offset));
741
742	PVMSVGA3DCONTEXT pContext;
743	int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
744	AssertRCReturn(rc, rc);
745
746	if (type == SVGA3D_QUERYTYPE_OCCLUSION)
747	{
748	VMSVGA3DQUERY *p = &pContext->occlusion;
749	Assert(p->enmQueryState == VMSVGA3DQUERYSTATE_BUILDING);
750	AssertMsgReturn(VMSVGA3DQUERY_EXISTS(p), ("Query is NULL\n"), VERR_INTERNAL_ERROR);
751
752	rc = vmsvga3dOcclusionQueryEnd(pState, pContext);
753	AssertRCReturn(rc, rc);
754
755	p->enmQueryState = VMSVGA3DQUERYSTATE_ISSUED;
756
757	/* Do not touch guestResult, because the guest will call WaitForQuery. */
758	return VINF_SUCCESS;
759	}
760
761	/* Nothing else for VGPU9. */
762	AssertFailedReturn(VERR_NOT_IMPLEMENTED);
763	}
764
765	int vmsvga3dQueryWait(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type, SVGAGuestPtr guestResult)
766	{
767	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
768	AssertReturn(pState, VERR_NO_MEMORY);
769
770	LogFunc(("cid=%u type=%d guestResult GMR%d:0x%x\n", cid, type, guestResult.gmrId, guestResult.offset));
771
772	PVMSVGA3DCONTEXT pContext;
773	int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
774	AssertRCReturn(rc, rc);
775
776	if (type == SVGA3D_QUERYTYPE_OCCLUSION)
777	{
778	VMSVGA3DQUERY *p = &pContext->occlusion;
779	if (VMSVGA3DQUERY_EXISTS(p))
780	{
781	if (p->enmQueryState == VMSVGA3DQUERYSTATE_ISSUED)
782	{
783	/* Only if not already in SIGNALED state,
784	* i.e. not a second read from the guest or after restoring saved state.
785	*/
786	uint32_t u32Pixels = 0;
787	rc = vmsvga3dOcclusionQueryGetData(pState, pContext, &u32Pixels);
788	if (RT_SUCCESS(rc))
789	{
790	p->enmQueryState = VMSVGA3DQUERYSTATE_SIGNALED;
791	p->u32QueryResult += u32Pixels; /* += because it might contain partial result from saved state. */
792	}
793	}
794
795	if (RT_SUCCESS(rc))
796	{
797	/* Return data to the guest. */
798	vmsvga3dQueryWriteResult(pThis, pThisCC, guestResult, SVGA3D_QUERYSTATE_SUCCEEDED, p->u32QueryResult);
799	return VINF_SUCCESS;
800	}
801	}
802	else
803	{
804	AssertMsgFailed(("GetData Query is NULL\n"));
805	}
806
807	rc = VERR_INTERNAL_ERROR;
808	}
809	else
810	{
811	rc = VERR_NOT_IMPLEMENTED;
812	}
813
814	vmsvga3dQueryWriteResult(pThis, pThisCC, guestResult, SVGA3D_QUERYSTATE_FAILED, 0);
815	AssertFailedReturn(rc);
816	}
817
818	int vmsvga3dSurfaceBlitToScreen(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t idDstScreen, SVGASignedRect destRect,
819	SVGA3dSurfaceImageId srcImage, SVGASignedRect srcRect, uint32_t cRects, SVGASignedRect *pRect)
820	{
821	/* Requires SVGA_FIFO_CAP_SCREEN_OBJECT support */
822	LogFunc(("dest=%d (%d,%d)(%d,%d) sid=%u (face=%d, mipmap=%d) (%d,%d)(%d,%d) cRects=%d\n",
823	idDstScreen, destRect.left, destRect.top, destRect.right, destRect.bottom, srcImage.sid, srcImage.face, srcImage.mipmap,
824	srcRect.left, srcRect.top, srcRect.right, srcRect.bottom, cRects));
825	for (uint32_t i = 0; i < cRects; i++)
826	{
827	LogFunc(("clipping rect %d (%d,%d)(%d,%d)\n", i, pRect[i].left, pRect[i].top, pRect[i].right, pRect[i].bottom));
828	}
829
830	VMSVGASCREENOBJECT *pScreen = vmsvgaR3GetScreenObject(pThisCC, idDstScreen);
831	AssertReturn(pScreen, VERR_INTERNAL_ERROR);
832
833	/* vmwgfx driver does not always initialize srcImage.mipmap and srcImage.face. They are assumed to be zero. */
834	SVGA3dSurfaceImageId src;
835	src.sid = srcImage.sid;
836	src.mipmap = 0;
837	src.face = 0;
838
839	/** @todo scaling */
840	AssertReturn(destRect.right - destRect.left == srcRect.right - srcRect.left && destRect.bottom - destRect.top == srcRect.bottom - srcRect.top, VERR_INVALID_PARAMETER);
841
842	SVGA3dCopyBox box;
843	SVGA3dGuestImage dest;
844
845	box.srcz = 0;
846	box.z = 0;
847	box.d = 1;
848
849	dest.ptr.gmrId = SVGA_GMR_FRAMEBUFFER;
850	dest.ptr.offset = pScreen->offVRAM;
851	dest.pitch = pScreen->cbPitch;
852
853	if (cRects == 0)
854	{
855	/* easy case; no clipping */
856
857	/* SVGA_3D_CMD_SURFACE_DMA:
858	* 'define the "source" in each copyBox as the guest image and the
859	* "destination" as the host image, regardless of transfer direction.'
860	*
861	* Since the BlitToScreen operation transfers from a host surface to the guest VRAM,
862	* it must set the copyBox "source" to the guest destination coords and
863	* the copyBox "destination" to the host surface source coords.
864	*/
865	/* Host image. */
866	box.x = srcRect.left;
867	box.y = srcRect.top;
868	box.w = srcRect.right - srcRect.left;
869	box.h = srcRect.bottom - srcRect.top;
870	/* Guest image. */
871	box.srcx = destRect.left;
872	box.srcy = destRect.top;
873
874	int rc = vmsvga3dSurfaceDMA(pThis, pThisCC, dest, src, SVGA3D_READ_HOST_VRAM, 1, &box);
875	AssertRCReturn(rc, rc);
876
877	/* Update the guest image, which is at box.src. */
878	vmsvgaR3UpdateScreen(pThisCC, pScreen, box.srcx, box.srcy, box.w, box.h);
879	}
880	else
881	{
882	/** @todo merge into one SurfaceDMA call */
883	for (uint32_t i = 0; i < cRects; i++)
884	{
885	/* "The clip rectangle coordinates are measured
886	* relative to the top-left corner of destRect."
887	* Therefore they are relative to the top-left corner of srcRect as well.
888	*/
889
890	/* Host image. See 'SVGA_3D_CMD_SURFACE_DMA:' comment in the 'if' branch. */
891	box.x = srcRect.left + pRect[i].left;
892	box.y = srcRect.top + pRect[i].top;
893	box.w = pRect[i].right - pRect[i].left;
894	box.h = pRect[i].bottom - pRect[i].top;
895	/* Guest image. The target screen memory is currently in the guest VRAM. */
896	box.srcx = destRect.left + pRect[i].left;
897	box.srcy = destRect.top + pRect[i].top;
898
899	int rc = vmsvga3dSurfaceDMA(pThis, pThisCC, dest, src, SVGA3D_READ_HOST_VRAM, 1, &box);
900	AssertRCReturn(rc, rc);
901
902	/* Update the guest image, which is at box.src. */
903	vmsvgaR3UpdateScreen(pThisCC, pScreen, box.srcx, box.srcy, box.w, box.h);
904	}
905	}
906
907	return VINF_SUCCESS;
908	}
909
910	int vmsvga3dCommandPresent(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t sid, uint32_t cRects, SVGA3dCopyRect *pRect)
911	{
912	/* Deprecated according to svga3d_reg.h. */
913	PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
914	AssertReturn(pState, VERR_NO_MEMORY);
915
916	PVMSVGA3DSURFACE pSurface;
917	int rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
918	AssertRCReturn(rc, rc);
919
920	/** @todo Detect screen from coords? Or split rect to screens? */
921	VMSVGASCREENOBJECT *pScreen = vmsvgaR3GetScreenObject(pThisCC, 0);
922	AssertReturn(pScreen, VERR_INTERNAL_ERROR);
923
924	/* If there are no recangles specified, just grab a screenful. */
925	SVGA3dCopyRect DummyRect;
926	if (cRects != 0)
927	{ /* likely */ }
928	else
929	{
930	/** @todo Find the usecase for this or check what the original device does.
931	* The original code was doing some scaling based on the surface
932	* size... */
933	AssertMsgFailed(("No rects to present. Who is doing that and what do they actually expect?\n"));
934	DummyRect.x = DummyRect.srcx = 0;
935	DummyRect.y = DummyRect.srcy = 0;
936	DummyRect.w = pScreen->cWidth;
937	DummyRect.h = pScreen->cHeight;
938	cRects = 1;
939	pRect = &DummyRect;
940	}
941
942	uint32_t i;
943	for (i = 0; i < cRects; ++i)
944	{
945	uint32_t idDstScreen = 0; /** @todo Use virtual coords: SVGA_ID_INVALID. */
946	SVGASignedRect destRect;
947	destRect.left = pRect[i].x;
948	destRect.top = pRect[i].y;
949	destRect.right = pRect[i].x + pRect[i].w;
950	destRect.bottom = pRect[i].y + pRect[i].h;
951
952	SVGA3dSurfaceImageId src;
953	src.sid = sid;
954	src.face = 0;
955	src.mipmap = 0;
956
957	SVGASignedRect srcRect;
958	srcRect.left = pRect[i].srcx;
959	srcRect.top = pRect[i].srcy;
960	srcRect.right = pRect[i].srcx + pRect[i].w;
961	srcRect.bottom = pRect[i].srcy + pRect[i].h;
962
963	/* Entire rect. */
964	rc = vmsvga3dSurfaceBlitToScreen(pThis, pThisCC, idDstScreen, destRect, src, srcRect, 0, NULL);
965	AssertRCReturn(rc, rc);
966	}
967
968	return VINF_SUCCESS;
969	}

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source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d.cpp@ 84677

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