VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA-SVGA3d.cpp@ 86024

Last change on this file since 86024 was 86024, checked in by vboxsync, 4 years ago

Devices/Graphics: use current VMSVGA headers

  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 38.8 KB
Line 
1/* $Id: DevVGA-SVGA3d.cpp 86024 2020-09-03 14:37:31Z vboxsync $ */
2/** @file
3 * DevSVGA3d - VMWare SVGA device, 3D parts - Common core code.
4 */
5
6/*
7 * Copyright (C) 2013-2020 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_DEV_VMSVGA
23#include <VBox/vmm/pdmdev.h>
24#include <iprt/errcore.h>
25#include <VBox/log.h>
26
27#include <iprt/assert.h>
28#include <iprt/mem.h>
29
30#include <VBox/vmm/pgm.h> /* required by DevVGA.h */
31#include <VBoxVideo.h> /* required by DevVGA.h */
32
33/* should go BEFORE any other DevVGA include to make all DevVGA.h config defines be visible */
34#include "DevVGA.h"
35
36#include "DevVGA-SVGA.h"
37#include "DevVGA-SVGA3d.h"
38#define VMSVGA3D_INCL_STRUCTURE_DESCRIPTORS
39#include "DevVGA-SVGA3d-internal.h"
40
41
42
43/**
44 * Implements the SVGA_3D_CMD_SURFACE_DEFINE_V2 and SVGA_3D_CMD_SURFACE_DEFINE
45 * commands (fifo).
46 *
47 * @returns VBox status code (currently ignored).
48 * @param pThisCC The VGA/VMSVGA state for ring-3.
49 * @param sid The ID of the surface to (re-)define.
50 * @param surfaceFlags .
51 * @param format .
52 * @param face .
53 * @param multisampleCount .
54 * @param autogenFilter .
55 * @param cMipLevels .
56 * @param paMipLevelSizes .
57 */
58int vmsvga3dSurfaceDefine(PVGASTATECC pThisCC, uint32_t sid, uint32_t surfaceFlags, SVGA3dSurfaceFormat format,
59 SVGA3dSurfaceFace face[SVGA3D_MAX_SURFACE_FACES], uint32_t multisampleCount,
60 SVGA3dTextureFilter autogenFilter, uint32_t cMipLevels, SVGA3dSize *paMipLevelSizes)
61{
62 PVMSVGA3DSURFACE pSurface;
63 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
64 AssertReturn(pState, VERR_NO_MEMORY);
65
66 Log(("vmsvga3dSurfaceDefine: sid=%u surfaceFlags=%x format=%s (%x) multiSampleCount=%d autogenFilter=%d, cMipLevels=%d size=(%d,%d,%d)\n",
67 sid, surfaceFlags, vmsvgaLookupEnum((int)format, &g_SVGA3dSurfaceFormat2String), format, multisampleCount, autogenFilter,
68 cMipLevels, paMipLevelSizes->width, paMipLevelSizes->height, paMipLevelSizes->depth));
69
70 AssertReturn(sid < SVGA3D_MAX_SURFACE_IDS, VERR_INVALID_PARAMETER);
71 AssertReturn(cMipLevels >= 1, VERR_INVALID_PARAMETER);
72
73 /* Number of faces (cFaces) is specified as the number of the first non-zero elements in the 'face' array.
74 * Since only plain surfaces (cFaces == 1) and cubemaps (cFaces == 6) are supported
75 * (see also SVGA3dCmdDefineSurface definition in svga3d_reg.h), we ignore anything else.
76 */
77 uint32_t cRemainingMipLevels = cMipLevels;
78 uint32_t cFaces = 0;
79 for (uint32_t i = 0; i < SVGA3D_MAX_SURFACE_FACES; ++i)
80 {
81 if (face[i].numMipLevels == 0)
82 break;
83
84 /* All SVGA3dSurfaceFace structures must have the same value of numMipLevels field */
85 AssertReturn(face[i].numMipLevels == face[0].numMipLevels, VERR_INVALID_PARAMETER);
86
87 /* numMipLevels value can't be greater than the number of remaining elements in the paMipLevelSizes array. */
88 AssertReturn(face[i].numMipLevels <= cRemainingMipLevels, VERR_INVALID_PARAMETER);
89 cRemainingMipLevels -= face[i].numMipLevels;
90
91 ++cFaces;
92 }
93 for (uint32_t i = cFaces; i < SVGA3D_MAX_SURFACE_FACES; ++i)
94 AssertReturn(face[i].numMipLevels == 0, VERR_INVALID_PARAMETER);
95
96 /* cFaces must be 6 for a cubemap and 1 otherwise. */
97 AssertReturn(cFaces == (uint32_t)((surfaceFlags & SVGA3D_SURFACE_CUBEMAP) ? 6 : 1), VERR_INVALID_PARAMETER);
98
99 /* Sum of face[i].numMipLevels must be equal to cMipLevels. */
100 AssertReturn(cRemainingMipLevels == 0, VERR_INVALID_PARAMETER);
101
102 if (sid >= pState->cSurfaces)
103 {
104 /* Grow the array. */
105 uint32_t cNew = RT_ALIGN(sid + 15, 16);
106 void *pvNew = RTMemRealloc(pState->papSurfaces, sizeof(pState->papSurfaces[0]) * cNew);
107 AssertReturn(pvNew, VERR_NO_MEMORY);
108 pState->papSurfaces = (PVMSVGA3DSURFACE *)pvNew;
109 while (pState->cSurfaces < cNew)
110 {
111 pSurface = (PVMSVGA3DSURFACE)RTMemAllocZ(sizeof(*pSurface));
112 AssertReturn(pSurface, VERR_NO_MEMORY);
113 pSurface->id = SVGA3D_INVALID_ID;
114 pState->papSurfaces[pState->cSurfaces++] = pSurface;
115 }
116 }
117 pSurface = pState->papSurfaces[sid];
118
119 /* If one already exists with this id, then destroy it now. */
120 if (pSurface->id != SVGA3D_INVALID_ID)
121 vmsvga3dSurfaceDestroy(pThisCC, sid);
122
123 RT_ZERO(*pSurface);
124 pSurface->id = sid;
125#ifdef VMSVGA3D_OPENGL
126 pSurface->idWeakContextAssociation = SVGA3D_INVALID_ID;
127 pSurface->oglId.buffer = OPENGL_INVALID_ID;
128#else /* VMSVGA3D_DIRECT3D */
129 pSurface->idAssociatedContext = SVGA3D_INVALID_ID;
130 pSurface->hSharedObject = NULL;
131 pSurface->pSharedObjectTree = NULL;
132#endif
133
134 /* The surface type is sort of undefined now, even though the hints and format can help to clear that up.
135 * In some case we'll have to wait until the surface is used to create the D3D object.
136 */
137 switch (format)
138 {
139 case SVGA3D_Z_D32:
140 case SVGA3D_Z_D16:
141 case SVGA3D_Z_D24S8:
142 case SVGA3D_Z_D15S1:
143 case SVGA3D_Z_D24X8:
144 case SVGA3D_Z_DF16:
145 case SVGA3D_Z_DF24:
146 case SVGA3D_Z_D24S8_INT:
147 surfaceFlags |= SVGA3D_SURFACE_HINT_DEPTHSTENCIL;
148 break;
149
150 /* Texture compression formats */
151 case SVGA3D_DXT1:
152 case SVGA3D_DXT2:
153 case SVGA3D_DXT3:
154 case SVGA3D_DXT4:
155 case SVGA3D_DXT5:
156 /* Bump-map formats */
157 case SVGA3D_BUMPU8V8:
158 case SVGA3D_BUMPL6V5U5:
159 case SVGA3D_BUMPX8L8V8U8:
160 case SVGA3D_V8U8:
161 case SVGA3D_Q8W8V8U8:
162 case SVGA3D_CxV8U8:
163 case SVGA3D_X8L8V8U8:
164 case SVGA3D_A2W10V10U10:
165 case SVGA3D_V16U16:
166 /* Typical render target formats; we should allow render target buffers to be used as textures. */
167 case SVGA3D_X8R8G8B8:
168 case SVGA3D_A8R8G8B8:
169 case SVGA3D_R5G6B5:
170 case SVGA3D_X1R5G5B5:
171 case SVGA3D_A1R5G5B5:
172 case SVGA3D_A4R4G4B4:
173 surfaceFlags |= SVGA3D_SURFACE_HINT_TEXTURE;
174 break;
175
176 case SVGA3D_LUMINANCE8:
177 case SVGA3D_LUMINANCE4_ALPHA4:
178 case SVGA3D_LUMINANCE16:
179 case SVGA3D_LUMINANCE8_ALPHA8:
180 case SVGA3D_ARGB_S10E5: /* 16-bit floating-point ARGB */
181 case SVGA3D_ARGB_S23E8: /* 32-bit floating-point ARGB */
182 case SVGA3D_A2R10G10B10:
183 case SVGA3D_ALPHA8:
184 case SVGA3D_R_S10E5:
185 case SVGA3D_R_S23E8:
186 case SVGA3D_RG_S10E5:
187 case SVGA3D_RG_S23E8:
188 case SVGA3D_G16R16:
189 case SVGA3D_A16B16G16R16:
190 case SVGA3D_UYVY:
191 case SVGA3D_YUY2:
192 case SVGA3D_NV12:
193 case SVGA3D_AYUV:
194 case SVGA3D_ATI1:
195 case SVGA3D_ATI2:
196 break;
197
198 /*
199 * Any surface can be used as a buffer object, but SVGA3D_BUFFER is
200 * the most efficient format to use when creating new surfaces
201 * expressly for index or vertex data.
202 */
203 case SVGA3D_BUFFER:
204 break;
205
206 default:
207 break;
208 }
209
210 pSurface->surfaceFlags = surfaceFlags;
211 pSurface->format = format;
212 memcpy(pSurface->faces, face, sizeof(pSurface->faces));
213 pSurface->cFaces = cFaces;
214 pSurface->multiSampleCount = multisampleCount;
215 pSurface->autogenFilter = autogenFilter;
216 Assert(autogenFilter != SVGA3D_TEX_FILTER_FLATCUBIC);
217 Assert(autogenFilter != SVGA3D_TEX_FILTER_GAUSSIANCUBIC);
218 pSurface->cMipmapLevels = cMipLevels;
219 pSurface->paMipmapLevels = (PVMSVGA3DMIPMAPLEVEL)RTMemAllocZ(cMipLevels * sizeof(VMSVGA3DMIPMAPLEVEL));
220 AssertReturn(pSurface->paMipmapLevels, VERR_NO_MEMORY);
221
222 for (uint32_t i=0; i < cMipLevels; i++)
223 pSurface->paMipmapLevels[i].mipmapSize = paMipLevelSizes[i];
224
225 pSurface->cbBlock = vmsvga3dSurfaceFormatSize(format, &pSurface->cxBlock, &pSurface->cyBlock);
226 AssertReturn(pSurface->cbBlock, VERR_INVALID_PARAMETER);
227
228#ifdef VMSVGA3D_DIRECT3D
229 /* Translate the format and usage flags to D3D. */
230 pSurface->d3dfmtRequested = vmsvga3dSurfaceFormat2D3D(format);
231 pSurface->formatD3D = D3D9GetActualFormat(pState, pSurface->d3dfmtRequested);
232 pSurface->multiSampleTypeD3D= vmsvga3dMultipeSampleCount2D3D(multisampleCount);
233 pSurface->fUsageD3D = 0;
234 if (surfaceFlags & SVGA3D_SURFACE_HINT_DYNAMIC)
235 pSurface->fUsageD3D |= D3DUSAGE_DYNAMIC;
236 if (surfaceFlags & SVGA3D_SURFACE_HINT_RENDERTARGET)
237 pSurface->fUsageD3D |= D3DUSAGE_RENDERTARGET;
238 if (surfaceFlags & SVGA3D_SURFACE_HINT_DEPTHSTENCIL)
239 pSurface->fUsageD3D |= D3DUSAGE_DEPTHSTENCIL;
240 if (surfaceFlags & SVGA3D_SURFACE_HINT_WRITEONLY)
241 pSurface->fUsageD3D |= D3DUSAGE_WRITEONLY;
242 if (surfaceFlags & SVGA3D_SURFACE_AUTOGENMIPMAPS)
243 pSurface->fUsageD3D |= D3DUSAGE_AUTOGENMIPMAP;
244 pSurface->enmD3DResType = VMSVGA3D_D3DRESTYPE_NONE;
245 /* pSurface->u.pSurface = NULL; */
246 /* pSurface->bounce.pTexture = NULL; */
247 /* pSurface->emulated.pTexture = NULL; */
248#else
249 /* pSurface->fEmulated = false; */
250 /* pSurface->idEmulated = OPENGL_INVALID_ID; */
251 vmsvga3dSurfaceFormat2OGL(pSurface, format);
252#endif
253
254 LogFunc(("surface hint(s):%s%s%s%s%s%s\n",
255 (surfaceFlags & SVGA3D_SURFACE_HINT_INDEXBUFFER) ? " SVGA3D_SURFACE_HINT_INDEXBUFFER" : "",
256 (surfaceFlags & SVGA3D_SURFACE_HINT_VERTEXBUFFER) ? " SVGA3D_SURFACE_HINT_VERTEXBUFFER" : "",
257 (surfaceFlags & SVGA3D_SURFACE_HINT_TEXTURE) ? " SVGA3D_SURFACE_HINT_TEXTURE" : "",
258 (surfaceFlags & SVGA3D_SURFACE_HINT_DEPTHSTENCIL) ? " SVGA3D_SURFACE_HINT_DEPTHSTENCIL" : "",
259 (surfaceFlags & SVGA3D_SURFACE_HINT_RENDERTARGET) ? " SVGA3D_SURFACE_HINT_RENDERTARGET" : "",
260 (surfaceFlags & SVGA3D_SURFACE_CUBEMAP) ? " SVGA3D_SURFACE_CUBEMAP" : ""
261 ));
262
263 Assert(!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface));
264
265 /* Allocate buffer to hold the surface data until we can move it into a D3D object */
266 uint32_t cbMemRemaining = SVGA3D_MAX_SURFACE_MEM_SIZE; /* Do not allow more than this for a surface. */
267 for (uint32_t i = 0; i < cMipLevels; ++i)
268 {
269 PVMSVGA3DMIPMAPLEVEL pMipmapLevel = &pSurface->paMipmapLevels[i];
270 LogFunc(("[%d] face %d mip level %d (%d,%d,%d) cbBlock=0x%x block %dx%d\n",
271 i, i / pSurface->faces[0].numMipLevels, i % pSurface->faces[0].numMipLevels,
272 pMipmapLevel->mipmapSize.width, pMipmapLevel->mipmapSize.height, pMipmapLevel->mipmapSize.depth,
273 pSurface->cbBlock, pSurface->cxBlock, pSurface->cyBlock));
274
275 uint32_t cBlocksX;
276 uint32_t cBlocksY;
277 if (RT_LIKELY(pSurface->cxBlock == 1 && pSurface->cyBlock == 1))
278 {
279 cBlocksX = pMipmapLevel->mipmapSize.width;
280 cBlocksY = pMipmapLevel->mipmapSize.height;
281 }
282 else
283 {
284 cBlocksX = pMipmapLevel->mipmapSize.width / pSurface->cxBlock;
285 if (pMipmapLevel->mipmapSize.width % pSurface->cxBlock)
286 ++cBlocksX;
287 cBlocksY = pMipmapLevel->mipmapSize.height / pSurface->cyBlock;
288 if (pMipmapLevel->mipmapSize.height % pSurface->cyBlock)
289 ++cBlocksY;
290 }
291
292 if ( cBlocksX == 0
293 || cBlocksY == 0
294 || pMipmapLevel->mipmapSize.depth == 0)
295 return VERR_INVALID_PARAMETER;
296
297 const uint32_t cMaxBlocksX = cbMemRemaining / pSurface->cbBlock;
298 if (cBlocksX > cMaxBlocksX)
299 return VERR_INVALID_PARAMETER;
300 const uint32_t cbSurfacePitch = pSurface->cbBlock * cBlocksX;
301 LogFunc(("cbSurfacePitch=0x%x\n", cbSurfacePitch));
302
303 const uint32_t cMaxBlocksY = cbMemRemaining / cbSurfacePitch;
304 if (cBlocksY > cMaxBlocksY)
305 return VERR_INVALID_PARAMETER;
306 const uint32_t cbSurfacePlane = cbSurfacePitch * cBlocksY;
307
308 const uint32_t cMaxDepth = cbMemRemaining / cbSurfacePlane;
309 if (pMipmapLevel->mipmapSize.depth > cMaxDepth)
310 return VERR_INVALID_PARAMETER;
311 const uint32_t cbSurface = cbSurfacePlane * pMipmapLevel->mipmapSize.depth;
312
313 pMipmapLevel->cBlocksX = cBlocksX;
314 pMipmapLevel->cBlocksY = cBlocksY;
315 pMipmapLevel->cBlocks = cBlocksX * cBlocksY * pMipmapLevel->mipmapSize.depth;
316 pMipmapLevel->cbSurfacePitch = cbSurfacePitch;
317 pMipmapLevel->cbSurfacePlane = cbSurfacePlane;
318 pMipmapLevel->cbSurface = cbSurface;
319 pMipmapLevel->pSurfaceData = RTMemAllocZ(cbSurface);
320 AssertReturn(pMipmapLevel->pSurfaceData, VERR_NO_MEMORY);
321
322 cbMemRemaining -= cbSurface;
323 }
324 return VINF_SUCCESS;
325}
326
327
328/**
329 * Implements the SVGA_3D_CMD_SURFACE_DESTROY command (fifo).
330 *
331 * @returns VBox status code (currently ignored).
332 * @param pThisCC The VGA/VMSVGA state for ring-3.
333 * @param sid The ID of the surface to destroy.
334 */
335int vmsvga3dSurfaceDestroy(PVGASTATECC pThisCC, uint32_t sid)
336{
337 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
338 AssertReturn(pState, VERR_NO_MEMORY);
339
340 PVMSVGA3DSURFACE pSurface;
341 int rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
342 AssertRCReturn(rc, rc);
343
344 LogFunc(("sid=%u\n", sid));
345
346 /* Check all contexts if this surface is used as a render target or active texture. */
347 for (uint32_t cid = 0; cid < pState->cContexts; cid++)
348 {
349 PVMSVGA3DCONTEXT pContext = pState->papContexts[cid];
350 if (pContext->id == cid)
351 {
352 for (uint32_t i = 0; i < RT_ELEMENTS(pContext->aSidActiveTextures); ++i)
353 if (pContext->aSidActiveTextures[i] == sid)
354 pContext->aSidActiveTextures[i] = SVGA3D_INVALID_ID;
355 for (uint32_t i = 0; i < RT_ELEMENTS(pContext->state.aRenderTargets); ++i)
356 if (pContext->state.aRenderTargets[i] == sid)
357 pContext->state.aRenderTargets[i] = SVGA3D_INVALID_ID;
358 }
359 }
360
361 vmsvga3dBackSurfaceDestroy(pState, pSurface);
362
363 if (pSurface->paMipmapLevels)
364 {
365 for (uint32_t i = 0; i < pSurface->cMipmapLevels; ++i)
366 RTMemFreeZ(pSurface->paMipmapLevels[i].pSurfaceData, pSurface->paMipmapLevels[i].cbSurface);
367 RTMemFree(pSurface->paMipmapLevels);
368 }
369
370 memset(pSurface, 0, sizeof(*pSurface));
371 pSurface->id = SVGA3D_INVALID_ID;
372
373 return VINF_SUCCESS;
374}
375
376
377/**
378 * Implements the SVGA_3D_CMD_SURFACE_STRETCHBLT command (fifo).
379 *
380 * @returns VBox status code (currently ignored).
381 * @param pThis The shared VGA/VMSVGA state.
382 * @param pThisCC The VGA/VMSVGA state for ring-3.
383 * @param pDstSfcImg
384 * @param pDstBox
385 * @param pSrcSfcImg
386 * @param pSrcBox
387 * @param enmMode
388 */
389int vmsvga3dSurfaceStretchBlt(PVGASTATE pThis, PVGASTATECC pThisCC, SVGA3dSurfaceImageId const *pDstSfcImg, SVGA3dBox const *pDstBox,
390 SVGA3dSurfaceImageId const *pSrcSfcImg, SVGA3dBox const *pSrcBox, SVGA3dStretchBltMode enmMode)
391{
392 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
393 AssertReturn(pState, VERR_NO_MEMORY);
394
395 int rc;
396
397 uint32_t const sidSrc = pSrcSfcImg->sid;
398 PVMSVGA3DSURFACE pSrcSurface;
399 rc = vmsvga3dSurfaceFromSid(pState, sidSrc, &pSrcSurface);
400 AssertRCReturn(rc, rc);
401
402 uint32_t const sidDst = pDstSfcImg->sid;
403 PVMSVGA3DSURFACE pDstSurface;
404 rc = vmsvga3dSurfaceFromSid(pState, sidDst, &pDstSurface);
405 AssertRCReturn(rc, rc);
406
407 /* Can use faces[0].numMipLevels, because numMipLevels is the same for all faces. */
408 AssertReturn(pSrcSfcImg->face < pSrcSurface->cFaces, VERR_INVALID_PARAMETER);
409 AssertReturn(pSrcSfcImg->mipmap < pSrcSurface->faces[0].numMipLevels, VERR_INVALID_PARAMETER);
410 AssertReturn(pDstSfcImg->face < pDstSurface->cFaces, VERR_INVALID_PARAMETER);
411 AssertReturn(pDstSfcImg->mipmap < pDstSurface->faces[0].numMipLevels, VERR_INVALID_PARAMETER);
412
413 PVMSVGA3DCONTEXT pContext;
414#ifdef VMSVGA3D_OPENGL
415 LogFunc(("src sid=%u (%d,%d)(%d,%d) dest sid=%u (%d,%d)(%d,%d) mode=%x\n",
416 sidSrc, pSrcBox->x, pSrcBox->y, pSrcBox->x + pSrcBox->w, pSrcBox->y + pSrcBox->h,
417 sidDst, pDstBox->x, pDstBox->y, pDstBox->x + pDstBox->w, pDstBox->y + pDstBox->h, enmMode));
418 pContext = &pState->SharedCtx;
419 VMSVGA3D_SET_CURRENT_CONTEXT(pState, pContext);
420#else
421 LogFunc(("src sid=%u cid=%u (%d,%d)(%d,%d) dest sid=%u cid=%u (%d,%d)(%d,%d) mode=%x\n",
422 sidSrc, pSrcSurface->idAssociatedContext, pSrcBox->x, pSrcBox->y, pSrcBox->x + pSrcBox->w, pSrcBox->y + pSrcBox->h,
423 sidDst, pDstSurface->idAssociatedContext, pDstBox->x, pDstBox->y, pDstBox->x + pDstBox->w, pDstBox->y + pDstBox->h, enmMode));
424
425 uint32_t cid = pDstSurface->idAssociatedContext;
426 if (cid == SVGA3D_INVALID_ID)
427 cid = pSrcSurface->idAssociatedContext;
428
429 /* At least one of surfaces must be in hardware. */
430 AssertReturn(cid != SVGA3D_INVALID_ID, VERR_INVALID_PARAMETER);
431
432 rc = vmsvga3dContextFromCid(pState, cid, &pContext);
433 AssertRCReturn(rc, rc);
434#endif
435
436 if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSrcSurface))
437 {
438 /* Unknown surface type; turn it into a texture, which can be used for other purposes too. */
439 LogFunc(("unknown src sid=%u type=%d format=%d -> create texture\n", sidSrc, pSrcSurface->surfaceFlags, pSrcSurface->format));
440 rc = vmsvga3dBackCreateTexture(pState, pContext, pContext->id, pSrcSurface);
441 AssertRCReturn(rc, rc);
442 }
443
444 if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pDstSurface))
445 {
446 /* Unknown surface type; turn it into a texture, which can be used for other purposes too. */
447 LogFunc(("unknown dest sid=%u type=%d format=%d -> create texture\n", sidDst, pDstSurface->surfaceFlags, pDstSurface->format));
448 rc = vmsvga3dBackCreateTexture(pState, pContext, pContext->id, pDstSurface);
449 AssertRCReturn(rc, rc);
450 }
451
452 PVMSVGA3DMIPMAPLEVEL pSrcMipmapLevel;
453 rc = vmsvga3dMipmapLevel(pSrcSurface, pSrcSfcImg->face, pSrcSfcImg->mipmap, &pSrcMipmapLevel);
454 AssertRCReturn(rc, rc);
455
456 PVMSVGA3DMIPMAPLEVEL pDstMipmapLevel;
457 rc = vmsvga3dMipmapLevel(pDstSurface, pDstSfcImg->face, pDstSfcImg->mipmap, &pDstMipmapLevel);
458 AssertRCReturn(rc, rc);
459
460 SVGA3dBox clipSrcBox = *pSrcBox;
461 SVGA3dBox clipDstBox = *pDstBox;
462 vmsvgaR3ClipBox(&pSrcMipmapLevel->mipmapSize, &clipSrcBox);
463 vmsvgaR3ClipBox(&pDstMipmapLevel->mipmapSize, &clipDstBox);
464
465 return vmsvga3dBackSurfaceStretchBlt(pThis, pState,
466 pDstSurface, pDstSfcImg->face, pDstSfcImg->mipmap, &clipDstBox,
467 pSrcSurface, pSrcSfcImg->face, pSrcSfcImg->mipmap, &clipSrcBox,
468 enmMode, pContext);
469}
470
471/**
472 * Implements the SVGA_3D_CMD_SURFACE_DMA command (fifo).
473 *
474 * @returns VBox status code (currently ignored).
475 * @param pThis The shared VGA/VMSVGA instance data.
476 * @param pThisCC The VGA/VMSVGA state for ring-3.
477 * @param guest .
478 * @param host .
479 * @param transfer .
480 * @param cCopyBoxes .
481 * @param paBoxes .
482 */
483int vmsvga3dSurfaceDMA(PVGASTATE pThis, PVGASTATECC pThisCC, SVGAGuestImage guest, SVGA3dSurfaceImageId host,
484 SVGA3dTransferType transfer, uint32_t cCopyBoxes, SVGA3dCopyBox *paBoxes)
485{
486 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
487 AssertReturn(pState, VERR_NO_MEMORY);
488
489 PVMSVGA3DSURFACE pSurface;
490 int rc = vmsvga3dSurfaceFromSid(pState, host.sid, &pSurface);
491 AssertRCReturn(rc, rc);
492
493 LogFunc(("%sguestptr gmr=%x offset=%x pitch=%x host sid=%u face=%d mipmap=%d transfer=%s cCopyBoxes=%d\n",
494 (pSurface->surfaceFlags & SVGA3D_SURFACE_HINT_TEXTURE) ? "TEXTURE " : "",
495 guest.ptr.gmrId, guest.ptr.offset, guest.pitch,
496 host.sid, host.face, host.mipmap, (transfer == SVGA3D_WRITE_HOST_VRAM) ? "READ" : "WRITE", cCopyBoxes));
497
498 PVMSVGA3DMIPMAPLEVEL pMipLevel;
499 rc = vmsvga3dMipmapLevel(pSurface, host.face, host.mipmap, &pMipLevel);
500 AssertRCReturn(rc, rc);
501
502 PVMSVGA3DCONTEXT pContext = NULL;
503 if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
504 {
505 /*
506 * Not realized in host hardware/library yet, we have to work with
507 * the copy of the data we've got in VMSVGA3DMIMAPLEVEL::pSurfaceData.
508 */
509 AssertReturn(pMipLevel->pSurfaceData, VERR_INTERNAL_ERROR);
510 }
511 else
512 {
513#ifdef VMSVGA3D_DIRECT3D
514 /* Flush the drawing pipeline for this surface as it could be used in a shared context. */
515 vmsvga3dSurfaceFlush(pSurface);
516
517#else /* VMSVGA3D_OPENGL */
518 pContext = &pState->SharedCtx;
519 VMSVGA3D_SET_CURRENT_CONTEXT(pState, pContext);
520#endif
521 }
522
523 /* SVGA_3D_CMD_SURFACE_DMA:
524 * "define the 'source' in each copyBox as the guest image and the
525 * 'destination' as the host image, regardless of transfer direction."
526 */
527 for (uint32_t i = 0; i < cCopyBoxes; ++i)
528 {
529 Log(("Copy box (%s) %d (%d,%d,%d)(%d,%d,%d) dest (%d,%d)\n",
530 VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface) ? "hw" : "mem",
531 i, paBoxes[i].srcx, paBoxes[i].srcy, paBoxes[i].srcz, paBoxes[i].w, paBoxes[i].h, paBoxes[i].d, paBoxes[i].x, paBoxes[i].y));
532
533 /* Apparently we're supposed to clip it (gmr test sample) */
534
535 /* The copybox's "dest" is coords in the host surface. Verify them against the surface's mipmap size. */
536 SVGA3dBox hostBox;
537 hostBox.x = paBoxes[i].x;
538 hostBox.y = paBoxes[i].y;
539 hostBox.z = paBoxes[i].z;
540 hostBox.w = paBoxes[i].w;
541 hostBox.h = paBoxes[i].h;
542 hostBox.d = paBoxes[i].d;
543 vmsvgaR3ClipBox(&pMipLevel->mipmapSize, &hostBox);
544
545 if ( !hostBox.w
546 || !hostBox.h
547 || !hostBox.d)
548 {
549 Log(("Skip empty box\n"));
550 continue;
551 }
552 RT_UNTRUSTED_VALIDATED_FENCE();
553
554 /* Adjust the guest, i.e. "src", point.
555 * Do not try to verify them here because vmsvgaR3GmrTransfer takes care of this.
556 */
557 uint32_t const srcx = paBoxes[i].srcx + (hostBox.x - paBoxes[i].x);
558 uint32_t const srcy = paBoxes[i].srcy + (hostBox.y - paBoxes[i].y);
559 uint32_t const srcz = paBoxes[i].srcz + (hostBox.z - paBoxes[i].z);
560
561 /* Calculate offsets of the image blocks for the transfer. */
562 uint32_t u32HostBlockX;
563 uint32_t u32HostBlockY;
564 uint32_t u32GuestBlockX;
565 uint32_t u32GuestBlockY;
566 uint32_t cBlocksX;
567 uint32_t cBlocksY;
568 if (RT_LIKELY(pSurface->cxBlock == 1 && pSurface->cyBlock == 1))
569 {
570 u32HostBlockX = hostBox.x;
571 u32HostBlockY = hostBox.y;
572
573 u32GuestBlockX = srcx;
574 u32GuestBlockY = srcy;
575
576 cBlocksX = hostBox.w;
577 cBlocksY = hostBox.h;
578 }
579 else
580 {
581 /* Pixels to blocks. */
582 u32HostBlockX = hostBox.x / pSurface->cxBlock;
583 u32HostBlockY = hostBox.y / pSurface->cyBlock;
584 Assert(u32HostBlockX * pSurface->cxBlock == hostBox.x);
585 Assert(u32HostBlockY * pSurface->cyBlock == hostBox.y);
586
587 u32GuestBlockX = srcx / pSurface->cxBlock;
588 u32GuestBlockY = srcy / pSurface->cyBlock;
589 Assert(u32GuestBlockX * pSurface->cxBlock == srcx);
590 Assert(u32GuestBlockY * pSurface->cyBlock == srcy);
591
592 cBlocksX = (hostBox.w + pSurface->cxBlock - 1) / pSurface->cxBlock;
593 cBlocksY = (hostBox.h + pSurface->cyBlock - 1) / pSurface->cyBlock;
594 }
595
596 uint32_t cbGuestPitch = guest.pitch;
597 if (cbGuestPitch == 0)
598 {
599 /* Host must "assume image is tightly packed". Our surfaces are. */
600 cbGuestPitch = pMipLevel->cbSurfacePitch;
601 }
602 else
603 {
604 /* vmsvgaR3GmrTransfer will verify the value, just check it is sane. */
605 AssertReturn(cbGuestPitch <= SVGA3D_MAX_SURFACE_MEM_SIZE, VERR_INVALID_PARAMETER);
606 RT_UNTRUSTED_VALIDATED_FENCE();
607 }
608
609 /* srcx, srcy and srcz values are used to calculate the guest offset.
610 * The offset will be verified by vmsvgaR3GmrTransfer, so just check for overflows here.
611 */
612 AssertReturn(srcz < UINT32_MAX / pMipLevel->mipmapSize.height / cbGuestPitch, VERR_INVALID_PARAMETER);
613 AssertReturn(u32GuestBlockY < UINT32_MAX / cbGuestPitch, VERR_INVALID_PARAMETER);
614 AssertReturn(u32GuestBlockX < UINT32_MAX / pSurface->cbBlock, VERR_INVALID_PARAMETER);
615 RT_UNTRUSTED_VALIDATED_FENCE();
616
617 if ( !VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface)
618 || VMSVGA3DSURFACE_NEEDS_DATA(pSurface))
619 {
620 uint64_t uGuestOffset = u32GuestBlockX * pSurface->cbBlock +
621 u32GuestBlockY * cbGuestPitch +
622 srcz * pMipLevel->mipmapSize.height * cbGuestPitch;
623 AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
624
625 /* vmsvga3dSurfaceDefine verifies the surface dimensions and clipBox is within them. */
626 uint32_t uHostOffset = u32HostBlockX * pSurface->cbBlock +
627 u32HostBlockY * pMipLevel->cbSurfacePitch +
628 hostBox.z * pMipLevel->cbSurfacePlane;
629 AssertReturn(uHostOffset < pMipLevel->cbSurface, VERR_INTERNAL_ERROR);
630
631 for (uint32_t z = 0; z < hostBox.d; ++z)
632 {
633 rc = vmsvgaR3GmrTransfer(pThis,
634 pThisCC,
635 transfer,
636 (uint8_t *)pMipLevel->pSurfaceData,
637 pMipLevel->cbSurface,
638 uHostOffset,
639 (int32_t)pMipLevel->cbSurfacePitch,
640 guest.ptr,
641 (uint32_t)uGuestOffset,
642 cbGuestPitch,
643 cBlocksX * pSurface->cbBlock,
644 cBlocksY);
645 AssertRC(rc);
646
647 Log4(("first line [z=%d] (updated at offset 0x%x):\n%.*Rhxd\n",
648 z, uHostOffset, pMipLevel->cbSurfacePitch, pMipLevel->pSurfaceData));
649
650 uHostOffset += pMipLevel->cbSurfacePlane;
651 uGuestOffset += pMipLevel->mipmapSize.height * cbGuestPitch;
652 AssertReturn(uGuestOffset < UINT32_MAX, VERR_INVALID_PARAMETER);
653 }
654 }
655
656 if (VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
657 {
658 SVGA3dCopyBox clipBox;
659 clipBox.x = hostBox.x;
660 clipBox.y = hostBox.y;
661 clipBox.z = hostBox.z;
662 clipBox.w = hostBox.w;
663 clipBox.h = hostBox.h;
664 clipBox.d = hostBox.d;
665 clipBox.srcx = srcx;
666 clipBox.srcy = srcy;
667 clipBox.srcz = srcz;
668 rc = vmsvga3dBackSurfaceDMACopyBox(pThis, pThisCC, pState, pSurface, pMipLevel, host.face, host.mipmap,
669 guest.ptr, cbGuestPitch, transfer,
670 &clipBox, pContext, rc, i);
671 AssertRC(rc);
672 }
673 }
674
675 if (!VMSVGA3DSURFACE_HAS_HW_SURFACE(pSurface))
676 {
677 pMipLevel->fDirty = true;
678 pSurface->fDirty = true;
679 }
680
681 return rc;
682}
683
684static int vmsvga3dQueryWriteResult(PVGASTATE pThis, PVGASTATECC pThisCC, SVGAGuestPtr guestResult,
685 SVGA3dQueryState enmState, uint32_t u32Result)
686{
687 SVGA3dQueryResult queryResult;
688 queryResult.totalSize = sizeof(queryResult); /* Set by guest before query is ended. */
689 queryResult.state = enmState; /* Set by host or guest. See SVGA3dQueryState. */
690 queryResult.result32 = u32Result;
691
692 int rc = vmsvgaR3GmrTransfer(pThis, pThisCC, SVGA3D_READ_HOST_VRAM,
693 (uint8_t *)&queryResult, sizeof(queryResult), 0, sizeof(queryResult),
694 guestResult, 0, sizeof(queryResult), sizeof(queryResult), 1);
695 AssertRC(rc);
696 return rc;
697}
698
699int vmsvga3dQueryBegin(PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type)
700{
701 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
702 AssertReturn(pState, VERR_NO_MEMORY);
703
704 LogFunc(("cid=%u type=%d\n", cid, type));
705
706 PVMSVGA3DCONTEXT pContext;
707 int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
708 AssertRCReturn(rc, rc);
709
710 if (type == SVGA3D_QUERYTYPE_OCCLUSION)
711 {
712 VMSVGA3DQUERY *p = &pContext->occlusion;
713 if (!VMSVGA3DQUERY_EXISTS(p))
714 {
715 /* Lazy creation of the query object. */
716 rc = vmsvga3dOcclusionQueryCreate(pState, pContext);
717 AssertRCReturn(rc, rc);
718 }
719
720 rc = vmsvga3dOcclusionQueryBegin(pState, pContext);
721 AssertRCReturn(rc, rc);
722
723 p->enmQueryState = VMSVGA3DQUERYSTATE_BUILDING;
724 p->u32QueryResult = 0;
725
726 return VINF_SUCCESS;
727 }
728
729 /* Nothing else for VGPU9. */
730 AssertFailedReturn(VERR_NOT_IMPLEMENTED);
731}
732
733int vmsvga3dQueryEnd(PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type, SVGAGuestPtr guestResult)
734{
735 RT_NOREF(guestResult);
736 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
737 AssertReturn(pState, VERR_NO_MEMORY);
738
739 LogFunc(("cid=%u type=%d guestResult %d:0x%x\n", cid, type, guestResult.gmrId, guestResult.offset));
740
741 PVMSVGA3DCONTEXT pContext;
742 int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
743 AssertRCReturn(rc, rc);
744
745 if (type == SVGA3D_QUERYTYPE_OCCLUSION)
746 {
747 VMSVGA3DQUERY *p = &pContext->occlusion;
748 Assert(p->enmQueryState == VMSVGA3DQUERYSTATE_BUILDING);
749 AssertMsgReturn(VMSVGA3DQUERY_EXISTS(p), ("Query is NULL\n"), VERR_INTERNAL_ERROR);
750
751 rc = vmsvga3dOcclusionQueryEnd(pState, pContext);
752 AssertRCReturn(rc, rc);
753
754 p->enmQueryState = VMSVGA3DQUERYSTATE_ISSUED;
755
756 /* Do not touch guestResult, because the guest will call WaitForQuery. */
757 return VINF_SUCCESS;
758 }
759
760 /* Nothing else for VGPU9. */
761 AssertFailedReturn(VERR_NOT_IMPLEMENTED);
762}
763
764int vmsvga3dQueryWait(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t cid, SVGA3dQueryType type, SVGAGuestPtr guestResult)
765{
766 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
767 AssertReturn(pState, VERR_NO_MEMORY);
768
769 LogFunc(("cid=%u type=%d guestResult GMR%d:0x%x\n", cid, type, guestResult.gmrId, guestResult.offset));
770
771 PVMSVGA3DCONTEXT pContext;
772 int rc = vmsvga3dContextFromCid(pState, cid, &pContext);
773 AssertRCReturn(rc, rc);
774
775 if (type == SVGA3D_QUERYTYPE_OCCLUSION)
776 {
777 VMSVGA3DQUERY *p = &pContext->occlusion;
778 if (VMSVGA3DQUERY_EXISTS(p))
779 {
780 if (p->enmQueryState == VMSVGA3DQUERYSTATE_ISSUED)
781 {
782 /* Only if not already in SIGNALED state,
783 * i.e. not a second read from the guest or after restoring saved state.
784 */
785 uint32_t u32Pixels = 0;
786 rc = vmsvga3dOcclusionQueryGetData(pState, pContext, &u32Pixels);
787 if (RT_SUCCESS(rc))
788 {
789 p->enmQueryState = VMSVGA3DQUERYSTATE_SIGNALED;
790 p->u32QueryResult += u32Pixels; /* += because it might contain partial result from saved state. */
791 }
792 }
793
794 if (RT_SUCCESS(rc))
795 {
796 /* Return data to the guest. */
797 vmsvga3dQueryWriteResult(pThis, pThisCC, guestResult, SVGA3D_QUERYSTATE_SUCCEEDED, p->u32QueryResult);
798 return VINF_SUCCESS;
799 }
800 }
801 else
802 {
803 AssertMsgFailed(("GetData Query is NULL\n"));
804 }
805
806 rc = VERR_INTERNAL_ERROR;
807 }
808 else
809 {
810 rc = VERR_NOT_IMPLEMENTED;
811 }
812
813 vmsvga3dQueryWriteResult(pThis, pThisCC, guestResult, SVGA3D_QUERYSTATE_FAILED, 0);
814 AssertFailedReturn(rc);
815}
816
817int vmsvga3dSurfaceBlitToScreen(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t idDstScreen, SVGASignedRect destRect,
818 SVGA3dSurfaceImageId srcImage, SVGASignedRect srcRect, uint32_t cRects, SVGASignedRect *pRect)
819{
820 /* Requires SVGA_FIFO_CAP_SCREEN_OBJECT support */
821 LogFunc(("dest=%d (%d,%d)(%d,%d) sid=%u (face=%d, mipmap=%d) (%d,%d)(%d,%d) cRects=%d\n",
822 idDstScreen, destRect.left, destRect.top, destRect.right, destRect.bottom, srcImage.sid, srcImage.face, srcImage.mipmap,
823 srcRect.left, srcRect.top, srcRect.right, srcRect.bottom, cRects));
824 for (uint32_t i = 0; i < cRects; i++)
825 {
826 LogFunc(("clipping rect %d (%d,%d)(%d,%d)\n", i, pRect[i].left, pRect[i].top, pRect[i].right, pRect[i].bottom));
827 }
828
829 VMSVGASCREENOBJECT *pScreen = vmsvgaR3GetScreenObject(pThisCC, idDstScreen);
830 AssertReturn(pScreen, VERR_INTERNAL_ERROR);
831
832 /* vmwgfx driver does not always initialize srcImage.mipmap and srcImage.face. They are assumed to be zero. */
833 SVGA3dSurfaceImageId src;
834 src.sid = srcImage.sid;
835 src.mipmap = 0;
836 src.face = 0;
837
838 if (pScreen->pHwScreen)
839 {
840 /* Use the backend accelerated method, if available. */
841 int rc = vmsvga3dBackSurfaceBlitToScreen(pThisCC, pScreen,
842 destRect, src, srcRect, cRects, pRect);
843 if (rc == VINF_SUCCESS)
844 {
845 return VINF_SUCCESS;
846 }
847 }
848
849 /** @todo scaling */
850 AssertReturn(destRect.right - destRect.left == srcRect.right - srcRect.left && destRect.bottom - destRect.top == srcRect.bottom - srcRect.top, VERR_INVALID_PARAMETER);
851
852 SVGA3dCopyBox box;
853 SVGAGuestImage dest;
854
855 box.srcz = 0;
856 box.z = 0;
857 box.d = 1;
858
859 dest.ptr.gmrId = SVGA_GMR_FRAMEBUFFER;
860 dest.ptr.offset = pScreen->offVRAM;
861 dest.pitch = pScreen->cbPitch;
862
863 if (cRects == 0)
864 {
865 /* easy case; no clipping */
866
867 /* SVGA_3D_CMD_SURFACE_DMA:
868 * 'define the "source" in each copyBox as the guest image and the
869 * "destination" as the host image, regardless of transfer direction.'
870 *
871 * Since the BlitToScreen operation transfers from a host surface to the guest VRAM,
872 * it must set the copyBox "source" to the guest destination coords and
873 * the copyBox "destination" to the host surface source coords.
874 */
875 /* Host image. */
876 box.x = srcRect.left;
877 box.y = srcRect.top;
878 box.w = srcRect.right - srcRect.left;
879 box.h = srcRect.bottom - srcRect.top;
880 /* Guest image. */
881 box.srcx = destRect.left;
882 box.srcy = destRect.top;
883
884 int rc = vmsvga3dSurfaceDMA(pThis, pThisCC, dest, src, SVGA3D_READ_HOST_VRAM, 1, &box);
885 AssertRCReturn(rc, rc);
886
887 /* Update the guest image, which is at box.src. */
888 vmsvgaR3UpdateScreen(pThisCC, pScreen, box.srcx, box.srcy, box.w, box.h);
889 }
890 else
891 {
892 /** @todo merge into one SurfaceDMA call */
893 for (uint32_t i = 0; i < cRects; i++)
894 {
895 /* "The clip rectangle coordinates are measured
896 * relative to the top-left corner of destRect."
897 * Therefore they are relative to the top-left corner of srcRect as well.
898 */
899
900 /* Host image. See 'SVGA_3D_CMD_SURFACE_DMA:' comment in the 'if' branch. */
901 box.x = srcRect.left + pRect[i].left;
902 box.y = srcRect.top + pRect[i].top;
903 box.w = pRect[i].right - pRect[i].left;
904 box.h = pRect[i].bottom - pRect[i].top;
905 /* Guest image. The target screen memory is currently in the guest VRAM. */
906 box.srcx = destRect.left + pRect[i].left;
907 box.srcy = destRect.top + pRect[i].top;
908
909 int rc = vmsvga3dSurfaceDMA(pThis, pThisCC, dest, src, SVGA3D_READ_HOST_VRAM, 1, &box);
910 AssertRCReturn(rc, rc);
911
912 /* Update the guest image, which is at box.src. */
913 vmsvgaR3UpdateScreen(pThisCC, pScreen, box.srcx, box.srcy, box.w, box.h);
914 }
915 }
916
917 return VINF_SUCCESS;
918}
919
920int vmsvga3dCommandPresent(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t sid, uint32_t cRects, SVGA3dCopyRect *pRect)
921{
922 /* Deprecated according to svga3d_reg.h. */
923 PVMSVGA3DSTATE pState = pThisCC->svga.p3dState;
924 AssertReturn(pState, VERR_NO_MEMORY);
925
926 PVMSVGA3DSURFACE pSurface;
927 int rc = vmsvga3dSurfaceFromSid(pState, sid, &pSurface);
928 AssertRCReturn(rc, rc);
929
930 /** @todo Detect screen from coords? Or split rect to screens? */
931 VMSVGASCREENOBJECT *pScreen = vmsvgaR3GetScreenObject(pThisCC, 0);
932 AssertReturn(pScreen, VERR_INTERNAL_ERROR);
933
934 /* If there are no recangles specified, just grab a screenful. */
935 SVGA3dCopyRect DummyRect;
936 if (cRects != 0)
937 { /* likely */ }
938 else
939 {
940 /** @todo Find the usecase for this or check what the original device does.
941 * The original code was doing some scaling based on the surface
942 * size... */
943 AssertMsgFailed(("No rects to present. Who is doing that and what do they actually expect?\n"));
944 DummyRect.x = DummyRect.srcx = 0;
945 DummyRect.y = DummyRect.srcy = 0;
946 DummyRect.w = pScreen->cWidth;
947 DummyRect.h = pScreen->cHeight;
948 cRects = 1;
949 pRect = &DummyRect;
950 }
951
952 uint32_t i;
953 for (i = 0; i < cRects; ++i)
954 {
955 uint32_t idDstScreen = 0; /** @todo Use virtual coords: SVGA_ID_INVALID. */
956 SVGASignedRect destRect;
957 destRect.left = pRect[i].x;
958 destRect.top = pRect[i].y;
959 destRect.right = pRect[i].x + pRect[i].w;
960 destRect.bottom = pRect[i].y + pRect[i].h;
961
962 SVGA3dSurfaceImageId src;
963 src.sid = sid;
964 src.face = 0;
965 src.mipmap = 0;
966
967 SVGASignedRect srcRect;
968 srcRect.left = pRect[i].srcx;
969 srcRect.top = pRect[i].srcy;
970 srcRect.right = pRect[i].srcx + pRect[i].w;
971 srcRect.bottom = pRect[i].srcy + pRect[i].h;
972
973 /* Entire rect. */
974 rc = vmsvga3dSurfaceBlitToScreen(pThis, pThisCC, idDstScreen, destRect, src, srcRect, 0, NULL);
975 AssertRCReturn(rc, rc);
976 }
977
978 return VINF_SUCCESS;
979}
980
981int vmsvga3dDefineScreen(PVGASTATE pThis, PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
982{
983 if (pScreen->pHwScreen)
984 {
985 vmsvga3dBackDestroyScreen(pThisCC, pScreen);
986 }
987
988 int rc = vmsvga3dBackDefineScreen(pThis, pThisCC, pScreen);
989 if (RT_SUCCESS(rc))
990 {
991 LogRelMax(1, ("VMSVGA: using accelerated graphics output\n"));
992 }
993 return rc;
994}
995
996int vmsvga3dDestroyScreen(PVGASTATECC pThisCC, VMSVGASCREENOBJECT *pScreen)
997{
998 return vmsvga3dBackDestroyScreen(pThisCC, pScreen);
999}
Note: See TracBrowser for help on using the repository browser.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette