1 | /* $Id: DevVGA.h 53205 2014-11-04 15:57:21Z vboxsync $ */
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2 | /** @file
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3 | * DevVGA - VBox VGA/VESA device, internal header.
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2006-2013 Oracle Corporation
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8 | *
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9 | * This file is part of VirtualBox Open Source Edition (OSE), as
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10 | * available from http://www.virtualbox.org. This file is free software;
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11 | * you can redistribute it and/or modify it under the terms of the GNU
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12 | * General Public License (GPL) as published by the Free Software
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13 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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14 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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15 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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16 | * --------------------------------------------------------------------
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17 | *
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18 | * This code is based on:
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19 | *
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20 | * QEMU internal VGA defines.
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21 | *
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22 | * Copyright (c) 2003-2004 Fabrice Bellard
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23 | *
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24 | * Permission is hereby granted, free of charge, to any person obtaining a copy
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25 | * of this software and associated documentation files (the "Software"), to deal
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26 | * in the Software without restriction, including without limitation the rights
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27 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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28 | * copies of the Software, and to permit persons to whom the Software is
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29 | * furnished to do so, subject to the following conditions:
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30 | *
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31 | * The above copyright notice and this permission notice shall be included in
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32 | * all copies or substantial portions of the Software.
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33 | *
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34 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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35 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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36 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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37 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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38 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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39 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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40 | * THE SOFTWARE.
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41 | */
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42 |
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43 | /** Use VBE bytewise I/O. Only needed for Windows Longhorn/Vista betas and backwards compatibility. */
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44 | #define VBE_BYTEWISE_IO
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45 |
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46 | /** Use VBE new dynamic mode list.
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47 | * If this is not defined, no checks are carried out to see if the modes all
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48 | * fit into the framebuffer! See the VRAM_SIZE_FIX define. */
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49 | #define VBE_NEW_DYN_LIST
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50 |
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51 | #ifdef VBOX
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52 | /** The default amount of VRAM. */
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53 | # define VGA_VRAM_DEFAULT (_4M)
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54 | /** The maximum amount of VRAM. Limited by VBOX_MAX_ALLOC_PAGE_COUNT. */
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55 | # define VGA_VRAM_MAX (256 * _1M)
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56 | /** The minimum amount of VRAM. */
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57 | # define VGA_VRAM_MIN (_1M)
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58 | #endif
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59 |
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60 | #include <VBox/Hardware/VBoxVideoVBE.h>
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61 |
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62 | #ifdef VBOX_WITH_HGSMI
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63 | # include "HGSMI/HGSMIHost.h"
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64 | #endif /* VBOX_WITH_HGSMI */
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65 | #include "DevVGASavedState.h"
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66 |
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67 | #ifdef VBOX_WITH_VMSVGA
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68 | # include "DevVGA-SVGA.h"
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69 | #endif
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70 |
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71 | # include <iprt/list.h>
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72 |
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73 | #define MSR_COLOR_EMULATION 0x01
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74 | #define MSR_PAGE_SELECT 0x20
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75 |
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76 | #define ST01_V_RETRACE 0x08
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77 | #define ST01_DISP_ENABLE 0x01
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78 |
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79 | /* bochs VBE support */
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80 | #define CONFIG_BOCHS_VBE
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81 |
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82 | #ifdef CONFIG_BOCHS_VBE
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83 |
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84 | /* Cross reference with <VBox/Hardware/VBoxVideoVBE.h> */
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85 | #define VBE_DISPI_INDEX_NB_SAVED 0xb /* Number of saved registers (vbe_regs array) */
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86 | #define VBE_DISPI_INDEX_NB 0xc /* Total number of VBE registers */
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87 |
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88 | #define VGA_STATE_COMMON_BOCHS_VBE \
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89 | uint16_t vbe_index; \
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90 | uint16_t vbe_regs[VBE_DISPI_INDEX_NB]; \
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91 | uint16_t alignment[3]; /* pad to 64 bits */ \
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92 | uint32_t vbe_start_addr; \
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93 | uint32_t vbe_line_offset; \
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94 | uint32_t vbe_bank_max;
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95 |
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96 | #else
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97 |
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98 | #define VGA_STATE_COMMON_BOCHS_VBE
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99 |
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100 | #endif /* !CONFIG_BOCHS_VBE */
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101 |
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102 | #define CH_ATTR_SIZE (160 * 100)
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103 | #define VGA_MAX_HEIGHT VBE_DISPI_MAX_YRES
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104 |
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105 | typedef struct vga_retrace_s {
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106 | unsigned frame_cclks; /* Character clocks per frame. */
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107 | unsigned frame_ns; /* Frame duration in ns. */
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108 | unsigned cclk_ns; /* Character clock duration in ns. */
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109 | unsigned vb_start; /* Vertical blanking start (scanline). */
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110 | unsigned vb_end; /* Vertical blanking end (scanline). */
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111 | unsigned vb_end_ns; /* Vertical blanking end time (length) in ns. */
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112 | unsigned vs_start; /* Vertical sync start (scanline). */
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113 | unsigned vs_end; /* Vertical sync end (scanline). */
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114 | unsigned vs_start_ns; /* Vertical sync start time in ns. */
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115 | unsigned vs_end_ns; /* Vertical sync end time in ns. */
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116 | unsigned h_total; /* Horizontal total (cclks per scanline). */
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117 | unsigned h_total_ns; /* Scanline duration in ns. */
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118 | unsigned hb_start; /* Horizontal blanking start (cclk). */
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119 | unsigned hb_end; /* Horizontal blanking end (cclk). */
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120 | unsigned hb_end_ns; /* Horizontal blanking end time (length) in ns. */
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121 | unsigned v_freq_hz; /* Vertical refresh rate to emulate. */
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122 | } vga_retrace_s;
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123 |
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124 | #ifndef VBOX
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125 | #define VGA_STATE_COMMON \
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126 | uint8_t *vram_ptr; \
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127 | unsigned long vram_offset; \
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128 | unsigned int vram_size; \
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129 | uint32_t latch; \
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130 | uint8_t sr_index; \
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131 | uint8_t sr[256]; \
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132 | uint8_t gr_index; \
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133 | uint8_t gr[256]; \
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134 | uint8_t ar_index; \
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135 | uint8_t ar[21]; \
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136 | int ar_flip_flop; \
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137 | uint8_t cr_index; \
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138 | uint8_t cr[256]; /* CRT registers */ \
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139 | uint8_t msr; /* Misc Output Register */ \
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140 | uint8_t fcr; /* Feature Control Register */ \
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141 | uint8_t st00; /* status 0 */ \
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142 | uint8_t st01; /* status 1 */ \
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143 | uint8_t dac_state; \
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144 | uint8_t dac_sub_index; \
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145 | uint8_t dac_read_index; \
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146 | uint8_t dac_write_index; \
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147 | uint8_t dac_cache[3]; /* used when writing */ \
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148 | uint8_t palette[768]; \
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149 | int32_t bank_offset; \
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150 | int (*get_bpp)(struct VGAState *s); \
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151 | void (*get_offsets)(struct VGAState *s, \
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152 | uint32_t *pline_offset, \
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153 | uint32_t *pstart_addr, \
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154 | uint32_t *pline_compare); \
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155 | void (*get_resolution)(struct VGAState *s, \
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156 | int *pwidth, \
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157 | int *pheight); \
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158 | VGA_STATE_COMMON_BOCHS_VBE \
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159 | /* display refresh support */ \
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160 | DisplayState *ds; \
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161 | uint32_t font_offsets[2]; \
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162 | int graphic_mode; \
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163 | uint8_t shift_control; \
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164 | uint8_t double_scan; \
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165 | uint32_t line_offset; \
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166 | uint32_t line_compare; \
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167 | uint32_t start_addr; \
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168 | uint32_t plane_updated; \
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169 | uint8_t last_cw, last_ch; \
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170 | uint32_t last_width, last_height; /* in chars or pixels */ \
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171 | uint32_t last_scr_width, last_scr_height; /* in pixels */ \
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172 | uint8_t cursor_start, cursor_end; \
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173 | uint32_t cursor_offset; \
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174 | unsigned int (*rgb_to_pixel)(unsigned int r, \
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175 | unsigned int g, unsigned b); \
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176 | /* hardware mouse cursor support */ \
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177 | uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32]; \
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178 | void (*cursor_invalidate)(struct VGAState *s); \
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179 | void (*cursor_draw_line)(struct VGAState *s, uint8_t *d, int y); \
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180 | /* tell for each page if it has been updated since the last time */ \
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181 | uint32_t last_palette[256]; \
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182 | uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
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183 |
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184 | #else /* VBOX */
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185 |
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186 | /* bird: Since we've changed types, reordered members, done alignment
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187 | paddings and more, VGA_STATE_COMMON was added directly to the
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188 | struct to make it more readable and easier to handle. */
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189 |
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190 | struct VGAState;
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191 | typedef int FNGETBPP(struct VGAState *s);
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192 | typedef void FNGETOFFSETS(struct VGAState *s, uint32_t *pline_offset, uint32_t *pstart_addr, uint32_t *pline_compare);
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193 | typedef void FNGETRESOLUTION(struct VGAState *s, int *pwidth, int *pheight);
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194 | typedef unsigned int FNRGBTOPIXEL(unsigned int r, unsigned int g, unsigned b);
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195 | typedef void FNCURSORINVALIDATE(struct VGAState *s);
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196 | typedef void FNCURSORDRAWLINE(struct VGAState *s, uint8_t *d, int y);
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197 |
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198 | #endif /* VBOX */
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199 |
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200 | #ifdef VBOX_WITH_VDMA
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201 | typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
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202 | #endif
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203 |
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204 | #ifdef VBOX_WITH_VIDEOHWACCEL
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205 | #define VBOX_VHWA_MAX_PENDING_COMMANDS 1000
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206 |
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207 | typedef struct _VBOX_VHWA_PENDINGCMD
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208 | {
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209 | RTLISTNODE Node;
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210 | PVBOXVHWACMD pCommand;
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211 | } VBOX_VHWA_PENDINGCMD;
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212 | #endif
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213 |
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214 | #ifdef VBOX_WITH_VMSVGA
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215 |
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216 | #define VMSVGA_FIFO_EXTCMD_NONE 0
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217 | #define VMSVGA_FIFO_EXTCMD_TERMINATE 1
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218 | #define VMSVGA_FIFO_EXTCMD_SAVESTATE 2
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219 | #define VMSVGA_FIFO_EXTCMD_LOADSTATE 3
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220 | #define VMSVGA_FIFO_EXTCMD_RESET 4
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221 |
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222 | typedef struct
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223 | {
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224 | PSSMHANDLE pSSM;
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225 | uint32_t uVersion;
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226 | uint32_t uPass;
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227 | } VMSVGA_STATE_LOAD, *PVMSVGA_STATE_LOAD;
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228 |
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229 | typedef struct
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230 | {
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231 | /** The host window handle */
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232 | uint64_t u64HostWindowId;
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233 | /** The R3 FIFO pointer. */
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234 | R3PTRTYPE(uint32_t *) pFIFOR3;
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235 | /** The R0 FIFO pointer. */
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236 | R0PTRTYPE(uint32_t *) pFIFOR0;
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237 | /** R3 Opaque pointer to svga state. */
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238 | R3PTRTYPE(void *) pSVGAState;
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239 | /** R3 Opaque pointer to 3d state. */
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240 | R3PTRTYPE(void *) p3dState;
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241 | /** R3 Opaque pointer to a copy of the first 32k of the framebuffer before switching into svga mode. */
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242 | R3PTRTYPE(void *) pFrameBufferBackup;
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243 | /** R3 Opaque pointer to an external fifo cmd parameter. */
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244 | R3PTRTYPE(void *) pFIFOExtCmdParam;
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245 |
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246 | /** Guest physical address of the FIFO memory range. */
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247 | RTGCPHYS GCPhysFIFO;
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248 | /** Size in bytes of the FIFO memory range. */
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249 | uint32_t cbFIFO;
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250 | /** SVGA id. */
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251 | uint32_t u32SVGAId;
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252 | /** SVGA extensions enabled or not. */
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253 | uint32_t fEnabled;
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254 | /** SVGA memory area configured status. */
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255 | uint32_t fConfigured;
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256 | /** Device is busy handling FIFO requests. */
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257 | uint32_t fBusy;
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258 | /** Traces (dirty page detection) enabled or not. */
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259 | uint32_t fTraces;
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260 | /** Guest OS identifier. */
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261 | uint32_t u32GuestId;
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262 | /** Scratch region size. */
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263 | uint32_t cScratchRegion;
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264 | /** Scratch array. */
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265 | uint32_t au32ScratchRegion[VMSVGA_SCRATCH_SIZE];
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266 | /** Irq status. */
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267 | uint32_t u32IrqStatus;
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268 | /** Irq mask. */
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269 | uint32_t u32IrqMask;
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270 | /** Pitch lock. */
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271 | uint32_t u32PitchLock;
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272 | /** Current GMR id. (SVGA_REG_GMR_ID) */
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273 | uint32_t u32CurrentGMRId;
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274 | /** Register caps. */
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275 | uint32_t u32RegCaps;
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276 | uint32_t Padding2;
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277 | /** Physical address of command mmio range. */
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278 | RTIOPORT BasePort;
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279 | /** Port io index register. */
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280 | uint32_t u32IndexReg;
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281 | /** FIFO request semaphore. */
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282 | RTSEMEVENT FIFORequestSem;
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283 | /** FIFO external command semaphore. */
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284 | RTSEMEVENT FIFOExtCmdSem;
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285 | /** FIFO IO Thread. */
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286 | R3PTRTYPE(PPDMTHREAD) pFIFOIOThread;
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287 | uint32_t uWidth;
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288 | uint32_t uHeight;
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289 | uint32_t uBpp;
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290 | uint32_t cbScanline;
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291 | /** Maximum width supported. */
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292 | uint32_t u32MaxWidth;
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293 | /** Maximum height supported. */
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294 | uint32_t u32MaxHeight;
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295 | /** Viewport rectangle */
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296 | struct
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297 | {
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298 | uint32_t x;
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299 | uint32_t y;
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300 | uint32_t cx;
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301 | uint32_t cy;
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302 | } viewport;
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303 | /** Action flags */
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304 | uint32_t u32ActionFlags;
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305 | /** SVGA 3d extensions enabled or not. */
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306 | bool f3DEnabled;
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307 | /** VRAM page monitoring enabled or not. */
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308 | bool fVRAMTracking;
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309 | /** External command to be executed in the FIFO thread. */
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310 | uint8_t u8FIFOExtCommand;
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311 | bool Padding6[HC_ARCH_BITS == 64 ? 1 : 5];
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312 | } VMSVGAState;
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313 | #endif /* VBOX_WITH_VMSVGA */
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314 |
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315 |
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316 | typedef struct VGAState {
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317 | #ifndef VBOX
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318 | VGA_STATE_COMMON
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319 | #else /* VBOX */
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320 | R3PTRTYPE(uint8_t *) vram_ptrR3;
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321 | R3PTRTYPE(FNGETBPP *) get_bpp;
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322 | R3PTRTYPE(FNGETOFFSETS *) get_offsets;
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323 | R3PTRTYPE(FNGETRESOLUTION *) get_resolution;
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324 | R3PTRTYPE(FNRGBTOPIXEL *) rgb_to_pixel;
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325 | R3PTRTYPE(FNCURSORINVALIDATE *) cursor_invalidate;
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326 | R3PTRTYPE(FNCURSORDRAWLINE *) cursor_draw_line;
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327 | RTR3PTR R3PtrCmnAlignment;
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328 | uint32_t vram_size;
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329 | uint32_t latch;
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330 | uint8_t sr_index;
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331 | uint8_t sr[256];
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332 | uint8_t gr_index;
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333 | uint8_t gr[256];
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334 | uint8_t ar_index;
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335 | uint8_t ar[21];
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336 | int32_t ar_flip_flop;
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337 | uint8_t cr_index;
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338 | uint8_t cr[256]; /* CRT registers */
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339 | uint8_t msr; /* Misc Output Register */
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340 | uint8_t fcr; /* Feature Control Register */
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341 | uint8_t st00; /* status 0 */
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342 | uint8_t st01; /* status 1 */
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343 | uint8_t dac_state;
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344 | uint8_t dac_sub_index;
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345 | uint8_t dac_read_index;
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346 | uint8_t dac_write_index;
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347 | uint8_t dac_cache[3]; /* used when writing */
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348 | uint8_t palette[768];
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349 | int32_t bank_offset;
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350 | VGA_STATE_COMMON_BOCHS_VBE
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351 | /* display refresh support */
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352 | uint32_t font_offsets[2];
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353 | int32_t graphic_mode;
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354 | uint8_t shift_control;
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355 | uint8_t double_scan;
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356 | uint8_t padding1[2];
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357 | uint32_t line_offset;
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358 | uint32_t line_compare;
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359 | uint32_t start_addr;
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360 | uint32_t plane_updated;
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361 | uint8_t last_cw, last_ch, padding2[2];
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362 | uint32_t last_width, last_height; /* in chars or pixels */
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363 | uint32_t last_scr_width, last_scr_height; /* in pixels */
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364 | uint32_t last_bpp;
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365 | uint8_t cursor_start, cursor_end, padding3[2];
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366 | uint32_t cursor_offset;
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367 | /* hardware mouse cursor support */
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368 | uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32];
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369 | /* tell for each page if it has been updated since the last time */
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370 | uint32_t last_palette[256];
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371 | uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
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372 |
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373 | /** end-of-common-state-marker */
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374 | uint32_t u32Marker;
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375 |
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376 | /** Pointer to the device instance - RC Ptr. */
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377 | PPDMDEVINSRC pDevInsRC;
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378 | /** Pointer to the GC vram mapping. */
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379 | RCPTRTYPE(uint8_t *) vram_ptrRC;
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380 | uint32_t PaddingMinus1;
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381 |
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382 | /** Pointer to the device instance - R3 Ptr. */
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383 | PPDMDEVINSR3 pDevInsR3;
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384 | # ifdef VBOX_WITH_HGSMI
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385 | R3PTRTYPE(PHGSMIINSTANCE) pHGSMI;
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386 | # endif
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387 | # ifdef VBOX_WITH_VDMA
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388 | R3PTRTYPE(PVBOXVDMAHOST) pVdma;
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389 | # endif
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390 | /** LUN\#0: The display port base interface. */
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391 | PDMIBASE IBase;
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392 | /** LUN\#0: The display port interface. */
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393 | PDMIDISPLAYPORT IPort;
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394 | # if defined(VBOX_WITH_HGSMI) && (defined(VBOX_WITH_VIDEOHWACCEL) || defined(VBOX_WITH_CRHGSMI))
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395 | /** LUN\#0: VBVA callbacks interface */
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396 | PDMIDISPLAYVBVACALLBACKS IVBVACallbacks;
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397 | # endif
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398 | /** Status LUN\#0: Leds interface. */
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399 | PDMILEDPORTS ILeds;
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400 |
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401 | #if HC_ARCH_BITS == 32
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402 | uint32_t Padding2;
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403 | #endif
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404 |
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405 | /** Pointer to base interface of the driver. */
|
---|
406 | R3PTRTYPE(PPDMIBASE) pDrvBase;
|
---|
407 | /** Pointer to display connector interface of the driver. */
|
---|
408 | R3PTRTYPE(PPDMIDISPLAYCONNECTOR) pDrv;
|
---|
409 |
|
---|
410 | /** Status LUN: Partner of ILeds. */
|
---|
411 | R3PTRTYPE(PPDMILEDCONNECTORS) pLedsConnector;
|
---|
412 | /** Status LUN: Media Notifys. */
|
---|
413 | R3PTRTYPE(PPDMIMEDIANOTIFY) pMediaNotify;
|
---|
414 |
|
---|
415 | /** Refresh timer handle - HC. */
|
---|
416 | PTMTIMERR3 RefreshTimer;
|
---|
417 |
|
---|
418 | /** Pointer to the device instance - R0 Ptr. */
|
---|
419 | PPDMDEVINSR0 pDevInsR0;
|
---|
420 | /** The R0 vram pointer... */
|
---|
421 | R0PTRTYPE(uint8_t *) vram_ptrR0;
|
---|
422 |
|
---|
423 | #ifdef VBOX_WITH_VMSVGA
|
---|
424 | # if HC_ARCH_BITS == 32
|
---|
425 | uint32_t Padding3;
|
---|
426 | # endif
|
---|
427 | VMSVGAState svga;
|
---|
428 | #endif
|
---|
429 |
|
---|
430 | /** The number of monitors. */
|
---|
431 | uint32_t cMonitors;
|
---|
432 | /** Current refresh timer interval. */
|
---|
433 | uint32_t cMilliesRefreshInterval;
|
---|
434 | /** Bitmap tracking dirty pages. */
|
---|
435 | uint32_t au32DirtyBitmap[VGA_VRAM_MAX / PAGE_SIZE / 32];
|
---|
436 |
|
---|
437 | /** Flag indicating that there are dirty bits. This is used to optimize the handler resetting. */
|
---|
438 | bool fHasDirtyBits;
|
---|
439 | /** LFB was updated flag. */
|
---|
440 | bool fLFBUpdated;
|
---|
441 | /** Indicates if the GC extensions are enabled or not. */
|
---|
442 | bool fGCEnabled;
|
---|
443 | /** Indicates if the R0 extensions are enabled or not. */
|
---|
444 | bool fR0Enabled;
|
---|
445 | /** Flag indicating that the VGA memory in the 0xa0000-0xbffff region has been remapped to allow direct access. */
|
---|
446 | bool fRemappedVGA;
|
---|
447 | /** Whether to render the guest VRAM to the framebuffer memory. False only for some LFB modes. */
|
---|
448 | bool fRenderVRAM;
|
---|
449 | #ifdef VBOX_WITH_VMSVGA
|
---|
450 | /* Whether the SVGA emulation is enabled or not. */
|
---|
451 | bool fVMSVGAEnabled;
|
---|
452 | bool Padding1[1];
|
---|
453 | #else
|
---|
454 | bool Padding1[2];
|
---|
455 | #endif
|
---|
456 |
|
---|
457 | /** The physical address the VRAM was assigned. */
|
---|
458 | RTGCPHYS GCPhysVRAM;
|
---|
459 | /** The critical section protect the instance data. */
|
---|
460 | PDMCRITSECT CritSect;
|
---|
461 | /** The PCI device. */
|
---|
462 | PCIDEVICE Dev;
|
---|
463 |
|
---|
464 | STAMPROFILE StatRZMemoryRead;
|
---|
465 | STAMPROFILE StatR3MemoryRead;
|
---|
466 | STAMPROFILE StatRZMemoryWrite;
|
---|
467 | STAMPROFILE StatR3MemoryWrite;
|
---|
468 | STAMCOUNTER StatMapPage; /**< Counts IOMMMIOMapMMIO2Page calls. */
|
---|
469 | STAMCOUNTER StatUpdateDisp; /**< Counts vgaPortUpdateDisplay calls. */
|
---|
470 |
|
---|
471 | /* Keep track of ring 0 latched accesses to the VGA MMIO memory. */
|
---|
472 | uint64_t u64LastLatchedAccess;
|
---|
473 | uint32_t cLatchAccesses;
|
---|
474 | uint16_t uMaskLatchAccess;
|
---|
475 | uint16_t iMask;
|
---|
476 |
|
---|
477 | # ifdef VBE_BYTEWISE_IO
|
---|
478 | /** VBE read/write data/index flags */
|
---|
479 | uint8_t fReadVBEData;
|
---|
480 | uint8_t fWriteVBEData;
|
---|
481 | uint8_t fReadVBEIndex;
|
---|
482 | uint8_t fWriteVBEIndex;
|
---|
483 | /** VBE write data/index one byte buffer */
|
---|
484 | uint8_t cbWriteVBEData;
|
---|
485 | uint8_t cbWriteVBEIndex;
|
---|
486 | # ifdef VBE_NEW_DYN_LIST
|
---|
487 | /** VBE Extra Data write address one byte buffer */
|
---|
488 | uint8_t cbWriteVBEExtraAddress;
|
---|
489 | uint8_t Padding5;
|
---|
490 | # else
|
---|
491 | uint8_t Padding5[2];
|
---|
492 | # endif
|
---|
493 | # endif
|
---|
494 |
|
---|
495 | /** Retrace emulation state */
|
---|
496 | bool fRealRetrace;
|
---|
497 | bool Padding6[HC_ARCH_BITS == 64 ? 7 : 3];
|
---|
498 | vga_retrace_s retrace_state;
|
---|
499 |
|
---|
500 | # ifdef VBE_NEW_DYN_LIST
|
---|
501 | /** The VBE BIOS extra data. */
|
---|
502 | R3PTRTYPE(uint8_t *) pu8VBEExtraData;
|
---|
503 | /** The size of the VBE BIOS extra data. */
|
---|
504 | uint16_t cbVBEExtraData;
|
---|
505 | /** The VBE BIOS current memory address. */
|
---|
506 | uint16_t u16VBEExtraAddress;
|
---|
507 | uint16_t Padding7[2];
|
---|
508 | # endif
|
---|
509 |
|
---|
510 | /** The BIOS logo data. */
|
---|
511 | R3PTRTYPE(uint8_t *) pu8Logo;
|
---|
512 | /** The name of the logo file. */
|
---|
513 | R3PTRTYPE(char *) pszLogoFile;
|
---|
514 | /** Bitmap image data. */
|
---|
515 | R3PTRTYPE(uint8_t *) pu8LogoBitmap;
|
---|
516 | /** Current logo data offset. */
|
---|
517 | uint32_t offLogoData;
|
---|
518 | /** The size of the BIOS logo data. */
|
---|
519 | uint32_t cbLogo;
|
---|
520 | /** Current logo command. */
|
---|
521 | uint16_t LogoCommand;
|
---|
522 | /** Bitmap width. */
|
---|
523 | uint16_t cxLogo;
|
---|
524 | /** Bitmap height. */
|
---|
525 | uint16_t cyLogo;
|
---|
526 | /** Bitmap planes. */
|
---|
527 | uint16_t cLogoPlanes;
|
---|
528 | /** Bitmap depth. */
|
---|
529 | uint16_t cLogoBits;
|
---|
530 | /** Bitmap compression. */
|
---|
531 | uint16_t LogoCompression;
|
---|
532 | /** Bitmap colors used. */
|
---|
533 | uint16_t cLogoUsedColors;
|
---|
534 | /** Palette size. */
|
---|
535 | uint16_t cLogoPalEntries;
|
---|
536 | /** Clear screen flag. */
|
---|
537 | uint8_t fLogoClearScreen;
|
---|
538 | uint8_t Padding8[7];
|
---|
539 | /** Palette data. */
|
---|
540 | uint32_t au32LogoPalette[256];
|
---|
541 |
|
---|
542 | /** The VGA BIOS ROM data. */
|
---|
543 | R3PTRTYPE(uint8_t *) pu8VgaBios;
|
---|
544 | /** The size of the VGA BIOS ROM. */
|
---|
545 | uint64_t cbVgaBios;
|
---|
546 | /** The name of the VGA BIOS ROM file. */
|
---|
547 | R3PTRTYPE(char *) pszVgaBiosFile;
|
---|
548 |
|
---|
549 | # ifdef VBOX_WITH_HGSMI
|
---|
550 | /** Base port in the assigned PCI I/O space. */
|
---|
551 | RTIOPORT IOPortBase;
|
---|
552 | # ifdef VBOX_WITH_WDDM
|
---|
553 | uint8_t Padding9[2];
|
---|
554 | /** Specifies guest driver caps, i.e. whether it can handle IRQs from the
|
---|
555 | * adapter, the way it can handle async HGSMI command completion, etc. */
|
---|
556 | uint32_t fGuestCaps;
|
---|
557 | uint32_t fScanLineCfg;
|
---|
558 | uint8_t Padding10[4];
|
---|
559 | # else
|
---|
560 | uint8_t Padding10[14];
|
---|
561 | # endif
|
---|
562 | # endif /* VBOX_WITH_HGSMI */
|
---|
563 |
|
---|
564 | PDMLED Led3D;
|
---|
565 |
|
---|
566 | struct {
|
---|
567 | volatile uint32_t cPending;
|
---|
568 | uint32_t Padding1;
|
---|
569 | union
|
---|
570 | {
|
---|
571 | RTLISTNODE PendingList;
|
---|
572 | /* make sure the structure sized cross different contexts correctly */
|
---|
573 | struct
|
---|
574 | {
|
---|
575 | R3PTRTYPE(void *) dummy1;
|
---|
576 | R3PTRTYPE(void *) dummy2;
|
---|
577 | } dummy;
|
---|
578 | };
|
---|
579 | } pendingVhwaCommands;
|
---|
580 | #endif /* VBOX */
|
---|
581 | } VGAState;
|
---|
582 | #ifdef VBOX
|
---|
583 | /** VGA state. */
|
---|
584 | typedef VGAState VGASTATE;
|
---|
585 | /** Pointer to the VGA state. */
|
---|
586 | typedef VGASTATE *PVGASTATE;
|
---|
587 | AssertCompileMemberAlignment(VGASTATE, bank_offset, 8);
|
---|
588 | AssertCompileMemberAlignment(VGASTATE, font_offsets, 8);
|
---|
589 | AssertCompileMemberAlignment(VGASTATE, last_ch_attr, 8);
|
---|
590 | AssertCompileMemberAlignment(VGASTATE, u32Marker, 8);
|
---|
591 | #endif
|
---|
592 |
|
---|
593 | #ifdef VBE_NEW_DYN_LIST
|
---|
594 | /**
|
---|
595 | * VBE Bios Extra Data structure.
|
---|
596 | * @remark duplicated in vbe.h.
|
---|
597 | */
|
---|
598 | typedef struct VBEHeader
|
---|
599 | {
|
---|
600 | /** Signature (VBEHEADER_MAGIC). */
|
---|
601 | uint16_t u16Signature;
|
---|
602 | /** Data size. */
|
---|
603 | uint16_t cbData;
|
---|
604 | } VBEHeader;
|
---|
605 |
|
---|
606 | /** VBE Extra Data. */
|
---|
607 | typedef VBEHeader VBEHEADER;
|
---|
608 | /** Pointer to the VBE Extra Data. */
|
---|
609 | typedef VBEHEADER *PVBEHEADER;
|
---|
610 |
|
---|
611 | /** The value of the VBEHEADER::u16Signature field.
|
---|
612 | * @remark duplicated in vbe.h. */
|
---|
613 | #define VBEHEADER_MAGIC 0x77CC
|
---|
614 |
|
---|
615 | /** The extra port which is used to read the mode list.
|
---|
616 | * @remark duplicated in vbe.h. */
|
---|
617 | #define VBE_EXTRA_PORT 0x3b6
|
---|
618 |
|
---|
619 | /** The extra port which is used for debug printf.
|
---|
620 | * @remark duplicated in vbe.h. */
|
---|
621 | #define VBE_PRINTF_PORT 0x3b7
|
---|
622 |
|
---|
623 | #endif /* VBE_NEW_DYN_LIST */
|
---|
624 |
|
---|
625 | #if !defined(VBOX) || defined(IN_RING3)
|
---|
626 | static inline int c6_to_8(int v)
|
---|
627 | {
|
---|
628 | int b;
|
---|
629 | v &= 0x3f;
|
---|
630 | b = v & 1;
|
---|
631 | return (v << 2) | (b << 1) | b;
|
---|
632 | }
|
---|
633 | #endif /* !VBOX || IN_RING3 */
|
---|
634 |
|
---|
635 |
|
---|
636 | #ifdef VBOX_WITH_HGSMI
|
---|
637 | int VBVAInit (PVGASTATE pVGAState);
|
---|
638 | void VBVADestroy (PVGASTATE pVGAState);
|
---|
639 | int VBVAUpdateDisplay (PVGASTATE pVGAState);
|
---|
640 | void VBVAReset (PVGASTATE pVGAState);
|
---|
641 | void VBVAPause (PVGASTATE pVGAState, bool fPause);
|
---|
642 |
|
---|
643 | bool VBVAIsEnabled(PVGASTATE pVGAState);
|
---|
644 |
|
---|
645 | void VBVARaiseIrq (PVGASTATE pVGAState, uint32_t fFlags);
|
---|
646 | void VBVARaiseIrqNoWait(PVGASTATE pVGAState, uint32_t fFlags);
|
---|
647 |
|
---|
648 | int VBVAInfoView(PVGASTATE pVGAState, VBVAINFOVIEW *pView);
|
---|
649 | int VBVAInfoScreen(PVGASTATE pVGAState, VBVAINFOSCREEN *pScreen);
|
---|
650 | int VBVAGetInfoViewAndScreen(PVGASTATE pVGAState, uint32_t u32ViewIndex, VBVAINFOVIEW *pView, VBVAINFOSCREEN *pScreen);
|
---|
651 |
|
---|
652 | /* @return host-guest flags that were set on reset
|
---|
653 | * this allows the caller to make further cleaning when needed,
|
---|
654 | * e.g. reset the IRQ */
|
---|
655 | uint32_t HGSMIReset (PHGSMIINSTANCE pIns);
|
---|
656 |
|
---|
657 | # ifdef VBOX_WITH_VIDEOHWACCEL
|
---|
658 | int vbvaVHWACommandCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface, PVBOXVHWACMD pCmd);
|
---|
659 | int vbvaVHWAConstruct (PVGASTATE pVGAState);
|
---|
660 | int vbvaVHWAReset (PVGASTATE pVGAState);
|
---|
661 |
|
---|
662 | void vbvaTimerCb(PVGASTATE pVGAState);
|
---|
663 |
|
---|
664 | int vboxVBVASaveStatePrep (PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
|
---|
665 | int vboxVBVASaveStateDone (PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
|
---|
666 | # endif
|
---|
667 |
|
---|
668 | #ifdef VBOX_WITH_HGSMI
|
---|
669 | #define PPDMIDISPLAYVBVACALLBACKS_2_PVGASTATE(_pcb) ( (PVGASTATE)((uint8_t *)(_pcb) - RT_OFFSETOF(VGASTATE, IVBVACallbacks)) )
|
---|
670 | #endif
|
---|
671 |
|
---|
672 | # ifdef VBOX_WITH_CRHGSMI
|
---|
673 | int vboxVDMACrHgsmiCommandCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface, PVBOXVDMACMD_CHROMIUM_CMD pCmd, int rc);
|
---|
674 | int vboxVDMACrHgsmiControlCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface, PVBOXVDMACMD_CHROMIUM_CTL pCmd, int rc);
|
---|
675 | int vboxCmdVBVACmdHostCtl(PPDMIDISPLAYVBVACALLBACKS pInterface,
|
---|
676 | struct VBOXCRCMDCTL* pCmd, uint32_t cbCmd,
|
---|
677 | PFNCRCTLCOMPLETION pfnCompletion,
|
---|
678 | void *pvCompletion);
|
---|
679 | int vboxCmdVBVACmdHostCtlSync(PPDMIDISPLAYVBVACALLBACKS pInterface,
|
---|
680 | struct VBOXCRCMDCTL* pCmd, uint32_t cbCmd);
|
---|
681 | # endif
|
---|
682 |
|
---|
683 | int vboxVBVASaveStateExec (PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
|
---|
684 | int vboxVBVALoadStateExec (PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t u32Version);
|
---|
685 | int vboxVBVALoadStateDone (PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
|
---|
686 |
|
---|
687 | DECLCALLBACK(int) vgaUpdateDisplayAll(PVGASTATE pThis, bool fFailOnResize);
|
---|
688 |
|
---|
689 | # ifdef VBOX_WITH_VDMA
|
---|
690 | typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
|
---|
691 | int vboxVDMAConstruct(PVGASTATE pVGAState, uint32_t cPipeElements);
|
---|
692 | int vboxVDMADestruct(PVBOXVDMAHOST pVdma);
|
---|
693 | int vboxVDMAReset(PVBOXVDMAHOST pVdma);
|
---|
694 | void vboxVDMAControl(PVBOXVDMAHOST pVdma, PVBOXVDMA_CTL pCmd, uint32_t cbCmd);
|
---|
695 | void vboxVDMACommand(PVBOXVDMAHOST pVdma, PVBOXVDMACBUF_DR pCmd, uint32_t cbCmd);
|
---|
696 | int vboxVDMASaveStateExecPrep(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM);
|
---|
697 | int vboxVDMASaveStateExecDone(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM);
|
---|
698 | int vboxVDMASaveStateExecPerform(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM);
|
---|
699 | int vboxVDMASaveLoadExecPerform(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM, uint32_t u32Version);
|
---|
700 | int vboxVDMASaveLoadDone(struct VBOXVDMAHOST *pVdma);
|
---|
701 | # endif /* VBOX_WITH_VDMA */
|
---|
702 |
|
---|
703 | # ifdef VBOX_WITH_CRHGSMI
|
---|
704 | int vboxCmdVBVACmdSubmit(PVGASTATE pVGAState);
|
---|
705 | int vboxCmdVBVACmdFlush(PVGASTATE pVGAState);
|
---|
706 | void vboxCmdVBVACmdTimer(PVGASTATE pVGAState);
|
---|
707 | int vboxCmdVBVACmdCtl(PVGASTATE pVGAState, VBOXCMDVBVA_CTL *pCtl, uint32_t cbCtl);
|
---|
708 | bool vboxCmdVBVAIsEnabled(PVGASTATE pVGAState);
|
---|
709 | # endif /* VBOX_WITH_CRHGSMI */
|
---|
710 | #endif /* VBOX_WITH_HGSMI */
|
---|
711 |
|
---|
712 | # ifdef VBOX_WITH_VMSVGA
|
---|
713 | int vgaR3RegisterVRAMHandler(PVGASTATE pVGAState, uint64_t cbFrameBuffer);
|
---|
714 | int vgaR3UnregisterVRAMHandler(PVGASTATE pVGAState);
|
---|
715 | int vgaR3UpdateDisplay(PVGASTATE pVGAState, unsigned xStart, unsigned yStart, unsigned width, unsigned height);
|
---|
716 | # endif
|
---|
717 |
|
---|
718 | #ifndef VBOX
|
---|
719 | void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base,
|
---|
720 | unsigned long vga_ram_offset, int vga_ram_size);
|
---|
721 | uint32_t vga_mem_readb(void *opaque, target_phys_addr_t addr);
|
---|
722 | void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val);
|
---|
723 | void vga_invalidate_scanlines(VGAState *s, int y1, int y2);
|
---|
724 |
|
---|
725 | void vga_draw_cursor_line_8(uint8_t *d1, const uint8_t *src1,
|
---|
726 | int poffset, int w,
|
---|
727 | unsigned int color0, unsigned int color1,
|
---|
728 | unsigned int color_xor);
|
---|
729 | void vga_draw_cursor_line_16(uint8_t *d1, const uint8_t *src1,
|
---|
730 | int poffset, int w,
|
---|
731 | unsigned int color0, unsigned int color1,
|
---|
732 | unsigned int color_xor);
|
---|
733 | void vga_draw_cursor_line_32(uint8_t *d1, const uint8_t *src1,
|
---|
734 | int poffset, int w,
|
---|
735 | unsigned int color0, unsigned int color1,
|
---|
736 | unsigned int color_xor);
|
---|
737 |
|
---|
738 | extern const uint8_t sr_mask[8];
|
---|
739 | extern const uint8_t gr_mask[16];
|
---|
740 | #endif /* !VBOX */
|
---|
741 |
|
---|