1 | /** @file
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2 | *
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3 | * VBox VGA/VESA device
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4 | */
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5 |
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6 | /*
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7 | * Copyright (C) 2006-2007 innotek GmbH
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8 | *
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9 | * This file is part of VirtualBox Open Source Edition (OSE), as
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10 | * available from http://www.virtualbox.org. This file is free software;
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11 | * you can redistribute it and/or modify it under the terms of the GNU
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12 | * General Public License (GPL) as published by the Free Software
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13 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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14 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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15 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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16 | * --------------------------------------------------------------------
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17 | *
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18 | * This code is based on:
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19 | *
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20 | * QEMU internal VGA defines.
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21 | *
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22 | * Copyright (c) 2003-2004 Fabrice Bellard
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23 | *
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24 | * Permission is hereby granted, free of charge, to any person obtaining a copy
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25 | * of this software and associated documentation files (the "Software"), to deal
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26 | * in the Software without restriction, including without limitation the rights
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27 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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28 | * copies of the Software, and to permit persons to whom the Software is
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29 | * furnished to do so, subject to the following conditions:
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30 | *
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31 | * The above copyright notice and this permission notice shall be included in
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32 | * all copies or substantial portions of the Software.
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33 | *
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34 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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35 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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36 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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37 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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38 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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39 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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40 | * THE SOFTWARE.
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41 | */
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42 |
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43 | #define MSR_COLOR_EMULATION 0x01
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44 | #define MSR_PAGE_SELECT 0x20
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45 |
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46 | #define ST01_V_RETRACE 0x08
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47 | #define ST01_DISP_ENABLE 0x01
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48 |
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49 | /* bochs VBE support */
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50 | #define CONFIG_BOCHS_VBE
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51 |
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52 | #ifdef VBOX
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53 | #define VBE_DISPI_MAX_XRES 16384
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54 | #define VBE_DISPI_MAX_YRES 16384
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55 | #else
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56 | #define VBE_DISPI_MAX_XRES 1600
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57 | #define VBE_DISPI_MAX_YRES 1200
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58 | #endif
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59 | #define VBE_DISPI_MAX_BPP 32
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60 |
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61 | #define VBE_DISPI_INDEX_ID 0x0
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62 | #define VBE_DISPI_INDEX_XRES 0x1
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63 | #define VBE_DISPI_INDEX_YRES 0x2
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64 | #define VBE_DISPI_INDEX_BPP 0x3
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65 | #define VBE_DISPI_INDEX_ENABLE 0x4
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66 | #define VBE_DISPI_INDEX_BANK 0x5
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67 | #define VBE_DISPI_INDEX_VIRT_WIDTH 0x6
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68 | #define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7
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69 | #define VBE_DISPI_INDEX_X_OFFSET 0x8
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70 | #define VBE_DISPI_INDEX_Y_OFFSET 0x9
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71 | #define VBE_DISPI_INDEX_VBOX_VIDEO 0xa
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72 | #define VBE_DISPI_INDEX_NB 0xb
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73 |
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74 | #define VBE_DISPI_ID0 0xB0C0
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75 | #define VBE_DISPI_ID1 0xB0C1
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76 | #define VBE_DISPI_ID2 0xB0C2
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77 | #define VBE_DISPI_ID3 0xB0C3
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78 | #define VBE_DISPI_ID4 0xB0C4
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79 |
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80 | #ifdef VBOX
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81 | /* The VBOX interface id. Indicates support for VBE_DISPI_INDEX_VBOX_VIDEO. */
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82 | #define VBE_DISPI_ID_VBOX_VIDEO 0xBE00
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83 | #endif /* VBOX */
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84 |
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85 | #define VBE_DISPI_DISABLED 0x00
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86 | #define VBE_DISPI_ENABLED 0x01
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87 | #define VBE_DISPI_GETCAPS 0x02
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88 | #define VBE_DISPI_8BIT_DAC 0x20
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89 | #define VBE_DISPI_LFB_ENABLED 0x40
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90 | #define VBE_DISPI_NOCLEARMEM 0x80
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91 |
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92 | #define VBE_DISPI_LFB_PHYSICAL_ADDRESS 0xE0000000
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93 |
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94 | #ifdef CONFIG_BOCHS_VBE
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95 |
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96 | #define VGA_STATE_COMMON_BOCHS_VBE \
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97 | uint16_t vbe_index; \
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98 | uint16_t vbe_regs[VBE_DISPI_INDEX_NB]; \
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99 | uint32_t vbe_start_addr; \
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100 | uint32_t vbe_line_offset; \
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101 | uint32_t vbe_bank_mask;
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102 |
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103 | #else
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104 |
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105 | #define VGA_STATE_COMMON_BOCHS_VBE
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106 |
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107 | #endif /* !CONFIG_BOCHS_VBE */
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108 |
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109 | #define CH_ATTR_SIZE (160 * 100)
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110 | #define VGA_MAX_HEIGHT VBE_DISPI_MAX_YRES
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111 |
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112 | #ifndef VBOX
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113 | #define VGA_STATE_COMMON \
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114 | uint8_t *vram_ptr; \
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115 | unsigned long vram_offset; \
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116 | unsigned int vram_size; \
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117 | uint32_t latch; \
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118 | uint8_t sr_index; \
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119 | uint8_t sr[256]; \
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120 | uint8_t gr_index; \
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121 | uint8_t gr[256]; \
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122 | uint8_t ar_index; \
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123 | uint8_t ar[21]; \
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124 | int ar_flip_flop; \
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125 | uint8_t cr_index; \
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126 | uint8_t cr[256]; /* CRT registers */ \
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127 | uint8_t msr; /* Misc Output Register */ \
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128 | uint8_t fcr; /* Feature Control Register */ \
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129 | uint8_t st00; /* status 0 */ \
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130 | uint8_t st01; /* status 1 */ \
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131 | uint8_t dac_state; \
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132 | uint8_t dac_sub_index; \
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133 | uint8_t dac_read_index; \
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134 | uint8_t dac_write_index; \
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135 | uint8_t dac_cache[3]; /* used when writing */ \
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136 | uint8_t palette[768]; \
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137 | int32_t bank_offset; \
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138 | int (*get_bpp)(struct VGAState *s); \
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139 | void (*get_offsets)(struct VGAState *s, \
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140 | uint32_t *pline_offset, \
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141 | uint32_t *pstart_addr, \
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142 | uint32_t *pline_compare); \
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143 | void (*get_resolution)(struct VGAState *s, \
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144 | int *pwidth, \
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145 | int *pheight); \
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146 | VGA_STATE_COMMON_BOCHS_VBE \
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147 | /* display refresh support */ \
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148 | DisplayState *ds; \
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149 | uint32_t font_offsets[2]; \
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150 | int graphic_mode; \
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151 | uint8_t shift_control; \
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152 | uint8_t double_scan; \
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153 | uint32_t line_offset; \
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154 | uint32_t line_compare; \
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155 | uint32_t start_addr; \
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156 | uint32_t plane_updated; \
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157 | uint8_t last_cw, last_ch; \
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158 | uint32_t last_width, last_height; /* in chars or pixels */ \
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159 | uint32_t last_scr_width, last_scr_height; /* in pixels */ \
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160 | uint8_t cursor_start, cursor_end; \
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161 | uint32_t cursor_offset; \
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162 | unsigned int (*rgb_to_pixel)(unsigned int r, \
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163 | unsigned int g, unsigned b); \
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164 | /* hardware mouse cursor support */ \
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165 | uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32]; \
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166 | void (*cursor_invalidate)(struct VGAState *s); \
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167 | void (*cursor_draw_line)(struct VGAState *s, uint8_t *d, int y); \
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168 | /* tell for each page if it has been updated since the last time */ \
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169 | uint32_t last_palette[256]; \
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170 | uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
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171 |
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172 | #else /* VBOX */
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173 |
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174 | struct VGAState;
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175 | typedef int FNGETBPP(struct VGAState *s);
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176 | typedef void FNGETOFFSETS(struct VGAState *s, uint32_t *pline_offset, uint32_t *pstart_addr, uint32_t *pline_compare);
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177 | typedef void FNGETRESOLUTION(struct VGAState *s, int *pwidth, int *pheight);
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178 | typedef unsigned int FNRGBTOPIXEL(unsigned int r, unsigned int g, unsigned b);
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179 | typedef void FNCURSORINVALIDATE(struct VGAState *s);
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180 | typedef void FNCURSORDRAWLINE(struct VGAState *s, uint8_t *d, int y);
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181 |
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182 | /* bird: vram_offset have been remove, function pointers declared external,
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183 | some type changes, and some padding have been added. */
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184 | #define VGA_STATE_COMMON \
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185 | R3R0PTRTYPE(uint8_t *) vram_ptrHC; \
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186 | uint32_t vram_size; \
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187 | uint32_t latch; \
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188 | uint8_t sr_index; \
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189 | uint8_t sr[256]; \
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190 | uint8_t gr_index; \
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191 | uint8_t gr[256]; \
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192 | uint8_t ar_index; \
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193 | uint8_t ar[21]; \
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194 | int32_t ar_flip_flop; \
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195 | uint8_t cr_index; \
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196 | uint8_t cr[256]; /* CRT registers */ \
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197 | uint8_t msr; /* Misc Output Register */ \
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198 | uint8_t fcr; /* Feature Control Register */ \
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199 | uint8_t st00; /* status 0 */ \
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200 | uint8_t st01; /* status 1 */ \
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201 | uint8_t dac_state; \
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202 | uint8_t dac_sub_index; \
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203 | uint8_t dac_read_index; \
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204 | uint8_t dac_write_index; \
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205 | uint8_t dac_cache[3]; /* used when writing */ \
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206 | uint8_t palette[768]; \
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207 | int32_t bank_offset; \
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208 | int32_t padding0; \
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209 | R3PTRTYPE(FNGETBPP *) get_bpp; \
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210 | R3PTRTYPE(FNGETOFFSETS *) get_offsets; \
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211 | R3PTRTYPE(FNGETRESOLUTION *) get_resolution; \
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212 | VGA_STATE_COMMON_BOCHS_VBE \
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213 | /* display refresh support */ \
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214 | uint32_t font_offsets[2]; \
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215 | int32_t graphic_mode; \
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216 | uint8_t shift_control; \
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217 | uint8_t double_scan; \
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218 | uint8_t padding1[2]; \
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219 | uint32_t line_offset; \
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220 | uint32_t line_compare; \
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221 | uint32_t start_addr; \
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222 | uint32_t plane_updated; \
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223 | uint8_t last_cw, last_ch, padding2[2]; \
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224 | uint32_t last_width, last_height; /* in chars or pixels */ \
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225 | uint32_t last_scr_width, last_scr_height; /* in pixels */ \
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226 | uint32_t last_bpp; \
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227 | uint8_t cursor_start, cursor_end, padding3[2]; \
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228 | uint32_t cursor_offset; \
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229 | uint32_t padding4; \
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230 | R3PTRTYPE(FNRGBTOPIXEL *) rgb_to_pixel; \
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231 | /* hardware mouse cursor support */ \
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232 | uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32]; \
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233 | R3PTRTYPE(FNCURSORINVALIDATE *) cursor_invalidate; \
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234 | R3PTRTYPE(FNCURSORDRAWLINE *) cursor_draw_line; \
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235 | /* tell for each page if it has been updated since the last time */ \
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236 | uint32_t last_palette[256]; \
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237 | uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
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238 |
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239 | #endif /* VBOX */
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240 |
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241 | typedef struct VGAState {
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242 | VGA_STATE_COMMON
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243 | #ifdef VBOX
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244 | /** end-of-common-state-marker */
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245 | uint32_t u32Marker;
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246 | /** The physical address the VRAM was assigned. */
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247 | RTGCPHYS32 GCPhysVRAM;
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248 | /** Pointer to GC vram mapping. */
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249 | GCPTRTYPE(uint8_t *) vram_ptrGC;
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250 | /** @todo r=bird: bool not RTUINT (my fault I guess). */
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251 | /** LFB was updated flag. */
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252 | RTUINT fLFBUpdated;
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253 | /** Indicates if the GC extensions are enabled or not. */
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254 | RTUINT fGCEnabled;
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255 | /** Indicates if the R0 extensions are enabled or not. */
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256 | RTUINT fR0Enabled;
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257 | /** Pointer to vgaGCLFBAccessHandler(). */
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258 | RTGCPTR GCPtrLFBHandler;
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259 | /** Flag indicating that there are dirty bits. This is used to optimize the handler resetting. */
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260 | bool fHaveDirtyBits;
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261 | /** Bitmap tracking dirty pages. */
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262 | uint32_t au32DirtyBitmap[VGA_VRAM_MAX / PAGE_SIZE / 32];
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263 | /** Pointer to the device instance - HC Ptr. */
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264 | R3R0PTRTYPE(PPDMDEVINS) pDevInsHC;
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265 | /* * Pointer to the device instance - GC Ptr. */
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266 | /*GCPTRTYPE(PPDMDEVINS) pDevInsGC;*/
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267 |
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268 | /** The display port base interface. */
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269 | PDMIBASE Base;
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270 | /** The display port interface. */
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271 | PDMIDISPLAYPORT Port;
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272 | /** Pointer to base interface of the driver. */
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273 | R3PTRTYPE(PPDMIBASE) pDrvBase;
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274 | /** Pointer to display connector interface of the driver. */
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275 | R3PTRTYPE(PPDMIDISPLAYCONNECTOR) pDrv;
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276 | /** Refresh timer handle - HC. */
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277 | PTMTIMERR3 RefreshTimer;
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278 | /** Current refresh timer interval. */
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279 | uint32_t cMilliesRefreshInterval;
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280 |
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281 | /** Whether to render the guest VRAM to the framebuffer memory. False only for some LFB modes. */
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282 | uint32_t fRenderVRAM;
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283 |
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284 | /** The PCI device. */
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285 | PCIDEVICE Dev;
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286 |
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287 | STAMPROFILE StatGCMemoryRead;
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288 | STAMPROFILE StatGCMemoryWrite;
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289 | STAMPROFILE StatGCIOPortRead;
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290 | STAMPROFILE StatGCIOPortWrite;
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291 |
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292 | #ifdef VBE_BYTEWISE_IO
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293 | /** VBE read/write data/index flags */
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294 | uint8_t fReadVBEData;
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295 | uint8_t fWriteVBEData;
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296 | uint8_t fReadVBEIndex;
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297 | uint8_t fWriteVBEIndex;
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298 | /** VBE write data/index one byte buffer */
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299 | uint8_t cbWriteVBEData;
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300 | uint8_t cbWriteVBEIndex;
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301 | # ifdef VBE_NEW_DYN_LIST
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302 | /** VBE Extra Data write address one byte buffer */
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303 | uint8_t cbWriteVBEExtraAddress;
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304 | uint8_t Padding6; /**< Alignment padding. */
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305 | # else
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306 | uint8_t Padding6[2]; /**< Alignment padding. */
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307 | # endif
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308 | #endif
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309 |
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310 | #ifdef VBE_NEW_DYN_LIST
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311 | /** The VBE BIOS extra data. */
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312 | R3PTRTYPE(uint8_t *) pu8VBEExtraData;
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313 | /** The size of the VBE BIOS extra data. */
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314 | uint16_t cbVBEExtraData;
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315 | /** The VBE BIOS current memory address. */
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316 | uint16_t u16VBEExtraAddress;
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317 | uint16_t Padding7[2]; /**< Alignment padding. */
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318 | #endif
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319 |
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320 | #endif /* VBOX */
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321 | } VGAState;
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322 | #ifdef VBOX
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323 | /** VGA state. */
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324 | typedef VGAState VGASTATE;
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325 | /** Pointer to the VGA state. */
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326 | typedef VGASTATE *PVGASTATE;
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327 | #endif
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328 |
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329 | #ifdef VBE_NEW_DYN_LIST
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330 | /**
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331 | * VBE Bios Extra Data structure.
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332 | * @remark duplicated in vbe.h.
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333 | */
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334 | typedef struct VBEHeader
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335 | {
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336 | /** Signature (VBEHEADER_MAGIC). */
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337 | uint16_t u16Signature;
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338 | /** Data size. */
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339 | uint16_t cbData;
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340 | } VBEHeader;
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341 |
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342 | /** VBE Extra Data. */
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343 | typedef VBEHeader VBEHEADER;
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344 | /** Pointer to the VBE Extra Data. */
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345 | typedef VBEHEADER *PVBEHEADER;
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346 |
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347 | /** The value of the VBEHEADER::u16Signature field.
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348 | * @remark duplicated in vbe.h. */
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349 | #define VBEHEADER_MAGIC 0x77CC
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350 |
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351 | /** The extra port which is used to read the mode list.
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352 | * @remark duplicated in vbe.h. */
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353 | #define VBE_EXTRA_PORT 0x3b6
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354 |
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355 | /** The extra port which is used for debug printf.
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356 | * @remark duplicated in vbe.h. */
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357 | #define VBE_PRINTF_PORT 0x3b7
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358 |
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359 | #endif /* VBE_NEW_DYN_LIST */
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360 |
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361 | #if !defined(VBOX) || defined(IN_RING3)
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362 | static inline int c6_to_8(int v)
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363 | {
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364 | int b;
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365 | v &= 0x3f;
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366 | b = v & 1;
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367 | return (v << 2) | (b << 1) | b;
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368 | }
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369 | #endif /* !VBOX || IN_RING3 */
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370 |
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371 | #ifndef VBOX
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372 | void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base,
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373 | unsigned long vga_ram_offset, int vga_ram_size);
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374 | uint32_t vga_mem_readb(void *opaque, target_phys_addr_t addr);
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375 | void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val);
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376 | void vga_invalidate_scanlines(VGAState *s, int y1, int y2);
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377 |
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378 | void vga_draw_cursor_line_8(uint8_t *d1, const uint8_t *src1,
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379 | int poffset, int w,
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380 | unsigned int color0, unsigned int color1,
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381 | unsigned int color_xor);
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382 | void vga_draw_cursor_line_16(uint8_t *d1, const uint8_t *src1,
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383 | int poffset, int w,
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384 | unsigned int color0, unsigned int color1,
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385 | unsigned int color_xor);
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386 | void vga_draw_cursor_line_32(uint8_t *d1, const uint8_t *src1,
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387 | int poffset, int w,
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388 | unsigned int color0, unsigned int color1,
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389 | unsigned int color_xor);
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390 |
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391 | extern const uint8_t sr_mask[8];
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392 | extern const uint8_t gr_mask[16];
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393 | #endif /* !VBOX */
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394 |
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