VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA.h@ 76785

Last change on this file since 76785 was 76565, checked in by vboxsync, 6 years ago

Devices: Use VBOX_INCLUDED_SRC_ as header guard prefix with scm.

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1/* $Id: DevVGA.h 76565 2019-01-01 04:23:20Z vboxsync $ */
2/** @file
3 * DevVGA - VBox VGA/VESA device, internal header.
4 */
5
6/*
7 * Copyright (C) 2006-2019 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 * --------------------------------------------------------------------
17 *
18 * This code is based on:
19 *
20 * QEMU internal VGA defines.
21 *
22 * Copyright (c) 2003-2004 Fabrice Bellard
23 *
24 * Permission is hereby granted, free of charge, to any person obtaining a copy
25 * of this software and associated documentation files (the "Software"), to deal
26 * in the Software without restriction, including without limitation the rights
27 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
28 * copies of the Software, and to permit persons to whom the Software is
29 * furnished to do so, subject to the following conditions:
30 *
31 * The above copyright notice and this permission notice shall be included in
32 * all copies or substantial portions of the Software.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
37 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
38 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
39 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
40 * THE SOFTWARE.
41 */
42
43#ifndef VBOX_INCLUDED_SRC_Graphics_DevVGA_h
44#define VBOX_INCLUDED_SRC_Graphics_DevVGA_h
45#ifndef RT_WITHOUT_PRAGMA_ONCE
46# pragma once
47#endif
48
49/** Use VBE bytewise I/O. Only needed for Windows Longhorn/Vista betas and backwards compatibility. */
50#define VBE_BYTEWISE_IO
51
52#ifdef VBOX
53/** The default amount of VRAM. */
54# define VGA_VRAM_DEFAULT (_4M)
55/** The maximum amount of VRAM. Limited by VBOX_MAX_ALLOC_PAGE_COUNT. */
56# define VGA_VRAM_MAX (256 * _1M)
57/** The minimum amount of VRAM. */
58# define VGA_VRAM_MIN (_1M)
59#endif
60
61#include <VBoxVideoVBE.h>
62#include <VBoxVideoVBEPrivate.h>
63
64#ifdef VBOX_WITH_HGSMI
65# include "HGSMI/HGSMIHost.h"
66#endif /* VBOX_WITH_HGSMI */
67#include "DevVGASavedState.h"
68
69#ifdef VBOX_WITH_VMSVGA
70# include "DevVGA-SVGA.h"
71#endif
72
73#include <iprt/list.h>
74
75#define MSR_COLOR_EMULATION 0x01
76#define MSR_PAGE_SELECT 0x20
77
78#define ST01_V_RETRACE 0x08
79#define ST01_DISP_ENABLE 0x01
80
81/* bochs VBE support */
82#define CONFIG_BOCHS_VBE
83
84#ifdef CONFIG_BOCHS_VBE
85
86/* Cross reference with <VBoxVideoVBE.h> */
87#define VBE_DISPI_INDEX_NB_SAVED 0xb /* Old number of saved registers (vbe_regs array, see vga_load) */
88#define VBE_DISPI_INDEX_NB 0xd /* Total number of VBE registers */
89
90#define VGA_STATE_COMMON_BOCHS_VBE \
91 uint16_t vbe_index; \
92 uint16_t vbe_regs[VBE_DISPI_INDEX_NB]; \
93 uint16_t alignment[2]; /* pad to 64 bits */ \
94 uint32_t vbe_start_addr; \
95 uint32_t vbe_line_offset; \
96 uint32_t vbe_bank_max;
97
98#else
99
100#define VGA_STATE_COMMON_BOCHS_VBE
101
102#endif /* !CONFIG_BOCHS_VBE */
103
104#define CH_ATTR_SIZE (160 * 100)
105#define VGA_MAX_HEIGHT VBE_DISPI_MAX_YRES
106
107typedef struct vga_retrace_s {
108 unsigned frame_cclks; /* Character clocks per frame. */
109 unsigned frame_ns; /* Frame duration in ns. */
110 unsigned cclk_ns; /* Character clock duration in ns. */
111 unsigned vb_start; /* Vertical blanking start (scanline). */
112 unsigned vb_end; /* Vertical blanking end (scanline). */
113 unsigned vb_end_ns; /* Vertical blanking end time (length) in ns. */
114 unsigned vs_start; /* Vertical sync start (scanline). */
115 unsigned vs_end; /* Vertical sync end (scanline). */
116 unsigned vs_start_ns; /* Vertical sync start time in ns. */
117 unsigned vs_end_ns; /* Vertical sync end time in ns. */
118 unsigned h_total; /* Horizontal total (cclks per scanline). */
119 unsigned h_total_ns; /* Scanline duration in ns. */
120 unsigned hb_start; /* Horizontal blanking start (cclk). */
121 unsigned hb_end; /* Horizontal blanking end (cclk). */
122 unsigned hb_end_ns; /* Horizontal blanking end time (length) in ns. */
123 unsigned v_freq_hz; /* Vertical refresh rate to emulate. */
124} vga_retrace_s;
125
126#ifndef VBOX
127#define VGA_STATE_COMMON \
128 uint8_t *vram_ptr; \
129 unsigned long vram_offset; \
130 unsigned int vram_size; \
131 uint32_t latch; \
132 uint8_t sr_index; \
133 uint8_t sr[256]; \
134 uint8_t gr_index; \
135 uint8_t gr[256]; \
136 uint8_t ar_index; \
137 uint8_t ar[21]; \
138 int ar_flip_flop; \
139 uint8_t cr_index; \
140 uint8_t cr[256]; /* CRT registers */ \
141 uint8_t msr; /* Misc Output Register */ \
142 uint8_t fcr; /* Feature Control Register */ \
143 uint8_t st00; /* status 0 */ \
144 uint8_t st01; /* status 1 */ \
145 uint8_t dac_state; \
146 uint8_t dac_sub_index; \
147 uint8_t dac_read_index; \
148 uint8_t dac_write_index; \
149 uint8_t dac_cache[3]; /* used when writing */ \
150 uint8_t palette[768]; \
151 int32_t bank_offset; \
152 int (*get_bpp)(struct VGAState *s); \
153 void (*get_offsets)(struct VGAState *s, \
154 uint32_t *pline_offset, \
155 uint32_t *pstart_addr, \
156 uint32_t *pline_compare); \
157 void (*get_resolution)(struct VGAState *s, \
158 int *pwidth, \
159 int *pheight); \
160 VGA_STATE_COMMON_BOCHS_VBE \
161 /* display refresh support */ \
162 DisplayState *ds; \
163 uint32_t font_offsets[2]; \
164 int graphic_mode; \
165 uint8_t shift_control; \
166 uint8_t double_scan; \
167 uint32_t line_offset; \
168 uint32_t line_compare; \
169 uint32_t start_addr; \
170 uint32_t plane_updated; \
171 uint8_t last_cw, last_ch; \
172 uint32_t last_width, last_height; /* in chars or pixels */ \
173 uint32_t last_scr_width, last_scr_height; /* in pixels */ \
174 uint8_t cursor_start, cursor_end; \
175 uint32_t cursor_offset; \
176 unsigned int (*rgb_to_pixel)(unsigned int r, \
177 unsigned int g, unsigned b); \
178 /* hardware mouse cursor support */ \
179 uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32]; \
180 void (*cursor_invalidate)(struct VGAState *s); \
181 void (*cursor_draw_line)(struct VGAState *s, uint8_t *d, int y); \
182 /* tell for each page if it has been updated since the last time */ \
183 uint32_t last_palette[256]; \
184 uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
185
186#else /* VBOX */
187
188/* bird: Since we've changed types, reordered members, done alignment
189 paddings and more, VGA_STATE_COMMON was added directly to the
190 struct to make it more readable and easier to handle. */
191
192struct VGAState;
193typedef int FNGETBPP(struct VGAState *s);
194typedef void FNGETOFFSETS(struct VGAState *s, uint32_t *pline_offset, uint32_t *pstart_addr, uint32_t *pline_compare);
195typedef void FNGETRESOLUTION(struct VGAState *s, int *pwidth, int *pheight);
196typedef unsigned int FNRGBTOPIXEL(unsigned int r, unsigned int g, unsigned b);
197typedef void FNCURSORINVALIDATE(struct VGAState *s);
198typedef void FNCURSORDRAWLINE(struct VGAState *s, uint8_t *d, int y);
199
200#endif /* VBOX */
201
202#ifdef VBOX_WITH_VDMA
203typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
204#endif
205
206#ifdef VBOX_WITH_VIDEOHWACCEL
207#define VBOX_VHWA_MAX_PENDING_COMMANDS 1000
208
209typedef struct _VBOX_VHWA_PENDINGCMD
210{
211 RTLISTNODE Node;
212 VBOXVHWACMD RT_UNTRUSTED_VOLATILE_GUEST *pCommand;
213} VBOX_VHWA_PENDINGCMD;
214#endif
215
216
217typedef struct VGAState {
218#ifndef VBOX
219 VGA_STATE_COMMON
220#else /* VBOX */
221 R3PTRTYPE(uint8_t *) vram_ptrR3;
222 R3PTRTYPE(FNGETBPP *) get_bpp;
223 R3PTRTYPE(FNGETOFFSETS *) get_offsets;
224 R3PTRTYPE(FNGETRESOLUTION *) get_resolution;
225 R3PTRTYPE(FNRGBTOPIXEL *) rgb_to_pixel;
226 R3PTRTYPE(FNCURSORINVALIDATE *) cursor_invalidate;
227 R3PTRTYPE(FNCURSORDRAWLINE *) cursor_draw_line;
228 RTR3PTR R3PtrCmnAlignment;
229 uint32_t vram_size;
230 uint32_t latch;
231 uint8_t sr_index;
232 uint8_t sr[256];
233 uint8_t gr_index;
234 uint8_t gr[256];
235 uint8_t ar_index;
236 uint8_t ar[21];
237 int32_t ar_flip_flop;
238 uint8_t cr_index;
239 uint8_t cr[256]; /* CRT registers */
240 uint8_t msr; /* Misc Output Register */
241 uint8_t fcr; /* Feature Control Register */
242 uint8_t st00; /* status 0 */
243 uint8_t st01; /* status 1 */
244 uint8_t dac_state;
245 uint8_t dac_sub_index;
246 uint8_t dac_read_index;
247 uint8_t dac_write_index;
248 uint8_t dac_cache[3]; /* used when writing */
249 uint8_t palette[768];
250 int32_t bank_offset;
251 VGA_STATE_COMMON_BOCHS_VBE
252 /* display refresh support */
253 uint32_t font_offsets[2];
254 int32_t graphic_mode;
255 uint8_t shift_control;
256 uint8_t double_scan;
257 uint8_t padding1[2];
258 uint32_t line_offset;
259 uint32_t vga_addr_mask;
260 uint32_t padding1a;
261 uint32_t line_compare;
262 uint32_t start_addr;
263 uint32_t plane_updated;
264 uint8_t last_cw, last_ch, padding2[2];
265 uint32_t last_width, last_height; /* in chars or pixels */
266 uint32_t last_scr_width, last_scr_height; /* in pixels */
267 uint32_t last_bpp;
268 uint8_t cursor_start, cursor_end;
269 bool last_cur_blink, last_chr_blink;
270 uint32_t cursor_offset;
271 /* hardware mouse cursor support */
272 uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32];
273 /* tell for each page if it has been updated since the last time */
274 uint32_t last_palette[256];
275 uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
276
277 /** end-of-common-state-marker */
278 uint32_t u32Marker;
279
280 /** Pointer to the device instance - RC Ptr. */
281 PPDMDEVINSRC pDevInsRC;
282 /** Pointer to the GC vram mapping. */
283 RCPTRTYPE(uint8_t *) vram_ptrRC;
284 uint32_t Padding1;
285
286 /** Pointer to the device instance - R3 Ptr. */
287 PPDMDEVINSR3 pDevInsR3;
288# ifdef VBOX_WITH_HGSMI
289 R3PTRTYPE(PHGSMIINSTANCE) pHGSMI;
290# endif
291# ifdef VBOX_WITH_VDMA
292 R3PTRTYPE(PVBOXVDMAHOST) pVdma;
293# endif
294 /** LUN\#0: The display port base interface. */
295 PDMIBASE IBase;
296 /** LUN\#0: The display port interface. */
297 PDMIDISPLAYPORT IPort;
298# if defined(VBOX_WITH_HGSMI) && (defined(VBOX_WITH_VIDEOHWACCEL) || defined(VBOX_WITH_CRHGSMI))
299 /** LUN\#0: VBVA callbacks interface */
300 PDMIDISPLAYVBVACALLBACKS IVBVACallbacks;
301# else
302 RTR3PTR Padding2;
303# endif
304 /** Status LUN: Leds interface. */
305 PDMILEDPORTS ILeds;
306
307 /** Pointer to base interface of the driver. */
308 R3PTRTYPE(PPDMIBASE) pDrvBase;
309 /** Pointer to display connector interface of the driver. */
310 R3PTRTYPE(PPDMIDISPLAYCONNECTOR) pDrv;
311
312 /** Status LUN: Partner of ILeds. */
313 R3PTRTYPE(PPDMILEDCONNECTORS) pLedsConnector;
314
315 /** Refresh timer handle - HC. */
316 PTMTIMERR3 RefreshTimer;
317
318 /** Pointer to the device instance - R0 Ptr. */
319 PPDMDEVINSR0 pDevInsR0;
320 /** The R0 vram pointer... */
321 R0PTRTYPE(uint8_t *) vram_ptrR0;
322
323# ifdef VBOX_WITH_VMSVGA
324 VMSVGAState svga;
325# endif
326
327 /** The number of monitors. */
328 uint32_t cMonitors;
329 /** Current refresh timer interval. */
330 uint32_t cMilliesRefreshInterval;
331 /** Bitmap tracking dirty pages. */
332 uint32_t au32DirtyBitmap[VGA_VRAM_MAX / PAGE_SIZE / 32];
333
334 /** Flag indicating that there are dirty bits. This is used to optimize the handler resetting. */
335 bool fHasDirtyBits;
336 /** LFB was updated flag. */
337 bool fLFBUpdated;
338 /** Indicates if the GC extensions are enabled or not. */
339 bool fGCEnabled;
340 /** Indicates if the R0 extensions are enabled or not. */
341 bool fR0Enabled;
342 /** Flag indicating that the VGA memory in the 0xa0000-0xbffff region has been remapped to allow direct access. */
343 bool fRemappedVGA;
344 /** Whether to render the guest VRAM to the framebuffer memory. False only for some LFB modes. */
345 bool fRenderVRAM;
346 /** Whether 3D is enabled for the VM. */
347 bool f3DEnabled;
348# ifdef VBOX_WITH_VMSVGA
349 /* Whether the SVGA emulation is enabled or not. */
350 bool fVMSVGAEnabled;
351 bool fVMSVGAPciId;
352 bool Padding4[0+3];
353# else
354 bool Padding4[1+4];
355# endif
356
357 /** Physical access type for the linear frame buffer dirty page tracking. */
358 PGMPHYSHANDLERTYPE hLfbAccessHandlerType;
359
360 /** The physical address the VRAM was assigned. */
361 RTGCPHYS GCPhysVRAM;
362 /** The critical section protect the instance data. */
363 PDMCRITSECT CritSect;
364 /** The PCI device. */
365 PDMPCIDEV Dev;
366
367 STAMPROFILE StatRZMemoryRead;
368 STAMPROFILE StatR3MemoryRead;
369 STAMPROFILE StatRZMemoryWrite;
370 STAMPROFILE StatR3MemoryWrite;
371 STAMCOUNTER StatMapPage; /**< Counts IOMMMIOMapMMIO2Page calls. */
372 STAMCOUNTER StatUpdateDisp; /**< Counts vgaPortUpdateDisplay calls. */
373
374 /* Keep track of ring 0 latched accesses to the VGA MMIO memory. */
375 uint64_t u64LastLatchedAccess;
376 uint32_t cLatchAccesses;
377 uint16_t uMaskLatchAccess;
378 uint16_t iMask;
379
380# ifdef VBE_BYTEWISE_IO
381 /** VBE read/write data/index flags */
382 uint8_t fReadVBEData;
383 uint8_t fWriteVBEData;
384 uint8_t fReadVBEIndex;
385 uint8_t fWriteVBEIndex;
386 /** VBE write data/index one byte buffer */
387 uint8_t cbWriteVBEData;
388 uint8_t cbWriteVBEIndex;
389 /** VBE Extra Data write address one byte buffer */
390 uint8_t cbWriteVBEExtraAddress;
391 uint8_t Padding5;
392# endif
393
394 /** Retrace emulation state */
395 bool fRealRetrace;
396 bool Padding6[HC_ARCH_BITS == 64 ? 7 : 3];
397 vga_retrace_s retrace_state;
398
399 /** The VBE BIOS extra data. */
400 R3PTRTYPE(uint8_t *) pbVBEExtraData;
401 /** The size of the VBE BIOS extra data. */
402 uint16_t cbVBEExtraData;
403 /** The VBE BIOS current memory address. */
404 uint16_t u16VBEExtraAddress;
405 uint16_t Padding7[2];
406
407 /** The BIOS logo data. */
408 R3PTRTYPE(uint8_t *) pbLogo;
409 /** The name of the logo file. */
410 R3PTRTYPE(char *) pszLogoFile;
411 /** Bitmap image data. */
412 R3PTRTYPE(uint8_t *) pbLogoBitmap;
413 /** Current logo data offset. */
414 uint32_t offLogoData;
415 /** The size of the BIOS logo data. */
416 uint32_t cbLogo;
417 /** Current logo command. */
418 uint16_t LogoCommand;
419 /** Bitmap width. */
420 uint16_t cxLogo;
421 /** Bitmap height. */
422 uint16_t cyLogo;
423 /** Bitmap planes. */
424 uint16_t cLogoPlanes;
425 /** Bitmap depth. */
426 uint16_t cLogoBits;
427 /** Bitmap compression. */
428 uint16_t LogoCompression;
429 /** Bitmap colors used. */
430 uint16_t cLogoUsedColors;
431 /** Palette size. */
432 uint16_t cLogoPalEntries;
433 /** Clear screen flag. */
434 uint8_t fLogoClearScreen;
435 bool fBootMenuInverse;
436 uint8_t Padding8[6];
437 /** Palette data. */
438 uint32_t au32LogoPalette[256];
439
440 /** The VGA BIOS ROM data. */
441 R3PTRTYPE(uint8_t *) pbVgaBios;
442 /** The size of the VGA BIOS ROM. */
443 uint64_t cbVgaBios;
444 /** The name of the VGA BIOS ROM file. */
445 R3PTRTYPE(char *) pszVgaBiosFile;
446# if HC_ARCH_BITS == 32
447 uint32_t Padding9;
448# endif
449
450# ifdef VBOX_WITH_HGSMI
451 /** Base port in the assigned PCI I/O space. */
452 RTIOPORT IOPortBase;
453# ifdef VBOX_WITH_WDDM
454 uint8_t Padding10[2];
455 /** Specifies guest driver caps, i.e. whether it can handle IRQs from the
456 * adapter, the way it can handle async HGSMI command completion, etc. */
457 uint32_t fGuestCaps;
458 uint32_t fScanLineCfg;
459 uint32_t fHostCursorCapabilities;
460# else
461 uint8_t Padding11[14];
462# endif
463
464 /** The critical section serializes the HGSMI IRQ setting/clearing. */
465 PDMCRITSECT CritSectIRQ;
466 /** VBVARaiseIRQ flags which were set when the guest was still processing previous IRQ. */
467 uint32_t fu32PendingGuestFlags;
468 uint32_t Padding12;
469# endif /* VBOX_WITH_HGSMI */
470
471 PDMLED Led3D;
472
473 struct {
474 volatile uint32_t cPending;
475 uint32_t Padding1;
476 union
477 {
478 RTLISTNODE PendingList;
479 /* make sure the structure sized cross different contexts correctly */
480 struct
481 {
482 R3PTRTYPE(void *) dummy1;
483 R3PTRTYPE(void *) dummy2;
484 } dummy;
485 };
486 } pendingVhwaCommands;
487#endif /* VBOX */
488} VGAState;
489#ifdef VBOX
490/** VGA state. */
491typedef VGAState VGASTATE;
492/** Pointer to the VGA state. */
493typedef VGASTATE *PVGASTATE;
494AssertCompileMemberAlignment(VGASTATE, bank_offset, 8);
495AssertCompileMemberAlignment(VGASTATE, font_offsets, 8);
496AssertCompileMemberAlignment(VGASTATE, last_ch_attr, 8);
497AssertCompileMemberAlignment(VGASTATE, u32Marker, 8);
498#endif
499
500/** VBE Extra Data. */
501typedef VBEHeader VBEHEADER;
502/** Pointer to the VBE Extra Data. */
503typedef VBEHEADER *PVBEHEADER;
504
505#if !defined(VBOX) || defined(IN_RING3)
506static inline int c6_to_8(int v)
507{
508 int b;
509 v &= 0x3f;
510 b = v & 1;
511 return (v << 2) | (b << 1) | b;
512}
513#endif /* !VBOX || IN_RING3 */
514
515
516#ifdef VBOX_WITH_HGSMI
517int VBVAInit (PVGASTATE pVGAState);
518void VBVADestroy (PVGASTATE pVGAState);
519int VBVAUpdateDisplay (PVGASTATE pVGAState);
520void VBVAReset (PVGASTATE pVGAState);
521void VBVAPause (PVGASTATE pVGAState, bool fPause);
522void VBVAOnVBEChanged(PVGASTATE pVGAState);
523void VBVAOnResume(PVGASTATE pThis);
524
525bool VBVAIsPaused(PVGASTATE pVGAState);
526bool VBVAIsEnabled(PVGASTATE pVGAState);
527
528void VBVARaiseIrq(PVGASTATE pVGAState, uint32_t fFlags);
529
530int VBVAInfoView(PVGASTATE pVGAState, const VBVAINFOVIEW RT_UNTRUSTED_VOLATILE_HOST *pView);
531int VBVAInfoScreen(PVGASTATE pVGAState, const VBVAINFOSCREEN RT_UNTRUSTED_VOLATILE_HOST *pScreen);
532int VBVAGetInfoViewAndScreen(PVGASTATE pVGAState, uint32_t u32ViewIndex, VBVAINFOVIEW *pView, VBVAINFOSCREEN *pScreen);
533
534/* @return host-guest flags that were set on reset
535 * this allows the caller to make further cleaning when needed,
536 * e.g. reset the IRQ */
537uint32_t HGSMIReset(PHGSMIINSTANCE pIns);
538
539# ifdef VBOX_WITH_VIDEOHWACCEL
540DECLCALLBACK(int) vbvaVHWACommandCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface, VBOXVHWACMD RT_UNTRUSTED_VOLATILE_GUEST *pCmd);
541int vbvaVHWAConstruct(PVGASTATE pVGAState);
542int vbvaVHWAReset(PVGASTATE pVGAState);
543
544void vbvaTimerCb(PVGASTATE pVGAState);
545
546int vboxVBVASaveStatePrep(PPDMDEVINS pDevIns);
547int vboxVBVASaveStateDone(PPDMDEVINS pDevIns);
548# endif
549
550#ifdef VBOX_WITH_HGSMI
551#define PPDMIDISPLAYVBVACALLBACKS_2_PVGASTATE(_pcb) ( (PVGASTATE)((uint8_t *)(_pcb) - RT_OFFSETOF(VGASTATE, IVBVACallbacks)) )
552#endif
553
554# ifdef VBOX_WITH_CRHGSMI
555DECLCALLBACK(int) vboxVDMACrHgsmiCommandCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface,
556 PVBOXVDMACMD_CHROMIUM_CMD pCmd, int rc);
557DECLCALLBACK(int) vboxVDMACrHgsmiControlCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface,
558 PVBOXVDMACMD_CHROMIUM_CTL pCmd, int rc);
559DECLCALLBACK(int) vboxCmdVBVACmdHostCtl(PPDMIDISPLAYVBVACALLBACKS pInterface,
560 struct VBOXCRCMDCTL* pCmd, uint32_t cbCmd,
561 PFNCRCTLCOMPLETION pfnCompletion,
562 void *pvCompletion);
563DECLCALLBACK(int) vboxCmdVBVACmdHostCtlSync(PPDMIDISPLAYVBVACALLBACKS pInterface,
564 struct VBOXCRCMDCTL* pCmd, uint32_t cbCmd);
565# endif
566
567int vboxVBVASaveStateExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
568int vboxVBVALoadStateExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t u32Version);
569int vboxVBVALoadStateDone(PPDMDEVINS pDevIns);
570
571DECLCALLBACK(int) vgaUpdateDisplayAll(PVGASTATE pThis, bool fFailOnResize);
572DECLCALLBACK(int) vbvaPortSendModeHint(PPDMIDISPLAYPORT pInterface, uint32_t cx,
573 uint32_t cy, uint32_t cBPP,
574 uint32_t cDisplay, uint32_t dx,
575 uint32_t dy, uint32_t fEnabled,
576 uint32_t fNotifyGuest);
577DECLCALLBACK(void) vbvaPortReportHostCursorCapabilities(PPDMIDISPLAYPORT pInterface, uint32_t fCapabilitiesAdded,
578 uint32_t fCapabilitiesRemoved);
579DECLCALLBACK(void) vbvaPortReportHostCursorPosition(PPDMIDISPLAYPORT pInterface, uint32_t x, uint32_t y);
580
581# ifdef VBOX_WITH_VDMA
582typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
583int vboxVDMAConstruct(PVGASTATE pVGAState, uint32_t cPipeElements);
584void vboxVDMADestruct(PVBOXVDMAHOST pVdma);
585void vboxVDMAReset(PVBOXVDMAHOST pVdma);
586void vboxVDMAControl(PVBOXVDMAHOST pVdma, VBOXVDMA_CTL RT_UNTRUSTED_VOLATILE_GUEST *pCmd, uint32_t cbCmd);
587void vboxVDMACommand(PVBOXVDMAHOST pVdma, VBOXVDMACBUF_DR RT_UNTRUSTED_VOLATILE_GUEST *pCmd, uint32_t cbCmd);
588int vboxVDMASaveStateExecPrep(struct VBOXVDMAHOST *pVdma);
589int vboxVDMASaveStateExecDone(struct VBOXVDMAHOST *pVdma);
590int vboxVDMASaveStateExecPerform(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM);
591int vboxVDMASaveLoadExecPerform(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM, uint32_t u32Version);
592int vboxVDMASaveLoadDone(struct VBOXVDMAHOST *pVdma);
593# endif /* VBOX_WITH_VDMA */
594
595# ifdef VBOX_WITH_CRHGSMI
596int vboxCmdVBVACmdSubmit(PVGASTATE pVGAState);
597int vboxCmdVBVACmdFlush(PVGASTATE pVGAState);
598int vboxCmdVBVACmdCtl(PVGASTATE pVGAState, VBOXCMDVBVA_CTL RT_UNTRUSTED_VOLATILE_GUEST *pCtl, uint32_t cbCtl);
599void vboxCmdVBVATimerRefresh(PVGASTATE pVGAState);
600bool vboxCmdVBVAIsEnabled(PVGASTATE pVGAState);
601# endif /* VBOX_WITH_CRHGSMI */
602#endif /* VBOX_WITH_HGSMI */
603
604# ifdef VBOX_WITH_VMSVGA
605int vgaR3RegisterVRAMHandler(PVGASTATE pVGAState, uint64_t cbFrameBuffer);
606int vgaR3UnregisterVRAMHandler(PVGASTATE pVGAState);
607int vgaR3UpdateDisplay(PVGASTATE pVGAState, unsigned xStart, unsigned yStart, unsigned width, unsigned height);
608# endif
609
610#ifndef VBOX
611void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base,
612 unsigned long vga_ram_offset, int vga_ram_size);
613uint32_t vga_mem_readb(void *opaque, target_phys_addr_t addr);
614void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val);
615void vga_invalidate_scanlines(VGAState *s, int y1, int y2);
616
617void vga_draw_cursor_line_8(uint8_t *d1, const uint8_t *src1,
618 int poffset, int w,
619 unsigned int color0, unsigned int color1,
620 unsigned int color_xor);
621void vga_draw_cursor_line_16(uint8_t *d1, const uint8_t *src1,
622 int poffset, int w,
623 unsigned int color0, unsigned int color1,
624 unsigned int color_xor);
625void vga_draw_cursor_line_32(uint8_t *d1, const uint8_t *src1,
626 int poffset, int w,
627 unsigned int color0, unsigned int color1,
628 unsigned int color_xor);
629
630extern const uint8_t sr_mask[8];
631extern const uint8_t gr_mask[16];
632#endif /* !VBOX */
633
634#endif /* !VBOX_INCLUDED_SRC_Graphics_DevVGA_h */
635
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