DevVGA.h@ 104777

Last change on this file since 104777 was 104777, checked in by vboxsync, 6 months ago
Devices: Compile fix for using DevVGA.h if VBOX_WITH_VMSVGA is not defined. bugref:10693
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1	/* $Id: DevVGA.h 104777 2024-05-24 13:19:52Z vboxsync $ */
2	/** @file
3	* DevVGA - VBox VGA/VESA device, internal header.
4	*/
5
6	/*
7	* Copyright (C) 2006-2023 Oracle and/or its affiliates.
8	*
9	* This file is part of VirtualBox base platform packages, as
10	* available from https://www.virtualbox.org.
11	*
12	* This program is free software; you can redistribute it and/or
13	* modify it under the terms of the GNU General Public License
14	* as published by the Free Software Foundation, in version 3 of the
15	* License.
16	*
17	* This program is distributed in the hope that it will be useful, but
18	* WITHOUT ANY WARRANTY; without even the implied warranty of
19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20	* General Public License for more details.
21	*
22	* You should have received a copy of the GNU General Public License
23	* along with this program; if not, see <https://www.gnu.org/licenses>.
24	*
25	* SPDX-License-Identifier: GPL-3.0-only
26	* --------------------------------------------------------------------
27	*
28	* This code is based on:
29	*
30	* QEMU internal VGA defines.
31	*
32	* Copyright (c) 2003-2004 Fabrice Bellard
33	*
34	* Permission is hereby granted, free of charge, to any person obtaining a copy
35	* of this software and associated documentation files (the "Software"), to deal
36	* in the Software without restriction, including without limitation the rights
37	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
38	* copies of the Software, and to permit persons to whom the Software is
39	* furnished to do so, subject to the following conditions:
40	*
41	* The above copyright notice and this permission notice shall be included in
42	* all copies or substantial portions of the Software.
43	*
44	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
45	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
46	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
47	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
48	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
49	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
50	* THE SOFTWARE.
51	*/
52
53	#ifndef VBOX_INCLUDED_SRC_Graphics_DevVGA_h
54	#define VBOX_INCLUDED_SRC_Graphics_DevVGA_h
55	#ifndef RT_WITHOUT_PRAGMA_ONCE
56	# pragma once
57	#endif
58
59	#include <VBoxVideoVBE.h>
60	#include <VBoxVideoVBEPrivate.h>
61
62	#ifdef VBOX_WITH_HGSMI
63	# include "HGSMI/HGSMIHost.h"
64	#endif /* VBOX_WITH_HGSMI */
65	#include "DevVGASavedState.h"
66
67	#ifdef VBOX_WITH_VMSVGA
68	# include "DevVGA-SVGA.h"
69	#else
70	# include <VBox/vmm/pdmifs.h>
71	# include <VBox/vmm/stam.h>
72	#endif
73
74	#include <iprt/list.h>
75
76
77	/** Use VBE bytewise I/O. Only needed for Windows Longhorn/Vista betas and backwards compatibility. */
78	#define VBE_BYTEWISE_IO
79
80	#ifdef VBOX
81	/** The default amount of VRAM. */
82	# define VGA_VRAM_DEFAULT (_4M)
83	/** The maximum amount of VRAM. Limited by VBOX_MAX_ALLOC_PAGE_COUNT. */
84	# define VGA_VRAM_MAX (256 * _1M)
85	/** The minimum amount of VRAM. */
86	# define VGA_VRAM_MIN (_1M)
87	#endif
88
89
90	/** @name Macros dealing with partial ring-0/raw-mode VRAM mappings.
91	* @{ */
92	/** The size of the VGA ring-0 and raw-mode mapping.
93	*
94	* This is supposed to be all the VGA memory accessible to the guest.
95	* The initial value was 256KB but NTAllInOne.iso appears to access more
96	* thus the limit was upped to 512KB.
97	*
98	* @todo Someone with some VGA knowhow should make a better guess at this value.
99	*/
100	#define VGA_MAPPING_SIZE _512K
101	/** Enables partially mapping the VRAM into ring-0 rather than using the ring-3.
102	* The VGA_MAPPING_SIZE define sets the number of bytes that will be mapped. */
103	#define VGA_WITH_PARTIAL_RING0_MAPPING
104
105	/**
106	* Check buffer if an VRAM offset is within the right range or not.
107	*/
108	#if defined(IN_RC) \|\| defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) \|\| (defined(IN_RING0) && defined(VGA_WITH_PARTIAL_RING0_MAPPING))
109	# define VERIFY_VRAM_WRITE_OFF_RETURN(pThis, off) \
110	do { \
111	if ((off) < VGA_MAPPING_SIZE) \
112	RT_UNTRUSTED_VALIDATED_FENCE(); \
113	else \
114	{ \
115	AssertMsgReturn((off) < (pThis)->vram_size, ("%RX32 !< %RX32\n", (uint32_t)(off), (pThis)->vram_size), VINF_SUCCESS); \
116	Log2(("%Rfn[%d]: %RX32 -> R3\n", __PRETTY_FUNCTION__, __LINE__, (off))); \
117	return VINF_IOM_R3_MMIO_WRITE; \
118	} \
119	} while (0)
120	#else
121	# define VERIFY_VRAM_WRITE_OFF_RETURN(pThis, off) \
122	do { \
123	AssertMsgReturn((off) < (pThis)->vram_size, ("%RX32 !< %RX32\n", (uint32_t)(off), (pThis)->vram_size), VINF_SUCCESS); \
124	RT_UNTRUSTED_VALIDATED_FENCE(); \
125	} while (0)
126	#endif
127
128	/**
129	* Check buffer if an VRAM offset is within the right range or not.
130	*/
131	#if defined(IN_RC) \|\| defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) \|\| (defined(IN_RING0) && defined(VGA_WITH_PARTIAL_RING0_MAPPING))
132	# define VERIFY_VRAM_READ_OFF_RETURN(pThis, off, rcVar) \
133	do { \
134	if ((off) < VGA_MAPPING_SIZE) \
135	RT_UNTRUSTED_VALIDATED_FENCE(); \
136	else \
137	{ \
138	AssertMsgReturn((off) < (pThis)->vram_size, ("%RX32 !< %RX32\n", (uint32_t)(off), (pThis)->vram_size), 0xff); \
139	Log2(("%Rfn[%d]: %RX32 -> R3\n", __PRETTY_FUNCTION__, __LINE__, (off))); \
140	(rcVar) = VINF_IOM_R3_MMIO_READ; \
141	return 0; \
142	} \
143	} while (0)
144	#else
145	# define VERIFY_VRAM_READ_OFF_RETURN(pThis, off, rcVar) \
146	do { \
147	AssertMsgReturn((off) < (pThis)->vram_size, ("%RX32 !< %RX32\n", (uint32_t)(off), (pThis)->vram_size), 0xff); \
148	RT_UNTRUSTED_VALIDATED_FENCE(); \
149	NOREF(rcVar); \
150	} while (0)
151	#endif
152	/** @} */
153
154
155	#define MSR_COLOR_EMULATION 0x01
156	#define MSR_PAGE_SELECT 0x20
157
158	#define ST01_V_RETRACE 0x08
159	#define ST01_DISP_ENABLE 0x01
160
161	/* bochs VBE support */
162	#define CONFIG_BOCHS_VBE
163
164	#ifdef CONFIG_BOCHS_VBE
165
166	/* Cross reference with <VBoxVideoVBE.h> */
167	#define VBE_DISPI_INDEX_NB_SAVED 0xb /* Old number of saved registers (vbe_regs array, see vga_load) */
168	#define VBE_DISPI_INDEX_NB 0xd /* Total number of VBE registers */
169
170	#define VGA_STATE_COMMON_BOCHS_VBE \
171	uint16_t vbe_index; \
172	uint16_t vbe_regs[VBE_DISPI_INDEX_NB]; \
173	uint16_t alignment[2]; /* pad to 64 bits */ \
174	uint32_t vbe_start_addr; \
175	uint32_t vbe_line_offset; \
176	uint32_t vbe_bank_max;
177
178	#else
179
180	#define VGA_STATE_COMMON_BOCHS_VBE
181
182	#endif /* !CONFIG_BOCHS_VBE */
183
184	#define CH_ATTR_SIZE (160 * 100)
185	#define VGA_MAX_HEIGHT VBE_DISPI_MAX_YRES
186
187	typedef struct vga_retrace_s {
188	unsigned frame_cclks; /* Character clocks per frame. */
189	unsigned frame_ns; /* Frame duration in ns. */
190	unsigned cclk_ns; /* Character clock duration in ns. */
191	unsigned vb_start; /* Vertical blanking start (scanline). */
192	unsigned vb_end; /* Vertical blanking end (scanline). */
193	unsigned vb_end_ns; /* Vertical blanking end time (length) in ns. */
194	unsigned vs_start; /* Vertical sync start (scanline). */
195	unsigned vs_end; /* Vertical sync end (scanline). */
196	unsigned vs_start_ns; /* Vertical sync start time in ns. */
197	unsigned vs_end_ns; /* Vertical sync end time in ns. */
198	unsigned h_total; /* Horizontal total (cclks per scanline). */
199	unsigned h_total_ns; /* Scanline duration in ns. */
200	unsigned hb_start; /* Horizontal blanking start (cclk). */
201	unsigned hb_end; /* Horizontal blanking end (cclk). */
202	unsigned hb_end_ns; /* Horizontal blanking end time (length) in ns. */
203	unsigned v_freq_hz; /* Vertical refresh rate to emulate. */
204	} vga_retrace_s;
205
206	#ifndef VBOX
207	#define VGA_STATE_COMMON \
208	unsigned long vram_offset; \
209	unsigned int vram_size; \
210	uint32_t latch; \
211	uint8_t sr_index; \
212	uint8_t sr[256]; \
213	uint8_t gr_index; \
214	uint8_t gr[256]; \
215	uint8_t ar_index; \
216	uint8_t ar[21]; \
217	int ar_flip_flop; \
218	uint8_t cr_index; \
219	uint8_t cr[256]; /* CRT registers */ \
220	uint8_t msr; /* Misc Output Register */ \
221	uint8_t fcr; /* Feature Control Register */ \
222	uint8_t st00; /* status 0 */ \
223	uint8_t st01; /* status 1 */ \
224	uint8_t dac_state; \
225	uint8_t dac_sub_index; \
226	uint8_t dac_read_index; \
227	uint8_t dac_write_index; \
228	uint8_t dac_cache[3]; /* used when writing */ \
229	uint8_t palette[768]; \
230	int32_t bank_offset; \
231	int (get_bpp)(struct VGAState s); \
232	void (get_offsets)(struct VGAState s, \
233	uint32_t *pline_offset, \
234	uint32_t *pstart_addr, \
235	uint32_t *pline_compare); \
236	void (get_resolution)(struct VGAState s, \
237	int *pwidth, \
238	int *pheight); \
239	VGA_STATE_COMMON_BOCHS_VBE \
240	/* display refresh support */ \
241	DisplayState *ds; \
242	uint32_t font_offsets[2]; \
243	int graphic_mode; \
244	uint8_t shift_control; \
245	uint8_t double_scan; \
246	uint32_t line_offset; \
247	uint32_t line_compare; \
248	uint32_t start_addr; \
249	uint32_t plane_updated; \
250	uint8_t last_cw, last_ch; \
251	uint32_t last_width, last_height; /* in chars or pixels */ \
252	uint32_t last_scr_width, last_scr_height; /* in pixels */ \
253	uint8_t cursor_start, cursor_end; \
254	uint32_t cursor_offset; \
255	unsigned int (*rgb_to_pixel)(unsigned int r, \
256	unsigned int g, unsigned b); \
257	/* hardware mouse cursor support */ \
258	uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32]; \
259	void (cursor_invalidate)(struct VGAState s); \
260	void (cursor_draw_line)(struct VGAState s, uint8_t *d, int y); \
261	/* tell for each page if it has been updated since the last time */ \
262	uint32_t last_palette[256]; \
263	uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
264
265	#else /* VBOX */
266
267	/* bird: Since we've changed types, reordered members, done alignment
268	paddings and more, VGA_STATE_COMMON was added directly to the
269	struct to make it more readable and easier to handle. */
270
271	struct VGAState;
272	typedef int FNGETBPP(struct VGAState *s);
273	typedef void FNGETOFFSETS(struct VGAState s, uint32_t pline_offset, uint32_t pstart_addr, uint32_t pline_compare);
274	typedef void FNGETRESOLUTION(struct VGAState s, int pwidth, int *pheight);
275	typedef unsigned int FNRGBTOPIXEL(unsigned int r, unsigned int g, unsigned b);
276	typedef void FNCURSORINVALIDATE(struct VGAState *s);
277	typedef void FNCURSORDRAWLINE(struct VGAState s, uint8_t d, int y);
278
279	#endif /* VBOX */
280
281	#ifdef VBOX_WITH_VDMA
282	typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
283	#endif
284
285	#ifdef VBOX_WITH_VIDEOHWACCEL
286	#define VBOX_VHWA_MAX_PENDING_COMMANDS 1000
287
288	typedef struct _VBOX_VHWA_PENDINGCMD
289	{
290	RTLISTNODE Node;
291	VBOXVHWACMD RT_UNTRUSTED_VOLATILE_GUEST *pCommand;
292	} VBOX_VHWA_PENDINGCMD;
293	#endif
294
295
296	/**
297	* The shared VGA state data.
298	*/
299	typedef struct VGAState
300	{
301	uint32_t vram_size;
302	uint32_t latch;
303	uint8_t sr_index;
304	uint8_t sr[256];
305	uint8_t gr_index;
306	uint8_t gr[256];
307	uint8_t ar_index;
308	uint8_t ar[21];
309	int32_t ar_flip_flop;
310	uint8_t cr_index;
311	uint8_t cr[256]; /* CRT registers */
312	uint8_t msr; /* Misc Output Register */
313	uint8_t fcr; /* Feature Control Register */
314	uint8_t st00; /* status 0 */
315	uint8_t st01; /* status 1 */
316	uint8_t dac_state;
317	uint8_t dac_sub_index;
318	uint8_t dac_read_index;
319	uint8_t dac_write_index;
320	uint8_t dac_cache[3]; /* used when writing */
321	uint8_t palette[768];
322	int32_t bank_offset;
323	VGA_STATE_COMMON_BOCHS_VBE
324	/* display refresh support */
325	uint32_t font_offsets[2];
326	int32_t graphic_mode;
327	uint8_t shift_control;
328	uint8_t double_scan;
329	uint8_t padding1[2];
330	uint32_t line_offset;
331	uint32_t vga_addr_mask;
332	uint32_t padding1a;
333	uint32_t line_compare;
334	uint32_t start_addr;
335	uint32_t plane_updated;
336	uint8_t last_cw, last_ch;
337	uint8_t last_uline; \
338	bool last_blink; \
339	uint32_t last_width, last_height; /* in chars or pixels */
340	uint32_t last_scr_width, last_scr_height; /* in pixels */
341	uint32_t last_bpp;
342	uint8_t cursor_start, cursor_end;
343	bool last_cur_blink, last_chr_blink;
344	uint32_t cursor_offset;
345	/** hardware mouse cursor support */
346	uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32];
347	/** tell for each page if it has been updated since the last time */
348	uint32_t last_palette[256];
349	uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
350
351	/** end-of-common-state-marker */
352	uint32_t u32Marker;
353
354	/** Refresh timer handle - HC. */
355	TMTIMERHANDLE hRefreshTimer;
356
357	#ifdef VBOX_WITH_VMSVGA
358	VMSVGASTATE svga;
359	#endif
360
361	/** The number of monitors. */
362	uint32_t cMonitors;
363	/** Current refresh timer interval. */
364	uint32_t cMilliesRefreshInterval;
365	/** Bitmap tracking dirty pages. */
366	uint64_t bmDirtyBitmap[VGA_VRAM_MAX / GUEST_PAGE_SIZE / 64];
367	/** Bitmap tracking which VGA memory pages in the 0xa0000-0xbffff region has
368	* been remapped to allow direct access.
369	* @note It's quite possible that mapping in the 0xb0000-0xbffff isn't possible,
370	* but we're playing safe and cover the whole VGA MMIO region here. */
371	uint32_t bmPageRemappedVGA;
372
373	/** Flag indicating that there are dirty bits. This is used to optimize the handler resetting. */
374	bool fHasDirtyBits;
375	/** Whether to render the guest VRAM to the framebuffer memory. False only for some LFB modes. */
376	bool fRenderVRAM;
377	/** Whether 3D is enabled for the VM. */
378	bool f3DEnabled;
379	/** Set if state has been restored. */
380	bool fStateLoaded;
381	/** Flag whether to expose the legacy VGA interface to the guest. */
382	bool fLegacyVgaEnabled;
383	#ifdef VBOX_WITH_VMSVGA
384	/* Whether the SVGA emulation is enabled or not. */
385	bool fVMSVGAEnabled;
386	bool fVMSVGA10;
387	bool fVMSVGAPciId;
388	bool fVMSVGAPciBarLayout;
389	/** Flag whether the SVGA3 interface is exposed to the guest. */
390	bool fVmSvga3;
391	#else
392	bool afPadding4[5];
393	#endif
394
395	struct {
396	uint32_t u32Padding1;
397	uint32_t iVRAM;
398	#ifdef VBOX_WITH_VMSVGA
399	uint32_t iIO;
400	uint32_t iFIFO;
401	#endif
402	} pciRegions;
403
404	/** The physical address the VRAM was assigned. */
405	RTGCPHYS GCPhysVRAM;
406	/** The critical section protect the instance data. */
407	PDMCRITSECT CritSect;
408
409	/* Keep track of ring 0 latched accesses to the VGA MMIO memory. */
410	uint64_t u64LastLatchedAccess;
411	uint32_t cLatchAccesses;
412	uint16_t uMaskLatchAccess;
413	uint16_t iMask;
414
415	#ifdef VBE_BYTEWISE_IO
416	/** VBE read/write data/index flags */
417	uint8_t fReadVBEData;
418	uint8_t fWriteVBEData;
419	uint8_t fReadVBEIndex;
420	uint8_t fWriteVBEIndex;
421	/** VBE write data/index one byte buffer */
422	uint8_t cbWriteVBEData;
423	uint8_t cbWriteVBEIndex;
424	/** VBE Extra Data write address one byte buffer */
425	uint8_t cbWriteVBEExtraAddress;
426	uint8_t Padding5;
427	#endif
428
429	/** Retrace emulation state */
430	bool fRealRetrace;
431	bool Padding6[HC_ARCH_BITS == 64 ? 7 : 3];
432	vga_retrace_s retrace_state;
433
434	#ifdef VBOX_WITH_HGSMI
435	/** Base port in the assigned PCI I/O space. */
436	RTIOPORT IOPortBase;
437	# ifdef VBOX_WITH_WDDM
438	uint8_t Padding10[2];
439	/** Specifies guest driver caps, i.e. whether it can handle IRQs from the
440	* adapter, the way it can handle async HGSMI command completion, etc. */
441	uint32_t fGuestCaps;
442	uint32_t fScanLineCfg;
443	uint32_t Padding11;
444	# else
445	uint8_t Padding11[14];
446	# endif
447
448	/** The critical section serializes the HGSMI IRQ setting/clearing. */
449	PDMCRITSECT CritSectIRQ;
450	/** VBVARaiseIRQ flags which were set when the guest was still processing previous IRQ. */
451	uint32_t fu32PendingGuestFlags;
452	uint32_t Padding12;
453	#endif /* VBOX_WITH_HGSMI */
454
455	PDMLED Led3D;
456
457	struct {
458	volatile uint32_t cPending;
459	uint32_t Padding1;
460	union
461	{
462	RTLISTNODE PendingList;
463	/* make sure the structure sized cross different contexts correctly */
464	struct
465	{
466	R3PTRTYPE(void *) dummy1;
467	R3PTRTYPE(void *) dummy2;
468	} dummy;
469	};
470	} pendingVhwaCommands;
471
472	/** The MMIO handle of the legacy graphics buffer/regs at 0xa0000-0xbffff. */
473	PGMMMIO2HANDLE hMmioLegacy;
474
475	/** @name I/O ports for range 0x3c0-3cf.
476	* @{ */
477	IOMIOPORTHANDLE hIoPortAr;
478	IOMIOPORTHANDLE hIoPortMsrSt00;
479	IOMIOPORTHANDLE hIoPort3c3;
480	IOMIOPORTHANDLE hIoPortSr;
481	IOMIOPORTHANDLE hIoPortDac;
482	IOMIOPORTHANDLE hIoPortPos;
483	IOMIOPORTHANDLE hIoPortGr;
484	/** @} */
485
486	/** @name I/O ports for MDA 0x3b0-0x3bf (sparse)
487	* @{ */
488	IOMIOPORTHANDLE hIoPortMdaCrt;
489	IOMIOPORTHANDLE hIoPortMdaFcrSt;
490	/** @} */
491
492	/** @name I/O ports for CGA 0x3d0-0x3df (sparse)
493	* @{ */
494	IOMIOPORTHANDLE hIoPortCgaCrt;
495	IOMIOPORTHANDLE hIoPortCgaFcrSt;
496	/** @} */
497
498	#ifdef VBOX_WITH_HGSMI
499	/** @name I/O ports for HGSMI 0x3b0-03b3 and 0x3d0-03d3 (ring-3 only)
500	* @{ */
501	IOMIOPORTHANDLE hIoPortHgsmiHost;
502	IOMIOPORTHANDLE hIoPortHgsmiGuest;
503	/** @} */
504	#endif
505
506	/** @name I/O ports for Boch VBE 0x1ce-0x1cf
507	* @{ */
508	IOMIOPORTHANDLE hIoPortVbeIndex;
509	IOMIOPORTHANDLE hIoPortVbeData;
510	/** @} */
511
512	/** The BIOS printf I/O port. */
513	IOMIOPORTHANDLE hIoPortBios;
514	/** The VBE extra data I/O port. */
515	IOMIOPORTHANDLE hIoPortVbeExtra;
516	/** The logo command I/O port. */
517	IOMIOPORTHANDLE hIoPortCmdLogo;
518
519	#ifdef VBOX_WITH_VMSVGA
520	/** VMSVGA: I/O port PCI region. */
521	IOMIOPORTHANDLE hIoPortVmSvga;
522	/** VMSVGA3: MMIO PCI region for the registers. */
523	IOMMMIOHANDLE hMmioSvga3;
524	/** VMSVGA: The MMIO2 handle of the FIFO PCI region. */
525	PGMMMIO2HANDLE hMmio2VmSvgaFifo;
526	#endif
527	/** The MMIO2 handle of the VRAM. */
528	PGMMMIO2HANDLE hMmio2VRam;
529
530	STAMPROFILE StatRZMemoryRead;
531	STAMPROFILE StatR3MemoryRead;
532	STAMPROFILE StatRZMemoryWrite;
533	STAMPROFILE StatR3MemoryWrite;
534	STAMCOUNTER StatMapPage; /*< Counts IOMMmioMapMmio2Page calls. /
535	STAMCOUNTER StatMapReset; /*< Counts IOMMmioResetRegion calls. /
536	STAMCOUNTER StatUpdateDisp; /*< Counts vgaPortUpdateDisplay calls. /
537	#ifdef VBOX_WITH_HGSMI
538	STAMCOUNTER StatHgsmiMdaCgaAccesses;
539	#endif
540	} VGAState;
541	#ifdef VBOX
542	/** VGA state. */
543	typedef VGAState VGASTATE;
544	/** Pointer to the VGA state. */
545	typedef VGASTATE *PVGASTATE;
546	AssertCompileMemberAlignment(VGASTATE, bank_offset, 8);
547	AssertCompileMemberAlignment(VGASTATE, font_offsets, 8);
548	AssertCompileMemberAlignment(VGASTATE, last_ch_attr, 8);
549	AssertCompileMemberAlignment(VGASTATE, u32Marker, 8);
550	AssertCompile(sizeof(uint64_t)/bmPageMapBitmap/ >= (_64K / GUEST_PAGE_SIZE / 8));
551	#endif
552
553
554	/**
555	* The VGA state data for ring-3 context.
556	*/
557	typedef struct VGASTATER3
558	{
559	R3PTRTYPE(uint8_t *) pbVRam;
560	R3PTRTYPE(FNGETBPP *) get_bpp;
561	R3PTRTYPE(FNGETOFFSETS *) get_offsets;
562	R3PTRTYPE(FNGETRESOLUTION *) get_resolution;
563	R3PTRTYPE(FNRGBTOPIXEL *) rgb_to_pixel;
564	R3PTRTYPE(FNCURSORINVALIDATE *) cursor_invalidate;
565	R3PTRTYPE(FNCURSORDRAWLINE *) cursor_draw_line;
566
567	/** Pointer to the device instance.
568	* @note Only for getting our bearings in interface methods. */
569	PPDMDEVINSR3 pDevIns;
570	#ifdef VBOX_WITH_HGSMI
571	R3PTRTYPE(PHGSMIINSTANCE) pHGSMI;
572	#endif
573	#ifdef VBOX_WITH_VDMA
574	R3PTRTYPE(PVBOXVDMAHOST) pVdma;
575	#endif
576
577	/** LUN\#0: The display port base interface. */
578	PDMIBASE IBase;
579	/** LUN\#0: The display port interface. */
580	PDMIDISPLAYPORT IPort;
581	#ifdef VBOX_WITH_HGSMI
582	/** LUN\#0: VBVA callbacks interface */
583	PDMIDISPLAYVBVACALLBACKS IVBVACallbacks;
584	#endif
585	/** Status LUN: Leds interface. */
586	PDMILEDPORTS ILeds;
587
588	/** Pointer to base interface of the driver. */
589	R3PTRTYPE(PPDMIBASE) pDrvBase;
590	/** Pointer to display connector interface of the driver. */
591	R3PTRTYPE(PPDMIDISPLAYCONNECTOR) pDrv;
592
593	/** Status LUN: Partner of ILeds. */
594	R3PTRTYPE(PPDMILEDCONNECTORS) pLedsConnector;
595
596	#ifdef VBOX_WITH_VMSVGA
597	/** The VMSVGA ring-3 state. */
598	VMSVGASTATER3 svga;
599	#endif
600
601	/** The VGA BIOS ROM data. */
602	R3PTRTYPE(uint8_t *) pbVgaBios;
603	/** The size of the VGA BIOS ROM. */
604	uint64_t cbVgaBios;
605	/** The name of the VGA BIOS ROM file. */
606	R3PTRTYPE(char *) pszVgaBiosFile;
607
608	/** @name Logo data
609	* @{ */
610	/** Current logo data offset. */
611	uint32_t offLogoData;
612	/** The size of the BIOS logo data. */
613	uint32_t cbLogo;
614	/** Current logo command. */
615	uint16_t LogoCommand;
616	/** Bitmap width. */
617	uint16_t cxLogo;
618	/** Bitmap height. */
619	uint16_t cyLogo;
620	/** Bitmap planes. */
621	uint16_t cLogoPlanes;
622	/** Bitmap depth. */
623	uint16_t cLogoBits;
624	/** Bitmap compression. */
625	uint16_t LogoCompression;
626	/** Bitmap colors used. */
627	uint16_t cLogoUsedColors;
628	/** Palette size. */
629	uint16_t cLogoPalEntries;
630	/** Clear screen flag. */
631	uint8_t fLogoClearScreen;
632	bool fBootMenuInverse;
633	uint8_t Padding8[6];
634	/** Palette data. */
635	uint32_t au32LogoPalette[256];
636	/** The BIOS logo data. */
637	R3PTRTYPE(uint8_t *) pbLogo;
638	/** The name of the logo file. */
639	R3PTRTYPE(char *) pszLogoFile;
640	/** Bitmap image data. */
641	R3PTRTYPE(uint8_t *) pbLogoBitmap;
642	/** @} */
643
644	/** @name VBE extra data (modes)
645	* @{ */
646	/** The VBE BIOS extra data. */
647	R3PTRTYPE(uint8_t *) pbVBEExtraData;
648	/** The size of the VBE BIOS extra data. */
649	uint16_t cbVBEExtraData;
650	/** The VBE BIOS current memory address. */
651	uint16_t u16VBEExtraAddress;
652	uint16_t Padding7[2];
653	/** @} */
654
655	} VGASTATER3;
656	/** Pointer to the ring-3 VGA state. */
657	typedef VGASTATER3 *PVGASTATER3;
658
659
660	/**
661	* The VGA state data for ring-0 context.
662	*/
663	typedef struct VGASTATER0
664	{
665	/** The R0 vram pointer. */
666	R0PTRTYPE(uint8_t *) pbVRam;
667	#ifdef VBOX_WITH_VMSVGA
668	/** The VMSVGA ring-0 state. */
669	VMSVGASTATER0 svga;
670	#endif
671	} VGASTATER0;
672	/** Pointer to the ring-0 VGA state. */
673	typedef VGASTATER0 *PVGASTATER0;
674
675
676	/**
677	* The VGA state data for raw-mode context.
678	*/
679	typedef struct VGASTATERC
680	{
681	/** Pointer to the RC vram mapping. */
682	RCPTRTYPE(uint8_t *) pbVRam;
683	} VGASTATERC;
684	/** Pointer to the raw-mode VGA state. */
685	typedef VGASTATERC *PVGASTATERC;
686
687
688	/** The VGA state for the current context. */
689	typedef CTX_SUFF(VGASTATE) VGASTATECC;
690	/** Pointer to the VGA state for the current context. */
691	typedef CTX_SUFF(PVGASTATE) PVGASTATECC;
692
693
694
695	/** VBE Extra Data. */
696	typedef VBEHeader VBEHEADER;
697	/** Pointer to the VBE Extra Data. */
698	typedef VBEHEADER *PVBEHEADER;
699
700	#if !defined(VBOX) \|\| defined(IN_RING3)
701	static inline int c6_to_8(int v)
702	{
703	int b;
704	v &= 0x3f;
705	b = v & 1;
706	return (v << 2) \| (b << 1) \| b;
707	}
708	#endif /* !VBOX \|\| IN_RING3 */
709
710
711	#ifdef VBOX_WITH_HGSMI
712	int VBVAInit(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
713	void VBVADestroy(PVGASTATECC pThisCC);
714	int VBVAUpdateDisplay(PVGASTATE pThis, PVGASTATECC pThisCC);
715	void VBVAReset(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
716	void VBVAOnVBEChanged(PVGASTATE pThis, PVGASTATECC pThisCC);
717	void VBVAOnResume(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
718
719	bool VBVAIsPaused(PVGASTATECC pThisCC);
720	#ifdef UNUSED_FUNCTION
721	bool VBVAIsEnabled(PVGASTATECC pThisCC);
722	#endif
723
724	void VBVARaiseIrq(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t fFlags);
725
726	int VBVAInfoScreen(PVGASTATE pThis, const VBVAINFOSCREEN RT_UNTRUSTED_VOLATILE_HOST *pScreen);
727	#ifdef UNUSED_FUNCTION
728	int VBVAGetInfoViewAndScreen(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t u32ViewIndex,
729	VBVAINFOVIEW pView, VBVAINFOSCREEN pScreen);
730	#endif
731
732	# ifdef VBOX_WITH_VIDEOHWACCEL
733	DECLCALLBACK(int) vbvaR3VHWACommandCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface,
734	VBOXVHWACMD RT_UNTRUSTED_VOLATILE_GUEST *pCmd);
735	int vbvaVHWAConstruct(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
736
737	void vbvaTimerCb(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
738
739	int vboxVBVASaveStatePrep(PPDMDEVINS pDevIns);
740	int vboxVBVASaveStateDone(PPDMDEVINS pDevIns);
741	# endif
742
743	int vboxVBVASaveStateExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
744	int vboxVBVALoadStateExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t u32Version);
745	int vboxVBVALoadStateDone(PPDMDEVINS pDevIns);
746
747	DECLCALLBACK(int) vbvaR3PortSendModeHint(PPDMIDISPLAYPORT pInterface, uint32_t cx, uint32_t cy, uint32_t cBPP,
748	uint32_t cDisplay, uint32_t dx, uint32_t dy, uint32_t fEnabled, uint32_t fNotifyGuest);
749
750	# ifdef VBOX_WITH_VDMA
751	typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
752	int vboxVDMAConstruct(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t cPipeElements);
753	void vboxVDMADestruct(PVBOXVDMAHOST pVdma);
754	void vboxVDMAReset(PVBOXVDMAHOST pVdma);
755	void vboxVDMAControl(PVBOXVDMAHOST pVdma, VBOXVDMA_CTL RT_UNTRUSTED_VOLATILE_GUEST *pCmd, uint32_t cbCmd);
756	void vboxVDMACommand(PVBOXVDMAHOST pVdma, VBOXVDMACBUF_DR RT_UNTRUSTED_VOLATILE_GUEST *pCmd, uint32_t cbCmd);
757	int vboxVDMASaveStateExecPrep(struct VBOXVDMAHOST *pVdma);
758	int vboxVDMASaveStateExecDone(struct VBOXVDMAHOST *pVdma);
759	int vboxVDMASaveStateExecPerform(PCPDMDEVHLPR3 pHlp, struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM);
760	int vboxVDMASaveLoadExecPerform(PCPDMDEVHLPR3 pHlp, struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM, uint32_t u32Version);
761	int vboxVDMASaveLoadDone(struct VBOXVDMAHOST *pVdma);
762	# endif /* VBOX_WITH_VDMA */
763
764	#endif /* VBOX_WITH_HGSMI */
765
766	# ifdef VBOX_WITH_VMSVGA
767	int vgaR3UnregisterVRAMHandler(PPDMDEVINS pDevIns, PVGASTATE pThis);
768	int vgaR3RegisterVRAMHandler(PPDMDEVINS pDevIns, PVGASTATE pThis, uint64_t cbFrameBuffer);
769	int vgaR3UpdateDisplay(PVGASTATE pThis, unsigned xStart, unsigned yStart, unsigned width, unsigned height);
770	# endif
771
772	#ifndef VBOX
773	void vga_common_init(VGAState s, DisplayState ds, uint8_t *vga_ram_base,
774	unsigned long vga_ram_offset, int vga_ram_size);
775	uint32_t vga_mem_readb(void *opaque, target_phys_addr_t addr);
776	void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val);
777	void vga_invalidate_scanlines(VGAState *s, int y1, int y2);
778
779	void vga_draw_cursor_line_8(uint8_t d1, const uint8_t src1,
780	int poffset, int w,
781	unsigned int color0, unsigned int color1,
782	unsigned int color_xor);
783	void vga_draw_cursor_line_16(uint8_t d1, const uint8_t src1,
784	int poffset, int w,
785	unsigned int color0, unsigned int color1,
786	unsigned int color_xor);
787	void vga_draw_cursor_line_32(uint8_t d1, const uint8_t src1,
788	int poffset, int w,
789	unsigned int color0, unsigned int color1,
790	unsigned int color_xor);
791
792	extern const uint8_t sr_mask[8];
793	extern const uint8_t gr_mask[16];
794	#endif /* !VBOX */
795
796	#endif /* !VBOX_INCLUDED_SRC_Graphics_DevVGA_h */
797

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source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA.h@ 104777

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