DevVGA.h@ 104786

Last change on this file since 104786 was 104786, checked in by vboxsync, 6 months ago
Main: Added a new include VBox/graphics.h to avoid dragging in a lot of other includes not needed in Main. bugref:10693
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File size: 30.2 KB

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1	/* $Id: DevVGA.h 104786 2024-05-27 08:42:44Z vboxsync $ */
2	/** @file
3	* DevVGA - VBox VGA/VESA device, internal header.
4	*/
5
6	/*
7	* Copyright (C) 2006-2023 Oracle and/or its affiliates.
8	*
9	* This file is part of VirtualBox base platform packages, as
10	* available from https://www.virtualbox.org.
11	*
12	* This program is free software; you can redistribute it and/or
13	* modify it under the terms of the GNU General Public License
14	* as published by the Free Software Foundation, in version 3 of the
15	* License.
16	*
17	* This program is distributed in the hope that it will be useful, but
18	* WITHOUT ANY WARRANTY; without even the implied warranty of
19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20	* General Public License for more details.
21	*
22	* You should have received a copy of the GNU General Public License
23	* along with this program; if not, see <https://www.gnu.org/licenses>.
24	*
25	* SPDX-License-Identifier: GPL-3.0-only
26	* --------------------------------------------------------------------
27	*
28	* This code is based on:
29	*
30	* QEMU internal VGA defines.
31	*
32	* Copyright (c) 2003-2004 Fabrice Bellard
33	*
34	* Permission is hereby granted, free of charge, to any person obtaining a copy
35	* of this software and associated documentation files (the "Software"), to deal
36	* in the Software without restriction, including without limitation the rights
37	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
38	* copies of the Software, and to permit persons to whom the Software is
39	* furnished to do so, subject to the following conditions:
40	*
41	* The above copyright notice and this permission notice shall be included in
42	* all copies or substantial portions of the Software.
43	*
44	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
45	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
46	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
47	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
48	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
49	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
50	* THE SOFTWARE.
51	*/
52
53	#ifndef VBOX_INCLUDED_SRC_Graphics_DevVGA_h
54	#define VBOX_INCLUDED_SRC_Graphics_DevVGA_h
55	#ifndef RT_WITHOUT_PRAGMA_ONCE
56	# pragma once
57	#endif
58
59	#include <VBoxVideoVBE.h>
60	#include <VBoxVideoVBEPrivate.h>
61
62	#ifdef VBOX_WITH_HGSMI
63	# include "HGSMI/HGSMIHost.h"
64	#endif /* VBOX_WITH_HGSMI */
65	#include "DevVGASavedState.h"
66
67	#ifdef VBOX_WITH_VMSVGA
68	# include "DevVGA-SVGA.h"
69	#else
70	# include <VBox/vmm/pdmifs.h>
71	# include <VBox/vmm/stam.h>
72	#endif
73
74	#include <VBox/graphics.h> /* For VRAM ranges. */
75
76	#include <iprt/list.h>
77
78
79	/** Use VBE bytewise I/O. Only needed for Windows Longhorn/Vista betas and backwards compatibility. */
80	#define VBE_BYTEWISE_IO
81
82	/** @name Macros dealing with partial ring-0/raw-mode VRAM mappings.
83	* @{ */
84	/** The size of the VGA ring-0 and raw-mode mapping.
85	*
86	* This is supposed to be all the VGA memory accessible to the guest.
87	* The initial value was 256KB but NTAllInOne.iso appears to access more
88	* thus the limit was upped to 512KB.
89	*
90	* @todo Someone with some VGA knowhow should make a better guess at this value.
91	*/
92	#define VGA_MAPPING_SIZE _512K
93	/** Enables partially mapping the VRAM into ring-0 rather than using the ring-3.
94	* The VGA_MAPPING_SIZE define sets the number of bytes that will be mapped. */
95	#define VGA_WITH_PARTIAL_RING0_MAPPING
96
97	/**
98	* Check buffer if an VRAM offset is within the right range or not.
99	*/
100	#if defined(IN_RC) \|\| defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) \|\| (defined(IN_RING0) && defined(VGA_WITH_PARTIAL_RING0_MAPPING))
101	# define VERIFY_VRAM_WRITE_OFF_RETURN(pThis, off) \
102	do { \
103	if ((off) < VGA_MAPPING_SIZE) \
104	RT_UNTRUSTED_VALIDATED_FENCE(); \
105	else \
106	{ \
107	AssertMsgReturn((off) < (pThis)->vram_size, ("%RX32 !< %RX32\n", (uint32_t)(off), (pThis)->vram_size), VINF_SUCCESS); \
108	Log2(("%Rfn[%d]: %RX32 -> R3\n", __PRETTY_FUNCTION__, __LINE__, (off))); \
109	return VINF_IOM_R3_MMIO_WRITE; \
110	} \
111	} while (0)
112	#else
113	# define VERIFY_VRAM_WRITE_OFF_RETURN(pThis, off) \
114	do { \
115	AssertMsgReturn((off) < (pThis)->vram_size, ("%RX32 !< %RX32\n", (uint32_t)(off), (pThis)->vram_size), VINF_SUCCESS); \
116	RT_UNTRUSTED_VALIDATED_FENCE(); \
117	} while (0)
118	#endif
119
120	/**
121	* Check buffer if an VRAM offset is within the right range or not.
122	*/
123	#if defined(IN_RC) \|\| defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) \|\| (defined(IN_RING0) && defined(VGA_WITH_PARTIAL_RING0_MAPPING))
124	# define VERIFY_VRAM_READ_OFF_RETURN(pThis, off, rcVar) \
125	do { \
126	if ((off) < VGA_MAPPING_SIZE) \
127	RT_UNTRUSTED_VALIDATED_FENCE(); \
128	else \
129	{ \
130	AssertMsgReturn((off) < (pThis)->vram_size, ("%RX32 !< %RX32\n", (uint32_t)(off), (pThis)->vram_size), 0xff); \
131	Log2(("%Rfn[%d]: %RX32 -> R3\n", __PRETTY_FUNCTION__, __LINE__, (off))); \
132	(rcVar) = VINF_IOM_R3_MMIO_READ; \
133	return 0; \
134	} \
135	} while (0)
136	#else
137	# define VERIFY_VRAM_READ_OFF_RETURN(pThis, off, rcVar) \
138	do { \
139	AssertMsgReturn((off) < (pThis)->vram_size, ("%RX32 !< %RX32\n", (uint32_t)(off), (pThis)->vram_size), 0xff); \
140	RT_UNTRUSTED_VALIDATED_FENCE(); \
141	NOREF(rcVar); \
142	} while (0)
143	#endif
144	/** @} */
145
146
147	#define MSR_COLOR_EMULATION 0x01
148	#define MSR_PAGE_SELECT 0x20
149
150	#define ST01_V_RETRACE 0x08
151	#define ST01_DISP_ENABLE 0x01
152
153	/* bochs VBE support */
154	#define CONFIG_BOCHS_VBE
155
156	#ifdef CONFIG_BOCHS_VBE
157
158	/* Cross reference with <VBoxVideoVBE.h> */
159	#define VBE_DISPI_INDEX_NB_SAVED 0xb /* Old number of saved registers (vbe_regs array, see vga_load) */
160	#define VBE_DISPI_INDEX_NB 0xd /* Total number of VBE registers */
161
162	#define VGA_STATE_COMMON_BOCHS_VBE \
163	uint16_t vbe_index; \
164	uint16_t vbe_regs[VBE_DISPI_INDEX_NB]; \
165	uint16_t alignment[2]; /* pad to 64 bits */ \
166	uint32_t vbe_start_addr; \
167	uint32_t vbe_line_offset; \
168	uint32_t vbe_bank_max;
169
170	#else
171
172	#define VGA_STATE_COMMON_BOCHS_VBE
173
174	#endif /* !CONFIG_BOCHS_VBE */
175
176	#define CH_ATTR_SIZE (160 * 100)
177	#define VGA_MAX_HEIGHT VBE_DISPI_MAX_YRES
178
179	typedef struct vga_retrace_s {
180	unsigned frame_cclks; /* Character clocks per frame. */
181	unsigned frame_ns; /* Frame duration in ns. */
182	unsigned cclk_ns; /* Character clock duration in ns. */
183	unsigned vb_start; /* Vertical blanking start (scanline). */
184	unsigned vb_end; /* Vertical blanking end (scanline). */
185	unsigned vb_end_ns; /* Vertical blanking end time (length) in ns. */
186	unsigned vs_start; /* Vertical sync start (scanline). */
187	unsigned vs_end; /* Vertical sync end (scanline). */
188	unsigned vs_start_ns; /* Vertical sync start time in ns. */
189	unsigned vs_end_ns; /* Vertical sync end time in ns. */
190	unsigned h_total; /* Horizontal total (cclks per scanline). */
191	unsigned h_total_ns; /* Scanline duration in ns. */
192	unsigned hb_start; /* Horizontal blanking start (cclk). */
193	unsigned hb_end; /* Horizontal blanking end (cclk). */
194	unsigned hb_end_ns; /* Horizontal blanking end time (length) in ns. */
195	unsigned v_freq_hz; /* Vertical refresh rate to emulate. */
196	} vga_retrace_s;
197
198	#ifndef VBOX
199	#define VGA_STATE_COMMON \
200	unsigned long vram_offset; \
201	unsigned int vram_size; \
202	uint32_t latch; \
203	uint8_t sr_index; \
204	uint8_t sr[256]; \
205	uint8_t gr_index; \
206	uint8_t gr[256]; \
207	uint8_t ar_index; \
208	uint8_t ar[21]; \
209	int ar_flip_flop; \
210	uint8_t cr_index; \
211	uint8_t cr[256]; /* CRT registers */ \
212	uint8_t msr; /* Misc Output Register */ \
213	uint8_t fcr; /* Feature Control Register */ \
214	uint8_t st00; /* status 0 */ \
215	uint8_t st01; /* status 1 */ \
216	uint8_t dac_state; \
217	uint8_t dac_sub_index; \
218	uint8_t dac_read_index; \
219	uint8_t dac_write_index; \
220	uint8_t dac_cache[3]; /* used when writing */ \
221	uint8_t palette[768]; \
222	int32_t bank_offset; \
223	int (get_bpp)(struct VGAState s); \
224	void (get_offsets)(struct VGAState s, \
225	uint32_t *pline_offset, \
226	uint32_t *pstart_addr, \
227	uint32_t *pline_compare); \
228	void (get_resolution)(struct VGAState s, \
229	int *pwidth, \
230	int *pheight); \
231	VGA_STATE_COMMON_BOCHS_VBE \
232	/* display refresh support */ \
233	DisplayState *ds; \
234	uint32_t font_offsets[2]; \
235	int graphic_mode; \
236	uint8_t shift_control; \
237	uint8_t double_scan; \
238	uint32_t line_offset; \
239	uint32_t line_compare; \
240	uint32_t start_addr; \
241	uint32_t plane_updated; \
242	uint8_t last_cw, last_ch; \
243	uint32_t last_width, last_height; /* in chars or pixels */ \
244	uint32_t last_scr_width, last_scr_height; /* in pixels */ \
245	uint8_t cursor_start, cursor_end; \
246	uint32_t cursor_offset; \
247	unsigned int (*rgb_to_pixel)(unsigned int r, \
248	unsigned int g, unsigned b); \
249	/* hardware mouse cursor support */ \
250	uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32]; \
251	void (cursor_invalidate)(struct VGAState s); \
252	void (cursor_draw_line)(struct VGAState s, uint8_t *d, int y); \
253	/* tell for each page if it has been updated since the last time */ \
254	uint32_t last_palette[256]; \
255	uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
256
257	#else /* VBOX */
258
259	/* bird: Since we've changed types, reordered members, done alignment
260	paddings and more, VGA_STATE_COMMON was added directly to the
261	struct to make it more readable and easier to handle. */
262
263	struct VGAState;
264	typedef int FNGETBPP(struct VGAState *s);
265	typedef void FNGETOFFSETS(struct VGAState s, uint32_t pline_offset, uint32_t pstart_addr, uint32_t pline_compare);
266	typedef void FNGETRESOLUTION(struct VGAState s, int pwidth, int *pheight);
267	typedef unsigned int FNRGBTOPIXEL(unsigned int r, unsigned int g, unsigned b);
268	typedef void FNCURSORINVALIDATE(struct VGAState *s);
269	typedef void FNCURSORDRAWLINE(struct VGAState s, uint8_t d, int y);
270
271	#endif /* VBOX */
272
273	#ifdef VBOX_WITH_VDMA
274	typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
275	#endif
276
277	#ifdef VBOX_WITH_VIDEOHWACCEL
278	#define VBOX_VHWA_MAX_PENDING_COMMANDS 1000
279
280	typedef struct _VBOX_VHWA_PENDINGCMD
281	{
282	RTLISTNODE Node;
283	VBOXVHWACMD RT_UNTRUSTED_VOLATILE_GUEST *pCommand;
284	} VBOX_VHWA_PENDINGCMD;
285	#endif
286
287
288	/**
289	* The shared VGA state data.
290	*/
291	typedef struct VGAState
292	{
293	uint32_t vram_size;
294	uint32_t latch;
295	uint8_t sr_index;
296	uint8_t sr[256];
297	uint8_t gr_index;
298	uint8_t gr[256];
299	uint8_t ar_index;
300	uint8_t ar[21];
301	int32_t ar_flip_flop;
302	uint8_t cr_index;
303	uint8_t cr[256]; /* CRT registers */
304	uint8_t msr; /* Misc Output Register */
305	uint8_t fcr; /* Feature Control Register */
306	uint8_t st00; /* status 0 */
307	uint8_t st01; /* status 1 */
308	uint8_t dac_state;
309	uint8_t dac_sub_index;
310	uint8_t dac_read_index;
311	uint8_t dac_write_index;
312	uint8_t dac_cache[3]; /* used when writing */
313	uint8_t palette[768];
314	int32_t bank_offset;
315	VGA_STATE_COMMON_BOCHS_VBE
316	/* display refresh support */
317	uint32_t font_offsets[2];
318	int32_t graphic_mode;
319	uint8_t shift_control;
320	uint8_t double_scan;
321	uint8_t padding1[2];
322	uint32_t line_offset;
323	uint32_t vga_addr_mask;
324	uint32_t padding1a;
325	uint32_t line_compare;
326	uint32_t start_addr;
327	uint32_t plane_updated;
328	uint8_t last_cw, last_ch;
329	uint8_t last_uline; \
330	bool last_blink; \
331	uint32_t last_width, last_height; /* in chars or pixels */
332	uint32_t last_scr_width, last_scr_height; /* in pixels */
333	uint32_t last_bpp;
334	uint8_t cursor_start, cursor_end;
335	bool last_cur_blink, last_chr_blink;
336	uint32_t cursor_offset;
337	/** hardware mouse cursor support */
338	uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32];
339	/** tell for each page if it has been updated since the last time */
340	uint32_t last_palette[256];
341	uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
342
343	/** end-of-common-state-marker */
344	uint32_t u32Marker;
345
346	/** Refresh timer handle - HC. */
347	TMTIMERHANDLE hRefreshTimer;
348
349	#ifdef VBOX_WITH_VMSVGA
350	VMSVGASTATE svga;
351	#endif
352
353	/** The number of monitors. */
354	uint32_t cMonitors;
355	/** Current refresh timer interval. */
356	uint32_t cMilliesRefreshInterval;
357	/** Bitmap tracking dirty pages. */
358	uint64_t bmDirtyBitmap[VGA_VRAM_MAX / GUEST_PAGE_SIZE / 64];
359	/** Bitmap tracking which VGA memory pages in the 0xa0000-0xbffff region has
360	* been remapped to allow direct access.
361	* @note It's quite possible that mapping in the 0xb0000-0xbffff isn't possible,
362	* but we're playing safe and cover the whole VGA MMIO region here. */
363	uint32_t bmPageRemappedVGA;
364
365	/** Flag indicating that there are dirty bits. This is used to optimize the handler resetting. */
366	bool fHasDirtyBits;
367	/** Whether to render the guest VRAM to the framebuffer memory. False only for some LFB modes. */
368	bool fRenderVRAM;
369	/** Whether 3D is enabled for the VM. */
370	bool f3DEnabled;
371	/** Set if state has been restored. */
372	bool fStateLoaded;
373	/** Flag whether to expose the legacy VGA interface to the guest. */
374	bool fLegacyVgaEnabled;
375	#ifdef VBOX_WITH_VMSVGA
376	/* Whether the SVGA emulation is enabled or not. */
377	bool fVMSVGAEnabled;
378	bool fVMSVGA10;
379	bool fVMSVGAPciId;
380	bool fVMSVGAPciBarLayout;
381	/** Flag whether the SVGA3 interface is exposed to the guest. */
382	bool fVmSvga3;
383	#else
384	bool afPadding4[5];
385	#endif
386
387	struct {
388	uint32_t u32Padding1;
389	uint32_t iVRAM;
390	#ifdef VBOX_WITH_VMSVGA
391	uint32_t iIO;
392	uint32_t iFIFO;
393	#endif
394	} pciRegions;
395
396	/** The physical address the VRAM was assigned. */
397	RTGCPHYS GCPhysVRAM;
398	/** The critical section protect the instance data. */
399	PDMCRITSECT CritSect;
400
401	/* Keep track of ring 0 latched accesses to the VGA MMIO memory. */
402	uint64_t u64LastLatchedAccess;
403	uint32_t cLatchAccesses;
404	uint16_t uMaskLatchAccess;
405	uint16_t iMask;
406
407	#ifdef VBE_BYTEWISE_IO
408	/** VBE read/write data/index flags */
409	uint8_t fReadVBEData;
410	uint8_t fWriteVBEData;
411	uint8_t fReadVBEIndex;
412	uint8_t fWriteVBEIndex;
413	/** VBE write data/index one byte buffer */
414	uint8_t cbWriteVBEData;
415	uint8_t cbWriteVBEIndex;
416	/** VBE Extra Data write address one byte buffer */
417	uint8_t cbWriteVBEExtraAddress;
418	uint8_t Padding5;
419	#endif
420
421	/** Retrace emulation state */
422	bool fRealRetrace;
423	bool Padding6[HC_ARCH_BITS == 64 ? 7 : 3];
424	vga_retrace_s retrace_state;
425
426	#ifdef VBOX_WITH_HGSMI
427	/** Base port in the assigned PCI I/O space. */
428	RTIOPORT IOPortBase;
429	# ifdef VBOX_WITH_WDDM
430	uint8_t Padding10[2];
431	/** Specifies guest driver caps, i.e. whether it can handle IRQs from the
432	* adapter, the way it can handle async HGSMI command completion, etc. */
433	uint32_t fGuestCaps;
434	uint32_t fScanLineCfg;
435	uint32_t Padding11;
436	# else
437	uint8_t Padding11[14];
438	# endif
439
440	/** The critical section serializes the HGSMI IRQ setting/clearing. */
441	PDMCRITSECT CritSectIRQ;
442	/** VBVARaiseIRQ flags which were set when the guest was still processing previous IRQ. */
443	uint32_t fu32PendingGuestFlags;
444	uint32_t Padding12;
445	#endif /* VBOX_WITH_HGSMI */
446
447	PDMLED Led3D;
448
449	struct {
450	volatile uint32_t cPending;
451	uint32_t Padding1;
452	union
453	{
454	RTLISTNODE PendingList;
455	/* make sure the structure sized cross different contexts correctly */
456	struct
457	{
458	R3PTRTYPE(void *) dummy1;
459	R3PTRTYPE(void *) dummy2;
460	} dummy;
461	};
462	} pendingVhwaCommands;
463
464	/** The MMIO handle of the legacy graphics buffer/regs at 0xa0000-0xbffff. */
465	PGMMMIO2HANDLE hMmioLegacy;
466
467	/** @name I/O ports for range 0x3c0-3cf.
468	* @{ */
469	IOMIOPORTHANDLE hIoPortAr;
470	IOMIOPORTHANDLE hIoPortMsrSt00;
471	IOMIOPORTHANDLE hIoPort3c3;
472	IOMIOPORTHANDLE hIoPortSr;
473	IOMIOPORTHANDLE hIoPortDac;
474	IOMIOPORTHANDLE hIoPortPos;
475	IOMIOPORTHANDLE hIoPortGr;
476	/** @} */
477
478	/** @name I/O ports for MDA 0x3b0-0x3bf (sparse)
479	* @{ */
480	IOMIOPORTHANDLE hIoPortMdaCrt;
481	IOMIOPORTHANDLE hIoPortMdaFcrSt;
482	/** @} */
483
484	/** @name I/O ports for CGA 0x3d0-0x3df (sparse)
485	* @{ */
486	IOMIOPORTHANDLE hIoPortCgaCrt;
487	IOMIOPORTHANDLE hIoPortCgaFcrSt;
488	/** @} */
489
490	#ifdef VBOX_WITH_HGSMI
491	/** @name I/O ports for HGSMI 0x3b0-03b3 and 0x3d0-03d3 (ring-3 only)
492	* @{ */
493	IOMIOPORTHANDLE hIoPortHgsmiHost;
494	IOMIOPORTHANDLE hIoPortHgsmiGuest;
495	/** @} */
496	#endif
497
498	/** @name I/O ports for Boch VBE 0x1ce-0x1cf
499	* @{ */
500	IOMIOPORTHANDLE hIoPortVbeIndex;
501	IOMIOPORTHANDLE hIoPortVbeData;
502	/** @} */
503
504	/** The BIOS printf I/O port. */
505	IOMIOPORTHANDLE hIoPortBios;
506	/** The VBE extra data I/O port. */
507	IOMIOPORTHANDLE hIoPortVbeExtra;
508	/** The logo command I/O port. */
509	IOMIOPORTHANDLE hIoPortCmdLogo;
510
511	#ifdef VBOX_WITH_VMSVGA
512	/** VMSVGA: I/O port PCI region. */
513	IOMIOPORTHANDLE hIoPortVmSvga;
514	/** VMSVGA3: MMIO PCI region for the registers. */
515	IOMMMIOHANDLE hMmioSvga3;
516	/** VMSVGA: The MMIO2 handle of the FIFO PCI region. */
517	PGMMMIO2HANDLE hMmio2VmSvgaFifo;
518	#endif
519	/** The MMIO2 handle of the VRAM. */
520	PGMMMIO2HANDLE hMmio2VRam;
521
522	STAMPROFILE StatRZMemoryRead;
523	STAMPROFILE StatR3MemoryRead;
524	STAMPROFILE StatRZMemoryWrite;
525	STAMPROFILE StatR3MemoryWrite;
526	STAMCOUNTER StatMapPage; /*< Counts IOMMmioMapMmio2Page calls. /
527	STAMCOUNTER StatMapReset; /*< Counts IOMMmioResetRegion calls. /
528	STAMCOUNTER StatUpdateDisp; /*< Counts vgaPortUpdateDisplay calls. /
529	#ifdef VBOX_WITH_HGSMI
530	STAMCOUNTER StatHgsmiMdaCgaAccesses;
531	#endif
532	} VGAState;
533	#ifdef VBOX
534	/** VGA state. */
535	typedef VGAState VGASTATE;
536	/** Pointer to the VGA state. */
537	typedef VGASTATE *PVGASTATE;
538	AssertCompileMemberAlignment(VGASTATE, bank_offset, 8);
539	AssertCompileMemberAlignment(VGASTATE, font_offsets, 8);
540	AssertCompileMemberAlignment(VGASTATE, last_ch_attr, 8);
541	AssertCompileMemberAlignment(VGASTATE, u32Marker, 8);
542	AssertCompile(sizeof(uint64_t)/bmPageMapBitmap/ >= (_64K / GUEST_PAGE_SIZE / 8));
543	#endif
544
545
546	/**
547	* The VGA state data for ring-3 context.
548	*/
549	typedef struct VGASTATER3
550	{
551	R3PTRTYPE(uint8_t *) pbVRam;
552	R3PTRTYPE(FNGETBPP *) get_bpp;
553	R3PTRTYPE(FNGETOFFSETS *) get_offsets;
554	R3PTRTYPE(FNGETRESOLUTION *) get_resolution;
555	R3PTRTYPE(FNRGBTOPIXEL *) rgb_to_pixel;
556	R3PTRTYPE(FNCURSORINVALIDATE *) cursor_invalidate;
557	R3PTRTYPE(FNCURSORDRAWLINE *) cursor_draw_line;
558
559	/** Pointer to the device instance.
560	* @note Only for getting our bearings in interface methods. */
561	PPDMDEVINSR3 pDevIns;
562	#ifdef VBOX_WITH_HGSMI
563	R3PTRTYPE(PHGSMIINSTANCE) pHGSMI;
564	#endif
565	#ifdef VBOX_WITH_VDMA
566	R3PTRTYPE(PVBOXVDMAHOST) pVdma;
567	#endif
568
569	/** LUN\#0: The display port base interface. */
570	PDMIBASE IBase;
571	/** LUN\#0: The display port interface. */
572	PDMIDISPLAYPORT IPort;
573	#ifdef VBOX_WITH_HGSMI
574	/** LUN\#0: VBVA callbacks interface */
575	PDMIDISPLAYVBVACALLBACKS IVBVACallbacks;
576	#endif
577	/** Status LUN: Leds interface. */
578	PDMILEDPORTS ILeds;
579
580	/** Pointer to base interface of the driver. */
581	R3PTRTYPE(PPDMIBASE) pDrvBase;
582	/** Pointer to display connector interface of the driver. */
583	R3PTRTYPE(PPDMIDISPLAYCONNECTOR) pDrv;
584
585	/** Status LUN: Partner of ILeds. */
586	R3PTRTYPE(PPDMILEDCONNECTORS) pLedsConnector;
587
588	#ifdef VBOX_WITH_VMSVGA
589	/** The VMSVGA ring-3 state. */
590	VMSVGASTATER3 svga;
591	#endif
592
593	/** The VGA BIOS ROM data. */
594	R3PTRTYPE(uint8_t *) pbVgaBios;
595	/** The size of the VGA BIOS ROM. */
596	uint64_t cbVgaBios;
597	/** The name of the VGA BIOS ROM file. */
598	R3PTRTYPE(char *) pszVgaBiosFile;
599
600	/** @name Logo data
601	* @{ */
602	/** Current logo data offset. */
603	uint32_t offLogoData;
604	/** The size of the BIOS logo data. */
605	uint32_t cbLogo;
606	/** Current logo command. */
607	uint16_t LogoCommand;
608	/** Bitmap width. */
609	uint16_t cxLogo;
610	/** Bitmap height. */
611	uint16_t cyLogo;
612	/** Bitmap planes. */
613	uint16_t cLogoPlanes;
614	/** Bitmap depth. */
615	uint16_t cLogoBits;
616	/** Bitmap compression. */
617	uint16_t LogoCompression;
618	/** Bitmap colors used. */
619	uint16_t cLogoUsedColors;
620	/** Palette size. */
621	uint16_t cLogoPalEntries;
622	/** Clear screen flag. */
623	uint8_t fLogoClearScreen;
624	bool fBootMenuInverse;
625	uint8_t Padding8[6];
626	/** Palette data. */
627	uint32_t au32LogoPalette[256];
628	/** The BIOS logo data. */
629	R3PTRTYPE(uint8_t *) pbLogo;
630	/** The name of the logo file. */
631	R3PTRTYPE(char *) pszLogoFile;
632	/** Bitmap image data. */
633	R3PTRTYPE(uint8_t *) pbLogoBitmap;
634	/** @} */
635
636	/** @name VBE extra data (modes)
637	* @{ */
638	/** The VBE BIOS extra data. */
639	R3PTRTYPE(uint8_t *) pbVBEExtraData;
640	/** The size of the VBE BIOS extra data. */
641	uint16_t cbVBEExtraData;
642	/** The VBE BIOS current memory address. */
643	uint16_t u16VBEExtraAddress;
644	uint16_t Padding7[2];
645	/** @} */
646
647	} VGASTATER3;
648	/** Pointer to the ring-3 VGA state. */
649	typedef VGASTATER3 *PVGASTATER3;
650
651
652	/**
653	* The VGA state data for ring-0 context.
654	*/
655	typedef struct VGASTATER0
656	{
657	/** The R0 vram pointer. */
658	R0PTRTYPE(uint8_t *) pbVRam;
659	#ifdef VBOX_WITH_VMSVGA
660	/** The VMSVGA ring-0 state. */
661	VMSVGASTATER0 svga;
662	#endif
663	} VGASTATER0;
664	/** Pointer to the ring-0 VGA state. */
665	typedef VGASTATER0 *PVGASTATER0;
666
667
668	/**
669	* The VGA state data for raw-mode context.
670	*/
671	typedef struct VGASTATERC
672	{
673	/** Pointer to the RC vram mapping. */
674	RCPTRTYPE(uint8_t *) pbVRam;
675	} VGASTATERC;
676	/** Pointer to the raw-mode VGA state. */
677	typedef VGASTATERC *PVGASTATERC;
678
679
680	/** The VGA state for the current context. */
681	typedef CTX_SUFF(VGASTATE) VGASTATECC;
682	/** Pointer to the VGA state for the current context. */
683	typedef CTX_SUFF(PVGASTATE) PVGASTATECC;
684
685
686
687	/** VBE Extra Data. */
688	typedef VBEHeader VBEHEADER;
689	/** Pointer to the VBE Extra Data. */
690	typedef VBEHEADER *PVBEHEADER;
691
692	#if !defined(VBOX) \|\| defined(IN_RING3)
693	static inline int c6_to_8(int v)
694	{
695	int b;
696	v &= 0x3f;
697	b = v & 1;
698	return (v << 2) \| (b << 1) \| b;
699	}
700	#endif /* !VBOX \|\| IN_RING3 */
701
702
703	#ifdef VBOX_WITH_HGSMI
704	int VBVAInit(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
705	void VBVADestroy(PVGASTATECC pThisCC);
706	int VBVAUpdateDisplay(PVGASTATE pThis, PVGASTATECC pThisCC);
707	void VBVAReset(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
708	void VBVAOnVBEChanged(PVGASTATE pThis, PVGASTATECC pThisCC);
709	void VBVAOnResume(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
710
711	bool VBVAIsPaused(PVGASTATECC pThisCC);
712	#ifdef UNUSED_FUNCTION
713	bool VBVAIsEnabled(PVGASTATECC pThisCC);
714	#endif
715
716	void VBVARaiseIrq(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t fFlags);
717
718	int VBVAInfoScreen(PVGASTATE pThis, const VBVAINFOSCREEN RT_UNTRUSTED_VOLATILE_HOST *pScreen);
719	#ifdef UNUSED_FUNCTION
720	int VBVAGetInfoViewAndScreen(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t u32ViewIndex,
721	VBVAINFOVIEW pView, VBVAINFOSCREEN pScreen);
722	#endif
723
724	# ifdef VBOX_WITH_VIDEOHWACCEL
725	DECLCALLBACK(int) vbvaR3VHWACommandCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface,
726	VBOXVHWACMD RT_UNTRUSTED_VOLATILE_GUEST *pCmd);
727	int vbvaVHWAConstruct(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
728
729	void vbvaTimerCb(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
730
731	int vboxVBVASaveStatePrep(PPDMDEVINS pDevIns);
732	int vboxVBVASaveStateDone(PPDMDEVINS pDevIns);
733	# endif
734
735	int vboxVBVASaveStateExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
736	int vboxVBVALoadStateExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t u32Version);
737	int vboxVBVALoadStateDone(PPDMDEVINS pDevIns);
738
739	DECLCALLBACK(int) vbvaR3PortSendModeHint(PPDMIDISPLAYPORT pInterface, uint32_t cx, uint32_t cy, uint32_t cBPP,
740	uint32_t cDisplay, uint32_t dx, uint32_t dy, uint32_t fEnabled, uint32_t fNotifyGuest);
741
742	# ifdef VBOX_WITH_VDMA
743	typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
744	int vboxVDMAConstruct(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t cPipeElements);
745	void vboxVDMADestruct(PVBOXVDMAHOST pVdma);
746	void vboxVDMAReset(PVBOXVDMAHOST pVdma);
747	void vboxVDMAControl(PVBOXVDMAHOST pVdma, VBOXVDMA_CTL RT_UNTRUSTED_VOLATILE_GUEST *pCmd, uint32_t cbCmd);
748	void vboxVDMACommand(PVBOXVDMAHOST pVdma, VBOXVDMACBUF_DR RT_UNTRUSTED_VOLATILE_GUEST *pCmd, uint32_t cbCmd);
749	int vboxVDMASaveStateExecPrep(struct VBOXVDMAHOST *pVdma);
750	int vboxVDMASaveStateExecDone(struct VBOXVDMAHOST *pVdma);
751	int vboxVDMASaveStateExecPerform(PCPDMDEVHLPR3 pHlp, struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM);
752	int vboxVDMASaveLoadExecPerform(PCPDMDEVHLPR3 pHlp, struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM, uint32_t u32Version);
753	int vboxVDMASaveLoadDone(struct VBOXVDMAHOST *pVdma);
754	# endif /* VBOX_WITH_VDMA */
755
756	#endif /* VBOX_WITH_HGSMI */
757
758	# ifdef VBOX_WITH_VMSVGA
759	int vgaR3UnregisterVRAMHandler(PPDMDEVINS pDevIns, PVGASTATE pThis);
760	int vgaR3RegisterVRAMHandler(PPDMDEVINS pDevIns, PVGASTATE pThis, uint64_t cbFrameBuffer);
761	int vgaR3UpdateDisplay(PVGASTATE pThis, unsigned xStart, unsigned yStart, unsigned width, unsigned height);
762	# endif
763
764	#ifndef VBOX
765	void vga_common_init(VGAState s, DisplayState ds, uint8_t *vga_ram_base,
766	unsigned long vga_ram_offset, int vga_ram_size);
767	uint32_t vga_mem_readb(void *opaque, target_phys_addr_t addr);
768	void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val);
769	void vga_invalidate_scanlines(VGAState *s, int y1, int y2);
770
771	void vga_draw_cursor_line_8(uint8_t d1, const uint8_t src1,
772	int poffset, int w,
773	unsigned int color0, unsigned int color1,
774	unsigned int color_xor);
775	void vga_draw_cursor_line_16(uint8_t d1, const uint8_t src1,
776	int poffset, int w,
777	unsigned int color0, unsigned int color1,
778	unsigned int color_xor);
779	void vga_draw_cursor_line_32(uint8_t d1, const uint8_t src1,
780	int poffset, int w,
781	unsigned int color0, unsigned int color1,
782	unsigned int color_xor);
783
784	extern const uint8_t sr_mask[8];
785	extern const uint8_t gr_mask[16];
786	#endif /* !VBOX */
787
788	#endif /* !VBOX_INCLUDED_SRC_Graphics_DevVGA_h */
789

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source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA.h@ 104786

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