VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA.h@ 28587

Last change on this file since 28587 was 28379, checked in by vboxsync, 15 years ago

dev/VGA: avoid extra resizes when HGSMI & VBVA is used (for now enabled only when Wddm driver is isnatalled in the guest)

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File size: 22.7 KB
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1/* $Id: DevVGA.h 28379 2010-04-15 17:14:16Z vboxsync $ */
2/** @file
3 * DevVGA - VBox VGA/VESA device, internal header.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 * --------------------------------------------------------------------
21 *
22 * This code is based on:
23 *
24 * QEMU internal VGA defines.
25 *
26 * Copyright (c) 2003-2004 Fabrice Bellard
27 *
28 * Permission is hereby granted, free of charge, to any person obtaining a copy
29 * of this software and associated documentation files (the "Software"), to deal
30 * in the Software without restriction, including without limitation the rights
31 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
32 * copies of the Software, and to permit persons to whom the Software is
33 * furnished to do so, subject to the following conditions:
34 *
35 * The above copyright notice and this permission notice shall be included in
36 * all copies or substantial portions of the Software.
37 *
38 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
39 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
40 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
41 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
42 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
43 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
44 * THE SOFTWARE.
45 */
46#ifdef VBOX
47/** The default amount of VRAM. */
48# define VGA_VRAM_DEFAULT (_4M)
49/** The maximum amount of VRAM. Limited by VBOX_MAX_ALLOC_PAGE_COUNT. */
50# define VGA_VRAM_MAX (256 * _1M)
51/** The minimum amount of VRAM. */
52# define VGA_VRAM_MIN (_1M)
53#endif
54
55#ifdef VBOX_WITH_HGSMI
56# include "HGSMI/HGSMIHost.h"
57#endif /* VBOX_WITH_HGSMI */
58#include "DevVGASavedState.h"
59
60#define MSR_COLOR_EMULATION 0x01
61#define MSR_PAGE_SELECT 0x20
62
63#define ST01_V_RETRACE 0x08
64#define ST01_DISP_ENABLE 0x01
65
66/* bochs VBE support */
67#define CONFIG_BOCHS_VBE
68
69#ifdef VBOX
70#define VBE_DISPI_MAX_XRES 16384
71#define VBE_DISPI_MAX_YRES 16384
72#else
73#define VBE_DISPI_MAX_XRES 1600
74#define VBE_DISPI_MAX_YRES 1200
75#endif
76#define VBE_DISPI_MAX_BPP 32
77
78#define VBE_DISPI_INDEX_ID 0x0
79#define VBE_DISPI_INDEX_XRES 0x1
80#define VBE_DISPI_INDEX_YRES 0x2
81#define VBE_DISPI_INDEX_BPP 0x3
82#define VBE_DISPI_INDEX_ENABLE 0x4
83#define VBE_DISPI_INDEX_BANK 0x5
84#define VBE_DISPI_INDEX_VIRT_WIDTH 0x6
85#define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7
86#define VBE_DISPI_INDEX_X_OFFSET 0x8
87#define VBE_DISPI_INDEX_Y_OFFSET 0x9
88#define VBE_DISPI_INDEX_VBOX_VIDEO 0xa
89#define VBE_DISPI_INDEX_NB 0xb
90
91#define VBE_DISPI_ID0 0xB0C0
92#define VBE_DISPI_ID1 0xB0C1
93#define VBE_DISPI_ID2 0xB0C2
94#define VBE_DISPI_ID3 0xB0C3
95#define VBE_DISPI_ID4 0xB0C4
96
97#ifdef VBOX
98/* The VBOX interface id. Indicates support for VBE_DISPI_INDEX_VBOX_VIDEO. */
99#define VBE_DISPI_ID_VBOX_VIDEO 0xBE00
100#ifdef VBOX_WITH_HGSMI
101/* The VBOX interface id. Indicates support for VBVA shared memory interface. */
102#define VBE_DISPI_ID_HGSMI 0xBE01
103#endif /* VBOX_WITH_HGSMI */
104#endif /* VBOX */
105
106#define VBE_DISPI_DISABLED 0x00
107#define VBE_DISPI_ENABLED 0x01
108#define VBE_DISPI_GETCAPS 0x02
109#define VBE_DISPI_8BIT_DAC 0x20
110#define VBE_DISPI_LFB_ENABLED 0x40
111#define VBE_DISPI_NOCLEARMEM 0x80
112
113#define VBE_DISPI_LFB_PHYSICAL_ADDRESS 0xE0000000
114
115#ifdef CONFIG_BOCHS_VBE
116
117#define VGA_STATE_COMMON_BOCHS_VBE \
118 uint16_t vbe_index; \
119 uint16_t vbe_regs[VBE_DISPI_INDEX_NB]; \
120 uint32_t vbe_start_addr; \
121 uint32_t vbe_line_offset; \
122 uint32_t vbe_bank_max;
123
124#else
125
126#define VGA_STATE_COMMON_BOCHS_VBE
127
128#endif /* !CONFIG_BOCHS_VBE */
129
130#define CH_ATTR_SIZE (160 * 100)
131#define VGA_MAX_HEIGHT VBE_DISPI_MAX_YRES
132
133#ifndef VBOX
134#define VGA_STATE_COMMON \
135 uint8_t *vram_ptr; \
136 unsigned long vram_offset; \
137 unsigned int vram_size; \
138 uint32_t latch; \
139 uint8_t sr_index; \
140 uint8_t sr[256]; \
141 uint8_t gr_index; \
142 uint8_t gr[256]; \
143 uint8_t ar_index; \
144 uint8_t ar[21]; \
145 int ar_flip_flop; \
146 uint8_t cr_index; \
147 uint8_t cr[256]; /* CRT registers */ \
148 uint8_t msr; /* Misc Output Register */ \
149 uint8_t fcr; /* Feature Control Register */ \
150 uint8_t st00; /* status 0 */ \
151 uint8_t st01; /* status 1 */ \
152 uint8_t dac_state; \
153 uint8_t dac_sub_index; \
154 uint8_t dac_read_index; \
155 uint8_t dac_write_index; \
156 uint8_t dac_cache[3]; /* used when writing */ \
157 uint8_t palette[768]; \
158 int32_t bank_offset; \
159 int (*get_bpp)(struct VGAState *s); \
160 void (*get_offsets)(struct VGAState *s, \
161 uint32_t *pline_offset, \
162 uint32_t *pstart_addr, \
163 uint32_t *pline_compare); \
164 void (*get_resolution)(struct VGAState *s, \
165 int *pwidth, \
166 int *pheight); \
167 VGA_STATE_COMMON_BOCHS_VBE \
168 /* display refresh support */ \
169 DisplayState *ds; \
170 uint32_t font_offsets[2]; \
171 int graphic_mode; \
172 uint8_t shift_control; \
173 uint8_t double_scan; \
174 uint32_t line_offset; \
175 uint32_t line_compare; \
176 uint32_t start_addr; \
177 uint32_t plane_updated; \
178 uint8_t last_cw, last_ch; \
179 uint32_t last_width, last_height; /* in chars or pixels */ \
180 uint32_t last_scr_width, last_scr_height; /* in pixels */ \
181 uint8_t cursor_start, cursor_end; \
182 uint32_t cursor_offset; \
183 unsigned int (*rgb_to_pixel)(unsigned int r, \
184 unsigned int g, unsigned b); \
185 /* hardware mouse cursor support */ \
186 uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32]; \
187 void (*cursor_invalidate)(struct VGAState *s); \
188 void (*cursor_draw_line)(struct VGAState *s, uint8_t *d, int y); \
189 /* tell for each page if it has been updated since the last time */ \
190 uint32_t last_palette[256]; \
191 uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
192
193#else /* VBOX */
194
195struct VGAState;
196typedef int FNGETBPP(struct VGAState *s);
197typedef void FNGETOFFSETS(struct VGAState *s, uint32_t *pline_offset, uint32_t *pstart_addr, uint32_t *pline_compare);
198typedef void FNGETRESOLUTION(struct VGAState *s, int *pwidth, int *pheight);
199typedef unsigned int FNRGBTOPIXEL(unsigned int r, unsigned int g, unsigned b);
200typedef void FNCURSORINVALIDATE(struct VGAState *s);
201typedef void FNCURSORDRAWLINE(struct VGAState *s, uint8_t *d, int y);
202
203/* bird: vram_offset have been remove, function pointers declared external,
204 some type changes, and some padding have been added. */
205#define VGA_STATE_COMMON \
206 R3PTRTYPE(uint8_t *) vram_ptrR3; \
207 uint32_t vram_size; \
208 uint32_t latch; \
209 uint8_t sr_index; \
210 uint8_t sr[256]; \
211 uint8_t gr_index; \
212 uint8_t gr[256]; \
213 uint8_t ar_index; \
214 uint8_t ar[21]; \
215 int32_t ar_flip_flop; \
216 uint8_t cr_index; \
217 uint8_t cr[256]; /* CRT registers */ \
218 uint8_t msr; /* Misc Output Register */ \
219 uint8_t fcr; /* Feature Control Register */ \
220 uint8_t st00; /* status 0 */ \
221 uint8_t st01; /* status 1 */ \
222 uint8_t dac_state; \
223 uint8_t dac_sub_index; \
224 uint8_t dac_read_index; \
225 uint8_t dac_write_index; \
226 uint8_t dac_cache[3]; /* used when writing */ \
227 uint8_t palette[768]; \
228 int32_t bank_offset; \
229 int32_t padding0; \
230 R3PTRTYPE(FNGETBPP *) get_bpp; \
231 R3PTRTYPE(FNGETOFFSETS *) get_offsets; \
232 R3PTRTYPE(FNGETRESOLUTION *) get_resolution; \
233 VGA_STATE_COMMON_BOCHS_VBE \
234 /* display refresh support */ \
235 uint32_t font_offsets[2]; \
236 int32_t graphic_mode; \
237 uint8_t shift_control; \
238 uint8_t double_scan; \
239 uint8_t padding1[2]; \
240 uint32_t line_offset; \
241 uint32_t line_compare; \
242 uint32_t start_addr; \
243 uint32_t plane_updated; \
244 uint8_t last_cw, last_ch, padding2[2]; \
245 uint32_t last_width, last_height; /* in chars or pixels */ \
246 uint32_t last_scr_width, last_scr_height; /* in pixels */ \
247 uint32_t last_bpp; \
248 uint8_t cursor_start, cursor_end, padding3[2]; \
249 uint32_t cursor_offset; \
250 uint32_t padding4; \
251 R3PTRTYPE(FNRGBTOPIXEL *) rgb_to_pixel; \
252 /* hardware mouse cursor support */ \
253 uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32]; \
254 R3PTRTYPE(FNCURSORINVALIDATE *) cursor_invalidate; \
255 R3PTRTYPE(FNCURSORDRAWLINE *) cursor_draw_line; \
256 /* tell for each page if it has been updated since the last time */ \
257 uint32_t last_palette[256]; \
258 uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
259
260#endif /* VBOX */
261
262#ifdef VBOXVDMA
263typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
264#endif
265
266typedef struct VGAState {
267 VGA_STATE_COMMON
268#ifdef VBOX
269 /** end-of-common-state-marker */
270 uint32_t u32Marker;
271 /** The physical address the VRAM was assigned. */
272 RTGCPHYS32 GCPhysVRAM;
273 /** The R0 vram pointer... */
274 R0PTRTYPE(uint8_t *) vram_ptrR0;
275 /** Pointer to the GC vram mapping. */
276 RCPTRTYPE(uint8_t *) vram_ptrRC;
277 /** LFB was updated flag. */
278 bool fLFBUpdated;
279 /** Indicates if the GC extensions are enabled or not. */
280 bool fGCEnabled;
281 /** Indicates if the R0 extensions are enabled or not. */
282 bool fR0Enabled;
283 /** Flag indicating that there are dirty bits. This is used to optimize the handler resetting. */
284 bool fHasDirtyBits;
285 /** Flag indicating that the VGA memory in the 0xa0000-0xbffff region has been remapped to allow direct access. */
286 bool fRemappedVGA;
287 /** Whether to render the guest VRAM to the framebuffer memory. False only for some LFB modes. */
288 bool fRenderVRAM;
289 bool Padding1[2];
290
291 uint32_t cMonitors;
292
293#ifdef VBOX_WITH_HGSMI
294 R3PTRTYPE(PHGSMIINSTANCE) pHGSMI;
295#endif /* VBOX_WITH_HGSMI */
296#ifdef VBOXVDMA
297 R3PTRTYPE(PVBOXVDMAHOST) pVdma;
298#endif
299
300 /** Current refresh timer interval. */
301 uint32_t Padding2;
302 uint32_t cMilliesRefreshInterval;
303 /** Refresh timer handle - HC. */
304 PTMTIMERR3 RefreshTimer;
305
306 /** Bitmap tracking dirty pages. */
307 uint32_t au32DirtyBitmap[VGA_VRAM_MAX / PAGE_SIZE / 32];
308 /** Pointer to vgaGCLFBAccessHandler(). */
309 RTRCPTR RCPtrLFBHandler;
310 /** Pointer to the device instance - RC Ptr. */
311 PPDMDEVINSRC pDevInsRC;
312 /** Pointer to the device instance - R3 Ptr. */
313 PPDMDEVINSR3 pDevInsR3;
314 /** Pointer to the device instance - R0 Ptr. */
315 PPDMDEVINSR0 pDevInsR0;
316
317 /** The critical section. */
318 PDMCRITSECT lock;
319
320 /** LUN\#0: The display port base interface. */
321 PDMIBASE IBase;
322 /** LUN\#0: The display port interface. */
323 PDMIDISPLAYPORT IPort;
324#if defined(VBOX_WITH_HGSMI) && defined(VBOX_WITH_VIDEOHWACCEL)
325 /** LUN\#0: VBVA callbacks interface */
326 PDMIDISPLAYVBVACALLBACKS IVBVACallbacks;
327#else
328# if HC_ARCH_BITS == 32
329 uint32_t Padding3;
330# endif
331#endif
332 /** Pointer to base interface of the driver. */
333 R3PTRTYPE(PPDMIBASE) pDrvBase;
334 /** Pointer to display connector interface of the driver. */
335 R3PTRTYPE(PPDMIDISPLAYCONNECTOR) pDrv;
336
337 /** The PCI device. */
338 PCIDEVICE Dev;
339
340 STAMPROFILE StatRZMemoryRead;
341 STAMPROFILE StatR3MemoryRead;
342 STAMPROFILE StatRZMemoryWrite;
343 STAMPROFILE StatR3MemoryWrite;
344 STAMCOUNTER StatMapPage; /**< Counts IOMMMIOMapMMIO2Page calls. */
345
346 /* Keep track of ring 0 latched accesses to the VGA MMIO memory. */
347 uint64_t u64LastLatchedAccess;
348 uint32_t cLatchAccesses;
349 uint16_t uMaskLatchAccess;
350 uint16_t iMask;
351
352#ifdef VBE_BYTEWISE_IO
353 /** VBE read/write data/index flags */
354 uint8_t fReadVBEData;
355 uint8_t fWriteVBEData;
356 uint8_t fReadVBEIndex;
357 uint8_t fWriteVBEIndex;
358 /** VBE write data/index one byte buffer */
359 uint8_t cbWriteVBEData;
360 uint8_t cbWriteVBEIndex;
361# ifdef VBE_NEW_DYN_LIST
362 /** VBE Extra Data write address one byte buffer */
363 uint8_t cbWriteVBEExtraAddress;
364 uint8_t Padding4;
365# else
366 uint8_t Padding4[2];
367# endif
368#endif
369
370#ifdef VBE_NEW_DYN_LIST
371 /** The VBE BIOS extra data. */
372 R3PTRTYPE(uint8_t *) pu8VBEExtraData;
373 /** The size of the VBE BIOS extra data. */
374 uint16_t cbVBEExtraData;
375 /** The VBE BIOS current memory address. */
376 uint16_t u16VBEExtraAddress;
377 uint16_t Padding5[2];
378#endif
379 /** Current logo data offset. */
380 uint32_t offLogoData;
381 /** The size of the BIOS logo data. */
382 uint32_t cbLogo;
383 /** The BIOS logo data. */
384 R3PTRTYPE(uint8_t *) pu8Logo;
385 /** The name of the logo file. */
386 R3PTRTYPE(char *) pszLogoFile;
387 /** Bitmap image data. */
388 R3PTRTYPE(uint8_t *) pu8LogoBitmap;
389 /** Current logo command. */
390 uint16_t LogoCommand;
391 /** Bitmap width. */
392 uint16_t cxLogo;
393 /** Bitmap height. */
394 uint16_t cyLogo;
395 /** Bitmap planes. */
396 uint16_t cLogoPlanes;
397 /** Bitmap depth. */
398 uint16_t cLogoBits;
399 /** Bitmap compression. */
400 uint16_t LogoCompression;
401 /** Bitmap colors used. */
402 uint16_t cLogoUsedColors;
403 /** Palette size. */
404 uint16_t cLogoPalEntries;
405 /** Clear screen flag. */
406 uint8_t fLogoClearScreen;
407 uint8_t Padding6[7];
408 /** Palette data. */
409 uint32_t au32LogoPalette[256];
410#endif /* VBOX */
411#ifdef VBOX_WITH_HGSMI
412 /** Base port in the assigned PCI I/O space. */
413 RTIOPORT IOPortBase;
414 uint8_t Padding7[6];
415#endif /* VBOX_WITH_HGSMI */
416} VGAState;
417#ifdef VBOX
418/** VGA state. */
419typedef VGAState VGASTATE;
420/** Pointer to the VGA state. */
421typedef VGASTATE *PVGASTATE;
422#endif
423
424#ifdef VBE_NEW_DYN_LIST
425/**
426 * VBE Bios Extra Data structure.
427 * @remark duplicated in vbe.h.
428 */
429typedef struct VBEHeader
430{
431 /** Signature (VBEHEADER_MAGIC). */
432 uint16_t u16Signature;
433 /** Data size. */
434 uint16_t cbData;
435} VBEHeader;
436
437/** VBE Extra Data. */
438typedef VBEHeader VBEHEADER;
439/** Pointer to the VBE Extra Data. */
440typedef VBEHEADER *PVBEHEADER;
441
442/** The value of the VBEHEADER::u16Signature field.
443 * @remark duplicated in vbe.h. */
444#define VBEHEADER_MAGIC 0x77CC
445
446/** The extra port which is used to read the mode list.
447 * @remark duplicated in vbe.h. */
448#define VBE_EXTRA_PORT 0x3b6
449
450/** The extra port which is used for debug printf.
451 * @remark duplicated in vbe.h. */
452#define VBE_PRINTF_PORT 0x3b7
453
454#endif /* VBE_NEW_DYN_LIST */
455
456#if !defined(VBOX) || defined(IN_RING3)
457static inline int c6_to_8(int v)
458{
459 int b;
460 v &= 0x3f;
461 b = v & 1;
462 return (v << 2) | (b << 1) | b;
463}
464#endif /* !VBOX || IN_RING3 */
465
466
467#ifdef VBOX_WITH_HGSMI
468int VBVAInit (PVGASTATE pVGAState);
469void VBVADestroy (PVGASTATE pVGAState);
470int VBVAUpdateDisplay (PVGASTATE pVGAState);
471void VBVAReset (PVGASTATE pVGAState);
472
473bool VBVAIsEnabled(PVGASTATE pVGAState);
474
475/* @return host-guest flags that were set on reset
476 * this allows the caller to make further cleaning when needed,
477 * e.g. reset the IRQ */
478uint32_t HGSMIReset (PHGSMIINSTANCE pIns);
479
480# ifdef VBOX_WITH_VIDEOHWACCEL
481int vbvaVHWACommandCompleteAsynch(PPDMIDISPLAYVBVACALLBACKS pInterface, PVBOXVHWACMD pCmd);
482int vbvaVHWAConstruct (PVGASTATE pVGAState);
483int vbvaVHWADisable (PVGASTATE pVGAState);
484int vbvaVHWAReset (PVGASTATE pVGAState);
485
486int vboxVBVASaveStatePrep (PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
487# endif
488
489int vboxVBVASaveStateExec (PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
490int vboxVBVALoadStateExec (PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t u32Version);
491int vboxVBVALoadStateDone (PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
492
493# ifdef VBOXVDMA
494typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
495int vboxVDMAConstruct(PVGASTATE pVGAState, struct VBOXVDMAHOST **ppVdma, uint32_t cPipeElements);
496int vboxVDMADestruct(PVBOXVDMAHOST pVdma);
497void vboxVDMAControl(PVBOXVDMAHOST pVdma, PVBOXVDMA_CTL pCmd);
498void vboxVDMACommand(PVBOXVDMAHOST pVdma, PVBOXVDMACBUF_DR pCmd);
499bool vboxVDMAIsEnabled(PVBOXVDMAHOST pVdma);
500# endif /* VBOXVDMA */
501
502#endif /* VBOX_WITH_HGSMI */
503
504#ifndef VBOX
505void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base,
506 unsigned long vga_ram_offset, int vga_ram_size);
507uint32_t vga_mem_readb(void *opaque, target_phys_addr_t addr);
508void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val);
509void vga_invalidate_scanlines(VGAState *s, int y1, int y2);
510
511void vga_draw_cursor_line_8(uint8_t *d1, const uint8_t *src1,
512 int poffset, int w,
513 unsigned int color0, unsigned int color1,
514 unsigned int color_xor);
515void vga_draw_cursor_line_16(uint8_t *d1, const uint8_t *src1,
516 int poffset, int w,
517 unsigned int color0, unsigned int color1,
518 unsigned int color_xor);
519void vga_draw_cursor_line_32(uint8_t *d1, const uint8_t *src1,
520 int poffset, int w,
521 unsigned int color0, unsigned int color1,
522 unsigned int color_xor);
523
524extern const uint8_t sr_mask[8];
525extern const uint8_t gr_mask[16];
526#endif /* !VBOX */
527
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