DevVGA.h@ 33174

Last change on this file since 33174 was 33174, checked in by vboxsync, 14 years ago
VGA: Allow loading VGA BIOS from file. Also dump GC registers.
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 23.7 KB

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1	/* $Id: DevVGA.h 33174 2010-10-16 18:10:47Z vboxsync $ */
2	/** @file
3	* DevVGA - VBox VGA/VESA device, internal header.
4	*/
5
6	/*
7	* Copyright (C) 2006-2007 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	* --------------------------------------------------------------------
17	*
18	* This code is based on:
19	*
20	* QEMU internal VGA defines.
21	*
22	* Copyright (c) 2003-2004 Fabrice Bellard
23	*
24	* Permission is hereby granted, free of charge, to any person obtaining a copy
25	* of this software and associated documentation files (the "Software"), to deal
26	* in the Software without restriction, including without limitation the rights
27	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
28	* copies of the Software, and to permit persons to whom the Software is
29	* furnished to do so, subject to the following conditions:
30	*
31	* The above copyright notice and this permission notice shall be included in
32	* all copies or substantial portions of the Software.
33	*
34	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
37	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
38	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
39	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
40	* THE SOFTWARE.
41	*/
42	#ifdef VBOX
43	/** The default amount of VRAM. */
44	# define VGA_VRAM_DEFAULT (_4M)
45	/** The maximum amount of VRAM. Limited by VBOX_MAX_ALLOC_PAGE_COUNT. */
46	# define VGA_VRAM_MAX (256 * _1M)
47	/** The minimum amount of VRAM. */
48	# define VGA_VRAM_MIN (_1M)
49	#endif
50
51	#ifdef VBOX_WITH_HGSMI
52	# include "HGSMI/HGSMIHost.h"
53	#endif /* VBOX_WITH_HGSMI */
54	#include "DevVGASavedState.h"
55
56	#define MSR_COLOR_EMULATION 0x01
57	#define MSR_PAGE_SELECT 0x20
58
59	#define ST01_V_RETRACE 0x08
60	#define ST01_DISP_ENABLE 0x01
61
62	/* bochs VBE support */
63	#define CONFIG_BOCHS_VBE
64
65	#ifdef VBOX
66	#define VBE_DISPI_MAX_XRES 16384
67	#define VBE_DISPI_MAX_YRES 16384
68	#else
69	#define VBE_DISPI_MAX_XRES 1600
70	#define VBE_DISPI_MAX_YRES 1200
71	#endif
72	#define VBE_DISPI_MAX_BPP 32
73
74	#define VBE_DISPI_INDEX_ID 0x0
75	#define VBE_DISPI_INDEX_XRES 0x1
76	#define VBE_DISPI_INDEX_YRES 0x2
77	#define VBE_DISPI_INDEX_BPP 0x3
78	#define VBE_DISPI_INDEX_ENABLE 0x4
79	#define VBE_DISPI_INDEX_BANK 0x5
80	#define VBE_DISPI_INDEX_VIRT_WIDTH 0x6
81	#define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7
82	#define VBE_DISPI_INDEX_X_OFFSET 0x8
83	#define VBE_DISPI_INDEX_Y_OFFSET 0x9
84	#define VBE_DISPI_INDEX_VBOX_VIDEO 0xa
85	#define VBE_DISPI_INDEX_NB_SAVED 0xb /* Number of saved registers (vbe_regs array) */
86	#define VBE_DISPI_INDEX_NB 0xb /* Total number of VBE registers */
87
88	#define VBE_DISPI_ID0 0xB0C0
89	#define VBE_DISPI_ID1 0xB0C1
90	#define VBE_DISPI_ID2 0xB0C2
91	#define VBE_DISPI_ID3 0xB0C3
92	#define VBE_DISPI_ID4 0xB0C4
93
94	#ifdef VBOX
95	/* The VBOX interface id. Indicates support for VBE_DISPI_INDEX_VBOX_VIDEO. */
96	#define VBE_DISPI_ID_VBOX_VIDEO 0xBE00
97	#ifdef VBOX_WITH_HGSMI
98	/* The VBOX interface id. Indicates support for VBVA shared memory interface. */
99	#define VBE_DISPI_ID_HGSMI 0xBE01
100	#endif /* VBOX_WITH_HGSMI */
101	#endif /* VBOX */
102
103	#define VBE_DISPI_DISABLED 0x00
104	#define VBE_DISPI_ENABLED 0x01
105	#define VBE_DISPI_GETCAPS 0x02
106	#define VBE_DISPI_8BIT_DAC 0x20
107	#define VBE_DISPI_LFB_ENABLED 0x40
108	#define VBE_DISPI_NOCLEARMEM 0x80
109
110	#define VBE_DISPI_LFB_PHYSICAL_ADDRESS 0xE0000000
111
112	#ifdef CONFIG_BOCHS_VBE
113
114	#define VGA_STATE_COMMON_BOCHS_VBE \
115	uint16_t vbe_index; \
116	uint16_t vbe_regs[VBE_DISPI_INDEX_NB_SAVED];\
117	uint32_t vbe_start_addr; \
118	uint32_t vbe_line_offset; \
119	uint32_t vbe_bank_max;
120
121	#else
122
123	#define VGA_STATE_COMMON_BOCHS_VBE
124
125	#endif /* !CONFIG_BOCHS_VBE */
126
127	#define CH_ATTR_SIZE (160 * 100)
128	#define VGA_MAX_HEIGHT VBE_DISPI_MAX_YRES
129
130	#ifndef VBOX
131	#define VGA_STATE_COMMON \
132	uint8_t *vram_ptr; \
133	unsigned long vram_offset; \
134	unsigned int vram_size; \
135	uint32_t latch; \
136	uint8_t sr_index; \
137	uint8_t sr[256]; \
138	uint8_t gr_index; \
139	uint8_t gr[256]; \
140	uint8_t ar_index; \
141	uint8_t ar[21]; \
142	int ar_flip_flop; \
143	uint8_t cr_index; \
144	uint8_t cr[256]; /* CRT registers */ \
145	uint8_t msr; /* Misc Output Register */ \
146	uint8_t fcr; /* Feature Control Register */ \
147	uint8_t st00; /* status 0 */ \
148	uint8_t st01; /* status 1 */ \
149	uint8_t dac_state; \
150	uint8_t dac_sub_index; \
151	uint8_t dac_read_index; \
152	uint8_t dac_write_index; \
153	uint8_t dac_cache[3]; /* used when writing */ \
154	uint8_t palette[768]; \
155	int32_t bank_offset; \
156	int (get_bpp)(struct VGAState s); \
157	void (get_offsets)(struct VGAState s, \
158	uint32_t *pline_offset, \
159	uint32_t *pstart_addr, \
160	uint32_t *pline_compare); \
161	void (get_resolution)(struct VGAState s, \
162	int *pwidth, \
163	int *pheight); \
164	VGA_STATE_COMMON_BOCHS_VBE \
165	/* display refresh support */ \
166	DisplayState *ds; \
167	uint32_t font_offsets[2]; \
168	int graphic_mode; \
169	uint8_t shift_control; \
170	uint8_t double_scan; \
171	uint32_t line_offset; \
172	uint32_t line_compare; \
173	uint32_t start_addr; \
174	uint32_t plane_updated; \
175	uint8_t last_cw, last_ch; \
176	uint32_t last_width, last_height; /* in chars or pixels */ \
177	uint32_t last_scr_width, last_scr_height; /* in pixels */ \
178	uint8_t cursor_start, cursor_end; \
179	uint32_t cursor_offset; \
180	unsigned int (*rgb_to_pixel)(unsigned int r, \
181	unsigned int g, unsigned b); \
182	/* hardware mouse cursor support */ \
183	uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32]; \
184	void (cursor_invalidate)(struct VGAState s); \
185	void (cursor_draw_line)(struct VGAState s, uint8_t *d, int y); \
186	/* tell for each page if it has been updated since the last time */ \
187	uint32_t last_palette[256]; \
188	uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
189
190	#else /* VBOX */
191
192	struct VGAState;
193	typedef int FNGETBPP(struct VGAState *s);
194	typedef void FNGETOFFSETS(struct VGAState s, uint32_t pline_offset, uint32_t pstart_addr, uint32_t pline_compare);
195	typedef void FNGETRESOLUTION(struct VGAState s, int pwidth, int *pheight);
196	typedef unsigned int FNRGBTOPIXEL(unsigned int r, unsigned int g, unsigned b);
197	typedef void FNCURSORINVALIDATE(struct VGAState *s);
198	typedef void FNCURSORDRAWLINE(struct VGAState s, uint8_t d, int y);
199
200	/* bird: vram_offset have been remove, function pointers declared external,
201	some type changes, and some padding have been added. */
202	#define VGA_STATE_COMMON \
203	R3PTRTYPE(uint8_t *) vram_ptrR3; \
204	uint32_t vram_size; \
205	uint32_t latch; \
206	uint8_t sr_index; \
207	uint8_t sr[256]; \
208	uint8_t gr_index; \
209	uint8_t gr[256]; \
210	uint8_t ar_index; \
211	uint8_t ar[21]; \
212	int32_t ar_flip_flop; \
213	uint8_t cr_index; \
214	uint8_t cr[256]; /* CRT registers */ \
215	uint8_t msr; /* Misc Output Register */ \
216	uint8_t fcr; /* Feature Control Register */ \
217	uint8_t st00; /* status 0 */ \
218	uint8_t st01; /* status 1 */ \
219	uint8_t dac_state; \
220	uint8_t dac_sub_index; \
221	uint8_t dac_read_index; \
222	uint8_t dac_write_index; \
223	uint8_t dac_cache[3]; /* used when writing */ \
224	uint8_t palette[768]; \
225	int32_t bank_offset; \
226	int32_t padding0; \
227	R3PTRTYPE(FNGETBPP *) get_bpp; \
228	R3PTRTYPE(FNGETOFFSETS *) get_offsets; \
229	R3PTRTYPE(FNGETRESOLUTION *) get_resolution; \
230	VGA_STATE_COMMON_BOCHS_VBE \
231	/* display refresh support */ \
232	uint32_t font_offsets[2]; \
233	int32_t graphic_mode; \
234	uint8_t shift_control; \
235	uint8_t double_scan; \
236	uint8_t padding1[2]; \
237	uint32_t line_offset; \
238	uint32_t line_compare; \
239	uint32_t start_addr; \
240	uint32_t plane_updated; \
241	uint8_t last_cw, last_ch, padding2[2]; \
242	uint32_t last_width, last_height; /* in chars or pixels */ \
243	uint32_t last_scr_width, last_scr_height; /* in pixels */ \
244	uint32_t last_bpp; \
245	uint8_t cursor_start, cursor_end, padding3[2]; \
246	uint32_t cursor_offset; \
247	uint32_t padding4; \
248	R3PTRTYPE(FNRGBTOPIXEL *) rgb_to_pixel; \
249	/* hardware mouse cursor support */ \
250	uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32]; \
251	R3PTRTYPE(FNCURSORINVALIDATE *) cursor_invalidate; \
252	R3PTRTYPE(FNCURSORDRAWLINE *) cursor_draw_line; \
253	/* tell for each page if it has been updated since the last time */ \
254	uint32_t last_palette[256]; \
255	uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
256
257	#endif /* VBOX */
258
259	#ifdef VBOX_WITH_VDMA
260	typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
261	#endif
262
263	typedef struct VGAState {
264	VGA_STATE_COMMON
265	#ifdef VBOX
266	/** end-of-common-state-marker */
267	uint32_t u32Marker;
268	/** The physical address the VRAM was assigned. */
269	RTGCPHYS32 GCPhysVRAM;
270	/** The R0 vram pointer... */
271	R0PTRTYPE(uint8_t *) vram_ptrR0;
272	/** Pointer to the GC vram mapping. */
273	RCPTRTYPE(uint8_t *) vram_ptrRC;
274	/** LFB was updated flag. */
275	bool fLFBUpdated;
276	/** Indicates if the GC extensions are enabled or not. */
277	bool fGCEnabled;
278	/** Indicates if the R0 extensions are enabled or not. */
279	bool fR0Enabled;
280	/** Flag indicating that there are dirty bits. This is used to optimize the handler resetting. */
281	bool fHasDirtyBits;
282	/** Flag indicating that the VGA memory in the 0xa0000-0xbffff region has been remapped to allow direct access. */
283	bool fRemappedVGA;
284	/** Whether to render the guest VRAM to the framebuffer memory. False only for some LFB modes. */
285	bool fRenderVRAM;
286	bool Padding1[2];
287
288	uint32_t cMonitors;
289
290	#ifdef VBOX_WITH_HGSMI
291	R3PTRTYPE(PHGSMIINSTANCE) pHGSMI;
292	#endif /* VBOX_WITH_HGSMI */
293	#ifdef VBOX_WITH_VDMA
294	R3PTRTYPE(PVBOXVDMAHOST) pVdma;
295	#endif
296
297	/** Current refresh timer interval. */
298	uint32_t Padding2;
299	uint32_t cMilliesRefreshInterval;
300	/** Refresh timer handle - HC. */
301	PTMTIMERR3 RefreshTimer;
302
303	/** Bitmap tracking dirty pages. */
304	uint32_t au32DirtyBitmap[VGA_VRAM_MAX / PAGE_SIZE / 32];
305	/** Pointer to vgaGCLFBAccessHandler(). */
306	RTRCPTR RCPtrLFBHandler;
307	/** Pointer to the device instance - RC Ptr. */
308	PPDMDEVINSRC pDevInsRC;
309	/** Pointer to the device instance - R3 Ptr. */
310	PPDMDEVINSR3 pDevInsR3;
311	/** Pointer to the device instance - R0 Ptr. */
312	PPDMDEVINSR0 pDevInsR0;
313
314	/** The critical section. */
315	PDMCRITSECT lock;
316
317	/** LUN\#0: The display port base interface. */
318	PDMIBASE IBase;
319	/** LUN\#0: The display port interface. */
320	PDMIDISPLAYPORT IPort;
321	#if defined(VBOX_WITH_HGSMI) && defined(VBOX_WITH_VIDEOHWACCEL)
322	/** LUN\#0: VBVA callbacks interface */
323	PDMIDISPLAYVBVACALLBACKS IVBVACallbacks;
324	#else
325	# if HC_ARCH_BITS == 32
326	uint32_t Padding3;
327	# endif
328	#endif
329	/** Pointer to base interface of the driver. */
330	R3PTRTYPE(PPDMIBASE) pDrvBase;
331	/** Pointer to display connector interface of the driver. */
332	R3PTRTYPE(PPDMIDISPLAYCONNECTOR) pDrv;
333
334	/** The PCI device. */
335	PCIDEVICE Dev;
336
337	STAMPROFILE StatRZMemoryRead;
338	STAMPROFILE StatR3MemoryRead;
339	STAMPROFILE StatRZMemoryWrite;
340	STAMPROFILE StatR3MemoryWrite;
341	STAMCOUNTER StatMapPage; /*< Counts IOMMMIOMapMMIO2Page calls. /
342	STAMCOUNTER StatUpdateDisp; /*< Counts vgaPortUpdateDisplay calls. /
343
344	/* Keep track of ring 0 latched accesses to the VGA MMIO memory. */
345	uint64_t u64LastLatchedAccess;
346	uint32_t cLatchAccesses;
347	uint16_t uMaskLatchAccess;
348	uint16_t iMask;
349
350	#ifdef VBE_BYTEWISE_IO
351	/** VBE read/write data/index flags */
352	uint8_t fReadVBEData;
353	uint8_t fWriteVBEData;
354	uint8_t fReadVBEIndex;
355	uint8_t fWriteVBEIndex;
356	/** VBE write data/index one byte buffer */
357	uint8_t cbWriteVBEData;
358	uint8_t cbWriteVBEIndex;
359	# ifdef VBE_NEW_DYN_LIST
360	/** VBE Extra Data write address one byte buffer */
361	uint8_t cbWriteVBEExtraAddress;
362	uint8_t Padding4;
363	# else
364	uint8_t Padding4[2];
365	# endif
366	#endif
367
368	#ifdef VBE_NEW_DYN_LIST
369	/** The VBE BIOS extra data. */
370	R3PTRTYPE(uint8_t *) pu8VBEExtraData;
371	/** The size of the VBE BIOS extra data. */
372	uint16_t cbVBEExtraData;
373	/** The VBE BIOS current memory address. */
374	uint16_t u16VBEExtraAddress;
375	uint16_t Padding5[2];
376	#endif
377	/** Current logo data offset. */
378	uint32_t offLogoData;
379	/** The size of the BIOS logo data. */
380	uint32_t cbLogo;
381	/** The BIOS logo data. */
382	R3PTRTYPE(uint8_t *) pu8Logo;
383	/** The name of the logo file. */
384	R3PTRTYPE(char *) pszLogoFile;
385	/** Bitmap image data. */
386	R3PTRTYPE(uint8_t *) pu8LogoBitmap;
387	/** Current logo command. */
388	uint16_t LogoCommand;
389	/** Bitmap width. */
390	uint16_t cxLogo;
391	/** Bitmap height. */
392	uint16_t cyLogo;
393	/** Bitmap planes. */
394	uint16_t cLogoPlanes;
395	/** Bitmap depth. */
396	uint16_t cLogoBits;
397	/** Bitmap compression. */
398	uint16_t LogoCompression;
399	/** Bitmap colors used. */
400	uint16_t cLogoUsedColors;
401	/** Palette size. */
402	uint16_t cLogoPalEntries;
403	/** Clear screen flag. */
404	uint8_t fLogoClearScreen;
405	uint8_t Padding6[7];
406	/** Palette data. */
407	uint32_t au32LogoPalette[256];
408	/** The VGA BIOS ROM data. */
409	uint8_t *pu8VgaBios;
410	/** The size of the VGA BIOS ROM. */
411	uint64_t cbVgaBios;
412	/** The name of the VGA BIOS ROM file. */
413	char *pszVgaBiosFile;
414	#endif /* VBOX */
415	#ifdef VBOX_WITH_HGSMI
416	/** Base port in the assigned PCI I/O space. */
417	RTIOPORT IOPortBase;
418	#ifdef VBOX_WITH_WDDM
419	uint8_t Padding7[2];
420	/* specifies guest driver caps, i.e. whether it can handle IRQs from the adapter,
421	* the way it can handle async HGSMI command completion, etc. */
422	uint32_t fGuestCaps;
423	#else
424	uint8_t Padding7[6];
425	#endif
426	#endif /* VBOX_WITH_HGSMI */
427	} VGAState;
428	#ifdef VBOX
429	/** VGA state. */
430	typedef VGAState VGASTATE;
431	/** Pointer to the VGA state. */
432	typedef VGASTATE *PVGASTATE;
433	#endif
434
435	#ifdef VBE_NEW_DYN_LIST
436	/**
437	* VBE Bios Extra Data structure.
438	* @remark duplicated in vbe.h.
439	*/
440	typedef struct VBEHeader
441	{
442	/** Signature (VBEHEADER_MAGIC). */
443	uint16_t u16Signature;
444	/** Data size. */
445	uint16_t cbData;
446	} VBEHeader;
447
448	/** VBE Extra Data. */
449	typedef VBEHeader VBEHEADER;
450	/** Pointer to the VBE Extra Data. */
451	typedef VBEHEADER *PVBEHEADER;
452
453	/** The value of the VBEHEADER::u16Signature field.
454	* @remark duplicated in vbe.h. */
455	#define VBEHEADER_MAGIC 0x77CC
456
457	/** The extra port which is used to read the mode list.
458	* @remark duplicated in vbe.h. */
459	#define VBE_EXTRA_PORT 0x3b6
460
461	/** The extra port which is used for debug printf.
462	* @remark duplicated in vbe.h. */
463	#define VBE_PRINTF_PORT 0x3b7
464
465	#endif /* VBE_NEW_DYN_LIST */
466
467	#if !defined(VBOX) \|\| defined(IN_RING3)
468	static inline int c6_to_8(int v)
469	{
470	int b;
471	v &= 0x3f;
472	b = v & 1;
473	return (v << 2) \| (b << 1) \| b;
474	}
475	#endif /* !VBOX \|\| IN_RING3 */
476
477
478	#ifdef VBOX_WITH_HGSMI
479	int VBVAInit (PVGASTATE pVGAState);
480	void VBVADestroy (PVGASTATE pVGAState);
481	int VBVAUpdateDisplay (PVGASTATE pVGAState);
482	void VBVAReset (PVGASTATE pVGAState);
483
484	bool VBVAIsEnabled(PVGASTATE pVGAState);
485
486	/* @return host-guest flags that were set on reset
487	* this allows the caller to make further cleaning when needed,
488	* e.g. reset the IRQ */
489	uint32_t HGSMIReset (PHGSMIINSTANCE pIns);
490
491	# ifdef VBOX_WITH_VIDEOHWACCEL
492	int vbvaVHWACommandCompleteAsynch(PPDMIDISPLAYVBVACALLBACKS pInterface, PVBOXVHWACMD pCmd);
493	int vbvaVHWAConstruct (PVGASTATE pVGAState);
494	int vbvaVHWADisable (PVGASTATE pVGAState);
495	int vbvaVHWAReset (PVGASTATE pVGAState);
496
497	int vboxVBVASaveStatePrep (PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
498	# endif
499
500	#ifdef VBOX_WITH_HGSMI
501	#define PPDMIDISPLAYVBVACALLBACKS_2_PVGASTATE(_pcb) ( (PVGASTATE)((uint8_t *)(_pcb) - RT_OFFSETOF(VGASTATE, IVBVACallbacks)) )
502	#endif
503
504	# ifdef VBOX_WITH_CRHGSMI
505	int vboxVDMACrHgsmiCommandCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface, PVBOXVDMACMD_CHROMIUM_CMD pCmd, int rc);
506	int vboxVDMACrHgsmiControlCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface, PVBOXVDMACMD_CHROMIUM_CTL pCmd, int rc);
507	# endif
508
509	int vboxVBVASaveStateExec (PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
510	int vboxVBVALoadStateExec (PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t u32Version);
511	int vboxVBVALoadStateDone (PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
512
513	# ifdef VBOX_WITH_VDMA
514	typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
515	int vboxVDMAConstruct(PVGASTATE pVGAState, struct VBOXVDMAHOST **ppVdma, uint32_t cPipeElements);
516	int vboxVDMADestruct(PVBOXVDMAHOST pVdma);
517	void vboxVDMAControl(PVBOXVDMAHOST pVdma, PVBOXVDMA_CTL pCmd);
518	void vboxVDMACommand(PVBOXVDMAHOST pVdma, PVBOXVDMACBUF_DR pCmd);
519	bool vboxVDMAIsEnabled(PVBOXVDMAHOST pVdma);
520	# endif /* VBOX_WITH_VDMA */
521
522	#endif /* VBOX_WITH_HGSMI */
523
524	#ifndef VBOX
525	void vga_common_init(VGAState s, DisplayState ds, uint8_t *vga_ram_base,
526	unsigned long vga_ram_offset, int vga_ram_size);
527	uint32_t vga_mem_readb(void *opaque, target_phys_addr_t addr);
528	void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val);
529	void vga_invalidate_scanlines(VGAState *s, int y1, int y2);
530
531	void vga_draw_cursor_line_8(uint8_t d1, const uint8_t src1,
532	int poffset, int w,
533	unsigned int color0, unsigned int color1,
534	unsigned int color_xor);
535	void vga_draw_cursor_line_16(uint8_t d1, const uint8_t src1,
536	int poffset, int w,
537	unsigned int color0, unsigned int color1,
538	unsigned int color_xor);
539	void vga_draw_cursor_line_32(uint8_t d1, const uint8_t src1,
540	int poffset, int w,
541	unsigned int color0, unsigned int color1,
542	unsigned int color_xor);
543
544	extern const uint8_t sr_mask[8];
545	extern const uint8_t gr_mask[16];
546	#endif /* !VBOX */
547

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source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA.h@ 33174

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