VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA.h@ 50889

Last change on this file since 50889 was 50850, checked in by vboxsync, 11 years ago

32-bit build fix
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1/* $Id: DevVGA.h 50850 2014-03-24 10:43:03Z vboxsync $ */
2/** @file
3 * DevVGA - VBox VGA/VESA device, internal header.
4 */
5
6/*
7 * Copyright (C) 2006-2013 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 * --------------------------------------------------------------------
17 *
18 * This code is based on:
19 *
20 * QEMU internal VGA defines.
21 *
22 * Copyright (c) 2003-2004 Fabrice Bellard
23 *
24 * Permission is hereby granted, free of charge, to any person obtaining a copy
25 * of this software and associated documentation files (the "Software"), to deal
26 * in the Software without restriction, including without limitation the rights
27 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
28 * copies of the Software, and to permit persons to whom the Software is
29 * furnished to do so, subject to the following conditions:
30 *
31 * The above copyright notice and this permission notice shall be included in
32 * all copies or substantial portions of the Software.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
37 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
38 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
39 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
40 * THE SOFTWARE.
41 */
42
43/** Use VBE bytewise I/O. Only needed for Windows Longhorn/Vista betas and backwards compatibility. */
44#define VBE_BYTEWISE_IO
45
46/** Use VBE new dynamic mode list.
47 * If this is not defined, no checks are carried out to see if the modes all
48 * fit into the framebuffer! See the VRAM_SIZE_FIX define. */
49#define VBE_NEW_DYN_LIST
50
51#ifdef VBOX
52/** The default amount of VRAM. */
53# define VGA_VRAM_DEFAULT (_4M)
54/** The maximum amount of VRAM. Limited by VBOX_MAX_ALLOC_PAGE_COUNT. */
55# define VGA_VRAM_MAX (256 * _1M)
56/** The minimum amount of VRAM. */
57# define VGA_VRAM_MIN (_1M)
58#endif
59
60#include <VBox/Hardware/VBoxVideoVBE.h>
61
62#ifdef VBOX_WITH_HGSMI
63# include "HGSMI/HGSMIHost.h"
64#endif /* VBOX_WITH_HGSMI */
65#include "DevVGASavedState.h"
66
67#ifdef VBOX_WITH_VMSVGA
68# include "DevVGA-SVGA.h"
69#endif
70
71# include <iprt/list.h>
72
73#define MSR_COLOR_EMULATION 0x01
74#define MSR_PAGE_SELECT 0x20
75
76#define ST01_V_RETRACE 0x08
77#define ST01_DISP_ENABLE 0x01
78
79/* bochs VBE support */
80#define CONFIG_BOCHS_VBE
81
82#ifdef CONFIG_BOCHS_VBE
83
84/* Cross reference with <VBox/Hardware/VBoxVideoVBE.h> */
85#define VBE_DISPI_INDEX_NB_SAVED 0xb /* Number of saved registers (vbe_regs array) */
86#define VBE_DISPI_INDEX_NB 0xc /* Total number of VBE registers */
87
88#define VGA_STATE_COMMON_BOCHS_VBE \
89 uint16_t vbe_index; \
90 uint16_t vbe_regs[VBE_DISPI_INDEX_NB]; \
91 uint16_t alignment[3]; /* pad to 64 bits */ \
92 uint32_t vbe_start_addr; \
93 uint32_t vbe_line_offset; \
94 uint32_t vbe_bank_max;
95
96#else
97
98#define VGA_STATE_COMMON_BOCHS_VBE
99
100#endif /* !CONFIG_BOCHS_VBE */
101
102#define CH_ATTR_SIZE (160 * 100)
103#define VGA_MAX_HEIGHT VBE_DISPI_MAX_YRES
104
105typedef struct vga_retrace_s {
106 unsigned frame_cclks; /* Character clocks per frame. */
107 unsigned frame_ns; /* Frame duration in ns. */
108 unsigned cclk_ns; /* Character clock duration in ns. */
109 unsigned vb_start; /* Vertical blanking start (scanline). */
110 unsigned vb_end; /* Vertical blanking end (scanline). */
111 unsigned vb_end_ns; /* Vertical blanking end time (length) in ns. */
112 unsigned vs_start; /* Vertical sync start (scanline). */
113 unsigned vs_end; /* Vertical sync end (scanline). */
114 unsigned vs_start_ns; /* Vertical sync start time in ns. */
115 unsigned vs_end_ns; /* Vertical sync end time in ns. */
116 unsigned h_total; /* Horizontal total (cclks per scanline). */
117 unsigned h_total_ns; /* Scanline duration in ns. */
118 unsigned hb_start; /* Horizontal blanking start (cclk). */
119 unsigned hb_end; /* Horizontal blanking end (cclk). */
120 unsigned hb_end_ns; /* Horizontal blanking end time (length) in ns. */
121 unsigned v_freq_hz; /* Vertical refresh rate to emulate. */
122} vga_retrace_s;
123
124#ifndef VBOX
125#define VGA_STATE_COMMON \
126 uint8_t *vram_ptr; \
127 unsigned long vram_offset; \
128 unsigned int vram_size; \
129 uint32_t latch; \
130 uint8_t sr_index; \
131 uint8_t sr[256]; \
132 uint8_t gr_index; \
133 uint8_t gr[256]; \
134 uint8_t ar_index; \
135 uint8_t ar[21]; \
136 int ar_flip_flop; \
137 uint8_t cr_index; \
138 uint8_t cr[256]; /* CRT registers */ \
139 uint8_t msr; /* Misc Output Register */ \
140 uint8_t fcr; /* Feature Control Register */ \
141 uint8_t st00; /* status 0 */ \
142 uint8_t st01; /* status 1 */ \
143 uint8_t dac_state; \
144 uint8_t dac_sub_index; \
145 uint8_t dac_read_index; \
146 uint8_t dac_write_index; \
147 uint8_t dac_cache[3]; /* used when writing */ \
148 uint8_t palette[768]; \
149 int32_t bank_offset; \
150 int (*get_bpp)(struct VGAState *s); \
151 void (*get_offsets)(struct VGAState *s, \
152 uint32_t *pline_offset, \
153 uint32_t *pstart_addr, \
154 uint32_t *pline_compare); \
155 void (*get_resolution)(struct VGAState *s, \
156 int *pwidth, \
157 int *pheight); \
158 VGA_STATE_COMMON_BOCHS_VBE \
159 /* display refresh support */ \
160 DisplayState *ds; \
161 uint32_t font_offsets[2]; \
162 int graphic_mode; \
163 uint8_t shift_control; \
164 uint8_t double_scan; \
165 uint32_t line_offset; \
166 uint32_t line_compare; \
167 uint32_t start_addr; \
168 uint32_t plane_updated; \
169 uint8_t last_cw, last_ch; \
170 uint32_t last_width, last_height; /* in chars or pixels */ \
171 uint32_t last_scr_width, last_scr_height; /* in pixels */ \
172 uint8_t cursor_start, cursor_end; \
173 uint32_t cursor_offset; \
174 unsigned int (*rgb_to_pixel)(unsigned int r, \
175 unsigned int g, unsigned b); \
176 /* hardware mouse cursor support */ \
177 uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32]; \
178 void (*cursor_invalidate)(struct VGAState *s); \
179 void (*cursor_draw_line)(struct VGAState *s, uint8_t *d, int y); \
180 /* tell for each page if it has been updated since the last time */ \
181 uint32_t last_palette[256]; \
182 uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
183
184#else /* VBOX */
185
186/* bird: Since we've changed types, reordered members, done alignment
187 paddings and more, VGA_STATE_COMMON was added directly to the
188 struct to make it more readable and easier to handle. */
189
190struct VGAState;
191typedef int FNGETBPP(struct VGAState *s);
192typedef void FNGETOFFSETS(struct VGAState *s, uint32_t *pline_offset, uint32_t *pstart_addr, uint32_t *pline_compare);
193typedef void FNGETRESOLUTION(struct VGAState *s, int *pwidth, int *pheight);
194typedef unsigned int FNRGBTOPIXEL(unsigned int r, unsigned int g, unsigned b);
195typedef void FNCURSORINVALIDATE(struct VGAState *s);
196typedef void FNCURSORDRAWLINE(struct VGAState *s, uint8_t *d, int y);
197
198#endif /* VBOX */
199
200#ifdef VBOX_WITH_VDMA
201typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
202#endif
203
204#ifdef VBOX_WITH_VIDEOHWACCEL
205#define VBOX_VHWA_MAX_PENDING_COMMANDS 1000
206
207typedef struct _VBOX_VHWA_PENDINGCMD
208{
209 RTLISTNODE Node;
210 PVBOXVHWACMD pCommand;
211} VBOX_VHWA_PENDINGCMD;
212#endif
213
214typedef struct VGAState {
215#ifndef VBOX
216 VGA_STATE_COMMON
217#else /* VBOX */
218 R3PTRTYPE(uint8_t *) vram_ptrR3;
219 R3PTRTYPE(FNGETBPP *) get_bpp;
220 R3PTRTYPE(FNGETOFFSETS *) get_offsets;
221 R3PTRTYPE(FNGETRESOLUTION *) get_resolution;
222 R3PTRTYPE(FNRGBTOPIXEL *) rgb_to_pixel;
223 R3PTRTYPE(FNCURSORINVALIDATE *) cursor_invalidate;
224 R3PTRTYPE(FNCURSORDRAWLINE *) cursor_draw_line;
225 RTR3PTR R3PtrCmnAlignment;
226 uint32_t vram_size;
227 uint32_t latch;
228 uint8_t sr_index;
229 uint8_t sr[256];
230 uint8_t gr_index;
231 uint8_t gr[256];
232 uint8_t ar_index;
233 uint8_t ar[21];
234 int32_t ar_flip_flop;
235 uint8_t cr_index;
236 uint8_t cr[256]; /* CRT registers */
237 uint8_t msr; /* Misc Output Register */
238 uint8_t fcr; /* Feature Control Register */
239 uint8_t st00; /* status 0 */
240 uint8_t st01; /* status 1 */
241 uint8_t dac_state;
242 uint8_t dac_sub_index;
243 uint8_t dac_read_index;
244 uint8_t dac_write_index;
245 uint8_t dac_cache[3]; /* used when writing */
246 uint8_t palette[768];
247 int32_t bank_offset;
248 VGA_STATE_COMMON_BOCHS_VBE
249 /* display refresh support */
250 uint32_t font_offsets[2];
251 int32_t graphic_mode;
252 uint8_t shift_control;
253 uint8_t double_scan;
254 uint8_t padding1[2];
255 uint32_t line_offset;
256 uint32_t line_compare;
257 uint32_t start_addr;
258 uint32_t plane_updated;
259 uint8_t last_cw, last_ch, padding2[2];
260 uint32_t last_width, last_height; /* in chars or pixels */
261 uint32_t last_scr_width, last_scr_height; /* in pixels */
262 uint32_t last_bpp;
263 uint8_t cursor_start, cursor_end, padding3[2];
264 uint32_t cursor_offset;
265 /* hardware mouse cursor support */
266 uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32];
267 /* tell for each page if it has been updated since the last time */
268 uint32_t last_palette[256];
269 uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
270
271 /** end-of-common-state-marker */
272 uint32_t u32Marker;
273
274 /** Pointer to the device instance - RC Ptr. */
275 PPDMDEVINSRC pDevInsRC;
276 /** Pointer to the GC vram mapping. */
277 RCPTRTYPE(uint8_t *) vram_ptrRC;
278 uint32_t PaddingMinus1;
279
280 /** Pointer to the device instance - R3 Ptr. */
281 PPDMDEVINSR3 pDevInsR3;
282# ifdef VBOX_WITH_HGSMI
283 R3PTRTYPE(PHGSMIINSTANCE) pHGSMI;
284# endif
285# ifdef VBOX_WITH_VDMA
286 R3PTRTYPE(PVBOXVDMAHOST) pVdma;
287# endif
288 /** LUN\#0: The display port base interface. */
289 PDMIBASE IBase;
290 /** LUN\#0: The display port interface. */
291 PDMIDISPLAYPORT IPort;
292# if defined(VBOX_WITH_HGSMI) && (defined(VBOX_WITH_VIDEOHWACCEL) || defined(VBOX_WITH_CRHGSMI))
293 /** LUN\#0: VBVA callbacks interface */
294 PDMIDISPLAYVBVACALLBACKS IVBVACallbacks;
295# endif
296 /** Pointer to base interface of the driver. */
297 R3PTRTYPE(PPDMIBASE) pDrvBase;
298 /** Pointer to display connector interface of the driver. */
299 R3PTRTYPE(PPDMIDISPLAYCONNECTOR) pDrv;
300
301 /** Refresh timer handle - HC. */
302 PTMTIMERR3 RefreshTimer;
303
304 /** Pointer to the device instance - R0 Ptr. */
305 PPDMDEVINSR0 pDevInsR0;
306 /** The R0 vram pointer... */
307 R0PTRTYPE(uint8_t *) vram_ptrR0;
308
309#ifdef VBOX_WITH_VMSVGA
310 struct
311 {
312 /** The host window handle */
313 uint64_t u64HostWindowId;
314 /** The R3 FIFO pointer. */
315 R3PTRTYPE(uint32_t *) pFIFOR3;
316 /** The R0 FIFO pointer. */
317 R0PTRTYPE(uint32_t *) pFIFOR0;
318 /** R3 Opaque pointer to svga state. */
319 R3PTRTYPE(void *) pSVGAState;
320 /** R3 Opaque pointer to 3d state. */
321 R3PTRTYPE(void *) p3dState;
322 /** R3 Opaque pointer to a copy of the first 32k of the framebuffer before switching into svga mode. */
323 R3PTRTYPE(void *) pFrameBufferBackup;
324#if HC_ARCH_BITS == 32
325 uint32_t Padding3;
326#endif
327 /** Guest physical address of the FIFO memory range. */
328 RTGCPHYS GCPhysFIFO;
329 /** Size in bytes of the FIFO memory range. */
330 uint32_t cbFIFO;
331 /** SVGA id. */
332 uint32_t u32SVGAId;
333 /** SVGA extensions enabled or not. */
334 uint32_t fEnabled;
335 /** SVGA memory area configured status. */
336 uint32_t fConfigured;
337 /** Device is busy handling FIFO requests. */
338 uint32_t fBusy;
339 /** Traces (dirty page detection) enabled or not. */
340 uint32_t fTraces;
341 /** Guest OS identifier. */
342 uint32_t u32GuestId;
343 /** Scratch region size. */
344 uint32_t cScratchRegion;
345 /** Scratch array. */
346 uint32_t au32ScratchRegion[VMSVGA_SCRATCH_SIZE];
347 /** Irq status. */
348 uint32_t u32IrqStatus;
349 /** Irq mask. */
350 uint32_t u32IrqMask;
351 /** Pitch lock. */
352 uint32_t u32PitchLock;
353 /** Current GMR id. (SVGA_REG_GMR_ID) */
354 uint32_t u32CurrentGMRId;
355 /** Register caps. */
356 uint32_t u32RegCaps;
357 /** Physical address of command mmio range. */
358 uint32_t Padding2;
359 RTIOPORT BasePort;
360 /** Port io index register. */
361 uint32_t u32IndexReg;
362 /** FIFO request semaphore. */
363 RTSEMEVENT FIFORequestSem;
364 /** FIFO IO Thread. */
365 R3PTRTYPE(PPDMTHREAD) pFIFOIOThread;
366 int32_t iWidth;
367 int32_t iHeight;
368 uint32_t iBpp;
369 uint32_t cbScanline;
370 /** Maximum width supported. */
371 uint32_t u32MaxWidth;
372 /** Maximum height supported. */
373 uint32_t u32MaxHeight;
374 /** Action flags */
375 uint32_t u32ActionFlags;
376 /** SVGA 3d extensions enabled or not. */
377 bool f3DEnabled;
378 /** VRAM page monitoring enabled or not. */
379 bool fVRAMTracking;
380 bool Padding6[2];
381 } svga;
382#endif
383
384 /** The number of monitors. */
385 uint32_t cMonitors;
386 /** Current refresh timer interval. */
387 uint32_t cMilliesRefreshInterval;
388 /** Bitmap tracking dirty pages. */
389 uint32_t au32DirtyBitmap[VGA_VRAM_MAX / PAGE_SIZE / 32];
390
391 /** Flag indicating that there are dirty bits. This is used to optimize the handler resetting. */
392 bool fHasDirtyBits;
393 /** LFB was updated flag. */
394 bool fLFBUpdated;
395 /** Indicates if the GC extensions are enabled or not. */
396 bool fGCEnabled;
397 /** Indicates if the R0 extensions are enabled or not. */
398 bool fR0Enabled;
399 /** Flag indicating that the VGA memory in the 0xa0000-0xbffff region has been remapped to allow direct access. */
400 bool fRemappedVGA;
401 /** Whether to render the guest VRAM to the framebuffer memory. False only for some LFB modes. */
402 bool fRenderVRAM;
403#ifdef VBOX_WITH_VMSVGA
404 /* Whether the SVGA emulation is enabled or not. */
405 bool fVMSVGAEnabled;
406 bool Padding1[1];
407#else
408 bool Padding1[2];
409#endif
410
411 /** The physical address the VRAM was assigned. */
412 RTGCPHYS GCPhysVRAM;
413 /** The critical section protect the instance data. */
414 PDMCRITSECT CritSect;
415 /** The PCI device. */
416 PCIDEVICE Dev;
417
418 STAMPROFILE StatRZMemoryRead;
419 STAMPROFILE StatR3MemoryRead;
420 STAMPROFILE StatRZMemoryWrite;
421 STAMPROFILE StatR3MemoryWrite;
422 STAMCOUNTER StatMapPage; /**< Counts IOMMMIOMapMMIO2Page calls. */
423 STAMCOUNTER StatUpdateDisp; /**< Counts vgaPortUpdateDisplay calls. */
424
425 /* Keep track of ring 0 latched accesses to the VGA MMIO memory. */
426 uint64_t u64LastLatchedAccess;
427 uint32_t cLatchAccesses;
428 uint16_t uMaskLatchAccess;
429 uint16_t iMask;
430
431# ifdef VBE_BYTEWISE_IO
432 /** VBE read/write data/index flags */
433 uint8_t fReadVBEData;
434 uint8_t fWriteVBEData;
435 uint8_t fReadVBEIndex;
436 uint8_t fWriteVBEIndex;
437 /** VBE write data/index one byte buffer */
438 uint8_t cbWriteVBEData;
439 uint8_t cbWriteVBEIndex;
440# ifdef VBE_NEW_DYN_LIST
441 /** VBE Extra Data write address one byte buffer */
442 uint8_t cbWriteVBEExtraAddress;
443 uint8_t Padding5;
444# else
445 uint8_t Padding5[2];
446# endif
447# endif
448
449 /** Retrace emulation state */
450 bool fRealRetrace;
451 bool Padding6[HC_ARCH_BITS == 64 ? 7 : 3];
452 vga_retrace_s retrace_state;
453
454# ifdef VBE_NEW_DYN_LIST
455 /** The VBE BIOS extra data. */
456 R3PTRTYPE(uint8_t *) pu8VBEExtraData;
457 /** The size of the VBE BIOS extra data. */
458 uint16_t cbVBEExtraData;
459 /** The VBE BIOS current memory address. */
460 uint16_t u16VBEExtraAddress;
461 uint16_t Padding7[2];
462# endif
463
464 /** The BIOS logo data. */
465 R3PTRTYPE(uint8_t *) pu8Logo;
466 /** The name of the logo file. */
467 R3PTRTYPE(char *) pszLogoFile;
468 /** Bitmap image data. */
469 R3PTRTYPE(uint8_t *) pu8LogoBitmap;
470 /** Current logo data offset. */
471 uint32_t offLogoData;
472 /** The size of the BIOS logo data. */
473 uint32_t cbLogo;
474 /** Current logo command. */
475 uint16_t LogoCommand;
476 /** Bitmap width. */
477 uint16_t cxLogo;
478 /** Bitmap height. */
479 uint16_t cyLogo;
480 /** Bitmap planes. */
481 uint16_t cLogoPlanes;
482 /** Bitmap depth. */
483 uint16_t cLogoBits;
484 /** Bitmap compression. */
485 uint16_t LogoCompression;
486 /** Bitmap colors used. */
487 uint16_t cLogoUsedColors;
488 /** Palette size. */
489 uint16_t cLogoPalEntries;
490 /** Clear screen flag. */
491 uint8_t fLogoClearScreen;
492 uint8_t Padding8[7];
493 /** Palette data. */
494 uint32_t au32LogoPalette[256];
495
496 /** The VGA BIOS ROM data. */
497 R3PTRTYPE(uint8_t *) pu8VgaBios;
498 /** The size of the VGA BIOS ROM. */
499 uint64_t cbVgaBios;
500 /** The name of the VGA BIOS ROM file. */
501 R3PTRTYPE(char *) pszVgaBiosFile;
502
503# ifdef VBOX_WITH_HGSMI
504 /** Base port in the assigned PCI I/O space. */
505 RTIOPORT IOPortBase;
506# ifdef VBOX_WITH_WDDM
507 uint8_t Padding9[2];
508 /** Specifies guest driver caps, i.e. whether it can handle IRQs from the
509 * adapter, the way it can handle async HGSMI command completion, etc. */
510 uint32_t fGuestCaps;
511 uint32_t fScanLineCfg;
512 uint8_t Padding10[4];
513# else
514 uint8_t Padding10[14];
515# endif
516# endif /* VBOX_WITH_HGSMI */
517
518 struct {
519 volatile uint32_t cPending;
520 uint32_t Padding1;
521 union
522 {
523 RTLISTNODE PendingList;
524 /* make sure the structure sized cross different contexts correctly */
525 struct
526 {
527 R3PTRTYPE(void *) dummy1;
528 R3PTRTYPE(void *) dummy2;
529 } dummy;
530 };
531 } pendingVhwaCommands;
532#endif /* VBOX */
533} VGAState;
534#ifdef VBOX
535/** VGA state. */
536typedef VGAState VGASTATE;
537/** Pointer to the VGA state. */
538typedef VGASTATE *PVGASTATE;
539AssertCompileMemberAlignment(VGASTATE, bank_offset, 8);
540AssertCompileMemberAlignment(VGASTATE, font_offsets, 8);
541AssertCompileMemberAlignment(VGASTATE, last_ch_attr, 8);
542AssertCompileMemberAlignment(VGASTATE, u32Marker, 8);
543#endif
544
545#ifdef VBE_NEW_DYN_LIST
546/**
547 * VBE Bios Extra Data structure.
548 * @remark duplicated in vbe.h.
549 */
550typedef struct VBEHeader
551{
552 /** Signature (VBEHEADER_MAGIC). */
553 uint16_t u16Signature;
554 /** Data size. */
555 uint16_t cbData;
556} VBEHeader;
557
558/** VBE Extra Data. */
559typedef VBEHeader VBEHEADER;
560/** Pointer to the VBE Extra Data. */
561typedef VBEHEADER *PVBEHEADER;
562
563/** The value of the VBEHEADER::u16Signature field.
564 * @remark duplicated in vbe.h. */
565#define VBEHEADER_MAGIC 0x77CC
566
567/** The extra port which is used to read the mode list.
568 * @remark duplicated in vbe.h. */
569#define VBE_EXTRA_PORT 0x3b6
570
571/** The extra port which is used for debug printf.
572 * @remark duplicated in vbe.h. */
573#define VBE_PRINTF_PORT 0x3b7
574
575#endif /* VBE_NEW_DYN_LIST */
576
577#if !defined(VBOX) || defined(IN_RING3)
578static inline int c6_to_8(int v)
579{
580 int b;
581 v &= 0x3f;
582 b = v & 1;
583 return (v << 2) | (b << 1) | b;
584}
585#endif /* !VBOX || IN_RING3 */
586
587
588#ifdef VBOX_WITH_HGSMI
589int VBVAInit (PVGASTATE pVGAState);
590void VBVADestroy (PVGASTATE pVGAState);
591int VBVAUpdateDisplay (PVGASTATE pVGAState);
592void VBVAReset (PVGASTATE pVGAState);
593void VBVAPause (PVGASTATE pVGAState, bool fPause);
594int VBVAGetScreenInfo(PVGASTATE pVGAState, unsigned uScreenId, struct VBVAINFOSCREEN *pScreen, void **ppvVram);
595
596bool VBVAIsEnabled(PVGASTATE pVGAState);
597
598void VBVARaiseIrq (PVGASTATE pVGAState, uint32_t fFlags);
599void VBVARaiseIrqNoWait(PVGASTATE pVGAState, uint32_t fFlags);
600
601/* @return host-guest flags that were set on reset
602 * this allows the caller to make further cleaning when needed,
603 * e.g. reset the IRQ */
604uint32_t HGSMIReset (PHGSMIINSTANCE pIns);
605
606# ifdef VBOX_WITH_VIDEOHWACCEL
607int vbvaVHWACommandCompleteAsynch(PPDMIDISPLAYVBVACALLBACKS pInterface, PVBOXVHWACMD pCmd);
608int vbvaVHWAConstruct (PVGASTATE pVGAState);
609int vbvaVHWAReset (PVGASTATE pVGAState);
610
611void vbvaTimerCb(PVGASTATE pVGAState);
612
613int vboxVBVASaveStatePrep (PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
614int vboxVBVASaveStateDone (PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
615# endif
616
617#ifdef VBOX_WITH_HGSMI
618#define PPDMIDISPLAYVBVACALLBACKS_2_PVGASTATE(_pcb) ( (PVGASTATE)((uint8_t *)(_pcb) - RT_OFFSETOF(VGASTATE, IVBVACallbacks)) )
619#endif
620
621# ifdef VBOX_WITH_CRHGSMI
622int vboxVDMACrHgsmiCommandCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface, PVBOXVDMACMD_CHROMIUM_CMD pCmd, int rc);
623int vboxVDMACrHgsmiControlCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface, PVBOXVDMACMD_CHROMIUM_CTL pCmd, int rc);
624# endif
625int vboxCmdVBVACmdHostCtl(PPDMIDISPLAYVBVACALLBACKS pInterface,
626 struct VBOXCRCMDCTL* pCmd, uint32_t cbCmd,
627 PFNCRCTLCOMPLETION pfnCompletion,
628 void *pvCompletion);
629int vboxCmdVBVACmdHostCtlSync(PPDMIDISPLAYVBVACALLBACKS pInterface,
630 struct VBOXCRCMDCTL* pCmd, uint32_t cbCmd);
631
632int vboxVBVASaveStateExec (PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
633int vboxVBVALoadStateExec (PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t u32Version);
634int vboxVBVALoadStateDone (PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
635
636# ifdef VBOX_WITH_VDMA
637typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
638int vboxVDMAConstruct(PVGASTATE pVGAState, uint32_t cPipeElements);
639int vboxVDMADestruct(PVBOXVDMAHOST pVdma);
640int vboxVDMAReset(PVBOXVDMAHOST pVdma);
641void vboxVDMAControl(PVBOXVDMAHOST pVdma, PVBOXVDMA_CTL pCmd, uint32_t cbCmd);
642void vboxVDMACommand(PVBOXVDMAHOST pVdma, PVBOXVDMACBUF_DR pCmd, uint32_t cbCmd);
643int vboxVDMASaveStateExecPrep(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM);
644int vboxVDMASaveStateExecDone(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM);
645# endif /* VBOX_WITH_VDMA */
646
647int vboxCmdVBVACmdSubmit(PVGASTATE pVGAState);
648int vboxCmdVBVACmdFlush(PVGASTATE pVGAState);
649void vboxCmdVBVACmdTimer(PVGASTATE pVGAState);
650int vboxCmdVBVACmdCtl(PVGASTATE pVGAState, VBOXCMDVBVA_CTL *pCtl, uint32_t cbCtl);
651
652#endif /* VBOX_WITH_HGSMI */
653
654# ifdef VBOX_WITH_VMSVGA
655int vgaR3RegisterVRAMHandler(PVGASTATE pVGAState, uint64_t cbFrameBuffer);
656int vgaR3UnregisterVRAMHandler(PVGASTATE pVGAState);
657int vgaR3UpdateDisplay(PVGASTATE pVGAState, unsigned xStart, unsigned yStart, unsigned width, unsigned height);
658# endif
659
660#ifndef VBOX
661void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base,
662 unsigned long vga_ram_offset, int vga_ram_size);
663uint32_t vga_mem_readb(void *opaque, target_phys_addr_t addr);
664void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val);
665void vga_invalidate_scanlines(VGAState *s, int y1, int y2);
666
667void vga_draw_cursor_line_8(uint8_t *d1, const uint8_t *src1,
668 int poffset, int w,
669 unsigned int color0, unsigned int color1,
670 unsigned int color_xor);
671void vga_draw_cursor_line_16(uint8_t *d1, const uint8_t *src1,
672 int poffset, int w,
673 unsigned int color0, unsigned int color1,
674 unsigned int color_xor);
675void vga_draw_cursor_line_32(uint8_t *d1, const uint8_t *src1,
676 int poffset, int w,
677 unsigned int color0, unsigned int color1,
678 unsigned int color_xor);
679
680extern const uint8_t sr_mask[8];
681extern const uint8_t gr_mask[16];
682#endif /* !VBOX */
683
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