VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA.h@ 53729

Last change on this file since 53729 was 53532, checked in by vboxsync, 10 years ago

Devices/Graphics, Devices/PC/DevACPI, Main: add support for sending video mode hints through the VGA device, device structure alignment.
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  • Property svn:keywords set to Author Date Id Revision
File size: 29.5 KB
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1/* $Id: DevVGA.h 53532 2014-12-12 21:18:23Z vboxsync $ */
2/** @file
3 * DevVGA - VBox VGA/VESA device, internal header.
4 */
5
6/*
7 * Copyright (C) 2006-2013 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 * --------------------------------------------------------------------
17 *
18 * This code is based on:
19 *
20 * QEMU internal VGA defines.
21 *
22 * Copyright (c) 2003-2004 Fabrice Bellard
23 *
24 * Permission is hereby granted, free of charge, to any person obtaining a copy
25 * of this software and associated documentation files (the "Software"), to deal
26 * in the Software without restriction, including without limitation the rights
27 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
28 * copies of the Software, and to permit persons to whom the Software is
29 * furnished to do so, subject to the following conditions:
30 *
31 * The above copyright notice and this permission notice shall be included in
32 * all copies or substantial portions of the Software.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
37 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
38 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
39 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
40 * THE SOFTWARE.
41 */
42
43/** Use VBE bytewise I/O. Only needed for Windows Longhorn/Vista betas and backwards compatibility. */
44#define VBE_BYTEWISE_IO
45
46/** Use VBE new dynamic mode list.
47 * If this is not defined, no checks are carried out to see if the modes all
48 * fit into the framebuffer! See the VRAM_SIZE_FIX define. */
49#define VBE_NEW_DYN_LIST
50
51#ifdef VBOX
52/** The default amount of VRAM. */
53# define VGA_VRAM_DEFAULT (_4M)
54/** The maximum amount of VRAM. Limited by VBOX_MAX_ALLOC_PAGE_COUNT. */
55# define VGA_VRAM_MAX (256 * _1M)
56/** The minimum amount of VRAM. */
57# define VGA_VRAM_MIN (_1M)
58#endif
59
60#include <VBox/Hardware/VBoxVideoVBE.h>
61
62#ifdef VBOX_WITH_HGSMI
63# include "HGSMI/HGSMIHost.h"
64#endif /* VBOX_WITH_HGSMI */
65#include "DevVGASavedState.h"
66
67#ifdef VBOX_WITH_VMSVGA
68# include "DevVGA-SVGA.h"
69#endif
70
71# include <iprt/list.h>
72
73#define MSR_COLOR_EMULATION 0x01
74#define MSR_PAGE_SELECT 0x20
75
76#define ST01_V_RETRACE 0x08
77#define ST01_DISP_ENABLE 0x01
78
79/* bochs VBE support */
80#define CONFIG_BOCHS_VBE
81
82#ifdef CONFIG_BOCHS_VBE
83
84/* Cross reference with <VBox/Hardware/VBoxVideoVBE.h> */
85#define VBE_DISPI_INDEX_NB_SAVED 0xb /* Number of saved registers (vbe_regs array) */
86#define VBE_DISPI_INDEX_NB 0xc /* Total number of VBE registers */
87
88#define VGA_STATE_COMMON_BOCHS_VBE \
89 uint16_t vbe_index; \
90 uint16_t vbe_regs[VBE_DISPI_INDEX_NB]; \
91 uint16_t alignment[3]; /* pad to 64 bits */ \
92 uint32_t vbe_start_addr; \
93 uint32_t vbe_line_offset; \
94 uint32_t vbe_bank_max;
95
96#else
97
98#define VGA_STATE_COMMON_BOCHS_VBE
99
100#endif /* !CONFIG_BOCHS_VBE */
101
102#define CH_ATTR_SIZE (160 * 100)
103#define VGA_MAX_HEIGHT VBE_DISPI_MAX_YRES
104
105typedef struct vga_retrace_s {
106 unsigned frame_cclks; /* Character clocks per frame. */
107 unsigned frame_ns; /* Frame duration in ns. */
108 unsigned cclk_ns; /* Character clock duration in ns. */
109 unsigned vb_start; /* Vertical blanking start (scanline). */
110 unsigned vb_end; /* Vertical blanking end (scanline). */
111 unsigned vb_end_ns; /* Vertical blanking end time (length) in ns. */
112 unsigned vs_start; /* Vertical sync start (scanline). */
113 unsigned vs_end; /* Vertical sync end (scanline). */
114 unsigned vs_start_ns; /* Vertical sync start time in ns. */
115 unsigned vs_end_ns; /* Vertical sync end time in ns. */
116 unsigned h_total; /* Horizontal total (cclks per scanline). */
117 unsigned h_total_ns; /* Scanline duration in ns. */
118 unsigned hb_start; /* Horizontal blanking start (cclk). */
119 unsigned hb_end; /* Horizontal blanking end (cclk). */
120 unsigned hb_end_ns; /* Horizontal blanking end time (length) in ns. */
121 unsigned v_freq_hz; /* Vertical refresh rate to emulate. */
122} vga_retrace_s;
123
124#ifndef VBOX
125#define VGA_STATE_COMMON \
126 uint8_t *vram_ptr; \
127 unsigned long vram_offset; \
128 unsigned int vram_size; \
129 uint32_t latch; \
130 uint8_t sr_index; \
131 uint8_t sr[256]; \
132 uint8_t gr_index; \
133 uint8_t gr[256]; \
134 uint8_t ar_index; \
135 uint8_t ar[21]; \
136 int ar_flip_flop; \
137 uint8_t cr_index; \
138 uint8_t cr[256]; /* CRT registers */ \
139 uint8_t msr; /* Misc Output Register */ \
140 uint8_t fcr; /* Feature Control Register */ \
141 uint8_t st00; /* status 0 */ \
142 uint8_t st01; /* status 1 */ \
143 uint8_t dac_state; \
144 uint8_t dac_sub_index; \
145 uint8_t dac_read_index; \
146 uint8_t dac_write_index; \
147 uint8_t dac_cache[3]; /* used when writing */ \
148 uint8_t palette[768]; \
149 int32_t bank_offset; \
150 int (*get_bpp)(struct VGAState *s); \
151 void (*get_offsets)(struct VGAState *s, \
152 uint32_t *pline_offset, \
153 uint32_t *pstart_addr, \
154 uint32_t *pline_compare); \
155 void (*get_resolution)(struct VGAState *s, \
156 int *pwidth, \
157 int *pheight); \
158 VGA_STATE_COMMON_BOCHS_VBE \
159 /* display refresh support */ \
160 DisplayState *ds; \
161 uint32_t font_offsets[2]; \
162 int graphic_mode; \
163 uint8_t shift_control; \
164 uint8_t double_scan; \
165 uint32_t line_offset; \
166 uint32_t line_compare; \
167 uint32_t start_addr; \
168 uint32_t plane_updated; \
169 uint8_t last_cw, last_ch; \
170 uint32_t last_width, last_height; /* in chars or pixels */ \
171 uint32_t last_scr_width, last_scr_height; /* in pixels */ \
172 uint8_t cursor_start, cursor_end; \
173 uint32_t cursor_offset; \
174 unsigned int (*rgb_to_pixel)(unsigned int r, \
175 unsigned int g, unsigned b); \
176 /* hardware mouse cursor support */ \
177 uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32]; \
178 void (*cursor_invalidate)(struct VGAState *s); \
179 void (*cursor_draw_line)(struct VGAState *s, uint8_t *d, int y); \
180 /* tell for each page if it has been updated since the last time */ \
181 uint32_t last_palette[256]; \
182 uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
183
184#else /* VBOX */
185
186/* bird: Since we've changed types, reordered members, done alignment
187 paddings and more, VGA_STATE_COMMON was added directly to the
188 struct to make it more readable and easier to handle. */
189
190struct VGAState;
191typedef int FNGETBPP(struct VGAState *s);
192typedef void FNGETOFFSETS(struct VGAState *s, uint32_t *pline_offset, uint32_t *pstart_addr, uint32_t *pline_compare);
193typedef void FNGETRESOLUTION(struct VGAState *s, int *pwidth, int *pheight);
194typedef unsigned int FNRGBTOPIXEL(unsigned int r, unsigned int g, unsigned b);
195typedef void FNCURSORINVALIDATE(struct VGAState *s);
196typedef void FNCURSORDRAWLINE(struct VGAState *s, uint8_t *d, int y);
197
198#endif /* VBOX */
199
200#ifdef VBOX_WITH_VDMA
201typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
202#endif
203
204#ifdef VBOX_WITH_VIDEOHWACCEL
205#define VBOX_VHWA_MAX_PENDING_COMMANDS 1000
206
207typedef struct _VBOX_VHWA_PENDINGCMD
208{
209 RTLISTNODE Node;
210 PVBOXVHWACMD pCommand;
211} VBOX_VHWA_PENDINGCMD;
212#endif
213
214#ifdef VBOX_WITH_VMSVGA
215
216#define VMSVGA_FIFO_EXTCMD_NONE 0
217#define VMSVGA_FIFO_EXTCMD_TERMINATE 1
218#define VMSVGA_FIFO_EXTCMD_SAVESTATE 2
219#define VMSVGA_FIFO_EXTCMD_LOADSTATE 3
220#define VMSVGA_FIFO_EXTCMD_RESET 4
221
222typedef struct
223{
224 PSSMHANDLE pSSM;
225 uint32_t uVersion;
226 uint32_t uPass;
227} VMSVGA_STATE_LOAD, *PVMSVGA_STATE_LOAD;
228
229typedef struct
230{
231 /** The host window handle */
232 uint64_t u64HostWindowId;
233 /** The R3 FIFO pointer. */
234 R3PTRTYPE(uint32_t *) pFIFOR3;
235 /** The R0 FIFO pointer. */
236 R0PTRTYPE(uint32_t *) pFIFOR0;
237 /** R3 Opaque pointer to svga state. */
238 R3PTRTYPE(void *) pSVGAState;
239 /** R3 Opaque pointer to 3d state. */
240 R3PTRTYPE(void *) p3dState;
241 /** R3 Opaque pointer to a copy of the first 32k of the framebuffer before switching into svga mode. */
242 R3PTRTYPE(void *) pFrameBufferBackup;
243 /** R3 Opaque pointer to an external fifo cmd parameter. */
244 R3PTRTYPE(void *) pFIFOExtCmdParam;
245
246 /** Guest physical address of the FIFO memory range. */
247 RTGCPHYS GCPhysFIFO;
248 /** Size in bytes of the FIFO memory range. */
249 uint32_t cbFIFO;
250 /** SVGA id. */
251 uint32_t u32SVGAId;
252 /** SVGA extensions enabled or not. */
253 uint32_t fEnabled;
254 /** SVGA memory area configured status. */
255 uint32_t fConfigured;
256 /** Device is busy handling FIFO requests. */
257 uint32_t fBusy;
258 /** Traces (dirty page detection) enabled or not. */
259 uint32_t fTraces;
260 /** Guest OS identifier. */
261 uint32_t u32GuestId;
262 /** Scratch region size. */
263 uint32_t cScratchRegion;
264 /** Scratch array. */
265 uint32_t au32ScratchRegion[VMSVGA_SCRATCH_SIZE];
266 /** Irq status. */
267 uint32_t u32IrqStatus;
268 /** Irq mask. */
269 uint32_t u32IrqMask;
270 /** Pitch lock. */
271 uint32_t u32PitchLock;
272 /** Current GMR id. (SVGA_REG_GMR_ID) */
273 uint32_t u32CurrentGMRId;
274 /** Register caps. */
275 uint32_t u32RegCaps;
276 uint32_t Padding2;
277 /** Physical address of command mmio range. */
278 RTIOPORT BasePort;
279 /** Port io index register. */
280 uint32_t u32IndexReg;
281 /** FIFO request semaphore. */
282 RTSEMEVENT FIFORequestSem;
283 /** FIFO external command semaphore. */
284 RTSEMEVENT FIFOExtCmdSem;
285 /** FIFO IO Thread. */
286 R3PTRTYPE(PPDMTHREAD) pFIFOIOThread;
287 uint32_t uWidth;
288 uint32_t uHeight;
289 uint32_t uBpp;
290 uint32_t cbScanline;
291 /** Maximum width supported. */
292 uint32_t u32MaxWidth;
293 /** Maximum height supported. */
294 uint32_t u32MaxHeight;
295 /** Viewport rectangle */
296 struct
297 {
298 uint32_t x;
299 uint32_t y;
300 uint32_t cx;
301 uint32_t cy;
302 } viewport;
303 /** Action flags */
304 uint32_t u32ActionFlags;
305 /** SVGA 3d extensions enabled or not. */
306 bool f3DEnabled;
307 /** VRAM page monitoring enabled or not. */
308 bool fVRAMTracking;
309 /** External command to be executed in the FIFO thread. */
310 uint8_t u8FIFOExtCommand;
311 bool Padding6[HC_ARCH_BITS == 64 ? 1 : 5];
312} VMSVGAState;
313#endif /* VBOX_WITH_VMSVGA */
314
315
316typedef struct VGAState {
317#ifndef VBOX
318 VGA_STATE_COMMON
319#else /* VBOX */
320 R3PTRTYPE(uint8_t *) vram_ptrR3;
321 R3PTRTYPE(FNGETBPP *) get_bpp;
322 R3PTRTYPE(FNGETOFFSETS *) get_offsets;
323 R3PTRTYPE(FNGETRESOLUTION *) get_resolution;
324 R3PTRTYPE(FNRGBTOPIXEL *) rgb_to_pixel;
325 R3PTRTYPE(FNCURSORINVALIDATE *) cursor_invalidate;
326 R3PTRTYPE(FNCURSORDRAWLINE *) cursor_draw_line;
327 RTR3PTR R3PtrCmnAlignment;
328 uint32_t vram_size;
329 uint32_t latch;
330 uint8_t sr_index;
331 uint8_t sr[256];
332 uint8_t gr_index;
333 uint8_t gr[256];
334 uint8_t ar_index;
335 uint8_t ar[21];
336 int32_t ar_flip_flop;
337 uint8_t cr_index;
338 uint8_t cr[256]; /* CRT registers */
339 uint8_t msr; /* Misc Output Register */
340 uint8_t fcr; /* Feature Control Register */
341 uint8_t st00; /* status 0 */
342 uint8_t st01; /* status 1 */
343 uint8_t dac_state;
344 uint8_t dac_sub_index;
345 uint8_t dac_read_index;
346 uint8_t dac_write_index;
347 uint8_t dac_cache[3]; /* used when writing */
348 uint8_t palette[768];
349 int32_t bank_offset;
350 VGA_STATE_COMMON_BOCHS_VBE
351 /* display refresh support */
352 uint32_t font_offsets[2];
353 int32_t graphic_mode;
354 uint8_t shift_control;
355 uint8_t double_scan;
356 uint8_t padding1[2];
357 uint32_t line_offset;
358 uint32_t line_compare;
359 uint32_t start_addr;
360 uint32_t plane_updated;
361 uint8_t last_cw, last_ch, padding2[2];
362 uint32_t last_width, last_height; /* in chars or pixels */
363 uint32_t last_scr_width, last_scr_height; /* in pixels */
364 uint32_t last_bpp;
365 uint8_t cursor_start, cursor_end, padding3[2];
366 uint32_t cursor_offset;
367 /* hardware mouse cursor support */
368 uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32];
369 /* tell for each page if it has been updated since the last time */
370 uint32_t last_palette[256];
371 uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
372
373 /** end-of-common-state-marker */
374 uint32_t u32Marker;
375
376 /** Pointer to the device instance - RC Ptr. */
377 PPDMDEVINSRC pDevInsRC;
378 /** Pointer to the GC vram mapping. */
379 RCPTRTYPE(uint8_t *) vram_ptrRC;
380 uint32_t PaddingMinus1;
381
382 /** Pointer to the device instance - R3 Ptr. */
383 PPDMDEVINSR3 pDevInsR3;
384# ifdef VBOX_WITH_HGSMI
385 R3PTRTYPE(PHGSMIINSTANCE) pHGSMI;
386# endif
387# ifdef VBOX_WITH_VDMA
388 R3PTRTYPE(PVBOXVDMAHOST) pVdma;
389# endif
390 /** LUN\#0: The display port base interface. */
391 PDMIBASE IBase;
392 /** LUN\#0: The display port interface. */
393 PDMIDISPLAYPORT IPort;
394# if defined(VBOX_WITH_HGSMI) && (defined(VBOX_WITH_VIDEOHWACCEL) || defined(VBOX_WITH_CRHGSMI))
395 /** LUN\#0: VBVA callbacks interface */
396 PDMIDISPLAYVBVACALLBACKS IVBVACallbacks;
397# endif
398 /** Status LUN\#0: Leds interface. */
399 PDMILEDPORTS ILeds;
400
401 /** Pointer to base interface of the driver. */
402 R3PTRTYPE(PPDMIBASE) pDrvBase;
403 /** Pointer to display connector interface of the driver. */
404 R3PTRTYPE(PPDMIDISPLAYCONNECTOR) pDrv;
405
406 /** Status LUN: Partner of ILeds. */
407 R3PTRTYPE(PPDMILEDCONNECTORS) pLedsConnector;
408 /** Status LUN: Media Notifys. */
409 R3PTRTYPE(PPDMIMEDIANOTIFY) pMediaNotify;
410
411 /** Refresh timer handle - HC. */
412 PTMTIMERR3 RefreshTimer;
413
414 /** Pointer to the device instance - R0 Ptr. */
415 PPDMDEVINSR0 pDevInsR0;
416 /** The R0 vram pointer... */
417 R0PTRTYPE(uint8_t *) vram_ptrR0;
418
419#ifdef VBOX_WITH_VMSVGA
420# if HC_ARCH_BITS == 32
421 uint32_t Padding3;
422# endif
423 VMSVGAState svga;
424#endif
425
426 /** The number of monitors. */
427 uint32_t cMonitors;
428 /** Current refresh timer interval. */
429 uint32_t cMilliesRefreshInterval;
430 /** Bitmap tracking dirty pages. */
431 uint32_t au32DirtyBitmap[VGA_VRAM_MAX / PAGE_SIZE / 32];
432
433 /** Flag indicating that there are dirty bits. This is used to optimize the handler resetting. */
434 bool fHasDirtyBits;
435 /** LFB was updated flag. */
436 bool fLFBUpdated;
437 /** Indicates if the GC extensions are enabled or not. */
438 bool fGCEnabled;
439 /** Indicates if the R0 extensions are enabled or not. */
440 bool fR0Enabled;
441 /** Flag indicating that the VGA memory in the 0xa0000-0xbffff region has been remapped to allow direct access. */
442 bool fRemappedVGA;
443 /** Whether to render the guest VRAM to the framebuffer memory. False only for some LFB modes. */
444 bool fRenderVRAM;
445#ifdef VBOX_WITH_VMSVGA
446 /* Whether the SVGA emulation is enabled or not. */
447 bool fVMSVGAEnabled;
448 bool Padding1[1];
449#else
450 bool Padding1[2];
451#endif
452
453 /** The physical address the VRAM was assigned. */
454 RTGCPHYS GCPhysVRAM;
455 /** The critical section protect the instance data. */
456 PDMCRITSECT CritSect;
457 /** The PCI device. */
458 PCIDEVICE Dev;
459
460 STAMPROFILE StatRZMemoryRead;
461 STAMPROFILE StatR3MemoryRead;
462 STAMPROFILE StatRZMemoryWrite;
463 STAMPROFILE StatR3MemoryWrite;
464 STAMCOUNTER StatMapPage; /**< Counts IOMMMIOMapMMIO2Page calls. */
465 STAMCOUNTER StatUpdateDisp; /**< Counts vgaPortUpdateDisplay calls. */
466
467 /* Keep track of ring 0 latched accesses to the VGA MMIO memory. */
468 uint64_t u64LastLatchedAccess;
469 uint32_t cLatchAccesses;
470 uint16_t uMaskLatchAccess;
471 uint16_t iMask;
472
473# ifdef VBE_BYTEWISE_IO
474 /** VBE read/write data/index flags */
475 uint8_t fReadVBEData;
476 uint8_t fWriteVBEData;
477 uint8_t fReadVBEIndex;
478 uint8_t fWriteVBEIndex;
479 /** VBE write data/index one byte buffer */
480 uint8_t cbWriteVBEData;
481 uint8_t cbWriteVBEIndex;
482# ifdef VBE_NEW_DYN_LIST
483 /** VBE Extra Data write address one byte buffer */
484 uint8_t cbWriteVBEExtraAddress;
485 uint8_t Padding5;
486# else
487 uint8_t Padding5[2];
488# endif
489# endif
490
491 /** Retrace emulation state */
492 bool fRealRetrace;
493 bool Padding6[HC_ARCH_BITS == 64 ? 7 : 3];
494 vga_retrace_s retrace_state;
495
496# ifdef VBE_NEW_DYN_LIST
497 /** The VBE BIOS extra data. */
498 R3PTRTYPE(uint8_t *) pu8VBEExtraData;
499 /** The size of the VBE BIOS extra data. */
500 uint16_t cbVBEExtraData;
501 /** The VBE BIOS current memory address. */
502 uint16_t u16VBEExtraAddress;
503 uint16_t Padding7[2];
504# endif
505
506 /** The BIOS logo data. */
507 R3PTRTYPE(uint8_t *) pu8Logo;
508 /** The name of the logo file. */
509 R3PTRTYPE(char *) pszLogoFile;
510 /** Bitmap image data. */
511 R3PTRTYPE(uint8_t *) pu8LogoBitmap;
512 /** Current logo data offset. */
513 uint32_t offLogoData;
514 /** The size of the BIOS logo data. */
515 uint32_t cbLogo;
516 /** Current logo command. */
517 uint16_t LogoCommand;
518 /** Bitmap width. */
519 uint16_t cxLogo;
520 /** Bitmap height. */
521 uint16_t cyLogo;
522 /** Bitmap planes. */
523 uint16_t cLogoPlanes;
524 /** Bitmap depth. */
525 uint16_t cLogoBits;
526 /** Bitmap compression. */
527 uint16_t LogoCompression;
528 /** Bitmap colors used. */
529 uint16_t cLogoUsedColors;
530 /** Palette size. */
531 uint16_t cLogoPalEntries;
532 /** Clear screen flag. */
533 uint8_t fLogoClearScreen;
534 uint8_t Padding8[7];
535 /** Palette data. */
536 uint32_t au32LogoPalette[256];
537
538 /** The VGA BIOS ROM data. */
539 R3PTRTYPE(uint8_t *) pu8VgaBios;
540 /** The size of the VGA BIOS ROM. */
541 uint64_t cbVgaBios;
542 /** The name of the VGA BIOS ROM file. */
543 R3PTRTYPE(char *) pszVgaBiosFile;
544
545# ifdef VBOX_WITH_HGSMI
546 /** Base port in the assigned PCI I/O space. */
547 RTIOPORT IOPortBase;
548# ifdef VBOX_WITH_WDDM
549 uint8_t Padding9[2];
550 /** Specifies guest driver caps, i.e. whether it can handle IRQs from the
551 * adapter, the way it can handle async HGSMI command completion, etc. */
552 uint32_t fGuestCaps;
553 uint32_t fScanLineCfg;
554 uint8_t Padding10[4];
555# else
556 uint8_t Padding10[14];
557# endif
558# endif /* VBOX_WITH_HGSMI */
559
560 PDMLED Led3D;
561
562 struct {
563 volatile uint32_t cPending;
564 uint32_t Padding1;
565 union
566 {
567 RTLISTNODE PendingList;
568 /* make sure the structure sized cross different contexts correctly */
569 struct
570 {
571 R3PTRTYPE(void *) dummy1;
572 R3PTRTYPE(void *) dummy2;
573 } dummy;
574 };
575 } pendingVhwaCommands;
576#endif /* VBOX */
577} VGAState;
578#ifdef VBOX
579/** VGA state. */
580typedef VGAState VGASTATE;
581/** Pointer to the VGA state. */
582typedef VGASTATE *PVGASTATE;
583AssertCompileMemberAlignment(VGASTATE, bank_offset, 8);
584AssertCompileMemberAlignment(VGASTATE, font_offsets, 8);
585AssertCompileMemberAlignment(VGASTATE, last_ch_attr, 8);
586AssertCompileMemberAlignment(VGASTATE, u32Marker, 8);
587#endif
588
589#ifdef VBE_NEW_DYN_LIST
590/**
591 * VBE Bios Extra Data structure.
592 * @remark duplicated in vbe.h.
593 */
594typedef struct VBEHeader
595{
596 /** Signature (VBEHEADER_MAGIC). */
597 uint16_t u16Signature;
598 /** Data size. */
599 uint16_t cbData;
600} VBEHeader;
601
602/** VBE Extra Data. */
603typedef VBEHeader VBEHEADER;
604/** Pointer to the VBE Extra Data. */
605typedef VBEHEADER *PVBEHEADER;
606
607/** The value of the VBEHEADER::u16Signature field.
608 * @remark duplicated in vbe.h. */
609#define VBEHEADER_MAGIC 0x77CC
610
611/** The extra port which is used to read the mode list.
612 * @remark duplicated in vbe.h. */
613#define VBE_EXTRA_PORT 0x3b6
614
615/** The extra port which is used for debug printf.
616 * @remark duplicated in vbe.h. */
617#define VBE_PRINTF_PORT 0x3b7
618
619#endif /* VBE_NEW_DYN_LIST */
620
621#if !defined(VBOX) || defined(IN_RING3)
622static inline int c6_to_8(int v)
623{
624 int b;
625 v &= 0x3f;
626 b = v & 1;
627 return (v << 2) | (b << 1) | b;
628}
629#endif /* !VBOX || IN_RING3 */
630
631
632#ifdef VBOX_WITH_HGSMI
633int VBVAInit (PVGASTATE pVGAState);
634void VBVADestroy (PVGASTATE pVGAState);
635int VBVAUpdateDisplay (PVGASTATE pVGAState);
636void VBVAReset (PVGASTATE pVGAState);
637void VBVAPause (PVGASTATE pVGAState, bool fPause);
638
639bool VBVAIsEnabled(PVGASTATE pVGAState);
640
641void VBVARaiseIrq (PVGASTATE pVGAState, uint32_t fFlags);
642void VBVARaiseIrqNoWait(PVGASTATE pVGAState, uint32_t fFlags);
643
644int VBVAInfoView(PVGASTATE pVGAState, VBVAINFOVIEW *pView);
645int VBVAInfoScreen(PVGASTATE pVGAState, VBVAINFOSCREEN *pScreen);
646int VBVAGetInfoViewAndScreen(PVGASTATE pVGAState, uint32_t u32ViewIndex, VBVAINFOVIEW *pView, VBVAINFOSCREEN *pScreen);
647
648/* @return host-guest flags that were set on reset
649 * this allows the caller to make further cleaning when needed,
650 * e.g. reset the IRQ */
651uint32_t HGSMIReset (PHGSMIINSTANCE pIns);
652
653# ifdef VBOX_WITH_VIDEOHWACCEL
654int vbvaVHWACommandCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface, PVBOXVHWACMD pCmd);
655int vbvaVHWAConstruct (PVGASTATE pVGAState);
656int vbvaVHWAReset (PVGASTATE pVGAState);
657
658void vbvaTimerCb(PVGASTATE pVGAState);
659
660int vboxVBVASaveStatePrep (PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
661int vboxVBVASaveStateDone (PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
662# endif
663
664#ifdef VBOX_WITH_HGSMI
665#define PPDMIDISPLAYVBVACALLBACKS_2_PVGASTATE(_pcb) ( (PVGASTATE)((uint8_t *)(_pcb) - RT_OFFSETOF(VGASTATE, IVBVACallbacks)) )
666#endif
667
668# ifdef VBOX_WITH_CRHGSMI
669int vboxVDMACrHgsmiCommandCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface, PVBOXVDMACMD_CHROMIUM_CMD pCmd, int rc);
670int vboxVDMACrHgsmiControlCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface, PVBOXVDMACMD_CHROMIUM_CTL pCmd, int rc);
671int vboxCmdVBVACmdHostCtl(PPDMIDISPLAYVBVACALLBACKS pInterface,
672 struct VBOXCRCMDCTL* pCmd, uint32_t cbCmd,
673 PFNCRCTLCOMPLETION pfnCompletion,
674 void *pvCompletion);
675int vboxCmdVBVACmdHostCtlSync(PPDMIDISPLAYVBVACALLBACKS pInterface,
676 struct VBOXCRCMDCTL* pCmd, uint32_t cbCmd);
677# endif
678
679int vboxVBVASaveStateExec (PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
680int vboxVBVALoadStateExec (PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t u32Version);
681int vboxVBVALoadStateDone (PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
682
683DECLCALLBACK(int) vgaUpdateDisplayAll(PVGASTATE pThis, bool fFailOnResize);
684DECLCALLBACK(int) vbvaPortSendModeHint(PPDMIDISPLAYPORT pInterface, uint32_t cx,
685 uint32_t cy, uint32_t cBPP,
686 uint32_t cDisplay, uint32_t dx,
687 uint32_t dy, uint32_t fEnabled,
688 uint32_t fNotifyGuest);
689
690# ifdef VBOX_WITH_VDMA
691typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
692int vboxVDMAConstruct(PVGASTATE pVGAState, uint32_t cPipeElements);
693int vboxVDMADestruct(PVBOXVDMAHOST pVdma);
694int vboxVDMAReset(PVBOXVDMAHOST pVdma);
695void vboxVDMAControl(PVBOXVDMAHOST pVdma, PVBOXVDMA_CTL pCmd, uint32_t cbCmd);
696void vboxVDMACommand(PVBOXVDMAHOST pVdma, PVBOXVDMACBUF_DR pCmd, uint32_t cbCmd);
697int vboxVDMASaveStateExecPrep(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM);
698int vboxVDMASaveStateExecDone(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM);
699int vboxVDMASaveStateExecPerform(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM);
700int vboxVDMASaveLoadExecPerform(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM, uint32_t u32Version);
701int vboxVDMASaveLoadDone(struct VBOXVDMAHOST *pVdma);
702# endif /* VBOX_WITH_VDMA */
703
704# ifdef VBOX_WITH_CRHGSMI
705int vboxCmdVBVACmdSubmit(PVGASTATE pVGAState);
706int vboxCmdVBVACmdFlush(PVGASTATE pVGAState);
707void vboxCmdVBVACmdTimer(PVGASTATE pVGAState);
708int vboxCmdVBVACmdCtl(PVGASTATE pVGAState, VBOXCMDVBVA_CTL *pCtl, uint32_t cbCtl);
709bool vboxCmdVBVAIsEnabled(PVGASTATE pVGAState);
710# endif /* VBOX_WITH_CRHGSMI */
711#endif /* VBOX_WITH_HGSMI */
712
713# ifdef VBOX_WITH_VMSVGA
714int vgaR3RegisterVRAMHandler(PVGASTATE pVGAState, uint64_t cbFrameBuffer);
715int vgaR3UnregisterVRAMHandler(PVGASTATE pVGAState);
716int vgaR3UpdateDisplay(PVGASTATE pVGAState, unsigned xStart, unsigned yStart, unsigned width, unsigned height);
717# endif
718
719#ifndef VBOX
720void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base,
721 unsigned long vga_ram_offset, int vga_ram_size);
722uint32_t vga_mem_readb(void *opaque, target_phys_addr_t addr);
723void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val);
724void vga_invalidate_scanlines(VGAState *s, int y1, int y2);
725
726void vga_draw_cursor_line_8(uint8_t *d1, const uint8_t *src1,
727 int poffset, int w,
728 unsigned int color0, unsigned int color1,
729 unsigned int color_xor);
730void vga_draw_cursor_line_16(uint8_t *d1, const uint8_t *src1,
731 int poffset, int w,
732 unsigned int color0, unsigned int color1,
733 unsigned int color_xor);
734void vga_draw_cursor_line_32(uint8_t *d1, const uint8_t *src1,
735 int poffset, int w,
736 unsigned int color0, unsigned int color1,
737 unsigned int color_xor);
738
739extern const uint8_t sr_mask[8];
740extern const uint8_t gr_mask[16];
741#endif /* !VBOX */
742
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