VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA.h@ 57041

Last change on this file since 57041 was 57011, checked in by vboxsync, 9 years ago

vmsvga: Combined the external FIFO command submission into one function and make sure we only execute the external command when we temporarily resume the FIFO thread.
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File size: 31.0 KB
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1/* $Id: DevVGA.h 57011 2015-07-19 23:42:32Z vboxsync $ */
2/** @file
3 * DevVGA - VBox VGA/VESA device, internal header.
4 */
5
6/*
7 * Copyright (C) 2006-2015 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 * --------------------------------------------------------------------
17 *
18 * This code is based on:
19 *
20 * QEMU internal VGA defines.
21 *
22 * Copyright (c) 2003-2004 Fabrice Bellard
23 *
24 * Permission is hereby granted, free of charge, to any person obtaining a copy
25 * of this software and associated documentation files (the "Software"), to deal
26 * in the Software without restriction, including without limitation the rights
27 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
28 * copies of the Software, and to permit persons to whom the Software is
29 * furnished to do so, subject to the following conditions:
30 *
31 * The above copyright notice and this permission notice shall be included in
32 * all copies or substantial portions of the Software.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
37 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
38 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
39 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
40 * THE SOFTWARE.
41 */
42
43/** Use VBE bytewise I/O. Only needed for Windows Longhorn/Vista betas and backwards compatibility. */
44#define VBE_BYTEWISE_IO
45
46/** Use VBE new dynamic mode list.
47 * If this is not defined, no checks are carried out to see if the modes all
48 * fit into the framebuffer! See the VRAM_SIZE_FIX define. */
49#define VBE_NEW_DYN_LIST
50
51#ifdef VBOX
52/** The default amount of VRAM. */
53# define VGA_VRAM_DEFAULT (_4M)
54/** The maximum amount of VRAM. Limited by VBOX_MAX_ALLOC_PAGE_COUNT. */
55# define VGA_VRAM_MAX (256 * _1M)
56/** The minimum amount of VRAM. */
57# define VGA_VRAM_MIN (_1M)
58#endif
59
60#include <VBox/Hardware/VBoxVideoVBE.h>
61
62#ifdef VBOX_WITH_HGSMI
63# include "HGSMI/HGSMIHost.h"
64#endif /* VBOX_WITH_HGSMI */
65#include "DevVGASavedState.h"
66
67#ifdef VBOX_WITH_VMSVGA
68# include "DevVGA-SVGA.h"
69#endif
70
71# include <iprt/list.h>
72
73#define MSR_COLOR_EMULATION 0x01
74#define MSR_PAGE_SELECT 0x20
75
76#define ST01_V_RETRACE 0x08
77#define ST01_DISP_ENABLE 0x01
78
79/* bochs VBE support */
80#define CONFIG_BOCHS_VBE
81
82#ifdef CONFIG_BOCHS_VBE
83
84/* Cross reference with <VBox/Hardware/VBoxVideoVBE.h> */
85#define VBE_DISPI_INDEX_NB_SAVED 0xb /* Number of saved registers (vbe_regs array) */
86#define VBE_DISPI_INDEX_NB 0xc /* Total number of VBE registers */
87
88#define VGA_STATE_COMMON_BOCHS_VBE \
89 uint16_t vbe_index; \
90 uint16_t vbe_regs[VBE_DISPI_INDEX_NB]; \
91 uint16_t alignment[3]; /* pad to 64 bits */ \
92 uint32_t vbe_start_addr; \
93 uint32_t vbe_line_offset; \
94 uint32_t vbe_bank_max;
95
96#else
97
98#define VGA_STATE_COMMON_BOCHS_VBE
99
100#endif /* !CONFIG_BOCHS_VBE */
101
102#define CH_ATTR_SIZE (160 * 100)
103#define VGA_MAX_HEIGHT VBE_DISPI_MAX_YRES
104
105typedef struct vga_retrace_s {
106 unsigned frame_cclks; /* Character clocks per frame. */
107 unsigned frame_ns; /* Frame duration in ns. */
108 unsigned cclk_ns; /* Character clock duration in ns. */
109 unsigned vb_start; /* Vertical blanking start (scanline). */
110 unsigned vb_end; /* Vertical blanking end (scanline). */
111 unsigned vb_end_ns; /* Vertical blanking end time (length) in ns. */
112 unsigned vs_start; /* Vertical sync start (scanline). */
113 unsigned vs_end; /* Vertical sync end (scanline). */
114 unsigned vs_start_ns; /* Vertical sync start time in ns. */
115 unsigned vs_end_ns; /* Vertical sync end time in ns. */
116 unsigned h_total; /* Horizontal total (cclks per scanline). */
117 unsigned h_total_ns; /* Scanline duration in ns. */
118 unsigned hb_start; /* Horizontal blanking start (cclk). */
119 unsigned hb_end; /* Horizontal blanking end (cclk). */
120 unsigned hb_end_ns; /* Horizontal blanking end time (length) in ns. */
121 unsigned v_freq_hz; /* Vertical refresh rate to emulate. */
122} vga_retrace_s;
123
124#ifndef VBOX
125#define VGA_STATE_COMMON \
126 uint8_t *vram_ptr; \
127 unsigned long vram_offset; \
128 unsigned int vram_size; \
129 uint32_t latch; \
130 uint8_t sr_index; \
131 uint8_t sr[256]; \
132 uint8_t gr_index; \
133 uint8_t gr[256]; \
134 uint8_t ar_index; \
135 uint8_t ar[21]; \
136 int ar_flip_flop; \
137 uint8_t cr_index; \
138 uint8_t cr[256]; /* CRT registers */ \
139 uint8_t msr; /* Misc Output Register */ \
140 uint8_t fcr; /* Feature Control Register */ \
141 uint8_t st00; /* status 0 */ \
142 uint8_t st01; /* status 1 */ \
143 uint8_t dac_state; \
144 uint8_t dac_sub_index; \
145 uint8_t dac_read_index; \
146 uint8_t dac_write_index; \
147 uint8_t dac_cache[3]; /* used when writing */ \
148 uint8_t palette[768]; \
149 int32_t bank_offset; \
150 int (*get_bpp)(struct VGAState *s); \
151 void (*get_offsets)(struct VGAState *s, \
152 uint32_t *pline_offset, \
153 uint32_t *pstart_addr, \
154 uint32_t *pline_compare); \
155 void (*get_resolution)(struct VGAState *s, \
156 int *pwidth, \
157 int *pheight); \
158 VGA_STATE_COMMON_BOCHS_VBE \
159 /* display refresh support */ \
160 DisplayState *ds; \
161 uint32_t font_offsets[2]; \
162 int graphic_mode; \
163 uint8_t shift_control; \
164 uint8_t double_scan; \
165 uint32_t line_offset; \
166 uint32_t line_compare; \
167 uint32_t start_addr; \
168 uint32_t plane_updated; \
169 uint8_t last_cw, last_ch; \
170 uint32_t last_width, last_height; /* in chars or pixels */ \
171 uint32_t last_scr_width, last_scr_height; /* in pixels */ \
172 uint8_t cursor_start, cursor_end; \
173 uint32_t cursor_offset; \
174 unsigned int (*rgb_to_pixel)(unsigned int r, \
175 unsigned int g, unsigned b); \
176 /* hardware mouse cursor support */ \
177 uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32]; \
178 void (*cursor_invalidate)(struct VGAState *s); \
179 void (*cursor_draw_line)(struct VGAState *s, uint8_t *d, int y); \
180 /* tell for each page if it has been updated since the last time */ \
181 uint32_t last_palette[256]; \
182 uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
183
184#else /* VBOX */
185
186/* bird: Since we've changed types, reordered members, done alignment
187 paddings and more, VGA_STATE_COMMON was added directly to the
188 struct to make it more readable and easier to handle. */
189
190struct VGAState;
191typedef int FNGETBPP(struct VGAState *s);
192typedef void FNGETOFFSETS(struct VGAState *s, uint32_t *pline_offset, uint32_t *pstart_addr, uint32_t *pline_compare);
193typedef void FNGETRESOLUTION(struct VGAState *s, int *pwidth, int *pheight);
194typedef unsigned int FNRGBTOPIXEL(unsigned int r, unsigned int g, unsigned b);
195typedef void FNCURSORINVALIDATE(struct VGAState *s);
196typedef void FNCURSORDRAWLINE(struct VGAState *s, uint8_t *d, int y);
197
198#endif /* VBOX */
199
200#ifdef VBOX_WITH_VDMA
201typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
202#endif
203
204#ifdef VBOX_WITH_VIDEOHWACCEL
205#define VBOX_VHWA_MAX_PENDING_COMMANDS 1000
206
207typedef struct _VBOX_VHWA_PENDINGCMD
208{
209 RTLISTNODE Node;
210 PVBOXVHWACMD pCommand;
211} VBOX_VHWA_PENDINGCMD;
212#endif
213
214#ifdef VBOX_WITH_VMSVGA
215
216#define VMSVGA_FIFO_EXTCMD_NONE 0
217#define VMSVGA_FIFO_EXTCMD_TERMINATE 1
218#define VMSVGA_FIFO_EXTCMD_SAVESTATE 2
219#define VMSVGA_FIFO_EXTCMD_LOADSTATE 3
220#define VMSVGA_FIFO_EXTCMD_RESET 4
221
222/** Size of the region to backup when switching into svga mode. */
223#define VMSVGA_FRAMEBUFFER_BACKUP_SIZE (32*1024)
224
225typedef struct
226{
227 PSSMHANDLE pSSM;
228 uint32_t uVersion;
229 uint32_t uPass;
230} VMSVGA_STATE_LOAD, *PVMSVGA_STATE_LOAD;
231
232typedef struct
233{
234 /** The host window handle */
235 uint64_t u64HostWindowId;
236 /** The R3 FIFO pointer. */
237 R3PTRTYPE(uint32_t *) pFIFOR3;
238 /** The R0 FIFO pointer. */
239 R0PTRTYPE(uint32_t *) pFIFOR0;
240 /** R3 Opaque pointer to svga state. */
241 R3PTRTYPE(void *) pSVGAState;
242 /** R3 Opaque pointer to 3d state. */
243 R3PTRTYPE(void *) p3dState;
244 /** R3 Opaque pointer to a copy of the first 32k of the framebuffer before switching into svga mode. */
245 R3PTRTYPE(void *) pFrameBufferBackup;
246 /** R3 Opaque pointer to an external fifo cmd parameter. */
247 R3PTRTYPE(void * volatile) pvFIFOExtCmdParam;
248
249 /** Guest physical address of the FIFO memory range. */
250 RTGCPHYS GCPhysFIFO;
251 /** Size in bytes of the FIFO memory range. */
252 uint32_t cbFIFO;
253 /** SVGA id. */
254 uint32_t u32SVGAId;
255 /** SVGA extensions enabled or not. */
256 uint32_t fEnabled;
257 /** SVGA memory area configured status. */
258 uint32_t fConfigured;
259 /** Device is busy handling FIFO requests (VMSVGA_BUSY_F_FIFO,
260 * VMSVGA_BUSY_F_EMT_FORCE). */
261 uint32_t volatile fBusy;
262#define VMSVGA_BUSY_F_FIFO RT_BIT_32(0) /**< The normal true/false busy FIFO bit. */
263#define VMSVGA_BUSY_F_EMT_FORCE RT_BIT_32(1) /**< Bit preventing race status flickering when EMT kicks the FIFO thread. */
264 /** Traces (dirty page detection) enabled or not. */
265 uint32_t fTraces;
266 /** Guest OS identifier. */
267 uint32_t u32GuestId;
268 /** Scratch region size. */
269 uint32_t cScratchRegion;
270 /** Scratch array. */
271 uint32_t au32ScratchRegion[VMSVGA_SCRATCH_SIZE];
272 /** Irq status. */
273 uint32_t u32IrqStatus;
274 /** Irq mask. */
275 uint32_t u32IrqMask;
276 /** Pitch lock. */
277 uint32_t u32PitchLock;
278 /** Current GMR id. (SVGA_REG_GMR_ID) */
279 uint32_t u32CurrentGMRId;
280 /** Register caps. */
281 uint32_t u32RegCaps;
282 uint32_t Padding2;
283 /** Physical address of command mmio range. */
284 RTIOPORT BasePort;
285 /** Port io index register. */
286 uint32_t u32IndexReg;
287 /** The support driver session handle for use with FIFORequestSem. */
288 R3R0PTRTYPE(PSUPDRVSESSION) pSupDrvSession;
289 /** FIFO request semaphore. */
290 SUPSEMEVENT FIFORequestSem;
291 /** FIFO external command semaphore. */
292 R3PTRTYPE(RTSEMEVENT) FIFOExtCmdSem;
293 /** FIFO IO Thread. */
294 R3PTRTYPE(PPDMTHREAD) pFIFOIOThread;
295 uint32_t uWidth;
296 uint32_t uHeight;
297 uint32_t uBpp;
298 uint32_t cbScanline;
299 /** Maximum width supported. */
300 uint32_t u32MaxWidth;
301 /** Maximum height supported. */
302 uint32_t u32MaxHeight;
303 /** Viewport rectangle */
304 struct
305 {
306 uint32_t x;
307 uint32_t y;
308 uint32_t cx;
309 uint32_t cy;
310 } viewport;
311 /** Action flags */
312 uint32_t u32ActionFlags;
313 /** SVGA 3d extensions enabled or not. */
314 bool f3DEnabled;
315 /** VRAM page monitoring enabled or not. */
316 bool fVRAMTracking;
317 /** External command to be executed in the FIFO thread. */
318 uint8_t volatile u8FIFOExtCommand;
319 /** Set by vmsvgaR3RunExtCmdOnFifoThread when it temporarily resumes the FIFO
320 * thread and does not want it do anything but the command. */
321 bool volatile fFifoExtCommandWakeup;
322# if defined(DEBUG_GMR_ACCESS) || defined(DEBUG_FIFO_ACCESS)
323 /** GMR debug access handler type handle. */
324 PGMPHYSHANDLERTYPE hGmrAccessHandlerType;
325 /** FIFO debug access handler type handle. */
326 PGMPHYSHANDLERTYPE hFifoAccessHandlerType;
327# endif
328} VMSVGAState;
329#endif /* VBOX_WITH_VMSVGA */
330
331
332typedef struct VGAState {
333#ifndef VBOX
334 VGA_STATE_COMMON
335#else /* VBOX */
336 R3PTRTYPE(uint8_t *) vram_ptrR3;
337 R3PTRTYPE(FNGETBPP *) get_bpp;
338 R3PTRTYPE(FNGETOFFSETS *) get_offsets;
339 R3PTRTYPE(FNGETRESOLUTION *) get_resolution;
340 R3PTRTYPE(FNRGBTOPIXEL *) rgb_to_pixel;
341 R3PTRTYPE(FNCURSORINVALIDATE *) cursor_invalidate;
342 R3PTRTYPE(FNCURSORDRAWLINE *) cursor_draw_line;
343 RTR3PTR R3PtrCmnAlignment;
344 uint32_t vram_size;
345 uint32_t latch;
346 uint8_t sr_index;
347 uint8_t sr[256];
348 uint8_t gr_index;
349 uint8_t gr[256];
350 uint8_t ar_index;
351 uint8_t ar[21];
352 int32_t ar_flip_flop;
353 uint8_t cr_index;
354 uint8_t cr[256]; /* CRT registers */
355 uint8_t msr; /* Misc Output Register */
356 uint8_t fcr; /* Feature Control Register */
357 uint8_t st00; /* status 0 */
358 uint8_t st01; /* status 1 */
359 uint8_t dac_state;
360 uint8_t dac_sub_index;
361 uint8_t dac_read_index;
362 uint8_t dac_write_index;
363 uint8_t dac_cache[3]; /* used when writing */
364 uint8_t palette[768];
365 int32_t bank_offset;
366 VGA_STATE_COMMON_BOCHS_VBE
367 /* display refresh support */
368 uint32_t font_offsets[2];
369 int32_t graphic_mode;
370 uint8_t shift_control;
371 uint8_t double_scan;
372 uint8_t padding1[2];
373 uint32_t line_offset;
374 uint32_t line_compare;
375 uint32_t start_addr;
376 uint32_t plane_updated;
377 uint8_t last_cw, last_ch, padding2[2];
378 uint32_t last_width, last_height; /* in chars or pixels */
379 uint32_t last_scr_width, last_scr_height; /* in pixels */
380 uint32_t last_bpp;
381 uint8_t cursor_start, cursor_end, padding3[2];
382 uint32_t cursor_offset;
383 /* hardware mouse cursor support */
384 uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32];
385 /* tell for each page if it has been updated since the last time */
386 uint32_t last_palette[256];
387 uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
388
389 /** end-of-common-state-marker */
390 uint32_t u32Marker;
391
392 /** Pointer to the device instance - RC Ptr. */
393 PPDMDEVINSRC pDevInsRC;
394 /** Pointer to the GC vram mapping. */
395 RCPTRTYPE(uint8_t *) vram_ptrRC;
396 uint32_t PaddingMinus1;
397
398 /** Pointer to the device instance - R3 Ptr. */
399 PPDMDEVINSR3 pDevInsR3;
400# ifdef VBOX_WITH_HGSMI
401 R3PTRTYPE(PHGSMIINSTANCE) pHGSMI;
402# endif
403# ifdef VBOX_WITH_VDMA
404 R3PTRTYPE(PVBOXVDMAHOST) pVdma;
405# endif
406 /** LUN\#0: The display port base interface. */
407 PDMIBASE IBase;
408 /** LUN\#0: The display port interface. */
409 PDMIDISPLAYPORT IPort;
410# if defined(VBOX_WITH_HGSMI) && (defined(VBOX_WITH_VIDEOHWACCEL) || defined(VBOX_WITH_CRHGSMI))
411 /** LUN\#0: VBVA callbacks interface */
412 PDMIDISPLAYVBVACALLBACKS IVBVACallbacks;
413# else
414 RTR3PTR Padding2;
415# endif
416 /** Status LUN\#0: Leds interface. */
417 PDMILEDPORTS ILeds;
418
419 /** Pointer to base interface of the driver. */
420 R3PTRTYPE(PPDMIBASE) pDrvBase;
421 /** Pointer to display connector interface of the driver. */
422 R3PTRTYPE(PPDMIDISPLAYCONNECTOR) pDrv;
423
424 /** Status LUN: Partner of ILeds. */
425 R3PTRTYPE(PPDMILEDCONNECTORS) pLedsConnector;
426 /** Status LUN: Media Notifys. */
427 R3PTRTYPE(PPDMIMEDIANOTIFY) pMediaNotify;
428
429 /** Refresh timer handle - HC. */
430 PTMTIMERR3 RefreshTimer;
431
432 /** Pointer to the device instance - R0 Ptr. */
433 PPDMDEVINSR0 pDevInsR0;
434 /** The R0 vram pointer... */
435 R0PTRTYPE(uint8_t *) vram_ptrR0;
436
437#ifdef VBOX_WITH_VMSVGA
438# if HC_ARCH_BITS == 32
439 uint32_t Padding3;
440# endif
441 VMSVGAState svga;
442#endif
443
444 /** The number of monitors. */
445 uint32_t cMonitors;
446 /** Current refresh timer interval. */
447 uint32_t cMilliesRefreshInterval;
448 /** Bitmap tracking dirty pages. */
449 uint32_t au32DirtyBitmap[VGA_VRAM_MAX / PAGE_SIZE / 32];
450
451 /** Flag indicating that there are dirty bits. This is used to optimize the handler resetting. */
452 bool fHasDirtyBits;
453 /** LFB was updated flag. */
454 bool fLFBUpdated;
455 /** Indicates if the GC extensions are enabled or not. */
456 bool fGCEnabled;
457 /** Indicates if the R0 extensions are enabled or not. */
458 bool fR0Enabled;
459 /** Flag indicating that the VGA memory in the 0xa0000-0xbffff region has been remapped to allow direct access. */
460 bool fRemappedVGA;
461 /** Whether to render the guest VRAM to the framebuffer memory. False only for some LFB modes. */
462 bool fRenderVRAM;
463#ifdef VBOX_WITH_VMSVGA
464 /* Whether the SVGA emulation is enabled or not. */
465 bool fVMSVGAEnabled;
466 bool Padding1[1+4];
467#else
468 bool Padding1[2+4];
469#endif
470
471 /** Physical access type for the linear frame buffer dirty page tracking. */
472 PGMPHYSHANDLERTYPE hLfbAccessHandlerType;
473
474 /** The physical address the VRAM was assigned. */
475 RTGCPHYS GCPhysVRAM;
476 /** The critical section protect the instance data. */
477 PDMCRITSECT CritSect;
478 /** The PCI device. */
479 PCIDEVICE Dev;
480
481 STAMPROFILE StatRZMemoryRead;
482 STAMPROFILE StatR3MemoryRead;
483 STAMPROFILE StatRZMemoryWrite;
484 STAMPROFILE StatR3MemoryWrite;
485 STAMCOUNTER StatMapPage; /**< Counts IOMMMIOMapMMIO2Page calls. */
486 STAMCOUNTER StatUpdateDisp; /**< Counts vgaPortUpdateDisplay calls. */
487
488 /* Keep track of ring 0 latched accesses to the VGA MMIO memory. */
489 uint64_t u64LastLatchedAccess;
490 uint32_t cLatchAccesses;
491 uint16_t uMaskLatchAccess;
492 uint16_t iMask;
493
494# ifdef VBE_BYTEWISE_IO
495 /** VBE read/write data/index flags */
496 uint8_t fReadVBEData;
497 uint8_t fWriteVBEData;
498 uint8_t fReadVBEIndex;
499 uint8_t fWriteVBEIndex;
500 /** VBE write data/index one byte buffer */
501 uint8_t cbWriteVBEData;
502 uint8_t cbWriteVBEIndex;
503# ifdef VBE_NEW_DYN_LIST
504 /** VBE Extra Data write address one byte buffer */
505 uint8_t cbWriteVBEExtraAddress;
506 uint8_t Padding5;
507# else
508 uint8_t Padding5[2];
509# endif
510# endif
511
512 /** Retrace emulation state */
513 bool fRealRetrace;
514 bool Padding6[HC_ARCH_BITS == 64 ? 7 : 3];
515 vga_retrace_s retrace_state;
516
517# ifdef VBE_NEW_DYN_LIST
518 /** The VBE BIOS extra data. */
519 R3PTRTYPE(uint8_t *) pu8VBEExtraData;
520 /** The size of the VBE BIOS extra data. */
521 uint16_t cbVBEExtraData;
522 /** The VBE BIOS current memory address. */
523 uint16_t u16VBEExtraAddress;
524 uint16_t Padding7[2];
525# endif
526
527 /** The BIOS logo data. */
528 R3PTRTYPE(uint8_t *) pu8Logo;
529 /** The name of the logo file. */
530 R3PTRTYPE(char *) pszLogoFile;
531 /** Bitmap image data. */
532 R3PTRTYPE(uint8_t *) pu8LogoBitmap;
533 /** Current logo data offset. */
534 uint32_t offLogoData;
535 /** The size of the BIOS logo data. */
536 uint32_t cbLogo;
537 /** Current logo command. */
538 uint16_t LogoCommand;
539 /** Bitmap width. */
540 uint16_t cxLogo;
541 /** Bitmap height. */
542 uint16_t cyLogo;
543 /** Bitmap planes. */
544 uint16_t cLogoPlanes;
545 /** Bitmap depth. */
546 uint16_t cLogoBits;
547 /** Bitmap compression. */
548 uint16_t LogoCompression;
549 /** Bitmap colors used. */
550 uint16_t cLogoUsedColors;
551 /** Palette size. */
552 uint16_t cLogoPalEntries;
553 /** Clear screen flag. */
554 uint8_t fLogoClearScreen;
555 uint8_t Padding8[7];
556 /** Palette data. */
557 uint32_t au32LogoPalette[256];
558
559 /** The VGA BIOS ROM data. */
560 R3PTRTYPE(uint8_t *) pu8VgaBios;
561 /** The size of the VGA BIOS ROM. */
562 uint64_t cbVgaBios;
563 /** The name of the VGA BIOS ROM file. */
564 R3PTRTYPE(char *) pszVgaBiosFile;
565
566# ifdef VBOX_WITH_HGSMI
567 /** Base port in the assigned PCI I/O space. */
568 RTIOPORT IOPortBase;
569# ifdef VBOX_WITH_WDDM
570 uint8_t Padding9[2];
571 /** Specifies guest driver caps, i.e. whether it can handle IRQs from the
572 * adapter, the way it can handle async HGSMI command completion, etc. */
573 uint32_t fGuestCaps;
574 uint32_t fScanLineCfg;
575 uint32_t fHostCursorCapabilities;
576# else
577 uint8_t Padding10[14];
578# endif
579# endif /* VBOX_WITH_HGSMI */
580
581 PDMLED Led3D;
582
583 struct {
584 volatile uint32_t cPending;
585 uint32_t Padding1;
586 union
587 {
588 RTLISTNODE PendingList;
589 /* make sure the structure sized cross different contexts correctly */
590 struct
591 {
592 R3PTRTYPE(void *) dummy1;
593 R3PTRTYPE(void *) dummy2;
594 } dummy;
595 };
596 } pendingVhwaCommands;
597#endif /* VBOX */
598} VGAState;
599#ifdef VBOX
600/** VGA state. */
601typedef VGAState VGASTATE;
602/** Pointer to the VGA state. */
603typedef VGASTATE *PVGASTATE;
604AssertCompileMemberAlignment(VGASTATE, bank_offset, 8);
605AssertCompileMemberAlignment(VGASTATE, font_offsets, 8);
606AssertCompileMemberAlignment(VGASTATE, last_ch_attr, 8);
607AssertCompileMemberAlignment(VGASTATE, u32Marker, 8);
608#endif
609
610#ifdef VBE_NEW_DYN_LIST
611/**
612 * VBE Bios Extra Data structure.
613 * @remark duplicated in vbe.h.
614 */
615typedef struct VBEHeader
616{
617 /** Signature (VBEHEADER_MAGIC). */
618 uint16_t u16Signature;
619 /** Data size. */
620 uint16_t cbData;
621} VBEHeader;
622
623/** VBE Extra Data. */
624typedef VBEHeader VBEHEADER;
625/** Pointer to the VBE Extra Data. */
626typedef VBEHEADER *PVBEHEADER;
627
628/** The value of the VBEHEADER::u16Signature field.
629 * @remark duplicated in vbe.h. */
630#define VBEHEADER_MAGIC 0x77CC
631
632/** The extra port which is used to read the mode list.
633 * @remark duplicated in vbe.h. */
634#define VBE_EXTRA_PORT 0x3b6
635
636/** The extra port which is used for debug printf.
637 * @remark duplicated in vbe.h. */
638#define VBE_PRINTF_PORT 0x3b7
639
640#endif /* VBE_NEW_DYN_LIST */
641
642#if !defined(VBOX) || defined(IN_RING3)
643static inline int c6_to_8(int v)
644{
645 int b;
646 v &= 0x3f;
647 b = v & 1;
648 return (v << 2) | (b << 1) | b;
649}
650#endif /* !VBOX || IN_RING3 */
651
652
653#ifdef VBOX_WITH_HGSMI
654int VBVAInit (PVGASTATE pVGAState);
655void VBVADestroy (PVGASTATE pVGAState);
656int VBVAUpdateDisplay (PVGASTATE pVGAState);
657void VBVAReset (PVGASTATE pVGAState);
658void VBVAPause (PVGASTATE pVGAState, bool fPause);
659
660bool VBVAIsEnabled(PVGASTATE pVGAState);
661
662void VBVARaiseIrq (PVGASTATE pVGAState, uint32_t fFlags);
663void VBVARaiseIrqNoWait(PVGASTATE pVGAState, uint32_t fFlags);
664
665int VBVAInfoView(PVGASTATE pVGAState, const VBVAINFOVIEW *pView);
666int VBVAInfoScreen(PVGASTATE pVGAState, const VBVAINFOSCREEN *pScreen);
667int VBVAGetInfoViewAndScreen(PVGASTATE pVGAState, uint32_t u32ViewIndex, VBVAINFOVIEW *pView, VBVAINFOSCREEN *pScreen);
668
669/* @return host-guest flags that were set on reset
670 * this allows the caller to make further cleaning when needed,
671 * e.g. reset the IRQ */
672uint32_t HGSMIReset (PHGSMIINSTANCE pIns);
673
674# ifdef VBOX_WITH_VIDEOHWACCEL
675int vbvaVHWACommandCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface, PVBOXVHWACMD pCmd);
676int vbvaVHWAConstruct (PVGASTATE pVGAState);
677int vbvaVHWAReset (PVGASTATE pVGAState);
678
679void vbvaTimerCb(PVGASTATE pVGAState);
680
681int vboxVBVASaveStatePrep (PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
682int vboxVBVASaveStateDone (PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
683# endif
684
685#ifdef VBOX_WITH_HGSMI
686#define PPDMIDISPLAYVBVACALLBACKS_2_PVGASTATE(_pcb) ( (PVGASTATE)((uint8_t *)(_pcb) - RT_OFFSETOF(VGASTATE, IVBVACallbacks)) )
687#endif
688
689# ifdef VBOX_WITH_CRHGSMI
690int vboxVDMACrHgsmiCommandCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface, PVBOXVDMACMD_CHROMIUM_CMD pCmd, int rc);
691int vboxVDMACrHgsmiControlCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface, PVBOXVDMACMD_CHROMIUM_CTL pCmd, int rc);
692int vboxCmdVBVACmdHostCtl(PPDMIDISPLAYVBVACALLBACKS pInterface,
693 struct VBOXCRCMDCTL* pCmd, uint32_t cbCmd,
694 PFNCRCTLCOMPLETION pfnCompletion,
695 void *pvCompletion);
696int vboxCmdVBVACmdHostCtlSync(PPDMIDISPLAYVBVACALLBACKS pInterface,
697 struct VBOXCRCMDCTL* pCmd, uint32_t cbCmd);
698# endif
699
700int vboxVBVASaveStateExec (PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
701int vboxVBVALoadStateExec (PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t u32Version);
702int vboxVBVALoadStateDone (PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
703
704DECLCALLBACK(int) vgaUpdateDisplayAll(PVGASTATE pThis, bool fFailOnResize);
705DECLCALLBACK(int) vbvaPortSendModeHint(PPDMIDISPLAYPORT pInterface, uint32_t cx,
706 uint32_t cy, uint32_t cBPP,
707 uint32_t cDisplay, uint32_t dx,
708 uint32_t dy, uint32_t fEnabled,
709 uint32_t fNotifyGuest);
710DECLCALLBACK(void) vbvaPortReportHostCursorCapabilities(PPDMIDISPLAYPORT pInterface, uint32_t fCapabilitiesAdded,
711 uint32_t fCapabilitiesRemoved);
712DECLCALLBACK(void) vbvaPortReportHostCursorPosition(PPDMIDISPLAYPORT pInterface, uint32_t x, uint32_t y);
713
714# ifdef VBOX_WITH_VDMA
715typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
716int vboxVDMAConstruct(PVGASTATE pVGAState, uint32_t cPipeElements);
717int vboxVDMADestruct(PVBOXVDMAHOST pVdma);
718int vboxVDMAReset(PVBOXVDMAHOST pVdma);
719void vboxVDMAControl(PVBOXVDMAHOST pVdma, PVBOXVDMA_CTL pCmd, uint32_t cbCmd);
720void vboxVDMACommand(PVBOXVDMAHOST pVdma, PVBOXVDMACBUF_DR pCmd, uint32_t cbCmd);
721int vboxVDMASaveStateExecPrep(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM);
722int vboxVDMASaveStateExecDone(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM);
723int vboxVDMASaveStateExecPerform(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM);
724int vboxVDMASaveLoadExecPerform(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM, uint32_t u32Version);
725int vboxVDMASaveLoadDone(struct VBOXVDMAHOST *pVdma);
726# endif /* VBOX_WITH_VDMA */
727
728# ifdef VBOX_WITH_CRHGSMI
729int vboxCmdVBVACmdSubmit(PVGASTATE pVGAState);
730int vboxCmdVBVACmdFlush(PVGASTATE pVGAState);
731void vboxCmdVBVACmdTimer(PVGASTATE pVGAState);
732int vboxCmdVBVACmdCtl(PVGASTATE pVGAState, VBOXCMDVBVA_CTL *pCtl, uint32_t cbCtl);
733bool vboxCmdVBVAIsEnabled(PVGASTATE pVGAState);
734# endif /* VBOX_WITH_CRHGSMI */
735#endif /* VBOX_WITH_HGSMI */
736
737# ifdef VBOX_WITH_VMSVGA
738int vgaR3RegisterVRAMHandler(PVGASTATE pVGAState, uint64_t cbFrameBuffer);
739int vgaR3UnregisterVRAMHandler(PVGASTATE pVGAState);
740int vgaR3UpdateDisplay(PVGASTATE pVGAState, unsigned xStart, unsigned yStart, unsigned width, unsigned height);
741# endif
742
743#ifndef VBOX
744void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base,
745 unsigned long vga_ram_offset, int vga_ram_size);
746uint32_t vga_mem_readb(void *opaque, target_phys_addr_t addr);
747void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val);
748void vga_invalidate_scanlines(VGAState *s, int y1, int y2);
749
750void vga_draw_cursor_line_8(uint8_t *d1, const uint8_t *src1,
751 int poffset, int w,
752 unsigned int color0, unsigned int color1,
753 unsigned int color_xor);
754void vga_draw_cursor_line_16(uint8_t *d1, const uint8_t *src1,
755 int poffset, int w,
756 unsigned int color0, unsigned int color1,
757 unsigned int color_xor);
758void vga_draw_cursor_line_32(uint8_t *d1, const uint8_t *src1,
759 int poffset, int w,
760 unsigned int color0, unsigned int color1,
761 unsigned int color_xor);
762
763extern const uint8_t sr_mask[8];
764extern const uint8_t gr_mask[16];
765#endif /* !VBOX */
766
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