VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA.h@ 57502

Last change on this file since 57502 was 57502, checked in by vboxsync, 10 years ago

DevVGA-SVGA*: Some viewport sanity adjustments and comments.
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File size: 31.7 KB
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1/* $Id: DevVGA.h 57502 2015-08-23 17:29:15Z vboxsync $ */
2/** @file
3 * DevVGA - VBox VGA/VESA device, internal header.
4 */
5
6/*
7 * Copyright (C) 2006-2015 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 * --------------------------------------------------------------------
17 *
18 * This code is based on:
19 *
20 * QEMU internal VGA defines.
21 *
22 * Copyright (c) 2003-2004 Fabrice Bellard
23 *
24 * Permission is hereby granted, free of charge, to any person obtaining a copy
25 * of this software and associated documentation files (the "Software"), to deal
26 * in the Software without restriction, including without limitation the rights
27 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
28 * copies of the Software, and to permit persons to whom the Software is
29 * furnished to do so, subject to the following conditions:
30 *
31 * The above copyright notice and this permission notice shall be included in
32 * all copies or substantial portions of the Software.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
37 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
38 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
39 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
40 * THE SOFTWARE.
41 */
42
43/** Use VBE bytewise I/O. Only needed for Windows Longhorn/Vista betas and backwards compatibility. */
44#define VBE_BYTEWISE_IO
45
46/** Use VBE new dynamic mode list.
47 * If this is not defined, no checks are carried out to see if the modes all
48 * fit into the framebuffer! See the VRAM_SIZE_FIX define. */
49#define VBE_NEW_DYN_LIST
50
51#ifdef VBOX
52/** The default amount of VRAM. */
53# define VGA_VRAM_DEFAULT (_4M)
54/** The maximum amount of VRAM. Limited by VBOX_MAX_ALLOC_PAGE_COUNT. */
55# define VGA_VRAM_MAX (256 * _1M)
56/** The minimum amount of VRAM. */
57# define VGA_VRAM_MIN (_1M)
58#endif
59
60#include <VBox/Hardware/VBoxVideoVBE.h>
61
62#ifdef VBOX_WITH_HGSMI
63# include "HGSMI/HGSMIHost.h"
64#endif /* VBOX_WITH_HGSMI */
65#include "DevVGASavedState.h"
66
67#ifdef VBOX_WITH_VMSVGA
68# include "DevVGA-SVGA.h"
69#endif
70
71# include <iprt/list.h>
72
73#define MSR_COLOR_EMULATION 0x01
74#define MSR_PAGE_SELECT 0x20
75
76#define ST01_V_RETRACE 0x08
77#define ST01_DISP_ENABLE 0x01
78
79/* bochs VBE support */
80#define CONFIG_BOCHS_VBE
81
82#ifdef CONFIG_BOCHS_VBE
83
84/* Cross reference with <VBox/Hardware/VBoxVideoVBE.h> */
85#define VBE_DISPI_INDEX_NB_SAVED 0xb /* Number of saved registers (vbe_regs array) */
86#define VBE_DISPI_INDEX_NB 0xc /* Total number of VBE registers */
87
88#define VGA_STATE_COMMON_BOCHS_VBE \
89 uint16_t vbe_index; \
90 uint16_t vbe_regs[VBE_DISPI_INDEX_NB]; \
91 uint16_t alignment[3]; /* pad to 64 bits */ \
92 uint32_t vbe_start_addr; \
93 uint32_t vbe_line_offset; \
94 uint32_t vbe_bank_max;
95
96#else
97
98#define VGA_STATE_COMMON_BOCHS_VBE
99
100#endif /* !CONFIG_BOCHS_VBE */
101
102#define CH_ATTR_SIZE (160 * 100)
103#define VGA_MAX_HEIGHT VBE_DISPI_MAX_YRES
104
105typedef struct vga_retrace_s {
106 unsigned frame_cclks; /* Character clocks per frame. */
107 unsigned frame_ns; /* Frame duration in ns. */
108 unsigned cclk_ns; /* Character clock duration in ns. */
109 unsigned vb_start; /* Vertical blanking start (scanline). */
110 unsigned vb_end; /* Vertical blanking end (scanline). */
111 unsigned vb_end_ns; /* Vertical blanking end time (length) in ns. */
112 unsigned vs_start; /* Vertical sync start (scanline). */
113 unsigned vs_end; /* Vertical sync end (scanline). */
114 unsigned vs_start_ns; /* Vertical sync start time in ns. */
115 unsigned vs_end_ns; /* Vertical sync end time in ns. */
116 unsigned h_total; /* Horizontal total (cclks per scanline). */
117 unsigned h_total_ns; /* Scanline duration in ns. */
118 unsigned hb_start; /* Horizontal blanking start (cclk). */
119 unsigned hb_end; /* Horizontal blanking end (cclk). */
120 unsigned hb_end_ns; /* Horizontal blanking end time (length) in ns. */
121 unsigned v_freq_hz; /* Vertical refresh rate to emulate. */
122} vga_retrace_s;
123
124#ifndef VBOX
125#define VGA_STATE_COMMON \
126 uint8_t *vram_ptr; \
127 unsigned long vram_offset; \
128 unsigned int vram_size; \
129 uint32_t latch; \
130 uint8_t sr_index; \
131 uint8_t sr[256]; \
132 uint8_t gr_index; \
133 uint8_t gr[256]; \
134 uint8_t ar_index; \
135 uint8_t ar[21]; \
136 int ar_flip_flop; \
137 uint8_t cr_index; \
138 uint8_t cr[256]; /* CRT registers */ \
139 uint8_t msr; /* Misc Output Register */ \
140 uint8_t fcr; /* Feature Control Register */ \
141 uint8_t st00; /* status 0 */ \
142 uint8_t st01; /* status 1 */ \
143 uint8_t dac_state; \
144 uint8_t dac_sub_index; \
145 uint8_t dac_read_index; \
146 uint8_t dac_write_index; \
147 uint8_t dac_cache[3]; /* used when writing */ \
148 uint8_t palette[768]; \
149 int32_t bank_offset; \
150 int (*get_bpp)(struct VGAState *s); \
151 void (*get_offsets)(struct VGAState *s, \
152 uint32_t *pline_offset, \
153 uint32_t *pstart_addr, \
154 uint32_t *pline_compare); \
155 void (*get_resolution)(struct VGAState *s, \
156 int *pwidth, \
157 int *pheight); \
158 VGA_STATE_COMMON_BOCHS_VBE \
159 /* display refresh support */ \
160 DisplayState *ds; \
161 uint32_t font_offsets[2]; \
162 int graphic_mode; \
163 uint8_t shift_control; \
164 uint8_t double_scan; \
165 uint32_t line_offset; \
166 uint32_t line_compare; \
167 uint32_t start_addr; \
168 uint32_t plane_updated; \
169 uint8_t last_cw, last_ch; \
170 uint32_t last_width, last_height; /* in chars or pixels */ \
171 uint32_t last_scr_width, last_scr_height; /* in pixels */ \
172 uint8_t cursor_start, cursor_end; \
173 uint32_t cursor_offset; \
174 unsigned int (*rgb_to_pixel)(unsigned int r, \
175 unsigned int g, unsigned b); \
176 /* hardware mouse cursor support */ \
177 uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32]; \
178 void (*cursor_invalidate)(struct VGAState *s); \
179 void (*cursor_draw_line)(struct VGAState *s, uint8_t *d, int y); \
180 /* tell for each page if it has been updated since the last time */ \
181 uint32_t last_palette[256]; \
182 uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
183
184#else /* VBOX */
185
186/* bird: Since we've changed types, reordered members, done alignment
187 paddings and more, VGA_STATE_COMMON was added directly to the
188 struct to make it more readable and easier to handle. */
189
190struct VGAState;
191typedef int FNGETBPP(struct VGAState *s);
192typedef void FNGETOFFSETS(struct VGAState *s, uint32_t *pline_offset, uint32_t *pstart_addr, uint32_t *pline_compare);
193typedef void FNGETRESOLUTION(struct VGAState *s, int *pwidth, int *pheight);
194typedef unsigned int FNRGBTOPIXEL(unsigned int r, unsigned int g, unsigned b);
195typedef void FNCURSORINVALIDATE(struct VGAState *s);
196typedef void FNCURSORDRAWLINE(struct VGAState *s, uint8_t *d, int y);
197
198#endif /* VBOX */
199
200#ifdef VBOX_WITH_VDMA
201typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
202#endif
203
204#ifdef VBOX_WITH_VIDEOHWACCEL
205#define VBOX_VHWA_MAX_PENDING_COMMANDS 1000
206
207typedef struct _VBOX_VHWA_PENDINGCMD
208{
209 RTLISTNODE Node;
210 PVBOXVHWACMD pCommand;
211} VBOX_VHWA_PENDINGCMD;
212#endif
213
214#ifdef VBOX_WITH_VMSVGA
215
216#define VMSVGA_FIFO_EXTCMD_NONE 0
217#define VMSVGA_FIFO_EXTCMD_TERMINATE 1
218#define VMSVGA_FIFO_EXTCMD_SAVESTATE 2
219#define VMSVGA_FIFO_EXTCMD_LOADSTATE 3
220#define VMSVGA_FIFO_EXTCMD_RESET 4
221#define VMSVGA_FIFO_EXTCMD_UPDATE_SURFACE_HEAP_BUFFERS 5
222
223/** Size of the region to backup when switching into svga mode. */
224#define VMSVGA_FRAMEBUFFER_BACKUP_SIZE (32*1024)
225
226typedef struct
227{
228 PSSMHANDLE pSSM;
229 uint32_t uVersion;
230 uint32_t uPass;
231} VMSVGA_STATE_LOAD, *PVMSVGA_STATE_LOAD;
232
233/** Pointer to the private VMSVGA ring-3 state structure.
234 * @todo Still not entirely satisfired with the type name, but better than
235 * the previous lower/upper case only distinction. */
236typedef struct VMSVGAR3STATE *PVMSVGAR3STATE;
237/** Pointer to the private (implementation specific) VMSVGA3d state. */
238typedef struct VMSVGA3DSTATE *PVMSVGA3DSTATE;
239
240typedef struct VMSVGAState
241{
242 /** The host window handle */
243 uint64_t u64HostWindowId;
244 /** The R3 FIFO pointer. */
245 R3PTRTYPE(uint32_t *) pFIFOR3;
246 /** The R0 FIFO pointer. */
247 R0PTRTYPE(uint32_t *) pFIFOR0;
248 /** R3 Opaque pointer to svga state. */
249 R3PTRTYPE(PVMSVGAR3STATE) pSvgaR3State;
250 /** R3 Opaque pointer to 3d state. */
251 R3PTRTYPE(PVMSVGA3DSTATE) p3dState;
252 /** R3 Opaque pointer to a copy of the first 32k of the framebuffer before switching into svga mode. */
253 R3PTRTYPE(void *) pFrameBufferBackup;
254 /** R3 Opaque pointer to an external fifo cmd parameter. */
255 R3PTRTYPE(void * volatile) pvFIFOExtCmdParam;
256
257 /** Guest physical address of the FIFO memory range. */
258 RTGCPHYS GCPhysFIFO;
259 /** Size in bytes of the FIFO memory range. */
260 uint32_t cbFIFO;
261 /** SVGA id. */
262 uint32_t u32SVGAId;
263 /** SVGA extensions enabled or not. */
264 uint32_t fEnabled;
265 /** SVGA memory area configured status. */
266 uint32_t fConfigured;
267 /** Device is busy handling FIFO requests (VMSVGA_BUSY_F_FIFO,
268 * VMSVGA_BUSY_F_EMT_FORCE). */
269 uint32_t volatile fBusy;
270#define VMSVGA_BUSY_F_FIFO RT_BIT_32(0) /**< The normal true/false busy FIFO bit. */
271#define VMSVGA_BUSY_F_EMT_FORCE RT_BIT_32(1) /**< Bit preventing race status flickering when EMT kicks the FIFO thread. */
272 /** Traces (dirty page detection) enabled or not. */
273 uint32_t fTraces;
274 /** Guest OS identifier. */
275 uint32_t u32GuestId;
276 /** Scratch region size. */
277 uint32_t cScratchRegion;
278 /** Scratch array. */
279 uint32_t au32ScratchRegion[VMSVGA_SCRATCH_SIZE];
280 /** Irq status. */
281 uint32_t u32IrqStatus;
282 /** Irq mask. */
283 uint32_t u32IrqMask;
284 /** Pitch lock. */
285 uint32_t u32PitchLock;
286 /** Current GMR id. (SVGA_REG_GMR_ID) */
287 uint32_t u32CurrentGMRId;
288 /** Register caps. */
289 uint32_t u32RegCaps;
290 uint32_t Padding2;
291 /** Physical address of command mmio range. */
292 RTIOPORT BasePort;
293 /** Port io index register. */
294 uint32_t u32IndexReg;
295 /** The support driver session handle for use with FIFORequestSem. */
296 R3R0PTRTYPE(PSUPDRVSESSION) pSupDrvSession;
297 /** FIFO request semaphore. */
298 SUPSEMEVENT FIFORequestSem;
299 /** FIFO external command semaphore. */
300 R3PTRTYPE(RTSEMEVENT) FIFOExtCmdSem;
301 /** FIFO IO Thread. */
302 R3PTRTYPE(PPDMTHREAD) pFIFOIOThread;
303 uint32_t uWidth;
304 uint32_t uHeight;
305 uint32_t uBpp;
306 uint32_t cbScanline;
307 /** Maximum width supported. */
308 uint32_t u32MaxWidth;
309 /** Maximum height supported. */
310 uint32_t u32MaxHeight;
311 /** Viewport rectangle, i.e. what's currently visible of the target host
312 * window. This is usually (0,0)(uWidth,uHeight), but if the window is
313 * shrunk and scrolling applied, both the origin and size may differ. */
314 struct
315 {
316 uint32_t x;
317 uint32_t y;
318 uint32_t cx;
319 uint32_t cy;
320 } viewport;
321 /** Action flags */
322 uint32_t u32ActionFlags;
323 /** SVGA 3d extensions enabled or not. */
324 bool f3DEnabled;
325 /** VRAM page monitoring enabled or not. */
326 bool fVRAMTracking;
327 /** External command to be executed in the FIFO thread. */
328 uint8_t volatile u8FIFOExtCommand;
329 /** Set by vmsvgaR3RunExtCmdOnFifoThread when it temporarily resumes the FIFO
330 * thread and does not want it do anything but the command. */
331 bool volatile fFifoExtCommandWakeup;
332# if defined(DEBUG_GMR_ACCESS) || defined(DEBUG_FIFO_ACCESS)
333 /** GMR debug access handler type handle. */
334 PGMPHYSHANDLERTYPE hGmrAccessHandlerType;
335 /** FIFO debug access handler type handle. */
336 PGMPHYSHANDLERTYPE hFifoAccessHandlerType;
337# endif
338} VMSVGAState;
339#endif /* VBOX_WITH_VMSVGA */
340
341
342typedef struct VGAState {
343#ifndef VBOX
344 VGA_STATE_COMMON
345#else /* VBOX */
346 R3PTRTYPE(uint8_t *) vram_ptrR3;
347 R3PTRTYPE(FNGETBPP *) get_bpp;
348 R3PTRTYPE(FNGETOFFSETS *) get_offsets;
349 R3PTRTYPE(FNGETRESOLUTION *) get_resolution;
350 R3PTRTYPE(FNRGBTOPIXEL *) rgb_to_pixel;
351 R3PTRTYPE(FNCURSORINVALIDATE *) cursor_invalidate;
352 R3PTRTYPE(FNCURSORDRAWLINE *) cursor_draw_line;
353 RTR3PTR R3PtrCmnAlignment;
354 uint32_t vram_size;
355 uint32_t latch;
356 uint8_t sr_index;
357 uint8_t sr[256];
358 uint8_t gr_index;
359 uint8_t gr[256];
360 uint8_t ar_index;
361 uint8_t ar[21];
362 int32_t ar_flip_flop;
363 uint8_t cr_index;
364 uint8_t cr[256]; /* CRT registers */
365 uint8_t msr; /* Misc Output Register */
366 uint8_t fcr; /* Feature Control Register */
367 uint8_t st00; /* status 0 */
368 uint8_t st01; /* status 1 */
369 uint8_t dac_state;
370 uint8_t dac_sub_index;
371 uint8_t dac_read_index;
372 uint8_t dac_write_index;
373 uint8_t dac_cache[3]; /* used when writing */
374 uint8_t palette[768];
375 int32_t bank_offset;
376 VGA_STATE_COMMON_BOCHS_VBE
377 /* display refresh support */
378 uint32_t font_offsets[2];
379 int32_t graphic_mode;
380 uint8_t shift_control;
381 uint8_t double_scan;
382 uint8_t padding1[2];
383 uint32_t line_offset;
384 uint32_t line_compare;
385 uint32_t start_addr;
386 uint32_t plane_updated;
387 uint8_t last_cw, last_ch, padding2[2];
388 uint32_t last_width, last_height; /* in chars or pixels */
389 uint32_t last_scr_width, last_scr_height; /* in pixels */
390 uint32_t last_bpp;
391 uint8_t cursor_start, cursor_end, padding3[2];
392 uint32_t cursor_offset;
393 /* hardware mouse cursor support */
394 uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32];
395 /* tell for each page if it has been updated since the last time */
396 uint32_t last_palette[256];
397 uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
398
399 /** end-of-common-state-marker */
400 uint32_t u32Marker;
401
402 /** Pointer to the device instance - RC Ptr. */
403 PPDMDEVINSRC pDevInsRC;
404 /** Pointer to the GC vram mapping. */
405 RCPTRTYPE(uint8_t *) vram_ptrRC;
406 uint32_t Padding1;
407
408 /** Pointer to the device instance - R3 Ptr. */
409 PPDMDEVINSR3 pDevInsR3;
410# ifdef VBOX_WITH_HGSMI
411 R3PTRTYPE(PHGSMIINSTANCE) pHGSMI;
412# endif
413# ifdef VBOX_WITH_VDMA
414 R3PTRTYPE(PVBOXVDMAHOST) pVdma;
415# endif
416 /** LUN\#0: The display port base interface. */
417 PDMIBASE IBase;
418 /** LUN\#0: The display port interface. */
419 PDMIDISPLAYPORT IPort;
420# if defined(VBOX_WITH_HGSMI) && (defined(VBOX_WITH_VIDEOHWACCEL) || defined(VBOX_WITH_CRHGSMI))
421 /** LUN\#0: VBVA callbacks interface */
422 PDMIDISPLAYVBVACALLBACKS IVBVACallbacks;
423# else
424 RTR3PTR Padding2;
425# endif
426 /** Status LUN\#0: Leds interface. */
427 PDMILEDPORTS ILeds;
428
429 /** Pointer to base interface of the driver. */
430 R3PTRTYPE(PPDMIBASE) pDrvBase;
431 /** Pointer to display connector interface of the driver. */
432 R3PTRTYPE(PPDMIDISPLAYCONNECTOR) pDrv;
433
434 /** Status LUN: Partner of ILeds. */
435 R3PTRTYPE(PPDMILEDCONNECTORS) pLedsConnector;
436 /** Status LUN: Media Notifys. */
437 R3PTRTYPE(PPDMIMEDIANOTIFY) pMediaNotify;
438
439 /** Refresh timer handle - HC. */
440 PTMTIMERR3 RefreshTimer;
441
442 /** Pointer to the device instance - R0 Ptr. */
443 PPDMDEVINSR0 pDevInsR0;
444 /** The R0 vram pointer... */
445 R0PTRTYPE(uint8_t *) vram_ptrR0;
446
447# if HC_ARCH_BITS == 32
448 uint32_t Padding3;
449# endif
450
451# ifdef VBOX_WITH_VMSVGA
452 VMSVGAState svga;
453# endif
454
455 /** The number of monitors. */
456 uint32_t cMonitors;
457 /** Current refresh timer interval. */
458 uint32_t cMilliesRefreshInterval;
459 /** Bitmap tracking dirty pages. */
460 uint32_t au32DirtyBitmap[VGA_VRAM_MAX / PAGE_SIZE / 32];
461
462 /** Flag indicating that there are dirty bits. This is used to optimize the handler resetting. */
463 bool fHasDirtyBits;
464 /** LFB was updated flag. */
465 bool fLFBUpdated;
466 /** Indicates if the GC extensions are enabled or not. */
467 bool fGCEnabled;
468 /** Indicates if the R0 extensions are enabled or not. */
469 bool fR0Enabled;
470 /** Flag indicating that the VGA memory in the 0xa0000-0xbffff region has been remapped to allow direct access. */
471 bool fRemappedVGA;
472 /** Whether to render the guest VRAM to the framebuffer memory. False only for some LFB modes. */
473 bool fRenderVRAM;
474# ifdef VBOX_WITH_VMSVGA
475 /* Whether the SVGA emulation is enabled or not. */
476 bool fVMSVGAEnabled;
477 bool Padding4[1+4];
478# else
479 bool Padding4[2+4];
480# endif
481
482 /** Physical access type for the linear frame buffer dirty page tracking. */
483 PGMPHYSHANDLERTYPE hLfbAccessHandlerType;
484
485 /** The physical address the VRAM was assigned. */
486 RTGCPHYS GCPhysVRAM;
487 /** The critical section protect the instance data. */
488 PDMCRITSECT CritSect;
489 /** The PCI device. */
490 PCIDEVICE Dev;
491
492 STAMPROFILE StatRZMemoryRead;
493 STAMPROFILE StatR3MemoryRead;
494 STAMPROFILE StatRZMemoryWrite;
495 STAMPROFILE StatR3MemoryWrite;
496 STAMCOUNTER StatMapPage; /**< Counts IOMMMIOMapMMIO2Page calls. */
497 STAMCOUNTER StatUpdateDisp; /**< Counts vgaPortUpdateDisplay calls. */
498
499 /* Keep track of ring 0 latched accesses to the VGA MMIO memory. */
500 uint64_t u64LastLatchedAccess;
501 uint32_t cLatchAccesses;
502 uint16_t uMaskLatchAccess;
503 uint16_t iMask;
504
505# ifdef VBE_BYTEWISE_IO
506 /** VBE read/write data/index flags */
507 uint8_t fReadVBEData;
508 uint8_t fWriteVBEData;
509 uint8_t fReadVBEIndex;
510 uint8_t fWriteVBEIndex;
511 /** VBE write data/index one byte buffer */
512 uint8_t cbWriteVBEData;
513 uint8_t cbWriteVBEIndex;
514# ifdef VBE_NEW_DYN_LIST
515 /** VBE Extra Data write address one byte buffer */
516 uint8_t cbWriteVBEExtraAddress;
517 uint8_t Padding5;
518# else
519 uint8_t Padding5[2];
520# endif
521# endif
522
523 /** Retrace emulation state */
524 bool fRealRetrace;
525 bool Padding6[HC_ARCH_BITS == 64 ? 7 : 3];
526 vga_retrace_s retrace_state;
527
528# ifdef VBE_NEW_DYN_LIST
529 /** The VBE BIOS extra data. */
530 R3PTRTYPE(uint8_t *) pbVBEExtraData;
531 /** The size of the VBE BIOS extra data. */
532 uint16_t cbVBEExtraData;
533 /** The VBE BIOS current memory address. */
534 uint16_t u16VBEExtraAddress;
535 uint16_t Padding7[2];
536# endif
537
538 /** The BIOS logo data. */
539 R3PTRTYPE(uint8_t *) pbLogo;
540 /** The name of the logo file. */
541 R3PTRTYPE(char *) pszLogoFile;
542 /** Bitmap image data. */
543 R3PTRTYPE(uint8_t *) pbLogoBitmap;
544 /** Current logo data offset. */
545 uint32_t offLogoData;
546 /** The size of the BIOS logo data. */
547 uint32_t cbLogo;
548 /** Current logo command. */
549 uint16_t LogoCommand;
550 /** Bitmap width. */
551 uint16_t cxLogo;
552 /** Bitmap height. */
553 uint16_t cyLogo;
554 /** Bitmap planes. */
555 uint16_t cLogoPlanes;
556 /** Bitmap depth. */
557 uint16_t cLogoBits;
558 /** Bitmap compression. */
559 uint16_t LogoCompression;
560 /** Bitmap colors used. */
561 uint16_t cLogoUsedColors;
562 /** Palette size. */
563 uint16_t cLogoPalEntries;
564 /** Clear screen flag. */
565 uint8_t fLogoClearScreen;
566 uint8_t Padding8[7];
567 /** Palette data. */
568 uint32_t au32LogoPalette[256];
569
570 /** The VGA BIOS ROM data. */
571 R3PTRTYPE(uint8_t *) pbVgaBios;
572 /** The size of the VGA BIOS ROM. */
573 uint64_t cbVgaBios;
574 /** The name of the VGA BIOS ROM file. */
575 R3PTRTYPE(char *) pszVgaBiosFile;
576
577# ifdef VBOX_WITH_HGSMI
578 /** Base port in the assigned PCI I/O space. */
579 RTIOPORT IOPortBase;
580# ifdef VBOX_WITH_WDDM
581 uint8_t Padding9[2];
582 /** Specifies guest driver caps, i.e. whether it can handle IRQs from the
583 * adapter, the way it can handle async HGSMI command completion, etc. */
584 uint32_t fGuestCaps;
585 uint32_t fScanLineCfg;
586 uint32_t fHostCursorCapabilities;
587# else
588 uint8_t Padding10[14];
589# endif
590# endif /* VBOX_WITH_HGSMI */
591
592 PDMLED Led3D;
593
594 struct {
595 volatile uint32_t cPending;
596 uint32_t Padding1;
597 union
598 {
599 RTLISTNODE PendingList;
600 /* make sure the structure sized cross different contexts correctly */
601 struct
602 {
603 R3PTRTYPE(void *) dummy1;
604 R3PTRTYPE(void *) dummy2;
605 } dummy;
606 };
607 } pendingVhwaCommands;
608#endif /* VBOX */
609} VGAState;
610#ifdef VBOX
611/** VGA state. */
612typedef VGAState VGASTATE;
613/** Pointer to the VGA state. */
614typedef VGASTATE *PVGASTATE;
615AssertCompileMemberAlignment(VGASTATE, bank_offset, 8);
616AssertCompileMemberAlignment(VGASTATE, font_offsets, 8);
617AssertCompileMemberAlignment(VGASTATE, last_ch_attr, 8);
618AssertCompileMemberAlignment(VGASTATE, u32Marker, 8);
619#endif
620
621#ifdef VBE_NEW_DYN_LIST
622/**
623 * VBE Bios Extra Data structure.
624 * @remark duplicated in vbe.h.
625 */
626typedef struct VBEHeader
627{
628 /** Signature (VBEHEADER_MAGIC). */
629 uint16_t u16Signature;
630 /** Data size. */
631 uint16_t cbData;
632} VBEHeader;
633
634/** VBE Extra Data. */
635typedef VBEHeader VBEHEADER;
636/** Pointer to the VBE Extra Data. */
637typedef VBEHEADER *PVBEHEADER;
638
639/** The value of the VBEHEADER::u16Signature field.
640 * @remark duplicated in vbe.h. */
641#define VBEHEADER_MAGIC 0x77CC
642
643/** The extra port which is used to read the mode list.
644 * @remark duplicated in vbe.h. */
645#define VBE_EXTRA_PORT 0x3b6
646
647/** The extra port which is used for debug printf.
648 * @remark duplicated in vbe.h. */
649#define VBE_PRINTF_PORT 0x3b7
650
651#endif /* VBE_NEW_DYN_LIST */
652
653#if !defined(VBOX) || defined(IN_RING3)
654static inline int c6_to_8(int v)
655{
656 int b;
657 v &= 0x3f;
658 b = v & 1;
659 return (v << 2) | (b << 1) | b;
660}
661#endif /* !VBOX || IN_RING3 */
662
663
664#ifdef VBOX_WITH_HGSMI
665int VBVAInit (PVGASTATE pVGAState);
666void VBVADestroy (PVGASTATE pVGAState);
667int VBVAUpdateDisplay (PVGASTATE pVGAState);
668void VBVAReset (PVGASTATE pVGAState);
669void VBVAPause (PVGASTATE pVGAState, bool fPause);
670
671bool VBVAIsEnabled(PVGASTATE pVGAState);
672
673void VBVARaiseIrq (PVGASTATE pVGAState, uint32_t fFlags);
674void VBVARaiseIrqNoWait(PVGASTATE pVGAState, uint32_t fFlags);
675
676int VBVAInfoView(PVGASTATE pVGAState, const VBVAINFOVIEW *pView);
677int VBVAInfoScreen(PVGASTATE pVGAState, const VBVAINFOSCREEN *pScreen);
678int VBVAGetInfoViewAndScreen(PVGASTATE pVGAState, uint32_t u32ViewIndex, VBVAINFOVIEW *pView, VBVAINFOSCREEN *pScreen);
679
680/* @return host-guest flags that were set on reset
681 * this allows the caller to make further cleaning when needed,
682 * e.g. reset the IRQ */
683uint32_t HGSMIReset (PHGSMIINSTANCE pIns);
684
685# ifdef VBOX_WITH_VIDEOHWACCEL
686DECLCALLBACK(int) vbvaVHWACommandCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface, PVBOXVHWACMD pCmd);
687int vbvaVHWAConstruct (PVGASTATE pVGAState);
688int vbvaVHWAReset (PVGASTATE pVGAState);
689
690void vbvaTimerCb(PVGASTATE pVGAState);
691
692int vboxVBVASaveStatePrep (PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
693int vboxVBVASaveStateDone (PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
694# endif
695
696#ifdef VBOX_WITH_HGSMI
697#define PPDMIDISPLAYVBVACALLBACKS_2_PVGASTATE(_pcb) ( (PVGASTATE)((uint8_t *)(_pcb) - RT_OFFSETOF(VGASTATE, IVBVACallbacks)) )
698#endif
699
700# ifdef VBOX_WITH_CRHGSMI
701DECLCALLBACK(int) vboxVDMACrHgsmiCommandCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface,
702 PVBOXVDMACMD_CHROMIUM_CMD pCmd, int rc);
703DECLCALLBACK(int) vboxVDMACrHgsmiControlCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface,
704 PVBOXVDMACMD_CHROMIUM_CTL pCmd, int rc);
705DECLCALLBACK(int) vboxCmdVBVACmdHostCtl(PPDMIDISPLAYVBVACALLBACKS pInterface,
706 struct VBOXCRCMDCTL* pCmd, uint32_t cbCmd,
707 PFNCRCTLCOMPLETION pfnCompletion,
708 void *pvCompletion);
709DECLCALLBACK(int) vboxCmdVBVACmdHostCtlSync(PPDMIDISPLAYVBVACALLBACKS pInterface,
710 struct VBOXCRCMDCTL* pCmd, uint32_t cbCmd);
711# endif
712
713int vboxVBVASaveStateExec (PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
714int vboxVBVALoadStateExec (PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t u32Version);
715int vboxVBVALoadStateDone (PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
716
717DECLCALLBACK(int) vgaUpdateDisplayAll(PVGASTATE pThis, bool fFailOnResize);
718DECLCALLBACK(int) vbvaPortSendModeHint(PPDMIDISPLAYPORT pInterface, uint32_t cx,
719 uint32_t cy, uint32_t cBPP,
720 uint32_t cDisplay, uint32_t dx,
721 uint32_t dy, uint32_t fEnabled,
722 uint32_t fNotifyGuest);
723DECLCALLBACK(void) vbvaPortReportHostCursorCapabilities(PPDMIDISPLAYPORT pInterface, uint32_t fCapabilitiesAdded,
724 uint32_t fCapabilitiesRemoved);
725DECLCALLBACK(void) vbvaPortReportHostCursorPosition(PPDMIDISPLAYPORT pInterface, uint32_t x, uint32_t y);
726
727# ifdef VBOX_WITH_VDMA
728typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
729int vboxVDMAConstruct(PVGASTATE pVGAState, uint32_t cPipeElements);
730int vboxVDMADestruct(PVBOXVDMAHOST pVdma);
731int vboxVDMAReset(PVBOXVDMAHOST pVdma);
732void vboxVDMAControl(PVBOXVDMAHOST pVdma, PVBOXVDMA_CTL pCmd, uint32_t cbCmd);
733void vboxVDMACommand(PVBOXVDMAHOST pVdma, PVBOXVDMACBUF_DR pCmd, uint32_t cbCmd);
734int vboxVDMASaveStateExecPrep(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM);
735int vboxVDMASaveStateExecDone(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM);
736int vboxVDMASaveStateExecPerform(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM);
737int vboxVDMASaveLoadExecPerform(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM, uint32_t u32Version);
738int vboxVDMASaveLoadDone(struct VBOXVDMAHOST *pVdma);
739# endif /* VBOX_WITH_VDMA */
740
741# ifdef VBOX_WITH_CRHGSMI
742int vboxCmdVBVACmdSubmit(PVGASTATE pVGAState);
743int vboxCmdVBVACmdFlush(PVGASTATE pVGAState);
744void vboxCmdVBVACmdTimer(PVGASTATE pVGAState);
745int vboxCmdVBVACmdCtl(PVGASTATE pVGAState, VBOXCMDVBVA_CTL *pCtl, uint32_t cbCtl);
746bool vboxCmdVBVAIsEnabled(PVGASTATE pVGAState);
747# endif /* VBOX_WITH_CRHGSMI */
748#endif /* VBOX_WITH_HGSMI */
749
750# ifdef VBOX_WITH_VMSVGA
751int vgaR3RegisterVRAMHandler(PVGASTATE pVGAState, uint64_t cbFrameBuffer);
752int vgaR3UnregisterVRAMHandler(PVGASTATE pVGAState);
753int vgaR3UpdateDisplay(PVGASTATE pVGAState, unsigned xStart, unsigned yStart, unsigned width, unsigned height);
754# endif
755
756#ifndef VBOX
757void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base,
758 unsigned long vga_ram_offset, int vga_ram_size);
759uint32_t vga_mem_readb(void *opaque, target_phys_addr_t addr);
760void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val);
761void vga_invalidate_scanlines(VGAState *s, int y1, int y2);
762
763void vga_draw_cursor_line_8(uint8_t *d1, const uint8_t *src1,
764 int poffset, int w,
765 unsigned int color0, unsigned int color1,
766 unsigned int color_xor);
767void vga_draw_cursor_line_16(uint8_t *d1, const uint8_t *src1,
768 int poffset, int w,
769 unsigned int color0, unsigned int color1,
770 unsigned int color_xor);
771void vga_draw_cursor_line_32(uint8_t *d1, const uint8_t *src1,
772 int poffset, int w,
773 unsigned int color0, unsigned int color1,
774 unsigned int color_xor);
775
776extern const uint8_t sr_mask[8];
777extern const uint8_t gr_mask[16];
778#endif /* !VBOX */
779
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