VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA.h@ 57801

Last change on this file since 57801 was 57518, checked in by vboxsync, 9 years ago

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1/* $Id: DevVGA.h 57518 2015-08-24 22:58:38Z vboxsync $ */
2/** @file
3 * DevVGA - VBox VGA/VESA device, internal header.
4 */
5
6/*
7 * Copyright (C) 2006-2015 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 * --------------------------------------------------------------------
17 *
18 * This code is based on:
19 *
20 * QEMU internal VGA defines.
21 *
22 * Copyright (c) 2003-2004 Fabrice Bellard
23 *
24 * Permission is hereby granted, free of charge, to any person obtaining a copy
25 * of this software and associated documentation files (the "Software"), to deal
26 * in the Software without restriction, including without limitation the rights
27 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
28 * copies of the Software, and to permit persons to whom the Software is
29 * furnished to do so, subject to the following conditions:
30 *
31 * The above copyright notice and this permission notice shall be included in
32 * all copies or substantial portions of the Software.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
37 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
38 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
39 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
40 * THE SOFTWARE.
41 */
42
43/** Use VBE bytewise I/O. Only needed for Windows Longhorn/Vista betas and backwards compatibility. */
44#define VBE_BYTEWISE_IO
45
46/** Use VBE new dynamic mode list.
47 * If this is not defined, no checks are carried out to see if the modes all
48 * fit into the framebuffer! See the VRAM_SIZE_FIX define. */
49#define VBE_NEW_DYN_LIST
50
51#ifdef VBOX
52/** The default amount of VRAM. */
53# define VGA_VRAM_DEFAULT (_4M)
54/** The maximum amount of VRAM. Limited by VBOX_MAX_ALLOC_PAGE_COUNT. */
55# define VGA_VRAM_MAX (256 * _1M)
56/** The minimum amount of VRAM. */
57# define VGA_VRAM_MIN (_1M)
58#endif
59
60#include <VBox/Hardware/VBoxVideoVBE.h>
61
62#ifdef VBOX_WITH_HGSMI
63# include "HGSMI/HGSMIHost.h"
64#endif /* VBOX_WITH_HGSMI */
65#include "DevVGASavedState.h"
66
67#ifdef VBOX_WITH_VMSVGA
68# include "DevVGA-SVGA.h"
69#endif
70
71# include <iprt/list.h>
72
73#define MSR_COLOR_EMULATION 0x01
74#define MSR_PAGE_SELECT 0x20
75
76#define ST01_V_RETRACE 0x08
77#define ST01_DISP_ENABLE 0x01
78
79/* bochs VBE support */
80#define CONFIG_BOCHS_VBE
81
82#ifdef CONFIG_BOCHS_VBE
83
84/* Cross reference with <VBox/Hardware/VBoxVideoVBE.h> */
85#define VBE_DISPI_INDEX_NB_SAVED 0xb /* Number of saved registers (vbe_regs array) */
86#define VBE_DISPI_INDEX_NB 0xc /* Total number of VBE registers */
87
88#define VGA_STATE_COMMON_BOCHS_VBE \
89 uint16_t vbe_index; \
90 uint16_t vbe_regs[VBE_DISPI_INDEX_NB]; \
91 uint16_t alignment[3]; /* pad to 64 bits */ \
92 uint32_t vbe_start_addr; \
93 uint32_t vbe_line_offset; \
94 uint32_t vbe_bank_max;
95
96#else
97
98#define VGA_STATE_COMMON_BOCHS_VBE
99
100#endif /* !CONFIG_BOCHS_VBE */
101
102#define CH_ATTR_SIZE (160 * 100)
103#define VGA_MAX_HEIGHT VBE_DISPI_MAX_YRES
104
105typedef struct vga_retrace_s {
106 unsigned frame_cclks; /* Character clocks per frame. */
107 unsigned frame_ns; /* Frame duration in ns. */
108 unsigned cclk_ns; /* Character clock duration in ns. */
109 unsigned vb_start; /* Vertical blanking start (scanline). */
110 unsigned vb_end; /* Vertical blanking end (scanline). */
111 unsigned vb_end_ns; /* Vertical blanking end time (length) in ns. */
112 unsigned vs_start; /* Vertical sync start (scanline). */
113 unsigned vs_end; /* Vertical sync end (scanline). */
114 unsigned vs_start_ns; /* Vertical sync start time in ns. */
115 unsigned vs_end_ns; /* Vertical sync end time in ns. */
116 unsigned h_total; /* Horizontal total (cclks per scanline). */
117 unsigned h_total_ns; /* Scanline duration in ns. */
118 unsigned hb_start; /* Horizontal blanking start (cclk). */
119 unsigned hb_end; /* Horizontal blanking end (cclk). */
120 unsigned hb_end_ns; /* Horizontal blanking end time (length) in ns. */
121 unsigned v_freq_hz; /* Vertical refresh rate to emulate. */
122} vga_retrace_s;
123
124#ifndef VBOX
125#define VGA_STATE_COMMON \
126 uint8_t *vram_ptr; \
127 unsigned long vram_offset; \
128 unsigned int vram_size; \
129 uint32_t latch; \
130 uint8_t sr_index; \
131 uint8_t sr[256]; \
132 uint8_t gr_index; \
133 uint8_t gr[256]; \
134 uint8_t ar_index; \
135 uint8_t ar[21]; \
136 int ar_flip_flop; \
137 uint8_t cr_index; \
138 uint8_t cr[256]; /* CRT registers */ \
139 uint8_t msr; /* Misc Output Register */ \
140 uint8_t fcr; /* Feature Control Register */ \
141 uint8_t st00; /* status 0 */ \
142 uint8_t st01; /* status 1 */ \
143 uint8_t dac_state; \
144 uint8_t dac_sub_index; \
145 uint8_t dac_read_index; \
146 uint8_t dac_write_index; \
147 uint8_t dac_cache[3]; /* used when writing */ \
148 uint8_t palette[768]; \
149 int32_t bank_offset; \
150 int (*get_bpp)(struct VGAState *s); \
151 void (*get_offsets)(struct VGAState *s, \
152 uint32_t *pline_offset, \
153 uint32_t *pstart_addr, \
154 uint32_t *pline_compare); \
155 void (*get_resolution)(struct VGAState *s, \
156 int *pwidth, \
157 int *pheight); \
158 VGA_STATE_COMMON_BOCHS_VBE \
159 /* display refresh support */ \
160 DisplayState *ds; \
161 uint32_t font_offsets[2]; \
162 int graphic_mode; \
163 uint8_t shift_control; \
164 uint8_t double_scan; \
165 uint32_t line_offset; \
166 uint32_t line_compare; \
167 uint32_t start_addr; \
168 uint32_t plane_updated; \
169 uint8_t last_cw, last_ch; \
170 uint32_t last_width, last_height; /* in chars or pixels */ \
171 uint32_t last_scr_width, last_scr_height; /* in pixels */ \
172 uint8_t cursor_start, cursor_end; \
173 uint32_t cursor_offset; \
174 unsigned int (*rgb_to_pixel)(unsigned int r, \
175 unsigned int g, unsigned b); \
176 /* hardware mouse cursor support */ \
177 uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32]; \
178 void (*cursor_invalidate)(struct VGAState *s); \
179 void (*cursor_draw_line)(struct VGAState *s, uint8_t *d, int y); \
180 /* tell for each page if it has been updated since the last time */ \
181 uint32_t last_palette[256]; \
182 uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
183
184#else /* VBOX */
185
186/* bird: Since we've changed types, reordered members, done alignment
187 paddings and more, VGA_STATE_COMMON was added directly to the
188 struct to make it more readable and easier to handle. */
189
190struct VGAState;
191typedef int FNGETBPP(struct VGAState *s);
192typedef void FNGETOFFSETS(struct VGAState *s, uint32_t *pline_offset, uint32_t *pstart_addr, uint32_t *pline_compare);
193typedef void FNGETRESOLUTION(struct VGAState *s, int *pwidth, int *pheight);
194typedef unsigned int FNRGBTOPIXEL(unsigned int r, unsigned int g, unsigned b);
195typedef void FNCURSORINVALIDATE(struct VGAState *s);
196typedef void FNCURSORDRAWLINE(struct VGAState *s, uint8_t *d, int y);
197
198#endif /* VBOX */
199
200#ifdef VBOX_WITH_VDMA
201typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
202#endif
203
204#ifdef VBOX_WITH_VIDEOHWACCEL
205#define VBOX_VHWA_MAX_PENDING_COMMANDS 1000
206
207typedef struct _VBOX_VHWA_PENDINGCMD
208{
209 RTLISTNODE Node;
210 PVBOXVHWACMD pCommand;
211} VBOX_VHWA_PENDINGCMD;
212#endif
213
214#ifdef VBOX_WITH_VMSVGA
215
216#define VMSVGA_FIFO_EXTCMD_NONE 0
217#define VMSVGA_FIFO_EXTCMD_TERMINATE 1
218#define VMSVGA_FIFO_EXTCMD_SAVESTATE 2
219#define VMSVGA_FIFO_EXTCMD_LOADSTATE 3
220#define VMSVGA_FIFO_EXTCMD_RESET 4
221#define VMSVGA_FIFO_EXTCMD_UPDATE_SURFACE_HEAP_BUFFERS 5
222
223/** Size of the region to backup when switching into svga mode. */
224#define VMSVGA_FRAMEBUFFER_BACKUP_SIZE (32*1024)
225
226typedef struct
227{
228 PSSMHANDLE pSSM;
229 uint32_t uVersion;
230 uint32_t uPass;
231} VMSVGA_STATE_LOAD, *PVMSVGA_STATE_LOAD;
232
233/** Host screen viewport.
234 * (4th quadrant with negated Y values - usual Windows and X11 world view.) */
235typedef struct VMSVGAVIEWPORT
236{
237 uint32_t x; /**< x coordinate (left). */
238 uint32_t y; /**< y coordinate (top). */
239 uint32_t cx; /**< width. */
240 uint32_t cy; /**< height. */
241 /** Right side coordinate (exclusive). Same as x + cx. */
242 uint32_t xRight;
243 /** First quadrant low y coordinate.
244 * Same as y + cy - 1 in window coordinates. */
245 uint32_t yLowWC;
246 /** First quadrant high y coordinate (exclusive) - yLowWC + cy.
247 * Same as y - 1 in window coordinates. */
248 uint32_t yHighWC;
249 /** Alignment padding. */
250 uint32_t uAlignment;
251} VMSVGAVIEWPORT;
252
253/** Pointer to the private VMSVGA ring-3 state structure.
254 * @todo Still not entirely satisfired with the type name, but better than
255 * the previous lower/upper case only distinction. */
256typedef struct VMSVGAR3STATE *PVMSVGAR3STATE;
257/** Pointer to the private (implementation specific) VMSVGA3d state. */
258typedef struct VMSVGA3DSTATE *PVMSVGA3DSTATE;
259
260typedef struct VMSVGAState
261{
262 /** The host window handle */
263 uint64_t u64HostWindowId;
264 /** The R3 FIFO pointer. */
265 R3PTRTYPE(uint32_t *) pFIFOR3;
266 /** The R0 FIFO pointer. */
267 R0PTRTYPE(uint32_t *) pFIFOR0;
268 /** R3 Opaque pointer to svga state. */
269 R3PTRTYPE(PVMSVGAR3STATE) pSvgaR3State;
270 /** R3 Opaque pointer to 3d state. */
271 R3PTRTYPE(PVMSVGA3DSTATE) p3dState;
272 /** R3 Opaque pointer to a copy of the first 32k of the framebuffer before switching into svga mode. */
273 R3PTRTYPE(void *) pFrameBufferBackup;
274 /** R3 Opaque pointer to an external fifo cmd parameter. */
275 R3PTRTYPE(void * volatile) pvFIFOExtCmdParam;
276
277 /** Guest physical address of the FIFO memory range. */
278 RTGCPHYS GCPhysFIFO;
279 /** Size in bytes of the FIFO memory range. */
280 uint32_t cbFIFO;
281 /** SVGA id. */
282 uint32_t u32SVGAId;
283 /** SVGA extensions enabled or not. */
284 uint32_t fEnabled;
285 /** SVGA memory area configured status. */
286 uint32_t fConfigured;
287 /** Device is busy handling FIFO requests (VMSVGA_BUSY_F_FIFO,
288 * VMSVGA_BUSY_F_EMT_FORCE). */
289 uint32_t volatile fBusy;
290#define VMSVGA_BUSY_F_FIFO RT_BIT_32(0) /**< The normal true/false busy FIFO bit. */
291#define VMSVGA_BUSY_F_EMT_FORCE RT_BIT_32(1) /**< Bit preventing race status flickering when EMT kicks the FIFO thread. */
292 /** Traces (dirty page detection) enabled or not. */
293 uint32_t fTraces;
294 /** Guest OS identifier. */
295 uint32_t u32GuestId;
296 /** Scratch region size. */
297 uint32_t cScratchRegion;
298 /** Scratch array. */
299 uint32_t au32ScratchRegion[VMSVGA_SCRATCH_SIZE];
300 /** Irq status. */
301 uint32_t u32IrqStatus;
302 /** Irq mask. */
303 uint32_t u32IrqMask;
304 /** Pitch lock. */
305 uint32_t u32PitchLock;
306 /** Current GMR id. (SVGA_REG_GMR_ID) */
307 uint32_t u32CurrentGMRId;
308 /** Register caps. */
309 uint32_t u32RegCaps;
310 uint32_t Padding2;
311 /** Physical address of command mmio range. */
312 RTIOPORT BasePort;
313 /** Port io index register. */
314 uint32_t u32IndexReg;
315 /** The support driver session handle for use with FIFORequestSem. */
316 R3R0PTRTYPE(PSUPDRVSESSION) pSupDrvSession;
317 /** FIFO request semaphore. */
318 SUPSEMEVENT FIFORequestSem;
319 /** FIFO external command semaphore. */
320 R3PTRTYPE(RTSEMEVENT) FIFOExtCmdSem;
321 /** FIFO IO Thread. */
322 R3PTRTYPE(PPDMTHREAD) pFIFOIOThread;
323 uint32_t uWidth;
324 uint32_t uHeight;
325 uint32_t uBpp;
326 uint32_t cbScanline;
327 /** Maximum width supported. */
328 uint32_t u32MaxWidth;
329 /** Maximum height supported. */
330 uint32_t u32MaxHeight;
331 /** Viewport rectangle, i.e. what's currently visible of the target host
332 * window. This is usually (0,0)(uWidth,uHeight), but if the window is
333 * shrunk and scrolling applied, both the origin and size may differ. */
334 VMSVGAVIEWPORT viewport;
335 /** Action flags */
336 uint32_t u32ActionFlags;
337 /** SVGA 3d extensions enabled or not. */
338 bool f3DEnabled;
339 /** VRAM page monitoring enabled or not. */
340 bool fVRAMTracking;
341 /** External command to be executed in the FIFO thread. */
342 uint8_t volatile u8FIFOExtCommand;
343 /** Set by vmsvgaR3RunExtCmdOnFifoThread when it temporarily resumes the FIFO
344 * thread and does not want it do anything but the command. */
345 bool volatile fFifoExtCommandWakeup;
346# if defined(DEBUG_GMR_ACCESS) || defined(DEBUG_FIFO_ACCESS)
347 /** GMR debug access handler type handle. */
348 PGMPHYSHANDLERTYPE hGmrAccessHandlerType;
349 /** FIFO debug access handler type handle. */
350 PGMPHYSHANDLERTYPE hFifoAccessHandlerType;
351# endif
352} VMSVGAState;
353#endif /* VBOX_WITH_VMSVGA */
354
355
356typedef struct VGAState {
357#ifndef VBOX
358 VGA_STATE_COMMON
359#else /* VBOX */
360 R3PTRTYPE(uint8_t *) vram_ptrR3;
361 R3PTRTYPE(FNGETBPP *) get_bpp;
362 R3PTRTYPE(FNGETOFFSETS *) get_offsets;
363 R3PTRTYPE(FNGETRESOLUTION *) get_resolution;
364 R3PTRTYPE(FNRGBTOPIXEL *) rgb_to_pixel;
365 R3PTRTYPE(FNCURSORINVALIDATE *) cursor_invalidate;
366 R3PTRTYPE(FNCURSORDRAWLINE *) cursor_draw_line;
367 RTR3PTR R3PtrCmnAlignment;
368 uint32_t vram_size;
369 uint32_t latch;
370 uint8_t sr_index;
371 uint8_t sr[256];
372 uint8_t gr_index;
373 uint8_t gr[256];
374 uint8_t ar_index;
375 uint8_t ar[21];
376 int32_t ar_flip_flop;
377 uint8_t cr_index;
378 uint8_t cr[256]; /* CRT registers */
379 uint8_t msr; /* Misc Output Register */
380 uint8_t fcr; /* Feature Control Register */
381 uint8_t st00; /* status 0 */
382 uint8_t st01; /* status 1 */
383 uint8_t dac_state;
384 uint8_t dac_sub_index;
385 uint8_t dac_read_index;
386 uint8_t dac_write_index;
387 uint8_t dac_cache[3]; /* used when writing */
388 uint8_t palette[768];
389 int32_t bank_offset;
390 VGA_STATE_COMMON_BOCHS_VBE
391 /* display refresh support */
392 uint32_t font_offsets[2];
393 int32_t graphic_mode;
394 uint8_t shift_control;
395 uint8_t double_scan;
396 uint8_t padding1[2];
397 uint32_t line_offset;
398 uint32_t line_compare;
399 uint32_t start_addr;
400 uint32_t plane_updated;
401 uint8_t last_cw, last_ch, padding2[2];
402 uint32_t last_width, last_height; /* in chars or pixels */
403 uint32_t last_scr_width, last_scr_height; /* in pixels */
404 uint32_t last_bpp;
405 uint8_t cursor_start, cursor_end, padding3[2];
406 uint32_t cursor_offset;
407 /* hardware mouse cursor support */
408 uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32];
409 /* tell for each page if it has been updated since the last time */
410 uint32_t last_palette[256];
411 uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
412
413 /** end-of-common-state-marker */
414 uint32_t u32Marker;
415
416 /** Pointer to the device instance - RC Ptr. */
417 PPDMDEVINSRC pDevInsRC;
418 /** Pointer to the GC vram mapping. */
419 RCPTRTYPE(uint8_t *) vram_ptrRC;
420 uint32_t Padding1;
421
422 /** Pointer to the device instance - R3 Ptr. */
423 PPDMDEVINSR3 pDevInsR3;
424# ifdef VBOX_WITH_HGSMI
425 R3PTRTYPE(PHGSMIINSTANCE) pHGSMI;
426# endif
427# ifdef VBOX_WITH_VDMA
428 R3PTRTYPE(PVBOXVDMAHOST) pVdma;
429# endif
430 /** LUN\#0: The display port base interface. */
431 PDMIBASE IBase;
432 /** LUN\#0: The display port interface. */
433 PDMIDISPLAYPORT IPort;
434# if defined(VBOX_WITH_HGSMI) && (defined(VBOX_WITH_VIDEOHWACCEL) || defined(VBOX_WITH_CRHGSMI))
435 /** LUN\#0: VBVA callbacks interface */
436 PDMIDISPLAYVBVACALLBACKS IVBVACallbacks;
437# else
438 RTR3PTR Padding2;
439# endif
440 /** Status LUN\#0: Leds interface. */
441 PDMILEDPORTS ILeds;
442
443 /** Pointer to base interface of the driver. */
444 R3PTRTYPE(PPDMIBASE) pDrvBase;
445 /** Pointer to display connector interface of the driver. */
446 R3PTRTYPE(PPDMIDISPLAYCONNECTOR) pDrv;
447
448 /** Status LUN: Partner of ILeds. */
449 R3PTRTYPE(PPDMILEDCONNECTORS) pLedsConnector;
450 /** Status LUN: Media Notifys. */
451 R3PTRTYPE(PPDMIMEDIANOTIFY) pMediaNotify;
452
453 /** Refresh timer handle - HC. */
454 PTMTIMERR3 RefreshTimer;
455
456 /** Pointer to the device instance - R0 Ptr. */
457 PPDMDEVINSR0 pDevInsR0;
458 /** The R0 vram pointer... */
459 R0PTRTYPE(uint8_t *) vram_ptrR0;
460
461# if HC_ARCH_BITS == 32
462 uint32_t Padding3;
463# endif
464
465# ifdef VBOX_WITH_VMSVGA
466 VMSVGAState svga;
467# endif
468
469 /** The number of monitors. */
470 uint32_t cMonitors;
471 /** Current refresh timer interval. */
472 uint32_t cMilliesRefreshInterval;
473 /** Bitmap tracking dirty pages. */
474 uint32_t au32DirtyBitmap[VGA_VRAM_MAX / PAGE_SIZE / 32];
475
476 /** Flag indicating that there are dirty bits. This is used to optimize the handler resetting. */
477 bool fHasDirtyBits;
478 /** LFB was updated flag. */
479 bool fLFBUpdated;
480 /** Indicates if the GC extensions are enabled or not. */
481 bool fGCEnabled;
482 /** Indicates if the R0 extensions are enabled or not. */
483 bool fR0Enabled;
484 /** Flag indicating that the VGA memory in the 0xa0000-0xbffff region has been remapped to allow direct access. */
485 bool fRemappedVGA;
486 /** Whether to render the guest VRAM to the framebuffer memory. False only for some LFB modes. */
487 bool fRenderVRAM;
488# ifdef VBOX_WITH_VMSVGA
489 /* Whether the SVGA emulation is enabled or not. */
490 bool fVMSVGAEnabled;
491 bool Padding4[1+4];
492# else
493 bool Padding4[2+4];
494# endif
495
496 /** Physical access type for the linear frame buffer dirty page tracking. */
497 PGMPHYSHANDLERTYPE hLfbAccessHandlerType;
498
499 /** The physical address the VRAM was assigned. */
500 RTGCPHYS GCPhysVRAM;
501 /** The critical section protect the instance data. */
502 PDMCRITSECT CritSect;
503 /** The PCI device. */
504 PCIDEVICE Dev;
505
506 STAMPROFILE StatRZMemoryRead;
507 STAMPROFILE StatR3MemoryRead;
508 STAMPROFILE StatRZMemoryWrite;
509 STAMPROFILE StatR3MemoryWrite;
510 STAMCOUNTER StatMapPage; /**< Counts IOMMMIOMapMMIO2Page calls. */
511 STAMCOUNTER StatUpdateDisp; /**< Counts vgaPortUpdateDisplay calls. */
512
513 /* Keep track of ring 0 latched accesses to the VGA MMIO memory. */
514 uint64_t u64LastLatchedAccess;
515 uint32_t cLatchAccesses;
516 uint16_t uMaskLatchAccess;
517 uint16_t iMask;
518
519# ifdef VBE_BYTEWISE_IO
520 /** VBE read/write data/index flags */
521 uint8_t fReadVBEData;
522 uint8_t fWriteVBEData;
523 uint8_t fReadVBEIndex;
524 uint8_t fWriteVBEIndex;
525 /** VBE write data/index one byte buffer */
526 uint8_t cbWriteVBEData;
527 uint8_t cbWriteVBEIndex;
528# ifdef VBE_NEW_DYN_LIST
529 /** VBE Extra Data write address one byte buffer */
530 uint8_t cbWriteVBEExtraAddress;
531 uint8_t Padding5;
532# else
533 uint8_t Padding5[2];
534# endif
535# endif
536
537 /** Retrace emulation state */
538 bool fRealRetrace;
539 bool Padding6[HC_ARCH_BITS == 64 ? 7 : 3];
540 vga_retrace_s retrace_state;
541
542# ifdef VBE_NEW_DYN_LIST
543 /** The VBE BIOS extra data. */
544 R3PTRTYPE(uint8_t *) pbVBEExtraData;
545 /** The size of the VBE BIOS extra data. */
546 uint16_t cbVBEExtraData;
547 /** The VBE BIOS current memory address. */
548 uint16_t u16VBEExtraAddress;
549 uint16_t Padding7[2];
550# endif
551
552 /** The BIOS logo data. */
553 R3PTRTYPE(uint8_t *) pbLogo;
554 /** The name of the logo file. */
555 R3PTRTYPE(char *) pszLogoFile;
556 /** Bitmap image data. */
557 R3PTRTYPE(uint8_t *) pbLogoBitmap;
558 /** Current logo data offset. */
559 uint32_t offLogoData;
560 /** The size of the BIOS logo data. */
561 uint32_t cbLogo;
562 /** Current logo command. */
563 uint16_t LogoCommand;
564 /** Bitmap width. */
565 uint16_t cxLogo;
566 /** Bitmap height. */
567 uint16_t cyLogo;
568 /** Bitmap planes. */
569 uint16_t cLogoPlanes;
570 /** Bitmap depth. */
571 uint16_t cLogoBits;
572 /** Bitmap compression. */
573 uint16_t LogoCompression;
574 /** Bitmap colors used. */
575 uint16_t cLogoUsedColors;
576 /** Palette size. */
577 uint16_t cLogoPalEntries;
578 /** Clear screen flag. */
579 uint8_t fLogoClearScreen;
580 uint8_t Padding8[7];
581 /** Palette data. */
582 uint32_t au32LogoPalette[256];
583
584 /** The VGA BIOS ROM data. */
585 R3PTRTYPE(uint8_t *) pbVgaBios;
586 /** The size of the VGA BIOS ROM. */
587 uint64_t cbVgaBios;
588 /** The name of the VGA BIOS ROM file. */
589 R3PTRTYPE(char *) pszVgaBiosFile;
590
591# ifdef VBOX_WITH_HGSMI
592 /** Base port in the assigned PCI I/O space. */
593 RTIOPORT IOPortBase;
594# ifdef VBOX_WITH_WDDM
595 uint8_t Padding9[2];
596 /** Specifies guest driver caps, i.e. whether it can handle IRQs from the
597 * adapter, the way it can handle async HGSMI command completion, etc. */
598 uint32_t fGuestCaps;
599 uint32_t fScanLineCfg;
600 uint32_t fHostCursorCapabilities;
601# else
602 uint8_t Padding10[14];
603# endif
604# endif /* VBOX_WITH_HGSMI */
605
606 PDMLED Led3D;
607
608 struct {
609 volatile uint32_t cPending;
610 uint32_t Padding1;
611 union
612 {
613 RTLISTNODE PendingList;
614 /* make sure the structure sized cross different contexts correctly */
615 struct
616 {
617 R3PTRTYPE(void *) dummy1;
618 R3PTRTYPE(void *) dummy2;
619 } dummy;
620 };
621 } pendingVhwaCommands;
622#endif /* VBOX */
623} VGAState;
624#ifdef VBOX
625/** VGA state. */
626typedef VGAState VGASTATE;
627/** Pointer to the VGA state. */
628typedef VGASTATE *PVGASTATE;
629AssertCompileMemberAlignment(VGASTATE, bank_offset, 8);
630AssertCompileMemberAlignment(VGASTATE, font_offsets, 8);
631AssertCompileMemberAlignment(VGASTATE, last_ch_attr, 8);
632AssertCompileMemberAlignment(VGASTATE, u32Marker, 8);
633#endif
634
635#ifdef VBE_NEW_DYN_LIST
636/**
637 * VBE Bios Extra Data structure.
638 * @remark duplicated in vbe.h.
639 */
640typedef struct VBEHeader
641{
642 /** Signature (VBEHEADER_MAGIC). */
643 uint16_t u16Signature;
644 /** Data size. */
645 uint16_t cbData;
646} VBEHeader;
647
648/** VBE Extra Data. */
649typedef VBEHeader VBEHEADER;
650/** Pointer to the VBE Extra Data. */
651typedef VBEHEADER *PVBEHEADER;
652
653/** The value of the VBEHEADER::u16Signature field.
654 * @remark duplicated in vbe.h. */
655#define VBEHEADER_MAGIC 0x77CC
656
657/** The extra port which is used to read the mode list.
658 * @remark duplicated in vbe.h. */
659#define VBE_EXTRA_PORT 0x3b6
660
661/** The extra port which is used for debug printf.
662 * @remark duplicated in vbe.h. */
663#define VBE_PRINTF_PORT 0x3b7
664
665#endif /* VBE_NEW_DYN_LIST */
666
667#if !defined(VBOX) || defined(IN_RING3)
668static inline int c6_to_8(int v)
669{
670 int b;
671 v &= 0x3f;
672 b = v & 1;
673 return (v << 2) | (b << 1) | b;
674}
675#endif /* !VBOX || IN_RING3 */
676
677
678#ifdef VBOX_WITH_HGSMI
679int VBVAInit (PVGASTATE pVGAState);
680void VBVADestroy (PVGASTATE pVGAState);
681int VBVAUpdateDisplay (PVGASTATE pVGAState);
682void VBVAReset (PVGASTATE pVGAState);
683void VBVAPause (PVGASTATE pVGAState, bool fPause);
684
685bool VBVAIsEnabled(PVGASTATE pVGAState);
686
687void VBVARaiseIrq (PVGASTATE pVGAState, uint32_t fFlags);
688void VBVARaiseIrqNoWait(PVGASTATE pVGAState, uint32_t fFlags);
689
690int VBVAInfoView(PVGASTATE pVGAState, const VBVAINFOVIEW *pView);
691int VBVAInfoScreen(PVGASTATE pVGAState, const VBVAINFOSCREEN *pScreen);
692int VBVAGetInfoViewAndScreen(PVGASTATE pVGAState, uint32_t u32ViewIndex, VBVAINFOVIEW *pView, VBVAINFOSCREEN *pScreen);
693
694/* @return host-guest flags that were set on reset
695 * this allows the caller to make further cleaning when needed,
696 * e.g. reset the IRQ */
697uint32_t HGSMIReset (PHGSMIINSTANCE pIns);
698
699# ifdef VBOX_WITH_VIDEOHWACCEL
700DECLCALLBACK(int) vbvaVHWACommandCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface, PVBOXVHWACMD pCmd);
701int vbvaVHWAConstruct (PVGASTATE pVGAState);
702int vbvaVHWAReset (PVGASTATE pVGAState);
703
704void vbvaTimerCb(PVGASTATE pVGAState);
705
706int vboxVBVASaveStatePrep (PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
707int vboxVBVASaveStateDone (PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
708# endif
709
710#ifdef VBOX_WITH_HGSMI
711#define PPDMIDISPLAYVBVACALLBACKS_2_PVGASTATE(_pcb) ( (PVGASTATE)((uint8_t *)(_pcb) - RT_OFFSETOF(VGASTATE, IVBVACallbacks)) )
712#endif
713
714# ifdef VBOX_WITH_CRHGSMI
715DECLCALLBACK(int) vboxVDMACrHgsmiCommandCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface,
716 PVBOXVDMACMD_CHROMIUM_CMD pCmd, int rc);
717DECLCALLBACK(int) vboxVDMACrHgsmiControlCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface,
718 PVBOXVDMACMD_CHROMIUM_CTL pCmd, int rc);
719DECLCALLBACK(int) vboxCmdVBVACmdHostCtl(PPDMIDISPLAYVBVACALLBACKS pInterface,
720 struct VBOXCRCMDCTL* pCmd, uint32_t cbCmd,
721 PFNCRCTLCOMPLETION pfnCompletion,
722 void *pvCompletion);
723DECLCALLBACK(int) vboxCmdVBVACmdHostCtlSync(PPDMIDISPLAYVBVACALLBACKS pInterface,
724 struct VBOXCRCMDCTL* pCmd, uint32_t cbCmd);
725# endif
726
727int vboxVBVASaveStateExec (PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
728int vboxVBVALoadStateExec (PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t u32Version);
729int vboxVBVALoadStateDone (PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
730
731DECLCALLBACK(int) vgaUpdateDisplayAll(PVGASTATE pThis, bool fFailOnResize);
732DECLCALLBACK(int) vbvaPortSendModeHint(PPDMIDISPLAYPORT pInterface, uint32_t cx,
733 uint32_t cy, uint32_t cBPP,
734 uint32_t cDisplay, uint32_t dx,
735 uint32_t dy, uint32_t fEnabled,
736 uint32_t fNotifyGuest);
737DECLCALLBACK(void) vbvaPortReportHostCursorCapabilities(PPDMIDISPLAYPORT pInterface, uint32_t fCapabilitiesAdded,
738 uint32_t fCapabilitiesRemoved);
739DECLCALLBACK(void) vbvaPortReportHostCursorPosition(PPDMIDISPLAYPORT pInterface, uint32_t x, uint32_t y);
740
741# ifdef VBOX_WITH_VDMA
742typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
743int vboxVDMAConstruct(PVGASTATE pVGAState, uint32_t cPipeElements);
744int vboxVDMADestruct(PVBOXVDMAHOST pVdma);
745int vboxVDMAReset(PVBOXVDMAHOST pVdma);
746void vboxVDMAControl(PVBOXVDMAHOST pVdma, PVBOXVDMA_CTL pCmd, uint32_t cbCmd);
747void vboxVDMACommand(PVBOXVDMAHOST pVdma, PVBOXVDMACBUF_DR pCmd, uint32_t cbCmd);
748int vboxVDMASaveStateExecPrep(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM);
749int vboxVDMASaveStateExecDone(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM);
750int vboxVDMASaveStateExecPerform(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM);
751int vboxVDMASaveLoadExecPerform(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM, uint32_t u32Version);
752int vboxVDMASaveLoadDone(struct VBOXVDMAHOST *pVdma);
753# endif /* VBOX_WITH_VDMA */
754
755# ifdef VBOX_WITH_CRHGSMI
756int vboxCmdVBVACmdSubmit(PVGASTATE pVGAState);
757int vboxCmdVBVACmdFlush(PVGASTATE pVGAState);
758void vboxCmdVBVACmdTimer(PVGASTATE pVGAState);
759int vboxCmdVBVACmdCtl(PVGASTATE pVGAState, VBOXCMDVBVA_CTL *pCtl, uint32_t cbCtl);
760bool vboxCmdVBVAIsEnabled(PVGASTATE pVGAState);
761# endif /* VBOX_WITH_CRHGSMI */
762#endif /* VBOX_WITH_HGSMI */
763
764# ifdef VBOX_WITH_VMSVGA
765int vgaR3RegisterVRAMHandler(PVGASTATE pVGAState, uint64_t cbFrameBuffer);
766int vgaR3UnregisterVRAMHandler(PVGASTATE pVGAState);
767int vgaR3UpdateDisplay(PVGASTATE pVGAState, unsigned xStart, unsigned yStart, unsigned width, unsigned height);
768# endif
769
770#ifndef VBOX
771void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base,
772 unsigned long vga_ram_offset, int vga_ram_size);
773uint32_t vga_mem_readb(void *opaque, target_phys_addr_t addr);
774void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val);
775void vga_invalidate_scanlines(VGAState *s, int y1, int y2);
776
777void vga_draw_cursor_line_8(uint8_t *d1, const uint8_t *src1,
778 int poffset, int w,
779 unsigned int color0, unsigned int color1,
780 unsigned int color_xor);
781void vga_draw_cursor_line_16(uint8_t *d1, const uint8_t *src1,
782 int poffset, int w,
783 unsigned int color0, unsigned int color1,
784 unsigned int color_xor);
785void vga_draw_cursor_line_32(uint8_t *d1, const uint8_t *src1,
786 int poffset, int w,
787 unsigned int color0, unsigned int color1,
788 unsigned int color_xor);
789
790extern const uint8_t sr_mask[8];
791extern const uint8_t gr_mask[16];
792#endif /* !VBOX */
793
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