DevVGA.h@ 74474

Last change on this file since 74474 was 74474, checked in by vboxsync, 6 years ago
Main,Devices: Graphics controller updates. bugref:8893
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1	/* $Id: DevVGA.h 74474 2018-09-26 11:55:47Z vboxsync $ */
2	/** @file
3	* DevVGA - VBox VGA/VESA device, internal header.
4	*/
5
6	/*
7	* Copyright (C) 2006-2017 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	* --------------------------------------------------------------------
17	*
18	* This code is based on:
19	*
20	* QEMU internal VGA defines.
21	*
22	* Copyright (c) 2003-2004 Fabrice Bellard
23	*
24	* Permission is hereby granted, free of charge, to any person obtaining a copy
25	* of this software and associated documentation files (the "Software"), to deal
26	* in the Software without restriction, including without limitation the rights
27	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
28	* copies of the Software, and to permit persons to whom the Software is
29	* furnished to do so, subject to the following conditions:
30	*
31	* The above copyright notice and this permission notice shall be included in
32	* all copies or substantial portions of the Software.
33	*
34	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
37	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
38	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
39	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
40	* THE SOFTWARE.
41	*/
42
43	/** Use VBE bytewise I/O. Only needed for Windows Longhorn/Vista betas and backwards compatibility. */
44	#define VBE_BYTEWISE_IO
45
46	#ifdef VBOX
47	/** The default amount of VRAM. */
48	# define VGA_VRAM_DEFAULT (_4M)
49	/** The maximum amount of VRAM. Limited by VBOX_MAX_ALLOC_PAGE_COUNT. */
50	# define VGA_VRAM_MAX (256 * _1M)
51	/** The minimum amount of VRAM. */
52	# define VGA_VRAM_MIN (_1M)
53	#endif
54
55	#include <VBoxVideoVBE.h>
56	#include <VBoxVideoVBEPrivate.h>
57
58	#ifdef VBOX_WITH_HGSMI
59	# include "HGSMI/HGSMIHost.h"
60	#endif /* VBOX_WITH_HGSMI */
61	#include "DevVGASavedState.h"
62
63	#ifdef VBOX_WITH_VMSVGA
64	# include "DevVGA-SVGA.h"
65	#endif
66
67	#include <iprt/list.h>
68
69	#define MSR_COLOR_EMULATION 0x01
70	#define MSR_PAGE_SELECT 0x20
71
72	#define ST01_V_RETRACE 0x08
73	#define ST01_DISP_ENABLE 0x01
74
75	/* bochs VBE support */
76	#define CONFIG_BOCHS_VBE
77
78	#ifdef CONFIG_BOCHS_VBE
79
80	/* Cross reference with <VBoxVideoVBE.h> */
81	#define VBE_DISPI_INDEX_NB_SAVED 0xb /* Old number of saved registers (vbe_regs array, see vga_load) */
82	#define VBE_DISPI_INDEX_NB 0xd /* Total number of VBE registers */
83
84	#define VGA_STATE_COMMON_BOCHS_VBE \
85	uint16_t vbe_index; \
86	uint16_t vbe_regs[VBE_DISPI_INDEX_NB]; \
87	uint16_t alignment[2]; /* pad to 64 bits */ \
88	uint32_t vbe_start_addr; \
89	uint32_t vbe_line_offset; \
90	uint32_t vbe_bank_max;
91
92	#else
93
94	#define VGA_STATE_COMMON_BOCHS_VBE
95
96	#endif /* !CONFIG_BOCHS_VBE */
97
98	#define CH_ATTR_SIZE (160 * 100)
99	#define VGA_MAX_HEIGHT VBE_DISPI_MAX_YRES
100
101	typedef struct vga_retrace_s {
102	unsigned frame_cclks; /* Character clocks per frame. */
103	unsigned frame_ns; /* Frame duration in ns. */
104	unsigned cclk_ns; /* Character clock duration in ns. */
105	unsigned vb_start; /* Vertical blanking start (scanline). */
106	unsigned vb_end; /* Vertical blanking end (scanline). */
107	unsigned vb_end_ns; /* Vertical blanking end time (length) in ns. */
108	unsigned vs_start; /* Vertical sync start (scanline). */
109	unsigned vs_end; /* Vertical sync end (scanline). */
110	unsigned vs_start_ns; /* Vertical sync start time in ns. */
111	unsigned vs_end_ns; /* Vertical sync end time in ns. */
112	unsigned h_total; /* Horizontal total (cclks per scanline). */
113	unsigned h_total_ns; /* Scanline duration in ns. */
114	unsigned hb_start; /* Horizontal blanking start (cclk). */
115	unsigned hb_end; /* Horizontal blanking end (cclk). */
116	unsigned hb_end_ns; /* Horizontal blanking end time (length) in ns. */
117	unsigned v_freq_hz; /* Vertical refresh rate to emulate. */
118	} vga_retrace_s;
119
120	#ifndef VBOX
121	#define VGA_STATE_COMMON \
122	uint8_t *vram_ptr; \
123	unsigned long vram_offset; \
124	unsigned int vram_size; \
125	uint32_t latch; \
126	uint8_t sr_index; \
127	uint8_t sr[256]; \
128	uint8_t gr_index; \
129	uint8_t gr[256]; \
130	uint8_t ar_index; \
131	uint8_t ar[21]; \
132	int ar_flip_flop; \
133	uint8_t cr_index; \
134	uint8_t cr[256]; /* CRT registers */ \
135	uint8_t msr; /* Misc Output Register */ \
136	uint8_t fcr; /* Feature Control Register */ \
137	uint8_t st00; /* status 0 */ \
138	uint8_t st01; /* status 1 */ \
139	uint8_t dac_state; \
140	uint8_t dac_sub_index; \
141	uint8_t dac_read_index; \
142	uint8_t dac_write_index; \
143	uint8_t dac_cache[3]; /* used when writing */ \
144	uint8_t palette[768]; \
145	int32_t bank_offset; \
146	int (get_bpp)(struct VGAState s); \
147	void (get_offsets)(struct VGAState s, \
148	uint32_t *pline_offset, \
149	uint32_t *pstart_addr, \
150	uint32_t *pline_compare); \
151	void (get_resolution)(struct VGAState s, \
152	int *pwidth, \
153	int *pheight); \
154	VGA_STATE_COMMON_BOCHS_VBE \
155	/* display refresh support */ \
156	DisplayState *ds; \
157	uint32_t font_offsets[2]; \
158	int graphic_mode; \
159	uint8_t shift_control; \
160	uint8_t double_scan; \
161	uint32_t line_offset; \
162	uint32_t line_compare; \
163	uint32_t start_addr; \
164	uint32_t plane_updated; \
165	uint8_t last_cw, last_ch; \
166	uint32_t last_width, last_height; /* in chars or pixels */ \
167	uint32_t last_scr_width, last_scr_height; /* in pixels */ \
168	uint8_t cursor_start, cursor_end; \
169	uint32_t cursor_offset; \
170	unsigned int (*rgb_to_pixel)(unsigned int r, \
171	unsigned int g, unsigned b); \
172	/* hardware mouse cursor support */ \
173	uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32]; \
174	void (cursor_invalidate)(struct VGAState s); \
175	void (cursor_draw_line)(struct VGAState s, uint8_t *d, int y); \
176	/* tell for each page if it has been updated since the last time */ \
177	uint32_t last_palette[256]; \
178	uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
179
180	#else /* VBOX */
181
182	/* bird: Since we've changed types, reordered members, done alignment
183	paddings and more, VGA_STATE_COMMON was added directly to the
184	struct to make it more readable and easier to handle. */
185
186	struct VGAState;
187	typedef int FNGETBPP(struct VGAState *s);
188	typedef void FNGETOFFSETS(struct VGAState s, uint32_t pline_offset, uint32_t pstart_addr, uint32_t pline_compare);
189	typedef void FNGETRESOLUTION(struct VGAState s, int pwidth, int *pheight);
190	typedef unsigned int FNRGBTOPIXEL(unsigned int r, unsigned int g, unsigned b);
191	typedef void FNCURSORINVALIDATE(struct VGAState *s);
192	typedef void FNCURSORDRAWLINE(struct VGAState s, uint8_t d, int y);
193
194	#endif /* VBOX */
195
196	#ifdef VBOX_WITH_VDMA
197	typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
198	#endif
199
200	#ifdef VBOX_WITH_VIDEOHWACCEL
201	#define VBOX_VHWA_MAX_PENDING_COMMANDS 1000
202
203	typedef struct _VBOX_VHWA_PENDINGCMD
204	{
205	RTLISTNODE Node;
206	VBOXVHWACMD RT_UNTRUSTED_VOLATILE_GUEST *pCommand;
207	} VBOX_VHWA_PENDINGCMD;
208	#endif
209
210
211	typedef struct VGAState {
212	#ifndef VBOX
213	VGA_STATE_COMMON
214	#else /* VBOX */
215	R3PTRTYPE(uint8_t *) vram_ptrR3;
216	R3PTRTYPE(FNGETBPP *) get_bpp;
217	R3PTRTYPE(FNGETOFFSETS *) get_offsets;
218	R3PTRTYPE(FNGETRESOLUTION *) get_resolution;
219	R3PTRTYPE(FNRGBTOPIXEL *) rgb_to_pixel;
220	R3PTRTYPE(FNCURSORINVALIDATE *) cursor_invalidate;
221	R3PTRTYPE(FNCURSORDRAWLINE *) cursor_draw_line;
222	RTR3PTR R3PtrCmnAlignment;
223	uint32_t vram_size;
224	uint32_t latch;
225	uint8_t sr_index;
226	uint8_t sr[256];
227	uint8_t gr_index;
228	uint8_t gr[256];
229	uint8_t ar_index;
230	uint8_t ar[21];
231	int32_t ar_flip_flop;
232	uint8_t cr_index;
233	uint8_t cr[256]; /* CRT registers */
234	uint8_t msr; /* Misc Output Register */
235	uint8_t fcr; /* Feature Control Register */
236	uint8_t st00; /* status 0 */
237	uint8_t st01; /* status 1 */
238	uint8_t dac_state;
239	uint8_t dac_sub_index;
240	uint8_t dac_read_index;
241	uint8_t dac_write_index;
242	uint8_t dac_cache[3]; /* used when writing */
243	uint8_t palette[768];
244	int32_t bank_offset;
245	VGA_STATE_COMMON_BOCHS_VBE
246	/* display refresh support */
247	uint32_t font_offsets[2];
248	int32_t graphic_mode;
249	uint8_t shift_control;
250	uint8_t double_scan;
251	uint8_t padding1[2];
252	uint32_t line_offset;
253	uint32_t vga_addr_mask;
254	uint32_t padding1a;
255	uint32_t line_compare;
256	uint32_t start_addr;
257	uint32_t plane_updated;
258	uint8_t last_cw, last_ch, padding2[2];
259	uint32_t last_width, last_height; /* in chars or pixels */
260	uint32_t last_scr_width, last_scr_height; /* in pixels */
261	uint32_t last_bpp;
262	uint8_t cursor_start, cursor_end;
263	bool last_cur_blink, last_chr_blink;
264	uint32_t cursor_offset;
265	/* hardware mouse cursor support */
266	uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32];
267	/* tell for each page if it has been updated since the last time */
268	uint32_t last_palette[256];
269	uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
270
271	/** end-of-common-state-marker */
272	uint32_t u32Marker;
273
274	/** Pointer to the device instance - RC Ptr. */
275	PPDMDEVINSRC pDevInsRC;
276	/** Pointer to the GC vram mapping. */
277	RCPTRTYPE(uint8_t *) vram_ptrRC;
278	uint32_t Padding1;
279
280	/** Pointer to the device instance - R3 Ptr. */
281	PPDMDEVINSR3 pDevInsR3;
282	# ifdef VBOX_WITH_HGSMI
283	R3PTRTYPE(PHGSMIINSTANCE) pHGSMI;
284	# endif
285	# ifdef VBOX_WITH_VDMA
286	R3PTRTYPE(PVBOXVDMAHOST) pVdma;
287	# endif
288	/** LUN\#0: The display port base interface. */
289	PDMIBASE IBase;
290	/** LUN\#0: The display port interface. */
291	PDMIDISPLAYPORT IPort;
292	# if defined(VBOX_WITH_HGSMI) && (defined(VBOX_WITH_VIDEOHWACCEL) \|\| defined(VBOX_WITH_CRHGSMI))
293	/** LUN\#0: VBVA callbacks interface */
294	PDMIDISPLAYVBVACALLBACKS IVBVACallbacks;
295	# else
296	RTR3PTR Padding2;
297	# endif
298	/** Status LUN: Leds interface. */
299	PDMILEDPORTS ILeds;
300
301	/** Pointer to base interface of the driver. */
302	R3PTRTYPE(PPDMIBASE) pDrvBase;
303	/** Pointer to display connector interface of the driver. */
304	R3PTRTYPE(PPDMIDISPLAYCONNECTOR) pDrv;
305
306	/** Status LUN: Partner of ILeds. */
307	R3PTRTYPE(PPDMILEDCONNECTORS) pLedsConnector;
308
309	/** Refresh timer handle - HC. */
310	PTMTIMERR3 RefreshTimer;
311
312	/** Pointer to the device instance - R0 Ptr. */
313	PPDMDEVINSR0 pDevInsR0;
314	/** The R0 vram pointer... */
315	R0PTRTYPE(uint8_t *) vram_ptrR0;
316
317	# ifdef VBOX_WITH_VMSVGA
318	VMSVGAState svga;
319	# endif
320
321	/** The number of monitors. */
322	uint32_t cMonitors;
323	/** Current refresh timer interval. */
324	uint32_t cMilliesRefreshInterval;
325	/** Bitmap tracking dirty pages. */
326	uint32_t au32DirtyBitmap[VGA_VRAM_MAX / PAGE_SIZE / 32];
327
328	/** Flag indicating that there are dirty bits. This is used to optimize the handler resetting. */
329	bool fHasDirtyBits;
330	/** LFB was updated flag. */
331	bool fLFBUpdated;
332	/** Indicates if the GC extensions are enabled or not. */
333	bool fGCEnabled;
334	/** Indicates if the R0 extensions are enabled or not. */
335	bool fR0Enabled;
336	/** Flag indicating that the VGA memory in the 0xa0000-0xbffff region has been remapped to allow direct access. */
337	bool fRemappedVGA;
338	/** Whether to render the guest VRAM to the framebuffer memory. False only for some LFB modes. */
339	bool fRenderVRAM;
340	/** Whether 3D is enabled for the VM. */
341	bool f3DEnabled;
342	# ifdef VBOX_WITH_VMSVGA
343	/* Whether the SVGA emulation is enabled or not. */
344	bool fVMSVGAEnabled;
345	bool fVMSVGAPciId;
346	bool Padding4[0+3];
347	# else
348	bool Padding4[1+4];
349	# endif
350
351	/** Physical access type for the linear frame buffer dirty page tracking. */
352	PGMPHYSHANDLERTYPE hLfbAccessHandlerType;
353
354	/** The physical address the VRAM was assigned. */
355	RTGCPHYS GCPhysVRAM;
356	/** The critical section protect the instance data. */
357	PDMCRITSECT CritSect;
358	/** The PCI device. */
359	PDMPCIDEV Dev;
360
361	STAMPROFILE StatRZMemoryRead;
362	STAMPROFILE StatR3MemoryRead;
363	STAMPROFILE StatRZMemoryWrite;
364	STAMPROFILE StatR3MemoryWrite;
365	STAMCOUNTER StatMapPage; /*< Counts IOMMMIOMapMMIO2Page calls. /
366	STAMCOUNTER StatUpdateDisp; /*< Counts vgaPortUpdateDisplay calls. /
367
368	/* Keep track of ring 0 latched accesses to the VGA MMIO memory. */
369	uint64_t u64LastLatchedAccess;
370	uint32_t cLatchAccesses;
371	uint16_t uMaskLatchAccess;
372	uint16_t iMask;
373
374	# ifdef VBE_BYTEWISE_IO
375	/** VBE read/write data/index flags */
376	uint8_t fReadVBEData;
377	uint8_t fWriteVBEData;
378	uint8_t fReadVBEIndex;
379	uint8_t fWriteVBEIndex;
380	/** VBE write data/index one byte buffer */
381	uint8_t cbWriteVBEData;
382	uint8_t cbWriteVBEIndex;
383	/** VBE Extra Data write address one byte buffer */
384	uint8_t cbWriteVBEExtraAddress;
385	uint8_t Padding5;
386	# endif
387
388	/** Retrace emulation state */
389	bool fRealRetrace;
390	bool Padding6[HC_ARCH_BITS == 64 ? 7 : 3];
391	vga_retrace_s retrace_state;
392
393	/** The VBE BIOS extra data. */
394	R3PTRTYPE(uint8_t *) pbVBEExtraData;
395	/** The size of the VBE BIOS extra data. */
396	uint16_t cbVBEExtraData;
397	/** The VBE BIOS current memory address. */
398	uint16_t u16VBEExtraAddress;
399	uint16_t Padding7[2];
400
401	/** The BIOS logo data. */
402	R3PTRTYPE(uint8_t *) pbLogo;
403	/** The name of the logo file. */
404	R3PTRTYPE(char *) pszLogoFile;
405	/** Bitmap image data. */
406	R3PTRTYPE(uint8_t *) pbLogoBitmap;
407	/** Current logo data offset. */
408	uint32_t offLogoData;
409	/** The size of the BIOS logo data. */
410	uint32_t cbLogo;
411	/** Current logo command. */
412	uint16_t LogoCommand;
413	/** Bitmap width. */
414	uint16_t cxLogo;
415	/** Bitmap height. */
416	uint16_t cyLogo;
417	/** Bitmap planes. */
418	uint16_t cLogoPlanes;
419	/** Bitmap depth. */
420	uint16_t cLogoBits;
421	/** Bitmap compression. */
422	uint16_t LogoCompression;
423	/** Bitmap colors used. */
424	uint16_t cLogoUsedColors;
425	/** Palette size. */
426	uint16_t cLogoPalEntries;
427	/** Clear screen flag. */
428	uint8_t fLogoClearScreen;
429	bool fBootMenuInverse;
430	uint8_t Padding8[6];
431	/** Palette data. */
432	uint32_t au32LogoPalette[256];
433
434	/** The VGA BIOS ROM data. */
435	R3PTRTYPE(uint8_t *) pbVgaBios;
436	/** The size of the VGA BIOS ROM. */
437	uint64_t cbVgaBios;
438	/** The name of the VGA BIOS ROM file. */
439	R3PTRTYPE(char *) pszVgaBiosFile;
440	# if HC_ARCH_BITS == 32
441	uint32_t Padding9;
442	# endif
443
444	# ifdef VBOX_WITH_HGSMI
445	/** Base port in the assigned PCI I/O space. */
446	RTIOPORT IOPortBase;
447	# ifdef VBOX_WITH_WDDM
448	uint8_t Padding10[2];
449	/** Specifies guest driver caps, i.e. whether it can handle IRQs from the
450	* adapter, the way it can handle async HGSMI command completion, etc. */
451	uint32_t fGuestCaps;
452	uint32_t fScanLineCfg;
453	uint32_t fHostCursorCapabilities;
454	# else
455	uint8_t Padding11[14];
456	# endif
457
458	/** The critical section serializes the HGSMI IRQ setting/clearing. */
459	PDMCRITSECT CritSectIRQ;
460	/** VBVARaiseIRQ flags which were set when the guest was still processing previous IRQ. */
461	uint32_t fu32PendingGuestFlags;
462	uint32_t Padding12;
463	# endif /* VBOX_WITH_HGSMI */
464
465	PDMLED Led3D;
466
467	struct {
468	volatile uint32_t cPending;
469	uint32_t Padding1;
470	union
471	{
472	RTLISTNODE PendingList;
473	/* make sure the structure sized cross different contexts correctly */
474	struct
475	{
476	R3PTRTYPE(void *) dummy1;
477	R3PTRTYPE(void *) dummy2;
478	} dummy;
479	};
480	} pendingVhwaCommands;
481	#endif /* VBOX */
482	} VGAState;
483	#ifdef VBOX
484	/** VGA state. */
485	typedef VGAState VGASTATE;
486	/** Pointer to the VGA state. */
487	typedef VGASTATE *PVGASTATE;
488	AssertCompileMemberAlignment(VGASTATE, bank_offset, 8);
489	AssertCompileMemberAlignment(VGASTATE, font_offsets, 8);
490	AssertCompileMemberAlignment(VGASTATE, last_ch_attr, 8);
491	AssertCompileMemberAlignment(VGASTATE, u32Marker, 8);
492	#endif
493
494	/** VBE Extra Data. */
495	typedef VBEHeader VBEHEADER;
496	/** Pointer to the VBE Extra Data. */
497	typedef VBEHEADER *PVBEHEADER;
498
499	#if !defined(VBOX) \|\| defined(IN_RING3)
500	static inline int c6_to_8(int v)
501	{
502	int b;
503	v &= 0x3f;
504	b = v & 1;
505	return (v << 2) \| (b << 1) \| b;
506	}
507	#endif /* !VBOX \|\| IN_RING3 */
508
509
510	#ifdef VBOX_WITH_HGSMI
511	int VBVAInit (PVGASTATE pVGAState);
512	void VBVADestroy (PVGASTATE pVGAState);
513	int VBVAUpdateDisplay (PVGASTATE pVGAState);
514	void VBVAReset (PVGASTATE pVGAState);
515	void VBVAPause (PVGASTATE pVGAState, bool fPause);
516	void VBVAOnVBEChanged(PVGASTATE pVGAState);
517	void VBVAOnResume(PVGASTATE pThis);
518
519	bool VBVAIsPaused(PVGASTATE pVGAState);
520	bool VBVAIsEnabled(PVGASTATE pVGAState);
521
522	void VBVARaiseIrq(PVGASTATE pVGAState, uint32_t fFlags);
523
524	int VBVAInfoView(PVGASTATE pVGAState, const VBVAINFOVIEW RT_UNTRUSTED_VOLATILE_HOST *pView);
525	int VBVAInfoScreen(PVGASTATE pVGAState, const VBVAINFOSCREEN RT_UNTRUSTED_VOLATILE_HOST *pScreen);
526	int VBVAGetInfoViewAndScreen(PVGASTATE pVGAState, uint32_t u32ViewIndex, VBVAINFOVIEW pView, VBVAINFOSCREEN pScreen);
527
528	/* @return host-guest flags that were set on reset
529	* this allows the caller to make further cleaning when needed,
530	* e.g. reset the IRQ */
531	uint32_t HGSMIReset(PHGSMIINSTANCE pIns);
532
533	# ifdef VBOX_WITH_VIDEOHWACCEL
534	DECLCALLBACK(int) vbvaVHWACommandCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface, VBOXVHWACMD RT_UNTRUSTED_VOLATILE_GUEST *pCmd);
535	int vbvaVHWAConstruct(PVGASTATE pVGAState);
536	int vbvaVHWAReset(PVGASTATE pVGAState);
537
538	void vbvaTimerCb(PVGASTATE pVGAState);
539
540	int vboxVBVASaveStatePrep(PPDMDEVINS pDevIns);
541	int vboxVBVASaveStateDone(PPDMDEVINS pDevIns);
542	# endif
543
544	#ifdef VBOX_WITH_HGSMI
545	#define PPDMIDISPLAYVBVACALLBACKS_2_PVGASTATE(_pcb) ( (PVGASTATE)((uint8_t *)(_pcb) - RT_OFFSETOF(VGASTATE, IVBVACallbacks)) )
546	#endif
547
548	# ifdef VBOX_WITH_CRHGSMI
549	DECLCALLBACK(int) vboxVDMACrHgsmiCommandCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface,
550	PVBOXVDMACMD_CHROMIUM_CMD pCmd, int rc);
551	DECLCALLBACK(int) vboxVDMACrHgsmiControlCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface,
552	PVBOXVDMACMD_CHROMIUM_CTL pCmd, int rc);
553	DECLCALLBACK(int) vboxCmdVBVACmdHostCtl(PPDMIDISPLAYVBVACALLBACKS pInterface,
554	struct VBOXCRCMDCTL* pCmd, uint32_t cbCmd,
555	PFNCRCTLCOMPLETION pfnCompletion,
556	void *pvCompletion);
557	DECLCALLBACK(int) vboxCmdVBVACmdHostCtlSync(PPDMIDISPLAYVBVACALLBACKS pInterface,
558	struct VBOXCRCMDCTL* pCmd, uint32_t cbCmd);
559	# endif
560
561	int vboxVBVASaveStateExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
562	int vboxVBVALoadStateExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t u32Version);
563	int vboxVBVALoadStateDone(PPDMDEVINS pDevIns);
564
565	DECLCALLBACK(int) vgaUpdateDisplayAll(PVGASTATE pThis, bool fFailOnResize);
566	DECLCALLBACK(int) vbvaPortSendModeHint(PPDMIDISPLAYPORT pInterface, uint32_t cx,
567	uint32_t cy, uint32_t cBPP,
568	uint32_t cDisplay, uint32_t dx,
569	uint32_t dy, uint32_t fEnabled,
570	uint32_t fNotifyGuest);
571	DECLCALLBACK(void) vbvaPortReportHostCursorCapabilities(PPDMIDISPLAYPORT pInterface, uint32_t fCapabilitiesAdded,
572	uint32_t fCapabilitiesRemoved);
573	DECLCALLBACK(void) vbvaPortReportHostCursorPosition(PPDMIDISPLAYPORT pInterface, uint32_t x, uint32_t y);
574
575	# ifdef VBOX_WITH_VDMA
576	typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
577	int vboxVDMAConstruct(PVGASTATE pVGAState, uint32_t cPipeElements);
578	void vboxVDMADestruct(PVBOXVDMAHOST pVdma);
579	void vboxVDMAReset(PVBOXVDMAHOST pVdma);
580	void vboxVDMAControl(PVBOXVDMAHOST pVdma, VBOXVDMA_CTL RT_UNTRUSTED_VOLATILE_GUEST *pCmd, uint32_t cbCmd);
581	void vboxVDMACommand(PVBOXVDMAHOST pVdma, VBOXVDMACBUF_DR RT_UNTRUSTED_VOLATILE_GUEST *pCmd, uint32_t cbCmd);
582	int vboxVDMASaveStateExecPrep(struct VBOXVDMAHOST *pVdma);
583	int vboxVDMASaveStateExecDone(struct VBOXVDMAHOST *pVdma);
584	int vboxVDMASaveStateExecPerform(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM);
585	int vboxVDMASaveLoadExecPerform(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM, uint32_t u32Version);
586	int vboxVDMASaveLoadDone(struct VBOXVDMAHOST *pVdma);
587	# endif /* VBOX_WITH_VDMA */
588
589	# ifdef VBOX_WITH_CRHGSMI
590	int vboxCmdVBVACmdSubmit(PVGASTATE pVGAState);
591	int vboxCmdVBVACmdFlush(PVGASTATE pVGAState);
592	int vboxCmdVBVACmdCtl(PVGASTATE pVGAState, VBOXCMDVBVA_CTL RT_UNTRUSTED_VOLATILE_GUEST *pCtl, uint32_t cbCtl);
593	void vboxCmdVBVATimerRefresh(PVGASTATE pVGAState);
594	bool vboxCmdVBVAIsEnabled(PVGASTATE pVGAState);
595	# endif /* VBOX_WITH_CRHGSMI */
596	#endif /* VBOX_WITH_HGSMI */
597
598	# ifdef VBOX_WITH_VMSVGA
599	int vgaR3RegisterVRAMHandler(PVGASTATE pVGAState, uint64_t cbFrameBuffer);
600	int vgaR3UnregisterVRAMHandler(PVGASTATE pVGAState);
601	int vgaR3UpdateDisplay(PVGASTATE pVGAState, unsigned xStart, unsigned yStart, unsigned width, unsigned height);
602	# endif
603
604	#ifndef VBOX
605	void vga_common_init(VGAState s, DisplayState ds, uint8_t *vga_ram_base,
606	unsigned long vga_ram_offset, int vga_ram_size);
607	uint32_t vga_mem_readb(void *opaque, target_phys_addr_t addr);
608	void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val);
609	void vga_invalidate_scanlines(VGAState *s, int y1, int y2);
610
611	void vga_draw_cursor_line_8(uint8_t d1, const uint8_t src1,
612	int poffset, int w,
613	unsigned int color0, unsigned int color1,
614	unsigned int color_xor);
615	void vga_draw_cursor_line_16(uint8_t d1, const uint8_t src1,
616	int poffset, int w,
617	unsigned int color0, unsigned int color1,
618	unsigned int color_xor);
619	void vga_draw_cursor_line_32(uint8_t d1, const uint8_t src1,
620	int poffset, int w,
621	unsigned int color0, unsigned int color1,
622	unsigned int color_xor);
623
624	extern const uint8_t sr_mask[8];
625	extern const uint8_t gr_mask[16];
626	#endif /* !VBOX */
627

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source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA.h@ 74474

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