DevVGA.h@ 82048

Last change on this file since 82048 was 82048, checked in by vboxsync, 5 years ago
DevVGA: SSMR3 -> pHlp->pfnSSM. bugref:9218
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1	/* $Id: DevVGA.h 82048 2019-11-20 20:30:15Z vboxsync $ */
2	/** @file
3	* DevVGA - VBox VGA/VESA device, internal header.
4	*/
5
6	/*
7	* Copyright (C) 2006-2019 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	* --------------------------------------------------------------------
17	*
18	* This code is based on:
19	*
20	* QEMU internal VGA defines.
21	*
22	* Copyright (c) 2003-2004 Fabrice Bellard
23	*
24	* Permission is hereby granted, free of charge, to any person obtaining a copy
25	* of this software and associated documentation files (the "Software"), to deal
26	* in the Software without restriction, including without limitation the rights
27	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
28	* copies of the Software, and to permit persons to whom the Software is
29	* furnished to do so, subject to the following conditions:
30	*
31	* The above copyright notice and this permission notice shall be included in
32	* all copies or substantial portions of the Software.
33	*
34	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
37	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
38	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
39	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
40	* THE SOFTWARE.
41	*/
42
43	#ifndef VBOX_INCLUDED_SRC_Graphics_DevVGA_h
44	#define VBOX_INCLUDED_SRC_Graphics_DevVGA_h
45	#ifndef RT_WITHOUT_PRAGMA_ONCE
46	# pragma once
47	#endif
48
49	/** Use VBE bytewise I/O. Only needed for Windows Longhorn/Vista betas and backwards compatibility. */
50	#define VBE_BYTEWISE_IO
51
52	#ifdef VBOX
53	/** The default amount of VRAM. */
54	# define VGA_VRAM_DEFAULT (_4M)
55	/** The maximum amount of VRAM. Limited by VBOX_MAX_ALLOC_PAGE_COUNT. */
56	# define VGA_VRAM_MAX (256 * _1M)
57	/** The minimum amount of VRAM. */
58	# define VGA_VRAM_MIN (_1M)
59	#endif
60
61	#include <VBoxVideoVBE.h>
62	#include <VBoxVideoVBEPrivate.h>
63
64	#ifdef VBOX_WITH_HGSMI
65	# include "HGSMI/HGSMIHost.h"
66	#endif /* VBOX_WITH_HGSMI */
67	#include "DevVGASavedState.h"
68
69	#ifdef VBOX_WITH_VMSVGA
70	# include "DevVGA-SVGA.h"
71	#endif
72
73	#include <iprt/list.h>
74
75	#define MSR_COLOR_EMULATION 0x01
76	#define MSR_PAGE_SELECT 0x20
77
78	#define ST01_V_RETRACE 0x08
79	#define ST01_DISP_ENABLE 0x01
80
81	/* bochs VBE support */
82	#define CONFIG_BOCHS_VBE
83
84	#ifdef CONFIG_BOCHS_VBE
85
86	/* Cross reference with <VBoxVideoVBE.h> */
87	#define VBE_DISPI_INDEX_NB_SAVED 0xb /* Old number of saved registers (vbe_regs array, see vga_load) */
88	#define VBE_DISPI_INDEX_NB 0xd /* Total number of VBE registers */
89
90	#define VGA_STATE_COMMON_BOCHS_VBE \
91	uint16_t vbe_index; \
92	uint16_t vbe_regs[VBE_DISPI_INDEX_NB]; \
93	uint16_t alignment[2]; /* pad to 64 bits */ \
94	uint32_t vbe_start_addr; \
95	uint32_t vbe_line_offset; \
96	uint32_t vbe_bank_max;
97
98	#else
99
100	#define VGA_STATE_COMMON_BOCHS_VBE
101
102	#endif /* !CONFIG_BOCHS_VBE */
103
104	#define CH_ATTR_SIZE (160 * 100)
105	#define VGA_MAX_HEIGHT VBE_DISPI_MAX_YRES
106
107	typedef struct vga_retrace_s {
108	unsigned frame_cclks; /* Character clocks per frame. */
109	unsigned frame_ns; /* Frame duration in ns. */
110	unsigned cclk_ns; /* Character clock duration in ns. */
111	unsigned vb_start; /* Vertical blanking start (scanline). */
112	unsigned vb_end; /* Vertical blanking end (scanline). */
113	unsigned vb_end_ns; /* Vertical blanking end time (length) in ns. */
114	unsigned vs_start; /* Vertical sync start (scanline). */
115	unsigned vs_end; /* Vertical sync end (scanline). */
116	unsigned vs_start_ns; /* Vertical sync start time in ns. */
117	unsigned vs_end_ns; /* Vertical sync end time in ns. */
118	unsigned h_total; /* Horizontal total (cclks per scanline). */
119	unsigned h_total_ns; /* Scanline duration in ns. */
120	unsigned hb_start; /* Horizontal blanking start (cclk). */
121	unsigned hb_end; /* Horizontal blanking end (cclk). */
122	unsigned hb_end_ns; /* Horizontal blanking end time (length) in ns. */
123	unsigned v_freq_hz; /* Vertical refresh rate to emulate. */
124	} vga_retrace_s;
125
126	#ifndef VBOX
127	#define VGA_STATE_COMMON \
128	uint8_t *vram_ptr; \
129	unsigned long vram_offset; \
130	unsigned int vram_size; \
131	uint32_t latch; \
132	uint8_t sr_index; \
133	uint8_t sr[256]; \
134	uint8_t gr_index; \
135	uint8_t gr[256]; \
136	uint8_t ar_index; \
137	uint8_t ar[21]; \
138	int ar_flip_flop; \
139	uint8_t cr_index; \
140	uint8_t cr[256]; /* CRT registers */ \
141	uint8_t msr; /* Misc Output Register */ \
142	uint8_t fcr; /* Feature Control Register */ \
143	uint8_t st00; /* status 0 */ \
144	uint8_t st01; /* status 1 */ \
145	uint8_t dac_state; \
146	uint8_t dac_sub_index; \
147	uint8_t dac_read_index; \
148	uint8_t dac_write_index; \
149	uint8_t dac_cache[3]; /* used when writing */ \
150	uint8_t palette[768]; \
151	int32_t bank_offset; \
152	int (get_bpp)(struct VGAState s); \
153	void (get_offsets)(struct VGAState s, \
154	uint32_t *pline_offset, \
155	uint32_t *pstart_addr, \
156	uint32_t *pline_compare); \
157	void (get_resolution)(struct VGAState s, \
158	int *pwidth, \
159	int *pheight); \
160	VGA_STATE_COMMON_BOCHS_VBE \
161	/* display refresh support */ \
162	DisplayState *ds; \
163	uint32_t font_offsets[2]; \
164	int graphic_mode; \
165	uint8_t shift_control; \
166	uint8_t double_scan; \
167	uint32_t line_offset; \
168	uint32_t line_compare; \
169	uint32_t start_addr; \
170	uint32_t plane_updated; \
171	uint8_t last_cw, last_ch; \
172	uint32_t last_width, last_height; /* in chars or pixels */ \
173	uint32_t last_scr_width, last_scr_height; /* in pixels */ \
174	uint8_t cursor_start, cursor_end; \
175	uint32_t cursor_offset; \
176	unsigned int (*rgb_to_pixel)(unsigned int r, \
177	unsigned int g, unsigned b); \
178	/* hardware mouse cursor support */ \
179	uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32]; \
180	void (cursor_invalidate)(struct VGAState s); \
181	void (cursor_draw_line)(struct VGAState s, uint8_t *d, int y); \
182	/* tell for each page if it has been updated since the last time */ \
183	uint32_t last_palette[256]; \
184	uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
185
186	#else /* VBOX */
187
188	/* bird: Since we've changed types, reordered members, done alignment
189	paddings and more, VGA_STATE_COMMON was added directly to the
190	struct to make it more readable and easier to handle. */
191
192	struct VGAState;
193	typedef int FNGETBPP(struct VGAState *s);
194	typedef void FNGETOFFSETS(struct VGAState s, uint32_t pline_offset, uint32_t pstart_addr, uint32_t pline_compare);
195	typedef void FNGETRESOLUTION(struct VGAState s, int pwidth, int *pheight);
196	typedef unsigned int FNRGBTOPIXEL(unsigned int r, unsigned int g, unsigned b);
197	typedef void FNCURSORINVALIDATE(struct VGAState *s);
198	typedef void FNCURSORDRAWLINE(struct VGAState s, uint8_t d, int y);
199
200	#endif /* VBOX */
201
202	#ifdef VBOX_WITH_VDMA
203	typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
204	#endif
205
206	#ifdef VBOX_WITH_VIDEOHWACCEL
207	#define VBOX_VHWA_MAX_PENDING_COMMANDS 1000
208
209	typedef struct _VBOX_VHWA_PENDINGCMD
210	{
211	RTLISTNODE Node;
212	VBOXVHWACMD RT_UNTRUSTED_VOLATILE_GUEST *pCommand;
213	} VBOX_VHWA_PENDINGCMD;
214	#endif
215
216
217	typedef struct VGAState {
218	#ifndef VBOX
219	VGA_STATE_COMMON
220	#else /* VBOX */
221	R3PTRTYPE(uint8_t *) vram_ptrR3;
222	R3PTRTYPE(FNGETBPP *) get_bpp;
223	R3PTRTYPE(FNGETOFFSETS *) get_offsets;
224	R3PTRTYPE(FNGETRESOLUTION *) get_resolution;
225	R3PTRTYPE(FNRGBTOPIXEL *) rgb_to_pixel;
226	R3PTRTYPE(FNCURSORINVALIDATE *) cursor_invalidate;
227	R3PTRTYPE(FNCURSORDRAWLINE *) cursor_draw_line;
228	RTR3PTR R3PtrCmnAlignment;
229	uint32_t vram_size;
230	uint32_t latch;
231	uint8_t sr_index;
232	uint8_t sr[256];
233	uint8_t gr_index;
234	uint8_t gr[256];
235	uint8_t ar_index;
236	uint8_t ar[21];
237	int32_t ar_flip_flop;
238	uint8_t cr_index;
239	uint8_t cr[256]; /* CRT registers */
240	uint8_t msr; /* Misc Output Register */
241	uint8_t fcr; /* Feature Control Register */
242	uint8_t st00; /* status 0 */
243	uint8_t st01; /* status 1 */
244	uint8_t dac_state;
245	uint8_t dac_sub_index;
246	uint8_t dac_read_index;
247	uint8_t dac_write_index;
248	uint8_t dac_cache[3]; /* used when writing */
249	uint8_t palette[768];
250	int32_t bank_offset;
251	VGA_STATE_COMMON_BOCHS_VBE
252	/* display refresh support */
253	uint32_t font_offsets[2];
254	int32_t graphic_mode;
255	uint8_t shift_control;
256	uint8_t double_scan;
257	uint8_t padding1[2];
258	uint32_t line_offset;
259	uint32_t vga_addr_mask;
260	uint32_t padding1a;
261	uint32_t line_compare;
262	uint32_t start_addr;
263	uint32_t plane_updated;
264	uint8_t last_cw, last_ch, padding2[2];
265	uint32_t last_width, last_height; /* in chars or pixels */
266	uint32_t last_scr_width, last_scr_height; /* in pixels */
267	uint32_t last_bpp;
268	uint8_t cursor_start, cursor_end;
269	bool last_cur_blink, last_chr_blink;
270	uint32_t cursor_offset;
271	/* hardware mouse cursor support */
272	uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32];
273	/* tell for each page if it has been updated since the last time */
274	uint32_t last_palette[256];
275	uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
276
277	/** end-of-common-state-marker */
278	uint32_t u32Marker;
279
280	# ifdef VBOX_WITH_RAW_MODE_KEEP
281	/** Pointer to the device instance - RC Ptr. */
282	PPDMDEVINSRC pDevInsRC;
283	/** Pointer to the GC vram mapping. */
284	RCPTRTYPE(uint8_t *) vram_ptrRC;
285	uint32_t Padding1;
286	# endif
287
288	/** Pointer to the device instance - R3 Ptr. */
289	PPDMDEVINSR3 pDevInsR3;
290	# ifdef VBOX_WITH_HGSMI
291	R3PTRTYPE(PHGSMIINSTANCE) pHGSMI;
292	# endif
293	# ifdef VBOX_WITH_VDMA
294	R3PTRTYPE(PVBOXVDMAHOST) pVdma;
295	# endif
296	/** LUN\#0: The display port base interface. */
297	PDMIBASE IBase;
298	/** LUN\#0: The display port interface. */
299	PDMIDISPLAYPORT IPort;
300	# if defined(VBOX_WITH_HGSMI)
301	/** LUN\#0: VBVA callbacks interface */
302	PDMIDISPLAYVBVACALLBACKS IVBVACallbacks;
303	# else
304	RTR3PTR Padding2;
305	# endif
306	/** Status LUN: Leds interface. */
307	PDMILEDPORTS ILeds;
308
309	/** Pointer to base interface of the driver. */
310	R3PTRTYPE(PPDMIBASE) pDrvBase;
311	/** Pointer to display connector interface of the driver. */
312	R3PTRTYPE(PPDMIDISPLAYCONNECTOR) pDrv;
313
314	/** Status LUN: Partner of ILeds. */
315	R3PTRTYPE(PPDMILEDCONNECTORS) pLedsConnector;
316
317	/** Refresh timer handle - HC. */
318	PTMTIMERR3 RefreshTimer;
319
320	/** Pointer to the device instance - R0 Ptr. */
321	PPDMDEVINSR0 pDevInsR0;
322	/** The R0 vram pointer... */
323	R0PTRTYPE(uint8_t *) vram_ptrR0;
324
325	# ifdef VBOX_WITH_VMSVGA
326	VMSVGAState svga;
327	# endif
328
329	/** The number of monitors. */
330	uint32_t cMonitors;
331	/** Current refresh timer interval. */
332	uint32_t cMilliesRefreshInterval;
333	/** Bitmap tracking dirty pages. */
334	uint32_t au32DirtyBitmap[VGA_VRAM_MAX / PAGE_SIZE / 32];
335
336	/** Flag indicating that there are dirty bits. This is used to optimize the handler resetting. */
337	bool fHasDirtyBits;
338	/** LFB was updated flag. */
339	bool fLFBUpdated;
340	/** Flag indicating that the VGA memory in the 0xa0000-0xbffff region has been remapped to allow direct access. */
341	bool fRemappedVGA;
342	/** Whether to render the guest VRAM to the framebuffer memory. False only for some LFB modes. */
343	bool fRenderVRAM;
344	/** Whether 3D is enabled for the VM. */
345	bool f3DEnabled;
346	# ifdef VBOX_WITH_VMSVGA
347	/* Whether the SVGA emulation is enabled or not. */
348	bool fVMSVGAEnabled;
349	bool fVMSVGAPciId;
350	bool fVMSVGAPciBarLayout;
351	bool Padding4[4];
352	# else
353	bool Padding4[3+4];
354	# endif
355
356	struct {
357	uint32_t u32Padding1;
358	uint32_t iVRAM;
359	# ifdef VBOX_WITH_VMSVGA
360	uint32_t iIO;
361	uint32_t iFIFO;
362	# endif
363	} pciRegions;
364
365	/** Physical access type for the linear frame buffer dirty page tracking. */
366	PGMPHYSHANDLERTYPE hLfbAccessHandlerType;
367
368	/** The physical address the VRAM was assigned. */
369	RTGCPHYS GCPhysVRAM;
370	/** The critical section protect the instance data. */
371	PDMCRITSECT CritSect;
372
373	STAMPROFILE StatRZMemoryRead;
374	STAMPROFILE StatR3MemoryRead;
375	STAMPROFILE StatRZMemoryWrite;
376	STAMPROFILE StatR3MemoryWrite;
377	STAMCOUNTER StatMapPage; /*< Counts IOMMMIOMapMMIO2Page calls. /
378	STAMCOUNTER StatUpdateDisp; /*< Counts vgaPortUpdateDisplay calls. /
379
380	/* Keep track of ring 0 latched accesses to the VGA MMIO memory. */
381	uint64_t u64LastLatchedAccess;
382	uint32_t cLatchAccesses;
383	uint16_t uMaskLatchAccess;
384	uint16_t iMask;
385
386	# ifdef VBE_BYTEWISE_IO
387	/** VBE read/write data/index flags */
388	uint8_t fReadVBEData;
389	uint8_t fWriteVBEData;
390	uint8_t fReadVBEIndex;
391	uint8_t fWriteVBEIndex;
392	/** VBE write data/index one byte buffer */
393	uint8_t cbWriteVBEData;
394	uint8_t cbWriteVBEIndex;
395	/** VBE Extra Data write address one byte buffer */
396	uint8_t cbWriteVBEExtraAddress;
397	uint8_t Padding5;
398	# endif
399
400	/** Retrace emulation state */
401	bool fRealRetrace;
402	bool Padding6[HC_ARCH_BITS == 64 ? 7 : 3];
403	vga_retrace_s retrace_state;
404
405	/** The VBE BIOS extra data. */
406	R3PTRTYPE(uint8_t *) pbVBEExtraData;
407	/** The size of the VBE BIOS extra data. */
408	uint16_t cbVBEExtraData;
409	/** The VBE BIOS current memory address. */
410	uint16_t u16VBEExtraAddress;
411	uint16_t Padding7[2];
412
413	/** The BIOS logo data. */
414	R3PTRTYPE(uint8_t *) pbLogo;
415	/** The name of the logo file. */
416	R3PTRTYPE(char *) pszLogoFile;
417	/** Bitmap image data. */
418	R3PTRTYPE(uint8_t *) pbLogoBitmap;
419	/** Current logo data offset. */
420	uint32_t offLogoData;
421	/** The size of the BIOS logo data. */
422	uint32_t cbLogo;
423	/** Current logo command. */
424	uint16_t LogoCommand;
425	/** Bitmap width. */
426	uint16_t cxLogo;
427	/** Bitmap height. */
428	uint16_t cyLogo;
429	/** Bitmap planes. */
430	uint16_t cLogoPlanes;
431	/** Bitmap depth. */
432	uint16_t cLogoBits;
433	/** Bitmap compression. */
434	uint16_t LogoCompression;
435	/** Bitmap colors used. */
436	uint16_t cLogoUsedColors;
437	/** Palette size. */
438	uint16_t cLogoPalEntries;
439	/** Clear screen flag. */
440	uint8_t fLogoClearScreen;
441	bool fBootMenuInverse;
442	uint8_t Padding8[6];
443	/** Palette data. */
444	uint32_t au32LogoPalette[256];
445
446	/** The VGA BIOS ROM data. */
447	R3PTRTYPE(uint8_t *) pbVgaBios;
448	/** The size of the VGA BIOS ROM. */
449	uint64_t cbVgaBios;
450	/** The name of the VGA BIOS ROM file. */
451	R3PTRTYPE(char *) pszVgaBiosFile;
452	# if HC_ARCH_BITS == 32
453	uint32_t Padding9;
454	# endif
455
456	# ifdef VBOX_WITH_HGSMI
457	/** Base port in the assigned PCI I/O space. */
458	RTIOPORT IOPortBase;
459	# ifdef VBOX_WITH_WDDM
460	uint8_t Padding10[2];
461	/** Specifies guest driver caps, i.e. whether it can handle IRQs from the
462	* adapter, the way it can handle async HGSMI command completion, etc. */
463	uint32_t fGuestCaps;
464	uint32_t fScanLineCfg;
465	uint32_t Padding11;
466	# else
467	uint8_t Padding11[14];
468	# endif
469
470	/** The critical section serializes the HGSMI IRQ setting/clearing. */
471	PDMCRITSECT CritSectIRQ;
472	/** VBVARaiseIRQ flags which were set when the guest was still processing previous IRQ. */
473	uint32_t fu32PendingGuestFlags;
474	uint32_t Padding12;
475	# endif /* VBOX_WITH_HGSMI */
476
477	PDMLED Led3D;
478
479	struct {
480	volatile uint32_t cPending;
481	uint32_t Padding1;
482	union
483	{
484	RTLISTNODE PendingList;
485	/* make sure the structure sized cross different contexts correctly */
486	struct
487	{
488	R3PTRTYPE(void *) dummy1;
489	R3PTRTYPE(void *) dummy2;
490	} dummy;
491	};
492	} pendingVhwaCommands;
493	#endif /* VBOX */
494	} VGAState;
495	#ifdef VBOX
496	/** VGA state. */
497	typedef VGAState VGASTATE;
498	/** Pointer to the VGA state. */
499	typedef VGASTATE *PVGASTATE;
500	AssertCompileMemberAlignment(VGASTATE, bank_offset, 8);
501	AssertCompileMemberAlignment(VGASTATE, font_offsets, 8);
502	AssertCompileMemberAlignment(VGASTATE, last_ch_attr, 8);
503	AssertCompileMemberAlignment(VGASTATE, u32Marker, 8);
504	#endif
505
506	/** VBE Extra Data. */
507	typedef VBEHeader VBEHEADER;
508	/** Pointer to the VBE Extra Data. */
509	typedef VBEHEADER *PVBEHEADER;
510
511	#if !defined(VBOX) \|\| defined(IN_RING3)
512	static inline int c6_to_8(int v)
513	{
514	int b;
515	v &= 0x3f;
516	b = v & 1;
517	return (v << 2) \| (b << 1) \| b;
518	}
519	#endif /* !VBOX \|\| IN_RING3 */
520
521
522	#ifdef VBOX_WITH_HGSMI
523	int VBVAInit (PVGASTATE pVGAState);
524	void VBVADestroy (PVGASTATE pVGAState);
525	int VBVAUpdateDisplay (PVGASTATE pVGAState);
526	void VBVAReset (PVGASTATE pVGAState);
527	void VBVAPause (PVGASTATE pVGAState, bool fPause);
528	void VBVAOnVBEChanged(PVGASTATE pVGAState);
529	void VBVAOnResume(PVGASTATE pThis);
530
531	bool VBVAIsPaused(PVGASTATE pVGAState);
532	bool VBVAIsEnabled(PVGASTATE pVGAState);
533
534	void VBVARaiseIrq(PVGASTATE pVGAState, uint32_t fFlags);
535
536	int VBVAInfoView(PVGASTATE pVGAState, const VBVAINFOVIEW RT_UNTRUSTED_VOLATILE_HOST *pView);
537	int VBVAInfoScreen(PVGASTATE pVGAState, const VBVAINFOSCREEN RT_UNTRUSTED_VOLATILE_HOST *pScreen);
538	int VBVAGetInfoViewAndScreen(PVGASTATE pVGAState, uint32_t u32ViewIndex, VBVAINFOVIEW pView, VBVAINFOSCREEN pScreen);
539
540	/* @return host-guest flags that were set on reset
541	* this allows the caller to make further cleaning when needed,
542	* e.g. reset the IRQ */
543	uint32_t HGSMIReset(PHGSMIINSTANCE pIns);
544
545	# ifdef VBOX_WITH_VIDEOHWACCEL
546	DECLCALLBACK(int) vbvaVHWACommandCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface, VBOXVHWACMD RT_UNTRUSTED_VOLATILE_GUEST *pCmd);
547	int vbvaVHWAConstruct(PVGASTATE pVGAState);
548	int vbvaVHWAReset(PVGASTATE pVGAState);
549
550	void vbvaTimerCb(PVGASTATE pVGAState);
551
552	int vboxVBVASaveStatePrep(PPDMDEVINS pDevIns);
553	int vboxVBVASaveStateDone(PPDMDEVINS pDevIns);
554	# endif
555
556	#define PPDMIDISPLAYVBVACALLBACKS_2_PVGASTATE(_pcb) ( (PVGASTATE)((uint8_t *)(_pcb) - RT_OFFSETOF(VGASTATE, IVBVACallbacks)) )
557
558	int vboxVBVASaveStateExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
559	int vboxVBVALoadStateExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t u32Version);
560	int vboxVBVALoadStateDone(PPDMDEVINS pDevIns);
561
562	DECLCALLBACK(int) vgaUpdateDisplayAll(PVGASTATE pThis, bool fFailOnResize);
563	DECLCALLBACK(int) vbvaPortSendModeHint(PPDMIDISPLAYPORT pInterface, uint32_t cx,
564	uint32_t cy, uint32_t cBPP,
565	uint32_t cDisplay, uint32_t dx,
566	uint32_t dy, uint32_t fEnabled,
567	uint32_t fNotifyGuest);
568
569	# ifdef VBOX_WITH_VDMA
570	typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
571	int vboxVDMAConstruct(PVGASTATE pVGAState, uint32_t cPipeElements);
572	void vboxVDMADestruct(PVBOXVDMAHOST pVdma);
573	void vboxVDMAReset(PVBOXVDMAHOST pVdma);
574	void vboxVDMAControl(PVBOXVDMAHOST pVdma, VBOXVDMA_CTL RT_UNTRUSTED_VOLATILE_GUEST *pCmd, uint32_t cbCmd);
575	void vboxVDMACommand(PVBOXVDMAHOST pVdma, VBOXVDMACBUF_DR RT_UNTRUSTED_VOLATILE_GUEST *pCmd, uint32_t cbCmd);
576	int vboxVDMASaveStateExecPrep(struct VBOXVDMAHOST *pVdma);
577	int vboxVDMASaveStateExecDone(struct VBOXVDMAHOST *pVdma);
578	int vboxVDMASaveStateExecPerform(PCPDMDEVHLPR3 pHlp, struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM);
579	int vboxVDMASaveLoadExecPerform(PCPDMDEVHLPR3 pHlp, struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM, uint32_t u32Version);
580	int vboxVDMASaveLoadDone(struct VBOXVDMAHOST *pVdma);
581	# endif /* VBOX_WITH_VDMA */
582
583	#endif /* VBOX_WITH_HGSMI */
584
585	# ifdef VBOX_WITH_VMSVGA
586	int vgaR3RegisterVRAMHandler(PVGASTATE pVGAState, uint64_t cbFrameBuffer);
587	int vgaR3UnregisterVRAMHandler(PVGASTATE pVGAState);
588	int vgaR3UpdateDisplay(PVGASTATE pVGAState, unsigned xStart, unsigned yStart, unsigned width, unsigned height);
589	# endif
590
591	#ifndef VBOX
592	void vga_common_init(VGAState s, DisplayState ds, uint8_t *vga_ram_base,
593	unsigned long vga_ram_offset, int vga_ram_size);
594	uint32_t vga_mem_readb(void *opaque, target_phys_addr_t addr);
595	void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val);
596	void vga_invalidate_scanlines(VGAState *s, int y1, int y2);
597
598	void vga_draw_cursor_line_8(uint8_t d1, const uint8_t src1,
599	int poffset, int w,
600	unsigned int color0, unsigned int color1,
601	unsigned int color_xor);
602	void vga_draw_cursor_line_16(uint8_t d1, const uint8_t src1,
603	int poffset, int w,
604	unsigned int color0, unsigned int color1,
605	unsigned int color_xor);
606	void vga_draw_cursor_line_32(uint8_t d1, const uint8_t src1,
607	int poffset, int w,
608	unsigned int color0, unsigned int color1,
609	unsigned int color_xor);
610
611	extern const uint8_t sr_mask[8];
612	extern const uint8_t gr_mask[16];
613	#endif /* !VBOX */
614
615	#endif /* !VBOX_INCLUDED_SRC_Graphics_DevVGA_h */
616

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source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA.h@ 82048

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