DevVGA.h@ 82076

Last change on this file since 82076 was 82076, checked in by vboxsync, 5 years ago
DevVGA: Converted VMSVGA FIFO allocation and registration to new style. bugref:9218
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 26.9 KB

Line
1	/* $Id: DevVGA.h 82076 2019-11-21 12:00:18Z vboxsync $ */
2	/** @file
3	* DevVGA - VBox VGA/VESA device, internal header.
4	*/
5
6	/*
7	* Copyright (C) 2006-2019 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	* --------------------------------------------------------------------
17	*
18	* This code is based on:
19	*
20	* QEMU internal VGA defines.
21	*
22	* Copyright (c) 2003-2004 Fabrice Bellard
23	*
24	* Permission is hereby granted, free of charge, to any person obtaining a copy
25	* of this software and associated documentation files (the "Software"), to deal
26	* in the Software without restriction, including without limitation the rights
27	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
28	* copies of the Software, and to permit persons to whom the Software is
29	* furnished to do so, subject to the following conditions:
30	*
31	* The above copyright notice and this permission notice shall be included in
32	* all copies or substantial portions of the Software.
33	*
34	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
37	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
38	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
39	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
40	* THE SOFTWARE.
41	*/
42
43	#ifndef VBOX_INCLUDED_SRC_Graphics_DevVGA_h
44	#define VBOX_INCLUDED_SRC_Graphics_DevVGA_h
45	#ifndef RT_WITHOUT_PRAGMA_ONCE
46	# pragma once
47	#endif
48
49	#include <VBoxVideoVBE.h>
50	#include <VBoxVideoVBEPrivate.h>
51
52	#ifdef VBOX_WITH_HGSMI
53	# include "HGSMI/HGSMIHost.h"
54	#endif /* VBOX_WITH_HGSMI */
55	#include "DevVGASavedState.h"
56
57	#ifdef VBOX_WITH_VMSVGA
58	# include "DevVGA-SVGA.h"
59	#endif
60
61	#include <iprt/list.h>
62
63
64	/** Use VBE bytewise I/O. Only needed for Windows Longhorn/Vista betas and backwards compatibility. */
65	#define VBE_BYTEWISE_IO
66
67	#ifdef VBOX
68	/** The default amount of VRAM. */
69	# define VGA_VRAM_DEFAULT (_4M)
70	/** The maximum amount of VRAM. Limited by VBOX_MAX_ALLOC_PAGE_COUNT. */
71	# define VGA_VRAM_MAX (256 * _1M)
72	/** The minimum amount of VRAM. */
73	# define VGA_VRAM_MIN (_1M)
74	#endif
75
76	/** The size of the VGA GC mapping.
77	* This is supposed to be all the VGA memory accessible to the guest.
78	* The initial value was 256KB but NTAllInOne.iso appears to access more
79	* thus the limit was upped to 512KB.
80	*
81	* @todo Someone with some VGA knowhow should make a better guess at this value.
82	*/
83	#define VGA_MAPPING_SIZE _512K
84
85
86	#define MSR_COLOR_EMULATION 0x01
87	#define MSR_PAGE_SELECT 0x20
88
89	#define ST01_V_RETRACE 0x08
90	#define ST01_DISP_ENABLE 0x01
91
92	/* bochs VBE support */
93	#define CONFIG_BOCHS_VBE
94
95	#ifdef CONFIG_BOCHS_VBE
96
97	/* Cross reference with <VBoxVideoVBE.h> */
98	#define VBE_DISPI_INDEX_NB_SAVED 0xb /* Old number of saved registers (vbe_regs array, see vga_load) */
99	#define VBE_DISPI_INDEX_NB 0xd /* Total number of VBE registers */
100
101	#define VGA_STATE_COMMON_BOCHS_VBE \
102	uint16_t vbe_index; \
103	uint16_t vbe_regs[VBE_DISPI_INDEX_NB]; \
104	uint16_t alignment[2]; /* pad to 64 bits */ \
105	uint32_t vbe_start_addr; \
106	uint32_t vbe_line_offset; \
107	uint32_t vbe_bank_max;
108
109	#else
110
111	#define VGA_STATE_COMMON_BOCHS_VBE
112
113	#endif /* !CONFIG_BOCHS_VBE */
114
115	#define CH_ATTR_SIZE (160 * 100)
116	#define VGA_MAX_HEIGHT VBE_DISPI_MAX_YRES
117
118	typedef struct vga_retrace_s {
119	unsigned frame_cclks; /* Character clocks per frame. */
120	unsigned frame_ns; /* Frame duration in ns. */
121	unsigned cclk_ns; /* Character clock duration in ns. */
122	unsigned vb_start; /* Vertical blanking start (scanline). */
123	unsigned vb_end; /* Vertical blanking end (scanline). */
124	unsigned vb_end_ns; /* Vertical blanking end time (length) in ns. */
125	unsigned vs_start; /* Vertical sync start (scanline). */
126	unsigned vs_end; /* Vertical sync end (scanline). */
127	unsigned vs_start_ns; /* Vertical sync start time in ns. */
128	unsigned vs_end_ns; /* Vertical sync end time in ns. */
129	unsigned h_total; /* Horizontal total (cclks per scanline). */
130	unsigned h_total_ns; /* Scanline duration in ns. */
131	unsigned hb_start; /* Horizontal blanking start (cclk). */
132	unsigned hb_end; /* Horizontal blanking end (cclk). */
133	unsigned hb_end_ns; /* Horizontal blanking end time (length) in ns. */
134	unsigned v_freq_hz; /* Vertical refresh rate to emulate. */
135	} vga_retrace_s;
136
137	#ifndef VBOX
138	#define VGA_STATE_COMMON \
139	uint8_t *vram_ptr; \
140	unsigned long vram_offset; \
141	unsigned int vram_size; \
142	uint32_t latch; \
143	uint8_t sr_index; \
144	uint8_t sr[256]; \
145	uint8_t gr_index; \
146	uint8_t gr[256]; \
147	uint8_t ar_index; \
148	uint8_t ar[21]; \
149	int ar_flip_flop; \
150	uint8_t cr_index; \
151	uint8_t cr[256]; /* CRT registers */ \
152	uint8_t msr; /* Misc Output Register */ \
153	uint8_t fcr; /* Feature Control Register */ \
154	uint8_t st00; /* status 0 */ \
155	uint8_t st01; /* status 1 */ \
156	uint8_t dac_state; \
157	uint8_t dac_sub_index; \
158	uint8_t dac_read_index; \
159	uint8_t dac_write_index; \
160	uint8_t dac_cache[3]; /* used when writing */ \
161	uint8_t palette[768]; \
162	int32_t bank_offset; \
163	int (get_bpp)(struct VGAState s); \
164	void (get_offsets)(struct VGAState s, \
165	uint32_t *pline_offset, \
166	uint32_t *pstart_addr, \
167	uint32_t *pline_compare); \
168	void (get_resolution)(struct VGAState s, \
169	int *pwidth, \
170	int *pheight); \
171	VGA_STATE_COMMON_BOCHS_VBE \
172	/* display refresh support */ \
173	DisplayState *ds; \
174	uint32_t font_offsets[2]; \
175	int graphic_mode; \
176	uint8_t shift_control; \
177	uint8_t double_scan; \
178	uint32_t line_offset; \
179	uint32_t line_compare; \
180	uint32_t start_addr; \
181	uint32_t plane_updated; \
182	uint8_t last_cw, last_ch; \
183	uint32_t last_width, last_height; /* in chars or pixels */ \
184	uint32_t last_scr_width, last_scr_height; /* in pixels */ \
185	uint8_t cursor_start, cursor_end; \
186	uint32_t cursor_offset; \
187	unsigned int (*rgb_to_pixel)(unsigned int r, \
188	unsigned int g, unsigned b); \
189	/* hardware mouse cursor support */ \
190	uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32]; \
191	void (cursor_invalidate)(struct VGAState s); \
192	void (cursor_draw_line)(struct VGAState s, uint8_t *d, int y); \
193	/* tell for each page if it has been updated since the last time */ \
194	uint32_t last_palette[256]; \
195	uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
196
197	#else /* VBOX */
198
199	/* bird: Since we've changed types, reordered members, done alignment
200	paddings and more, VGA_STATE_COMMON was added directly to the
201	struct to make it more readable and easier to handle. */
202
203	struct VGAState;
204	typedef int FNGETBPP(struct VGAState *s);
205	typedef void FNGETOFFSETS(struct VGAState s, uint32_t pline_offset, uint32_t pstart_addr, uint32_t pline_compare);
206	typedef void FNGETRESOLUTION(struct VGAState s, int pwidth, int *pheight);
207	typedef unsigned int FNRGBTOPIXEL(unsigned int r, unsigned int g, unsigned b);
208	typedef void FNCURSORINVALIDATE(struct VGAState *s);
209	typedef void FNCURSORDRAWLINE(struct VGAState s, uint8_t d, int y);
210
211	#endif /* VBOX */
212
213	#ifdef VBOX_WITH_VDMA
214	typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
215	#endif
216
217	#ifdef VBOX_WITH_VIDEOHWACCEL
218	#define VBOX_VHWA_MAX_PENDING_COMMANDS 1000
219
220	typedef struct _VBOX_VHWA_PENDINGCMD
221	{
222	RTLISTNODE Node;
223	VBOXVHWACMD RT_UNTRUSTED_VOLATILE_GUEST *pCommand;
224	} VBOX_VHWA_PENDINGCMD;
225	#endif
226
227
228	typedef struct VGAState
229	{
230	#ifndef VBOX
231	VGA_STATE_COMMON
232	#else /* VBOX */
233	R3PTRTYPE(uint8_t *) vram_ptrR3;
234	R3PTRTYPE(FNGETBPP *) get_bpp;
235	R3PTRTYPE(FNGETOFFSETS *) get_offsets;
236	R3PTRTYPE(FNGETRESOLUTION *) get_resolution;
237	R3PTRTYPE(FNRGBTOPIXEL *) rgb_to_pixel;
238	R3PTRTYPE(FNCURSORINVALIDATE *) cursor_invalidate;
239	R3PTRTYPE(FNCURSORDRAWLINE *) cursor_draw_line;
240	RTR3PTR R3PtrCmnAlignment;
241	uint32_t vram_size;
242	uint32_t latch;
243	uint8_t sr_index;
244	uint8_t sr[256];
245	uint8_t gr_index;
246	uint8_t gr[256];
247	uint8_t ar_index;
248	uint8_t ar[21];
249	int32_t ar_flip_flop;
250	uint8_t cr_index;
251	uint8_t cr[256]; /* CRT registers */
252	uint8_t msr; /* Misc Output Register */
253	uint8_t fcr; /* Feature Control Register */
254	uint8_t st00; /* status 0 */
255	uint8_t st01; /* status 1 */
256	uint8_t dac_state;
257	uint8_t dac_sub_index;
258	uint8_t dac_read_index;
259	uint8_t dac_write_index;
260	uint8_t dac_cache[3]; /* used when writing */
261	uint8_t palette[768];
262	int32_t bank_offset;
263	VGA_STATE_COMMON_BOCHS_VBE
264	/* display refresh support */
265	uint32_t font_offsets[2];
266	int32_t graphic_mode;
267	uint8_t shift_control;
268	uint8_t double_scan;
269	uint8_t padding1[2];
270	uint32_t line_offset;
271	uint32_t vga_addr_mask;
272	uint32_t padding1a;
273	uint32_t line_compare;
274	uint32_t start_addr;
275	uint32_t plane_updated;
276	uint8_t last_cw, last_ch, padding2[2];
277	uint32_t last_width, last_height; /* in chars or pixels */
278	uint32_t last_scr_width, last_scr_height; /* in pixels */
279	uint32_t last_bpp;
280	uint8_t cursor_start, cursor_end;
281	bool last_cur_blink, last_chr_blink;
282	uint32_t cursor_offset;
283	/* hardware mouse cursor support */
284	uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32];
285	/* tell for each page if it has been updated since the last time */
286	uint32_t last_palette[256];
287	uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
288
289	/** end-of-common-state-marker */
290	uint32_t u32Marker;
291
292	# ifdef VBOX_WITH_RAW_MODE_KEEP
293	/** Pointer to the device instance - RC Ptr. */
294	PPDMDEVINSRC pDevInsRC;
295	/** Pointer to the GC vram mapping. */
296	RCPTRTYPE(uint8_t *) vram_ptrRC;
297	uint32_t Padding1;
298	# endif
299
300	/** Pointer to the device instance - R3 Ptr. */
301	PPDMDEVINSR3 pDevInsR3;
302	# ifdef VBOX_WITH_HGSMI
303	R3PTRTYPE(PHGSMIINSTANCE) pHGSMI;
304	# endif
305	# ifdef VBOX_WITH_VDMA
306	R3PTRTYPE(PVBOXVDMAHOST) pVdma;
307	# endif
308	/** LUN\#0: The display port base interface. */
309	PDMIBASE IBase;
310	/** LUN\#0: The display port interface. */
311	PDMIDISPLAYPORT IPort;
312	# if defined(VBOX_WITH_HGSMI)
313	/** LUN\#0: VBVA callbacks interface */
314	PDMIDISPLAYVBVACALLBACKS IVBVACallbacks;
315	# else
316	RTR3PTR Padding2;
317	# endif
318	/** Status LUN: Leds interface. */
319	PDMILEDPORTS ILeds;
320
321	/** Pointer to base interface of the driver. */
322	R3PTRTYPE(PPDMIBASE) pDrvBase;
323	/** Pointer to display connector interface of the driver. */
324	R3PTRTYPE(PPDMIDISPLAYCONNECTOR) pDrv;
325
326	/** Status LUN: Partner of ILeds. */
327	R3PTRTYPE(PPDMILEDCONNECTORS) pLedsConnector;
328
329	/** Refresh timer handle - HC. */
330	TMTIMERHANDLE hRefreshTimer;
331
332	/** Pointer to the device instance - R0 Ptr. */
333	PPDMDEVINSR0 pDevInsR0;
334	/** The R0 vram pointer... */
335	R0PTRTYPE(uint8_t *) vram_ptrR0;
336
337	# ifdef VBOX_WITH_VMSVGA
338	VMSVGAState svga;
339	# endif
340
341	/** The number of monitors. */
342	uint32_t cMonitors;
343	/** Current refresh timer interval. */
344	uint32_t cMilliesRefreshInterval;
345	/** Bitmap tracking dirty pages. */
346	uint32_t au32DirtyBitmap[VGA_VRAM_MAX / PAGE_SIZE / 32];
347
348	/** Flag indicating that there are dirty bits. This is used to optimize the handler resetting. */
349	bool fHasDirtyBits;
350	/** LFB was updated flag. */
351	bool fLFBUpdated;
352	/** Flag indicating that the VGA memory in the 0xa0000-0xbffff region has been remapped to allow direct access. */
353	bool fRemappedVGA;
354	/** Whether to render the guest VRAM to the framebuffer memory. False only for some LFB modes. */
355	bool fRenderVRAM;
356	/** Whether 3D is enabled for the VM. */
357	bool f3DEnabled;
358	# ifdef VBOX_WITH_VMSVGA
359	/* Whether the SVGA emulation is enabled or not. */
360	bool fVMSVGAEnabled;
361	bool fVMSVGAPciId;
362	bool fVMSVGAPciBarLayout;
363	bool Padding4[4];
364	# else
365	bool Padding4[3+4];
366	# endif
367
368	struct {
369	uint32_t u32Padding1;
370	uint32_t iVRAM;
371	# ifdef VBOX_WITH_VMSVGA
372	uint32_t iIO;
373	uint32_t iFIFO;
374	# endif
375	} pciRegions;
376
377	/** Physical access type for the linear frame buffer dirty page tracking. */
378	PGMPHYSHANDLERTYPE hLfbAccessHandlerType;
379
380	/** The physical address the VRAM was assigned. */
381	RTGCPHYS GCPhysVRAM;
382	/** The critical section protect the instance data. */
383	PDMCRITSECT CritSect;
384
385	STAMPROFILE StatRZMemoryRead;
386	STAMPROFILE StatR3MemoryRead;
387	STAMPROFILE StatRZMemoryWrite;
388	STAMPROFILE StatR3MemoryWrite;
389	STAMCOUNTER StatMapPage; /*< Counts IOMMMIOMapMMIO2Page calls. /
390	STAMCOUNTER StatUpdateDisp; /*< Counts vgaPortUpdateDisplay calls. /
391	# ifdef VBOX_WITH_HGSMI
392	STAMCOUNTER StatHgsmiMdaCgaAccesses;
393	# endif
394
395	/* Keep track of ring 0 latched accesses to the VGA MMIO memory. */
396	uint64_t u64LastLatchedAccess;
397	uint32_t cLatchAccesses;
398	uint16_t uMaskLatchAccess;
399	uint16_t iMask;
400
401	# ifdef VBE_BYTEWISE_IO
402	/** VBE read/write data/index flags */
403	uint8_t fReadVBEData;
404	uint8_t fWriteVBEData;
405	uint8_t fReadVBEIndex;
406	uint8_t fWriteVBEIndex;
407	/** VBE write data/index one byte buffer */
408	uint8_t cbWriteVBEData;
409	uint8_t cbWriteVBEIndex;
410	/** VBE Extra Data write address one byte buffer */
411	uint8_t cbWriteVBEExtraAddress;
412	uint8_t Padding5;
413	# endif
414
415	/** Retrace emulation state */
416	bool fRealRetrace;
417	bool Padding6[HC_ARCH_BITS == 64 ? 7 : 3];
418	vga_retrace_s retrace_state;
419
420	/** The VBE BIOS extra data. */
421	R3PTRTYPE(uint8_t *) pbVBEExtraData;
422	/** The size of the VBE BIOS extra data. */
423	uint16_t cbVBEExtraData;
424	/** The VBE BIOS current memory address. */
425	uint16_t u16VBEExtraAddress;
426	uint16_t Padding7[2];
427
428	/** The BIOS logo data. */
429	R3PTRTYPE(uint8_t *) pbLogo;
430	/** The name of the logo file. */
431	R3PTRTYPE(char *) pszLogoFile;
432	/** Bitmap image data. */
433	R3PTRTYPE(uint8_t *) pbLogoBitmap;
434	/** Current logo data offset. */
435	uint32_t offLogoData;
436	/** The size of the BIOS logo data. */
437	uint32_t cbLogo;
438	/** Current logo command. */
439	uint16_t LogoCommand;
440	/** Bitmap width. */
441	uint16_t cxLogo;
442	/** Bitmap height. */
443	uint16_t cyLogo;
444	/** Bitmap planes. */
445	uint16_t cLogoPlanes;
446	/** Bitmap depth. */
447	uint16_t cLogoBits;
448	/** Bitmap compression. */
449	uint16_t LogoCompression;
450	/** Bitmap colors used. */
451	uint16_t cLogoUsedColors;
452	/** Palette size. */
453	uint16_t cLogoPalEntries;
454	/** Clear screen flag. */
455	uint8_t fLogoClearScreen;
456	bool fBootMenuInverse;
457	uint8_t Padding8[6];
458	/** Palette data. */
459	uint32_t au32LogoPalette[256];
460
461	/** The VGA BIOS ROM data. */
462	R3PTRTYPE(uint8_t *) pbVgaBios;
463	/** The size of the VGA BIOS ROM. */
464	uint64_t cbVgaBios;
465	/** The name of the VGA BIOS ROM file. */
466	R3PTRTYPE(char *) pszVgaBiosFile;
467	# if HC_ARCH_BITS == 32
468	uint32_t Padding9;
469	# endif
470
471	# ifdef VBOX_WITH_HGSMI
472	/** Base port in the assigned PCI I/O space. */
473	RTIOPORT IOPortBase;
474	# ifdef VBOX_WITH_WDDM
475	uint8_t Padding10[2];
476	/** Specifies guest driver caps, i.e. whether it can handle IRQs from the
477	* adapter, the way it can handle async HGSMI command completion, etc. */
478	uint32_t fGuestCaps;
479	uint32_t fScanLineCfg;
480	uint32_t Padding11;
481	# else
482	uint8_t Padding11[14];
483	# endif
484
485	/** The critical section serializes the HGSMI IRQ setting/clearing. */
486	PDMCRITSECT CritSectIRQ;
487	/** VBVARaiseIRQ flags which were set when the guest was still processing previous IRQ. */
488	uint32_t fu32PendingGuestFlags;
489	uint32_t Padding12;
490	# endif /* VBOX_WITH_HGSMI */
491
492	PDMLED Led3D;
493
494	struct {
495	volatile uint32_t cPending;
496	uint32_t Padding1;
497	union
498	{
499	RTLISTNODE PendingList;
500	/* make sure the structure sized cross different contexts correctly */
501	struct
502	{
503	R3PTRTYPE(void *) dummy1;
504	R3PTRTYPE(void *) dummy2;
505	} dummy;
506	};
507	} pendingVhwaCommands;
508
509	/** @name I/O ports for range 0x3c0-3cf.
510	* @{ */
511	IOMIOPORTHANDLE hIoPortAr;
512	IOMIOPORTHANDLE hIoPortMsrSt00;
513	IOMIOPORTHANDLE hIoPort3c3;
514	IOMIOPORTHANDLE hIoPortSr;
515	IOMIOPORTHANDLE hIoPortDac;
516	IOMIOPORTHANDLE hIoPortPos;
517	IOMIOPORTHANDLE hIoPortGr;
518	/** @} */
519
520	/** @name I/O ports for MDA 0x3b0-0x3bf (sparse)
521	* @{ */
522	IOMIOPORTHANDLE hIoPortMdaCrt;
523	IOMIOPORTHANDLE hIoPortMdaFcrSt;
524	/** @} */
525
526	/** @name I/O ports for CGA 0x3d0-0x3df (sparse)
527	* @{ */
528	IOMIOPORTHANDLE hIoPortCgaCrt;
529	IOMIOPORTHANDLE hIoPortCgaFcrSt;
530	/** @} */
531
532	# ifdef VBOX_WITH_HGSMI
533	/** @name I/O ports for HGSMI 0x3b0-03b3 and 0x3d0-03d3 (ring-3 only)
534	* @{ */
535	IOMIOPORTHANDLE hIoPortHgsmiHost;
536	IOMIOPORTHANDLE hIoPortHgsmiGuest;
537	/** @} */
538	# endif
539
540	/** @name I/O ports for Boch VBE 0x1ce-0x1cf
541	* @{ */
542	IOMIOPORTHANDLE hIoPortVbeIndex;
543	IOMIOPORTHANDLE hIoPortVbeData;
544	/** @} */
545
546	/** The BIOS printf I/O port. */
547	IOMIOPORTHANDLE hIoPortBios;
548	/** The VBE extra data I/O port. */
549	IOMIOPORTHANDLE hIoPortVbeExtra;
550	/** The logo command I/O port. */
551	IOMIOPORTHANDLE hIoPortCmdLogo;
552
553	# ifdef VBOX_WITH_VMSVGA
554	/** VMSVGA: I/O port PCI region. */
555	IOMIOPORTHANDLE hIoPortVmSvga;
556	/** VMSVGA: The MMIO2 handle of the FIFO PCI region. */
557	PGMMMIO2HANDLE hMmio2VmSvgaFifo;
558	# endif
559	/** The MMIO2 handle of the VRAM. */
560	PGMMMIO2HANDLE hMmio2VRam;
561	#endif /* VBOX */
562	} VGAState;
563	#ifdef VBOX
564	/** VGA state. */
565	typedef VGAState VGASTATE;
566	/** Pointer to the VGA state. */
567	typedef VGASTATE *PVGASTATE;
568	AssertCompileMemberAlignment(VGASTATE, bank_offset, 8);
569	AssertCompileMemberAlignment(VGASTATE, font_offsets, 8);
570	AssertCompileMemberAlignment(VGASTATE, last_ch_attr, 8);
571	AssertCompileMemberAlignment(VGASTATE, u32Marker, 8);
572	#endif
573
574	/** VBE Extra Data. */
575	typedef VBEHeader VBEHEADER;
576	/** Pointer to the VBE Extra Data. */
577	typedef VBEHEADER *PVBEHEADER;
578
579	#if !defined(VBOX) \|\| defined(IN_RING3)
580	static inline int c6_to_8(int v)
581	{
582	int b;
583	v &= 0x3f;
584	b = v & 1;
585	return (v << 2) \| (b << 1) \| b;
586	}
587	#endif /* !VBOX \|\| IN_RING3 */
588
589
590	#ifdef VBOX_WITH_HGSMI
591	int VBVAInit (PVGASTATE pVGAState);
592	void VBVADestroy (PVGASTATE pVGAState);
593	int VBVAUpdateDisplay (PVGASTATE pVGAState);
594	void VBVAReset (PVGASTATE pVGAState);
595	void VBVAPause (PVGASTATE pVGAState, bool fPause);
596	void VBVAOnVBEChanged(PVGASTATE pVGAState);
597	void VBVAOnResume(PVGASTATE pThis);
598
599	bool VBVAIsPaused(PVGASTATE pVGAState);
600	bool VBVAIsEnabled(PVGASTATE pVGAState);
601
602	void VBVARaiseIrq(PVGASTATE pVGAState, uint32_t fFlags);
603
604	int VBVAInfoView(PVGASTATE pVGAState, const VBVAINFOVIEW RT_UNTRUSTED_VOLATILE_HOST *pView);
605	int VBVAInfoScreen(PVGASTATE pVGAState, const VBVAINFOSCREEN RT_UNTRUSTED_VOLATILE_HOST *pScreen);
606	int VBVAGetInfoViewAndScreen(PVGASTATE pVGAState, uint32_t u32ViewIndex, VBVAINFOVIEW pView, VBVAINFOSCREEN pScreen);
607
608	/* @return host-guest flags that were set on reset
609	* this allows the caller to make further cleaning when needed,
610	* e.g. reset the IRQ */
611	uint32_t HGSMIReset(PHGSMIINSTANCE pIns);
612
613	# ifdef VBOX_WITH_VIDEOHWACCEL
614	DECLCALLBACK(int) vbvaVHWACommandCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface, VBOXVHWACMD RT_UNTRUSTED_VOLATILE_GUEST *pCmd);
615	int vbvaVHWAConstruct(PVGASTATE pVGAState);
616	int vbvaVHWAReset(PVGASTATE pVGAState);
617
618	void vbvaTimerCb(PVGASTATE pVGAState);
619
620	int vboxVBVASaveStatePrep(PPDMDEVINS pDevIns);
621	int vboxVBVASaveStateDone(PPDMDEVINS pDevIns);
622	# endif
623
624	#define PPDMIDISPLAYVBVACALLBACKS_2_PVGASTATE(_pcb) ( (PVGASTATE)((uint8_t *)(_pcb) - RT_OFFSETOF(VGASTATE, IVBVACallbacks)) )
625
626	int vboxVBVASaveStateExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
627	int vboxVBVALoadStateExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t u32Version);
628	int vboxVBVALoadStateDone(PPDMDEVINS pDevIns);
629
630	DECLCALLBACK(int) vgaUpdateDisplayAll(PVGASTATE pThis, bool fFailOnResize);
631	DECLCALLBACK(int) vbvaPortSendModeHint(PPDMIDISPLAYPORT pInterface, uint32_t cx,
632	uint32_t cy, uint32_t cBPP,
633	uint32_t cDisplay, uint32_t dx,
634	uint32_t dy, uint32_t fEnabled,
635	uint32_t fNotifyGuest);
636
637	# ifdef VBOX_WITH_VDMA
638	typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
639	int vboxVDMAConstruct(PVGASTATE pVGAState, uint32_t cPipeElements);
640	void vboxVDMADestruct(PVBOXVDMAHOST pVdma);
641	void vboxVDMAReset(PVBOXVDMAHOST pVdma);
642	void vboxVDMAControl(PVBOXVDMAHOST pVdma, VBOXVDMA_CTL RT_UNTRUSTED_VOLATILE_GUEST *pCmd, uint32_t cbCmd);
643	void vboxVDMACommand(PVBOXVDMAHOST pVdma, VBOXVDMACBUF_DR RT_UNTRUSTED_VOLATILE_GUEST *pCmd, uint32_t cbCmd);
644	int vboxVDMASaveStateExecPrep(struct VBOXVDMAHOST *pVdma);
645	int vboxVDMASaveStateExecDone(struct VBOXVDMAHOST *pVdma);
646	int vboxVDMASaveStateExecPerform(PCPDMDEVHLPR3 pHlp, struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM);
647	int vboxVDMASaveLoadExecPerform(PCPDMDEVHLPR3 pHlp, struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM, uint32_t u32Version);
648	int vboxVDMASaveLoadDone(struct VBOXVDMAHOST *pVdma);
649	# endif /* VBOX_WITH_VDMA */
650
651	#endif /* VBOX_WITH_HGSMI */
652
653	# ifdef VBOX_WITH_VMSVGA
654	int vgaR3RegisterVRAMHandler(PVGASTATE pVGAState, uint64_t cbFrameBuffer);
655	int vgaR3UnregisterVRAMHandler(PVGASTATE pVGAState);
656	int vgaR3UpdateDisplay(PVGASTATE pVGAState, unsigned xStart, unsigned yStart, unsigned width, unsigned height);
657	# endif
658
659	#ifndef VBOX
660	void vga_common_init(VGAState s, DisplayState ds, uint8_t *vga_ram_base,
661	unsigned long vga_ram_offset, int vga_ram_size);
662	uint32_t vga_mem_readb(void *opaque, target_phys_addr_t addr);
663	void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val);
664	void vga_invalidate_scanlines(VGAState *s, int y1, int y2);
665
666	void vga_draw_cursor_line_8(uint8_t d1, const uint8_t src1,
667	int poffset, int w,
668	unsigned int color0, unsigned int color1,
669	unsigned int color_xor);
670	void vga_draw_cursor_line_16(uint8_t d1, const uint8_t src1,
671	int poffset, int w,
672	unsigned int color0, unsigned int color1,
673	unsigned int color_xor);
674	void vga_draw_cursor_line_32(uint8_t d1, const uint8_t src1,
675	int poffset, int w,
676	unsigned int color0, unsigned int color1,
677	unsigned int color_xor);
678
679	extern const uint8_t sr_mask[8];
680	extern const uint8_t gr_mask[16];
681	#endif /* !VBOX */
682
683	#endif /* !VBOX_INCLUDED_SRC_Graphics_DevVGA_h */
684

Note: See TracBrowser for help on using the repository browser.

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA.h@ 82076

Download in other formats: