DevVGA.h@ 98065

Last change on this file since 98065 was 98065, checked in by vboxsync, 23 months ago
DevVGA: Simplified the tracking of remapped VGA pages, we don't need two variables for that. Corrected comments about the range, since it's technically the 128KB range A0000 thru BFFFF, not just 64KB thru AFFFF. bugref:10251
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File size: 30.5 KB

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1	/* $Id: DevVGA.h 98065 2023-01-12 15:57:23Z vboxsync $ */
2	/** @file
3	* DevVGA - VBox VGA/VESA device, internal header.
4	*/
5
6	/*
7	* Copyright (C) 2006-2022 Oracle and/or its affiliates.
8	*
9	* This file is part of VirtualBox base platform packages, as
10	* available from https://www.virtualbox.org.
11	*
12	* This program is free software; you can redistribute it and/or
13	* modify it under the terms of the GNU General Public License
14	* as published by the Free Software Foundation, in version 3 of the
15	* License.
16	*
17	* This program is distributed in the hope that it will be useful, but
18	* WITHOUT ANY WARRANTY; without even the implied warranty of
19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20	* General Public License for more details.
21	*
22	* You should have received a copy of the GNU General Public License
23	* along with this program; if not, see <https://www.gnu.org/licenses>.
24	*
25	* SPDX-License-Identifier: GPL-3.0-only
26	* --------------------------------------------------------------------
27	*
28	* This code is based on:
29	*
30	* QEMU internal VGA defines.
31	*
32	* Copyright (c) 2003-2004 Fabrice Bellard
33	*
34	* Permission is hereby granted, free of charge, to any person obtaining a copy
35	* of this software and associated documentation files (the "Software"), to deal
36	* in the Software without restriction, including without limitation the rights
37	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
38	* copies of the Software, and to permit persons to whom the Software is
39	* furnished to do so, subject to the following conditions:
40	*
41	* The above copyright notice and this permission notice shall be included in
42	* all copies or substantial portions of the Software.
43	*
44	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
45	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
46	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
47	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
48	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
49	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
50	* THE SOFTWARE.
51	*/
52
53	#ifndef VBOX_INCLUDED_SRC_Graphics_DevVGA_h
54	#define VBOX_INCLUDED_SRC_Graphics_DevVGA_h
55	#ifndef RT_WITHOUT_PRAGMA_ONCE
56	# pragma once
57	#endif
58
59	#include <VBoxVideoVBE.h>
60	#include <VBoxVideoVBEPrivate.h>
61
62	#ifdef VBOX_WITH_HGSMI
63	# include "HGSMI/HGSMIHost.h"
64	#endif /* VBOX_WITH_HGSMI */
65	#include "DevVGASavedState.h"
66
67	#ifdef VBOX_WITH_VMSVGA
68	# include "DevVGA-SVGA.h"
69	#endif
70
71	#include <iprt/list.h>
72
73
74	/** Use VBE bytewise I/O. Only needed for Windows Longhorn/Vista betas and backwards compatibility. */
75	#define VBE_BYTEWISE_IO
76
77	#ifdef VBOX
78	/** The default amount of VRAM. */
79	# define VGA_VRAM_DEFAULT (_4M)
80	/** The maximum amount of VRAM. Limited by VBOX_MAX_ALLOC_PAGE_COUNT. */
81	# define VGA_VRAM_MAX (256 * _1M)
82	/** The minimum amount of VRAM. */
83	# define VGA_VRAM_MIN (_1M)
84	#endif
85
86
87	/** @name Macros dealing with partial ring-0/raw-mode VRAM mappings.
88	* @{ */
89	/** The size of the VGA ring-0 and raw-mode mapping.
90	*
91	* This is supposed to be all the VGA memory accessible to the guest.
92	* The initial value was 256KB but NTAllInOne.iso appears to access more
93	* thus the limit was upped to 512KB.
94	*
95	* @todo Someone with some VGA knowhow should make a better guess at this value.
96	*/
97	#define VGA_MAPPING_SIZE _512K
98	/** Enables partially mapping the VRAM into ring-0 rather than using the ring-3.
99	* The VGA_MAPPING_SIZE define sets the number of bytes that will be mapped. */
100	#define VGA_WITH_PARTIAL_RING0_MAPPING
101
102	/**
103	* Check buffer if an VRAM offset is within the right range or not.
104	*/
105	#if defined(IN_RC) \|\| defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) \|\| (defined(IN_RING0) && defined(VGA_WITH_PARTIAL_RING0_MAPPING))
106	# define VERIFY_VRAM_WRITE_OFF_RETURN(pThis, off) \
107	do { \
108	if ((off) < VGA_MAPPING_SIZE) \
109	RT_UNTRUSTED_VALIDATED_FENCE(); \
110	else \
111	{ \
112	AssertMsgReturn((off) < (pThis)->vram_size, ("%RX32 !< %RX32\n", (uint32_t)(off), (pThis)->vram_size), VINF_SUCCESS); \
113	Log2(("%Rfn[%d]: %RX32 -> R3\n", __PRETTY_FUNCTION__, __LINE__, (off))); \
114	return VINF_IOM_R3_MMIO_WRITE; \
115	} \
116	} while (0)
117	#else
118	# define VERIFY_VRAM_WRITE_OFF_RETURN(pThis, off) \
119	do { \
120	AssertMsgReturn((off) < (pThis)->vram_size, ("%RX32 !< %RX32\n", (uint32_t)(off), (pThis)->vram_size), VINF_SUCCESS); \
121	RT_UNTRUSTED_VALIDATED_FENCE(); \
122	} while (0)
123	#endif
124
125	/**
126	* Check buffer if an VRAM offset is within the right range or not.
127	*/
128	#if defined(IN_RC) \|\| defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) \|\| (defined(IN_RING0) && defined(VGA_WITH_PARTIAL_RING0_MAPPING))
129	# define VERIFY_VRAM_READ_OFF_RETURN(pThis, off, rcVar) \
130	do { \
131	if ((off) < VGA_MAPPING_SIZE) \
132	RT_UNTRUSTED_VALIDATED_FENCE(); \
133	else \
134	{ \
135	AssertMsgReturn((off) < (pThis)->vram_size, ("%RX32 !< %RX32\n", (uint32_t)(off), (pThis)->vram_size), 0xff); \
136	Log2(("%Rfn[%d]: %RX32 -> R3\n", __PRETTY_FUNCTION__, __LINE__, (off))); \
137	(rcVar) = VINF_IOM_R3_MMIO_READ; \
138	return 0; \
139	} \
140	} while (0)
141	#else
142	# define VERIFY_VRAM_READ_OFF_RETURN(pThis, off, rcVar) \
143	do { \
144	AssertMsgReturn((off) < (pThis)->vram_size, ("%RX32 !< %RX32\n", (uint32_t)(off), (pThis)->vram_size), 0xff); \
145	RT_UNTRUSTED_VALIDATED_FENCE(); \
146	NOREF(rcVar); \
147	} while (0)
148	#endif
149	/** @} */
150
151
152	#define MSR_COLOR_EMULATION 0x01
153	#define MSR_PAGE_SELECT 0x20
154
155	#define ST01_V_RETRACE 0x08
156	#define ST01_DISP_ENABLE 0x01
157
158	/* bochs VBE support */
159	#define CONFIG_BOCHS_VBE
160
161	#ifdef CONFIG_BOCHS_VBE
162
163	/* Cross reference with <VBoxVideoVBE.h> */
164	#define VBE_DISPI_INDEX_NB_SAVED 0xb /* Old number of saved registers (vbe_regs array, see vga_load) */
165	#define VBE_DISPI_INDEX_NB 0xd /* Total number of VBE registers */
166
167	#define VGA_STATE_COMMON_BOCHS_VBE \
168	uint16_t vbe_index; \
169	uint16_t vbe_regs[VBE_DISPI_INDEX_NB]; \
170	uint16_t alignment[2]; /* pad to 64 bits */ \
171	uint32_t vbe_start_addr; \
172	uint32_t vbe_line_offset; \
173	uint32_t vbe_bank_max;
174
175	#else
176
177	#define VGA_STATE_COMMON_BOCHS_VBE
178
179	#endif /* !CONFIG_BOCHS_VBE */
180
181	#define CH_ATTR_SIZE (160 * 100)
182	#define VGA_MAX_HEIGHT VBE_DISPI_MAX_YRES
183
184	typedef struct vga_retrace_s {
185	unsigned frame_cclks; /* Character clocks per frame. */
186	unsigned frame_ns; /* Frame duration in ns. */
187	unsigned cclk_ns; /* Character clock duration in ns. */
188	unsigned vb_start; /* Vertical blanking start (scanline). */
189	unsigned vb_end; /* Vertical blanking end (scanline). */
190	unsigned vb_end_ns; /* Vertical blanking end time (length) in ns. */
191	unsigned vs_start; /* Vertical sync start (scanline). */
192	unsigned vs_end; /* Vertical sync end (scanline). */
193	unsigned vs_start_ns; /* Vertical sync start time in ns. */
194	unsigned vs_end_ns; /* Vertical sync end time in ns. */
195	unsigned h_total; /* Horizontal total (cclks per scanline). */
196	unsigned h_total_ns; /* Scanline duration in ns. */
197	unsigned hb_start; /* Horizontal blanking start (cclk). */
198	unsigned hb_end; /* Horizontal blanking end (cclk). */
199	unsigned hb_end_ns; /* Horizontal blanking end time (length) in ns. */
200	unsigned v_freq_hz; /* Vertical refresh rate to emulate. */
201	} vga_retrace_s;
202
203	#ifndef VBOX
204	#define VGA_STATE_COMMON \
205	unsigned long vram_offset; \
206	unsigned int vram_size; \
207	uint32_t latch; \
208	uint8_t sr_index; \
209	uint8_t sr[256]; \
210	uint8_t gr_index; \
211	uint8_t gr[256]; \
212	uint8_t ar_index; \
213	uint8_t ar[21]; \
214	int ar_flip_flop; \
215	uint8_t cr_index; \
216	uint8_t cr[256]; /* CRT registers */ \
217	uint8_t msr; /* Misc Output Register */ \
218	uint8_t fcr; /* Feature Control Register */ \
219	uint8_t st00; /* status 0 */ \
220	uint8_t st01; /* status 1 */ \
221	uint8_t dac_state; \
222	uint8_t dac_sub_index; \
223	uint8_t dac_read_index; \
224	uint8_t dac_write_index; \
225	uint8_t dac_cache[3]; /* used when writing */ \
226	uint8_t palette[768]; \
227	int32_t bank_offset; \
228	int (get_bpp)(struct VGAState s); \
229	void (get_offsets)(struct VGAState s, \
230	uint32_t *pline_offset, \
231	uint32_t *pstart_addr, \
232	uint32_t *pline_compare); \
233	void (get_resolution)(struct VGAState s, \
234	int *pwidth, \
235	int *pheight); \
236	VGA_STATE_COMMON_BOCHS_VBE \
237	/* display refresh support */ \
238	DisplayState *ds; \
239	uint32_t font_offsets[2]; \
240	int graphic_mode; \
241	uint8_t shift_control; \
242	uint8_t double_scan; \
243	uint32_t line_offset; \
244	uint32_t line_compare; \
245	uint32_t start_addr; \
246	uint32_t plane_updated; \
247	uint8_t last_cw, last_ch; \
248	uint32_t last_width, last_height; /* in chars or pixels */ \
249	uint32_t last_scr_width, last_scr_height; /* in pixels */ \
250	uint8_t cursor_start, cursor_end; \
251	uint32_t cursor_offset; \
252	unsigned int (*rgb_to_pixel)(unsigned int r, \
253	unsigned int g, unsigned b); \
254	/* hardware mouse cursor support */ \
255	uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32]; \
256	void (cursor_invalidate)(struct VGAState s); \
257	void (cursor_draw_line)(struct VGAState s, uint8_t *d, int y); \
258	/* tell for each page if it has been updated since the last time */ \
259	uint32_t last_palette[256]; \
260	uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
261
262	#else /* VBOX */
263
264	/* bird: Since we've changed types, reordered members, done alignment
265	paddings and more, VGA_STATE_COMMON was added directly to the
266	struct to make it more readable and easier to handle. */
267
268	struct VGAState;
269	typedef int FNGETBPP(struct VGAState *s);
270	typedef void FNGETOFFSETS(struct VGAState s, uint32_t pline_offset, uint32_t pstart_addr, uint32_t pline_compare);
271	typedef void FNGETRESOLUTION(struct VGAState s, int pwidth, int *pheight);
272	typedef unsigned int FNRGBTOPIXEL(unsigned int r, unsigned int g, unsigned b);
273	typedef void FNCURSORINVALIDATE(struct VGAState *s);
274	typedef void FNCURSORDRAWLINE(struct VGAState s, uint8_t d, int y);
275
276	#endif /* VBOX */
277
278	#ifdef VBOX_WITH_VDMA
279	typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
280	#endif
281
282	#ifdef VBOX_WITH_VIDEOHWACCEL
283	#define VBOX_VHWA_MAX_PENDING_COMMANDS 1000
284
285	typedef struct _VBOX_VHWA_PENDINGCMD
286	{
287	RTLISTNODE Node;
288	VBOXVHWACMD RT_UNTRUSTED_VOLATILE_GUEST *pCommand;
289	} VBOX_VHWA_PENDINGCMD;
290	#endif
291
292
293	/**
294	* The shared VGA state data.
295	*/
296	typedef struct VGAState
297	{
298	uint32_t vram_size;
299	uint32_t latch;
300	uint8_t sr_index;
301	uint8_t sr[256];
302	uint8_t gr_index;
303	uint8_t gr[256];
304	uint8_t ar_index;
305	uint8_t ar[21];
306	int32_t ar_flip_flop;
307	uint8_t cr_index;
308	uint8_t cr[256]; /* CRT registers */
309	uint8_t msr; /* Misc Output Register */
310	uint8_t fcr; /* Feature Control Register */
311	uint8_t st00; /* status 0 */
312	uint8_t st01; /* status 1 */
313	uint8_t dac_state;
314	uint8_t dac_sub_index;
315	uint8_t dac_read_index;
316	uint8_t dac_write_index;
317	uint8_t dac_cache[3]; /* used when writing */
318	uint8_t palette[768];
319	int32_t bank_offset;
320	VGA_STATE_COMMON_BOCHS_VBE
321	/* display refresh support */
322	uint32_t font_offsets[2];
323	int32_t graphic_mode;
324	uint8_t shift_control;
325	uint8_t double_scan;
326	uint8_t padding1[2];
327	uint32_t line_offset;
328	uint32_t vga_addr_mask;
329	uint32_t padding1a;
330	uint32_t line_compare;
331	uint32_t start_addr;
332	uint32_t plane_updated;
333	uint8_t last_cw, last_ch;
334	uint8_t last_uline; \
335	bool last_blink; \
336	uint32_t last_width, last_height; /* in chars or pixels */
337	uint32_t last_scr_width, last_scr_height; /* in pixels */
338	uint32_t last_bpp;
339	uint8_t cursor_start, cursor_end;
340	bool last_cur_blink, last_chr_blink;
341	uint32_t cursor_offset;
342	/** hardware mouse cursor support */
343	uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32];
344	/** tell for each page if it has been updated since the last time */
345	uint32_t last_palette[256];
346	uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
347
348	/** end-of-common-state-marker */
349	uint32_t u32Marker;
350
351	/** Refresh timer handle - HC. */
352	TMTIMERHANDLE hRefreshTimer;
353
354	#ifdef VBOX_WITH_VMSVGA
355	VMSVGASTATE svga;
356	#endif
357
358	/** The number of monitors. */
359	uint32_t cMonitors;
360	/** Current refresh timer interval. */
361	uint32_t cMilliesRefreshInterval;
362	/** Bitmap tracking dirty pages. */
363	uint64_t bmDirtyBitmap[VGA_VRAM_MAX / GUEST_PAGE_SIZE / 64];
364	/** Bitmap tracking which VGA memory pages in the 0xa0000-0xbffff region has
365	* been remapped to allow direct access.
366	* @note It's quite possible that mapping in the 0xb0000-0xbffff isn't possible,
367	* but we're playing safe and cover the whole VGA MMIO region here. */
368	uint32_t bmPageRemappedVGA;
369
370	/** Flag indicating that there are dirty bits. This is used to optimize the handler resetting. */
371	bool fHasDirtyBits;
372	/** Flag indicating that the VGA memory in the 0xa0000-0xbffff region has been remapped to allow direct access.
373	* @todo This is just an unnecessary summmary of bmPageMapBitmap. */
374	bool fRemappedVGA;
375	/** Whether to render the guest VRAM to the framebuffer memory. False only for some LFB modes. */
376	bool fRenderVRAM;
377	/** Whether 3D is enabled for the VM. */
378	bool f3DEnabled;
379	/** Set if state has been restored. */
380	bool fStateLoaded;
381	#ifdef VBOX_WITH_VMSVGA
382	/* Whether the SVGA emulation is enabled or not. */
383	bool fVMSVGAEnabled;
384	bool fVMSVGA10;
385	bool fVMSVGAPciId;
386	bool fVMSVGAPciBarLayout;
387	#else
388	bool afPadding4[4];
389	#endif
390
391	struct {
392	uint32_t u32Padding1;
393	uint32_t iVRAM;
394	#ifdef VBOX_WITH_VMSVGA
395	uint32_t iIO;
396	uint32_t iFIFO;
397	#endif
398	} pciRegions;
399
400	/** The physical address the VRAM was assigned. */
401	RTGCPHYS GCPhysVRAM;
402	/** The critical section protect the instance data. */
403	PDMCRITSECT CritSect;
404
405	/* Keep track of ring 0 latched accesses to the VGA MMIO memory. */
406	uint64_t u64LastLatchedAccess;
407	uint32_t cLatchAccesses;
408	uint16_t uMaskLatchAccess;
409	uint16_t iMask;
410
411	#ifdef VBE_BYTEWISE_IO
412	/** VBE read/write data/index flags */
413	uint8_t fReadVBEData;
414	uint8_t fWriteVBEData;
415	uint8_t fReadVBEIndex;
416	uint8_t fWriteVBEIndex;
417	/** VBE write data/index one byte buffer */
418	uint8_t cbWriteVBEData;
419	uint8_t cbWriteVBEIndex;
420	/** VBE Extra Data write address one byte buffer */
421	uint8_t cbWriteVBEExtraAddress;
422	uint8_t Padding5;
423	#endif
424
425	/** Retrace emulation state */
426	bool fRealRetrace;
427	bool Padding6[HC_ARCH_BITS == 64 ? 7 : 3];
428	vga_retrace_s retrace_state;
429
430	#ifdef VBOX_WITH_HGSMI
431	/** Base port in the assigned PCI I/O space. */
432	RTIOPORT IOPortBase;
433	# ifdef VBOX_WITH_WDDM
434	uint8_t Padding10[2];
435	/** Specifies guest driver caps, i.e. whether it can handle IRQs from the
436	* adapter, the way it can handle async HGSMI command completion, etc. */
437	uint32_t fGuestCaps;
438	uint32_t fScanLineCfg;
439	uint32_t Padding11;
440	# else
441	uint8_t Padding11[14];
442	# endif
443
444	/** The critical section serializes the HGSMI IRQ setting/clearing. */
445	PDMCRITSECT CritSectIRQ;
446	/** VBVARaiseIRQ flags which were set when the guest was still processing previous IRQ. */
447	uint32_t fu32PendingGuestFlags;
448	uint32_t Padding12;
449	#endif /* VBOX_WITH_HGSMI */
450
451	PDMLED Led3D;
452
453	struct {
454	volatile uint32_t cPending;
455	uint32_t Padding1;
456	union
457	{
458	RTLISTNODE PendingList;
459	/* make sure the structure sized cross different contexts correctly */
460	struct
461	{
462	R3PTRTYPE(void *) dummy1;
463	R3PTRTYPE(void *) dummy2;
464	} dummy;
465	};
466	} pendingVhwaCommands;
467
468	/** The MMIO handle of the legacy graphics buffer/regs at 0xa0000-0xbffff. */
469	PGMMMIO2HANDLE hMmioLegacy;
470
471	/** @name I/O ports for range 0x3c0-3cf.
472	* @{ */
473	IOMIOPORTHANDLE hIoPortAr;
474	IOMIOPORTHANDLE hIoPortMsrSt00;
475	IOMIOPORTHANDLE hIoPort3c3;
476	IOMIOPORTHANDLE hIoPortSr;
477	IOMIOPORTHANDLE hIoPortDac;
478	IOMIOPORTHANDLE hIoPortPos;
479	IOMIOPORTHANDLE hIoPortGr;
480	/** @} */
481
482	/** @name I/O ports for MDA 0x3b0-0x3bf (sparse)
483	* @{ */
484	IOMIOPORTHANDLE hIoPortMdaCrt;
485	IOMIOPORTHANDLE hIoPortMdaFcrSt;
486	/** @} */
487
488	/** @name I/O ports for CGA 0x3d0-0x3df (sparse)
489	* @{ */
490	IOMIOPORTHANDLE hIoPortCgaCrt;
491	IOMIOPORTHANDLE hIoPortCgaFcrSt;
492	/** @} */
493
494	#ifdef VBOX_WITH_HGSMI
495	/** @name I/O ports for HGSMI 0x3b0-03b3 and 0x3d0-03d3 (ring-3 only)
496	* @{ */
497	IOMIOPORTHANDLE hIoPortHgsmiHost;
498	IOMIOPORTHANDLE hIoPortHgsmiGuest;
499	/** @} */
500	#endif
501
502	/** @name I/O ports for Boch VBE 0x1ce-0x1cf
503	* @{ */
504	IOMIOPORTHANDLE hIoPortVbeIndex;
505	IOMIOPORTHANDLE hIoPortVbeData;
506	/** @} */
507
508	/** The BIOS printf I/O port. */
509	IOMIOPORTHANDLE hIoPortBios;
510	/** The VBE extra data I/O port. */
511	IOMIOPORTHANDLE hIoPortVbeExtra;
512	/** The logo command I/O port. */
513	IOMIOPORTHANDLE hIoPortCmdLogo;
514
515	#ifdef VBOX_WITH_VMSVGA
516	/** VMSVGA: I/O port PCI region. */
517	IOMIOPORTHANDLE hIoPortVmSvga;
518	/** VMSVGA: The MMIO2 handle of the FIFO PCI region. */
519	PGMMMIO2HANDLE hMmio2VmSvgaFifo;
520	#endif
521	/** The MMIO2 handle of the VRAM. */
522	PGMMMIO2HANDLE hMmio2VRam;
523
524	STAMPROFILE StatRZMemoryRead;
525	STAMPROFILE StatR3MemoryRead;
526	STAMPROFILE StatRZMemoryWrite;
527	STAMPROFILE StatR3MemoryWrite;
528	STAMCOUNTER StatMapPage; /*< Counts IOMMmioMapMmio2Page calls. /
529	STAMCOUNTER StatMapReset; /*< Counts IOMMmioResetRegion calls. /
530	STAMCOUNTER StatUpdateDisp; /*< Counts vgaPortUpdateDisplay calls. /
531	#ifdef VBOX_WITH_HGSMI
532	STAMCOUNTER StatHgsmiMdaCgaAccesses;
533	#endif
534	} VGAState;
535	#ifdef VBOX
536	/** VGA state. */
537	typedef VGAState VGASTATE;
538	/** Pointer to the VGA state. */
539	typedef VGASTATE *PVGASTATE;
540	AssertCompileMemberAlignment(VGASTATE, bank_offset, 8);
541	AssertCompileMemberAlignment(VGASTATE, font_offsets, 8);
542	AssertCompileMemberAlignment(VGASTATE, last_ch_attr, 8);
543	AssertCompileMemberAlignment(VGASTATE, u32Marker, 8);
544	AssertCompile(sizeof(uint64_t)/bmPageMapBitmap/ >= (_64K / GUEST_PAGE_SIZE / 8));
545	#endif
546
547
548	/**
549	* The VGA state data for ring-3 context.
550	*/
551	typedef struct VGASTATER3
552	{
553	R3PTRTYPE(uint8_t *) pbVRam;
554	R3PTRTYPE(FNGETBPP *) get_bpp;
555	R3PTRTYPE(FNGETOFFSETS *) get_offsets;
556	R3PTRTYPE(FNGETRESOLUTION *) get_resolution;
557	R3PTRTYPE(FNRGBTOPIXEL *) rgb_to_pixel;
558	R3PTRTYPE(FNCURSORINVALIDATE *) cursor_invalidate;
559	R3PTRTYPE(FNCURSORDRAWLINE *) cursor_draw_line;
560
561	/** Pointer to the device instance.
562	* @note Only for getting our bearings in interface methods. */
563	PPDMDEVINSR3 pDevIns;
564	#ifdef VBOX_WITH_HGSMI
565	R3PTRTYPE(PHGSMIINSTANCE) pHGSMI;
566	#endif
567	#ifdef VBOX_WITH_VDMA
568	R3PTRTYPE(PVBOXVDMAHOST) pVdma;
569	#endif
570
571	/** LUN\#0: The display port base interface. */
572	PDMIBASE IBase;
573	/** LUN\#0: The display port interface. */
574	PDMIDISPLAYPORT IPort;
575	#ifdef VBOX_WITH_HGSMI
576	/** LUN\#0: VBVA callbacks interface */
577	PDMIDISPLAYVBVACALLBACKS IVBVACallbacks;
578	#endif
579	/** Status LUN: Leds interface. */
580	PDMILEDPORTS ILeds;
581
582	/** Pointer to base interface of the driver. */
583	R3PTRTYPE(PPDMIBASE) pDrvBase;
584	/** Pointer to display connector interface of the driver. */
585	R3PTRTYPE(PPDMIDISPLAYCONNECTOR) pDrv;
586
587	/** Status LUN: Partner of ILeds. */
588	R3PTRTYPE(PPDMILEDCONNECTORS) pLedsConnector;
589
590	#ifdef VBOX_WITH_VMSVGA
591	/** The VMSVGA ring-3 state. */
592	VMSVGASTATER3 svga;
593	#endif
594
595	/** The VGA BIOS ROM data. */
596	R3PTRTYPE(uint8_t *) pbVgaBios;
597	/** The size of the VGA BIOS ROM. */
598	uint64_t cbVgaBios;
599	/** The name of the VGA BIOS ROM file. */
600	R3PTRTYPE(char *) pszVgaBiosFile;
601
602	/** @name Logo data
603	* @{ */
604	/** Current logo data offset. */
605	uint32_t offLogoData;
606	/** The size of the BIOS logo data. */
607	uint32_t cbLogo;
608	/** Current logo command. */
609	uint16_t LogoCommand;
610	/** Bitmap width. */
611	uint16_t cxLogo;
612	/** Bitmap height. */
613	uint16_t cyLogo;
614	/** Bitmap planes. */
615	uint16_t cLogoPlanes;
616	/** Bitmap depth. */
617	uint16_t cLogoBits;
618	/** Bitmap compression. */
619	uint16_t LogoCompression;
620	/** Bitmap colors used. */
621	uint16_t cLogoUsedColors;
622	/** Palette size. */
623	uint16_t cLogoPalEntries;
624	/** Clear screen flag. */
625	uint8_t fLogoClearScreen;
626	bool fBootMenuInverse;
627	uint8_t Padding8[6];
628	/** Palette data. */
629	uint32_t au32LogoPalette[256];
630	/** The BIOS logo data. */
631	R3PTRTYPE(uint8_t *) pbLogo;
632	/** The name of the logo file. */
633	R3PTRTYPE(char *) pszLogoFile;
634	/** Bitmap image data. */
635	R3PTRTYPE(uint8_t *) pbLogoBitmap;
636	/** @} */
637
638	/** @name VBE extra data (modes)
639	* @{ */
640	/** The VBE BIOS extra data. */
641	R3PTRTYPE(uint8_t *) pbVBEExtraData;
642	/** The size of the VBE BIOS extra data. */
643	uint16_t cbVBEExtraData;
644	/** The VBE BIOS current memory address. */
645	uint16_t u16VBEExtraAddress;
646	uint16_t Padding7[2];
647	/** @} */
648
649	} VGASTATER3;
650	/** Pointer to the ring-3 VGA state. */
651	typedef VGASTATER3 *PVGASTATER3;
652
653
654	/**
655	* The VGA state data for ring-0 context.
656	*/
657	typedef struct VGASTATER0
658	{
659	/** The R0 vram pointer. */
660	R0PTRTYPE(uint8_t *) pbVRam;
661	#ifdef VBOX_WITH_VMSVGA
662	/** The VMSVGA ring-0 state. */
663	VMSVGASTATER0 svga;
664	#endif
665	} VGASTATER0;
666	/** Pointer to the ring-0 VGA state. */
667	typedef VGASTATER0 *PVGASTATER0;
668
669
670	/**
671	* The VGA state data for raw-mode context.
672	*/
673	typedef struct VGASTATERC
674	{
675	/** Pointer to the RC vram mapping. */
676	RCPTRTYPE(uint8_t *) pbVRam;
677	} VGASTATERC;
678	/** Pointer to the raw-mode VGA state. */
679	typedef VGASTATERC *PVGASTATERC;
680
681
682	/** The VGA state for the current context. */
683	typedef CTX_SUFF(VGASTATE) VGASTATECC;
684	/** Pointer to the VGA state for the current context. */
685	typedef CTX_SUFF(PVGASTATE) PVGASTATECC;
686
687
688
689	/** VBE Extra Data. */
690	typedef VBEHeader VBEHEADER;
691	/** Pointer to the VBE Extra Data. */
692	typedef VBEHEADER *PVBEHEADER;
693
694	#if !defined(VBOX) \|\| defined(IN_RING3)
695	static inline int c6_to_8(int v)
696	{
697	int b;
698	v &= 0x3f;
699	b = v & 1;
700	return (v << 2) \| (b << 1) \| b;
701	}
702	#endif /* !VBOX \|\| IN_RING3 */
703
704
705	#ifdef VBOX_WITH_HGSMI
706	int VBVAInit(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
707	void VBVADestroy(PVGASTATECC pThisCC);
708	int VBVAUpdateDisplay(PVGASTATE pThis, PVGASTATECC pThisCC);
709	void VBVAReset(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
710	void VBVAOnVBEChanged(PVGASTATE pThis, PVGASTATECC pThisCC);
711	void VBVAOnResume(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
712
713	bool VBVAIsPaused(PVGASTATECC pThisCC);
714	#ifdef UNUSED_FUNCTION
715	bool VBVAIsEnabled(PVGASTATECC pThisCC);
716	#endif
717
718	void VBVARaiseIrq(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t fFlags);
719
720	int VBVAInfoScreen(PVGASTATE pThis, const VBVAINFOSCREEN RT_UNTRUSTED_VOLATILE_HOST *pScreen);
721	#ifdef UNUSED_FUNCTION
722	int VBVAGetInfoViewAndScreen(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t u32ViewIndex,
723	VBVAINFOVIEW pView, VBVAINFOSCREEN pScreen);
724	#endif
725
726	/* @return host-guest flags that were set on reset
727	* this allows the caller to make further cleaning when needed,
728	* e.g. reset the IRQ */
729	uint32_t HGSMIReset(PHGSMIINSTANCE pIns);
730
731	# ifdef VBOX_WITH_VIDEOHWACCEL
732	DECLCALLBACK(int) vbvaR3VHWACommandCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface,
733	VBOXVHWACMD RT_UNTRUSTED_VOLATILE_GUEST *pCmd);
734	int vbvaVHWAConstruct(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
735
736	void vbvaTimerCb(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
737
738	int vboxVBVASaveStatePrep(PPDMDEVINS pDevIns);
739	int vboxVBVASaveStateDone(PPDMDEVINS pDevIns);
740	# endif
741
742	int vboxVBVASaveStateExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
743	int vboxVBVALoadStateExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t u32Version);
744	int vboxVBVALoadStateDone(PPDMDEVINS pDevIns);
745
746	DECLCALLBACK(int) vbvaR3PortSendModeHint(PPDMIDISPLAYPORT pInterface, uint32_t cx, uint32_t cy, uint32_t cBPP,
747	uint32_t cDisplay, uint32_t dx, uint32_t dy, uint32_t fEnabled, uint32_t fNotifyGuest);
748
749	# ifdef VBOX_WITH_VDMA
750	typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
751	int vboxVDMAConstruct(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t cPipeElements);
752	void vboxVDMADestruct(PVBOXVDMAHOST pVdma);
753	void vboxVDMAReset(PVBOXVDMAHOST pVdma);
754	void vboxVDMAControl(PVBOXVDMAHOST pVdma, VBOXVDMA_CTL RT_UNTRUSTED_VOLATILE_GUEST *pCmd, uint32_t cbCmd);
755	void vboxVDMACommand(PVBOXVDMAHOST pVdma, VBOXVDMACBUF_DR RT_UNTRUSTED_VOLATILE_GUEST *pCmd, uint32_t cbCmd);
756	int vboxVDMASaveStateExecPrep(struct VBOXVDMAHOST *pVdma);
757	int vboxVDMASaveStateExecDone(struct VBOXVDMAHOST *pVdma);
758	int vboxVDMASaveStateExecPerform(PCPDMDEVHLPR3 pHlp, struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM);
759	int vboxVDMASaveLoadExecPerform(PCPDMDEVHLPR3 pHlp, struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM, uint32_t u32Version);
760	int vboxVDMASaveLoadDone(struct VBOXVDMAHOST *pVdma);
761	# endif /* VBOX_WITH_VDMA */
762
763	#endif /* VBOX_WITH_HGSMI */
764
765	# ifdef VBOX_WITH_VMSVGA
766	int vgaR3UnregisterVRAMHandler(PPDMDEVINS pDevIns, PVGASTATE pThis);
767	int vgaR3RegisterVRAMHandler(PPDMDEVINS pDevIns, PVGASTATE pThis, uint64_t cbFrameBuffer);
768	int vgaR3UpdateDisplay(PVGASTATE pThis, unsigned xStart, unsigned yStart, unsigned width, unsigned height);
769	# endif
770
771	#ifndef VBOX
772	void vga_common_init(VGAState s, DisplayState ds, uint8_t *vga_ram_base,
773	unsigned long vga_ram_offset, int vga_ram_size);
774	uint32_t vga_mem_readb(void *opaque, target_phys_addr_t addr);
775	void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val);
776	void vga_invalidate_scanlines(VGAState *s, int y1, int y2);
777
778	void vga_draw_cursor_line_8(uint8_t d1, const uint8_t src1,
779	int poffset, int w,
780	unsigned int color0, unsigned int color1,
781	unsigned int color_xor);
782	void vga_draw_cursor_line_16(uint8_t d1, const uint8_t src1,
783	int poffset, int w,
784	unsigned int color0, unsigned int color1,
785	unsigned int color_xor);
786	void vga_draw_cursor_line_32(uint8_t d1, const uint8_t src1,
787	int poffset, int w,
788	unsigned int color0, unsigned int color1,
789	unsigned int color_xor);
790
791	extern const uint8_t sr_mask[8];
792	extern const uint8_t gr_mask[16];
793	#endif /* !VBOX */
794
795	#endif /* !VBOX_INCLUDED_SRC_Graphics_DevVGA_h */
796

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source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA.h@ 98065

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