VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA_VDMA.cpp@ 71194

Last change on this file since 71194 was 71194, checked in by vboxsync, 7 years ago

DevVGA_VDMA.cpp: Annoying assertion in tstVMM.
  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 129.6 KB
Line 
1/* $Id: DevVGA_VDMA.cpp 71194 2018-03-05 10:34:04Z vboxsync $ */
2/** @file
3 * Video DMA (VDMA) support.
4 */
5
6/*
7 * Copyright (C) 2006-2017 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_DEV_VGA
23#include <VBox/VMMDev.h>
24#include <VBox/vmm/pdmdev.h>
25#include <VBox/vmm/pgm.h>
26#include <VBoxVideo.h>
27#include <iprt/semaphore.h>
28#include <iprt/thread.h>
29#include <iprt/mem.h>
30#include <iprt/asm.h>
31#include <iprt/list.h>
32#include <iprt/param.h>
33
34#include "DevVGA.h"
35#include "HGSMI/SHGSMIHost.h"
36
37#include <VBoxVideo3D.h>
38#include <VBoxVideoHost3D.h>
39
40#ifdef DEBUG_misha
41# define VBOXVDBG_MEMCACHE_DISABLE
42#endif
43
44#ifndef VBOXVDBG_MEMCACHE_DISABLE
45# include <iprt/memcache.h>
46#endif
47
48
49/*********************************************************************************************************************************
50* Defined Constants And Macros *
51*********************************************************************************************************************************/
52#ifdef DEBUG_misha
53# define WARN_BP() do { AssertFailed(); } while (0)
54#else
55# define WARN_BP() do { } while (0)
56#endif
57#define WARN(_msg) do { \
58 LogRel(_msg); \
59 WARN_BP(); \
60 } while (0)
61
62#define VBOXVDMATHREAD_STATE_TERMINATED 0
63#define VBOXVDMATHREAD_STATE_CREATING 1
64#define VBOXVDMATHREAD_STATE_CREATED 3
65#define VBOXVDMATHREAD_STATE_TERMINATING 4
66
67
68/*********************************************************************************************************************************
69* Structures and Typedefs *
70*********************************************************************************************************************************/
71struct VBOXVDMATHREAD;
72
73typedef DECLCALLBACKPTR(void, PFNVBOXVDMATHREAD_CHANGED)(struct VBOXVDMATHREAD *pThread, int rc, void *pvThreadContext, void *pvChangeContext);
74
75#ifdef VBOX_WITH_CRHGSMI
76static DECLCALLBACK(int) vboxCmdVBVACmdCallout(struct VBOXVDMAHOST *pVdma, struct VBOXCRCMDCTL* pCmd, VBOXCRCMDCTL_CALLOUT_LISTENTRY *pEntry, PFNVBOXCRCMDCTL_CALLOUT_CB pfnCb);
77#endif
78
79
80typedef struct VBOXVDMATHREAD
81{
82 RTTHREAD hWorkerThread;
83 RTSEMEVENT hEvent;
84 volatile uint32_t u32State;
85 PFNVBOXVDMATHREAD_CHANGED pfnChanged;
86 void *pvChanged;
87} VBOXVDMATHREAD, *PVBOXVDMATHREAD;
88
89
90/* state transformations:
91 *
92 * submitter | processor
93 *
94 * LISTENING ---> PROCESSING
95 *
96 * */
97#define VBVAEXHOSTCONTEXT_STATE_LISTENING 0
98#define VBVAEXHOSTCONTEXT_STATE_PROCESSING 1
99
100#define VBVAEXHOSTCONTEXT_ESTATE_DISABLED -1
101#define VBVAEXHOSTCONTEXT_ESTATE_PAUSED 0
102#define VBVAEXHOSTCONTEXT_ESTATE_ENABLED 1
103
104typedef struct VBVAEXHOSTCONTEXT
105{
106 VBVABUFFER *pVBVA;
107 uint32_t cbMaxData; /**< Maximum number of data bytes addressible relative to pVBVA. */
108 volatile int32_t i32State;
109 volatile int32_t i32EnableState;
110 volatile uint32_t u32cCtls;
111 /* critical section for accessing ctl lists */
112 RTCRITSECT CltCritSect;
113 RTLISTANCHOR GuestCtlList;
114 RTLISTANCHOR HostCtlList;
115#ifndef VBOXVDBG_MEMCACHE_DISABLE
116 RTMEMCACHE CtlCache;
117#endif
118} VBVAEXHOSTCONTEXT;
119
120typedef enum
121{
122 VBVAEXHOSTCTL_TYPE_UNDEFINED = 0,
123 VBVAEXHOSTCTL_TYPE_HH_INTERNAL_PAUSE,
124 VBVAEXHOSTCTL_TYPE_HH_INTERNAL_RESUME,
125 VBVAEXHOSTCTL_TYPE_HH_SAVESTATE,
126 VBVAEXHOSTCTL_TYPE_HH_LOADSTATE,
127 VBVAEXHOSTCTL_TYPE_HH_LOADSTATE_DONE,
128 VBVAEXHOSTCTL_TYPE_HH_BE_OPAQUE,
129 VBVAEXHOSTCTL_TYPE_HH_ON_HGCM_UNLOAD,
130 VBVAEXHOSTCTL_TYPE_GHH_BE_OPAQUE,
131 VBVAEXHOSTCTL_TYPE_GHH_ENABLE,
132 VBVAEXHOSTCTL_TYPE_GHH_ENABLE_PAUSED,
133 VBVAEXHOSTCTL_TYPE_GHH_DISABLE,
134 VBVAEXHOSTCTL_TYPE_GHH_RESIZE
135} VBVAEXHOSTCTL_TYPE;
136
137struct VBVAEXHOSTCTL;
138
139typedef DECLCALLBACK(void) FNVBVAEXHOSTCTL_COMPLETE(VBVAEXHOSTCONTEXT *pVbva, struct VBVAEXHOSTCTL *pCtl, int rc, void *pvComplete);
140typedef FNVBVAEXHOSTCTL_COMPLETE *PFNVBVAEXHOSTCTL_COMPLETE;
141
142typedef struct VBVAEXHOSTCTL
143{
144 RTLISTNODE Node;
145 VBVAEXHOSTCTL_TYPE enmType;
146 union
147 {
148 struct
149 {
150 uint8_t * pu8Cmd;
151 uint32_t cbCmd;
152 } cmd;
153
154 struct
155 {
156 PSSMHANDLE pSSM;
157 uint32_t u32Version;
158 } state;
159 } u;
160 PFNVBVAEXHOSTCTL_COMPLETE pfnComplete;
161 void *pvComplete;
162} VBVAEXHOSTCTL;
163
164/* VBoxVBVAExHP**, i.e. processor functions, can NOT be called concurrently with each other,
165 * but can be called with other VBoxVBVAExS** (submitter) functions except Init/Start/Term aparently.
166 * Can only be called be the processor, i.e. the entity that acquired the processor state by direct or indirect call to the VBoxVBVAExHSCheckCommands
167 * see mor edetailed comments in headers for function definitions */
168typedef enum
169{
170 VBVAEXHOST_DATA_TYPE_NO_DATA = 0,
171 VBVAEXHOST_DATA_TYPE_CMD,
172 VBVAEXHOST_DATA_TYPE_HOSTCTL,
173 VBVAEXHOST_DATA_TYPE_GUESTCTL
174} VBVAEXHOST_DATA_TYPE;
175
176
177#ifdef VBOX_WITH_CRHGSMI
178typedef struct VBOXVDMA_SOURCE
179{
180 VBVAINFOSCREEN Screen;
181 VBOXCMDVBVA_SCREENMAP_DECL(uint32_t, aTargetMap);
182} VBOXVDMA_SOURCE;
183#endif
184
185typedef struct VBOXVDMAHOST
186{
187 PHGSMIINSTANCE pHgsmi; /**< Same as VGASTATE::pHgsmi. */
188 PVGASTATE pVGAState;
189#ifdef VBOX_WITH_CRHGSMI
190 VBVAEXHOSTCONTEXT CmdVbva;
191 VBOXVDMATHREAD Thread;
192 VBOXCRCMD_SVRINFO CrSrvInfo;
193 VBVAEXHOSTCTL* pCurRemainingHostCtl;
194 RTSEMEVENTMULTI HostCrCtlCompleteEvent;
195 int32_t volatile i32cHostCrCtlCompleted;
196 RTCRITSECT CalloutCritSect;
197// VBOXVDMA_SOURCE aSources[VBOX_VIDEO_MAX_SCREENS];
198#endif
199#ifdef VBOX_VDMA_WITH_WATCHDOG
200 PTMTIMERR3 WatchDogTimer;
201#endif
202} VBOXVDMAHOST, *PVBOXVDMAHOST;
203
204
205/**
206 * List selector for VBoxVBVAExHCtlSubmit(), vdmaVBVACtlSubmit().
207 */
208typedef enum
209{
210 VBVAEXHOSTCTL_SOURCE_GUEST = 0,
211 VBVAEXHOSTCTL_SOURCE_HOST
212} VBVAEXHOSTCTL_SOURCE;
213
214
215/*********************************************************************************************************************************
216* Internal Functions *
217*********************************************************************************************************************************/
218#ifdef VBOX_WITH_CRHGSMI
219static int vdmaVBVANotifyDisable(PVGASTATE pVGAState);
220static void VBoxVBVAExHPDataCompleteCmd(struct VBVAEXHOSTCONTEXT *pCmdVbva, uint32_t cbCmd);
221static void VBoxVBVAExHPDataCompleteCtl(struct VBVAEXHOSTCONTEXT *pCmdVbva, VBVAEXHOSTCTL *pCtl, int rc);
222static int VBoxVDMAThreadEventNotify(PVBOXVDMATHREAD pThread);
223static int vboxVDMACmdExecBpbTransfer(PVBOXVDMAHOST pVdma, const VBOXVDMACMD_DMA_BPB_TRANSFER *pTransfer, uint32_t cbBuffer);
224static int vdmaVBVACtlSubmitSync(PVBOXVDMAHOST pVdma, VBVAEXHOSTCTL *pCtl, VBVAEXHOSTCTL_SOURCE enmSource);
225static DECLCALLBACK(void) vdmaVBVACtlSubmitSyncCompletion(VBVAEXHOSTCONTEXT *pVbva, struct VBVAEXHOSTCTL *pCtl,
226 int rc, void *pvContext);
227
228/* VBoxVBVAExHP**, i.e. processor functions, can NOT be called concurrently with each other,
229 * can be called concurrently with istelf as well as with other VBoxVBVAEx** functions except Init/Start/Term aparently */
230#endif /* VBOX_WITH_CRHGSMI */
231
232
233
234#ifdef VBOX_WITH_CRHGSMI
235
236/**
237 * Creates a host control command.
238 */
239static VBVAEXHOSTCTL *VBoxVBVAExHCtlCreate(VBVAEXHOSTCONTEXT *pCmdVbva, VBVAEXHOSTCTL_TYPE enmType)
240{
241# ifndef VBOXVDBG_MEMCACHE_DISABLE
242 VBVAEXHOSTCTL *pCtl = (VBVAEXHOSTCTL*)RTMemCacheAlloc(pCmdVbva->CtlCache);
243# else
244 VBVAEXHOSTCTL *pCtl = (VBVAEXHOSTCTL*)RTMemAlloc(sizeof(VBVAEXHOSTCTL));
245# endif
246 if (pCtl)
247 {
248 RT_ZERO(*pCtl);
249 pCtl->enmType = enmType;
250 }
251 else
252 WARN(("VBoxVBVAExHCtlAlloc failed\n"));
253 return pCtl;
254}
255
256/**
257 * Destroys a host control command.
258 */
259static void VBoxVBVAExHCtlFree(VBVAEXHOSTCONTEXT *pCmdVbva, VBVAEXHOSTCTL *pCtl)
260{
261# ifndef VBOXVDBG_MEMCACHE_DISABLE
262 RTMemCacheFree(pCmdVbva->CtlCache, pCtl);
263# else
264 RTMemFree(pCtl);
265# endif
266}
267
268
269
270/**
271 * Works the VBVA state.
272 */
273static int vboxVBVAExHSProcessorAcquire(struct VBVAEXHOSTCONTEXT *pCmdVbva)
274{
275 Assert(pCmdVbva->i32State >= VBVAEXHOSTCONTEXT_STATE_LISTENING);
276
277 if (ASMAtomicCmpXchgS32(&pCmdVbva->i32State, VBVAEXHOSTCONTEXT_STATE_PROCESSING, VBVAEXHOSTCONTEXT_STATE_LISTENING))
278 return VINF_SUCCESS;
279 return VERR_SEM_BUSY;
280}
281
282/**
283 * Worker for vboxVBVAExHPDataGet() and VBoxVBVAExHPCheckHostCtlOnDisable() that
284 * gets the next control command.
285 *
286 * @returns Pointer to command if found, NULL if not.
287 * @param pCmdVbva The VBVA command context.
288 * @param pfHostCtl Where to indicate whether it's a host or guest
289 * control command.
290 * @param fHostOnlyMode Whether to only fetch host commands, or both.
291 */
292static VBVAEXHOSTCTL *vboxVBVAExHPCheckCtl(struct VBVAEXHOSTCONTEXT *pCmdVbva, bool *pfHostCtl, bool fHostOnlyMode)
293{
294 Assert(pCmdVbva->i32State == VBVAEXHOSTCONTEXT_STATE_PROCESSING);
295
296 if (!fHostOnlyMode && !ASMAtomicUoReadU32(&pCmdVbva->u32cCtls))
297 return NULL;
298
299 int rc = RTCritSectEnter(&pCmdVbva->CltCritSect);
300 if (RT_SUCCESS(rc))
301 {
302 VBVAEXHOSTCTL *pCtl = RTListGetFirst(&pCmdVbva->HostCtlList, VBVAEXHOSTCTL, Node);
303 if (pCtl)
304 *pfHostCtl = true;
305 else if (!fHostOnlyMode)
306 {
307 if (ASMAtomicUoReadS32(&pCmdVbva->i32EnableState) != VBVAEXHOSTCONTEXT_ESTATE_PAUSED)
308 {
309 pCtl = RTListGetFirst(&pCmdVbva->GuestCtlList, VBVAEXHOSTCTL, Node);
310 /* pCtl can not be null here since pCmdVbva->u32cCtls is not null,
311 * and there are no HostCtl commands*/
312 Assert(pCtl);
313 *pfHostCtl = false;
314 }
315 }
316
317 if (pCtl)
318 {
319 RTListNodeRemove(&pCtl->Node);
320 ASMAtomicDecU32(&pCmdVbva->u32cCtls);
321 }
322
323 RTCritSectLeave(&pCmdVbva->CltCritSect);
324
325 return pCtl;
326 }
327 else
328 WARN(("RTCritSectEnter failed %Rrc\n", rc));
329
330 return NULL;
331}
332
333/**
334 * Worker for vboxVDMACrHgcmHandleEnableRemainingHostCommand().
335 */
336static VBVAEXHOSTCTL *VBoxVBVAExHPCheckHostCtlOnDisable(struct VBVAEXHOSTCONTEXT *pCmdVbva)
337{
338 bool fHostCtl = false;
339 VBVAEXHOSTCTL *pCtl = vboxVBVAExHPCheckCtl(pCmdVbva, &fHostCtl, true);
340 Assert(!pCtl || fHostCtl);
341 return pCtl;
342}
343
344/**
345 * Worker for vboxVBVAExHPCheckProcessCtlInternal() and
346 * vboxVDMACrGuestCtlProcess() / VBVAEXHOSTCTL_TYPE_GHH_ENABLE_PAUSED.
347 */
348static int VBoxVBVAExHPPause(struct VBVAEXHOSTCONTEXT *pCmdVbva)
349{
350 if (pCmdVbva->i32EnableState < VBVAEXHOSTCONTEXT_ESTATE_PAUSED)
351 {
352 WARN(("Invalid state\n"));
353 return VERR_INVALID_STATE;
354 }
355
356 ASMAtomicWriteS32(&pCmdVbva->i32EnableState, VBVAEXHOSTCONTEXT_ESTATE_PAUSED);
357 return VINF_SUCCESS;
358}
359
360/**
361 * Works the VBVA state in response to VBVAEXHOSTCTL_TYPE_HH_INTERNAL_RESUME.
362 */
363static int VBoxVBVAExHPResume(struct VBVAEXHOSTCONTEXT *pCmdVbva)
364{
365 if (pCmdVbva->i32EnableState != VBVAEXHOSTCONTEXT_ESTATE_PAUSED)
366 {
367 WARN(("Invalid state\n"));
368 return VERR_INVALID_STATE;
369 }
370
371 ASMAtomicWriteS32(&pCmdVbva->i32EnableState, VBVAEXHOSTCONTEXT_ESTATE_ENABLED);
372 return VINF_SUCCESS;
373}
374
375/**
376 * Worker for vboxVBVAExHPDataGet that processes PAUSE and RESUME requests.
377 *
378 * Unclear why these cannot be handled the normal way.
379 *
380 * @returns true if handled, false if not.
381 * @param pCmdVbva The VBVA context.
382 * @param pCtl The host control command.
383 */
384static bool vboxVBVAExHPCheckProcessCtlInternal(struct VBVAEXHOSTCONTEXT *pCmdVbva, VBVAEXHOSTCTL* pCtl)
385{
386 switch (pCtl->enmType)
387 {
388 case VBVAEXHOSTCTL_TYPE_HH_INTERNAL_PAUSE:
389 VBoxVBVAExHPPause(pCmdVbva);
390 VBoxVBVAExHPDataCompleteCtl(pCmdVbva, pCtl, VINF_SUCCESS);
391 return true;
392
393 case VBVAEXHOSTCTL_TYPE_HH_INTERNAL_RESUME:
394 VBoxVBVAExHPResume(pCmdVbva);
395 VBoxVBVAExHPDataCompleteCtl(pCmdVbva, pCtl, VINF_SUCCESS);
396 return true;
397
398 default:
399 return false;
400 }
401}
402
403/**
404 * Works the VBVA state.
405 */
406static void vboxVBVAExHPProcessorRelease(struct VBVAEXHOSTCONTEXT *pCmdVbva)
407{
408 Assert(pCmdVbva->i32State == VBVAEXHOSTCONTEXT_STATE_PROCESSING);
409
410 ASMAtomicWriteS32(&pCmdVbva->i32State, VBVAEXHOSTCONTEXT_STATE_LISTENING);
411}
412
413/**
414 * Works the VBVA state.
415 */
416static void vboxVBVAExHPHgEventSet(struct VBVAEXHOSTCONTEXT *pCmdVbva)
417{
418 Assert(pCmdVbva->i32State == VBVAEXHOSTCONTEXT_STATE_PROCESSING);
419 if (pCmdVbva->pVBVA)
420 ASMAtomicOrU32(&pCmdVbva->pVBVA->hostFlags.u32HostEvents, VBVA_F_STATE_PROCESSING);
421}
422
423/**
424 * Works the VBVA state.
425 */
426static void vboxVBVAExHPHgEventClear(struct VBVAEXHOSTCONTEXT *pCmdVbva)
427{
428 Assert(pCmdVbva->i32State == VBVAEXHOSTCONTEXT_STATE_PROCESSING);
429 if (pCmdVbva->pVBVA)
430 ASMAtomicAndU32(&pCmdVbva->pVBVA->hostFlags.u32HostEvents, ~VBVA_F_STATE_PROCESSING);
431}
432
433/**
434 * Worker for vboxVBVAExHPDataGet.
435 *
436 * @retval VINF_SUCCESS
437 * @retval VINF_EOF
438 * @retval VINF_TRY_AGAIN
439 * @retval VERR_INVALID_STATE
440 *
441 * @thread VDMA
442 */
443static int vboxVBVAExHPCmdGet(struct VBVAEXHOSTCONTEXT *pCmdVbva, uint8_t **ppbCmd, uint32_t *pcbCmd)
444{
445 Assert(pCmdVbva->i32State == VBVAEXHOSTCONTEXT_STATE_PROCESSING);
446 Assert(pCmdVbva->i32EnableState > VBVAEXHOSTCONTEXT_ESTATE_PAUSED);
447
448 VBVABUFFER volatile *pVBVA = pCmdVbva->pVBVA; /* This is shared with the guest, so careful! */
449
450 /*
451 * Inspect records.
452 */
453 uint32_t idxRecordFirst = ASMAtomicUoReadU32(&pVBVA->indexRecordFirst);
454 uint32_t idxRecordFree = ASMAtomicReadU32(&pVBVA->indexRecordFree);
455 Log(("first = %d, free = %d\n", idxRecordFirst, idxRecordFree));
456 if (idxRecordFirst == idxRecordFree)
457 return VINF_EOF; /* No records to process. Return without assigning output variables. */
458 AssertReturn(idxRecordFirst < VBVA_MAX_RECORDS, VERR_INVALID_STATE);
459
460 /*
461 * Read the record size and check that it has been completly recorded.
462 */
463 uint32_t const cbRecordCurrent = ASMAtomicReadU32(&pVBVA->aRecords[idxRecordFirst].cbRecord);
464 uint32_t const cbRecord = cbRecordCurrent & ~VBVA_F_RECORD_PARTIAL;
465 if ( (cbRecordCurrent & VBVA_F_RECORD_PARTIAL)
466 || !cbRecord)
467 return VINF_TRY_AGAIN; /* The record is being recorded, try again. */
468 Assert(cbRecord);
469
470 /*
471 * Get and validate the data area.
472 */
473 uint32_t const offData = ASMAtomicReadU32(&pVBVA->off32Data);
474 uint32_t cbMaxData = ASMAtomicReadU32(&pVBVA->cbData);
475 AssertLogRelMsgStmt(cbMaxData <= pCmdVbva->cbMaxData, ("%#x vs %#x\n", cbMaxData, pCmdVbva->cbMaxData),
476 cbMaxData = pCmdVbva->cbMaxData);
477 AssertLogRelMsgReturn( cbRecord <= cbMaxData
478 && offData <= cbMaxData - cbRecord,
479 ("offData=%#x cbRecord=%#x cbMaxData=%#x cbRecord\n", offData, cbRecord, cbMaxData),
480 VERR_INVALID_STATE);
481
482 /*
483 * Just set the return values and we're done.
484 */
485 *ppbCmd = (uint8_t *)&pVBVA->au8Data[offData];
486 *pcbCmd = cbRecord;
487 return VINF_SUCCESS;
488}
489
490/**
491 * Completion routine advancing our end of the ring and data buffers forward.
492 *
493 * @param pCmdVbva The VBVA context.
494 * @param cbCmd The size of the data.
495 */
496static void VBoxVBVAExHPDataCompleteCmd(struct VBVAEXHOSTCONTEXT *pCmdVbva, uint32_t cbCmd)
497{
498 VBVABUFFER volatile *pVBVA = pCmdVbva->pVBVA;
499
500 /* Move data head. */
501 uint32_t const cbData = pVBVA->cbData;
502 uint32_t const offData = pVBVA->off32Data;
503 if (cbData > 0)
504 ASMAtomicWriteU32(&pVBVA->off32Data, (offData + cbCmd) % cbData);
505 else
506 ASMAtomicWriteU32(&pVBVA->off32Data, 0);
507
508 /* Increment record pointer. */
509 uint32_t const idxRecFirst = pVBVA->indexRecordFirst;
510 ASMAtomicWriteU32(&pVBVA->indexRecordFirst, (idxRecFirst + 1) % RT_ELEMENTS(pVBVA->aRecords));
511}
512
513/**
514 * Control command completion routine used by many.
515 */
516static void VBoxVBVAExHPDataCompleteCtl(struct VBVAEXHOSTCONTEXT *pCmdVbva, VBVAEXHOSTCTL *pCtl, int rc)
517{
518 if (pCtl->pfnComplete)
519 pCtl->pfnComplete(pCmdVbva, pCtl, rc, pCtl->pvComplete);
520 else
521 VBoxVBVAExHCtlFree(pCmdVbva, pCtl);
522}
523
524
525/**
526 * Worker for VBoxVBVAExHPDataGet.
527 * @thread VDMA
528 */
529static VBVAEXHOST_DATA_TYPE vboxVBVAExHPDataGet(struct VBVAEXHOSTCONTEXT *pCmdVbva, uint8_t **ppCmd, uint32_t *pcbCmd)
530{
531 Assert(pCmdVbva->i32State == VBVAEXHOSTCONTEXT_STATE_PROCESSING);
532 VBVAEXHOSTCTL*pCtl;
533 bool fHostClt;
534
535 for (;;)
536 {
537 pCtl = vboxVBVAExHPCheckCtl(pCmdVbva, &fHostClt, false);
538 if (pCtl)
539 {
540 if (fHostClt)
541 {
542 if (!vboxVBVAExHPCheckProcessCtlInternal(pCmdVbva, pCtl))
543 {
544 *ppCmd = (uint8_t*)pCtl;
545 *pcbCmd = sizeof (*pCtl);
546 return VBVAEXHOST_DATA_TYPE_HOSTCTL;
547 }
548 continue; /* Processed by vboxVBVAExHPCheckProcessCtlInternal, get next. */
549 }
550 *ppCmd = (uint8_t*)pCtl;
551 *pcbCmd = sizeof (*pCtl);
552 return VBVAEXHOST_DATA_TYPE_GUESTCTL;
553 }
554
555 if (ASMAtomicUoReadS32(&pCmdVbva->i32EnableState) <= VBVAEXHOSTCONTEXT_ESTATE_PAUSED)
556 return VBVAEXHOST_DATA_TYPE_NO_DATA;
557
558 int rc = vboxVBVAExHPCmdGet(pCmdVbva, ppCmd, pcbCmd);
559 switch (rc)
560 {
561 case VINF_SUCCESS:
562 return VBVAEXHOST_DATA_TYPE_CMD;
563 case VINF_EOF:
564 return VBVAEXHOST_DATA_TYPE_NO_DATA;
565 case VINF_TRY_AGAIN:
566 RTThreadSleep(1);
567 continue;
568 default:
569 /* this is something really unexpected, i.e. most likely guest has written something incorrect to the VBVA buffer */
570 WARN(("Warning: vboxVBVAExHCmdGet returned unexpected status %Rrc\n", rc));
571 return VBVAEXHOST_DATA_TYPE_NO_DATA;
572 }
573 }
574 /* not reached */
575}
576
577/**
578 * Called by vboxVDMAWorkerThread to get the next command to process.
579 * @thread VDMA
580 */
581static VBVAEXHOST_DATA_TYPE VBoxVBVAExHPDataGet(struct VBVAEXHOSTCONTEXT *pCmdVbva, uint8_t **ppCmd, uint32_t *pcbCmd)
582{
583 VBVAEXHOST_DATA_TYPE enmType = vboxVBVAExHPDataGet(pCmdVbva, ppCmd, pcbCmd);
584 if (enmType == VBVAEXHOST_DATA_TYPE_NO_DATA)
585 {
586 vboxVBVAExHPHgEventClear(pCmdVbva);
587 vboxVBVAExHPProcessorRelease(pCmdVbva);
588
589 /*
590 * We need to prevent racing between us clearing the flag and command check/submission thread, i.e.
591 * 1. we check the queue -> and it is empty
592 * 2. submitter adds command to the queue
593 * 3. submitter checks the "processing" -> and it is true , thus it does not submit a notification
594 * 4. we clear the "processing" state
595 * 5. ->here we need to re-check the queue state to ensure we do not leak the notification of the above command
596 * 6. if the queue appears to be not-empty set the "processing" state back to "true"
597 */
598 int rc = vboxVBVAExHSProcessorAcquire(pCmdVbva);
599 if (RT_SUCCESS(rc))
600 {
601 /* we are the processor now */
602 enmType = vboxVBVAExHPDataGet(pCmdVbva, ppCmd, pcbCmd);
603 if (enmType == VBVAEXHOST_DATA_TYPE_NO_DATA)
604 {
605 vboxVBVAExHPProcessorRelease(pCmdVbva);
606 return VBVAEXHOST_DATA_TYPE_NO_DATA;
607 }
608
609 vboxVBVAExHPHgEventSet(pCmdVbva);
610 }
611 }
612
613 return enmType;
614}
615
616/**
617 * Checks for pending VBVA command or (internal) control command.
618 */
619DECLINLINE(bool) vboxVBVAExHSHasCommands(struct VBVAEXHOSTCONTEXT *pCmdVbva)
620{
621 VBVABUFFER *pVBVA = pCmdVbva->pVBVA;
622 if (pVBVA)
623 {
624 uint32_t indexRecordFirst = pVBVA->indexRecordFirst;
625 uint32_t indexRecordFree = pVBVA->indexRecordFree;
626
627 if (indexRecordFirst != indexRecordFree)
628 return true;
629 }
630
631 return ASMAtomicReadU32(&pCmdVbva->u32cCtls) > 0;
632}
633
634/** Checks whether the new commands are ready for processing
635 * @returns
636 * VINF_SUCCESS - there are commands are in a queue, and the given thread is now the processor (i.e. typically it would delegate processing to a worker thread)
637 * VINF_EOF - no commands in a queue
638 * VINF_ALREADY_INITIALIZED - another thread already processing the commands
639 * VERR_INVALID_STATE - the VBVA is paused or pausing */
640static int VBoxVBVAExHSCheckCommands(struct VBVAEXHOSTCONTEXT *pCmdVbva)
641{
642 int rc = vboxVBVAExHSProcessorAcquire(pCmdVbva);
643 if (RT_SUCCESS(rc))
644 {
645 /* we are the processor now */
646 if (vboxVBVAExHSHasCommands(pCmdVbva))
647 {
648 vboxVBVAExHPHgEventSet(pCmdVbva);
649 return VINF_SUCCESS;
650 }
651
652 vboxVBVAExHPProcessorRelease(pCmdVbva);
653 return VINF_EOF;
654 }
655 if (rc == VERR_SEM_BUSY)
656 return VINF_ALREADY_INITIALIZED;
657 return VERR_INVALID_STATE;
658}
659
660/**
661 * Worker for vboxVDMAConstruct() that initializes the give VBVA host context.
662 */
663static int VBoxVBVAExHSInit(struct VBVAEXHOSTCONTEXT *pCmdVbva)
664{
665 RT_ZERO(*pCmdVbva);
666 int rc = RTCritSectInit(&pCmdVbva->CltCritSect);
667 if (RT_SUCCESS(rc))
668 {
669# ifndef VBOXVDBG_MEMCACHE_DISABLE
670 rc = RTMemCacheCreate(&pCmdVbva->CtlCache, sizeof (VBVAEXHOSTCTL),
671 0, /* size_t cbAlignment */
672 UINT32_MAX, /* uint32_t cMaxObjects */
673 NULL, /* PFNMEMCACHECTOR pfnCtor*/
674 NULL, /* PFNMEMCACHEDTOR pfnDtor*/
675 NULL, /* void *pvUser*/
676 0 /* uint32_t fFlags*/
677 );
678 if (RT_SUCCESS(rc))
679# endif
680 {
681 RTListInit(&pCmdVbva->GuestCtlList);
682 RTListInit(&pCmdVbva->HostCtlList);
683 pCmdVbva->i32State = VBVAEXHOSTCONTEXT_STATE_PROCESSING;
684 pCmdVbva->i32EnableState = VBVAEXHOSTCONTEXT_ESTATE_DISABLED;
685 return VINF_SUCCESS;
686 }
687# ifndef VBOXVDBG_MEMCACHE_DISABLE
688 WARN(("RTMemCacheCreate failed %Rrc\n", rc));
689# endif
690 }
691 else
692 WARN(("RTCritSectInit failed %Rrc\n", rc));
693
694 return rc;
695}
696
697/**
698 * Checks if VBVA state is some form of enabled.
699 */
700DECLINLINE(bool) VBoxVBVAExHSIsEnabled(struct VBVAEXHOSTCONTEXT *pCmdVbva)
701{
702 return ASMAtomicUoReadS32(&pCmdVbva->i32EnableState) >= VBVAEXHOSTCONTEXT_ESTATE_PAUSED;
703}
704
705/**
706 * Checks if VBVA state is disabled.
707 */
708DECLINLINE(bool) VBoxVBVAExHSIsDisabled(struct VBVAEXHOSTCONTEXT *pCmdVbva)
709{
710 return ASMAtomicUoReadS32(&pCmdVbva->i32EnableState) == VBVAEXHOSTCONTEXT_ESTATE_DISABLED;
711}
712
713/**
714 * Worker for vdmaVBVAEnableProcess().
715 *
716 * @thread VDMA
717 */
718static int VBoxVBVAExHSEnable(struct VBVAEXHOSTCONTEXT *pCmdVbva, VBVABUFFER *pVBVA, uint8_t *pbVRam, uint32_t cbVRam)
719{
720 if (VBoxVBVAExHSIsEnabled(pCmdVbva))
721 {
722 WARN(("VBVAEx is enabled already\n"));
723 return VERR_INVALID_STATE;
724 }
725
726 uintptr_t offVRam = (uintptr_t)pVBVA - (uintptr_t)pbVRam;
727 AssertLogRelMsgReturn(offVRam < cbVRam - sizeof(*pVBVA), ("%#p cbVRam=%#x\n", offVRam, cbVRam), VERR_OUT_OF_RANGE);
728
729 pCmdVbva->pVBVA = pVBVA;
730 pCmdVbva->cbMaxData = cbVRam - offVRam - RT_UOFFSETOF(VBVABUFFER, au8Data);
731 pVBVA->hostFlags.u32HostEvents = 0;
732 ASMAtomicWriteS32(&pCmdVbva->i32EnableState, VBVAEXHOSTCONTEXT_ESTATE_ENABLED);
733 return VINF_SUCCESS;
734}
735
736/**
737 * Works the enable state.
738 * @thread VDMA, CR, EMT, ...
739 */
740static int VBoxVBVAExHSDisable(struct VBVAEXHOSTCONTEXT *pCmdVbva)
741{
742 if (VBoxVBVAExHSIsDisabled(pCmdVbva))
743 return VINF_SUCCESS;
744
745 ASMAtomicWriteS32(&pCmdVbva->i32EnableState, VBVAEXHOSTCONTEXT_ESTATE_DISABLED);
746 return VINF_SUCCESS;
747}
748
749/**
750 * Worker for vboxVDMADestruct() and vboxVDMAConstruct().
751 */
752static void VBoxVBVAExHSTerm(struct VBVAEXHOSTCONTEXT *pCmdVbva)
753{
754 /* ensure the processor is stopped */
755 Assert(pCmdVbva->i32State >= VBVAEXHOSTCONTEXT_STATE_LISTENING);
756
757 /* ensure no one tries to submit the command */
758 if (pCmdVbva->pVBVA)
759 pCmdVbva->pVBVA->hostFlags.u32HostEvents = 0;
760
761 Assert(RTListIsEmpty(&pCmdVbva->GuestCtlList));
762 Assert(RTListIsEmpty(&pCmdVbva->HostCtlList));
763
764 RTCritSectDelete(&pCmdVbva->CltCritSect);
765
766# ifndef VBOXVDBG_MEMCACHE_DISABLE
767 RTMemCacheDestroy(pCmdVbva->CtlCache);
768# endif
769
770 RT_ZERO(*pCmdVbva);
771}
772
773
774/**
775 * Worker for vboxVBVAExHSSaveStateLocked().
776 * @thread VDMA
777 */
778static int vboxVBVAExHSSaveGuestCtl(struct VBVAEXHOSTCONTEXT *pCmdVbva, VBVAEXHOSTCTL* pCtl, uint8_t* pu8VramBase, PSSMHANDLE pSSM)
779{
780 RT_NOREF(pCmdVbva);
781 int rc = SSMR3PutU32(pSSM, pCtl->enmType);
782 AssertRCReturn(rc, rc);
783 rc = SSMR3PutU32(pSSM, pCtl->u.cmd.cbCmd);
784 AssertRCReturn(rc, rc);
785 rc = SSMR3PutU32(pSSM, (uint32_t)(pCtl->u.cmd.pu8Cmd - pu8VramBase));
786 AssertRCReturn(rc, rc);
787
788 return VINF_SUCCESS;
789}
790
791/**
792 * Worker for VBoxVBVAExHSSaveState().
793 * @thread VDMA
794 */
795static int vboxVBVAExHSSaveStateLocked(struct VBVAEXHOSTCONTEXT *pCmdVbva, uint8_t* pu8VramBase, PSSMHANDLE pSSM)
796{
797 if (ASMAtomicUoReadS32(&pCmdVbva->i32EnableState) != VBVAEXHOSTCONTEXT_ESTATE_PAUSED)
798 {
799 WARN(("vbva not paused\n"));
800 return VERR_INVALID_STATE;
801 }
802
803 int rc;
804 VBVAEXHOSTCTL* pCtl;
805 RTListForEach(&pCmdVbva->GuestCtlList, pCtl, VBVAEXHOSTCTL, Node)
806 {
807 rc = vboxVBVAExHSSaveGuestCtl(pCmdVbva, pCtl, pu8VramBase, pSSM);
808 AssertRCReturn(rc, rc);
809 }
810
811 rc = SSMR3PutU32(pSSM, 0);
812 AssertRCReturn(rc, rc);
813
814 return VINF_SUCCESS;
815}
816
817/**
818 * Handles VBVAEXHOSTCTL_TYPE_HH_SAVESTATE for vboxVDMACrHostCtlProcess, saving
819 * state on the VDMA thread.
820 *
821 * @returns - same as VBoxVBVAExHSCheckCommands, or failure on load state fail
822 * @thread VDMA
823 */
824static int VBoxVBVAExHSSaveState(struct VBVAEXHOSTCONTEXT *pCmdVbva, uint8_t* pu8VramBase, PSSMHANDLE pSSM)
825{
826 int rc = RTCritSectEnter(&pCmdVbva->CltCritSect);
827 AssertRCReturn(rc, rc);
828
829 rc = vboxVBVAExHSSaveStateLocked(pCmdVbva, pu8VramBase, pSSM);
830 if (RT_FAILURE(rc))
831 WARN(("vboxVBVAExHSSaveStateLocked failed %Rrc\n", rc));
832
833 RTCritSectLeave(&pCmdVbva->CltCritSect);
834 return rc;
835}
836
837
838/**
839 * Worker for vboxVBVAExHSLoadStateLocked.
840 * @retval VINF_EOF if end stuff to load.
841 * @thread VDMA
842 */
843static int vboxVBVAExHSLoadGuestCtl(struct VBVAEXHOSTCONTEXT *pCmdVbva, uint8_t* pu8VramBase, PSSMHANDLE pSSM, uint32_t u32Version)
844{
845 RT_NOREF(u32Version);
846 uint32_t u32;
847 int rc = SSMR3GetU32(pSSM, &u32);
848 AssertLogRelRCReturn(rc, rc);
849
850 if (!u32)
851 return VINF_EOF;
852
853 VBVAEXHOSTCTL *pHCtl = VBoxVBVAExHCtlCreate(pCmdVbva, (VBVAEXHOSTCTL_TYPE)u32);
854 if (!pHCtl)
855 {
856 WARN(("VBoxVBVAExHCtlCreate failed\n"));
857 return VERR_NO_MEMORY;
858 }
859
860 rc = SSMR3GetU32(pSSM, &u32);
861 AssertLogRelRCReturn(rc, rc);
862 pHCtl->u.cmd.cbCmd = u32;
863
864 rc = SSMR3GetU32(pSSM, &u32);
865 AssertLogRelRCReturn(rc, rc);
866 pHCtl->u.cmd.pu8Cmd = pu8VramBase + u32;
867
868 RTListAppend(&pCmdVbva->GuestCtlList, &pHCtl->Node);
869 ++pCmdVbva->u32cCtls;
870
871 return VINF_SUCCESS;
872}
873
874/**
875 * Worker for VBoxVBVAExHSLoadState.
876 * @thread VDMA
877 */
878static int vboxVBVAExHSLoadStateLocked(struct VBVAEXHOSTCONTEXT *pCmdVbva, uint8_t* pu8VramBase, PSSMHANDLE pSSM, uint32_t u32Version)
879{
880 if (ASMAtomicUoReadS32(&pCmdVbva->i32EnableState) != VBVAEXHOSTCONTEXT_ESTATE_PAUSED)
881 {
882 WARN(("vbva not stopped\n"));
883 return VERR_INVALID_STATE;
884 }
885
886 int rc;
887 do
888 {
889 rc = vboxVBVAExHSLoadGuestCtl(pCmdVbva, pu8VramBase, pSSM, u32Version);
890 AssertLogRelRCReturn(rc, rc);
891 } while (rc != VINF_EOF);
892
893 return VINF_SUCCESS;
894}
895
896/**
897 * Handles VBVAEXHOSTCTL_TYPE_HH_LOADSTATE for vboxVDMACrHostCtlProcess(),
898 * loading state on the VDMA thread.
899 *
900 * @returns - same as VBoxVBVAExHSCheckCommands, or failure on load state fail
901 * @thread VDMA
902 */
903static int VBoxVBVAExHSLoadState(struct VBVAEXHOSTCONTEXT *pCmdVbva, uint8_t* pu8VramBase, PSSMHANDLE pSSM, uint32_t u32Version)
904{
905 Assert(VGA_SAVEDSTATE_VERSION_3D <= u32Version);
906 int rc = RTCritSectEnter(&pCmdVbva->CltCritSect);
907 AssertRCReturn(rc, rc);
908
909 rc = vboxVBVAExHSLoadStateLocked(pCmdVbva, pu8VramBase, pSSM, u32Version);
910 if (RT_FAILURE(rc))
911 WARN(("vboxVBVAExHSSaveStateLocked failed %Rrc\n", rc));
912
913 RTCritSectLeave(&pCmdVbva->CltCritSect);
914 return rc;
915}
916
917
918
919/**
920 * Queues a control command to the VDMA worker thread.
921 *
922 * The @a enmSource argument decides which list (guest/host) it's queued on.
923 *
924 */
925static int VBoxVBVAExHCtlSubmit(VBVAEXHOSTCONTEXT *pCmdVbva, VBVAEXHOSTCTL* pCtl, VBVAEXHOSTCTL_SOURCE enmSource,
926 PFNVBVAEXHOSTCTL_COMPLETE pfnComplete, void *pvComplete)
927{
928 int rc;
929 if (VBoxVBVAExHSIsEnabled(pCmdVbva))
930 {
931 pCtl->pfnComplete = pfnComplete;
932 pCtl->pvComplete = pvComplete;
933
934 rc = RTCritSectEnter(&pCmdVbva->CltCritSect);
935 if (RT_SUCCESS(rc))
936 {
937 /* Recheck that we're enabled after we've got the lock. */
938 if (VBoxVBVAExHSIsEnabled(pCmdVbva))
939 {
940 /* Queue it. */
941 if (enmSource > VBVAEXHOSTCTL_SOURCE_GUEST)
942 RTListAppend(&pCmdVbva->HostCtlList, &pCtl->Node);
943 else
944 RTListAppend(&pCmdVbva->GuestCtlList, &pCtl->Node);
945 ASMAtomicIncU32(&pCmdVbva->u32cCtls);
946
947 RTCritSectLeave(&pCmdVbva->CltCritSect);
948
949 /* Work the state or something. */
950 rc = VBoxVBVAExHSCheckCommands(pCmdVbva);
951 }
952 else
953 {
954 RTCritSectLeave(&pCmdVbva->CltCritSect);
955 Log(("cmd vbva not enabled (race)\n"));
956 rc = VERR_INVALID_STATE;
957 }
958 }
959 else
960 AssertRC(rc);
961 }
962 else
963 {
964 Log(("cmd vbva not enabled\n"));
965 rc = VERR_INVALID_STATE;
966 }
967 return rc;
968}
969
970/**
971 * Submits the control command and notifies the VDMA thread.
972 */
973static int vdmaVBVACtlSubmit(PVBOXVDMAHOST pVdma, VBVAEXHOSTCTL *pCtl, VBVAEXHOSTCTL_SOURCE enmSource,
974 PFNVBVAEXHOSTCTL_COMPLETE pfnComplete, void *pvComplete)
975{
976 int rc = VBoxVBVAExHCtlSubmit(&pVdma->CmdVbva, pCtl, enmSource, pfnComplete, pvComplete);
977 if (RT_SUCCESS(rc))
978 {
979 if (rc == VINF_SUCCESS)
980 return VBoxVDMAThreadEventNotify(&pVdma->Thread);
981 Assert(rc == VINF_ALREADY_INITIALIZED);
982 }
983 else
984 Log(("VBoxVBVAExHCtlSubmit failed %Rrc\n", rc));
985
986 return rc;
987}
988
989
990/**
991 * Call VDMA thread creation notification callback.
992 */
993void VBoxVDMAThreadNotifyConstructSucceeded(PVBOXVDMATHREAD pThread, void *pvThreadContext)
994{
995 Assert(pThread->u32State == VBOXVDMATHREAD_STATE_CREATING);
996 PFNVBOXVDMATHREAD_CHANGED pfnChanged = pThread->pfnChanged;
997 void *pvChanged = pThread->pvChanged;
998
999 pThread->pfnChanged = NULL;
1000 pThread->pvChanged = NULL;
1001
1002 ASMAtomicWriteU32(&pThread->u32State, VBOXVDMATHREAD_STATE_CREATED);
1003
1004 if (pfnChanged)
1005 pfnChanged(pThread, VINF_SUCCESS, pvThreadContext, pvChanged);
1006}
1007
1008/**
1009 * Call VDMA thread termination notification callback.
1010 */
1011void VBoxVDMAThreadNotifyTerminatingSucceeded(PVBOXVDMATHREAD pThread, void *pvThreadContext)
1012{
1013 Assert(pThread->u32State == VBOXVDMATHREAD_STATE_TERMINATING);
1014 PFNVBOXVDMATHREAD_CHANGED pfnChanged = pThread->pfnChanged;
1015 void *pvChanged = pThread->pvChanged;
1016
1017 pThread->pfnChanged = NULL;
1018 pThread->pvChanged = NULL;
1019
1020 if (pfnChanged)
1021 pfnChanged(pThread, VINF_SUCCESS, pvThreadContext, pvChanged);
1022}
1023
1024/**
1025 * Check if VDMA thread is terminating.
1026 */
1027DECLINLINE(bool) VBoxVDMAThreadIsTerminating(PVBOXVDMATHREAD pThread)
1028{
1029 return ASMAtomicUoReadU32(&pThread->u32State) == VBOXVDMATHREAD_STATE_TERMINATING;
1030}
1031
1032/**
1033 * Init VDMA thread.
1034 */
1035void VBoxVDMAThreadInit(PVBOXVDMATHREAD pThread)
1036{
1037 RT_ZERO(*pThread);
1038 pThread->u32State = VBOXVDMATHREAD_STATE_TERMINATED;
1039}
1040
1041/**
1042 * Clean up VDMA thread.
1043 */
1044int VBoxVDMAThreadCleanup(PVBOXVDMATHREAD pThread)
1045{
1046 uint32_t u32State = ASMAtomicUoReadU32(&pThread->u32State);
1047 switch (u32State)
1048 {
1049 case VBOXVDMATHREAD_STATE_TERMINATED:
1050 return VINF_SUCCESS;
1051
1052 case VBOXVDMATHREAD_STATE_TERMINATING:
1053 {
1054 int rc = RTThreadWait(pThread->hWorkerThread, RT_INDEFINITE_WAIT, NULL);
1055 if (RT_SUCCESS(rc))
1056 {
1057 RTSemEventDestroy(pThread->hEvent);
1058 pThread->hEvent = NIL_RTSEMEVENT;
1059 pThread->hWorkerThread = NIL_RTTHREAD;
1060 ASMAtomicWriteU32(&pThread->u32State, VBOXVDMATHREAD_STATE_TERMINATED);
1061 }
1062 else
1063 WARN(("RTThreadWait failed %Rrc\n", rc));
1064 return rc;
1065 }
1066
1067 default:
1068 WARN(("invalid state"));
1069 return VERR_INVALID_STATE;
1070 }
1071}
1072
1073/**
1074 * Start VDMA thread.
1075 */
1076int VBoxVDMAThreadCreate(PVBOXVDMATHREAD pThread, PFNRTTHREAD pfnThread, void *pvThread,
1077 PFNVBOXVDMATHREAD_CHANGED pfnCreated, void *pvCreated)
1078{
1079 int rc = VBoxVDMAThreadCleanup(pThread);
1080 if (RT_SUCCESS(rc))
1081 {
1082 rc = RTSemEventCreate(&pThread->hEvent);
1083 pThread->u32State = VBOXVDMATHREAD_STATE_CREATING;
1084 pThread->pfnChanged = pfnCreated;
1085 pThread->pvChanged = pvCreated;
1086 rc = RTThreadCreate(&pThread->hWorkerThread, pfnThread, pvThread, 0, RTTHREADTYPE_IO, RTTHREADFLAGS_WAITABLE, "VDMA");
1087 if (RT_SUCCESS(rc))
1088 return VINF_SUCCESS;
1089
1090 WARN(("RTThreadCreate failed %Rrc\n", rc));
1091 RTSemEventDestroy(pThread->hEvent);
1092 pThread->hEvent = NIL_RTSEMEVENT;
1093 pThread->hWorkerThread = NIL_RTTHREAD;
1094 pThread->u32State = VBOXVDMATHREAD_STATE_TERMINATED;
1095 }
1096 else
1097 WARN(("VBoxVDMAThreadCleanup failed %Rrc\n", rc));
1098 return rc;
1099}
1100
1101/**
1102 * Notifies the VDMA thread.
1103 * @thread !VDMA
1104 */
1105static int VBoxVDMAThreadEventNotify(PVBOXVDMATHREAD pThread)
1106{
1107 int rc = RTSemEventSignal(pThread->hEvent);
1108 AssertRC(rc);
1109 return rc;
1110}
1111
1112/**
1113 * State worker for VBVAEXHOSTCTL_TYPE_HH_ON_HGCM_UNLOAD &
1114 * VBVAEXHOSTCTL_TYPE_GHH_DISABLE in vboxVDMACrHostCtlProcess(), and
1115 * VBVAEXHOSTCTL_TYPE_GHH_DISABLE in vboxVDMACrGuestCtlProcess().
1116 *
1117 * @thread VDMA
1118 */
1119static int VBoxVDMAThreadTerm(PVBOXVDMATHREAD pThread, PFNVBOXVDMATHREAD_CHANGED pfnTerminated, void *pvTerminated, bool fNotify)
1120{
1121 for (;;)
1122 {
1123 uint32_t u32State = ASMAtomicUoReadU32(&pThread->u32State);
1124 switch (u32State)
1125 {
1126 case VBOXVDMATHREAD_STATE_CREATED:
1127 pThread->pfnChanged = pfnTerminated;
1128 pThread->pvChanged = pvTerminated;
1129 ASMAtomicWriteU32(&pThread->u32State, VBOXVDMATHREAD_STATE_TERMINATING);
1130 if (fNotify)
1131 {
1132 int rc = VBoxVDMAThreadEventNotify(pThread);
1133 AssertRC(rc);
1134 }
1135 return VINF_SUCCESS;
1136
1137 case VBOXVDMATHREAD_STATE_TERMINATING:
1138 case VBOXVDMATHREAD_STATE_TERMINATED:
1139 WARN(("thread is marked to termination or terminated\nn"));
1140 return VERR_INVALID_STATE;
1141
1142 case VBOXVDMATHREAD_STATE_CREATING:
1143 /* wait till the thread creation is completed */
1144 WARN(("concurrent thread create/destron\n"));
1145 RTThreadYield();
1146 continue;
1147
1148 default:
1149 WARN(("invalid state"));
1150 return VERR_INVALID_STATE;
1151 }
1152 }
1153}
1154
1155
1156
1157/*
1158 *
1159 *
1160 * vboxVDMACrCtlPost / vboxVDMACrCtlPostAsync
1161 * vboxVDMACrCtlPost / vboxVDMACrCtlPostAsync
1162 * vboxVDMACrCtlPost / vboxVDMACrCtlPostAsync
1163 *
1164 *
1165 */
1166
1167/** Completion callback for vboxVDMACrCtlPostAsync(). */
1168typedef DECLCALLBACK(void) FNVBOXVDMACRCTL_CALLBACK(PVGASTATE pVGAState, PVBOXVDMACMD_CHROMIUM_CTL pCmd, void* pvContext);
1169/** Pointer to a vboxVDMACrCtlPostAsync completion callback. */
1170typedef FNVBOXVDMACRCTL_CALLBACK *PFNVBOXVDMACRCTL_CALLBACK;
1171
1172/**
1173 * Private wrapper around VBOXVDMACMD_CHROMIUM_CTL.
1174 */
1175typedef struct VBOXVDMACMD_CHROMIUM_CTL_PRIVATE
1176{
1177 uint32_t uMagic; /**< VBOXVDMACMD_CHROMIUM_CTL_PRIVATE_MAGIC */
1178 uint32_t cRefs;
1179 int32_t volatile rc;
1180 PFNVBOXVDMACRCTL_CALLBACK pfnCompletion;
1181 void *pvCompletion;
1182 RTSEMEVENT hEvtDone;
1183 VBOXVDMACMD_CHROMIUM_CTL Cmd;
1184} VBOXVDMACMD_CHROMIUM_CTL_PRIVATE, *PVBOXVDMACMD_CHROMIUM_CTL_PRIVATE;
1185/** Magic number for VBOXVDMACMD_CHROMIUM_CTL_PRIVATE (Michael Wolff). */
1186# define VBOXVDMACMD_CHROMIUM_CTL_PRIVATE_MAGIC UINT32_C(0x19530827)
1187
1188/** Converts from a VBOXVDMACMD_CHROMIUM_CTL::Cmd pointer to a pointer to the
1189 * containing structure. */
1190# define VBOXVDMACMD_CHROMIUM_CTL_PRIVATE_FROM_CTL(_p) RT_FROM_MEMBER(pCmd, VBOXVDMACMD_CHROMIUM_CTL_PRIVATE, Cmd)
1191
1192/**
1193 * Creates a VBOXVDMACMD_CHROMIUM_CTL_PRIVATE instance.
1194 */
1195static PVBOXVDMACMD_CHROMIUM_CTL vboxVDMACrCtlCreate(VBOXVDMACMD_CHROMIUM_CTL_TYPE enmCmd, uint32_t cbCmd)
1196{
1197 PVBOXVDMACMD_CHROMIUM_CTL_PRIVATE pHdr;
1198 pHdr = (PVBOXVDMACMD_CHROMIUM_CTL_PRIVATE)RTMemAllocZ(cbCmd + RT_OFFSETOF(VBOXVDMACMD_CHROMIUM_CTL_PRIVATE, Cmd));
1199 if (pHdr)
1200 {
1201 pHdr->uMagic = VBOXVDMACMD_CHROMIUM_CTL_PRIVATE_MAGIC;
1202 pHdr->cRefs = 1;
1203 pHdr->rc = VERR_NOT_IMPLEMENTED;
1204 pHdr->hEvtDone = NIL_RTSEMEVENT;
1205 pHdr->Cmd.enmType = enmCmd;
1206 pHdr->Cmd.cbCmd = cbCmd;
1207 return &pHdr->Cmd;
1208 }
1209 return NULL;
1210}
1211
1212/**
1213 * Releases a reference to a VBOXVDMACMD_CHROMIUM_CTL_PRIVATE instance.
1214 */
1215DECLINLINE(void) vboxVDMACrCtlRelease(PVBOXVDMACMD_CHROMIUM_CTL pCmd)
1216{
1217 PVBOXVDMACMD_CHROMIUM_CTL_PRIVATE pHdr = VBOXVDMACMD_CHROMIUM_CTL_PRIVATE_FROM_CTL(pCmd);
1218 Assert(pHdr->uMagic == VBOXVDMACMD_CHROMIUM_CTL_PRIVATE_MAGIC);
1219
1220 uint32_t cRefs = ASMAtomicDecU32(&pHdr->cRefs);
1221 if (!cRefs)
1222 {
1223 pHdr->uMagic = ~VBOXVDMACMD_CHROMIUM_CTL_PRIVATE_MAGIC;
1224 if (pHdr->hEvtDone != NIL_RTSEMEVENT)
1225 {
1226 RTSemEventDestroy(pHdr->hEvtDone);
1227 pHdr->hEvtDone = NIL_RTSEMEVENT;
1228 }
1229 RTMemFree(pHdr);
1230 }
1231}
1232
1233/**
1234 * Releases a reference to a VBOXVDMACMD_CHROMIUM_CTL_PRIVATE instance.
1235 */
1236DECLINLINE(void) vboxVDMACrCtlRetain(PVBOXVDMACMD_CHROMIUM_CTL pCmd)
1237{
1238 PVBOXVDMACMD_CHROMIUM_CTL_PRIVATE pHdr = VBOXVDMACMD_CHROMIUM_CTL_PRIVATE_FROM_CTL(pCmd);
1239 Assert(pHdr->uMagic == VBOXVDMACMD_CHROMIUM_CTL_PRIVATE_MAGIC);
1240
1241 uint32_t cRefs = ASMAtomicIncU32(&pHdr->cRefs);
1242 Assert(cRefs > 1);
1243 Assert(cRefs < _1K);
1244 RT_NOREF_PV(cRefs);
1245}
1246
1247/**
1248 * Gets the result from our private chromium control command.
1249 *
1250 * @returns status code.
1251 * @param pCmd The command.
1252 */
1253DECLINLINE(int) vboxVDMACrCtlGetRc(PVBOXVDMACMD_CHROMIUM_CTL pCmd)
1254{
1255 PVBOXVDMACMD_CHROMIUM_CTL_PRIVATE pHdr = VBOXVDMACMD_CHROMIUM_CTL_PRIVATE_FROM_CTL(pCmd);
1256 Assert(pHdr->uMagic == VBOXVDMACMD_CHROMIUM_CTL_PRIVATE_MAGIC);
1257 return pHdr->rc;
1258}
1259
1260/**
1261 * @interface_method_impl{PDMIDISPLAYVBVACALLBACKS,pfnCrHgsmiControlCompleteAsync,
1262 * Some indirect completion magic, you gotta love this code! }
1263 */
1264DECLCALLBACK(int) vboxVDMACrHgsmiControlCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface, PVBOXVDMACMD_CHROMIUM_CTL pCmd, int rc)
1265{
1266 PVGASTATE pVGAState = PPDMIDISPLAYVBVACALLBACKS_2_PVGASTATE(pInterface);
1267 PVBOXVDMACMD_CHROMIUM_CTL_PRIVATE pHdr = VBOXVDMACMD_CHROMIUM_CTL_PRIVATE_FROM_CTL(pCmd);
1268 Assert(pHdr->uMagic == VBOXVDMACMD_CHROMIUM_CTL_PRIVATE_MAGIC);
1269
1270 pHdr->rc = rc;
1271 if (pHdr->pfnCompletion)
1272 pHdr->pfnCompletion(pVGAState, pCmd, pHdr->pvCompletion);
1273 return VINF_SUCCESS;
1274}
1275
1276/**
1277 * @callback_method_impl{FNCRCTLCOMPLETION,
1278 * Completion callback for vboxVDMACrCtlPost. }
1279 */
1280static DECLCALLBACK(void) vboxVDMACrCtlCbSetEvent(PVGASTATE pVGAState, PVBOXVDMACMD_CHROMIUM_CTL pCmd, void *pvContext)
1281{
1282 PVBOXVDMACMD_CHROMIUM_CTL_PRIVATE pHdr = (PVBOXVDMACMD_CHROMIUM_CTL_PRIVATE)pvContext;
1283 Assert(pHdr == VBOXVDMACMD_CHROMIUM_CTL_PRIVATE_FROM_CTL(pCmd));
1284 Assert(pHdr->uMagic == VBOXVDMACMD_CHROMIUM_CTL_PRIVATE_MAGIC);
1285 RT_NOREF(pVGAState, pCmd);
1286
1287 int rc = RTSemEventSignal(pHdr->hEvtDone);
1288 AssertRC(rc);
1289
1290 vboxVDMACrCtlRelease(&pHdr->Cmd);
1291}
1292
1293/**
1294 * Worker for vboxVDMACrCtlPost().
1295 */
1296static int vboxVDMACrCtlPostAsync(PVGASTATE pVGAState, PVBOXVDMACMD_CHROMIUM_CTL pCmd, uint32_t cbCmd,
1297 PFNVBOXVDMACRCTL_CALLBACK pfnCompletion, void *pvCompletion)
1298{
1299 if ( pVGAState->pDrv
1300 && pVGAState->pDrv->pfnCrHgsmiControlProcess)
1301 {
1302 PVBOXVDMACMD_CHROMIUM_CTL_PRIVATE pHdr = VBOXVDMACMD_CHROMIUM_CTL_PRIVATE_FROM_CTL(pCmd);
1303 pHdr->pfnCompletion = pfnCompletion;
1304 pHdr->pvCompletion = pvCompletion;
1305 pVGAState->pDrv->pfnCrHgsmiControlProcess(pVGAState->pDrv, pCmd, cbCmd);
1306 return VINF_SUCCESS;
1307 }
1308 return VERR_NOT_SUPPORTED;
1309}
1310
1311/**
1312 * Posts stuff and waits.
1313 */
1314static int vboxVDMACrCtlPost(PVGASTATE pVGAState, PVBOXVDMACMD_CHROMIUM_CTL pCmd, uint32_t cbCmd)
1315{
1316 PVBOXVDMACMD_CHROMIUM_CTL_PRIVATE pHdr = VBOXVDMACMD_CHROMIUM_CTL_PRIVATE_FROM_CTL(pCmd);
1317
1318 /* Allocate the semaphore. */
1319 Assert(pHdr->hEvtDone == NIL_RTSEMEVENT);
1320 int rc = RTSemEventCreate(&pHdr->hEvtDone);
1321 AssertRCReturn(rc, rc);
1322
1323 /* Grab a reference for the completion routine. */
1324 vboxVDMACrCtlRetain(&pHdr->Cmd);
1325
1326 /* Submit and wait for it. */
1327 rc = vboxVDMACrCtlPostAsync(pVGAState, pCmd, cbCmd, vboxVDMACrCtlCbSetEvent, pHdr);
1328 if (RT_SUCCESS(rc))
1329 rc = RTSemEventWaitNoResume(pHdr->hEvtDone, RT_INDEFINITE_WAIT);
1330 else
1331 {
1332 if (rc != VERR_NOT_SUPPORTED)
1333 AssertRC(rc);
1334 vboxVDMACrCtlRelease(pCmd);
1335 }
1336 return rc;
1337}
1338
1339
1340/**
1341 * Structure for passing data between vboxVDMACrHgcmSubmitSync() and the
1342 * completion routine vboxVDMACrHgcmSubmitSyncCompletion().
1343 */
1344typedef struct VDMA_VBVA_CTL_CYNC_COMPLETION
1345{
1346 int volatile rc;
1347 RTSEMEVENT hEvent;
1348} VDMA_VBVA_CTL_CYNC_COMPLETION;
1349
1350/**
1351 * @callback_method_impl{FNCRCTLCOMPLETION,
1352 * Completion callback for vboxVDMACrHgcmSubmitSync() that signals the
1353 * waiting thread.}
1354 */
1355static DECLCALLBACK(void) vboxVDMACrHgcmSubmitSyncCompletion(struct VBOXCRCMDCTL *pCmd, uint32_t cbCmd, int rc, void *pvCompletion)
1356{
1357 VDMA_VBVA_CTL_CYNC_COMPLETION *pData = (VDMA_VBVA_CTL_CYNC_COMPLETION*)pvCompletion;
1358 pData->rc = rc;
1359 rc = RTSemEventSignal(pData->hEvent);
1360 AssertLogRelRC(rc);
1361
1362 RT_NOREF(pCmd, cbCmd);
1363}
1364
1365/**
1366 * Worker for vboxVDMACrHgcmHandleEnable() and vdmaVBVAEnableProcess() that
1367 * works pVGAState->pDrv->pfnCrHgcmCtlSubmit.
1368 *
1369 * @thread VDMA
1370 */
1371static int vboxVDMACrHgcmSubmitSync(struct VBOXVDMAHOST *pVdma, VBOXCRCMDCTL* pCtl, uint32_t cbCtl)
1372{
1373 VDMA_VBVA_CTL_CYNC_COMPLETION Data;
1374 Data.rc = VERR_NOT_IMPLEMENTED;
1375 int rc = RTSemEventCreate(&Data.hEvent);
1376 if (!RT_SUCCESS(rc))
1377 {
1378 WARN(("RTSemEventCreate failed %Rrc\n", rc));
1379 return rc;
1380 }
1381
1382 pCtl->CalloutList.List.pNext = NULL;
1383
1384 PVGASTATE pVGAState = pVdma->pVGAState;
1385 rc = pVGAState->pDrv->pfnCrHgcmCtlSubmit(pVGAState->pDrv, pCtl, cbCtl, vboxVDMACrHgcmSubmitSyncCompletion, &Data);
1386 if (RT_SUCCESS(rc))
1387 {
1388 rc = RTSemEventWait(Data.hEvent, RT_INDEFINITE_WAIT);
1389 if (RT_SUCCESS(rc))
1390 {
1391 rc = Data.rc;
1392 if (!RT_SUCCESS(rc))
1393 {
1394 WARN(("pfnCrHgcmCtlSubmit command failed %Rrc\n", rc));
1395 }
1396
1397 }
1398 else
1399 WARN(("RTSemEventWait failed %Rrc\n", rc));
1400 }
1401 else
1402 WARN(("pfnCrHgcmCtlSubmit failed %Rrc\n", rc));
1403
1404
1405 RTSemEventDestroy(Data.hEvent);
1406
1407 return rc;
1408}
1409
1410
1411/**
1412 * Worker for vboxVDMAReset().
1413 */
1414static int vdmaVBVACtlDisableSync(PVBOXVDMAHOST pVdma)
1415{
1416 VBVAEXHOSTCTL HCtl;
1417 RT_ZERO(HCtl);
1418 HCtl.enmType = VBVAEXHOSTCTL_TYPE_GHH_DISABLE;
1419 int rc = vdmaVBVACtlSubmitSync(pVdma, &HCtl, VBVAEXHOSTCTL_SOURCE_HOST);
1420 if (RT_SUCCESS(rc))
1421 vgaUpdateDisplayAll(pVdma->pVGAState, /* fFailOnResize = */ false);
1422 else
1423 Log(("vdmaVBVACtlSubmitSync failed %Rrc\n", rc));
1424 return rc;
1425}
1426
1427
1428/**
1429 * @interface_method_impl{VBOXCRCMDCTL_HGCMENABLE_DATA,pfnRHCmd,
1430 * Used by vboxVDMACrHgcmNotifyTerminatingCb() and called by
1431 * crVBoxServerCrCmdDisablePostProcess() during crServerTearDown() to drain
1432 * command queues or something.}
1433 */
1434static DECLCALLBACK(uint8_t *)
1435vboxVDMACrHgcmHandleEnableRemainingHostCommand(HVBOXCRCMDCTL_REMAINING_HOST_COMMAND hClient, uint32_t *pcbCtl, int prevCmdRc)
1436{
1437 struct VBOXVDMAHOST *pVdma = hClient;
1438
1439 if (!pVdma->pCurRemainingHostCtl)
1440 VBoxVBVAExHSDisable(&pVdma->CmdVbva); /* disable VBVA, all subsequent host commands will go HGCM way */
1441 else
1442 VBoxVBVAExHPDataCompleteCtl(&pVdma->CmdVbva, pVdma->pCurRemainingHostCtl, prevCmdRc);
1443
1444 pVdma->pCurRemainingHostCtl = VBoxVBVAExHPCheckHostCtlOnDisable(&pVdma->CmdVbva);
1445 if (pVdma->pCurRemainingHostCtl)
1446 {
1447 *pcbCtl = pVdma->pCurRemainingHostCtl->u.cmd.cbCmd;
1448 return pVdma->pCurRemainingHostCtl->u.cmd.pu8Cmd;
1449 }
1450
1451 *pcbCtl = 0;
1452 return NULL;
1453}
1454
1455/**
1456 * @interface_method_impl{VBOXCRCMDCTL_HGCMDISABLE_DATA,pfnNotifyTermDone,
1457 * Called by crServerTearDown().}
1458 */
1459static DECLCALLBACK(void) vboxVDMACrHgcmNotifyTerminatingDoneCb(HVBOXCRCMDCTL_NOTIFY_TERMINATING hClient)
1460{
1461# ifdef VBOX_STRICT
1462 struct VBOXVDMAHOST *pVdma = hClient;
1463 Assert(pVdma->CmdVbva.i32State == VBVAEXHOSTCONTEXT_STATE_PROCESSING);
1464 Assert(pVdma->Thread.u32State == VBOXVDMATHREAD_STATE_TERMINATING);
1465# else
1466 RT_NOREF(hClient);
1467# endif
1468}
1469
1470/**
1471 * @interface_method_impl{VBOXCRCMDCTL_HGCMDISABLE_DATA,pfnNotifyTerm,
1472 * Called by crServerTearDown().}
1473 */
1474static DECLCALLBACK(int) vboxVDMACrHgcmNotifyTerminatingCb(HVBOXCRCMDCTL_NOTIFY_TERMINATING hClient,
1475 VBOXCRCMDCTL_HGCMENABLE_DATA *pHgcmEnableData)
1476{
1477 struct VBOXVDMAHOST *pVdma = hClient;
1478
1479 VBVAEXHOSTCTL HCtl;
1480 RT_ZERO(HCtl);
1481 HCtl.enmType = VBVAEXHOSTCTL_TYPE_HH_ON_HGCM_UNLOAD;
1482 int rc = vdmaVBVACtlSubmitSync(pVdma, &HCtl, VBVAEXHOSTCTL_SOURCE_HOST);
1483
1484 pHgcmEnableData->hRHCmd = pVdma;
1485 pHgcmEnableData->pfnRHCmd = vboxVDMACrHgcmHandleEnableRemainingHostCommand;
1486
1487 if (rc == VERR_INVALID_STATE)
1488 rc = VINF_SUCCESS;
1489 else if (RT_FAILURE(rc))
1490 WARN(("vdmaVBVACtlSubmitSync failed %Rrc\n", rc));
1491
1492 return rc;
1493}
1494
1495/**
1496 * Worker for vdmaVBVAEnableProcess() and vdmaVBVADisableProcess().
1497 *
1498 * @thread VDMA
1499 */
1500static int vboxVDMACrHgcmHandleEnable(struct VBOXVDMAHOST *pVdma)
1501{
1502 VBOXCRCMDCTL_ENABLE Enable;
1503 RT_ZERO(Enable);
1504 Enable.Hdr.enmType = VBOXCRCMDCTL_TYPE_ENABLE;
1505 Enable.Data.hRHCmd = pVdma;
1506 Enable.Data.pfnRHCmd = vboxVDMACrHgcmHandleEnableRemainingHostCommand;
1507
1508 int rc = vboxVDMACrHgcmSubmitSync(pVdma, &Enable.Hdr, sizeof (Enable));
1509 Assert(!pVdma->pCurRemainingHostCtl);
1510 if (RT_SUCCESS(rc))
1511 {
1512 Assert(!VBoxVBVAExHSIsEnabled(&pVdma->CmdVbva));
1513 return VINF_SUCCESS;
1514 }
1515
1516 Assert(VBoxVBVAExHSIsEnabled(&pVdma->CmdVbva));
1517 WARN(("vboxVDMACrHgcmSubmitSync failed %Rrc\n", rc));
1518 return rc;
1519}
1520
1521/**
1522 * Handles VBVAEXHOSTCTL_TYPE_GHH_ENABLE and VBVAEXHOSTCTL_TYPE_GHH_ENABLE_PAUSED
1523 * for vboxVDMACrGuestCtlProcess().
1524 *
1525 * @thread VDMA
1526 */
1527static int vdmaVBVAEnableProcess(struct VBOXVDMAHOST *pVdma, uint32_t u32Offset)
1528{
1529 if (VBoxVBVAExHSIsEnabled(&pVdma->CmdVbva))
1530 {
1531 WARN(("vdma VBVA is already enabled\n"));
1532 return VERR_INVALID_STATE;
1533 }
1534
1535 VBVABUFFER *pVBVA = (VBVABUFFER *)HGSMIOffsetToPointerHost(pVdma->pHgsmi, u32Offset);
1536 if (!pVBVA)
1537 {
1538 WARN(("invalid offset %d (%#x)\n", u32Offset, u32Offset));
1539 return VERR_INVALID_PARAMETER;
1540 }
1541
1542 int rc = VBoxVBVAExHSEnable(&pVdma->CmdVbva, pVBVA, pVdma->pVGAState->vram_ptrR3, pVdma->pVGAState->vram_size);
1543 if (RT_SUCCESS(rc))
1544 {
1545 if (!pVdma->CrSrvInfo.pfnEnable)
1546 {
1547 /* "HGCM-less" mode. All inited. */
1548 return VINF_SUCCESS;
1549 }
1550
1551 VBOXCRCMDCTL_DISABLE Disable;
1552 Disable.Hdr.enmType = VBOXCRCMDCTL_TYPE_DISABLE;
1553 Disable.Data.hNotifyTerm = pVdma;
1554 Disable.Data.pfnNotifyTerm = vboxVDMACrHgcmNotifyTerminatingCb;
1555 Disable.Data.pfnNotifyTermDone = vboxVDMACrHgcmNotifyTerminatingDoneCb;
1556 rc = vboxVDMACrHgcmSubmitSync(pVdma, &Disable.Hdr, sizeof (Disable));
1557 if (RT_SUCCESS(rc))
1558 {
1559 PVGASTATE pVGAState = pVdma->pVGAState;
1560 VBOXCRCMD_SVRENABLE_INFO Info;
1561 Info.hCltScr = pVGAState->pDrv;
1562 Info.pfnCltScrUpdateBegin = pVGAState->pDrv->pfnVBVAUpdateBegin;
1563 Info.pfnCltScrUpdateProcess = pVGAState->pDrv->pfnVBVAUpdateProcess;
1564 Info.pfnCltScrUpdateEnd = pVGAState->pDrv->pfnVBVAUpdateEnd;
1565 rc = pVdma->CrSrvInfo.pfnEnable(pVdma->CrSrvInfo.hSvr, &Info);
1566 if (RT_SUCCESS(rc))
1567 return VINF_SUCCESS;
1568
1569 WARN(("pfnEnable failed %Rrc\n", rc));
1570 vboxVDMACrHgcmHandleEnable(pVdma);
1571 }
1572 else
1573 WARN(("vboxVDMACrHgcmSubmitSync failed %Rrc\n", rc));
1574
1575 VBoxVBVAExHSDisable(&pVdma->CmdVbva);
1576 }
1577 else
1578 WARN(("VBoxVBVAExHSEnable failed %Rrc\n", rc));
1579
1580 return rc;
1581}
1582
1583/**
1584 * Worker for several vboxVDMACrHostCtlProcess() commands.
1585 *
1586 * @returns IPRT status code.
1587 * @param pVdma The VDMA channel.
1588 * @param fDoHgcmEnable ???
1589 * @thread VDMA
1590 */
1591static int vdmaVBVADisableProcess(struct VBOXVDMAHOST *pVdma, bool fDoHgcmEnable)
1592{
1593 if (!VBoxVBVAExHSIsEnabled(&pVdma->CmdVbva))
1594 {
1595 Log(("vdma VBVA is already disabled\n"));
1596 return VINF_SUCCESS;
1597 }
1598
1599 if (!pVdma->CrSrvInfo.pfnDisable)
1600 {
1601 /* "HGCM-less" mode. Just undo what vdmaVBVAEnableProcess did. */
1602 VBoxVBVAExHSDisable(&pVdma->CmdVbva);
1603 return VINF_SUCCESS;
1604 }
1605
1606 int rc = pVdma->CrSrvInfo.pfnDisable(pVdma->CrSrvInfo.hSvr);
1607 if (RT_SUCCESS(rc))
1608 {
1609 if (fDoHgcmEnable)
1610 {
1611 PVGASTATE pVGAState = pVdma->pVGAState;
1612
1613 /* disable is a bit tricky
1614 * we need to ensure the host ctl commands do not come out of order
1615 * and do not come over HGCM channel until after it is enabled */
1616 rc = vboxVDMACrHgcmHandleEnable(pVdma);
1617 if (RT_SUCCESS(rc))
1618 {
1619 vdmaVBVANotifyDisable(pVGAState);
1620 return VINF_SUCCESS;
1621 }
1622
1623 VBOXCRCMD_SVRENABLE_INFO Info;
1624 Info.hCltScr = pVGAState->pDrv;
1625 Info.pfnCltScrUpdateBegin = pVGAState->pDrv->pfnVBVAUpdateBegin;
1626 Info.pfnCltScrUpdateProcess = pVGAState->pDrv->pfnVBVAUpdateProcess;
1627 Info.pfnCltScrUpdateEnd = pVGAState->pDrv->pfnVBVAUpdateEnd;
1628 pVdma->CrSrvInfo.pfnEnable(pVdma->CrSrvInfo.hSvr, &Info); /** @todo ignoring return code */
1629 }
1630 }
1631 else
1632 WARN(("pfnDisable failed %Rrc\n", rc));
1633
1634 return rc;
1635}
1636
1637/**
1638 * Handles VBVAEXHOST_DATA_TYPE_HOSTCTL for vboxVDMAWorkerThread.
1639 *
1640 * @returns VBox status code.
1641 * @param pVdma The VDMA channel.
1642 * @param pCmd The control command to process. Should be
1643 * safe, i.e. not shared with guest.
1644 * @param pfContinue Where to return whether to continue or not.
1645 * @thread VDMA
1646 */
1647static int vboxVDMACrHostCtlProcess(struct VBOXVDMAHOST *pVdma, VBVAEXHOSTCTL *pCmd, bool *pfContinue)
1648{
1649 *pfContinue = true;
1650
1651 int rc;
1652 switch (pCmd->enmType)
1653 {
1654 /*
1655 * See vdmaVBVACtlOpaqueHostSubmit() and its callers.
1656 */
1657 case VBVAEXHOSTCTL_TYPE_GHH_BE_OPAQUE:
1658 if (VBoxVBVAExHSIsEnabled(&pVdma->CmdVbva))
1659 {
1660 if (pVdma->CrSrvInfo.pfnHostCtl)
1661 return pVdma->CrSrvInfo.pfnHostCtl(pVdma->CrSrvInfo.hSvr, pCmd->u.cmd.pu8Cmd, pCmd->u.cmd.cbCmd);
1662 WARN(("VBVAEXHOSTCTL_TYPE_GHH_BE_OPAQUE for disabled vdma VBVA\n"));
1663 }
1664 else
1665 WARN(("VBVAEXHOSTCTL_TYPE_GHH_BE_OPAQUE for HGCM-less mode\n"));
1666 return VERR_INVALID_STATE;
1667
1668 /*
1669 * See vdmaVBVACtlDisableSync().
1670 */
1671 case VBVAEXHOSTCTL_TYPE_GHH_DISABLE:
1672 rc = vdmaVBVADisableProcess(pVdma, true /* fDoHgcmEnable */);
1673 if (RT_SUCCESS(rc))
1674 rc = VBoxVDMAThreadTerm(&pVdma->Thread, NULL, NULL, false /* fNotify */ );
1675 else
1676 WARN(("vdmaVBVADisableProcess failed %Rrc\n", rc));
1677 return rc;
1678
1679 /*
1680 * See vboxVDMACrHgcmNotifyTerminatingCb().
1681 */
1682 case VBVAEXHOSTCTL_TYPE_HH_ON_HGCM_UNLOAD:
1683 rc = vdmaVBVADisableProcess(pVdma, false /* fDoHgcmEnable */);
1684 if (RT_SUCCESS(rc))
1685 {
1686 rc = VBoxVDMAThreadTerm(&pVdma->Thread, NULL, NULL, true /* fNotify */);
1687 if (RT_SUCCESS(rc))
1688 *pfContinue = false;
1689 else
1690 WARN(("VBoxVDMAThreadTerm failed %Rrc\n", rc));
1691 }
1692 else
1693 WARN(("vdmaVBVADisableProcess failed %Rrc\n", rc));
1694 return rc;
1695
1696 /*
1697 * See vboxVDMASaveStateExecPerform().
1698 */
1699 case VBVAEXHOSTCTL_TYPE_HH_SAVESTATE:
1700 rc = VBoxVBVAExHSSaveState(&pVdma->CmdVbva, pVdma->pVGAState->vram_ptrR3, pCmd->u.state.pSSM);
1701 if (RT_SUCCESS(rc))
1702 {
1703 VGA_SAVED_STATE_PUT_MARKER(pCmd->u.state.pSSM, 4);
1704 if (pVdma->CrSrvInfo.pfnSaveState)
1705 rc = pVdma->CrSrvInfo.pfnSaveState(pVdma->CrSrvInfo.hSvr, pCmd->u.state.pSSM);
1706 }
1707 else
1708 WARN(("VBoxVBVAExHSSaveState failed %Rrc\n", rc));
1709 return rc;
1710
1711 /*
1712 * See vboxVDMASaveLoadExecPerform().
1713 */
1714 case VBVAEXHOSTCTL_TYPE_HH_LOADSTATE:
1715 rc = VBoxVBVAExHSLoadState(&pVdma->CmdVbva, pVdma->pVGAState->vram_ptrR3, pCmd->u.state.pSSM, pCmd->u.state.u32Version);
1716 if (RT_SUCCESS(rc))
1717 {
1718 VGA_SAVED_STATE_GET_MARKER_RETURN_ON_MISMATCH(pCmd->u.state.pSSM, pCmd->u.state.u32Version, 4);
1719 if (pVdma->CrSrvInfo.pfnLoadState)
1720 {
1721 rc = pVdma->CrSrvInfo.pfnLoadState(pVdma->CrSrvInfo.hSvr, pCmd->u.state.pSSM, pCmd->u.state.u32Version);
1722 if (RT_FAILURE(rc))
1723 WARN(("pfnLoadState failed %Rrc\n", rc));
1724 }
1725 }
1726 else
1727 WARN(("VBoxVBVAExHSLoadState failed %Rrc\n", rc));
1728 return rc;
1729
1730 /*
1731 * See vboxVDMASaveLoadDone().
1732 */
1733 case VBVAEXHOSTCTL_TYPE_HH_LOADSTATE_DONE:
1734 {
1735 PVGASTATE pVGAState = pVdma->pVGAState;
1736 for (uint32_t i = 0; i < pVGAState->cMonitors; ++i)
1737 {
1738 VBVAINFOSCREEN CurScreen;
1739 VBVAINFOVIEW CurView;
1740 rc = VBVAGetInfoViewAndScreen(pVGAState, i, &CurView, &CurScreen);
1741 AssertLogRelMsgRCReturn(rc, ("VBVAGetInfoViewAndScreen [screen #%u] -> %#x\n", i, rc), rc);
1742
1743 rc = VBVAInfoScreen(pVGAState, &CurScreen);
1744 AssertLogRelMsgRCReturn(rc, ("VBVAInfoScreen [screen #%u] -> %#x\n", i, rc), rc);
1745 }
1746
1747 return VINF_SUCCESS;
1748 }
1749
1750 default:
1751 WARN(("unexpected host ctl type %d\n", pCmd->enmType));
1752 return VERR_INVALID_PARAMETER;
1753 }
1754}
1755
1756/**
1757 * Worker for vboxVDMACrGuestCtlResizeEntryProcess.
1758 *
1759 * @returns VINF_SUCCESS or VERR_INVALID_PARAMETER.
1760 * @param pVGAState The VGA device state.
1761 * @param pScreen The screen info (safe copy).
1762 */
1763static int vboxVDMASetupScreenInfo(PVGASTATE pVGAState, VBVAINFOSCREEN *pScreen)
1764{
1765 const uint32_t idxView = pScreen->u32ViewIndex;
1766 const uint16_t fFlags = pScreen->u16Flags;
1767
1768 if (fFlags & VBVA_SCREEN_F_DISABLED)
1769 {
1770 if ( idxView < pVGAState->cMonitors
1771 || idxView == UINT32_C(0xFFFFFFFF))
1772 {
1773 RT_ZERO(*pScreen);
1774 pScreen->u32ViewIndex = idxView;
1775 pScreen->u16Flags = VBVA_SCREEN_F_ACTIVE | VBVA_SCREEN_F_DISABLED;
1776 return VINF_SUCCESS;
1777 }
1778 }
1779 else
1780 {
1781 if (fFlags & VBVA_SCREEN_F_BLANK2)
1782 {
1783 if ( idxView >= pVGAState->cMonitors
1784 && idxView != UINT32_C(0xFFFFFFFF))
1785 return VERR_INVALID_PARAMETER;
1786
1787 /* Special case for blanking using current video mode.
1788 * Only 'u16Flags' and 'u32ViewIndex' field are relevant.
1789 */
1790 RT_ZERO(*pScreen);
1791 pScreen->u32ViewIndex = idxView;
1792 pScreen->u16Flags = fFlags;
1793 return VINF_SUCCESS;
1794 }
1795
1796 if ( idxView < pVGAState->cMonitors
1797 && pScreen->u16BitsPerPixel <= 32
1798 && pScreen->u32Width <= UINT16_MAX
1799 && pScreen->u32Height <= UINT16_MAX
1800 && pScreen->u32LineSize <= UINT16_MAX * 4)
1801 {
1802 const uint32_t u32BytesPerPixel = (pScreen->u16BitsPerPixel + 7) / 8;
1803 if (pScreen->u32Width <= pScreen->u32LineSize / (u32BytesPerPixel? u32BytesPerPixel: 1))
1804 {
1805 const uint64_t u64ScreenSize = (uint64_t)pScreen->u32LineSize * pScreen->u32Height;
1806 if ( pScreen->u32StartOffset <= pVGAState->vram_size
1807 && u64ScreenSize <= pVGAState->vram_size
1808 && pScreen->u32StartOffset <= pVGAState->vram_size - (uint32_t)u64ScreenSize)
1809 return VINF_SUCCESS;
1810 }
1811 }
1812 }
1813
1814 LogFunc(("Failed\n"));
1815 return VERR_INVALID_PARAMETER;
1816}
1817
1818/**
1819 * Handles on entry in a VBVAEXHOSTCTL_TYPE_GHH_RESIZE command.
1820 *
1821 * @returns IPRT status code.
1822 * @param pVdma The VDMA channel
1823 * @param pEntry The entry to handle. Considered volatile.
1824 *
1825 * @thread VDMA
1826 */
1827static int vboxVDMACrGuestCtlResizeEntryProcess(struct VBOXVDMAHOST *pVdma, VBOXCMDVBVA_RESIZE_ENTRY *pEntry)
1828{
1829 PVGASTATE pVGAState = pVdma->pVGAState;
1830 VBVAINFOSCREEN Screen = pEntry->Screen;
1831
1832 /* Verify and cleanup local copy of the input data. */
1833 int rc = vboxVDMASetupScreenInfo(pVGAState, &Screen);
1834 if (RT_FAILURE(rc))
1835 {
1836 WARN(("invalid screen data\n"));
1837 return rc;
1838 }
1839
1840 VBOXCMDVBVA_SCREENMAP_DECL(uint32_t, aTargetMap);
1841 memcpy(aTargetMap, pEntry->aTargetMap, sizeof(aTargetMap));
1842 ASMBitClearRange(aTargetMap, pVGAState->cMonitors, VBOX_VIDEO_MAX_SCREENS);
1843
1844 if (pVdma->CrSrvInfo.pfnResize)
1845 {
1846 /* Also inform the HGCM service, if it is there. */
1847 rc = pVdma->CrSrvInfo.pfnResize(pVdma->CrSrvInfo.hSvr, &Screen, aTargetMap);
1848 if (RT_FAILURE(rc))
1849 {
1850 WARN(("pfnResize failed %Rrc\n", rc));
1851 return rc;
1852 }
1853 }
1854
1855 /* A fake view which contains the current screen for the 2D VBVAInfoView. */
1856 VBVAINFOVIEW View;
1857 View.u32ViewOffset = 0;
1858 View.u32ViewSize = Screen.u32LineSize * Screen.u32Height + Screen.u32StartOffset;
1859 View.u32MaxScreenSize = Screen.u32LineSize * Screen.u32Height;
1860
1861 const bool fDisable = RT_BOOL(Screen.u16Flags & VBVA_SCREEN_F_DISABLED);
1862
1863 for (int i = ASMBitFirstSet(aTargetMap, pVGAState->cMonitors);
1864 i >= 0;
1865 i = ASMBitNextSet(aTargetMap, pVGAState->cMonitors, i))
1866 {
1867 Screen.u32ViewIndex = i;
1868
1869 VBVAINFOSCREEN CurScreen;
1870 VBVAINFOVIEW CurView;
1871
1872 rc = VBVAGetInfoViewAndScreen(pVGAState, i, &CurView, &CurScreen);
1873 AssertRC(rc);
1874
1875 if (!memcmp(&Screen, &CurScreen, sizeof (CurScreen)))
1876 continue;
1877
1878 /* The view does not change if _BLANK2 is set. */
1879 if ( (!fDisable || !CurView.u32ViewSize)
1880 && !RT_BOOL(Screen.u16Flags & VBVA_SCREEN_F_BLANK2))
1881 {
1882 View.u32ViewIndex = Screen.u32ViewIndex;
1883
1884 rc = VBVAInfoView(pVGAState, &View);
1885 if (RT_FAILURE(rc))
1886 {
1887 WARN(("VBVAInfoView failed %Rrc\n", rc));
1888 break;
1889 }
1890 }
1891
1892 rc = VBVAInfoScreen(pVGAState, &Screen);
1893 if (RT_FAILURE(rc))
1894 {
1895 WARN(("VBVAInfoScreen failed %Rrc\n", rc));
1896 break;
1897 }
1898 }
1899
1900 return rc;
1901}
1902
1903
1904/**
1905 * Processes VBVAEXHOST_DATA_TYPE_GUESTCTL for vboxVDMAWorkerThread and
1906 * vdmaVBVACtlThreadCreatedEnable.
1907 *
1908 * @returns VBox status code.
1909 * @param pVdma The VDMA channel.
1910 * @param pCmd The command to process. Maybe safe (not shared
1911 * with guest).
1912 *
1913 * @thread VDMA
1914 */
1915static int vboxVDMACrGuestCtlProcess(struct VBOXVDMAHOST *pVdma, VBVAEXHOSTCTL *pCmd)
1916{
1917 VBVAEXHOSTCTL_TYPE enmType = pCmd->enmType;
1918 switch (enmType)
1919 {
1920 /*
1921 * See handling of VBOXCMDVBVACTL_TYPE_3DCTL in vboxCmdVBVACmdCtl().
1922 */
1923 case VBVAEXHOSTCTL_TYPE_GHH_BE_OPAQUE:
1924 if (VBoxVBVAExHSIsEnabled(&pVdma->CmdVbva))
1925 {
1926 if (pVdma->CrSrvInfo.pfnGuestCtl)
1927 return pVdma->CrSrvInfo.pfnGuestCtl(pVdma->CrSrvInfo.hSvr, pCmd->u.cmd.pu8Cmd, pCmd->u.cmd.cbCmd);
1928
1929 /* Unexpected. */
1930 WARN(("VBVAEXHOSTCTL_TYPE_GHH_BE_OPAQUE in HGCM-less mode\n"));
1931 }
1932 else
1933 WARN(("VBVAEXHOSTCTL_TYPE_GHH_BE_OPAQUE for disabled vdma VBVA\n"));
1934 return VERR_INVALID_STATE;
1935
1936 /*
1937 * See handling of VBOXCMDVBVACTL_TYPE_RESIZE in vboxCmdVBVACmdCtl().
1938 */
1939 case VBVAEXHOSTCTL_TYPE_GHH_RESIZE:
1940 if (VBoxVBVAExHSIsEnabled(&pVdma->CmdVbva))
1941 {
1942 uint32_t cbCmd = pCmd->u.cmd.cbCmd;
1943 if ( !(cbCmd % sizeof(VBOXCMDVBVA_RESIZE_ENTRY))
1944 && cbCmd > 0)
1945 {
1946 uint32_t cElements = cbCmd / sizeof(VBOXCMDVBVA_RESIZE_ENTRY);
1947 VBOXCMDVBVA_RESIZE *pResize = (VBOXCMDVBVA_RESIZE *)pCmd->u.cmd.pu8Cmd;
1948 for (uint32_t i = 0; i < cElements; ++i)
1949 {
1950 VBOXCMDVBVA_RESIZE_ENTRY *pEntry = &pResize->aEntries[i];
1951 int rc = vboxVDMACrGuestCtlResizeEntryProcess(pVdma, pEntry);
1952 if (RT_FAILURE(rc))
1953 {
1954 WARN(("vboxVDMACrGuestCtlResizeEntryProcess failed %Rrc\n", rc));
1955 return rc;
1956 }
1957 }
1958 return VINF_SUCCESS;
1959 }
1960 else
1961 WARN(("invalid buffer size: cbCmd=%#x\n", cbCmd));
1962 return VERR_INVALID_PARAMETER;
1963 }
1964 WARN(("VBVAEXHOSTCTL_TYPE_GHH_RESIZE for disabled vdma VBVA\n"));
1965 return VERR_INVALID_STATE;
1966
1967 /*
1968 * See vdmaVBVACtlEnableSubmitInternal().
1969 */
1970 case VBVAEXHOSTCTL_TYPE_GHH_ENABLE:
1971 case VBVAEXHOSTCTL_TYPE_GHH_ENABLE_PAUSED:
1972 {
1973 VBVAENABLE *pEnable = (VBVAENABLE *)pCmd->u.cmd.pu8Cmd;
1974 Assert(pCmd->u.cmd.cbCmd == sizeof(VBVAENABLE));
1975
1976 uint32_t u32Offset = pEnable->u32Offset;
1977 int rc = vdmaVBVAEnableProcess(pVdma, u32Offset);
1978 if (RT_SUCCESS(rc))
1979 {
1980 if (enmType != VBVAEXHOSTCTL_TYPE_GHH_ENABLE_PAUSED)
1981 return VINF_SUCCESS;
1982
1983 rc = VBoxVBVAExHPPause(&pVdma->CmdVbva);
1984 if (RT_SUCCESS(rc))
1985 return VINF_SUCCESS;
1986 WARN(("VBoxVBVAExHPPause failed %Rrc\n", rc));
1987 }
1988 else
1989 WARN(("vdmaVBVAEnableProcess failed %Rrc\n", rc));
1990 return rc;
1991 }
1992
1993 /*
1994 * See vdmaVBVACtlDisableSubmitInternal().
1995 */
1996 case VBVAEXHOSTCTL_TYPE_GHH_DISABLE:
1997 {
1998 int rc = vdmaVBVADisableProcess(pVdma, true /* fDoHgcmEnable */);
1999 if (RT_FAILURE(rc))
2000 {
2001 WARN(("vdmaVBVADisableProcess failed %Rrc\n", rc));
2002 return rc;
2003 }
2004
2005 /* do vgaUpdateDisplayAll right away */
2006 VMR3ReqCallNoWait(PDMDevHlpGetVM(pVdma->pVGAState->pDevInsR3), VMCPUID_ANY,
2007 (PFNRT)vgaUpdateDisplayAll, 2, pVdma->pVGAState, /* fFailOnResize = */ false);
2008
2009 return VBoxVDMAThreadTerm(&pVdma->Thread, NULL, NULL, false /* fNotify */);
2010 }
2011
2012 default:
2013 WARN(("unexpected ctl type %Rrc\n", pCmd->enmType));
2014 return VERR_INVALID_PARAMETER;
2015 }
2016}
2017
2018
2019/**
2020 * Copies one page in a VBOXCMDVBVA_OPTYPE_PAGING_TRANSFER command.
2021 *
2022 * @param fIn - whether this is a page in or out op.
2023 * @thread VDMA
2024 *
2025 * the direction is VRA#M - related, so fIn == true - transfer to VRAM); false - transfer from VRAM
2026 */
2027static int vboxVDMACrCmdVbvaProcessPagingEl(PPDMDEVINS pDevIns, VBOXCMDVBVAPAGEIDX uPageNo, uint8_t *pbVram, bool fIn)
2028{
2029 RTGCPHYS GCPhysPage = (RTGCPHYS)uPageNo << X86_PAGE_SHIFT;
2030 PGMPAGEMAPLOCK Lock;
2031 int rc;
2032
2033 if (fIn)
2034 {
2035 const void *pvPage;
2036 rc = PDMDevHlpPhysGCPhys2CCPtrReadOnly(pDevIns, GCPhysPage, 0, &pvPage, &Lock);
2037 if (RT_SUCCESS(rc))
2038 {
2039 memcpy(pbVram, pvPage, PAGE_SIZE);
2040 PDMDevHlpPhysReleasePageMappingLock(pDevIns, &Lock);
2041 }
2042 else
2043 WARN(("PDMDevHlpPhysGCPhys2CCPtrReadOnly failed %Rrc", rc));
2044 }
2045 else
2046 {
2047 void *pvPage;
2048 rc = PDMDevHlpPhysGCPhys2CCPtr(pDevIns, GCPhysPage, 0, &pvPage, &Lock);
2049 if (RT_SUCCESS(rc))
2050 {
2051 memcpy(pvPage, pbVram, PAGE_SIZE);
2052 PDMDevHlpPhysReleasePageMappingLock(pDevIns, &Lock);
2053 }
2054 else
2055 WARN(("PDMDevHlpPhysGCPhys2CCPtr failed %Rrc", rc));
2056 }
2057
2058 return rc;
2059}
2060
2061/**
2062 * Handles a VBOXCMDVBVA_OPTYPE_PAGING_TRANSFER command.
2063 *
2064 * @return 0 on success, -1 on failure.
2065 *
2066 * @thread VDMA
2067 */
2068static int8_t vboxVDMACrCmdVbvaPageTransfer(PVGASTATE pVGAState, VBOXCMDVBVA_HDR const volatile *pHdr, uint32_t cbCmd,
2069 const VBOXCMDVBVA_PAGING_TRANSFER_DATA *pData)
2070{
2071 /*
2072 * Extract and validate information.
2073 */
2074 AssertMsgReturn(cbCmd >= sizeof(VBOXCMDVBVA_PAGING_TRANSFER), ("%#x\n", cbCmd), -1);
2075
2076 bool const fIn = RT_BOOL(pHdr->u8Flags & VBOXCMDVBVA_OPF_PAGING_TRANSFER_IN);
2077
2078 uint32_t cbPageNumbers = cbCmd - RT_OFFSETOF(VBOXCMDVBVA_PAGING_TRANSFER, Data.aPageNumbers);
2079 AssertMsgReturn(!(cbPageNumbers % sizeof(VBOXCMDVBVAPAGEIDX)), ("%#x\n", cbPageNumbers), -1);
2080 VBOXCMDVBVAPAGEIDX const cPages = cbPageNumbers / sizeof(VBOXCMDVBVAPAGEIDX);
2081
2082 VBOXCMDVBVAOFFSET offVRam = pData->Alloc.u.offVRAM;
2083 AssertMsgReturn(!(offVRam & X86_PAGE_OFFSET_MASK), ("%#x\n", offVRam), -1);
2084 AssertMsgReturn(offVRam < pVGAState->vram_size, ("%#x vs %#x\n", offVRam, pVGAState->vram_size), -1);
2085 uint32_t cVRamPages = (pVGAState->vram_size - offVRam) >> X86_PAGE_SHIFT;
2086 AssertMsgReturn(cPages <= cVRamPages, ("cPages=%#x vs cVRamPages=%#x @ offVRam=%#x\n", cPages, cVRamPages, offVRam), -1);
2087
2088 /*
2089 * Execute the command.
2090 */
2091 uint8_t *pbVRam = (uint8_t *)pVGAState->vram_ptrR3 + offVRam;
2092 for (uint32_t iPage = 0; iPage < cPages; iPage++, pbVRam += X86_PAGE_SIZE)
2093 {
2094 uint32_t uPageNo = pData->aPageNumbers[iPage];
2095 int rc = vboxVDMACrCmdVbvaProcessPagingEl(pVGAState->pDevInsR3, uPageNo, pbVRam, fIn);
2096 AssertMsgReturn(RT_SUCCESS(rc), ("#%#x: uPageNo=%#x rc=%Rrc\n", iPage, uPageNo, rc), -1);
2097 }
2098 return 0;
2099}
2100
2101
2102/**
2103 * Handles VBOXCMDVBVA_OPTYPE_PAGING_FILL.
2104 *
2105 * @returns 0 on success, -1 on failure.
2106 * @param pVGAState The VGA state.
2107 * @param pFill The fill command (volatile).
2108 *
2109 * @thread VDMA
2110 */
2111static int8_t vboxVDMACrCmdVbvaPagingFill(PVGASTATE pVGAState, VBOXCMDVBVA_PAGING_FILL *pFill)
2112{
2113 VBOXCMDVBVA_PAGING_FILL FillSafe = *pFill;
2114 VBOXCMDVBVAOFFSET offVRAM = FillSafe.offVRAM;
2115 if (!(offVRAM & X86_PAGE_OFFSET_MASK))
2116 {
2117 if (offVRAM <= pVGAState->vram_size)
2118 {
2119 uint32_t cbFill = FillSafe.u32CbFill;
2120 AssertStmt(!(cbFill & 3), cbFill &= ~(uint32_t)3);
2121
2122 if ( cbFill < pVGAState->vram_size
2123 && offVRAM <= pVGAState->vram_size - cbFill)
2124 {
2125 uint32_t *pu32Vram = (uint32_t *)((uint8_t *)pVGAState->vram_ptrR3 + offVRAM);
2126 uint32_t const u32Color = FillSafe.u32Pattern;
2127
2128 uint32_t cLoops = cbFill / 4;
2129 while (cLoops-- > 0)
2130 pu32Vram[cLoops] = u32Color;
2131
2132 return 0;
2133
2134 }
2135 else
2136 WARN(("invalid cbFill"));
2137
2138 }
2139 WARN(("invalid vram offset"));
2140
2141 }
2142 else
2143 WARN(("offVRAM address is not on page boundary\n"));
2144 return -1;
2145}
2146
2147/**
2148 * Process command data.
2149 *
2150 * @returns zero or positive is success, negative failure.
2151 * @param pVdma The VDMA channel.
2152 * @param pCmd The command data to process. Assume volatile.
2153 * @param cbCmd The amount of command data.
2154 *
2155 * @thread VDMA
2156 */
2157static int8_t vboxVDMACrCmdVbvaProcessCmdData(struct VBOXVDMAHOST *pVdma, const VBOXCMDVBVA_HDR *pCmd, uint32_t cbCmd)
2158{
2159 uint8_t bOpCode = pCmd->u8OpCode;
2160 switch (bOpCode)
2161 {
2162 case VBOXCMDVBVA_OPTYPE_NOPCMD:
2163 return 0;
2164
2165 case VBOXCMDVBVA_OPTYPE_PAGING_TRANSFER:
2166 return vboxVDMACrCmdVbvaPageTransfer(pVdma->pVGAState, pCmd, cbCmd, &((VBOXCMDVBVA_PAGING_TRANSFER *)pCmd)->Data);
2167
2168 case VBOXCMDVBVA_OPTYPE_PAGING_FILL:
2169 if (cbCmd == sizeof(VBOXCMDVBVA_PAGING_FILL))
2170 return vboxVDMACrCmdVbvaPagingFill(pVdma->pVGAState, (VBOXCMDVBVA_PAGING_FILL *)pCmd);
2171 WARN(("cmd too small"));
2172 return -1;
2173
2174 default:
2175 if (pVdma->CrSrvInfo.pfnCmd)
2176 return pVdma->CrSrvInfo.pfnCmd(pVdma->CrSrvInfo.hSvr, pCmd, cbCmd);
2177 /* Unexpected. */
2178 WARN(("no HGCM"));
2179 return -1;
2180 }
2181}
2182
2183# if 0
2184typedef struct VBOXCMDVBVA_PAGING_TRANSFER
2185{
2186 VBOXCMDVBVA_HDR Hdr;
2187 /* for now can only contain offVRAM.
2188 * paging transfer can NOT be initiated for allocations having host 3D object (hostID) associated */
2189 VBOXCMDVBVA_ALLOCINFO Alloc;
2190 uint32_t u32Reserved;
2191 VBOXCMDVBVA_SYSMEMEL aSysMem[1];
2192} VBOXCMDVBVA_PAGING_TRANSFER;
2193# endif
2194
2195AssertCompile(sizeof (VBOXCMDVBVA_HDR) == 8);
2196AssertCompile(sizeof (VBOXCMDVBVA_ALLOCINFO) == 4);
2197AssertCompile(sizeof (VBOXCMDVBVAPAGEIDX) == 4);
2198AssertCompile(!(X86_PAGE_SIZE % sizeof (VBOXCMDVBVAPAGEIDX)));
2199
2200# define VBOXCMDVBVA_NUM_SYSMEMEL_PER_PAGE (X86_PAGE_SIZE / sizeof (VBOXCMDVBVA_SYSMEMEL))
2201
2202/**
2203 * Worker for vboxVDMACrCmdProcess.
2204 *
2205 * @returns 8-bit result.
2206 * @param pVdma The VDMA channel.
2207 * @param pCmd The command. Consider volatile!
2208 * @param cbCmd The size of what @a pCmd points to. At least
2209 * sizeof(VBOXCMDVBVA_HDR).
2210 * @param fRecursion Set if recursive call, false if not.
2211 *
2212 * @thread VDMA
2213 */
2214static int8_t vboxVDMACrCmdVbvaProcess(struct VBOXVDMAHOST *pVdma, const VBOXCMDVBVA_HDR *pCmd, uint32_t cbCmd, bool fRecursion)
2215{
2216 int8_t i8Result = 0;
2217 uint8_t const bOpCode = pCmd->u8OpCode;
2218 LogRelFlow(("VDMA: vboxVDMACrCmdVbvaProcess: ENTER, bOpCode=%u\n", bOpCode));
2219 switch (bOpCode)
2220 {
2221 case VBOXCMDVBVA_OPTYPE_SYSMEMCMD:
2222 {
2223 /*
2224 * Extract the command physical address and size.
2225 */
2226 AssertMsgReturn(cbCmd >= sizeof(VBOXCMDVBVA_SYSMEMCMD), ("%#x\n", cbCmd), -1);
2227 RTGCPHYS GCPhysCmd = ((VBOXCMDVBVA_SYSMEMCMD *)pCmd)->phCmd;
2228 uint32_t cbCmdPart = X86_PAGE_SIZE - (uint32_t)(GCPhysCmd & X86_PAGE_OFFSET_MASK);
2229
2230 uint32_t cbRealCmd = pCmd->u8Flags;
2231 cbRealCmd |= (uint32_t)pCmd->u.u8PrimaryID << 8;
2232 AssertMsgReturn(cbRealCmd >= sizeof(VBOXCMDVBVA_HDR), ("%#x\n", cbRealCmd), -1);
2233 AssertMsgReturn(cbRealCmd <= _1M, ("%#x\n", cbRealCmd), -1);
2234
2235 /*
2236 * Lock down the first page of the memory specified by the command.
2237 */
2238 PGMPAGEMAPLOCK Lock;
2239 PVGASTATE pVGAState = pVdma->pVGAState;
2240 PPDMDEVINS pDevIns = pVGAState->pDevInsR3;
2241 VBOXCMDVBVA_HDR const *pRealCmdHdr = NULL;
2242 int rc = PDMDevHlpPhysGCPhys2CCPtrReadOnly(pDevIns, GCPhysCmd, 0, (const void **)&pRealCmdHdr, &Lock);
2243 if (!RT_SUCCESS(rc))
2244 {
2245 WARN(("PDMDevHlpPhysGCPhys2CCPtrReadOnly failed %Rrc\n", rc));
2246 return -1;
2247 }
2248 Assert((GCPhysCmd & PAGE_OFFSET_MASK) == (((uintptr_t)pRealCmdHdr) & PAGE_OFFSET_MASK));
2249
2250 /*
2251 * All fits within one page? We can handle that pretty efficiently.
2252 */
2253 if (cbRealCmd <= cbCmdPart)
2254 {
2255 i8Result = vboxVDMACrCmdVbvaProcessCmdData(pVdma, pRealCmdHdr, cbRealCmd);
2256 PDMDevHlpPhysReleasePageMappingLock(pDevIns, &Lock);
2257 }
2258 else
2259 {
2260 /*
2261 * To keep things damn simple, just double buffer cross page or
2262 * multipage requests.
2263 */
2264 uint8_t *pbCmdBuf = (uint8_t *)RTMemTmpAllocZ(RT_ALIGN_Z(cbRealCmd, 16));
2265 if (pbCmdBuf)
2266 {
2267 memcpy(pbCmdBuf, pRealCmdHdr, cbCmdPart);
2268 PDMDevHlpPhysReleasePageMappingLock(pDevIns, &Lock);
2269 pRealCmdHdr = NULL;
2270
2271 rc = PDMDevHlpPhysRead(pDevIns, GCPhysCmd + cbCmdPart, &pbCmdBuf[cbCmdPart], cbRealCmd - cbCmdPart);
2272 if (RT_SUCCESS(rc))
2273 i8Result = vboxVDMACrCmdVbvaProcessCmdData(pVdma, (VBOXCMDVBVA_HDR const *)pbCmdBuf, cbRealCmd);
2274 else
2275 LogRelMax(200, ("VDMA: Error reading %#x bytes of guest memory %#RGp!\n", cbRealCmd, GCPhysCmd));
2276 RTMemTmpFree(pbCmdBuf);
2277 }
2278 else
2279 {
2280 PDMDevHlpPhysReleasePageMappingLock(pDevIns, &Lock);
2281 LogRelMax(200, ("VDMA: Out of temporary memory! %#x\n", cbRealCmd));
2282 i8Result = -1;
2283 }
2284 }
2285 return i8Result;
2286 }
2287
2288 case VBOXCMDVBVA_OPTYPE_COMPLEXCMD:
2289 {
2290 Assert(cbCmd >= sizeof(VBOXCMDVBVA_HDR)); /* caller already checked this */
2291 AssertReturn(!fRecursion, -1);
2292
2293 /* Skip current command. */
2294 cbCmd -= sizeof(*pCmd);
2295 pCmd++;
2296
2297 /* Process subcommands. */
2298 while (cbCmd > 0)
2299 {
2300 AssertMsgReturn(cbCmd >= sizeof(VBOXCMDVBVA_HDR), ("%#x\n", cbCmd), -1);
2301
2302 uint16_t cbCurCmd = pCmd->u2.complexCmdEl.u16CbCmdHost;
2303 AssertMsgReturn(cbCurCmd <= cbCmd, ("cbCurCmd=%#x, cbCmd=%#x\n", cbCurCmd, cbCmd), -1);
2304
2305 i8Result = vboxVDMACrCmdVbvaProcess(pVdma, pCmd, cbCurCmd, true /*fRecursive*/);
2306 if (i8Result < 0)
2307 {
2308 WARN(("vboxVDMACrCmdVbvaProcess failed"));
2309 return i8Result;
2310 }
2311
2312 /* Advance to the next command. */
2313 pCmd = (VBOXCMDVBVA_HDR *)((uintptr_t)pCmd + cbCurCmd);
2314 cbCmd -= cbCurCmd;
2315 }
2316 return 0;
2317 }
2318
2319 default:
2320 i8Result = vboxVDMACrCmdVbvaProcessCmdData(pVdma, pCmd, cbCmd);
2321 LogRelFlow(("VDMA: vboxVDMACrCmdVbvaProcess: LEAVE, opCode(%i)\n", pCmd->u8OpCode));
2322 return i8Result;
2323 }
2324}
2325
2326/**
2327 * Worker for vboxVDMAWorkerThread handling VBVAEXHOST_DATA_TYPE_CMD.
2328 *
2329 * @thread VDMA
2330 */
2331static void vboxVDMACrCmdProcess(struct VBOXVDMAHOST *pVdma, uint8_t* pbCmd, uint32_t cbCmd)
2332{
2333 if ( cbCmd > 0
2334 && *pbCmd == VBOXCMDVBVA_OPTYPE_NOP)
2335 { /* nop */ }
2336 else if (cbCmd >= sizeof(VBOXCMDVBVA_HDR))
2337 {
2338 PVBOXCMDVBVA_HDR pCmd = (PVBOXCMDVBVA_HDR)pbCmd;
2339
2340 /* check if the command is cancelled */
2341 if (ASMAtomicCmpXchgU8(&pCmd->u8State, VBOXCMDVBVA_STATE_IN_PROGRESS, VBOXCMDVBVA_STATE_SUBMITTED))
2342 {
2343 /* Process it. */
2344 pCmd->u.i8Result = vboxVDMACrCmdVbvaProcess(pVdma, pCmd, cbCmd, false /*fRecursion*/);
2345 }
2346 else
2347 Assert(pCmd->u8State == VBOXCMDVBVA_STATE_CANCELLED);
2348 }
2349 else
2350 WARN(("invalid command size"));
2351
2352}
2353
2354/**
2355 * Worker for vboxVDMAConstruct().
2356 */
2357static int vboxVDMACrCtlHgsmiSetup(struct VBOXVDMAHOST *pVdma)
2358{
2359 PVBOXVDMACMD_CHROMIUM_CTL_CRHGSMI_SETUP pCmd;
2360 pCmd = (PVBOXVDMACMD_CHROMIUM_CTL_CRHGSMI_SETUP)vboxVDMACrCtlCreate(VBOXVDMACMD_CHROMIUM_CTL_TYPE_CRHGSMI_SETUP, sizeof(*pCmd));
2361 int rc;
2362 if (pCmd)
2363 {
2364 PVGASTATE pVGAState = pVdma->pVGAState;
2365 pCmd->pvVRamBase = pVGAState->vram_ptrR3;
2366 pCmd->cbVRam = pVGAState->vram_size;
2367 pCmd->pLed = &pVGAState->Led3D;
2368 pCmd->CrClientInfo.hClient = pVdma;
2369 pCmd->CrClientInfo.pfnCallout = vboxCmdVBVACmdCallout;
2370 rc = vboxVDMACrCtlPost(pVGAState, &pCmd->Hdr, sizeof (*pCmd));
2371 if (RT_SUCCESS(rc))
2372 {
2373 rc = vboxVDMACrCtlGetRc(&pCmd->Hdr);
2374 if (RT_SUCCESS(rc))
2375 pVdma->CrSrvInfo = pCmd->CrCmdServerInfo;
2376 else if (rc != VERR_NOT_SUPPORTED)
2377 WARN(("vboxVDMACrCtlGetRc returned %Rrc\n", rc));
2378 }
2379 else
2380 WARN(("vboxVDMACrCtlPost failed %Rrc\n", rc));
2381
2382 vboxVDMACrCtlRelease(&pCmd->Hdr);
2383 }
2384 else
2385 rc = VERR_NO_MEMORY;
2386
2387 if (!RT_SUCCESS(rc))
2388 memset(&pVdma->CrSrvInfo, 0, sizeof (pVdma->CrSrvInfo));
2389
2390 return rc;
2391}
2392
2393/**
2394 * Check if this is an external command to be passed to the chromium backend.
2395 *
2396 * @retval VINF_NOT_SUPPORTED if not chromium command.
2397 *
2398 * @note cbCmdDr is at least sizeof(VBOXVDMACBUF_DR).
2399 */
2400static int vboxVDMACmdCheckCrCmd(struct VBOXVDMAHOST *pVdma, PVBOXVDMACBUF_DR pCmdDr, uint32_t cbCmdDr)
2401{
2402 uint32_t cbDmaCmd = 0;
2403 uint8_t *pbRam = pVdma->pVGAState->vram_ptrR3;
2404 int rc = VINF_NOT_SUPPORTED;
2405
2406 cbDmaCmd = pCmdDr->cbBuf;
2407
2408 PVBOXVDMACMD pDmaCmd;
2409 if (pCmdDr->fFlags & VBOXVDMACBUF_FLAG_BUF_FOLLOWS_DR)
2410 {
2411 AssertReturn(cbCmdDr >= sizeof(*pCmdDr) + VBOXVDMACMD_HEADER_SIZE(), VERR_INVALID_PARAMETER);
2412 AssertReturn(cbDmaCmd >= cbCmdDr - sizeof(*pCmdDr) - VBOXVDMACMD_HEADER_SIZE(), VERR_INVALID_PARAMETER);
2413
2414 pDmaCmd = VBOXVDMACBUF_DR_TAIL(pCmdDr, VBOXVDMACMD);
2415 }
2416 else if (pCmdDr->fFlags & VBOXVDMACBUF_FLAG_BUF_VRAM_OFFSET)
2417 {
2418 VBOXVIDEOOFFSET offBuf = pCmdDr->Location.offVramBuf;
2419 AssertReturn( cbDmaCmd <= pVdma->pVGAState->vram_size
2420 && offBuf <= pVdma->pVGAState->vram_size - cbDmaCmd, VERR_INVALID_PARAMETER);
2421 pDmaCmd = (VBOXVDMACMD *)(pbRam + offBuf);
2422 }
2423 else
2424 pDmaCmd = NULL;
2425 if (pDmaCmd)
2426 {
2427 Assert(cbDmaCmd >= VBOXVDMACMD_HEADER_SIZE());
2428 uint32_t cbBody = VBOXVDMACMD_BODY_SIZE(cbDmaCmd);
2429
2430 switch (pDmaCmd->enmType)
2431 {
2432 case VBOXVDMACMD_TYPE_CHROMIUM_CMD:
2433 {
2434 PVBOXVDMACMD_CHROMIUM_CMD pCrCmd = VBOXVDMACMD_BODY(pDmaCmd, VBOXVDMACMD_CHROMIUM_CMD);
2435 AssertReturn(cbBody >= sizeof(*pCrCmd), VERR_INVALID_PARAMETER);
2436
2437 PVGASTATE pVGAState = pVdma->pVGAState;
2438 rc = VINF_SUCCESS;
2439 if (pVGAState->pDrv->pfnCrHgsmiCommandProcess)
2440 {
2441 VBoxSHGSMICommandMarkAsynchCompletion(pCmdDr);
2442 pVGAState->pDrv->pfnCrHgsmiCommandProcess(pVGAState->pDrv, pCrCmd, cbBody);
2443 break;
2444 }
2445
2446 AssertFailed();
2447 int tmpRc = VBoxSHGSMICommandComplete(pVdma->pHgsmi, pCmdDr);
2448 AssertRC(tmpRc);
2449 break;
2450 }
2451
2452 case VBOXVDMACMD_TYPE_DMA_BPB_TRANSFER:
2453 {
2454 PVBOXVDMACMD_DMA_BPB_TRANSFER pTransfer = VBOXVDMACMD_BODY(pDmaCmd, VBOXVDMACMD_DMA_BPB_TRANSFER);
2455 AssertReturn(cbBody >= sizeof(*pTransfer), VERR_INVALID_PARAMETER);
2456
2457 rc = vboxVDMACmdExecBpbTransfer(pVdma, pTransfer, sizeof (*pTransfer));
2458 AssertRC(rc);
2459 if (RT_SUCCESS(rc))
2460 {
2461 pCmdDr->rc = VINF_SUCCESS;
2462 rc = VBoxSHGSMICommandComplete(pVdma->pHgsmi, pCmdDr);
2463 AssertRC(rc);
2464 rc = VINF_SUCCESS;
2465 }
2466 break;
2467 }
2468
2469 default:
2470 break;
2471 }
2472 }
2473 return rc;
2474}
2475
2476/**
2477 * @interface_method_impl{PDMIDISPLAYVBVACALLBACKS,pfnCrHgsmiControlCompleteAsync,
2478 * Some indirect completion magic, you gotta love this code! }
2479 */
2480DECLCALLBACK(int) vboxVDMACrHgsmiCommandCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface, PVBOXVDMACMD_CHROMIUM_CMD pCmd, int rc)
2481{
2482 PVGASTATE pVGAState = PPDMIDISPLAYVBVACALLBACKS_2_PVGASTATE(pInterface);
2483 PHGSMIINSTANCE pIns = pVGAState->pHGSMI;
2484 VBOXVDMACMD *pDmaHdr = VBOXVDMACMD_FROM_BODY(pCmd);
2485 VBOXVDMACBUF_DR *pDr = VBOXVDMACBUF_DR_FROM_TAIL(pDmaHdr);
2486
2487 AssertRC(rc);
2488 pDr->rc = rc;
2489
2490 Assert(pVGAState->fGuestCaps & VBVACAPS_COMPLETEGCMD_BY_IOREAD);
2491 rc = VBoxSHGSMICommandComplete(pIns, pDr);
2492 AssertRC(rc);
2493
2494 return rc;
2495}
2496
2497/**
2498 * Worker for vboxVDMACmdExecBlt().
2499 */
2500static int vboxVDMACmdExecBltPerform(PVBOXVDMAHOST pVdma, const VBOXVIDEOOFFSET offDst, const VBOXVIDEOOFFSET offSrc,
2501 const PVBOXVDMA_SURF_DESC pDstDesc, const PVBOXVDMA_SURF_DESC pSrcDesc,
2502 const VBOXVDMA_RECTL *pDstRectl, const VBOXVDMA_RECTL *pSrcRectl)
2503{
2504 /*
2505 * We do not support color conversion.
2506 */
2507 AssertReturn(pDstDesc->format == pSrcDesc->format, VERR_INVALID_FUNCTION);
2508
2509 /* we do not support stretching (checked by caller) */
2510 Assert(pDstRectl->height == pSrcRectl->height);
2511 Assert(pDstRectl->width == pSrcRectl->width);
2512
2513 uint8_t *pbRam = pVdma->pVGAState->vram_ptrR3;
2514 AssertCompileSize(pVdma->pVGAState->vram_size, sizeof(uint32_t));
2515 uint32_t cbVRamSize = pVdma->pVGAState->vram_size;
2516 uint8_t *pbDstSurf = pbRam + offDst;
2517 uint8_t *pbSrcSurf = pbRam + offSrc;
2518
2519 if ( pDstDesc->width == pDstRectl->width
2520 && pSrcDesc->width == pSrcRectl->width
2521 && pSrcDesc->width == pDstDesc->width
2522 && pSrcDesc->pitch == pDstDesc->pitch)
2523 {
2524 Assert(!pDstRectl->left);
2525 Assert(!pSrcRectl->left);
2526 uint32_t offBoth = pDstDesc->pitch * pDstRectl->top;
2527 uint32_t cbToCopy = pDstDesc->pitch * pDstRectl->height;
2528
2529 if ( cbToCopy <= cbVRamSize
2530 && (uintptr_t)(pbDstSurf + offBoth) - (uintptr_t)pbRam <= cbVRamSize - cbToCopy
2531 && (uintptr_t)(pbSrcSurf + offBoth) - (uintptr_t)pbRam <= cbVRamSize - cbToCopy)
2532 memcpy(pbDstSurf + offBoth, pbSrcSurf + offBoth, cbToCopy);
2533 else
2534 return VERR_INVALID_PARAMETER;
2535 }
2536 else
2537 {
2538 uint32_t offDstLineStart = pDstRectl->left * pDstDesc->bpp >> 3;
2539 uint32_t offDstLineEnd = ((pDstRectl->left * pDstDesc->bpp + 7) >> 3) + ((pDstDesc->bpp * pDstRectl->width + 7) >> 3);
2540 uint32_t cbDstLine = offDstLineEnd - offDstLineStart;
2541 uint32_t offDstStart = pDstDesc->pitch * pDstRectl->top + offDstLineStart;
2542 Assert(cbDstLine <= pDstDesc->pitch);
2543 uint32_t cbDstSkip = pDstDesc->pitch;
2544 uint8_t *pbDstStart = pbDstSurf + offDstStart;
2545
2546 uint32_t offSrcLineStart = pSrcRectl->left * pSrcDesc->bpp >> 3;
2547# ifdef VBOX_STRICT
2548 uint32_t offSrcLineEnd = ((pSrcRectl->left * pSrcDesc->bpp + 7) >> 3) + ((pSrcDesc->bpp * pSrcRectl->width + 7) >> 3);
2549 uint32_t cbSrcLine = offSrcLineEnd - offSrcLineStart;
2550# endif
2551 uint32_t offSrcStart = pSrcDesc->pitch * pSrcRectl->top + offSrcLineStart;
2552 Assert(cbSrcLine <= pSrcDesc->pitch);
2553 uint32_t cbSrcSkip = pSrcDesc->pitch;
2554 const uint8_t *pbSrcStart = pbSrcSurf + offSrcStart;
2555
2556 Assert(cbDstLine == cbSrcLine);
2557
2558 for (uint32_t i = 0; ; ++i)
2559 {
2560 if ( cbDstLine <= cbVRamSize
2561 && (uintptr_t)pbSrcStart - (uintptr_t)pbRam <= cbVRamSize - cbDstLine
2562 && (uintptr_t)pbSrcStart - (uintptr_t)pbRam <= cbVRamSize - cbDstLine)
2563 memcpy(pbDstStart, pbSrcStart, cbDstLine);
2564 else
2565 return VERR_INVALID_PARAMETER;
2566 if (i == pDstRectl->height)
2567 break;
2568 pbDstStart += cbDstSkip;
2569 pbSrcStart += cbSrcSkip;
2570 }
2571 }
2572 return VINF_SUCCESS;
2573}
2574
2575#if 0 /* unused */
2576static void vboxVDMARectlUnite(VBOXVDMA_RECTL * pRectl1, const VBOXVDMA_RECTL * pRectl2)
2577{
2578 if (!pRectl1->width)
2579 *pRectl1 = *pRectl2;
2580 else
2581 {
2582 int16_t x21 = pRectl1->left + pRectl1->width;
2583 int16_t x22 = pRectl2->left + pRectl2->width;
2584 if (pRectl1->left > pRectl2->left)
2585 {
2586 pRectl1->left = pRectl2->left;
2587 pRectl1->width = x21 < x22 ? x22 - pRectl1->left : x21 - pRectl1->left;
2588 }
2589 else if (x21 < x22)
2590 pRectl1->width = x22 - pRectl1->left;
2591
2592 x21 = pRectl1->top + pRectl1->height;
2593 x22 = pRectl2->top + pRectl2->height;
2594 if (pRectl1->top > pRectl2->top)
2595 {
2596 pRectl1->top = pRectl2->top;
2597 pRectl1->height = x21 < x22 ? x22 - pRectl1->top : x21 - pRectl1->top;
2598 }
2599 else if (x21 < x22)
2600 pRectl1->height = x22 - pRectl1->top;
2601 }
2602}
2603#endif /* unused */
2604
2605/**
2606 * Handles VBOXVDMACMD_TYPE_DMA_PRESENT_BLT for vboxVDMACmdExec().
2607 *
2608 * @returns number of bytes (positive) of the full command on success,
2609 * otherwise a negative error status (VERR_XXX).
2610 *
2611 * @param pVdma The VDMA channel.
2612 * @param pBlt Blit command buffer. This is to be considered
2613 * volatile!
2614 * @param cbBuffer Number of bytes accessible at @a pBtl.
2615 */
2616static int vboxVDMACmdExecBlt(PVBOXVDMAHOST pVdma, const PVBOXVDMACMD_DMA_PRESENT_BLT pBlt, uint32_t cbBuffer)
2617{
2618 /*
2619 * Validate and make a local copy of the blt command up to the rectangle array.
2620 */
2621 AssertReturn(cbBuffer >= RT_UOFFSETOF(VBOXVDMACMD_DMA_PRESENT_BLT, aDstSubRects), VERR_INVALID_PARAMETER);
2622 VBOXVDMACMD_DMA_PRESENT_BLT BltSafe;
2623 memcpy(&BltSafe, pBlt, RT_UOFFSETOF(VBOXVDMACMD_DMA_PRESENT_BLT, aDstSubRects));
2624
2625 AssertReturn(BltSafe.cDstSubRects < _8M, VERR_INVALID_PARAMETER);
2626 uint32_t const cbBlt = RT_UOFFSETOF(VBOXVDMACMD_DMA_PRESENT_BLT, aDstSubRects[BltSafe.cDstSubRects]);
2627 AssertReturn(cbBuffer >= cbBlt, VERR_INVALID_PARAMETER);
2628
2629
2630 /*
2631 * We do not support stretching.
2632 */
2633 AssertReturn(BltSafe.srcRectl.width == BltSafe.dstRectl.width, VERR_INVALID_FUNCTION);
2634 AssertReturn(BltSafe.srcRectl.height == BltSafe.dstRectl.height, VERR_INVALID_FUNCTION);
2635
2636 Assert(BltSafe.cDstSubRects);
2637
2638 //VBOXVDMA_RECTL updateRectl = {0, 0, 0, 0}; - pointless
2639
2640 if (BltSafe.cDstSubRects)
2641 {
2642 for (uint32_t i = 0; i < BltSafe.cDstSubRects; ++i)
2643 {
2644 VBOXVDMA_RECTL dstSubRectl = pBlt->aDstSubRects[i];
2645 VBOXVDMA_RECTL srcSubRectl = dstSubRectl;
2646
2647 dstSubRectl.left += BltSafe.dstRectl.left;
2648 dstSubRectl.top += BltSafe.dstRectl.top;
2649
2650 srcSubRectl.left += BltSafe.srcRectl.left;
2651 srcSubRectl.top += BltSafe.srcRectl.top;
2652
2653 int rc = vboxVDMACmdExecBltPerform(pVdma, BltSafe.offDst, BltSafe.offSrc, &BltSafe.dstDesc, &BltSafe.srcDesc,
2654 &dstSubRectl, &srcSubRectl);
2655 AssertRCReturn(rc, rc);
2656
2657 //vboxVDMARectlUnite(&updateRectl, &dstSubRectl); - pointless
2658 }
2659 }
2660 else
2661 {
2662 int rc = vboxVDMACmdExecBltPerform(pVdma, BltSafe.offDst, BltSafe.offSrc, &BltSafe.dstDesc, &BltSafe.srcDesc,
2663 &BltSafe.dstRectl, &BltSafe.srcRectl);
2664 AssertRCReturn(rc, rc);
2665
2666 //vboxVDMARectlUnite(&updateRectl, &BltSafe.dstRectl); - pointless
2667 }
2668
2669 return cbBlt;
2670}
2671
2672
2673/**
2674 * Handles VBOXVDMACMD_TYPE_DMA_BPB_TRANSFER for vboxVDMACmdCheckCrCmd() and
2675 * vboxVDMACmdExec().
2676 *
2677 * @returns number of bytes (positive) of the full command on success,
2678 * otherwise a negative error status (VERR_XXX).
2679 *
2680 * @param pVdma The VDMA channel.
2681 * @param pTransfer Transfer command buffer. This is to be considered
2682 * volatile!
2683 * @param cbBuffer Number of bytes accessible at @a pTransfer.
2684 */
2685static int vboxVDMACmdExecBpbTransfer(PVBOXVDMAHOST pVdma, const VBOXVDMACMD_DMA_BPB_TRANSFER *pTransfer, uint32_t cbBuffer)
2686{
2687 /*
2688 * Make a copy of the command (it's volatile).
2689 */
2690 AssertReturn(cbBuffer >= sizeof(*pTransfer), VERR_INVALID_PARAMETER);
2691 VBOXVDMACMD_DMA_BPB_TRANSFER const TransferSafeCopy = *pTransfer;
2692 pTransfer = &TransferSafeCopy;
2693
2694 PVGASTATE pVGAState = pVdma->pVGAState;
2695 PPDMDEVINS pDevIns = pVGAState->pDevInsR3;
2696 uint8_t *pbRam = pVGAState->vram_ptrR3;
2697 uint32_t cbTransfer = TransferSafeCopy.cbTransferSize;
2698
2699 /*
2700 * Validate VRAM offset.
2701 */
2702 if (TransferSafeCopy.fFlags & VBOXVDMACMD_DMA_BPB_TRANSFER_F_SRC_VRAMOFFSET)
2703 AssertReturn( cbTransfer <= pVGAState->vram_size
2704 && TransferSafeCopy.Src.offVramBuf <= pVGAState->vram_size - cbTransfer,
2705 VERR_INVALID_PARAMETER);
2706
2707 if (TransferSafeCopy.fFlags & VBOXVDMACMD_DMA_BPB_TRANSFER_F_DST_VRAMOFFSET)
2708 AssertReturn( cbTransfer <= pVGAState->vram_size
2709 && TransferSafeCopy.Dst.offVramBuf <= pVGAState->vram_size - cbTransfer,
2710 VERR_INVALID_PARAMETER);
2711
2712 /*
2713 * Transfer loop.
2714 */
2715 uint32_t cbTransfered = 0;
2716 int rc = VINF_SUCCESS;
2717 do
2718 {
2719 uint32_t cbSubTransfer = cbTransfer;
2720
2721 const void *pvSrc;
2722 bool fSrcLocked = false;
2723 PGMPAGEMAPLOCK SrcLock;
2724 if (TransferSafeCopy.fFlags & VBOXVDMACMD_DMA_BPB_TRANSFER_F_SRC_VRAMOFFSET)
2725 pvSrc = pbRam + TransferSafeCopy.Src.offVramBuf + cbTransfered;
2726 else
2727 {
2728 RTGCPHYS GCPhysSrcPage = TransferSafeCopy.Src.phBuf + cbTransfered;
2729 rc = PDMDevHlpPhysGCPhys2CCPtrReadOnly(pDevIns, GCPhysSrcPage, 0, &pvSrc, &SrcLock);
2730 AssertRC(rc);
2731 if (RT_SUCCESS(rc))
2732 {
2733 fSrcLocked = true;
2734 cbSubTransfer = RT_MIN(cbSubTransfer, X86_PAGE_SIZE - (uint32_t)(GCPhysSrcPage & X86_PAGE_OFFSET_MASK));
2735 }
2736 else
2737 break;
2738 }
2739
2740 void *pvDst;
2741 PGMPAGEMAPLOCK DstLock;
2742 bool fDstLocked = false;
2743 if (TransferSafeCopy.fFlags & VBOXVDMACMD_DMA_BPB_TRANSFER_F_DST_VRAMOFFSET)
2744 pvDst = pbRam + TransferSafeCopy.Dst.offVramBuf + cbTransfered;
2745 else
2746 {
2747 RTGCPHYS GCPhysDstPage = TransferSafeCopy.Dst.phBuf + cbTransfered;
2748 rc = PDMDevHlpPhysGCPhys2CCPtr(pDevIns, GCPhysDstPage, 0, &pvDst, &DstLock);
2749 AssertRC(rc);
2750 if (RT_SUCCESS(rc))
2751 {
2752 fDstLocked = true;
2753 cbSubTransfer = RT_MIN(cbSubTransfer, X86_PAGE_SIZE - (uint32_t)(GCPhysDstPage & X86_PAGE_OFFSET_MASK));
2754 }
2755 }
2756
2757 if (RT_SUCCESS(rc))
2758 {
2759 memcpy(pvDst, pvSrc, cbSubTransfer);
2760 cbTransfered += cbSubTransfer;
2761 cbTransfer -= cbSubTransfer;
2762 }
2763 else
2764 cbTransfer = 0; /* force break below */
2765
2766 if (fSrcLocked)
2767 PDMDevHlpPhysReleasePageMappingLock(pDevIns, &SrcLock);
2768 if (fDstLocked)
2769 PDMDevHlpPhysReleasePageMappingLock(pDevIns, &DstLock);
2770 } while (cbTransfer);
2771
2772 if (RT_SUCCESS(rc))
2773 return sizeof(TransferSafeCopy);
2774 return rc;
2775}
2776
2777/**
2778 * Worker for vboxVDMACommandProcess().
2779 *
2780 * @param pVdma Tthe VDMA channel.
2781 * @param pbBuffer Command buffer, considered volatile.
2782 * @param cbBuffer The number of bytes at @a pbBuffer.
2783 */
2784static int vboxVDMACmdExec(PVBOXVDMAHOST pVdma, const uint8_t *pbBuffer, uint32_t cbBuffer)
2785{
2786 AssertReturn(pbBuffer, VERR_INVALID_POINTER);
2787
2788 for (;;)
2789 {
2790 AssertReturn(cbBuffer >= VBOXVDMACMD_HEADER_SIZE(), VERR_INVALID_PARAMETER);
2791
2792 VBOXVDMACMD const *pCmd = (VBOXVDMACMD const *)pbBuffer;
2793 VBOXVDMACMD_TYPE enmCmdType = pCmd->enmType;
2794 int cbProcessed;
2795 switch (enmCmdType)
2796 {
2797 case VBOXVDMACMD_TYPE_CHROMIUM_CMD:
2798 {
2799# ifdef VBOXWDDM_TEST_UHGSMI
2800 static int count = 0;
2801 static uint64_t start, end;
2802 if (count==0)
2803 {
2804 start = RTTimeNanoTS();
2805 }
2806 ++count;
2807 if (count==100000)
2808 {
2809 end = RTTimeNanoTS();
2810 float ems = (end-start)/1000000.f;
2811 LogRel(("100000 calls took %i ms, %i cps\n", (int)ems, (int)(100000.f*1000.f/ems) ));
2812 }
2813# endif
2814 /** @todo post the buffer to chromium */
2815 return VINF_SUCCESS;
2816 }
2817
2818 case VBOXVDMACMD_TYPE_DMA_PRESENT_BLT:
2819 {
2820 const PVBOXVDMACMD_DMA_PRESENT_BLT pBlt = VBOXVDMACMD_BODY(pCmd, VBOXVDMACMD_DMA_PRESENT_BLT);
2821 cbProcessed = vboxVDMACmdExecBlt(pVdma, pBlt, cbBuffer - VBOXVDMACMD_HEADER_SIZE());
2822 Assert(cbProcessed >= 0);
2823 break;
2824 }
2825
2826 case VBOXVDMACMD_TYPE_DMA_BPB_TRANSFER:
2827 {
2828 const PVBOXVDMACMD_DMA_BPB_TRANSFER pTransfer = VBOXVDMACMD_BODY(pCmd, VBOXVDMACMD_DMA_BPB_TRANSFER);
2829 cbProcessed = vboxVDMACmdExecBpbTransfer(pVdma, pTransfer, cbBuffer - VBOXVDMACMD_HEADER_SIZE());
2830 Assert(cbProcessed >= 0);
2831 break;
2832 }
2833
2834 case VBOXVDMACMD_TYPE_DMA_NOP:
2835 return VINF_SUCCESS;
2836
2837 case VBOXVDMACMD_TYPE_CHILD_STATUS_IRQ:
2838 return VINF_SUCCESS;
2839
2840 default:
2841 AssertFailedReturn(VERR_INVALID_FUNCTION);
2842 }
2843
2844 /* Advance buffer or return. */
2845 if (cbProcessed >= 0)
2846 {
2847 Assert(cbProcessed > 0);
2848 cbProcessed += VBOXVDMACMD_HEADER_SIZE();
2849 if ((uint32_t)cbProcessed >= cbBuffer)
2850 {
2851 Assert((uint32_t)cbProcessed == cbBuffer);
2852 return VINF_SUCCESS;
2853 }
2854
2855 cbBuffer -= cbProcessed;
2856 pbBuffer += cbProcessed;
2857 }
2858 else
2859 return cbProcessed; /* error status */
2860
2861 }
2862}
2863
2864/**
2865 * VDMA worker thread procedure, see vdmaVBVACtlEnableSubmitInternal().
2866 *
2867 * @thread VDMA
2868 */
2869static DECLCALLBACK(int) vboxVDMAWorkerThread(RTTHREAD hThreadSelf, void *pvUser)
2870{
2871 RT_NOREF(hThreadSelf);
2872 PVBOXVDMAHOST pVdma = (PVBOXVDMAHOST)pvUser;
2873 PVGASTATE pVGAState = pVdma->pVGAState;
2874 VBVAEXHOSTCONTEXT *pCmdVbva = &pVdma->CmdVbva;
2875 int rc;
2876
2877 VBoxVDMAThreadNotifyConstructSucceeded(&pVdma->Thread, pvUser);
2878
2879 while (!VBoxVDMAThreadIsTerminating(&pVdma->Thread))
2880 {
2881 uint8_t *pbCmd = NULL;
2882 uint32_t cbCmd = 0;
2883 VBVAEXHOST_DATA_TYPE enmType = VBoxVBVAExHPDataGet(pCmdVbva, &pbCmd, &cbCmd);
2884 switch (enmType)
2885 {
2886 case VBVAEXHOST_DATA_TYPE_CMD:
2887 vboxVDMACrCmdProcess(pVdma, pbCmd, cbCmd);
2888 VBoxVBVAExHPDataCompleteCmd(pCmdVbva, cbCmd);
2889 VBVARaiseIrq(pVGAState, 0);
2890 break;
2891
2892 case VBVAEXHOST_DATA_TYPE_GUESTCTL:
2893 rc = vboxVDMACrGuestCtlProcess(pVdma, (VBVAEXHOSTCTL *)pbCmd);
2894 VBoxVBVAExHPDataCompleteCtl(pCmdVbva, (VBVAEXHOSTCTL *)pbCmd, rc);
2895 break;
2896
2897 case VBVAEXHOST_DATA_TYPE_HOSTCTL:
2898 {
2899 bool fContinue = true;
2900 rc = vboxVDMACrHostCtlProcess(pVdma, (VBVAEXHOSTCTL *)pbCmd, &fContinue);
2901 VBoxVBVAExHPDataCompleteCtl(pCmdVbva, (VBVAEXHOSTCTL *)pbCmd, rc);
2902 if (fContinue)
2903 break;
2904 }
2905 RT_FALL_THRU();
2906
2907 case VBVAEXHOST_DATA_TYPE_NO_DATA:
2908 rc = RTSemEventWaitNoResume(pVdma->Thread.hEvent, RT_INDEFINITE_WAIT);
2909 AssertMsg(RT_SUCCESS(rc) || rc == VERR_INTERRUPTED, ("%Rrc\n", rc));
2910 break;
2911
2912 default:
2913 WARN(("unexpected type %d\n", enmType));
2914 break;
2915 }
2916 }
2917
2918 VBoxVDMAThreadNotifyTerminatingSucceeded(&pVdma->Thread, pvUser);
2919
2920 return VINF_SUCCESS;
2921}
2922
2923/**
2924 * Worker for vboxVDMACommand.
2925 *
2926 * @param pCmd The command to process. Consider content volatile.
2927 * @param cbCmd Number of valid bytes at @a pCmd. This is at least
2928 * sizeof(VBOXVDMACBUF_DR).
2929 * @thread VDMA
2930 */
2931static void vboxVDMACommandProcess(PVBOXVDMAHOST pVdma, PVBOXVDMACBUF_DR pCmd, uint32_t cbCmd)
2932{
2933 PHGSMIINSTANCE pHgsmi = pVdma->pHgsmi;
2934 int rc;
2935
2936 do /* break loop */
2937 {
2938 /*
2939 * Get the command buffer (volatile).
2940 */
2941 uint16_t const cbCmdBuf = pCmd->cbBuf;
2942 const uint8_t *pbCmdBuf;
2943 PGMPAGEMAPLOCK Lock;
2944 bool bReleaseLocked = false;
2945 if (pCmd->fFlags & VBOXVDMACBUF_FLAG_BUF_FOLLOWS_DR)
2946 {
2947 pbCmdBuf = VBOXVDMACBUF_DR_TAIL(pCmd, const uint8_t);
2948 rc = VINF_SUCCESS;
2949 AssertBreakStmt((uintptr_t)&pbCmdBuf[cbCmdBuf] <= (uintptr_t)&((uint8_t *)pCmd)[cbCmd],
2950 rc = VERR_INVALID_PARAMETER);
2951 }
2952 else if (pCmd->fFlags & VBOXVDMACBUF_FLAG_BUF_VRAM_OFFSET)
2953 {
2954 uint64_t offVRam = pCmd->Location.offVramBuf;
2955 pbCmdBuf = (uint8_t const *)pVdma->pVGAState->vram_ptrR3 + offVRam;
2956 rc = VINF_SUCCESS;
2957 AssertBreakStmt( offVRam <= pVdma->pVGAState->vram_size
2958 && offVRam + cbCmdBuf <= pVdma->pVGAState->vram_size,
2959 rc = VERR_INVALID_PARAMETER);
2960 }
2961 else
2962 {
2963 /* Make sure it doesn't cross a page. */
2964 RTGCPHYS GCPhysBuf = pCmd->Location.phBuf;
2965 AssertBreakStmt((uint32_t)(GCPhysBuf & X86_PAGE_OFFSET_MASK) + cbCmdBuf <= (uint32_t)X86_PAGE_SIZE,
2966 rc = VERR_INVALID_PARAMETER);
2967
2968 rc = PDMDevHlpPhysGCPhys2CCPtrReadOnly(pVdma->pVGAState->pDevInsR3, GCPhysBuf, 0 /*fFlags*/,
2969 (const void **)&pbCmdBuf, &Lock);
2970 AssertRCBreak(rc); /* if (rc == VERR_PGM_PHYS_PAGE_RESERVED) -> fall back on using PGMPhysRead ?? */
2971 bReleaseLocked = true;
2972 }
2973
2974 /*
2975 * Process the command.
2976 */
2977 rc = vboxVDMACmdExec(pVdma, pbCmdBuf, cbCmdBuf);
2978 AssertRC(rc);
2979
2980 /* Clean up comand buffer. */
2981 if (bReleaseLocked)
2982 PDMDevHlpPhysReleasePageMappingLock(pVdma->pVGAState->pDevInsR3, &Lock);
2983
2984 } while (0);
2985
2986 /*
2987 * Complete the command.
2988 */
2989 pCmd->rc = rc;
2990 rc = VBoxSHGSMICommandComplete(pHgsmi, pCmd);
2991 AssertRC(rc);
2992}
2993
2994# if 0 /** @todo vboxVDMAControlProcess is unused */
2995static void vboxVDMAControlProcess(PVBOXVDMAHOST pVdma, PVBOXVDMA_CTL pCmd)
2996{
2997 PHGSMIINSTANCE pHgsmi = pVdma->pHgsmi;
2998 pCmd->i32Result = VINF_SUCCESS;
2999 int rc = VBoxSHGSMICommandComplete (pHgsmi, pCmd);
3000 AssertRC(rc);
3001}
3002# endif
3003
3004#endif /* VBOX_WITH_CRHGSMI */
3005#ifdef VBOX_VDMA_WITH_WATCHDOG
3006
3007/**
3008 * @callback_method_impl{TMTIMER, VDMA watchdog timer.}
3009 */
3010static DECLCALLBACK(void) vboxVDMAWatchDogTimer(PPDMDEVINS pDevIns, PTMTIMER pTimer, void *pvUser)
3011{
3012 VBOXVDMAHOST *pVdma = (VBOXVDMAHOST *)pvUser;
3013 PVGASTATE pVGAState = pVdma->pVGAState;
3014 VBVARaiseIrq(pVGAState, HGSMIHOSTFLAGS_WATCHDOG);
3015}
3016
3017/**
3018 * Handles VBOXVDMA_CTL_TYPE_WATCHDOG for vboxVDMAControl.
3019 */
3020static int vboxVDMAWatchDogCtl(struct VBOXVDMAHOST *pVdma, uint32_t cMillis)
3021{
3022 PPDMDEVINS pDevIns = pVdma->pVGAState->pDevInsR3;
3023 if (cMillis)
3024 TMTimerSetMillies(pVdma->WatchDogTimer, cMillis);
3025 else
3026 TMTimerStop(pVdma->WatchDogTimer);
3027 return VINF_SUCCESS;
3028}
3029
3030#endif /* VBOX_VDMA_WITH_WATCHDOG */
3031
3032/**
3033 * Called by vgaR3Construct() to initialize the state.
3034 *
3035 * @returns VBox status code.
3036 */
3037int vboxVDMAConstruct(PVGASTATE pVGAState, uint32_t cPipeElements)
3038{
3039 RT_NOREF(cPipeElements);
3040 int rc;
3041 PVBOXVDMAHOST pVdma = (PVBOXVDMAHOST)RTMemAllocZ(sizeof(*pVdma));
3042 Assert(pVdma);
3043 if (pVdma)
3044 {
3045 pVdma->pHgsmi = pVGAState->pHGSMI;
3046 pVdma->pVGAState = pVGAState;
3047
3048#ifdef VBOX_VDMA_WITH_WATCHDOG
3049 rc = PDMDevHlpTMTimerCreate(pVGAState->pDevInsR3, TMCLOCK_REAL, vboxVDMAWatchDogTimer,
3050 pVdma, TMTIMER_FLAGS_NO_CRIT_SECT,
3051 "VDMA WatchDog Timer", &pVdma->WatchDogTimer);
3052 AssertRC(rc);
3053#else
3054 rc = VINF_SUCCESS;
3055#endif
3056 if (RT_SUCCESS(rc))
3057 {
3058#ifdef VBOX_WITH_CRHGSMI
3059 VBoxVDMAThreadInit(&pVdma->Thread);
3060
3061 rc = RTSemEventMultiCreate(&pVdma->HostCrCtlCompleteEvent);
3062 if (RT_SUCCESS(rc))
3063 {
3064 rc = VBoxVBVAExHSInit(&pVdma->CmdVbva);
3065 if (RT_SUCCESS(rc))
3066 {
3067 rc = RTCritSectInit(&pVdma->CalloutCritSect);
3068 if (RT_SUCCESS(rc))
3069 {
3070#endif
3071 pVGAState->pVdma = pVdma;
3072
3073#ifdef VBOX_WITH_CRHGSMI
3074 /* No HGCM service if VMSVGA is enabled. */
3075 if (!pVGAState->fVMSVGAEnabled)
3076 {
3077 int rcIgnored = vboxVDMACrCtlHgsmiSetup(pVdma); NOREF(rcIgnored); /** @todo is this ignoring intentional? */
3078 }
3079#endif
3080 return VINF_SUCCESS;
3081
3082#ifdef VBOX_WITH_CRHGSMI
3083 }
3084
3085 WARN(("RTCritSectInit failed %Rrc\n", rc));
3086 VBoxVBVAExHSTerm(&pVdma->CmdVbva);
3087 }
3088 else
3089 WARN(("VBoxVBVAExHSInit failed %Rrc\n", rc));
3090 RTSemEventMultiDestroy(pVdma->HostCrCtlCompleteEvent);
3091 }
3092 else
3093 WARN(("RTSemEventMultiCreate failed %Rrc\n", rc));
3094#endif
3095 /* the timer is cleaned up automatically */
3096 }
3097 RTMemFree(pVdma);
3098 }
3099 else
3100 rc = VERR_OUT_OF_RESOURCES;
3101 return rc;
3102}
3103
3104/**
3105 * Called by vgaR3Reset() to do reset.
3106 */
3107void vboxVDMAReset(struct VBOXVDMAHOST *pVdma)
3108{
3109#ifdef VBOX_WITH_CRHGSMI
3110 vdmaVBVACtlDisableSync(pVdma);
3111#else
3112 RT_NOREF(pVdma);
3113#endif
3114}
3115
3116/**
3117 * Called by vgaR3Destruct() to do cleanup.
3118 */
3119void vboxVDMADestruct(struct VBOXVDMAHOST *pVdma)
3120{
3121 if (!pVdma)
3122 return;
3123#ifdef VBOX_WITH_CRHGSMI
3124 if (pVdma->pVGAState->fVMSVGAEnabled)
3125 VBoxVBVAExHSDisable(&pVdma->CmdVbva);
3126 else
3127 {
3128 /** @todo Remove. It does nothing because pVdma->CmdVbva is already disabled at this point
3129 * as the result of the SharedOpenGL HGCM service unloading.
3130 */
3131 vdmaVBVACtlDisableSync(pVdma);
3132 }
3133 VBoxVDMAThreadCleanup(&pVdma->Thread);
3134 VBoxVBVAExHSTerm(&pVdma->CmdVbva);
3135 RTSemEventMultiDestroy(pVdma->HostCrCtlCompleteEvent);
3136 RTCritSectDelete(&pVdma->CalloutCritSect);
3137#endif
3138 RTMemFree(pVdma);
3139}
3140
3141/**
3142 * Handle VBVA_VDMA_CTL, see vbvaChannelHandler
3143 *
3144 * @param pVdma The VDMA channel.
3145 * @param pCmd The control command to handle. Considered volatile.
3146 * @param cbCmd The size of the command. At least sizeof(VBOXVDMA_CTL).
3147 */
3148void vboxVDMAControl(struct VBOXVDMAHOST *pVdma, PVBOXVDMA_CTL pCmd, uint32_t cbCmd)
3149{
3150 RT_NOREF(cbCmd);
3151 PHGSMIINSTANCE pIns = pVdma->pHgsmi;
3152
3153 VBOXVDMA_CTL_TYPE enmCtl = pCmd->enmCtl;
3154 switch (enmCtl)
3155 {
3156 case VBOXVDMA_CTL_TYPE_ENABLE:
3157 pCmd->i32Result = VINF_SUCCESS;
3158 break;
3159 case VBOXVDMA_CTL_TYPE_DISABLE:
3160 pCmd->i32Result = VINF_SUCCESS;
3161 break;
3162 case VBOXVDMA_CTL_TYPE_FLUSH:
3163 pCmd->i32Result = VINF_SUCCESS;
3164 break;
3165#ifdef VBOX_VDMA_WITH_WATCHDOG
3166 case VBOXVDMA_CTL_TYPE_WATCHDOG:
3167 pCmd->i32Result = vboxVDMAWatchDogCtl(pVdma, pCmd->u32Offset);
3168 break;
3169#endif
3170 default:
3171 WARN(("cmd not supported"));
3172 pCmd->i32Result = VERR_NOT_SUPPORTED;
3173 break;
3174 }
3175
3176 int rc = VBoxSHGSMICommandComplete(pIns, pCmd);
3177 AssertRC(rc);
3178}
3179
3180/**
3181 * Handle VBVA_VDMA_CMD, see vbvaChannelHandler().
3182 *
3183 * @param pVdma The VDMA channel.
3184 * @param pCmd The command to handle. Considered volatile.
3185 * @param cbCmd The size of the command. At least sizeof(VBOXVDMACBUF_DR).
3186 */
3187void vboxVDMACommand(struct VBOXVDMAHOST *pVdma, PVBOXVDMACBUF_DR pCmd, uint32_t cbCmd)
3188{
3189#ifdef VBOX_WITH_CRHGSMI
3190 /* chromium commands are processed by crhomium hgcm thread independently from our internal cmd processing pipeline
3191 * this is why we process them specially */
3192 int rc = vboxVDMACmdCheckCrCmd(pVdma, pCmd, cbCmd);
3193 if (rc == VINF_SUCCESS)
3194 return;
3195
3196 if (RT_FAILURE(rc))
3197 {
3198 pCmd->rc = rc;
3199 rc = VBoxSHGSMICommandComplete(pVdma->pHgsmi, pCmd);
3200 AssertRC(rc);
3201 return;
3202 }
3203
3204 vboxVDMACommandProcess(pVdma, pCmd, cbCmd);
3205
3206#else
3207 RT_NOREF(cbCmd);
3208 pCmd->rc = VERR_NOT_IMPLEMENTED;
3209 int rc = VBoxSHGSMICommandComplete(pVdma->pHgsmi, pCmd);
3210 AssertRC(rc);
3211#endif
3212}
3213
3214#ifdef VBOX_WITH_CRHGSMI
3215
3216/**
3217 * @callback_method_impl{FNVBVAEXHOSTCTL_COMPLETE,
3218 * Used by vdmaVBVACtlEnableDisableSubmit() and vdmaVBVACtlEnableDisableSubmit() }
3219 */
3220static DECLCALLBACK(void) vboxCmdVBVACmdCtlGuestCompletion(VBVAEXHOSTCONTEXT *pVbva, struct VBVAEXHOSTCTL *pCtl,
3221 int rc, void *pvContext)
3222{
3223 PVBOXVDMAHOST pVdma = (PVBOXVDMAHOST)pvContext;
3224 VBOXCMDVBVA_CTL *pGCtl = (VBOXCMDVBVA_CTL*)(pCtl->u.cmd.pu8Cmd - sizeof (VBOXCMDVBVA_CTL));
3225 AssertRC(rc);
3226 pGCtl->i32Result = rc;
3227
3228 Assert(pVdma->pVGAState->fGuestCaps & VBVACAPS_COMPLETEGCMD_BY_IOREAD);
3229 rc = VBoxSHGSMICommandComplete(pVdma->pHgsmi, pGCtl);
3230 AssertRC(rc);
3231
3232 VBoxVBVAExHCtlFree(pVbva, pCtl);
3233}
3234
3235/**
3236 * Worker for vdmaVBVACtlGenericGuestSubmit() and vdmaVBVACtlOpaqueHostSubmit().
3237 */
3238static int vdmaVBVACtlGenericSubmit(PVBOXVDMAHOST pVdma, VBVAEXHOSTCTL_SOURCE enmSource, VBVAEXHOSTCTL_TYPE enmType,
3239 uint8_t* pu8Cmd, uint32_t cbCmd, PFNVBVAEXHOSTCTL_COMPLETE pfnComplete, void *pvComplete)
3240{
3241 int rc;
3242 VBVAEXHOSTCTL *pHCtl = VBoxVBVAExHCtlCreate(&pVdma->CmdVbva, enmType);
3243 if (pHCtl)
3244 {
3245 pHCtl->u.cmd.pu8Cmd = pu8Cmd;
3246 pHCtl->u.cmd.cbCmd = cbCmd;
3247 rc = vdmaVBVACtlSubmit(pVdma, pHCtl, enmSource, pfnComplete, pvComplete);
3248 if (RT_SUCCESS(rc))
3249 return VINF_SUCCESS;
3250
3251 VBoxVBVAExHCtlFree(&pVdma->CmdVbva, pHCtl);
3252 Log(("vdmaVBVACtlSubmit failed %Rrc\n", rc));
3253 }
3254 else
3255 {
3256 WARN(("VBoxVBVAExHCtlCreate failed\n"));
3257 rc = VERR_NO_MEMORY;
3258 }
3259 return rc;
3260}
3261
3262/**
3263 * Handler for vboxCmdVBVACmdCtl()/VBOXCMDVBVACTL_TYPE_3DCTL.
3264 */
3265static int vdmaVBVACtlGenericGuestSubmit(PVBOXVDMAHOST pVdma, VBVAEXHOSTCTL_TYPE enmType, VBOXCMDVBVA_CTL *pCtl, uint32_t cbCtl)
3266{
3267 Assert(cbCtl >= sizeof(VBOXCMDVBVA_CTL)); /* Checked by callers caller, vbvaChannelHandler(). */
3268
3269 VBoxSHGSMICommandMarkAsynchCompletion(pCtl);
3270 int rc = vdmaVBVACtlGenericSubmit(pVdma, VBVAEXHOSTCTL_SOURCE_GUEST, enmType, (uint8_t *)(pCtl + 1),
3271 cbCtl - sizeof(VBOXCMDVBVA_CTL), vboxCmdVBVACmdCtlGuestCompletion, pVdma);
3272 if (RT_SUCCESS(rc))
3273 return VINF_SUCCESS;
3274
3275 WARN(("vdmaVBVACtlGenericSubmit failed %Rrc\n", rc));
3276 pCtl->i32Result = rc;
3277 rc = VBoxSHGSMICommandComplete(pVdma->pHgsmi, pCtl);
3278 AssertRC(rc);
3279 return VINF_SUCCESS;
3280}
3281
3282/**
3283 * @callback_method_impl{FNVBVAEXHOSTCTL_COMPLETE, Used by vdmaVBVACtlOpaqueHostSubmit()}
3284 */
3285static DECLCALLBACK(void) vboxCmdVBVACmdCtlHostCompletion(VBVAEXHOSTCONTEXT *pVbva, struct VBVAEXHOSTCTL *pCtl,
3286 int rc, void *pvCompletion)
3287{
3288 VBOXCRCMDCTL* pVboxCtl = (VBOXCRCMDCTL*)pCtl->u.cmd.pu8Cmd;
3289 if (pVboxCtl->u.pfnInternal)
3290 ((PFNCRCTLCOMPLETION)pVboxCtl->u.pfnInternal)(pVboxCtl, pCtl->u.cmd.cbCmd, rc, pvCompletion);
3291 VBoxVBVAExHCtlFree(pVbva, pCtl);
3292}
3293
3294/**
3295 * Worker for vboxCmdVBVACmdHostCtl() and vboxCmdVBVACmdHostCtlSync().
3296 */
3297static int vdmaVBVACtlOpaqueHostSubmit(PVBOXVDMAHOST pVdma, struct VBOXCRCMDCTL* pCmd, uint32_t cbCmd,
3298 PFNCRCTLCOMPLETION pfnCompletion, void *pvCompletion)
3299{
3300 pCmd->u.pfnInternal = (PFNRT)pfnCompletion;
3301 int rc = vdmaVBVACtlGenericSubmit(pVdma, VBVAEXHOSTCTL_SOURCE_HOST, VBVAEXHOSTCTL_TYPE_GHH_BE_OPAQUE,
3302 (uint8_t *)pCmd, cbCmd, vboxCmdVBVACmdCtlHostCompletion, pvCompletion);
3303 if (RT_FAILURE(rc))
3304 {
3305 if (rc == VERR_INVALID_STATE)
3306 {
3307 pCmd->u.pfnInternal = NULL;
3308 PVGASTATE pVGAState = pVdma->pVGAState;
3309 rc = pVGAState->pDrv->pfnCrHgcmCtlSubmit(pVGAState->pDrv, pCmd, cbCmd, pfnCompletion, pvCompletion);
3310 if (!RT_SUCCESS(rc))
3311 WARN(("pfnCrHgsmiControlProcess failed %Rrc\n", rc));
3312
3313 return rc;
3314 }
3315 WARN(("vdmaVBVACtlGenericSubmit failed %Rrc\n", rc));
3316 return rc;
3317 }
3318
3319 return VINF_SUCCESS;
3320}
3321
3322/**
3323 * Called from vdmaVBVACtlThreadCreatedEnable().
3324 */
3325static int vdmaVBVANotifyEnable(PVGASTATE pVGAState)
3326{
3327 for (uint32_t i = 0; i < pVGAState->cMonitors; i++)
3328 {
3329 int rc = pVGAState->pDrv->pfnVBVAEnable (pVGAState->pDrv, i, NULL, true);
3330 if (!RT_SUCCESS(rc))
3331 {
3332 WARN(("pfnVBVAEnable failed %Rrc\n", rc));
3333 for (uint32_t j = 0; j < i; j++)
3334 {
3335 pVGAState->pDrv->pfnVBVADisable (pVGAState->pDrv, j);
3336 }
3337
3338 return rc;
3339 }
3340 }
3341 return VINF_SUCCESS;
3342}
3343
3344/**
3345 * Called from vdmaVBVACtlThreadCreatedEnable() and vdmaVBVADisableProcess().
3346 */
3347static int vdmaVBVANotifyDisable(PVGASTATE pVGAState)
3348{
3349 for (uint32_t i = 0; i < pVGAState->cMonitors; i++)
3350 pVGAState->pDrv->pfnVBVADisable(pVGAState->pDrv, i);
3351 return VINF_SUCCESS;
3352}
3353
3354/**
3355 * Hook that is called by vboxVDMAWorkerThread when it starts.
3356 *
3357 * @thread VDMA
3358 */
3359static DECLCALLBACK(void) vdmaVBVACtlThreadCreatedEnable(struct VBOXVDMATHREAD *pThread, int rc,
3360 void *pvThreadContext, void *pvContext)
3361{
3362 RT_NOREF(pThread);
3363 PVBOXVDMAHOST pVdma = (PVBOXVDMAHOST)pvThreadContext;
3364 VBVAEXHOSTCTL* pHCtl = (VBVAEXHOSTCTL*)pvContext;
3365
3366 if (RT_SUCCESS(rc))
3367 {
3368 rc = vboxVDMACrGuestCtlProcess(pVdma, pHCtl);
3369 /* rc == VINF_SUCCESS would mean the actual state change has occcured */
3370 if (rc == VINF_SUCCESS)
3371 {
3372 /* we need to inform Main about VBVA enable/disable
3373 * main expects notifications to be done from the main thread
3374 * submit it there */
3375 PVGASTATE pVGAState = pVdma->pVGAState;
3376
3377 if (VBoxVBVAExHSIsEnabled(&pVdma->CmdVbva))
3378 vdmaVBVANotifyEnable(pVGAState);
3379 else
3380 vdmaVBVANotifyDisable(pVGAState);
3381 }
3382 else if (RT_FAILURE(rc))
3383 WARN(("vboxVDMACrGuestCtlProcess failed %Rrc\n", rc));
3384 }
3385 else
3386 WARN(("vdmaVBVACtlThreadCreatedEnable is passed %Rrc\n", rc));
3387
3388 VBoxVBVAExHPDataCompleteCtl(&pVdma->CmdVbva, pHCtl, rc);
3389}
3390
3391/**
3392 * Worker for vdmaVBVACtlEnableDisableSubmitInternal() and vdmaVBVACtlEnableSubmitSync().
3393 */
3394static int vdmaVBVACtlEnableSubmitInternal(PVBOXVDMAHOST pVdma, VBVAENABLE *pEnable, bool fPaused, PFNVBVAEXHOSTCTL_COMPLETE pfnComplete, void *pvComplete)
3395{
3396 int rc;
3397 VBVAEXHOSTCTL *pHCtl = VBoxVBVAExHCtlCreate(&pVdma->CmdVbva,
3398 fPaused ? VBVAEXHOSTCTL_TYPE_GHH_ENABLE_PAUSED : VBVAEXHOSTCTL_TYPE_GHH_ENABLE);
3399 if (pHCtl)
3400 {
3401 pHCtl->u.cmd.pu8Cmd = (uint8_t *)pEnable;
3402 pHCtl->u.cmd.cbCmd = sizeof(*pEnable);
3403 pHCtl->pfnComplete = pfnComplete;
3404 pHCtl->pvComplete = pvComplete;
3405
3406 rc = VBoxVDMAThreadCreate(&pVdma->Thread, vboxVDMAWorkerThread, pVdma, vdmaVBVACtlThreadCreatedEnable, pHCtl);
3407 if (RT_SUCCESS(rc))
3408 return VINF_SUCCESS;
3409 WARN(("VBoxVDMAThreadCreate failed %d\n", rc));
3410
3411 VBoxVBVAExHCtlFree(&pVdma->CmdVbva, pHCtl);
3412 }
3413 else
3414 {
3415 WARN(("VBoxVBVAExHCtlCreate failed\n"));
3416 rc = VERR_NO_MEMORY;
3417 }
3418
3419 return rc;
3420}
3421
3422/**
3423 * Worker for vboxVDMASaveLoadExecPerform().
3424 */
3425static int vdmaVBVACtlEnableSubmitSync(PVBOXVDMAHOST pVdma, uint32_t offVram, bool fPaused)
3426{
3427 VBVAENABLE Enable = {0};
3428 Enable.u32Flags = VBVA_F_ENABLE;
3429 Enable.u32Offset = offVram;
3430
3431 VDMA_VBVA_CTL_CYNC_COMPLETION Data;
3432 Data.rc = VERR_NOT_IMPLEMENTED;
3433 int rc = RTSemEventCreate(&Data.hEvent);
3434 if (!RT_SUCCESS(rc))
3435 {
3436 WARN(("RTSemEventCreate failed %Rrc\n", rc));
3437 return rc;
3438 }
3439
3440 rc = vdmaVBVACtlEnableSubmitInternal(pVdma, &Enable, fPaused, vdmaVBVACtlSubmitSyncCompletion, &Data);
3441 if (RT_SUCCESS(rc))
3442 {
3443 rc = RTSemEventWait(Data.hEvent, RT_INDEFINITE_WAIT);
3444 if (RT_SUCCESS(rc))
3445 {
3446 rc = Data.rc;
3447 if (!RT_SUCCESS(rc))
3448 WARN(("vdmaVBVACtlSubmitSyncCompletion returned %Rrc\n", rc));
3449 }
3450 else
3451 WARN(("RTSemEventWait failed %Rrc\n", rc));
3452 }
3453 else
3454 WARN(("vdmaVBVACtlSubmit failed %Rrc\n", rc));
3455
3456 RTSemEventDestroy(Data.hEvent);
3457
3458 return rc;
3459}
3460
3461/**
3462 * Worker for vdmaVBVACtlEnableDisableSubmitInternal().
3463 */
3464static int vdmaVBVACtlDisableSubmitInternal(PVBOXVDMAHOST pVdma, VBVAENABLE *pEnable,
3465 PFNVBVAEXHOSTCTL_COMPLETE pfnComplete, void *pvComplete)
3466{
3467 int rc;
3468 VBVAEXHOSTCTL* pHCtl;
3469 if (VBoxVBVAExHSIsDisabled(&pVdma->CmdVbva))
3470 {
3471 WARN(("VBoxVBVAExHSIsDisabled: disabled"));
3472 return VINF_SUCCESS;
3473 }
3474
3475 pHCtl = VBoxVBVAExHCtlCreate(&pVdma->CmdVbva, VBVAEXHOSTCTL_TYPE_GHH_DISABLE);
3476 if (!pHCtl)
3477 {
3478 WARN(("VBoxVBVAExHCtlCreate failed\n"));
3479 return VERR_NO_MEMORY;
3480 }
3481
3482 pHCtl->u.cmd.pu8Cmd = (uint8_t*)pEnable;
3483 pHCtl->u.cmd.cbCmd = sizeof (*pEnable);
3484 rc = vdmaVBVACtlSubmit(pVdma, pHCtl, VBVAEXHOSTCTL_SOURCE_GUEST, pfnComplete, pvComplete);
3485 if (RT_SUCCESS(rc))
3486 return VINF_SUCCESS;
3487
3488 WARN(("vdmaVBVACtlSubmit failed rc %Rrc\n", rc));
3489 VBoxVBVAExHCtlFree(&pVdma->CmdVbva, pHCtl);
3490 return rc;
3491}
3492
3493/**
3494 * Worker for vdmaVBVACtlEnableDisableSubmit().
3495 */
3496static int vdmaVBVACtlEnableDisableSubmitInternal(PVBOXVDMAHOST pVdma, VBVAENABLE *pEnable,
3497 PFNVBVAEXHOSTCTL_COMPLETE pfnComplete, void *pvComplete)
3498{
3499 bool fEnable = (pEnable->u32Flags & (VBVA_F_ENABLE | VBVA_F_DISABLE)) == VBVA_F_ENABLE;
3500 if (fEnable)
3501 return vdmaVBVACtlEnableSubmitInternal(pVdma, pEnable, false, pfnComplete, pvComplete);
3502 return vdmaVBVACtlDisableSubmitInternal(pVdma, pEnable, pfnComplete, pvComplete);
3503}
3504
3505/**
3506 * Handler for vboxCmdVBVACmdCtl/VBOXCMDVBVACTL_TYPE_ENABLE.
3507 */
3508static int vdmaVBVACtlEnableDisableSubmit(PVBOXVDMAHOST pVdma, VBOXCMDVBVA_CTL_ENABLE *pEnable)
3509{
3510 VBoxSHGSMICommandMarkAsynchCompletion(&pEnable->Hdr);
3511 int rc = vdmaVBVACtlEnableDisableSubmitInternal(pVdma, &pEnable->Enable, vboxCmdVBVACmdCtlGuestCompletion, pVdma);
3512 if (RT_SUCCESS(rc))
3513 return VINF_SUCCESS;
3514
3515 WARN(("vdmaVBVACtlEnableDisableSubmitInternal failed %Rrc\n", rc));
3516 pEnable->Hdr.i32Result = rc;
3517 rc = VBoxSHGSMICommandComplete(pVdma->pHgsmi, &pEnable->Hdr);
3518 AssertRC(rc);
3519 return VINF_SUCCESS;
3520}
3521
3522/**
3523 * @callback_method_impl{FNVBVAEXHOSTCTL_COMPLETE,
3524 * Used by vdmaVBVACtlSubmitSync() and vdmaVBVACtlEnableSubmitSync().}
3525 */
3526static DECLCALLBACK(void) vdmaVBVACtlSubmitSyncCompletion(VBVAEXHOSTCONTEXT *pVbva, struct VBVAEXHOSTCTL *pCtl,
3527 int rc, void *pvContext)
3528{
3529 RT_NOREF(pVbva, pCtl);
3530 VDMA_VBVA_CTL_CYNC_COMPLETION *pData = (VDMA_VBVA_CTL_CYNC_COMPLETION *)pvContext;
3531 pData->rc = rc;
3532 rc = RTSemEventSignal(pData->hEvent);
3533 if (!RT_SUCCESS(rc))
3534 WARN(("RTSemEventSignal failed %Rrc\n", rc));
3535}
3536
3537
3538static int vdmaVBVACtlSubmitSync(PVBOXVDMAHOST pVdma, VBVAEXHOSTCTL* pCtl, VBVAEXHOSTCTL_SOURCE enmSource)
3539{
3540 VDMA_VBVA_CTL_CYNC_COMPLETION Data;
3541 Data.rc = VERR_NOT_IMPLEMENTED;
3542 int rc = RTSemEventCreate(&Data.hEvent);
3543 if (!RT_SUCCESS(rc))
3544 {
3545 WARN(("RTSemEventCreate failed %Rrc\n", rc));
3546 return rc;
3547 }
3548
3549 rc = vdmaVBVACtlSubmit(pVdma, pCtl, enmSource, vdmaVBVACtlSubmitSyncCompletion, &Data);
3550 if (RT_SUCCESS(rc))
3551 {
3552 rc = RTSemEventWait(Data.hEvent, RT_INDEFINITE_WAIT);
3553 if (RT_SUCCESS(rc))
3554 {
3555 rc = Data.rc;
3556 if (!RT_SUCCESS(rc))
3557 WARN(("vdmaVBVACtlSubmitSyncCompletion returned %Rrc\n", rc));
3558 }
3559 else
3560 WARN(("RTSemEventWait failed %Rrc\n", rc));
3561 }
3562 else
3563 Log(("vdmaVBVACtlSubmit failed %Rrc\n", rc));
3564
3565 RTSemEventDestroy(Data.hEvent);
3566
3567 return rc;
3568}
3569
3570/**
3571 * Worker for vboxVDMASaveStateExecPrep().
3572 */
3573static int vdmaVBVAPause(PVBOXVDMAHOST pVdma)
3574{
3575 VBVAEXHOSTCTL Ctl;
3576 Ctl.enmType = VBVAEXHOSTCTL_TYPE_HH_INTERNAL_PAUSE;
3577 return vdmaVBVACtlSubmitSync(pVdma, &Ctl, VBVAEXHOSTCTL_SOURCE_HOST);
3578}
3579
3580/**
3581 * Worker for vboxVDMASaveLoadExecPerform() and vboxVDMASaveStateExecDone().
3582 */
3583static int vdmaVBVAResume(PVBOXVDMAHOST pVdma)
3584{
3585 VBVAEXHOSTCTL Ctl;
3586 Ctl.enmType = VBVAEXHOSTCTL_TYPE_HH_INTERNAL_RESUME;
3587 return vdmaVBVACtlSubmitSync(pVdma, &Ctl, VBVAEXHOSTCTL_SOURCE_HOST);
3588}
3589
3590/**
3591 * Worker for vboxCmdVBVACmdSubmit(), vboxCmdVBVACmdFlush() and vboxCmdVBVATimerRefresh().
3592 */
3593static int vboxVDMACmdSubmitPerform(struct VBOXVDMAHOST *pVdma)
3594{
3595 int rc = VBoxVBVAExHSCheckCommands(&pVdma->CmdVbva);
3596 switch (rc)
3597 {
3598 case VINF_SUCCESS:
3599 return VBoxVDMAThreadEventNotify(&pVdma->Thread);
3600 case VINF_ALREADY_INITIALIZED:
3601 case VINF_EOF:
3602 case VERR_INVALID_STATE:
3603 return VINF_SUCCESS;
3604 default:
3605 Assert(!RT_FAILURE(rc));
3606 return RT_FAILURE(rc) ? rc : VERR_INTERNAL_ERROR;
3607 }
3608}
3609
3610
3611/**
3612 * @interface_method_impl{PDMIDISPLAYVBVACALLBACKS,pfnCrCtlSubmit}
3613 */
3614int vboxCmdVBVACmdHostCtl(PPDMIDISPLAYVBVACALLBACKS pInterface,
3615 struct VBOXCRCMDCTL *pCmd,
3616 uint32_t cbCmd,
3617 PFNCRCTLCOMPLETION pfnCompletion,
3618 void *pvCompletion)
3619{
3620 PVGASTATE pVGAState = PPDMIDISPLAYVBVACALLBACKS_2_PVGASTATE(pInterface);
3621 struct VBOXVDMAHOST *pVdma = pVGAState->pVdma;
3622 if (pVdma == NULL)
3623 return VERR_INVALID_STATE;
3624 pCmd->CalloutList.List.pNext = NULL;
3625 return vdmaVBVACtlOpaqueHostSubmit(pVdma, pCmd, cbCmd, pfnCompletion, pvCompletion);
3626}
3627
3628/**
3629 * Argument package from vboxCmdVBVACmdHostCtlSync to vboxCmdVBVACmdHostCtlSyncCb.
3630 */
3631typedef struct VBOXCMDVBVA_CMDHOSTCTL_SYNC
3632{
3633 struct VBOXVDMAHOST *pVdma;
3634 uint32_t fProcessing;
3635 int rc;
3636} VBOXCMDVBVA_CMDHOSTCTL_SYNC;
3637
3638/**
3639 * @interface_method_impl{FNCRCTLCOMPLETION, Used by vboxCmdVBVACmdHostCtlSync.}
3640 */
3641static DECLCALLBACK(void) vboxCmdVBVACmdHostCtlSyncCb(struct VBOXCRCMDCTL *pCmd, uint32_t cbCmd, int rc, void *pvCompletion)
3642{
3643 RT_NOREF(pCmd, cbCmd);
3644 VBOXCMDVBVA_CMDHOSTCTL_SYNC *pData = (VBOXCMDVBVA_CMDHOSTCTL_SYNC *)pvCompletion;
3645
3646 pData->rc = rc;
3647
3648 struct VBOXVDMAHOST *pVdma = pData->pVdma;
3649
3650 ASMAtomicIncS32(&pVdma->i32cHostCrCtlCompleted);
3651
3652 pData->fProcessing = 0;
3653
3654 RTSemEventMultiSignal(pVdma->HostCrCtlCompleteEvent);
3655}
3656
3657/**
3658 * @callback_method_impl{FNVBOXCRCLIENT_CALLOUT, Worker for vboxVDMACrCtlHgsmiSetup }
3659 *
3660 * @note r=bird: not to be confused with the callout function below. sigh.
3661 */
3662static DECLCALLBACK(int) vboxCmdVBVACmdCallout(struct VBOXVDMAHOST *pVdma, struct VBOXCRCMDCTL* pCmd,
3663 VBOXCRCMDCTL_CALLOUT_LISTENTRY *pEntry, PFNVBOXCRCMDCTL_CALLOUT_CB pfnCb)
3664{
3665 pEntry->pfnCb = pfnCb;
3666 int rc = RTCritSectEnter(&pVdma->CalloutCritSect);
3667 if (RT_SUCCESS(rc))
3668 {
3669 RTListAppend(&pCmd->CalloutList.List, &pEntry->Node);
3670 RTCritSectLeave(&pVdma->CalloutCritSect);
3671
3672 RTSemEventMultiSignal(pVdma->HostCrCtlCompleteEvent);
3673 }
3674 else
3675 WARN(("RTCritSectEnter failed %Rrc\n", rc));
3676
3677 return rc;
3678}
3679
3680
3681/**
3682 * Worker for vboxCmdVBVACmdHostCtlSync.
3683 */
3684static int vboxCmdVBVACmdCalloutProcess(struct VBOXVDMAHOST *pVdma, struct VBOXCRCMDCTL* pCmd)
3685{
3686 int rc = VINF_SUCCESS;
3687 for (;;)
3688 {
3689 rc = RTCritSectEnter(&pVdma->CalloutCritSect);
3690 if (RT_SUCCESS(rc))
3691 {
3692 VBOXCRCMDCTL_CALLOUT_LISTENTRY* pEntry = RTListGetFirst(&pCmd->CalloutList.List, VBOXCRCMDCTL_CALLOUT_LISTENTRY, Node);
3693 if (pEntry)
3694 RTListNodeRemove(&pEntry->Node);
3695 RTCritSectLeave(&pVdma->CalloutCritSect);
3696
3697 if (!pEntry)
3698 break;
3699
3700 pEntry->pfnCb(pEntry);
3701 }
3702 else
3703 {
3704 WARN(("RTCritSectEnter failed %Rrc\n", rc));
3705 break;
3706 }
3707 }
3708
3709 return rc;
3710}
3711
3712/**
3713 * @interface_method_impl{PDMIDISPLAYVBVACALLBACKS,pfnCrCtlSubmitSync}
3714 */
3715DECLCALLBACK(int) vboxCmdVBVACmdHostCtlSync(PPDMIDISPLAYVBVACALLBACKS pInterface, struct VBOXCRCMDCTL *pCmd, uint32_t cbCmd)
3716{
3717 PVGASTATE pVGAState = PPDMIDISPLAYVBVACALLBACKS_2_PVGASTATE(pInterface);
3718 struct VBOXVDMAHOST *pVdma = pVGAState->pVdma;
3719 if (pVdma == NULL)
3720 return VERR_INVALID_STATE;
3721
3722 VBOXCMDVBVA_CMDHOSTCTL_SYNC Data;
3723 Data.pVdma = pVdma;
3724 Data.fProcessing = 1;
3725 Data.rc = VERR_INTERNAL_ERROR;
3726 RTListInit(&pCmd->CalloutList.List);
3727 int rc = vdmaVBVACtlOpaqueHostSubmit(pVdma, pCmd, cbCmd, vboxCmdVBVACmdHostCtlSyncCb, &Data);
3728 if (!RT_SUCCESS(rc))
3729 {
3730 WARN(("vdmaVBVACtlOpaqueHostSubmit failed %Rrc", rc));
3731 return rc;
3732 }
3733
3734 while (Data.fProcessing)
3735 {
3736 /* Poll infrequently to make sure no completed message has been missed. */
3737 RTSemEventMultiWait(pVdma->HostCrCtlCompleteEvent, 500);
3738
3739 vboxCmdVBVACmdCalloutProcess(pVdma, pCmd);
3740
3741 if (Data.fProcessing)
3742 RTThreadYield();
3743 }
3744
3745 /* extra check callouts */
3746 vboxCmdVBVACmdCalloutProcess(pVdma, pCmd);
3747
3748 /* 'Our' message has been processed, so should reset the semaphore.
3749 * There is still possible that another message has been processed
3750 * and the semaphore has been signalled again.
3751 * Reset only if there are no other messages completed.
3752 */
3753 int32_t c = ASMAtomicDecS32(&pVdma->i32cHostCrCtlCompleted);
3754 Assert(c >= 0);
3755 if (!c)
3756 RTSemEventMultiReset(pVdma->HostCrCtlCompleteEvent);
3757
3758 rc = Data.rc;
3759 if (!RT_SUCCESS(rc))
3760 WARN(("host call failed %Rrc", rc));
3761
3762 return rc;
3763}
3764
3765/**
3766 * Handler for VBVA_CMDVBVA_CTL, see vbvaChannelHandler().
3767 *
3768 * @returns VBox status code
3769 * @param pVGAState The VGA state.
3770 * @param pCtl The control command.
3771 * @param cbCtl The size of it. This is at least
3772 * sizeof(VBOXCMDVBVA_CTL).
3773 */
3774int vboxCmdVBVACmdCtl(PVGASTATE pVGAState, VBOXCMDVBVA_CTL *pCtl, uint32_t cbCtl)
3775{
3776 struct VBOXVDMAHOST *pVdma = pVGAState->pVdma;
3777 switch (pCtl->u32Type)
3778 {
3779 case VBOXCMDVBVACTL_TYPE_3DCTL:
3780 return vdmaVBVACtlGenericGuestSubmit(pVdma, VBVAEXHOSTCTL_TYPE_GHH_BE_OPAQUE, pCtl, cbCtl);
3781
3782 case VBOXCMDVBVACTL_TYPE_RESIZE:
3783 return vdmaVBVACtlGenericGuestSubmit(pVdma, VBVAEXHOSTCTL_TYPE_GHH_RESIZE, pCtl, cbCtl);
3784
3785 case VBOXCMDVBVACTL_TYPE_ENABLE:
3786 if (cbCtl == sizeof(VBOXCMDVBVA_CTL_ENABLE))
3787 return vdmaVBVACtlEnableDisableSubmit(pVdma, (VBOXCMDVBVA_CTL_ENABLE *)pCtl);
3788 WARN(("incorrect enable size\n"));
3789 break;
3790 default:
3791 WARN(("unsupported type\n"));
3792 break;
3793 }
3794
3795 pCtl->i32Result = VERR_INVALID_PARAMETER;
3796 int rc = VBoxSHGSMICommandComplete(pVdma->pHgsmi, pCtl);
3797 AssertRC(rc);
3798 return VINF_SUCCESS;
3799}
3800
3801/**
3802 * Handler for VBVA_CMDVBVA_SUBMIT, see vbvaChannelHandler().
3803 */
3804int vboxCmdVBVACmdSubmit(PVGASTATE pVGAState)
3805{
3806 if (!VBoxVBVAExHSIsEnabled(&pVGAState->pVdma->CmdVbva))
3807 {
3808 WARN(("vdma VBVA is disabled\n"));
3809 return VERR_INVALID_STATE;
3810 }
3811
3812 return vboxVDMACmdSubmitPerform(pVGAState->pVdma);
3813}
3814
3815/**
3816 * Handler for VBVA_CMDVBVA_FLUSH, see vbvaChannelHandler().
3817 */
3818int vboxCmdVBVACmdFlush(PVGASTATE pVGAState)
3819{
3820 WARN(("flush\n"));
3821 if (!VBoxVBVAExHSIsEnabled(&pVGAState->pVdma->CmdVbva))
3822 {
3823 WARN(("vdma VBVA is disabled\n"));
3824 return VERR_INVALID_STATE;
3825 }
3826 return vboxVDMACmdSubmitPerform(pVGAState->pVdma);
3827}
3828
3829/**
3830 * Called from vgaTimerRefresh().
3831 */
3832void vboxCmdVBVATimerRefresh(PVGASTATE pVGAState)
3833{
3834 if (!VBoxVBVAExHSIsEnabled(&pVGAState->pVdma->CmdVbva))
3835 return;
3836 vboxVDMACmdSubmitPerform(pVGAState->pVdma);
3837}
3838
3839bool vboxCmdVBVAIsEnabled(PVGASTATE pVGAState)
3840{
3841 return VBoxVBVAExHSIsEnabled(&pVGAState->pVdma->CmdVbva);
3842}
3843
3844#endif /* VBOX_WITH_CRHGSMI */
3845
3846
3847/*
3848 *
3849 *
3850 * Saved state.
3851 * Saved state.
3852 * Saved state.
3853 *
3854 *
3855 */
3856
3857int vboxVDMASaveStateExecPrep(struct VBOXVDMAHOST *pVdma)
3858{
3859#ifdef VBOX_WITH_CRHGSMI
3860 int rc = vdmaVBVAPause(pVdma);
3861 if (RT_SUCCESS(rc))
3862 return VINF_SUCCESS;
3863
3864 if (rc != VERR_INVALID_STATE)
3865 {
3866 WARN(("vdmaVBVAPause failed %Rrc\n", rc));
3867 return rc;
3868 }
3869
3870# ifdef DEBUG_misha
3871 WARN(("debug prep"));
3872# endif
3873
3874 PVGASTATE pVGAState = pVdma->pVGAState;
3875 PVBOXVDMACMD_CHROMIUM_CTL pCmd;
3876 pCmd = (PVBOXVDMACMD_CHROMIUM_CTL)vboxVDMACrCtlCreate(VBOXVDMACMD_CHROMIUM_CTL_TYPE_SAVESTATE_BEGIN, sizeof(*pCmd));
3877 if (pCmd)
3878 {
3879 rc = vboxVDMACrCtlPost(pVGAState, pCmd, sizeof (*pCmd));
3880 AssertRC(rc);
3881 if (RT_SUCCESS(rc))
3882 rc = vboxVDMACrCtlGetRc(pCmd);
3883 vboxVDMACrCtlRelease(pCmd);
3884 return rc;
3885 }
3886 return VERR_NO_MEMORY;
3887#else
3888 RT_NOREF(pVdma);
3889 return VINF_SUCCESS;
3890#endif
3891}
3892
3893int vboxVDMASaveStateExecDone(struct VBOXVDMAHOST *pVdma)
3894{
3895#ifdef VBOX_WITH_CRHGSMI
3896 int rc = vdmaVBVAResume(pVdma);
3897 if (RT_SUCCESS(rc))
3898 return VINF_SUCCESS;
3899
3900 if (rc != VERR_INVALID_STATE)
3901 {
3902 WARN(("vdmaVBVAResume failed %Rrc\n", rc));
3903 return rc;
3904 }
3905
3906# ifdef DEBUG_misha
3907 WARN(("debug done"));
3908# endif
3909
3910 PVGASTATE pVGAState = pVdma->pVGAState;
3911 PVBOXVDMACMD_CHROMIUM_CTL pCmd;
3912 pCmd = (PVBOXVDMACMD_CHROMIUM_CTL)vboxVDMACrCtlCreate(VBOXVDMACMD_CHROMIUM_CTL_TYPE_SAVESTATE_END, sizeof(*pCmd));
3913 Assert(pCmd);
3914 if (pCmd)
3915 {
3916 rc = vboxVDMACrCtlPost(pVGAState, pCmd, sizeof (*pCmd));
3917 AssertRC(rc);
3918 if (RT_SUCCESS(rc))
3919 rc = vboxVDMACrCtlGetRc(pCmd);
3920 vboxVDMACrCtlRelease(pCmd);
3921 return rc;
3922 }
3923 return VERR_NO_MEMORY;
3924#else
3925 RT_NOREF(pVdma);
3926 return VINF_SUCCESS;
3927#endif
3928}
3929
3930int vboxVDMASaveStateExecPerform(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM)
3931{
3932 int rc;
3933#ifndef VBOX_WITH_CRHGSMI
3934 RT_NOREF(pVdma, pSSM);
3935
3936#else
3937 if (!VBoxVBVAExHSIsEnabled(&pVdma->CmdVbva))
3938#endif
3939 {
3940 rc = SSMR3PutU32(pSSM, UINT32_MAX);
3941 AssertRCReturn(rc, rc);
3942 return VINF_SUCCESS;
3943 }
3944
3945#ifdef VBOX_WITH_CRHGSMI
3946 PVGASTATE pVGAState = pVdma->pVGAState;
3947 uint8_t * pu8VramBase = pVGAState->vram_ptrR3;
3948
3949 rc = SSMR3PutU32(pSSM, (uint32_t)(((uint8_t*)pVdma->CmdVbva.pVBVA) - pu8VramBase));
3950 AssertRCReturn(rc, rc);
3951
3952 VBVAEXHOSTCTL HCtl;
3953 HCtl.enmType = VBVAEXHOSTCTL_TYPE_HH_SAVESTATE;
3954 HCtl.u.state.pSSM = pSSM;
3955 HCtl.u.state.u32Version = 0;
3956 return vdmaVBVACtlSubmitSync(pVdma, &HCtl, VBVAEXHOSTCTL_SOURCE_HOST);
3957#endif
3958}
3959
3960int vboxVDMASaveLoadExecPerform(struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM, uint32_t u32Version)
3961{
3962 uint32_t u32;
3963 int rc = SSMR3GetU32(pSSM, &u32);
3964 AssertLogRelRCReturn(rc, rc);
3965
3966 if (u32 != UINT32_MAX)
3967 {
3968#ifdef VBOX_WITH_CRHGSMI
3969 rc = vdmaVBVACtlEnableSubmitSync(pVdma, u32, true);
3970 AssertLogRelRCReturn(rc, rc);
3971
3972 Assert(pVdma->CmdVbva.i32State == VBVAEXHOSTCONTEXT_ESTATE_PAUSED);
3973
3974 VBVAEXHOSTCTL HCtl;
3975 HCtl.enmType = VBVAEXHOSTCTL_TYPE_HH_LOADSTATE;
3976 HCtl.u.state.pSSM = pSSM;
3977 HCtl.u.state.u32Version = u32Version;
3978 rc = vdmaVBVACtlSubmitSync(pVdma, &HCtl, VBVAEXHOSTCTL_SOURCE_HOST);
3979 AssertLogRelRCReturn(rc, rc);
3980
3981 rc = vdmaVBVAResume(pVdma);
3982 AssertLogRelRCReturn(rc, rc);
3983
3984 return VINF_SUCCESS;
3985#else
3986 RT_NOREF(pVdma, u32Version);
3987 WARN(("Unsupported VBVACtl info!\n"));
3988 return VERR_VERSION_MISMATCH;
3989#endif
3990 }
3991
3992 return VINF_SUCCESS;
3993}
3994
3995int vboxVDMASaveLoadDone(struct VBOXVDMAHOST *pVdma)
3996{
3997#ifdef VBOX_WITH_CRHGSMI
3998 if (!VBoxVBVAExHSIsEnabled(&pVdma->CmdVbva))
3999 return VINF_SUCCESS;
4000
4001/** @todo r=bird: BTW. would be great if you put in a couple of comments here and there explaining what
4002 * the purpose of this code is. */
4003 VBVAEXHOSTCTL *pHCtl = VBoxVBVAExHCtlCreate(&pVdma->CmdVbva, VBVAEXHOSTCTL_TYPE_HH_LOADSTATE_DONE);
4004 if (!pHCtl)
4005 {
4006 WARN(("VBoxVBVAExHCtlCreate failed\n"));
4007 return VERR_NO_MEMORY;
4008 }
4009
4010 /* sanity */
4011 pHCtl->u.cmd.pu8Cmd = NULL;
4012 pHCtl->u.cmd.cbCmd = 0;
4013
4014 /* NULL completion will just free the ctl up */
4015 int rc = vdmaVBVACtlSubmit(pVdma, pHCtl, VBVAEXHOSTCTL_SOURCE_HOST, NULL, NULL);
4016 if (RT_FAILURE(rc))
4017 {
4018 Log(("vdmaVBVACtlSubmit failed %Rrc\n", rc));
4019 VBoxVBVAExHCtlFree(&pVdma->CmdVbva, pHCtl);
4020 return rc;
4021 }
4022#else
4023 RT_NOREF(pVdma);
4024#endif
4025 return VINF_SUCCESS;
4026}
4027
Note: See TracBrowser for help on using the repository browser.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette