/* * VMware SVGA II 3D definitions */ #ifndef _SVGA3D_REG_H_ #define _SVGA3D_REG_H_ #define SVGA_3D_CMD_LEGACY_BASE 1000 #define SVGA_3D_CMD_BASE 1040 #define SVGA_3D_CMD_SURFACE_DEFINE SVGA_3D_CMD_BASE + 0 #define SVGA_3D_CMD_SURFACE_DESTROY SVGA_3D_CMD_BASE + 1 #define SVGA_3D_CMD_SURFACE_COPY SVGA_3D_CMD_BASE + 2 #define SVGA_3D_CMD_SURFACE_STRETCHBLT SVGA_3D_CMD_BASE + 3 #define SVGA_3D_CMD_SURFACE_DMA SVGA_3D_CMD_BASE + 4 #define SVGA_3D_CMD_CONTEXT_DEFINE SVGA_3D_CMD_BASE + 5 #define SVGA_3D_CMD_CONTEXT_DESTROY SVGA_3D_CMD_BASE + 6 #define SVGA_3D_CMD_SETTRANSFORM SVGA_3D_CMD_BASE + 7 #define SVGA_3D_CMD_SETZRANGE SVGA_3D_CMD_BASE + 8 #define SVGA_3D_CMD_SETRENDERSTATE SVGA_3D_CMD_BASE + 9 #define SVGA_3D_CMD_SETRENDERTARGET SVGA_3D_CMD_BASE + 10 #define SVGA_3D_CMD_SETTEXTURESTATE SVGA_3D_CMD_BASE + 11 #define SVGA_3D_CMD_SETMATERIAL SVGA_3D_CMD_BASE + 12 #define SVGA_3D_CMD_SETLIGHTDATA SVGA_3D_CMD_BASE + 13 #define SVGA_3D_CMD_SETLIGHTENABLED SVGA_3D_CMD_BASE + 14 #define SVGA_3D_CMD_SETVIEWPORT SVGA_3D_CMD_BASE + 15 #define SVGA_3D_CMD_SETCLIPPLANE SVGA_3D_CMD_BASE + 16 #define SVGA_3D_CMD_CLEAR SVGA_3D_CMD_BASE + 17 #define SVGA_3D_CMD_PRESENT SVGA_3D_CMD_BASE + 18 #define SVGA_3D_CMD_SHADER_DEFINE SVGA_3D_CMD_BASE + 19 #define SVGA_3D_CMD_SHADER_DESTROY SVGA_3D_CMD_BASE + 20 #define SVGA_3D_CMD_SET_SHADER SVGA_3D_CMD_BASE + 21 #define SVGA_3D_CMD_SET_SHADER_CONST SVGA_3D_CMD_BASE + 22 #define SVGA_3D_CMD_DRAW_PRIMITIVES SVGA_3D_CMD_BASE + 23 #define SVGA_3D_CMD_SETSCISSORRECT SVGA_3D_CMD_BASE + 24 #define SVGA_3D_CMD_BEGIN_QUERY SVGA_3D_CMD_BASE + 25 #define SVGA_3D_CMD_END_QUERY SVGA_3D_CMD_BASE + 26 #define SVGA_3D_CMD_WAIT_FOR_QUERY SVGA_3D_CMD_BASE + 27 #define SVGA_3D_CMD_PRESENT_READBACK SVGA_3D_CMD_BASE + 28 #define SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN SVGA_3D_CMD_BASE + 29 #define SVGA_3D_CMD_SURFACE_DEFINE_V2 SVGA_3D_CMD_BASE + 30 #define SVGA_3D_CMD_GENERATE_MIPMAPS SVGA_3D_CMD_BASE + 31 #define SVGA_3D_CMD_ACTIVATE_SURFACE SVGA_3D_CMD_BASE + 40 #define SVGA_3D_CMD_DEACTIVATE_SURFACE SVGA_3D_CMD_BASE + 41 #define SVGA_3D_CMD_MAX SVGA_3D_CMD_BASE + 42 #define SVGA_3D_CMD_FUTURE_MAX 2000 typedef enum { SVGA3D_WRITE_HOST_VRAM = 1, SVGA3D_READ_HOST_VRAM = 2 } SVGA3dTransferType; #endif /* _SVGA3D_REG_H_ */