VirtualBox

source: vbox/trunk/src/VBox/Devices/Network/DevE1000Phy.h@ 16565

Last change on this file since 16565 was 15955, checked in by vboxsync, 16 years ago

fix OSE headers

  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 3.5 KB
Line 
1/** $Id: DevE1000Phy.h 15955 2009-01-14 20:14:36Z vboxsync $ */
2/** @file
3 * DevE1000Phy - Intel 82540EM Ethernet Controller Internal PHY Emulation, Header.
4 */
5
6/*
7 * Copyright (C) 2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22#include <VBox/types.h>
23
24#define PHY_EPID_M881000 0xC50
25#define PHY_EPID_M881011 0xC24
26
27#define PCTRL_SPDSELM 0x0040
28#define PCTRL_DUPMOD 0x0100
29#define PCTRL_ANEG 0x1000
30#define PCTRL_SPDSELL 0x2000
31#define PCTRL_RESET 0x8000
32
33#define PSTATUS_LNKSTAT 0x0004
34
35#define PSSTAT_LINK 0x0400
36
37namespace Phy
38{
39 /**
40 * Indices of memory-mapped registers in register table
41 */
42 enum enmRegIdx
43 {
44 PCTRL_IDX,
45 PSTATUS_IDX,
46 PID_IDX,
47 EPID_IDX,
48 ANA_IDX,
49 LPA_IDX,
50 ANE_IDX,
51 NPT_IDX,
52 LPN_IDX,
53 GCON_IDX,
54 GSTATUS_IDX,
55 EPSTATUS_IDX,
56 PSCON_IDX,
57 PSSTAT_IDX,
58 PINTE_IDX,
59 PINTS_IDX,
60 EPSCON1_IDX,
61 PREC_IDX,
62 EPSCON2_IDX,
63 R30PS_IDX,
64 R30AW_IDX,
65 NUM_OF_PHY_REGS
66 };
67 /**
68 * Emulation state of PHY.
69 */
70 struct Phy_st
71 {
72 /** Network controller instance this PHY is attached to. */
73 int iInstance;
74 /** Register storage. */
75 uint16_t au16Regs[NUM_OF_PHY_REGS];
76 /** Current state of serial MDIO interface. */
77 uint16_t u16State;
78 /** Current state of serial MDIO interface. */
79 uint16_t u16Acc;
80 /** Number of bits remaining to be shifted into/out of accumulator. */
81 uint16_t u16Cnt;
82 /** PHY register offset selected for MDIO operation. */
83 uint16_t u16RegAdr;
84 };
85}
86
87#define MDIO_IDLE 0
88#define MDIO_ST 1
89#define MDIO_OP_ADR 2
90#define MDIO_TA_RD 3
91#define MDIO_TA_WR 4
92#define MDIO_READ 5
93#define MDIO_WRITE 6
94
95#define MDIO_READ_OP 2
96#define MDIO_WRITE_OP 1
97
98typedef struct Phy::Phy_st PHY;
99typedef PHY *PPHY;
100
101/* Interface *****************************************************************/
102namespace Phy {
103 /** Initialize PHY. */
104 void init(PPHY pPhy, int iNICInstance, uint16_t u16EPid);
105 /** Read PHY register at specified address. */
106 uint16_t readRegister(PPHY pPhy, uint32_t u32Address);
107 /** Write to PHY register at specified address. */
108 void writeRegister(PPHY pPhy, uint32_t u32Address, uint16_t u16Value);
109 /** Read the value on MDIO pin. */
110 bool readMDIO(PPHY pPhy);
111 /** Set the value of MDIO pin. */
112 void writeMDIO(PPHY pPhy, bool fPin);
113 /** Hardware reset. */
114 void hardReset(PPHY pPhy);
115 /** Query link status. */
116 bool isLinkUp(PPHY pPhy);
117 /** Set link status. */
118 void setLinkStatus(PPHY pPhy, bool fLinkIsUp);
119 /** Save PHY state. */
120 int saveState(PSSMHANDLE pSSMHandle, PPHY pPhy);
121 /** Restore previously saved PHY state. */
122 int loadState(PSSMHANDLE pSSMHandle, PPHY pPhy);
123}
124
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