1 | ;;
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2 | ;; Copyright (C) 2006-2011 Oracle Corporation
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3 | ;;
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4 | ;; This file is part of VirtualBox Open Source Edition (OSE), as
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5 | ;; available from http://www.virtualbox.org. This file is free software;
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6 | ;; you can redistribute it and/or modify it under the terms of the GNU
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7 | ;; General Public License (GPL) as published by the Free Software
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8 | ;; Foundation, in version 2 as it comes in the "COPYING" file of the
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9 | ;; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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10 | ;; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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11 | ;; --------------------------------------------------------------------
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12 | ;;
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13 | ;; This code is based on:
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14 | ;;
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15 | ;; ROM BIOS for use with Bochs/Plex86/QEMU emulation environment
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16 | ;;
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17 | ;; Copyright (C) 2002 MandrakeSoft S.A.
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18 | ;;
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19 | ;; MandrakeSoft S.A.
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20 | ;; 43, rue d'Aboukir
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21 | ;; 75002 Paris - France
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22 | ;; http://www.linux-mandrake.com/
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23 | ;; http://www.mandrakesoft.com/
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24 | ;;
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25 | ;; This library is free software; you can redistribute it and/or
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26 | ;; modify it under the terms of the GNU Lesser General Public
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27 | ;; License as published by the Free Software Foundation; either
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28 | ;; version 2 of the License, or (at your option) any later version.
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29 | ;;
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30 | ;; This library is distributed in the hope that it will be useful,
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31 | ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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32 | ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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33 | ;; Lesser General Public License for more details.
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34 | ;;
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35 | ;; You should have received a copy of the GNU Lesser General Public
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36 | ;; License along with this library; if not, write to the Free Software
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37 | ;; Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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38 | ;;
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39 | ;;
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40 |
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41 | include pcicfg.inc
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42 |
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43 | if BX_PCIBIOS
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44 |
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45 | .386
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46 |
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47 | BIOS32 segment public 'CODE' use32
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48 |
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49 | public pcibios_protected
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50 |
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51 | align 16
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52 | bios32_structure:
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53 | db '_32_' ; signature
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54 | dw bios32_entry_point, 0Fh ;; 32 bit physical address
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55 | db 0 ; revision level
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56 | db 1 ; length in paragraphs
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57 | db 0 ; checksum (updated externally)
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58 | db 0,0,0,0,0 ; reserved
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59 |
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60 | align 16
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61 | bios32_entry_point:
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62 | pushfd
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63 | cmp eax, 'ICP$' ; 0x49435024 "$PCI"
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64 | jne unknown_service
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65 |
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66 | ifdef PCI_FIXED_HOST_BRIDGE_1
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67 | mov eax, 80000000h
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68 | mov dx, PCI_CFG1
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69 | out dx, eax
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70 | mov dx, PCI_CFG2
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71 | in eax, dx
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72 | cmp eax, PCI_FIXED_HOST_BRIDGE_1
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73 | je device_ok
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74 | endif
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75 |
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76 | ifdef PCI_FIXED_HOST_BRIDGE_2
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77 | ; 1Eh << 11
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78 | mov eax, 8000f000h
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79 | mov dx, PCI_CFG1
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80 | out dx, eax
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81 | mov dx, PCI_CFG2
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82 | in eax, dx
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83 | cmp eax, PCI_FIXED_HOST_BRIDGE_2
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84 | je device_ok
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85 | endif
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86 | jmp unknown_service
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87 | device_ok:
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88 | mov ebx, 000f0000h
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89 | mov ecx, 0
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90 | mov edx, pcibios_protected
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91 | xor al, al
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92 | jmp bios32_end
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93 |
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94 | unknown_service:
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95 | mov al, 80h
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96 | bios32_end:
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97 | popfd
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98 | retf
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99 |
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100 | align 16
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101 | pcibios_protected:
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102 | pushfd
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103 | cli
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104 | push esi
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105 | push edi
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106 | cmp al, 1 ; installation check
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107 | jne pci_pro_f02
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108 |
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109 | mov bx, 0210h
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110 | mov cx, 0
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111 | mov edx, ' ICP' ; 0x20494350 "PCI "
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112 | mov al, 1
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113 | jmp pci_pro_ok
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114 |
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115 | pci_pro_f02: ;; find pci device
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116 | cmp al, 2
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117 | jne pci_pro_f03
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118 |
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119 | shl ecx, 16
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120 | mov cx, dx
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121 | xor ebx, ebx
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122 | mov di, 0
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123 | pci_pro_devloop:
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124 | call pci_pro_select_reg
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125 | mov dx, PCI_CFG2
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126 | in eax, dx
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127 | cmp eax, ecx
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128 | jne pci_pro_nextdev
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129 |
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130 | cmp si, 0
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131 | je pci_pro_ok
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132 |
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133 | dec si
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134 | pci_pro_nextdev:
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135 | inc ebx
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136 | cmp ebx, MAX_BUSDEVFN
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137 | jne pci_pro_devloop
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138 |
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139 | mov ah, 86h
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140 | jmp pci_pro_fail
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141 |
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142 | pci_pro_f03: ;; find class code
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143 | cmp al, 3
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144 | jne pci_pro_f08
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145 |
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146 | xor ebx, ebx
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147 | mov di, 8
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148 | pci_pro_devloop2:
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149 | call pci_pro_select_reg
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150 | mov dx, PCI_CFG2
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151 | in eax, dx
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152 | shr eax, 8
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153 | cmp eax, ecx
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154 | jne pci_pro_nextdev2
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155 |
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156 | cmp si, 0
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157 | je pci_pro_ok
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158 |
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159 | dec si
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160 | pci_pro_nextdev2:
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161 | inc ebx
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162 | cmp ebx, MAX_BUSDEVFN
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163 | jne pci_pro_devloop2
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164 |
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165 | mov ah, 86h
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166 | jmp pci_pro_fail
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167 |
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168 | pci_pro_f08: ;; read configuration byte
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169 | cmp al, 8
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170 | jne pci_pro_f09
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171 |
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172 | call pci_pro_select_reg
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173 | push edx
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174 | mov dx, di
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175 | and dx, 3
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176 | add dx, PCI_CFG2
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177 | in al, dx
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178 | pop edx
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179 | mov cl, al
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180 | jmp pci_pro_ok
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181 |
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182 | pci_pro_f09: ;; read configuration word
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183 | cmp al, 9
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184 | jne pci_pro_f0a
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185 |
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186 | call pci_pro_select_reg
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187 | push edx
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188 | mov dx, di
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189 | and dx, 2
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190 | add dx, PCI_CFG2
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191 | in ax, dx
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192 | pop edx
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193 | mov cx, ax
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194 | jmp pci_pro_ok
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195 |
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196 | pci_pro_f0a: ;; read configuration dword
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197 | cmp al, 0Ah
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198 | jne pci_pro_f0b
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199 |
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200 | call pci_pro_select_reg
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201 | push edx
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202 | mov dx, PCI_CFG2
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203 | in eax, dx
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204 | pop edx
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205 | mov ecx, eax
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206 | jmp pci_pro_ok
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207 |
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208 | pci_pro_f0b: ;; write configuration byte
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209 | cmp al, 0Bh
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210 | jne pci_pro_f0c
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211 |
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212 | call pci_pro_select_reg
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213 | push edx
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214 | mov dx, di
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215 | and dx, 3
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216 | add dx, PCI_CFG2
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217 | mov al, cl
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218 | out dx, al
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219 | pop edx
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220 | jmp pci_pro_ok
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221 |
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222 | pci_pro_f0c: ;; write configuration word
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223 | cmp al, 0Ch
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224 | jne pci_pro_f0d
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225 |
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226 | call pci_pro_select_reg
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227 | push edx
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228 | mov dx, di
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229 | and dx, 2
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230 | add dx, PCI_CFG2
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231 | mov ax, cx
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232 | out dx, ax
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233 | pop edx
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234 | jmp pci_pro_ok
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235 |
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236 | pci_pro_f0d: ;; write configuration dword
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237 | cmp al, 0Dh
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238 | jne pci_pro_unknown
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239 | call pci_pro_select_reg
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240 | push edx
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241 | mov dx, PCI_CFG2
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242 | mov eax, ecx
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243 | out dx, eax
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244 | pop edx
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245 | jmp pci_pro_ok
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246 |
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247 | pci_pro_unknown:
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248 | mov ah, 81h
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249 | pci_pro_fail:
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250 | pop edi
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251 | pop esi
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252 | popfd
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253 | stc
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254 | retf
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255 |
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256 | pci_pro_ok:
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257 | xor ah, ah
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258 | pop edi
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259 | pop esi
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260 | popfd
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261 | clc
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262 | retf
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263 |
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264 | pci_pro_select_reg:
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265 | push edx
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266 | mov eax, 800000h
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267 | mov ax, bx
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268 | shl eax, 8
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269 | and di, 0FFh
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270 | or ax, di
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271 | and al, 0FCh
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272 | mov dx, PCI_CFG1
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273 | out dx, eax
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274 | pop edx
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275 | ret
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276 |
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277 | BIOS32 ends
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278 |
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279 | endif ; BX_PCIBIOS
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280 |
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281 | end
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