| 1 | ;;
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| 2 | ;; Copyright (C) 2006-2011 Oracle Corporation
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| 3 | ;;
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| 4 | ;; This file is part of VirtualBox Open Source Edition (OSE), as
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| 5 | ;; available from http://www.virtualbox.org. This file is free software;
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| 6 | ;; you can redistribute it and/or modify it under the terms of the GNU
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| 7 | ;; General Public License (GPL) as published by the Free Software
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| 8 | ;; Foundation, in version 2 as it comes in the "COPYING" file of the
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| 9 | ;; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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| 10 | ;; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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| 11 | ;; --------------------------------------------------------------------
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| 12 | ;;
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| 13 | ;; This code is based on:
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| 14 | ;;
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| 15 | ;; ROM BIOS for use with Bochs/Plex86/QEMU emulation environment
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| 16 | ;;
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| 17 | ;; Copyright (C) 2002 MandrakeSoft S.A.
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| 18 | ;;
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| 19 | ;; MandrakeSoft S.A.
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| 20 | ;; 43, rue d'Aboukir
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| 21 | ;; 75002 Paris - France
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| 22 | ;; http://www.linux-mandrake.com/
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| 23 | ;; http://www.mandrakesoft.com/
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| 24 | ;;
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| 25 | ;; This library is free software; you can redistribute it and/or
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| 26 | ;; modify it under the terms of the GNU Lesser General Public
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| 27 | ;; License as published by the Free Software Foundation; either
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| 28 | ;; version 2 of the License, or (at your option) any later version.
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| 29 | ;;
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| 30 | ;; This library is distributed in the hope that it will be useful,
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| 31 | ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
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| 32 | ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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| 33 | ;; Lesser General Public License for more details.
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| 34 | ;;
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| 35 | ;; You should have received a copy of the GNU Lesser General Public
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| 36 | ;; License along with this library; if not, write to the Free Software
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| 37 | ;; Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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| 38 | ;;
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| 39 | ;;
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| 40 |
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| 41 | include pcicfg.inc
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| 42 |
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| 43 | if BX_PCIBIOS
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| 44 |
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| 45 | .386
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| 46 |
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| 47 | BIOS32 segment public 'CODE' use32
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| 48 |
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| 49 | public pcibios_protected
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| 50 |
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| 51 | align 16
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| 52 | bios32_structure:
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| 53 | db '_32_' ; signature
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| 54 | dw bios32_entry_point, 0Fh ;; 32 bit physical address
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| 55 | db 0 ; revision level
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| 56 | db 1 ; length in paragraphs
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| 57 | db 0 ; checksum (updated externally)
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| 58 | db 0,0,0,0,0 ; reserved
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| 59 |
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| 60 | align 16
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| 61 | bios32_entry_point:
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| 62 | pushfd
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| 63 | cmp eax, 'ICP$' ; 0x49435024 "$PCI"
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| 64 | jne unknown_service
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| 65 |
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| 66 | ifdef PCI_FIXED_HOST_BRIDGE_1
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| 67 | mov eax, 80000000h
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| 68 | mov dx, PCI_CFG1
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| 69 | out dx, eax
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| 70 | mov dx, PCI_CFG2
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| 71 | in eax, dx
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| 72 | cmp eax, PCI_FIXED_HOST_BRIDGE_1
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| 73 | je device_ok
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| 74 | endif
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| 75 |
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| 76 | ifdef PCI_FIXED_HOST_BRIDGE_2
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| 77 | ; 18h << 11
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| 78 | mov eax, 8000c000h
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| 79 | mov dx, PCI_CFG1
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| 80 | out dx, eax
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| 81 | mov dx, PCI_CFG2
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| 82 | in eax, dx
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| 83 | cmp eax, PCI_FIXED_HOST_BRIDGE_2
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| 84 | je device_ok
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| 85 | ; 19h << 11
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| 86 | mov eax, 8000c800h
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| 87 | mov dx, PCI_CFG1
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| 88 | out dx, eax
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| 89 | mov dx, PCI_CFG2
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| 90 | in eax, dx
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| 91 | cmp eax, PCI_FIXED_HOST_BRIDGE_2
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| 92 | je device_ok
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| 93 | endif
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| 94 | jmp unknown_service
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| 95 | device_ok:
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| 96 | mov ebx, 000f0000h
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| 97 | mov ecx, 0
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| 98 | mov edx, pcibios_protected
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| 99 | xor al, al
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| 100 | jmp bios32_end
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| 101 |
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| 102 | unknown_service:
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| 103 | mov al, 80h
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| 104 | bios32_end:
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| 105 | popfd
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| 106 | retf
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| 107 |
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| 108 | align 16
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| 109 | pcibios_protected:
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| 110 | pushfd
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| 111 | cli
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| 112 | push esi
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| 113 | push edi
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| 114 | cmp al, 1 ; installation check
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| 115 | jne pci_pro_f02
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| 116 |
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| 117 | mov bx, 0210h
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| 118 | mov cx, 0
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| 119 | mov edx, ' ICP' ; 0x20494350 "PCI "
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| 120 | mov al, 1
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| 121 | jmp pci_pro_ok
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| 122 |
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| 123 | pci_pro_f02: ;; find pci device
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| 124 | cmp al, 2
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| 125 | jne pci_pro_f03
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| 126 |
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| 127 | shl ecx, 16
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| 128 | mov cx, dx
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| 129 | xor ebx, ebx
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| 130 | mov di, 0
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| 131 | pci_pro_devloop:
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| 132 | call pci_pro_select_reg
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| 133 | mov dx, PCI_CFG2
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| 134 | in eax, dx
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| 135 | cmp eax, ecx
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| 136 | jne pci_pro_nextdev
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| 137 |
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| 138 | cmp si, 0
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| 139 | je pci_pro_ok
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| 140 |
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| 141 | dec si
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| 142 | pci_pro_nextdev:
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| 143 | inc ebx
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| 144 | cmp ebx, MAX_BUSDEVFN
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| 145 | jne pci_pro_devloop
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| 146 |
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| 147 | mov ah, 86h
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| 148 | jmp pci_pro_fail
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| 149 |
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| 150 | pci_pro_f03: ;; find class code
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| 151 | cmp al, 3
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| 152 | jne pci_pro_f08
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| 153 |
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| 154 | xor ebx, ebx
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| 155 | mov di, 8
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| 156 | pci_pro_devloop2:
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| 157 | call pci_pro_select_reg
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| 158 | mov dx, PCI_CFG2
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| 159 | in eax, dx
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| 160 | shr eax, 8
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| 161 | cmp eax, ecx
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| 162 | jne pci_pro_nextdev2
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| 163 |
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| 164 | cmp si, 0
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| 165 | je pci_pro_ok
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| 166 |
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| 167 | dec si
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| 168 | pci_pro_nextdev2:
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| 169 | inc ebx
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| 170 | cmp ebx, MAX_BUSDEVFN
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| 171 | jne pci_pro_devloop2
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| 172 |
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| 173 | mov ah, 86h
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| 174 | jmp pci_pro_fail
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| 175 |
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| 176 | pci_pro_f08: ;; read configuration byte
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| 177 | cmp al, 8
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| 178 | jne pci_pro_f09
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| 179 |
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| 180 | call pci_pro_select_reg
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| 181 | push edx
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| 182 | mov dx, di
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| 183 | and dx, 3
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| 184 | add dx, PCI_CFG2
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| 185 | in al, dx
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| 186 | pop edx
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| 187 | mov cl, al
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| 188 | jmp pci_pro_ok
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| 189 |
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| 190 | pci_pro_f09: ;; read configuration word
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| 191 | cmp al, 9
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| 192 | jne pci_pro_f0a
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| 193 |
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| 194 | call pci_pro_select_reg
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| 195 | push edx
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| 196 | mov dx, di
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| 197 | and dx, 2
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| 198 | add dx, PCI_CFG2
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| 199 | in ax, dx
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| 200 | pop edx
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| 201 | mov cx, ax
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| 202 | jmp pci_pro_ok
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| 203 |
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| 204 | pci_pro_f0a: ;; read configuration dword
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| 205 | cmp al, 0Ah
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| 206 | jne pci_pro_f0b
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| 207 |
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| 208 | call pci_pro_select_reg
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| 209 | push edx
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| 210 | mov dx, PCI_CFG2
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| 211 | in eax, dx
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| 212 | pop edx
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| 213 | mov ecx, eax
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| 214 | jmp pci_pro_ok
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| 215 |
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| 216 | pci_pro_f0b: ;; write configuration byte
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| 217 | cmp al, 0Bh
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| 218 | jne pci_pro_f0c
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| 219 |
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| 220 | call pci_pro_select_reg
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| 221 | push edx
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| 222 | mov dx, di
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| 223 | and dx, 3
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| 224 | add dx, PCI_CFG2
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| 225 | mov al, cl
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| 226 | out dx, al
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| 227 | pop edx
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| 228 | jmp pci_pro_ok
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| 229 |
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| 230 | pci_pro_f0c: ;; write configuration word
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| 231 | cmp al, 0Ch
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| 232 | jne pci_pro_f0d
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| 233 |
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| 234 | call pci_pro_select_reg
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| 235 | push edx
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| 236 | mov dx, di
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| 237 | and dx, 2
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| 238 | add dx, PCI_CFG2
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| 239 | mov ax, cx
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| 240 | out dx, ax
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| 241 | pop edx
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| 242 | jmp pci_pro_ok
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| 243 |
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| 244 | pci_pro_f0d: ;; write configuration dword
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| 245 | cmp al, 0Dh
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| 246 | jne pci_pro_unknown
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| 247 | call pci_pro_select_reg
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| 248 | push edx
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| 249 | mov dx, PCI_CFG2
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| 250 | mov eax, ecx
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| 251 | out dx, eax
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| 252 | pop edx
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| 253 | jmp pci_pro_ok
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| 254 |
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| 255 | pci_pro_unknown:
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| 256 | mov ah, 81h
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| 257 | pci_pro_fail:
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| 258 | pop edi
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| 259 | pop esi
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| 260 | popfd
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| 261 | stc
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| 262 | retf
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| 263 |
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| 264 | pci_pro_ok:
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| 265 | xor ah, ah
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| 266 | pop edi
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| 267 | pop esi
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| 268 | popfd
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| 269 | clc
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| 270 | retf
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| 271 |
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| 272 | pci_pro_select_reg:
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| 273 | push edx
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| 274 | mov eax, 800000h
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| 275 | mov ax, bx
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| 276 | shl eax, 8
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| 277 | and di, 0FFh
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| 278 | or ax, di
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| 279 | and al, 0FCh
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| 280 | mov dx, PCI_CFG1
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| 281 | out dx, eax
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| 282 | pop edx
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| 283 | ret
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| 284 |
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| 285 | BIOS32 ends
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| 286 |
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| 287 | endif ; BX_PCIBIOS
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| 288 |
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| 289 | end
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