pcibios.inc@ 38832

Last change on this file since 38832 was 38699, checked in by vboxsync, 14 years ago
Converted system BIOS to Watcom C.
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 10.2 KB

Line
1	;;
2	;; Copyright (C) 2006-2011 Oracle Corporation
3	;;
4	;; This file is part of VirtualBox Open Source Edition (OSE), as
5	;; available from http://www.virtualbox.org. This file is free software;
6	;; you can redistribute it and/or modify it under the terms of the GNU
7	;; General Public License (GPL) as published by the Free Software
8	;; Foundation, in version 2 as it comes in the "COPYING" file of the
9	;; VirtualBox OSE distribution. VirtualBox OSE is distributed in the
10	;; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
11	;; --------------------------------------------------------------------
12	;;
13	;; This code is based on:
14	;;
15	;; ROM BIOS for use with Bochs/Plex86/QEMU emulation environment
16	;;
17	;; Copyright (C) 2002 MandrakeSoft S.A.
18	;;
19	;; MandrakeSoft S.A.
20	;; 43, rue d'Aboukir
21	;; 75002 Paris - France
22	;; http://www.linux-mandrake.com/
23	;; http://www.mandrakesoft.com/
24	;;
25	;; This library is free software; you can redistribute it and/or
26	;; modify it under the terms of the GNU Lesser General Public
27	;; License as published by the Free Software Foundation; either
28	;; version 2 of the License, or (at your option) any later version.
29	;;
30	;; This library is distributed in the hope that it will be useful,
31	;; but WITHOUT ANY WARRANTY; without even the implied warranty of
32	;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
33	;; Lesser General Public License for more details.
34	;;
35	;; You should have received a copy of the GNU Lesser General Public
36	;; License along with this library; if not, write to the Free Software
37	;; Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
38	;;
39	;;
40
41	include pcicfg.inc
42
43	if BX_PCIBIOS
44
45	extrn pcibios_protected:near ; in a 32-bit segment
46
47	.386
48	pcibios_real:
49	push eax
50	push dx
51	ifdef PCI_FIXED_HOST_BRIDGE_1
52	mov eax, 80000000h
53	mov dx, PCI_CFG1
54	out dx, eax
55	mov dx, PCI_CFG2
56	in eax, dx
57	cmp eax, PCI_FIXED_HOST_BRIDGE_1
58	je pci_present
59	endif
60
61	ifdef PCI_FIXED_HOST_BRIDGE_2
62	; 1Eh << 11
63	mov eax, 8000f000h
64	mov dx, PCI_CFG1
65	out dx, eax
66	mov dx, PCI_CFG2
67	in eax, dx
68	cmp eax, PCI_FIXED_HOST_BRIDGE_2
69	je pci_present
70	endif
71	pop dx
72	pop eax
73	mov ah, 0FFh
74	stc
75	ret
76	pci_present:
77	pop dx
78	pop eax
79	cmp al, 1 ; installation check
80	jne pci_real_f02
81	mov ax, 0001h
82	mov bx, 0210h
83	mov cx, 0
84	mov edx, ' ICP' ; #0x20494350 "PCI "
85	;; @todo!
86	if 0
87	mov edi, 0f0000h
88	mov di, pcibios_protected
89	else
90	mov edi, pcibios_protected
91	endif
92	clc
93	ret
94
95	pci_real_f02: ;; find pci device
96	push esi
97	push edi
98	push edx
99	cmp al, 2
100	jne pci_real_f03
101
102	shl ecx, 16
103	mov cx, dx
104	xor ebx, ebx
105	mov di, 0
106	pci_real_devloop:
107	call pci_real_select_reg
108	mov dx, PCI_CFG2
109	in eax, dx
110	cmp eax, ecx
111	jne pci_real_nextdev
112
113	cmp si, 0
114	je pci_real_ok
115
116	dec si
117	pci_real_nextdev:
118	inc ebx
119	cmp ebx, 10000h
120	jne pci_real_devloop
121
122	mov dx, cx
123	shr ecx, 16
124	mov ax, 8602h
125	jmp pci_real_fail
126	pci_real_f03: ;; find class code
127	cmp al, 3
128	jne pci_real_f08
129	xor ebx, ebx
130	mov di, 8
131	pci_real_devloop2:
132	call pci_real_select_reg
133	mov dx, PCI_CFG2
134	in eax, dx
135	shr eax, 8
136	cmp eax, ecx
137	jne pci_real_nextdev2
138
139	cmp si, 0
140	je pci_real_ok
141
142	dec si
143	pci_real_nextdev2:
144	inc ebx
145	cmp ebx, 10000h
146	jne pci_real_devloop2
147
148	mov ax, 8603h
149	jmp pci_real_fail
150
151	pci_real_f08: ;; read configuration byte
152	cmp al, 8
153	jne pci_real_f09
154
155	call pci_real_select_reg
156	push dx
157	mov dx, di
158	and dx, 3
159	add dx, PCI_CFG2
160	in al, dx
161	pop dx
162	mov cl, al
163	jmp pci_real_ok
164
165	pci_real_f09: ;; read configuration word
166	cmp al, 9
167	jne pci_real_f0a
168
169	call pci_real_select_reg
170	push dx
171	mov dx, di
172	and dx, 2
173	add dx, PCI_CFG2
174	in ax, dx
175	pop dx
176	mov cx, ax
177	jmp pci_real_ok
178	pci_real_f0a: ;; read configuration dword
179	cmp al, 0Ah
180	jne pci_real_f0b
181
182	call pci_real_select_reg
183	push dx
184	mov dx, PCI_CFG2
185	in eax, dx
186	pop dx
187	mov ecx, eax
188	jmp pci_real_ok
189
190	pci_real_f0b: ;; write configuration byte
191	cmp al, 0Bh
192	jne pci_real_f0c
193
194	call pci_real_select_reg
195	push dx
196	mov dx, di
197	and dx, 3
198	add dx, PCI_CFG2
199	mov al, cl
200	out dx, al
201	pop dx
202	jmp pci_real_ok
203
204	pci_real_f0c: ;; write configuration word
205	cmp al, 0Ch
206	jne pci_real_f0d
207
208	call pci_real_select_reg
209	push dx
210	mov dx, di
211	and dx, 2
212	add dx, PCI_CFG2
213	mov ax, cx
214	out dx, ax
215	pop dx
216	jmp pci_real_ok
217
218	pci_real_f0d: ;; write configuration dword
219	cmp al, 0Dh
220	jne pci_real_f0e
221
222	call pci_real_select_reg
223	push dx
224	mov dx, PCI_CFG2
225	mov eax, ecx
226	out dx, eax
227	pop dx
228	jmp pci_real_ok
229
230	pci_real_f0e: ;; get irq routing options
231	cmp al, 0Eh
232	jne pci_real_unknown
233
234	cmp word ptr es:[di], pci_routing_table_structure_end - pci_routing_table_structure_start
235	jb pci_real_too_small
236
237	mov word ptr es:[di], pci_routing_table_structure_end - pci_routing_table_structure_start
238	pushf
239	push ds
240	push es
241	push cx
242	push si
243	push di
244	cld
245	mov si, pci_routing_table_structure_start
246	push cs
247	pop ds
248	mov cx, es:[di+2]
249	mov es, es:[di+4]
250	mov di, cx
251	mov cx, pci_routing_table_structure_end - pci_routing_table_structure_start
252	rep movsb
253	pop di
254	pop si
255	pop cx
256	pop es
257	pop ds
258	popf
259	mov bx, (1 shl 9) or (1 shl 11) ; #(1 << 9) \| (1 << 11) ;; irq 9 and 11 are used
260	jmp pci_real_ok
261
262	pci_real_too_small:
263	mov word ptr es:[di], pci_routing_table_structure_end - pci_routing_table_structure_start
264	mov ah, 89h
265	jmp pci_real_fail
266
267	pci_real_unknown:
268	mov ah, 81h
269	pci_real_fail:
270	pop edx
271	pop edi
272	pop esi
273	stc
274	ret
275	pci_real_ok:
276	xor ah, ah
277	pop edx
278	pop edi
279	pop esi
280	clc
281	ret
282
283	;; prepare from reading the PCI config space; on input:
284	;; bx = bus/dev/fn
285	;; di = offset into config space header
286	;; destroys eax and may modify di
287	pci_real_select_reg:
288	push dx
289	mov eax, 800000h
290	mov ax, bx
291	shl eax, 8
292	and di, 0FFh
293	or ax, di
294	and al, 0FCh
295	mov dx, PCI_CFG1
296	out dx, eax
297	pop dx
298	ret
299
300	if not BX_ROMBIOS32
301	pci_irq_list:
302	db 11, 10, 9, 5;
303
304	pcibios_init_sel_reg:
305	push eax
306	mov eax, 800000h
307	mov ax, bx
308	shl eax, 8
309	and dl, 0FCh
310	or al, dl
311	mov dx, PCI_CFG1
312	out dx, eax
313	pop eax
314	ret
315
316	pcibios_init_iomem_bases:
317	push bp
318	mov bp, sp
319	mov eax, 0E0000000h ; base for memory init
320	push eax
321	mov ax, 0C000h ; base for i/o init
322	push ax
323	mov ax, 010h ; start at base address #0
324	push ax
325	mov bx, 8
326	pci_init_io_loop1:
327	mov dl, 0
328	call pcibios_init_sel_reg
329	mov dx, PCI_CFG2
330	in ax, dx
331	cmp ax, 0FFFFh
332	jz next_pci_dev
333
334	ifndef VBOX ; This currently breaks restoring a previously saved state. */
335	mov dl, 4 ; disable i/o and memory space access
336	call pcibios_init_sel_reg
337	mov dx, PCI_CFG2
338	in al, dx
339	and al, 0FCh
340	out dx, al
341	pci_init_io_loop2:
342	mov dl, [bp-8]
343	call pcibios_init_sel_reg
344	mov dx, PCI_CFG2
345	in eax, dx
346	test al, 1
347	jnz init_io_base
348
349	mov ecx, eax
350	mov eax, 0FFFFFFFFh
351	out dx, eax
352	in eax, dx
353	cmp eax, ecx
354	je next_pci_base
355	xor eax, 0FFFFFFFFh
356	mov ecx, eax
357	mov eax, [bp-4]
358	out dx, eax
359	add eax, ecx ; calculate next free mem base
360	add eax, 01000000h
361	and eax, 0FF000000h
362	mov [bp-4], eax
363	jmp next_pci_base
364
365	init_io_base:
366	mov cx, ax
367	mov ax, 0FFFFh
368	out dx, ax
369	in ax, dx
370	cmp ax, cx
371	je next_pci_base
372
373	xor ax, 0FFFEh
374	mov cx, ax
375	mov ax, [bp-6]
376	out dx, ax
377	add ax, cx ; calculate next free i/o base
378	add ax, 00100h
379	and ax, 0FF00h
380	mov [bp-6], ax
381	next_pci_base:
382	mov al, [bp-8]
383	add al, 4
384	cmp al, 28h
385	je enable_iomem_space
386
387	mov byte ptr[bp-8], al
388	jmp pci_init_io_loop2
389	endif ; !VBOX
390
391	enable_iomem_space:
392	mov dl, 4 ;; enable i/o and memory space access if available
393	call pcibios_init_sel_reg
394	mov dx, PCI_CFG2
395	in al, dx
396	or al, 7
397	out dx, al
398	ifdef VBOX
399	mov dl, 0 ; check if PCI device is AMD PCNet
400	call pcibios_init_sel_reg
401	mov dx, PCI_CFG2
402	in eax, dx
403	cmp eax, 020001022h
404	jne next_pci_dev
405
406	mov dl, 10h ; get I/O address
407	call pcibios_init_sel_reg
408	mov dx, PCI_CFG2
409	in ax, dx
410	and ax, 0FFFCh
411	mov cx, ax
412	mov dx, cx
413	add dx, 14h ; reset register if PCNet is in word I/O mode
414	in ax, dx ; reset is performed by reading the reset register
415	mov dx, cx
416	add dx, 18h ; reset register if PCNet is in word I/O mode
417	in eax, dx ; reset is performed by reading the reset register
418	endif ; VBOX
419	next_pci_dev:
420	mov byte ptr[bp-8], 10h
421	inc bx
422	cmp bx, 0100h
423	jne pci_init_io_loop1
424	mov sp, bp
425	pop bp
426	ret
427
428	pcibios_init_set_elcr:
429	push ax
430	push cx
431	mov dx, 04D0h
432	test al, 8
433	jz is_master_pic
434
435	inc dx
436	and al, 7
437	is_master_pic:
438	mov cl, al
439	mov bl, 1
440	shl bl, cl
441	in al, dx
442	or al, bl
443	out dx, al
444	pop cx
445	pop ax
446	ret
447
448	pcibios_init_irqs:
449	push ds
450	push bp
451	mov ax, 0F000h
452	mov ds, ax
453	mov dx, 04D0h ;; reset ELCR1 + ELCR2
454	mov al, 0
455	out dx, al
456	inc dx
457	out dx, al
458	mov si, pci_routing_table_structure
459	mov bh, [si+8]
460	mov bl, [si+9]
461	mov dl, 0
462	call pcibios_init_sel_reg
463	mov dx, PCI_CFG2
464	in eax, dx
465	cmp eax, [si+12] ;; check irq router
466	jne pci_init_end
467
468	mov dl, [si+34]
469	call pcibios_init_sel_reg
470	push bx ;; save irq router bus + devfunc
471	mov dx, PCI_CFG2
472	mov ax, 8080h
473	out dx, ax ;; reset PIRQ route control
474	add dx, 2
475	out dx, ax
476	mov ax, [si+6]
477	sub ax, 20h
478	shr ax, 4
479	mov cx, ax
480	add si, 20h ;; set pointer to 1st entry
481	mov bp, sp
482	mov ax, pci_irq_list
483	push ax
484	xor ax, ax
485	push ax
486	pci_init_irq_loop1:
487	mov bh, [si]
488	mov bl, [si+1]
489	pci_init_irq_loop2:
490	mov dl, 0
491	call pcibios_init_sel_reg
492	mov dx, PCI_CFG2
493	in ax, dx
494	cmp ax, 0FFFFh
495	jnz pci_test_int_pin
496
497	test bl, 7
498	jz next_pir_entry
499
500	jmp next_pci_func
501
502	pci_test_int_pin:
503	mov dl, 3Ch
504	call pcibios_init_sel_reg
505	mov dx, PCI_CFG2 + 1 ; TODO: was #0x0cfd - is that right?
506	in al, dx
507	and al, 7
508	jz next_pci_func
509
510	dec al ;; determine pirq reg
511	mov dl, 3
512	mul dl
513	add al, 2
514	xor ah, ah
515	mov bx, ax
516	mov al, [si+bx]
517	mov dl, al
518	mov bx, [bp]
519	call pcibios_init_sel_reg
520	mov dx, PCI_CFG2
521	and al, 3
522	add dl, al
523	in al, dx
524	cmp al, 80h
525	jb pirq_found
526
527	mov bx, [bp-2] ;; pci irq list pointer
528	mov al, [bx]
529	out dx, al
530	inc bx
531	mov [bp-2], bx
532	call pcibios_init_set_elcr
533	pirq_found:
534	mov bh, [si]
535	mov bl, [si+1]
536	add bl, [bp-3] ;; pci function number
537	mov dl, 3Ch
538	call pcibios_init_sel_reg
539	mov dx, PCI_CFG2
540	out dx, al
541	next_pci_func:
542	inc byte ptr[bp-3]
543	inc bl
544	test bl, 7
545	jnz pci_init_irq_loop2
546
547	next_pir_entry:
548	add si, 10h
549	mov byte ptr[bp-3], 0
550	loop pci_init_irq_loop1
551
552	mov sp, bp
553	pop bx
554	pci_init_end:
555	pop bp
556	pop ds
557	ret
558
559	.286
560
561	endif ; !BX_ROMBIOS32
562
563	endif ; BX_PCIBIOS
564

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