| 1 | /* $Id: buslogic.c 98103 2023-01-17 14:15:46Z vboxsync $ */
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| 2 | /** @file
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| 3 | * BusLogic SCSI host adapter driver to boot from disks.
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| 4 | */
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| 5 |
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| 6 | /*
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| 7 | * Copyright (C) 2021-2023 Oracle and/or its affiliates.
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| 8 | *
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| 9 | * This file is part of VirtualBox base platform packages, as
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| 10 | * available from https://www.virtualbox.org.
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| 11 | *
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| 12 | * This program is free software; you can redistribute it and/or
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| 13 | * modify it under the terms of the GNU General Public License
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| 14 | * as published by the Free Software Foundation, in version 3 of the
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| 15 | * License.
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| 16 | *
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| 17 | * This program is distributed in the hope that it will be useful, but
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| 18 | * WITHOUT ANY WARRANTY; without even the implied warranty of
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| 19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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| 20 | * General Public License for more details.
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| 21 | *
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| 22 | * You should have received a copy of the GNU General Public License
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| 23 | * along with this program; if not, see <https://www.gnu.org/licenses>.
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| 24 | *
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| 25 | * SPDX-License-Identifier: GPL-3.0-only
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| 26 | */
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| 27 |
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| 28 | #include <stdint.h>
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| 29 | #include <string.h>
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| 30 | #include "biosint.h"
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| 31 | #include "ebda.h"
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| 32 | #include "inlines.h"
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| 33 | #include "pciutil.h"
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| 34 | #include "vds.h"
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| 35 | #include "scsi.h"
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| 36 |
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| 37 | //#define DEBUG_BUSLOGIC 1
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| 38 | #if DEBUG_BUSLOGIC
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| 39 | # define DBG_BUSLOGIC(...) BX_INFO(__VA_ARGS__)
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| 40 | #else
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| 41 | # define DBG_BUSLOGIC(...)
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| 42 | #endif
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| 43 |
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| 44 | #define BUSLOGICCOMMAND_DISABLE_HOST_ADAPTER_INTERRUPT 0x25
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| 45 | #define BUSLOGICCOMMAND_EXECUTE_SCSI_COMMAND 0x83
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| 46 |
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| 47 |
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| 48 | #define RT_BIT(bit) (1 << (bit))
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| 49 |
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| 50 | /** Register offsets in the I/O port space. */
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| 51 | #define BUSLOGIC_REGISTER_CONTROL 0 /**< Writeonly */
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| 52 | /** Fields for the control register. */
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| 53 | # define BL_CTRL_RSBUS RT_BIT(4) /* Reset SCSI Bus. */
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| 54 | # define BL_CTRL_RINT RT_BIT(5) /* Reset Interrupt. */
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| 55 | # define BL_CTRL_RSOFT RT_BIT(6) /* Soft Reset. */
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| 56 | # define BL_CTRL_RHARD RT_BIT(7) /* Hard Reset. */
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| 57 |
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| 58 | #define BUSLOGIC_REGISTER_STATUS 0 /**< Readonly */
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| 59 | /** Fields for the status register. */
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| 60 | # define BL_STAT_CMDINV RT_BIT(0) /* Command Invalid. */
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| 61 | # define BL_STAT_DIRRDY RT_BIT(2) /* Data In Register Ready. */
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| 62 | # define BL_STAT_CPRBSY RT_BIT(3) /* Command/Parameter Out Register Busy. */
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| 63 | # define BL_STAT_HARDY RT_BIT(4) /* Host Adapter Ready. */
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| 64 | # define BL_STAT_INREQ RT_BIT(5) /* Initialization Required. */
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| 65 | # define BL_STAT_DFAIL RT_BIT(6) /* Diagnostic Failure. */
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| 66 | # define BL_STAT_DACT RT_BIT(7) /* Diagnistic Active. */
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| 67 |
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| 68 | #define BUSLOGIC_REGISTER_COMMAND 1 /**< Writeonly */
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| 69 | #define BUSLOGIC_REGISTER_DATAIN 1 /**< Readonly */
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| 70 | #define BUSLOGIC_REGISTER_INTERRUPT 2 /**< Readonly */
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| 71 | /** Fields for the interrupt register. */
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| 72 | # define BL_INTR_IMBL RT_BIT(0) /* Incoming Mailbox Loaded. */
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| 73 | # define BL_INTR_OMBR RT_BIT(1) /* Outgoing Mailbox Available. */
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| 74 | # define BL_INTR_CMDC RT_BIT(2) /* Command Complete. */
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| 75 | # define BL_INTR_RSTS RT_BIT(3) /* SCSI Bus Reset State. */
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| 76 | # define BL_INTR_INTV RT_BIT(7) /* Interrupt Valid. */
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| 77 |
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| 78 | /**
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| 79 | * The structure for the "Execute SCSI Command" command.
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| 80 | */
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| 81 | typedef struct ESCMD
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| 82 | {
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| 83 | /** Data length. */
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| 84 | uint32_t cbData;
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| 85 | /** Data pointer. */
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| 86 | uint32_t u32PhysAddrData;
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| 87 | /** The device the request is sent to. */
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| 88 | uint8_t uTargetId;
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| 89 | /** The LUN in the device. */
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| 90 | uint8_t uLogicalUnit;
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| 91 | /** Reserved */
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| 92 | unsigned char uReserved1 : 3;
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| 93 | /** Data direction for the request. */
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| 94 | unsigned char uDataDirection : 2;
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| 95 | /** Reserved */
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| 96 | unsigned char uReserved2 : 3;
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| 97 | /** Length of the SCSI CDB. */
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| 98 | uint8_t cbCDB;
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| 99 | /** The SCSI CDB. (A CDB can be 12 bytes long.) */
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| 100 | uint8_t abCDB[16];
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| 101 | } ESCMD, *PESCMD;
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| 102 |
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| 103 | /**
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| 104 | * BusLogic-SCSI controller data.
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| 105 | */
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| 106 | typedef struct
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| 107 | {
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| 108 | /** The execute SCSI command. */
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| 109 | ESCMD EsCmd;
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| 110 | /** I/O base of device. */
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| 111 | uint16_t u16IoBase;
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| 112 | } buslogic_t;
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| 113 |
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| 114 | /* The BusLogic specific data must fit into 1KB (statically allocated). */
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| 115 | ct_assert(sizeof(buslogic_t) <= 1024);
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| 116 |
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| 117 | /**
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| 118 | * Converts a segment:offset pair into a 32bit physical address.
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| 119 | */
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| 120 | static uint32_t buslogic_addr_to_phys(void __far *ptr)
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| 121 | {
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| 122 | return ((uint32_t)FP_SEG(ptr) << 4) + FP_OFF(ptr);
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| 123 | }
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| 124 |
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| 125 | static int buslogic_cmd(buslogic_t __far *buslogic, uint8_t uCmd, uint8_t __far *pbReq, uint16_t cbReq,
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| 126 | uint8_t __far *pbReply, uint16_t cbReply)
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| 127 | {
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| 128 | uint16_t i;
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| 129 |
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| 130 | outb(buslogic->u16IoBase + BUSLOGIC_REGISTER_COMMAND, uCmd);
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| 131 | for (i = 0; i < cbReq; i++)
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| 132 | outb(buslogic->u16IoBase + BUSLOGIC_REGISTER_COMMAND, *pbReq++);
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| 133 |
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| 134 | /* Wait for the HBA to finish processing the command. */
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| 135 | if (cbReply)
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| 136 | {
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| 137 | while (!(inb(buslogic->u16IoBase + BUSLOGIC_REGISTER_STATUS) & BL_STAT_DIRRDY));
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| 138 | for (i = 0; i < cbReply; i++)
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| 139 | *pbReply++ = inb(buslogic->u16IoBase + BUSLOGIC_REGISTER_DATAIN);
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| 140 | }
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| 141 |
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| 142 | while (!(inb(buslogic->u16IoBase + BUSLOGIC_REGISTER_STATUS) & BL_STAT_HARDY));
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| 143 |
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| 144 | /* Clear interrupt status. */
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| 145 | outb(buslogic->u16IoBase + BUSLOGIC_REGISTER_CONTROL, BL_CTRL_RINT);
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| 146 |
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| 147 | return 0;
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| 148 | }
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| 149 |
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| 150 | int buslogic_scsi_cmd_data_out(void __far *pvHba, uint8_t idTgt, uint8_t __far *aCDB,
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| 151 | uint8_t cbCDB, uint8_t __far *buffer, uint32_t length)
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| 152 | {
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| 153 | buslogic_t __far *buslogic = (buslogic_t __far *)pvHba;
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| 154 | uint8_t abReply[4];
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| 155 | int i;
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| 156 | int rc;
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| 157 |
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| 158 | _fmemset(&buslogic->EsCmd, 0, sizeof(buslogic->EsCmd));
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| 159 | _fmemset(abReply, 0, sizeof(abReply));
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| 160 |
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| 161 | buslogic->EsCmd.cbData = length;
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| 162 | buslogic->EsCmd.u32PhysAddrData = buslogic_addr_to_phys(buffer);
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| 163 | buslogic->EsCmd.uTargetId = idTgt;
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| 164 | buslogic->EsCmd.uLogicalUnit = 0;
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| 165 | buslogic->EsCmd.uDataDirection = 0;
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| 166 | buslogic->EsCmd.cbCDB = cbCDB;
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| 167 |
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| 168 | for (i = 0; i < cbCDB; i++)
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| 169 | buslogic->EsCmd.abCDB[i] = aCDB[i];
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| 170 |
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| 171 | rc = buslogic_cmd(buslogic, BUSLOGICCOMMAND_EXECUTE_SCSI_COMMAND, (uint8_t __far *)&buslogic->EsCmd,
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| 172 | sizeof(buslogic->EsCmd) - sizeof(buslogic->EsCmd.abCDB) + cbCDB, &abReply[0], sizeof(abReply));
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| 173 | if (!rc)
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| 174 | rc = abReply[2];
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| 175 |
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| 176 | return rc;
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| 177 | }
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| 178 |
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| 179 | int buslogic_scsi_cmd_data_in(void __far *pvHba, uint8_t idTgt, uint8_t __far *aCDB,
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| 180 | uint8_t cbCDB, uint8_t __far *buffer, uint32_t length)
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| 181 | {
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| 182 | buslogic_t __far *buslogic = (buslogic_t __far *)pvHba;
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| 183 | uint8_t abReply[4];
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| 184 | int i;
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| 185 | int rc;
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| 186 |
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| 187 | DBG_BUSLOGIC("buslogic_scsi_cmd_data_in:\n");
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| 188 |
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| 189 | _fmemset(&buslogic->EsCmd, 0, sizeof(buslogic->EsCmd));
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| 190 | _fmemset(abReply, 0, sizeof(abReply));
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| 191 |
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| 192 | buslogic->EsCmd.cbData = length;
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| 193 | buslogic->EsCmd.u32PhysAddrData = buslogic_addr_to_phys(buffer);
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| 194 | buslogic->EsCmd.uTargetId = idTgt;
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| 195 | buslogic->EsCmd.uLogicalUnit = 0;
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| 196 | buslogic->EsCmd.uDataDirection = 0;
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| 197 | buslogic->EsCmd.cbCDB = cbCDB;
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| 198 |
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| 199 | for (i = 0; i < cbCDB; i++)
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| 200 | buslogic->EsCmd.abCDB[i] = aCDB[i];
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| 201 |
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| 202 | rc = buslogic_cmd(buslogic, BUSLOGICCOMMAND_EXECUTE_SCSI_COMMAND, (uint8_t __far *)&buslogic->EsCmd,
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| 203 | sizeof(buslogic->EsCmd) - sizeof(buslogic->EsCmd.abCDB) + cbCDB, &abReply[0], sizeof(abReply));
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| 204 | if (!rc)
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| 205 | rc = abReply[2];
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| 206 |
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| 207 | return rc;
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| 208 | }
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| 209 |
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| 210 | /**
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| 211 | * Initializes the BusLogic SCSI HBA and detects attached devices.
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| 212 | */
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| 213 | static int buslogic_scsi_hba_init(buslogic_t __far *buslogic)
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| 214 | {
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| 215 | /* Hard reset. */
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| 216 | outb(buslogic->u16IoBase + BUSLOGIC_REGISTER_CONTROL, BL_CTRL_RHARD);
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| 217 | while (!(inb(buslogic->u16IoBase + BUSLOGIC_REGISTER_STATUS) & BL_STAT_HARDY));
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| 218 |
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| 219 | return 0;
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| 220 | }
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| 221 |
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| 222 | /**
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| 223 | * Init the BusLogic SCSI driver and detect attached disks.
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| 224 | */
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| 225 | int buslogic_scsi_init(void __far *pvHba, uint8_t u8Bus, uint8_t u8DevFn)
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| 226 | {
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| 227 | buslogic_t __far *buslogic = (buslogic_t __far *)pvHba;
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| 228 | uint32_t u32Bar;
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| 229 |
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| 230 | DBG_BUSLOGIC("BusLogic SCSI HBA at Bus %u DevFn 0x%x (raw 0x%x)\n", u8Bus, u8DevFn);
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| 231 |
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| 232 | u32Bar = pci_read_config_dword(u8Bus, u8DevFn, 0x10);
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| 233 |
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| 234 | DBG_BUSLOGIC("BAR at 0x10 : 0x%x\n", u32Bar);
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| 235 |
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| 236 | if ((u32Bar & 0x01) != 0)
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| 237 | {
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| 238 | uint16_t u16IoBase = (u32Bar & 0xfff0);
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| 239 |
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| 240 | /* Enable PCI memory, I/O, bus mastering access in command register. */
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| 241 | pci_write_config_word(u8Bus, u8DevFn, 4, 0x7);
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| 242 |
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| 243 | DBG_BUSLOGIC("I/O base: 0x%x\n", u16IoBase);
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| 244 | buslogic->u16IoBase = u16IoBase;
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| 245 | return buslogic_scsi_hba_init(buslogic);
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| 246 | }
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| 247 | else
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| 248 | DBG_BUSLOGIC("BAR is MMIO\n");
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| 249 |
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| 250 | return 1;
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| 251 | }
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