DevFwCommon.cpp@ 28345

Last change on this file since 28345 was 28203, checked in by vboxsync, 15 years ago
DevPcBios,DevEFI,DevFWCommon: Don't reconstruct the MPS table at reset, just replant the MPS table pointer.
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 33.0 KB

Line
1	/* $Id: DevFwCommon.cpp 28203 2010-04-12 12:58:12Z vboxsync $ */
2	/** @file
3	* FwCommon - Shared firmware code (used by DevPcBios & DevEFI).
4	*/
5
6	/*
7	* Copyright (C) 2009 Sun Microsystems, Inc.
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*
17	* Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18	* Clara, CA 95054 USA or visit http://www.sun.com if you need
19	* additional information or have any questions.
20	*/
21
22	/*******************************************************************************
23	* Header Files *
24	*******************************************************************************/
25	#define LOG_GROUP LOG_GROUP_DEV
26	#include <VBox/pdmdev.h>
27
28	#include <VBox/log.h>
29	#include <VBox/err.h>
30	#include <VBox/param.h>
31
32	#include <iprt/assert.h>
33	#include <iprt/buildconfig.h>
34	#include <iprt/file.h>
35	#include <iprt/mem.h>
36	#include <iprt/string.h>
37	#include <iprt/uuid.h>
38	#include <iprt/system.h>
39
40	#include "../Builtins.h"
41	#include "../Builtins2.h"
42	#include "DevFwCommon.h"
43
44
45	/*******************************************************************************
46	* Defined Constants And Macros *
47	*******************************************************************************/
48
49	/*
50	* Default DMI data (legacy).
51	* Don't change this information otherwise Windows guests will demand re-activation!
52	*/
53	static const int32_t s_iDefDmiBIOSReleaseMajor = 0;
54	static const int32_t s_iDefDmiBIOSReleaseMinor = 0;
55	static const int32_t s_iDefDmiBIOSFirmwareMajor = 0;
56	static const int32_t s_iDefDmiBIOSFirmwareMinor = 0;
57	static const char *s_szDefDmiBIOSVendor = "innotek GmbH";
58	static const char *s_szDefDmiBIOSVersion = "VirtualBox";
59	static const char *s_szDefDmiBIOSReleaseDate = "12/01/2006";
60	static const char *s_szDefDmiSystemVendor = "innotek GmbH";
61	static const char *s_szDefDmiSystemProduct = "VirtualBox";
62	static const char *s_szDefDmiSystemVersion = "1.2";
63	static const char *s_szDefDmiSystemSerial = "0";
64	static const char *s_szDefDmiSystemFamily = "Virtual Machine";
65	static const char *s_szDefDmiChassisVendor = "Sun Microsystems, Inc.";
66	static const char *s_szDefDmiChassisVersion = "";
67	static const char *s_szDefDmiChassisSerial = "";
68	static const char *s_szDefDmiChassisAssetTag = "";
69
70	static char g_szHostDmiSystemProduct[64];
71	static char g_szHostDmiSystemVersion[64];
72
73
74	/*******************************************************************************
75	* Structures and Typedefs *
76	*******************************************************************************/
77	#pragma pack(1)
78
79	typedef struct SMBIOSHDR
80	{
81	uint8_t au8Signature[4];
82	uint8_t u8Checksum;
83	uint8_t u8Eps;
84	uint8_t u8VersionMajor;
85	uint8_t u8VersionMinor;
86	uint16_t u16MaxStructureSize;
87	uint8_t u8EntryPointRevision;
88	uint8_t u8Pad[5];
89	} *SMBIOSHDRPTR;
90	AssertCompileSize(SMBIOSHDR, 16);
91
92	typedef struct DMIMAINHDR
93	{
94	uint8_t au8Signature[5];
95	uint8_t u8Checksum;
96	uint16_t u16TablesLength;
97	uint32_t u32TableBase;
98	uint16_t u16TableEntries;
99	uint8_t u8TableVersion;
100	} *DMIMAINHDRPTR;
101	AssertCompileSize(DMIMAINHDR, 15);
102
103	/** DMI header */
104	typedef struct DMIHDR
105	{
106	uint8_t u8Type;
107	uint8_t u8Length;
108	uint16_t u16Handle;
109	} *PDMIHDR;
110	AssertCompileSize(DMIHDR, 4);
111
112	/** DMI BIOS information (Type 0) */
113	typedef struct DMIBIOSINF
114	{
115	DMIHDR header;
116	uint8_t u8Vendor;
117	uint8_t u8Version;
118	uint16_t u16Start;
119	uint8_t u8Release;
120	uint8_t u8ROMSize;
121	uint64_t u64Characteristics;
122	uint8_t u8CharacteristicsByte1;
123	uint8_t u8CharacteristicsByte2;
124	uint8_t u8ReleaseMajor;
125	uint8_t u8ReleaseMinor;
126	uint8_t u8FirmwareMajor;
127	uint8_t u8FirmwareMinor;
128	} *PDMIBIOSINF;
129	AssertCompileSize(DMIBIOSINF, 0x18);
130
131	/** DMI system information (Type 1) */
132	typedef struct DMISYSTEMINF
133	{
134	DMIHDR header;
135	uint8_t u8Manufacturer;
136	uint8_t u8ProductName;
137	uint8_t u8Version;
138	uint8_t u8SerialNumber;
139	uint8_t au8Uuid[16];
140	uint8_t u8WakeupType;
141	uint8_t u8SKUNumber;
142	uint8_t u8Family;
143	} *PDMISYSTEMINF;
144	AssertCompileSize(DMISYSTEMINF, 0x1b);
145
146	/** DMI board (or module) information (Type 2) */
147	typedef struct DMIBOARDINF
148	{
149	DMIHDR header;
150	uint8_t u8Manufacturer;
151	uint8_t u8Product;
152	uint8_t u8Version;
153	uint8_t u8SerialNumber;
154	uint8_t u8AssetTag;
155	uint8_t u8FeatureFlags;
156	uint8_t u8LocationInChassis;
157	uint16_t u16ChassisHandle;
158	uint8_t u8BoardType;
159	uint8_t u8cObjectHandles;
160	} *PDMIBOARDINF;
161	AssertCompileSize(DMIBOARDINF, 0x0f);
162
163	/** DMI system enclosure or chassis type (Type 3) */
164	typedef struct DMICHASSIS
165	{
166	DMIHDR header;
167	uint8_t u8Manufacturer;
168	uint8_t u8Type;
169	uint8_t u8Version;
170	uint8_t u8SerialNumber;
171	uint8_t u8AssetTag;
172	uint8_t u8BootupState;
173	uint8_t u8PowerSupplyState;
174	uint8_t u8ThermalState;
175	uint8_t u8SecurityStatus;
176	/* v2.3+, currently not supported */
177	uint32_t u32OEMdefined;
178	uint8_t u8Height;
179	uint8_t u8NumPowerChords;
180	uint8_t u8ContElems;
181	uint8_t u8ContElemRecLen;
182	} *PDMICHASSIS;
183	AssertCompileSize(DMICHASSIS, 0x15);
184
185	/** DMI processor information (Type 4) */
186	typedef struct DMIPROCESSORINF
187	{
188	DMIHDR header;
189	uint8_t u8SocketDesignation;
190	uint8_t u8ProcessorType;
191	uint8_t u8ProcessorFamily;
192	uint8_t u8ProcessorManufacturer;
193	uint64_t u64ProcessorIdentification;
194	uint8_t u8ProcessorVersion;
195	uint8_t u8Voltage;
196	uint16_t u16ExternalClock;
197	uint16_t u16MaxSpeed;
198	uint16_t u16CurrentSpeed;
199	uint8_t u8Status;
200	uint8_t u8ProcessorUpgrade;
201	uint16_t u16L1CacheHandle;
202	uint16_t u16L2CacheHandle;
203	uint16_t u16L3CacheHandle;
204	uint8_t u8SerialNumber;
205	uint8_t u8AssetTag;
206	uint8_t u8PartNumber;
207	uint8_t u8CoreCount;
208	uint8_t u8CoreEnabled;
209	uint8_t u8ThreadCount;
210	uint16_t u16ProcessorCharacteristics;
211	uint16_t u16ProcessorFamily2;
212	} *PDMIPROCESSORINF;
213	AssertCompileSize(DMIPROCESSORINF, 0x2a);
214
215	/** DMI OEM strings (Type 11) */
216	typedef struct DMIOEMSTRINGS
217	{
218	DMIHDR header;
219	uint8_t u8Count;
220	uint8_t u8VBoxVersion;
221	uint8_t u8VBoxRevision;
222	} *PDMIOEMSTRINGS;
223	AssertCompileSize(DMIOEMSTRINGS, 0x7);
224
225	/** MPS floating pointer structure */
226	typedef struct MPSFLOATPTR
227	{
228	uint8_t au8Signature[4];
229	uint32_t u32MPSAddr;
230	uint8_t u8Length;
231	uint8_t u8SpecRev;
232	uint8_t u8Checksum;
233	uint8_t au8Feature[5];
234	} *PMPSFLOATPTR;
235	AssertCompileSize(MPSFLOATPTR, 16);
236
237	/** MPS config table header */
238	typedef struct MPSCFGTBLHEADER
239	{
240	uint8_t au8Signature[4];
241	uint16_t u16Length;
242	uint8_t u8SpecRev;
243	uint8_t u8Checksum;
244	uint8_t au8OemId[8];
245	uint8_t au8ProductId[12];
246	uint32_t u32OemTablePtr;
247	uint16_t u16OemTableSize;
248	uint16_t u16EntryCount;
249	uint32_t u32AddrLocalApic;
250	uint16_t u16ExtTableLength;
251	uint8_t u8ExtTableChecksum;
252	uint8_t u8Reserved;
253	} *PMPSCFGTBLHEADER;
254	AssertCompileSize(MPSCFGTBLHEADER, 0x2c);
255
256	/** MPS processor entry */
257	typedef struct MPSPROCENTRY
258	{
259	uint8_t u8EntryType;
260	uint8_t u8LocalApicId;
261	uint8_t u8LocalApicVersion;
262	uint8_t u8CPUFlags;
263	uint32_t u32CPUSignature;
264	uint32_t u32CPUFeatureFlags;
265	uint32_t u32Reserved[2];
266	} *PMPSPROCENTRY;
267	AssertCompileSize(MPSPROCENTRY, 20);
268
269	/** MPS bus entry */
270	typedef struct MPSBUSENTRY
271	{
272	uint8_t u8EntryType;
273	uint8_t u8BusId;
274	uint8_t au8BusTypeStr[6];
275	} *PMPSBUSENTRY;
276	AssertCompileSize(MPSBUSENTRY, 8);
277
278	/** MPS I/O-APIC entry */
279	typedef struct MPSIOAPICENTRY
280	{
281	uint8_t u8EntryType;
282	uint8_t u8Id;
283	uint8_t u8Version;
284	uint8_t u8Flags;
285	uint32_t u32Addr;
286	} *PMPSIOAPICENTRY;
287	AssertCompileSize(MPSIOAPICENTRY, 8);
288
289	/** MPS I/O-Interrupt entry */
290	typedef struct MPSIOINTERRUPTENTRY
291	{
292	uint8_t u8EntryType;
293	uint8_t u8Type;
294	uint16_t u16Flags;
295	uint8_t u8SrcBusId;
296	uint8_t u8SrcBusIrq;
297	uint8_t u8DstIOAPICId;
298	uint8_t u8DstIOAPICInt;
299	} *PMPSIOIRQENTRY;
300	AssertCompileSize(MPSIOINTERRUPTENTRY, 8);
301
302	#pragma pack()
303
304
305	/**
306	* Calculate a simple checksum for the MPS table.
307	*
308	* @param data data
309	* @param len size of data
310	*/
311	static uint8_t fwCommonChecksum(const uint8_t * const au8Data, uint32_t u32Length)
312	{
313	uint8_t u8Sum = 0;
314	for (size_t i = 0; i < u32Length; ++i)
315	u8Sum += au8Data[i];
316	return -u8Sum;
317	}
318
319	static bool fwCommonChecksumOk(const uint8_t * const au8Data, uint32_t u32Length)
320	{
321	uint8_t u8Sum = 0;
322	for (size_t i = 0; i < u32Length; i++)
323	u8Sum += au8Data[i];
324	return (u8Sum == 0);
325	}
326
327	/*
328	* Macmini2,1 - matches Mac Mini
329	*/
330	static void fwCommonUseHostDMIStrings(void)
331	{
332	int rc;
333
334	rc = RTSystemQueryDmiString(RTSYSDMISTR_PRODUCT_NAME,
335	g_szHostDmiSystemProduct, sizeof(g_szHostDmiSystemProduct));
336	if (RT_SUCCESS(rc))
337	{
338	s_szDefDmiSystemProduct = g_szHostDmiSystemProduct;
339	LogRel(("DMI: Using DmiSystemProduct from host: %s\n", g_szHostDmiSystemProduct));
340	}
341
342	rc = RTSystemQueryDmiString(RTSYSDMISTR_PRODUCT_VERSION,
343	g_szHostDmiSystemVersion, sizeof(g_szHostDmiSystemVersion));
344	if (RT_SUCCESS(rc))
345	{
346	s_szDefDmiSystemVersion = g_szHostDmiSystemVersion;
347	LogRel(("DMI: Using DmiSystemVersion from host: %s\n", g_szHostDmiSystemVersion));
348	}
349	}
350
351	/**
352	* Construct the DMI table.
353	*
354	* @returns VBox status code.
355	* @param pDevIns The device instance.
356	* @param pTable Where to create the DMI table.
357	* @param cbMax The maximum size of the DMI table.
358	* @param pUuid Pointer to the UUID to use if the DmiUuid
359	* configuration string isn't present.
360	* @param pCfg The handle to our config node.
361	* @param fPutSmbiosHeaders Plant SMBIOS headers if true.
362	*/
363	int FwCommonPlantDMITable(PPDMDEVINS pDevIns, uint8_t *pTable, unsigned cbMax, PCRTUUID pUuid,
364	PCFGMNODE pCfg, bool fPutSmbiosHeaders)
365	{
366	#define CHECKSIZE(cbWant) \
367	{ \
368	size_t cbNeed = (size_t)(pszStr + cbWant - (char )pTable) + 5; / +1 for strtab terminator +4 for end-of-table entry */ \
369	if (cbNeed > cbMax) \
370	{ \
371	if (fHideErrors) \
372	{ \
373	LogRel(("One of the DMI strings is too long -- using default DMI data!\n")); \
374	continue; \
375	} \
376	return PDMDevHlpVMSetError(pDevIns, VERR_TOO_MUCH_DATA, RT_SRC_POS, \
377	N_("One of the DMI strings is too long. Check all bios/Dmi* configuration entries. At least %zu bytes are needed but there is no space for more than %d bytes"), cbNeed, cbMax); \
378	} \
379	}
380
381	#define READCFGSTRDEF(variable, name, default_value) \
382	{ \
383	if (fForceDefault) \
384	pszTmp = default_value; \
385	else \
386	{ \
387	rc = CFGMR3QueryStringDef(pCfg, name, szBuf, sizeof(szBuf), default_value); \
388	if (RT_FAILURE(rc)) \
389	{ \
390	if (fHideErrors) \
391	{ \
392	LogRel(("Configuration error: Querying \"" name "\" as a string failed -- using default DMI data!\n")); \
393	continue; \
394	} \
395	return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, \
396	N_("Configuration error: Querying \"" name "\" as a string failed")); \
397	} \
398	else if (!strcmp(szBuf, "<EMPTY>")) \
399	pszTmp = ""; \
400	else \
401	pszTmp = szBuf; \
402	} \
403	if (!pszTmp[0]) \
404	variable = 0; /* empty string */ \
405	else \
406	{ \
407	variable = iStrNr++; \
408	size_t cStr = strlen(pszTmp) + 1; \
409	CHECKSIZE(cStr); \
410	memcpy(pszStr, pszTmp, cStr); \
411	pszStr += cStr ; \
412	} \
413	}
414
415	#define READCFGSTR(variable, name) \
416	READCFGSTRDEF(variable, # name, s_szDef ## name)
417
418	#define READCFGINT(variable, name) \
419	{ \
420	if (fForceDefault) \
421	variable = s_iDef ## name; \
422	else \
423	{ \
424	rc = CFGMR3QueryS32Def(pCfg, # name, & variable, s_iDef ## name); \
425	if (RT_FAILURE(rc)) \
426	{ \
427	if (fHideErrors) \
428	{ \
429	LogRel(("Configuration error: Querying \"" # name "\" as an int failed -- using default DMI data!\n")); \
430	continue; \
431	} \
432	return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, \
433	N_("Configuration error: Querying \"" # name "\" as an int failed")); \
434	} \
435	} \
436	}
437
438	#define TERM_STRUCT \
439	{ \
440	pszStr++ = '\0'; / terminate set of text strings */ \
441	if (iStrNr == 1) \
442	pszStr++ = '\0'; / terminate a structure without strings */ \
443	}
444
445	bool fForceDefault = false;
446	#ifdef VBOX_BIOS_DMI_FALLBACK
447	/*
448	* There will be two passes. If an error occurs during the first pass, a
449	* message will be written to the release log and we fall back to default
450	* DMI data and start a second pass.
451	*/
452	bool fHideErrors = true;
453	#else
454	/*
455	* There will be one pass, every error is fatal and will prevent the VM
456	* from starting.
457	*/
458	bool fHideErrors = false;
459	#endif
460
461	uint8_t fDmiUseHostInfo;
462	int rc = CFGMR3QueryU8Def(pCfg, "DmiUseHostInfo", &fDmiUseHostInfo, 0);
463	if (RT_FAILURE (rc))
464	return PDMDEV_SET_ERROR(pDevIns, rc,
465	N_("Configuration error: Failed to read \"DmiUseHostInfo\""));
466
467	/* Sync up with host default DMI values */
468	if (fDmiUseHostInfo)
469	fwCommonUseHostDMIStrings();
470
471	for (;; fForceDefault = true, fHideErrors = false)
472	{
473	int iStrNr;
474	char szBuf[256];
475	char pszStr = (char )pTable;
476	char szDmiSystemUuid[64];
477	char *pszDmiSystemUuid;
478	const char *pszTmp;
479
480	if (fForceDefault)
481	pszDmiSystemUuid = NULL;
482	else
483	{
484	rc = CFGMR3QueryString(pCfg, "DmiSystemUuid", szDmiSystemUuid, sizeof(szDmiSystemUuid));
485	if (rc == VERR_CFGM_VALUE_NOT_FOUND)
486	pszDmiSystemUuid = NULL;
487	else if (RT_FAILURE(rc))
488	{
489	if (fHideErrors)
490	{
491	LogRel(("Configuration error: Querying \"DmiSystemUuid\" as a string failed, using default DMI data\n"));
492	continue;
493	}
494	return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
495	N_("Configuration error: Querying \"DmiSystemUuid\" as a string failed"));
496	}
497	else
498	pszDmiSystemUuid = szDmiSystemUuid;
499	}
500
501	/*********************************
502	* DMI BIOS information (Type 0) *
503	*********************************/
504	PDMIBIOSINF pBIOSInf = (PDMIBIOSINF)pszStr;
505	CHECKSIZE(sizeof(*pBIOSInf));
506
507	pszStr = (char *)&pBIOSInf->u8ReleaseMajor;
508	pBIOSInf->header.u8Length = RT_OFFSETOF(DMIBIOSINF, u8ReleaseMajor);
509
510	/* don't set these fields by default for legacy compatibility */
511	int iDmiBIOSReleaseMajor, iDmiBIOSReleaseMinor;
512	READCFGINT(iDmiBIOSReleaseMajor, DmiBIOSReleaseMajor);
513	READCFGINT(iDmiBIOSReleaseMinor, DmiBIOSReleaseMinor);
514	if (iDmiBIOSReleaseMajor != 0 \|\| iDmiBIOSReleaseMinor != 0)
515	{
516	pszStr = (char *)&pBIOSInf->u8FirmwareMajor;
517	pBIOSInf->header.u8Length = RT_OFFSETOF(DMIBIOSINF, u8FirmwareMajor);
518	pBIOSInf->u8ReleaseMajor = iDmiBIOSReleaseMajor;
519	pBIOSInf->u8ReleaseMinor = iDmiBIOSReleaseMinor;
520
521	int iDmiBIOSFirmwareMajor, iDmiBIOSFirmwareMinor;
522	READCFGINT(iDmiBIOSFirmwareMajor, DmiBIOSFirmwareMajor);
523	READCFGINT(iDmiBIOSFirmwareMinor, DmiBIOSFirmwareMinor);
524	if (iDmiBIOSFirmwareMajor != 0 \|\| iDmiBIOSFirmwareMinor != 0)
525	{
526	pszStr = (char *)(pBIOSInf + 1);
527	pBIOSInf->header.u8Length = sizeof(DMIBIOSINF);
528	pBIOSInf->u8FirmwareMajor = iDmiBIOSFirmwareMajor;
529	pBIOSInf->u8FirmwareMinor = iDmiBIOSFirmwareMinor;
530	}
531	}
532
533	iStrNr = 1;
534	pBIOSInf->header.u8Type = 0; /* BIOS Information */
535	pBIOSInf->header.u16Handle = 0x0000;
536	READCFGSTR(pBIOSInf->u8Vendor, DmiBIOSVendor);
537	READCFGSTR(pBIOSInf->u8Version, DmiBIOSVersion);
538	pBIOSInf->u16Start = 0xE000;
539	READCFGSTR(pBIOSInf->u8Release, DmiBIOSReleaseDate);
540	pBIOSInf->u8ROMSize = 1; /* 128K */
541	pBIOSInf->u64Characteristics = RT_BIT(4) /* ISA is supported */
542	\| RT_BIT(7) /* PCI is supported */
543	\| RT_BIT(15) /* Boot from CD is supported */
544	\| RT_BIT(16) /* Selectable Boot is supported */
545	\| RT_BIT(27) /* Int 9h, 8042 Keyboard services supported */
546	\| RT_BIT(30) /* Int 10h, CGA/Mono Video Services supported */
547	/* any more?? */
548	;
549	pBIOSInf->u8CharacteristicsByte1 = RT_BIT(0) /* ACPI is supported */
550	/* any more?? */
551	;
552	pBIOSInf->u8CharacteristicsByte2 = 0
553	/* any more?? */
554	;
555	TERM_STRUCT;
556
557	/***********************************
558	* DMI system information (Type 1) *
559	***********************************/
560	PDMISYSTEMINF pSystemInf = (PDMISYSTEMINF)pszStr;
561	CHECKSIZE(sizeof(*pSystemInf));
562	pszStr = (char *)(pSystemInf + 1);
563	iStrNr = 1;
564	pSystemInf->header.u8Type = 1; /* System Information */
565	pSystemInf->header.u8Length = sizeof(*pSystemInf);
566	pSystemInf->header.u16Handle = 0x0001;
567	READCFGSTR(pSystemInf->u8Manufacturer, DmiSystemVendor);
568	READCFGSTR(pSystemInf->u8ProductName, DmiSystemProduct);
569	READCFGSTR(pSystemInf->u8Version, DmiSystemVersion);
570	READCFGSTR(pSystemInf->u8SerialNumber, DmiSystemSerial);
571
572	RTUUID uuid;
573	if (pszDmiSystemUuid)
574	{
575	rc = RTUuidFromStr(&uuid, pszDmiSystemUuid);
576	if (RT_FAILURE(rc))
577	{
578	if (fHideErrors)
579	{
580	LogRel(("Configuration error: Invalid UUID for DMI tables specified, using default DMI data\n"));
581	continue;
582	}
583	return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
584	N_("Configuration error: Invalid UUID for DMI tables specified"));
585	}
586	uuid.Gen.u32TimeLow = RT_H2BE_U32(uuid.Gen.u32TimeLow);
587	uuid.Gen.u16TimeMid = RT_H2BE_U16(uuid.Gen.u16TimeMid);
588	uuid.Gen.u16TimeHiAndVersion = RT_H2BE_U16(uuid.Gen.u16TimeHiAndVersion);
589	pUuid = &uuid;
590	}
591	memcpy(pSystemInf->au8Uuid, pUuid, sizeof(RTUUID));
592
593	pSystemInf->u8WakeupType = 6; /* Power Switch */
594	pSystemInf->u8SKUNumber = 0;
595	READCFGSTR(pSystemInf->u8Family, DmiSystemFamily);
596	TERM_STRUCT;
597
598	/********************************************
599	* DMI System Enclosure or Chassis (Type 3) *
600	********************************************/
601	PDMICHASSIS pChassis = (PDMICHASSIS)pszStr;
602	CHECKSIZE(sizeof(*pChassis));
603	pszStr = (char*)&pChassis->u32OEMdefined;
604	iStrNr = 1;
605	#ifdef VBOX_WITH_DMI_CHASSIS
606	pChassis->header.u8Type = 3; /* System Enclosure or Chassis */
607	#else
608	pChassis->header.u8Type = 0x7e; /* inactive */
609	#endif
610	pChassis->header.u8Length = RT_OFFSETOF(DMICHASSIS, u32OEMdefined);
611	pChassis->header.u16Handle = 0x0003;
612	READCFGSTR(pChassis->u8Manufacturer, DmiChassisVendor);
613	pChassis->u8Type = 0x01; /* ''other'', no chassis lock present */
614	READCFGSTR(pChassis->u8Version, DmiChassisVersion);
615	READCFGSTR(pChassis->u8SerialNumber, DmiChassisSerial);
616	READCFGSTR(pChassis->u8AssetTag, DmiChassisAssetTag);
617	pChassis->u8BootupState = 0x03; /* safe */
618	pChassis->u8PowerSupplyState = 0x03; /* safe */
619	pChassis->u8ThermalState = 0x03; /* safe */
620	pChassis->u8SecurityStatus = 0x03; /* none XXX */
621	# if 0
622	/* v2.3+, currently not supported */
623	pChassis->u32OEMdefined = 0;
624	pChassis->u8Height = 0; /* unspecified */
625	pChassis->u8NumPowerChords = 0; /* unspecified */
626	pChassis->u8ContElems = 0; /* no contained elements */
627	pChassis->u8ContElemRecLen = 0; /* no contained elements */
628	# endif
629	TERM_STRUCT;
630
631	/*****************************
632	* DMI OEM strings (Type 11) *
633	*****************************/
634	PDMIOEMSTRINGS pOEMStrings = (PDMIOEMSTRINGS)pszStr;
635	CHECKSIZE(sizeof(*pOEMStrings));
636	pszStr = (char *)(pOEMStrings + 1);
637	iStrNr = 1;
638	#ifdef VBOX_WITH_DMI_OEMSTRINGS
639	pOEMStrings->header.u8Type = 0xb; /* OEM Strings */
640	#else
641	pOEMStrings->header.u8Type = 0x7e; /* inactive */
642	#endif
643	pOEMStrings->header.u8Length = sizeof(*pOEMStrings);
644	pOEMStrings->header.u16Handle = 0x0002;
645	pOEMStrings->u8Count = 2;
646
647	char szTmp[64];
648	RTStrPrintf(szTmp, sizeof(szTmp), "vboxVer_%u.%u.%u",
649	RTBldCfgVersionMajor(), RTBldCfgVersionMinor(), RTBldCfgVersionBuild());
650	READCFGSTRDEF(pOEMStrings->u8VBoxVersion, "DmiOEMVBoxVer", szTmp);
651	RTStrPrintf(szTmp, sizeof(szTmp), "vboxRev_%u", RTBldCfgRevision());
652	READCFGSTRDEF(pOEMStrings->u8VBoxRevision, "DmiOEMVBoxRev", szTmp);
653	TERM_STRUCT;
654
655	/* End-of-table marker - includes padding to account for fixed table size. */
656	PDMIHDR pEndOfTable = (PDMIHDR)pszStr;
657	pEndOfTable->u8Type = 0x7f;
658	pEndOfTable->u8Length = cbMax - ((char )pszStr - (char )pTable) - 2;
659	pEndOfTable->u16Handle = 0xFEFF;
660
661	/* If more fields are added here, fix the size check in READCFGSTR */
662
663	/* Success! */
664	break;
665	}
666
667	#undef READCFGSTR
668	#undef READCFGINT
669	#undef CHECKSIZE
670
671	if (fPutSmbiosHeaders)
672	{
673	struct {
674	struct SMBIOSHDR smbios;
675	struct DMIMAINHDR dmi;
676	} aBiosHeaders
677	=
678	{
679	// The SMBIOS header
680	{
681	{ 0x5f, 0x53, 0x4d, 0x5f}, // "_SM_" signature
682	0x00, // checksum
683	0x1f, // EPS length, defined by standard
684	VBOX_SMBIOS_MAJOR_VER, // SMBIOS major version
685	VBOX_SMBIOS_MINOR_VER, // SMBIOS minor version
686	VBOX_SMBIOS_MAXSS, // Maximum structure size
687	0x00, // Entry point revision
688	{ 0x00, 0x00, 0x00, 0x00, 0x00 } // padding
689	},
690	// The DMI header
691	{
692	{ 0x5f, 0x44, 0x4d, 0x49, 0x5f }, // "_DMI_" signature
693	0x00, // checksum
694	VBOX_DMI_TABLE_SIZE, // DMI tables length
695	VBOX_DMI_TABLE_BASE, // DMI tables base
696	VBOX_DMI_TABLE_ENTR, // DMI tables entries
697	VBOX_DMI_TABLE_VER, // DMI version
698	}
699	};
700
701	aBiosHeaders.smbios.u8Checksum = fwCommonChecksum((uint8_t*)&aBiosHeaders.smbios, sizeof(aBiosHeaders.smbios));
702	aBiosHeaders.dmi.u8Checksum = fwCommonChecksum((uint8_t*)&aBiosHeaders.dmi, sizeof(aBiosHeaders.dmi));
703
704	PDMDevHlpPhysWrite (pDevIns, 0xfe300, &aBiosHeaders, sizeof(aBiosHeaders));
705	}
706
707	return VINF_SUCCESS;
708	}
709	AssertCompile(VBOX_DMI_TABLE_ENTR == 5);
710
711	/**
712	* Construct the MPS table for implanting as a ROM page.
713	*
714	* Only applicable if IOAPIC is active!
715	*
716	* See ``MultiProcessor Specificatiton Version 1.4 (May 1997)'':
717	* ``1.3 Scope
718	* ...
719	* The hardware required to implement the MP specification is kept to a
720	* minimum, as follows:
721	* * One or more processors that are Intel architecture instruction set
722	* compatible, such as the CPUs in the Intel486 or Pentium processor
723	* family.
724	* * One or more APICs, such as the Intel 82489DX Advanced Programmable
725	* Interrupt Controller or the integrated APIC, such as that on the
726	* Intel Pentium 735\\90 and 815\\100 processors, together with a discrete
727	* I/O APIC unit.''
728	* and later:
729	* ``4.3.3 I/O APIC Entries
730	* The configuration table contains one or more entries for I/O APICs.
731	* ...
732	* I/O APIC FLAGS: EN 3:0 1 If zero, this I/O APIC is unusable, and the
733	* operating system should not attempt to access
734	* this I/O APIC.
735	* At least one I/O APIC must be enabled.''
736	*
737	* @param pDevIns The device instance data.
738	* @param pTable Where to write the table.
739	* @param cbMax The maximum size of the MPS table.
740	* @param cCpus The number of guest CPUs.
741	*/
742	void FwCommonPlantMpsTable(PPDMDEVINS pDevIns, uint8_t *pTable, unsigned cbMax, uint16_t cCpus)
743	{
744	/* configuration table */
745	PMPSCFGTBLHEADER pCfgTab = (MPSCFGTBLHEADER*)pTable;
746	memcpy(pCfgTab->au8Signature, "PCMP", 4);
747	pCfgTab->u8SpecRev = 4; /* 1.4 */
748	memcpy(pCfgTab->au8OemId, "VBOXCPU ", 8);
749	memcpy(pCfgTab->au8ProductId, "VirtualBox ", 12);
750	pCfgTab->u32OemTablePtr = 0;
751	pCfgTab->u16OemTableSize = 0;
752	pCfgTab->u16EntryCount = cCpus /* Processors */
753	+ 1 /* ISA Bus */
754	+ 1 /* PCI Bus */
755	+ 1 /* I/O-APIC */
756	+ 16 /* Interrupts */
757	+ 1 /* Local interrupts */;
758	pCfgTab->u32AddrLocalApic = 0xfee00000;
759	pCfgTab->u16ExtTableLength = 0;
760	pCfgTab->u8ExtTableChecksum = 0;
761	pCfgTab->u8Reserved = 0;
762
763	uint32_t u32Eax, u32Ebx, u32Ecx, u32Edx;
764	uint32_t u32CPUSignature = 0x0520; /* default: Pentium 100 */
765	uint32_t u32FeatureFlags = 0x0001; /* default: FPU */
766	PDMDevHlpGetCpuId(pDevIns, 0, &u32Eax, &u32Ebx, &u32Ecx, &u32Edx);
767	if (u32Eax >= 1)
768	{
769	PDMDevHlpGetCpuId(pDevIns, 1, &u32Eax, &u32Ebx, &u32Ecx, &u32Edx);
770	u32CPUSignature = u32Eax & 0xfff;
771	/* Local APIC will be enabled later so override it here. Since we provide
772	* an MP table we have an IOAPIC and therefore a Local APIC. */
773	u32FeatureFlags = u32Edx \| X86_CPUID_FEATURE_EDX_APIC;
774	}
775	/* Construct MPS table for each VCPU. */
776	PMPSPROCENTRY pProcEntry = (PMPSPROCENTRY)(pCfgTab+1);
777	for (int i = 0; i < cCpus; i++)
778	{
779	pProcEntry->u8EntryType = 0; /* processor entry */
780	pProcEntry->u8LocalApicId = i;
781	pProcEntry->u8LocalApicVersion = 0x14;
782	pProcEntry->u8CPUFlags = (i == 0 ? 2 /* bootstrap processor / : 0 / application processor /) \| 1 / enabled */;
783	pProcEntry->u32CPUSignature = u32CPUSignature;
784	pProcEntry->u32CPUFeatureFlags = u32FeatureFlags;
785	pProcEntry->u32Reserved[0] =
786	pProcEntry->u32Reserved[1] = 0;
787	pProcEntry++;
788	}
789
790	uint32_t iBusIdPci0 = 0;
791	uint32_t iBusIdIsa = 1;
792
793	/* ISA bus */
794	PMPSBUSENTRY pBusEntry = (PMPSBUSENTRY)pProcEntry;
795	pBusEntry->u8EntryType = 1; /* bus entry */
796	pBusEntry->u8BusId = iBusIdIsa; /* this ID is referenced by the interrupt entries */
797	memcpy(pBusEntry->au8BusTypeStr, "ISA ", 6);
798	pBusEntry++;
799
800	/* PCI bus */
801	pBusEntry->u8EntryType = 1; /* bus entry */
802	pBusEntry->u8BusId = iBusIdPci0; /* this ID can be referenced by the interrupt entries */
803	memcpy(pBusEntry->au8BusTypeStr, "PCI ", 6);
804
805
806	/* I/O-APIC.
807	* MP spec: "The configuration table contains one or more entries for I/O APICs.
808	* ... At least one I/O APIC must be enabled." */
809	PMPSIOAPICENTRY pIOAPICEntry = (PMPSIOAPICENTRY)(pBusEntry+1);
810	uint16_t iApicId = 0;
811	pIOAPICEntry->u8EntryType = 2; /* I/O-APIC entry */
812	pIOAPICEntry->u8Id = iApicId; /* this ID is referenced by the interrupt entries */
813	pIOAPICEntry->u8Version = 0x11;
814	pIOAPICEntry->u8Flags = 1 /* enable */;
815	pIOAPICEntry->u32Addr = 0xfec00000;
816
817	/* Interrupt tables */
818	/* Bus vectors */
819	PMPSIOIRQENTRY pIrqEntry = (PMPSIOIRQENTRY)(pIOAPICEntry+1);
820	for (int iPin = 0; iPin < 16; iPin++, pIrqEntry++)
821	{
822	pIrqEntry->u8EntryType = 3; /* I/O interrupt entry */
823	/*
824	* 0 - INT, vectored interrupt,
825	* 3 - ExtINT, vectored interrupt provided by PIC
826	* As we emulate system with both APIC and PIC, it's needed for their coexistence.
827	*/
828	pIrqEntry->u8Type = (iPin == 0) ? 3 : 0;
829	pIrqEntry->u16Flags = 0; /* polarity of APIC I/O input signal = conforms to bus,
830	trigger mode = conforms to bus */
831	pIrqEntry->u8SrcBusId = iBusIdIsa; /* ISA bus */
832	/* IRQ0 mapped to pin 2, other are identity mapped */
833	/* If changing, also update PDMIsaSetIrq() and MADT */
834	pIrqEntry->u8SrcBusIrq = (iPin == 2) ? 0 : iPin; /* IRQ on the bus */
835	pIrqEntry->u8DstIOAPICId = iApicId; /* destintion IO-APIC */
836	pIrqEntry->u8DstIOAPICInt = iPin; /* pin on destination IO-APIC */
837	}
838	/* Local delivery */
839	pIrqEntry->u8EntryType = 4; /* Local interrupt entry */
840	pIrqEntry->u8Type = 3; /* ExtINT */
841	pIrqEntry->u16Flags = (1 << 2) \| 1; /* active-high, edge-triggered */
842	pIrqEntry->u8SrcBusId = iBusIdIsa;
843	pIrqEntry->u8SrcBusIrq = 0;
844	pIrqEntry->u8DstIOAPICId = 0xff;
845	pIrqEntry->u8DstIOAPICInt = 0;
846	pIrqEntry++;
847
848	pCfgTab->u16Length = (uint8_t*)pIrqEntry - pTable;
849	pCfgTab->u8Checksum = fwCommonChecksum(pTable, pCfgTab->u16Length);
850
851	AssertMsg(pCfgTab->u16Length < cbMax,
852	("VBOX_MPS_TABLE_SIZE=%d, maximum allowed size is %d",
853	pCfgTab->u16Length, cbMax));
854	}
855
856	/**
857	* Construct the MPS table pointer at VM construction and reset.
858	*
859	* Only applicable if IOAPIC is active!
860	*
861	* @param pDevIns The device instance data.
862	*/
863	void FwCommonPlantMpsFloatPtr(PPDMDEVINS pDevIns)
864	{
865	MPSFLOATPTR floatPtr;
866	floatPtr.au8Signature[0] = '_';
867	floatPtr.au8Signature[1] = 'M';
868	floatPtr.au8Signature[2] = 'P';
869	floatPtr.au8Signature[3] = '_';
870	floatPtr.u32MPSAddr = VBOX_MPS_TABLE_BASE;
871	floatPtr.u8Length = 1; /* structure size in paragraphs */
872	floatPtr.u8SpecRev = 4; /* MPS revision 1.4 */
873	floatPtr.u8Checksum = 0;
874	floatPtr.au8Feature[0] = 0;
875	floatPtr.au8Feature[1] = 0;
876	floatPtr.au8Feature[2] = 0;
877	floatPtr.au8Feature[3] = 0;
878	floatPtr.au8Feature[4] = 0;
879	floatPtr.u8Checksum = fwCommonChecksum((uint8_t*)&floatPtr, 16);
880	PDMDevHlpPhysWrite(pDevIns, 0x9fff0, &floatPtr, 16);
881	}
882

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source: vbox/trunk/src/VBox/Devices/PC/DevFwCommon.cpp@ 28345

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