VirtualBox

source: vbox/trunk/src/VBox/Devices/PC/DevPcArch.c@ 14535

Last change on this file since 14535 was 12977, checked in by vboxsync, 16 years ago

#1865: Updated PDMDEVREG with pfnSoftReset, u32VersionEnd and some flag/name cleanups.

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1/* $Id: DevPcArch.c 12977 2008-10-03 23:24:35Z vboxsync $ */
2/** @file
3 * DevPcArch - PC Architechture Device.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22/*******************************************************************************
23* Header Files *
24*******************************************************************************/
25#define LOG_GROUP LOG_GROUP_DEV_PC_ARCH
26#include <VBox/pdmdev.h>
27#include <VBox/mm.h>
28#include <VBox/log.h>
29#include <VBox/err.h>
30#include <iprt/assert.h>
31#include <iprt/string.h>
32
33#include "../Builtins.h"
34
35
36/*******************************************************************************
37* Structures and Typedefs *
38*******************************************************************************/
39
40/**
41 * PC Bios instance data structure.
42 */
43typedef struct DEVPCARCH
44{
45 /** Pointer back to the device instance. */
46 PPDMDEVINS pDevIns;
47} DEVPCARCH, *PDEVPCARCH;
48
49
50
51/**
52 * Port I/O Handler for math coprocessor IN operations.
53 *
54 * @returns VBox status code.
55 *
56 * @param pDevIns The device instance.
57 * @param pvUser User argument - ignored.
58 * @param uPort Port number used for the IN operation.
59 * @param pu32 Where to store the result.
60 * @param cb Number of bytes read.
61 */
62static DECLCALLBACK(int) pcarchIOPortFPURead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
63{
64 int rc;
65 NOREF(pvUser); NOREF(pDevIns); NOREF(pu32);
66 rc = PDMDeviceDBGFStop(pDevIns, RT_SRC_POS, "Port=%#x cb=%d\n", Port, cb);
67 if (rc == VINF_SUCCESS)
68 rc = VERR_IOM_IOPORT_UNUSED;
69 return rc;
70}
71
72/**
73 * Port I/O Handler for math coprocessor OUT operations.
74 *
75 * @returns VBox status code.
76 *
77 * @param pDevIns The device instance.
78 * @param pvUser User argument - ignored.
79 * @param uPort Port number used for the IN operation.
80 * @param u32 The value to output.
81 * @param cb The value size in bytes.
82 * @todo Add IGNNE support.
83 */
84static DECLCALLBACK(int) pcarchIOPortFPUWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
85{
86 int rc = VINF_SUCCESS;
87 NOREF(pvUser);
88 if (cb == 1)
89 {
90 switch (Port)
91 {
92 /*
93 * Clear busy latch.
94 */
95 case 0xf0:
96 Log2(("PCARCH: FPU Clear busy latch u32=%#x\n", u32));
97/* This is triggered when booting Knoppix (3.7) */
98#if 0
99 if (!u32)
100 rc = PDMDeviceDBGFStop(pDevIns, RT_SRC_POS, "Port=%#x cb=%d u32=%#x\n", Port, cb, u32);
101#endif
102 /* pDevIns->pDevHlp->pfnPICSetIrq(pDevIns, 13, 0); */
103 break;
104
105 /* Reset. */
106 case 0xf1:
107 Log2(("PCARCH: FPU Reset cb=%d u32=%#x\n", Port, cb, u32));
108 /** @todo figure out what the difference between FPU ports 0xf0 and 0xf1 are... */
109 /* pDevIns->pDevHlp->pfnPICSetIrq(pDevIns, 13, 0); */
110 break;
111
112 /* opcode transfers */
113 case 0xf8:
114 case 0xfa:
115 case 0xfc:
116 default:
117 rc = PDMDeviceDBGFStop(pDevIns, RT_SRC_POS, "Port=%#x cb=%d u32=%#x\n", Port, cb, u32);
118 break;
119 }
120 /* this works better, but probably not entirely correct. */
121 PDMDevHlpISASetIrq(pDevIns, 13, 0);
122 }
123 else
124 rc = PDMDeviceDBGFStop(pDevIns, RT_SRC_POS, "Port=%#x cb=%d u32=%#x\n", Port, cb, u32);
125 return rc;
126}
127
128
129/**
130 * Port I/O Handler for PS/2 system control port A IN operations.
131 *
132 * @returns VBox status code.
133 *
134 * @param pDevIns The device instance.
135 * @param pvUser User argument - ignored.
136 * @param uPort Port number used for the IN operation.
137 * @param pu32 Where to store the result.
138 * @param cb Number of bytes read.
139 *
140 * @todo Check if the A20 enable/disable method implemented here in any way
141 * should cooperate with the one implemented in the PS/2 keyboard device.
142 * This probably belongs together in the PS/2 keyboard device (since that
143 * is where the "port B" mentioned by Ralph Brown is implemented).
144 *
145 * @remark Ralph Brown and friends have this to say about this port:
146 *
147 * 0092 RW PS/2 system control port A (port B is at PORT 0061h) (see #P0415)
148 *
149 * Bitfields for PS/2 system control port A:
150 * Bit(s) Description (Table P0415)
151 * 7-6 any bit set to 1 turns activity light on
152 * 5 unused
153 * 4 watchdog timout occurred
154 * 3 =0 RTC/CMOS security lock (on password area) unlocked
155 * =1 CMOS locked (done by POST)
156 * 2 unused
157 * 1 A20 is active
158 * 0 =0 system reset or write
159 * =1 pulse alternate reset pin (high-speed alternate CPU reset)
160 * Notes: once set, bit 3 may only be cleared by a power-on reset
161 * on at least the C&T 82C235, bit 0 remains set through a CPU reset to
162 * allow the BIOS to determine the reset method
163 * on the PS/2 30-286 & "Tortuga" the INT 15h/87h memory copy does
164 * not use this port for A20 control, but instead uses the keyboard
165 * controller (8042). Reportedly this may cause the system to crash
166 * when access to the 8042 is disabled in password server mode
167 * (see #P0398).
168 * SeeAlso: #P0416,#P0417,MSR 00001000h
169 */
170static DECLCALLBACK(int) pcarchIOPortPS2SysControlPortARead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
171{
172 if (cb == 1)
173 {
174 *pu32 = PDMDevHlpA20IsEnabled(pDevIns) << 1;
175 return VINF_SUCCESS;
176 }
177 return PDMDeviceDBGFStop(pDevIns, RT_SRC_POS, "Port=%#x cb=%d\n", Port, cb);
178}
179
180
181/**
182 * Port I/O Handler for PS/2 system control port A OUT operations.
183 *
184 * @returns VBox status code.
185 *
186 * @param pDevIns The device instance.
187 * @param pvUser User argument - ignored.
188 * @param uPort Port number used for the IN operation.
189 * @param u32 The value to output.
190 * @param cb The value size in bytes.
191 * @see Remark and todo of pcarchIOPortPS2SysControlPortARead().
192 */
193static DECLCALLBACK(int) pcarchIOPortPS2SysControlPortAWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
194{
195 NOREF(pvUser);
196 if (cb == 1)
197 {
198 /*
199 * Fast reset?
200 */
201 if (u32 & 1)
202 return PDMDevHlpVMReset(pDevIns);
203
204 /*
205 * A20 is the only thing we care about of the other stuff.
206 */
207 PDMDevHlpA20Set(pDevIns, !!(u32 & 2));
208 return VINF_SUCCESS;
209 }
210 return PDMDeviceDBGFStop(pDevIns, RT_SRC_POS, "Port=%#x cb=%d u32=%#x\n", Port, cb, u32);
211}
212
213
214/**
215 * Construct a device instance for a VM.
216 *
217 * @returns VBox status.
218 * @param pDevIns The device instance data.
219 * If the registration structure is needed, pDevIns->pDevReg points to it.
220 * @param iInstance Instance number. Use this to figure out which registers and such to use.
221 * The device number is also found in pDevIns->iInstance, but since it's
222 * likely to be freqently used PDM passes it as parameter.
223 * @param pCfgHandle Configuration node handle for the device. Use this to obtain the configuration
224 * of the device instance. It's also found in pDevIns->pCfgHandle, but like
225 * iInstance it's expected to be used a bit in this function.
226 */
227static DECLCALLBACK(int) pcarchConstruct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfgHandle)
228{
229 PDEVPCARCH pThis = PDMINS_2_DATA(pDevIns, PDEVPCARCH);
230 int rc;
231 Assert(iInstance == 0);
232
233 /*
234 * Validate configuration.
235 */
236 if (!CFGMR3AreValuesValid(pCfgHandle, "\0"))
237 return VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES;
238
239 /*
240 * Init the data.
241 */
242 pThis->pDevIns = pDevIns;
243
244 /*
245 * Register I/O Ports
246 */
247 rc = PDMDevHlpIOPortRegister(pDevIns, 0xF0, 0x10, NULL, pcarchIOPortFPUWrite, pcarchIOPortFPURead, NULL, NULL, "Math Co-Processor (DOS/OS2 mode)");
248 if (RT_FAILURE(rc))
249 return rc;
250 rc = PDMDevHlpIOPortRegister(pDevIns, 0x92, 1, NULL, pcarchIOPortPS2SysControlPortAWrite, pcarchIOPortPS2SysControlPortARead, NULL, NULL, "PS/2 system control port A (A20 and more)");
251 if (RT_FAILURE(rc))
252 return rc;
253
254 /*
255 * Reserve ROM/MMIO areas:
256 * 1. 0x000a0000-0x000fffff
257 * 2. 0xfff80000-0xffffffff
258 * Note: This will be removed before long.
259 */
260 rc = PDMDevHlpPhysReserve(pDevIns, 0x000a0000, 0x50000, "Low ROM Region");
261 if (RT_FAILURE(rc))
262 return rc;
263 rc = PDMDevHlpPhysReserve(pDevIns, 0xfff80000, 0x80000, "High ROM Region");
264 if (RT_FAILURE(rc))
265 return rc;
266
267 return VINF_SUCCESS;
268}
269
270
271/**
272 * The device registration structure.
273 */
274const PDMDEVREG g_DevicePcArch =
275{
276 /* u32Version */
277 PDM_DEVREG_VERSION,
278 /* szDeviceName */
279 "pcarch",
280 /* szRCMod */
281 "",
282 /* szR0Mod */
283 "",
284 /* pszDescription */
285 "PC Architecture Device",
286 /* fFlags */
287 PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT | PDM_DEVREG_FLAGS_GUEST_BITS_32,
288 /* fClass */
289 PDM_DEVREG_CLASS_ARCH,
290 /* cMaxInstances */
291 1,
292 /* cbInstance */
293 sizeof(DEVPCARCH),
294 /* pfnConstruct */
295 pcarchConstruct,
296 /* pfnDestruct */
297 NULL,
298 /* pfnRelocate */
299 NULL,
300 /* pfnIOCtl */
301 NULL,
302 /* pfnPowerOn */
303 NULL,
304 /* pfnReset */
305 NULL,
306 /* pfnSuspend */
307 NULL,
308 /* pfnResume */
309 NULL,
310 /* pfnAttach */
311 NULL,
312 /* pfnDetach */
313 NULL,
314 /* pfnQueryInterface. */
315 NULL,
316 /* pfnInitComplete. */
317 NULL,
318 /* pfnPowerOff */
319 NULL,
320 /* pfnSoftReset */
321 NULL,
322 /* u32VersionEnd */
323 PDM_DEVREG_VERSION
324};
325
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