VirtualBox

source: vbox/trunk/src/VBox/Devices/PC/DevPcArch.c@ 25968

Last change on this file since 25968 was 25647, checked in by vboxsync, 15 years ago

Some more doxygen fixes, now for Core.docs.

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File size: 9.8 KB
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1/* $Id: DevPcArch.c 25647 2010-01-05 09:59:19Z vboxsync $ */
2/** @file
3 * DevPcArch - PC Architechture Device.
4 */
5
6/*
7 * Copyright (C) 2006-2007 Sun Microsystems, Inc.
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 *
17 * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
18 * Clara, CA 95054 USA or visit http://www.sun.com if you need
19 * additional information or have any questions.
20 */
21
22/*******************************************************************************
23* Header Files *
24*******************************************************************************/
25#define LOG_GROUP LOG_GROUP_DEV_PC_ARCH
26#include <VBox/pdmdev.h>
27#include <VBox/mm.h>
28#include <VBox/log.h>
29#include <VBox/err.h>
30#include <iprt/assert.h>
31#include <iprt/string.h>
32
33#include "../Builtins.h"
34
35
36/*******************************************************************************
37* Structures and Typedefs *
38*******************************************************************************/
39
40/**
41 * PC Bios instance data structure.
42 */
43typedef struct DEVPCARCH
44{
45 /** Pointer back to the device instance. */
46 PPDMDEVINS pDevIns;
47} DEVPCARCH, *PDEVPCARCH;
48
49
50
51/**
52 * Port I/O Handler for math coprocessor IN operations.
53 *
54 * @returns VBox status code.
55 *
56 * @param pDevIns The device instance.
57 * @param pvUser User argument - ignored.
58 * @param uPort Port number used for the IN operation.
59 * @param pu32 Where to store the result.
60 * @param cb Number of bytes read.
61 */
62static DECLCALLBACK(int) pcarchIOPortFPURead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
63{
64 int rc;
65 NOREF(pvUser); NOREF(pDevIns); NOREF(pu32);
66 rc = PDMDeviceDBGFStop(pDevIns, RT_SRC_POS, "Port=%#x cb=%d\n", Port, cb);
67 if (rc == VINF_SUCCESS)
68 rc = VERR_IOM_IOPORT_UNUSED;
69 return rc;
70}
71
72/**
73 * Port I/O Handler for math coprocessor OUT operations.
74 *
75 * @returns VBox status code.
76 *
77 * @param pDevIns The device instance.
78 * @param pvUser User argument - ignored.
79 * @param uPort Port number used for the IN operation.
80 * @param u32 The value to output.
81 * @param cb The value size in bytes.
82 * @todo Add IGNNE support.
83 */
84static DECLCALLBACK(int) pcarchIOPortFPUWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
85{
86 int rc = VINF_SUCCESS;
87 NOREF(pvUser);
88 if (cb == 1)
89 {
90 switch (Port)
91 {
92 /*
93 * Clear busy latch.
94 */
95 case 0xf0:
96 Log2(("PCARCH: FPU Clear busy latch u32=%#x\n", u32));
97/* This is triggered when booting Knoppix (3.7) */
98#if 0
99 if (!u32)
100 rc = PDMDeviceDBGFStop(pDevIns, RT_SRC_POS, "Port=%#x cb=%d u32=%#x\n", Port, cb, u32);
101#endif
102 /* pDevIns->pDevHlp->pfnPICSetIrq(pDevIns, 13, 0); */
103 break;
104
105 /* Reset. */
106 case 0xf1:
107 Log2(("PCARCH: FPU Reset cb=%d u32=%#x\n", Port, cb, u32));
108 /** @todo figure out what the difference between FPU ports 0xf0 and 0xf1 are... */
109 /* pDevIns->pDevHlp->pfnPICSetIrq(pDevIns, 13, 0); */
110 break;
111
112 /* opcode transfers */
113 case 0xf8:
114 case 0xfa:
115 case 0xfc:
116 default:
117 rc = PDMDeviceDBGFStop(pDevIns, RT_SRC_POS, "Port=%#x cb=%d u32=%#x\n", Port, cb, u32);
118 break;
119 }
120 /* this works better, but probably not entirely correct. */
121 PDMDevHlpISASetIrq(pDevIns, 13, 0);
122 }
123 else
124 rc = PDMDeviceDBGFStop(pDevIns, RT_SRC_POS, "Port=%#x cb=%d u32=%#x\n", Port, cb, u32);
125 return rc;
126}
127
128
129/**
130 * Port I/O Handler for PS/2 system control port A IN operations.
131 *
132 * @returns VBox status code.
133 *
134 * @param pDevIns The device instance.
135 * @param pvUser User argument - ignored.
136 * @param uPort Port number used for the IN operation.
137 * @param pu32 Where to store the result.
138 * @param cb Number of bytes read.
139 *
140 * @todo Check if the A20 enable/disable method implemented here in any way
141 * should cooperate with the one implemented in the PS/2 keyboard device.
142 * This probably belongs together in the PS/2 keyboard device (since that
143 * is where the "port B" mentioned by Ralph Brown is implemented).
144 *
145 * @remark Ralph Brown and friends have this to say about this port:
146 *
147 * @verbatim
1480092 RW PS/2 system control port A (port B is at PORT 0061h) (see #P0415)
149
150Bitfields for PS/2 system control port A:
151Bit(s) Description (Table P0415)
152 7-6 any bit set to 1 turns activity light on
153 5 unused
154 4 watchdog timout occurred
155 3 =0 RTC/CMOS security lock (on password area) unlocked
156 =1 CMOS locked (done by POST)
157 2 unused
158 1 A20 is active
159 0 =0 system reset or write
160 =1 pulse alternate reset pin (high-speed alternate CPU reset)
161Notes: once set, bit 3 may only be cleared by a power-on reset
162 on at least the C&T 82C235, bit 0 remains set through a CPU reset to
163 allow the BIOS to determine the reset method
164 on the PS/2 30-286 & "Tortuga" the INT 15h/87h memory copy does
165 not use this port for A20 control, but instead uses the keyboard
166 controller (8042). Reportedly this may cause the system to crash
167 when access to the 8042 is disabled in password server mode
168 (see #P0398).
169SeeAlso: #P0416,#P0417,MSR 00001000h
170 * @endverbatim
171 */
172static DECLCALLBACK(int) pcarchIOPortPS2SysControlPortARead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t *pu32, unsigned cb)
173{
174 if (cb == 1)
175 {
176 *pu32 = PDMDevHlpA20IsEnabled(pDevIns) << 1;
177 return VINF_SUCCESS;
178 }
179 return PDMDeviceDBGFStop(pDevIns, RT_SRC_POS, "Port=%#x cb=%d\n", Port, cb);
180}
181
182
183/**
184 * Port I/O Handler for PS/2 system control port A OUT operations.
185 *
186 * @returns VBox status code.
187 *
188 * @param pDevIns The device instance.
189 * @param pvUser User argument - ignored.
190 * @param uPort Port number used for the IN operation.
191 * @param u32 The value to output.
192 * @param cb The value size in bytes.
193 * @see Remark and todo of pcarchIOPortPS2SysControlPortARead().
194 */
195static DECLCALLBACK(int) pcarchIOPortPS2SysControlPortAWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
196{
197 NOREF(pvUser);
198 if (cb == 1)
199 {
200 /*
201 * Fast reset?
202 */
203 if (u32 & 1)
204 return PDMDevHlpVMReset(pDevIns);
205
206 /*
207 * A20 is the only thing we care about of the other stuff.
208 */
209 PDMDevHlpA20Set(pDevIns, !!(u32 & 2));
210 return VINF_SUCCESS;
211 }
212 return PDMDeviceDBGFStop(pDevIns, RT_SRC_POS, "Port=%#x cb=%d u32=%#x\n", Port, cb, u32);
213}
214
215
216/**
217 * Construct a device instance for a VM.
218 *
219 * @returns VBox status.
220 * @param pDevIns The device instance data.
221 * If the registration structure is needed, pDevIns->pDevReg points to it.
222 * @param iInstance Instance number. Use this to figure out which registers and such to use.
223 * The device number is also found in pDevIns->iInstance, but since it's
224 * likely to be freqently used PDM passes it as parameter.
225 * @param pCfgHandle Configuration node handle for the device. Use this to obtain the configuration
226 * of the device instance. It's also found in pDevIns->pCfgHandle, but like
227 * iInstance it's expected to be used a bit in this function.
228 */
229static DECLCALLBACK(int) pcarchConstruct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfgHandle)
230{
231 PDEVPCARCH pThis = PDMINS_2_DATA(pDevIns, PDEVPCARCH);
232 int rc;
233 Assert(iInstance == 0);
234
235 /*
236 * Validate configuration.
237 */
238 if (!CFGMR3AreValuesValid(pCfgHandle, "\0"))
239 return VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES;
240
241 /*
242 * Init the data.
243 */
244 pThis->pDevIns = pDevIns;
245
246 /*
247 * Register I/O Ports
248 */
249 rc = PDMDevHlpIOPortRegister(pDevIns, 0xF0, 0x10, NULL, pcarchIOPortFPUWrite, pcarchIOPortFPURead, NULL, NULL, "Math Co-Processor (DOS/OS2 mode)");
250 if (RT_FAILURE(rc))
251 return rc;
252 rc = PDMDevHlpIOPortRegister(pDevIns, 0x92, 1, NULL, pcarchIOPortPS2SysControlPortAWrite, pcarchIOPortPS2SysControlPortARead, NULL, NULL, "PS/2 system control port A (A20 and more)");
253 if (RT_FAILURE(rc))
254 return rc;
255
256 return VINF_SUCCESS;
257}
258
259
260/**
261 * The device registration structure.
262 */
263const PDMDEVREG g_DevicePcArch =
264{
265 /* u32Version */
266 PDM_DEVREG_VERSION,
267 /* szDeviceName */
268 "pcarch",
269 /* szRCMod */
270 "",
271 /* szR0Mod */
272 "",
273 /* pszDescription */
274 "PC Architecture Device",
275 /* fFlags */
276 PDM_DEVREG_FLAGS_HOST_BITS_DEFAULT | PDM_DEVREG_FLAGS_GUEST_BITS_32,
277 /* fClass */
278 PDM_DEVREG_CLASS_ARCH,
279 /* cMaxInstances */
280 1,
281 /* cbInstance */
282 sizeof(DEVPCARCH),
283 /* pfnConstruct */
284 pcarchConstruct,
285 /* pfnDestruct */
286 NULL,
287 /* pfnRelocate */
288 NULL,
289 /* pfnIOCtl */
290 NULL,
291 /* pfnPowerOn */
292 NULL,
293 /* pfnReset */
294 NULL,
295 /* pfnSuspend */
296 NULL,
297 /* pfnResume */
298 NULL,
299 /* pfnAttach */
300 NULL,
301 /* pfnDetach */
302 NULL,
303 /* pfnQueryInterface. */
304 NULL,
305 /* pfnInitComplete. */
306 NULL,
307 /* pfnPowerOff */
308 NULL,
309 /* pfnSoftReset */
310 NULL,
311 /* u32VersionEnd */
312 PDM_DEVREG_VERSION
313};
314
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