VirtualBox

source: vbox/trunk/src/VBox/Devices/PC/vbox-cpuhotplug.dsl@ 25820

Last change on this file since 25820 was 25817, checked in by vboxsync, 15 years ago

CPU hotplug: Merge the second patch. ACPI changes to support CPU hotplugging. ACPI table changes are in a separate file which is used if CPU hotplugging is enabled for a VM to not break untested guests
  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 74.0 KB
Line 
1// $Id: vbox-cpuhotplug.dsl 25817 2010-01-13 22:08:17Z vboxsync $
2/// @file
3//
4// VirtualBox ACPI
5//
6// Copyright (C) 2006-2007 Sun Microsystems, Inc.
7//
8// This file is part of VirtualBox Open Source Edition (OSE), as
9// available from http://www.virtualbox.org. This file is free software;
10// you can redistribute it and/or modify it under the terms of the GNU
11// General Public License (GPL) as published by the Free Software
12// Foundation, in version 2 as it comes in the "COPYING" file of the
13// VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14// hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15//
16// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
17// Clara, CA 95054 USA or visit http://www.sun.com if you need
18// additional information or have any questions.
19
20DefinitionBlock ("DSDT.aml", "DSDT", 1, "VBOX ", "VBOXBIOS", 2)
21{
22 // Declare debugging ports withing SystemIO
23 OperationRegion(DBG0, SystemIO, 0x3000, 4)
24
25 // Writes to this field Will dump hex char
26 Field (DBG0, ByteAcc, NoLock, Preserve)
27 {
28 DHE1, 8,
29 }
30
31 // Writes to this field Will dump hex word
32 Field (DBG0, WordAcc, NoLock, Preserve)
33 {
34 DHE2, 16,
35 }
36
37 // Writes to this field Will dump hex double word
38 Field (DBG0, DWordAcc, NoLock, Preserve)
39 {
40 DHE4, 32,
41 }
42
43 // Writes to this field will dump ascii char
44 Field (DBG0, ByteAcc, NoLock, Preserve)
45 {
46 Offset (1),
47 DCHR, 8
48 }
49
50 // Shortcuts
51 Method(HEX, 1)
52 {
53 Store (Arg0, DHE1)
54 }
55
56 Method(HEX2, 1)
57 {
58 Store (Arg0, DHE2)
59 }
60
61 Method(HEX4, 1)
62 {
63 Store (Arg0, DHE4)
64 }
65
66 // Code from Microsoft sample
67 // http://www.microsoft.com/whdc/system/pnppwr/powermgmt/_OSI-method.mspx
68
69 //
70 // SLEN(Str) - Returns the length of Str (excluding NULL).
71 //
72 Method(SLEN, 1)
73 {
74 //
75 // Note: The caller must make sure that the argument is a string object.
76 //
77 Store(Arg0, Local0)
78 Return(Sizeof(Local0))
79 }
80
81 Method(S2BF, 1)
82 {
83 //
84 // Note: The caller must make sure that the argument is a string object.
85 //
86 // Local0 contains length of string + NULL.
87 //
88 Store(Arg0, Local0)
89 Add(SLEN(Local0), One, Local0)
90 //
91 // Convert the string object into a buffer object.
92 //
93 Name(BUFF, Buffer(Local0) {})
94 Store(Arg0, BUFF)
95 Return(BUFF)
96 }
97
98 // Convert ASCII string to buffer and store it's contents (char by
99 // char) into DCHR (thus possibly writing the string to console)
100 Method (\DBG, 1, NotSerialized)
101 {
102 Store(Arg0, Local0)
103 Store(S2BF (Local0), Local1)
104 Store(SizeOf (Local1), Local0)
105 Decrement (Local0)
106 Store(Zero, Local2)
107 While (Local0)
108 {
109 Decrement (Local0)
110 Store (DerefOf (Index (Local1, Local2)), DCHR)
111 Increment (Local2)
112 }
113 }
114
115 Name(PICM, 0)
116 Method(_PIC, 1)
117 {
118 DBG ("Pic mode: ")
119 HEX4 (Arg0)
120 Store (Arg0, PICM)
121 }
122
123 // Processor object
124 // #1463: Showing the CPU can make the guest do bad things on it like SpeedStep.
125 // In this case, XP SP2 contains this buggy Intelppm.sys driver which wants to mess
126 // with SpeedStep if it finds a CPU object and when it finds out that it can't, it
127 // tries to unload and crashes (MS probably never tested this code path).
128 // So we enable this ACPI object only for certain guests, which do need it,
129 // if by accident Windows guest seen enabled CPU object, just boot from latest
130 // known good configuration, as it remembers state, even if ACPI object gets disabled.
131 Scope (\_PR)
132 {
133 Processor (CPU0, /* Name */
134 0x00, /* Id */
135 0x0, /* Processor IO ports range start */
136 0x0 /* Processor IO ports range length */
137 )
138 {
139 }
140
141 Device(HPL) // Needed or Linux can't find the CPU after insertion if it was ejected before.
142 {
143 Processor (CPU1, /* Name */
144 0x01, /* Id */
145 0x0, /* Processor IO ports range start */
146 0x0 /* Processor IO ports range length */
147 )
148 {
149 Method(_MAT, 0) {
150 Return(\_SB.MAL1)
151 }
152 Method(_STA) // Used for device presence detection
153 {
154 IF (And(\_SB.CPUL, 0x2))
155 {
156 Return (0xF)
157 }
158 Else
159 {
160 Return (0x1) // Present but not enabled
161 }
162 }
163 Method(_EJ0, 1)
164 {
165 Store(0x2, \_SB.CPUL) // Unlock the CPU
166 Return
167 }
168 }
169 Processor (CPU2, /* Name */
170 0x02, /* Id */
171 0x0, /* Processor IO ports range start */
172 0x0 /* Processor IO ports range length */
173 )
174 {
175 Method(_MAT, 0) {
176 Return(\_SB.MAL2)
177 }
178 Method(_STA) // Used for device presence detection
179 {
180 IF (And(\_SB.CPUL, 0x4))
181 {
182 Return (0xF)
183 }
184 Else
185 {
186 Return (0x1) // Present but not enabled
187 }
188 }
189 Method(_EJ0, 1)
190 {
191 Store(0x4, \_SB.CPUL) // Unlock the CPU
192 Return
193 }
194 }
195 Processor (CPU3, /* Name */
196 0x03, /* Id */
197 0x0, /* Processor IO ports range start */
198 0x0 /* Processor IO ports range length */
199 )
200 {
201 Method(_MAT, 0) {
202 Return(\_SB.MAL3)
203 }
204 Method(_STA) // Used for device presence detection
205 {
206 IF (And(\_SB.CPUL, 0x8))
207 {
208 Return (0xF)
209 }
210 Else
211 {
212 Return (0x1) // Present but not enabled
213 }
214 }
215 Method(_EJ0, 1)
216 {
217 Store(0x8, \_SB.CPUL) // Unlock the CPU
218 Return
219 }
220 }
221 Processor (CPU4, /* Name */
222 0x04, /* Id */
223 0x0, /* Processor IO ports range start */
224 0x0 /* Processor IO ports range length */
225 )
226 {
227 Method(_MAT, 0) {
228 Return(\_SB.MAL4)
229 }
230 Method(_STA) // Used for device presence detection
231 {
232 IF (And(\_SB.CPUL, 0x10))
233 {
234 Return (0xF)
235 }
236 Else
237 {
238 Return (0x1) // Present but not enabled
239 }
240 }
241 Method(_EJ0, 1)
242 {
243 Store(0x10, \_SB.CPUL) // Unlock the CPU
244 Return
245 }
246 }
247 Processor (CPU5, /* Name */
248 0x05, /* Id */
249 0x0, /* Processor IO ports range start */
250 0x0 /* Processor IO ports range length */
251 )
252 {
253 Method(_MAT, 0) {
254 Return(\_SB.MAL5)
255 }
256 Method(_STA) // Used for device presence detection
257 {
258 IF (And(\_SB.CPUL, 0x20))
259 {
260 Return (0xF)
261 }
262 Else
263 {
264 Return (0x1) // Present but not enabled
265 }
266 }
267 Method(_EJ0, 1)
268 {
269 Store(0x20, \_SB.CPUL) // Unlock the CPU
270 Return
271 }
272 }
273 Processor (CPU6, /* Name */
274 0x06, /* Id */
275 0x0, /* Processor IO ports range start */
276 0x0 /* Processor IO ports range length */
277 )
278 {
279 Method(_MAT, 0) {
280 Return(\_SB.MAL6)
281 }
282 Method(_STA) // Used for device presence detection
283 {
284 IF (And(\_SB.CPUL, 0x40))
285 {
286 Return (0xF)
287 }
288 Else
289 {
290 Return (0x1) // Present but not enabled
291 }
292 }
293 Method(_EJ0, 1)
294 {
295 Store(0x40, \_SB.CPUL) // Unlock the CPU
296 Return
297 }
298 }
299 Processor (CPU7, /* Name */
300 0x07, /* Id */
301 0x0, /* Processor IO ports range start */
302 0x0 /* Processor IO ports range length */
303 )
304 {
305 Method(_MAT, 0) {
306 Return(\_SB.MAL7)
307 }
308 Method(_STA) // Used for device presence detection
309 {
310 IF (And(\_SB.CPUL, 0x80))
311 {
312 Return (0xF)
313 }
314 Else
315 {
316 Return (0x1) // Present but not enabled
317 }
318 }
319 Method(_EJ0, 1)
320 {
321 Store(0x80, \_SB.CPUL) // Unlock the CPU
322 Return
323 }
324 }
325 Processor (CPU8, /* Name */
326 0x08, /* Id */
327 0x0, /* Processor IO ports range start */
328 0x0 /* Processor IO ports range length */
329 )
330 {
331 Method(_MAT, 0) {
332 Return(\_SB.MAL8)
333 }
334 Method(_STA) // Used for device presence detection
335 {
336 IF (And(\_SB.CPUL, 0x100))
337 {
338 Return (0xF)
339 }
340 Else
341 {
342 Return (0x1) // Present but not enabled
343 }
344 }
345 Method(_EJ0, 1)
346 {
347 Store(0x100, \_SB.CPUL) // Unlock the CPU
348 Return
349 }
350 }
351 Processor (CPU9, /* Name */
352 0x09, /* Id */
353 0x0, /* Processor IO ports range start */
354 0x0 /* Processor IO ports range length */
355 )
356 {
357 Method(_MAT, 0) {
358 Return(\_SB.MAL9)
359 }
360 Method(_STA) // Used for device presence detection
361 {
362 IF (And(\_SB.CPUL, 0x200))
363 {
364 Return (0xF)
365 }
366 Else
367 {
368 Return (0x1) // Present but not enabled
369 }
370 }
371 Method(_EJ0, 1)
372 {
373 Store(0x200, \_SB.CPUL) // Unlock the CPU
374 Return
375 }
376 }
377 Processor (CPUA, /* Name */
378 0x0a, /* Id */
379 0x0, /* Processor IO ports range start */
380 0x0 /* Processor IO ports range length */
381 )
382 {
383 Method(_MAT, 0) {
384 Return(\_SB.MALA)
385 }
386 Method(_STA) // Used for device presence detection
387 {
388 IF (And(\_SB.CPUL, 0x400))
389 {
390 Return (0xF)
391 }
392 Else
393 {
394 Return (0x1) // Present but not enabled
395 }
396 }
397 Method(_EJ0, 1)
398 {
399 Store(0x400, \_SB.CPUL) // Unlock the CPU
400 Return
401 }
402 }
403 Processor (CPUB, /* Name */
404 0x0b, /* Id */
405 0x0, /* Processor IO ports range start */
406 0x0 /* Processor IO ports range length */
407 )
408 {
409 Method(_MAT, 0) {
410 Return(\_SB.MALB)
411 }
412 Method(_STA) // Used for device presence detection
413 {
414 IF (And(\_SB.CPUL, 0x800))
415 {
416 Return (0xF)
417 }
418 Else
419 {
420 Return (0x1) // Present but not enabled
421 }
422 }
423 Method(_EJ0, 1)
424 {
425 Store(0x800, \_SB.CPUL) // Unlock the CPU
426 Return
427 }
428 }
429 Processor (CPUC, /* Name */
430 0x0c, /* Id */
431 0x0, /* Processor IO ports range start */
432 0x0 /* Processor IO ports range length */
433 )
434 {
435 Method(_MAT, 0) {
436 Return(\_SB.MALC)
437 }
438 Method(_STA) // Used for device presence detection
439 {
440 IF (And(\_SB.CPUL, 0x1000))
441 {
442 Return (0xF)
443 }
444 Else
445 {
446 Return (0x1) // Present but not enabled
447 }
448 }
449 Method(_EJ0, 1)
450 {
451 Store(0x1000, \_SB.CPUL) // Unlock the CPU
452 Return
453 }
454 }
455 Processor (CPUD, /* Name */
456 0x0d, /* Id */
457 0x0, /* Processor IO ports range start */
458 0x0 /* Processor IO ports range length */
459 )
460 {
461 Method(_MAT, 0) {
462 Return(\_SB.MALD)
463 }
464 Method(_STA) // Used for device presence detection
465 {
466 IF (And(\_SB.CPUL, 0x2000))
467 {
468 Return (0xF)
469 }
470 Else
471 {
472 Return (0x1) // Present but not enabled
473 }
474 }
475 Method(_EJ0, 1)
476 {
477 Store(0x2000, \_SB.CPUL) // Unlock the CPU
478 Return
479 }
480 }
481 Processor (CPUE, /* Name */
482 0x0e, /* Id */
483 0x0, /* Processor IO ports range start */
484 0x0 /* Processor IO ports range length */
485 )
486 {
487 Method(_MAT, 0) {
488 Return(\_SB.MALE)
489 }
490 Method(_STA) // Used for device presence detection
491 {
492 IF (And(\_SB.CPUL, 0x4000))
493 {
494 Return (0xF)
495 }
496 Else
497 {
498 Return (0x1) // Present but not enabled
499 }
500 }
501 Method(_EJ0, 1)
502 {
503 Store(0x4000, \_SB.CPUL) // Unlock the CPU
504 Return
505 }
506 }
507 Processor (CPUF, /* Name */
508 0x0f, /* Id */
509 0x0, /* Processor IO ports range start */
510 0x0 /* Processor IO ports range length */
511 )
512 {
513 Method(_MAT, 0) {
514 Return(\_SB.MALF)
515 }
516 Method(_STA) // Used for device presence detection
517 {
518 IF (And(\_SB.CPUL, 0x8000))
519 {
520 Return (0xF)
521 }
522 Else
523 {
524 Return (0x1) // Present but not enabled
525 }
526 }
527 Method(_EJ0, 1)
528 {
529 Store(0x8000, \_SB.CPUL) // Unlock the CPU
530 Return
531 }
532 }
533 Processor (CPUG, /* Name */
534 0x10, /* Id */
535 0x0, /* Processor IO ports range start */
536 0x0 /* Processor IO ports range length */
537 )
538 {
539 Method(_MAT, 0) {
540 Return(\_SB.MALG)
541 }
542 Method(_STA) // Used for device presence detection
543 {
544 IF (And(\_SB.CPUL, 0x10000))
545 {
546 Return (0xF)
547 }
548 Else
549 {
550 Return (0x1) // Present but not enabled
551 }
552 }
553 Method(_EJ0, 1)
554 {
555 Store(0x10000, \_SB.CPUL) // Unlock the CPU
556 Return
557 }
558 }
559 Processor (CPUH, /* Name */
560 0x11, /* Id */
561 0x0, /* Processor IO ports range start */
562 0x0 /* Processor IO ports range length */
563 )
564 {
565 Method(_MAT, 0) {
566 Return(\_SB.MALH)
567 }
568 Method(_STA) // Used for device presence detection
569 {
570 IF (And(\_SB.CPUL, 0x20000))
571 {
572 Return (0xF)
573 }
574 Else
575 {
576 Return (0x1) // Present but not enabled
577 }
578 }
579 Method(_EJ0, 1)
580 {
581 Store(0x20000, \_SB.CPUL) // Unlock the CPU
582 Return
583 }
584 }
585 Processor (CPUI, /* Name */
586 0x12, /* Id */
587 0x0, /* Processor IO ports range start */
588 0x0 /* Processor IO ports range length */
589 )
590 {
591 Method(_MAT, 0) {
592 Return(\_SB.MALI)
593 }
594 Method(_STA) // Used for device presence detection
595 {
596 IF (And(\_SB.CPUL, 0x40000))
597 {
598 Return (0xF)
599 }
600 Else
601 {
602 Return (0x1) // Present but not enabled
603 }
604 }
605 Method(_EJ0, 1)
606 {
607 Store(0x40000, \_SB.CPUL) // Unlock the CPU
608 Return
609 }
610 }
611 Processor (CPUJ, /* Name */
612 0x13, /* Id */
613 0x0, /* Processor IO ports range start */
614 0x0 /* Processor IO ports range length */
615 )
616 {
617 Method(_MAT, 0) {
618 Return(\_SB.MALJ)
619 }
620 Method(_STA) // Used for device presence detection
621 {
622 IF (And(\_SB.CPUL, 0x80000))
623 {
624 Return (0xF)
625 }
626 Else
627 {
628 Return (0x1) // Present but not enabled
629 }
630 }
631 Method(_EJ0, 1)
632 {
633 Store(0x80000, \_SB.CPUL) // Unlock the CPU
634 Return
635 }
636 }
637 Processor (CPUK, /* Name */
638 0x14, /* Id */
639 0x0, /* Processor IO ports range start */
640 0x0 /* Processor IO ports range length */
641 )
642 {
643 Method(_MAT, 0) {
644 Return(\_SB.MALK)
645 }
646 Method(_STA) // Used for device presence detection
647 {
648 IF (And(\_SB.CPUL, 0x100000))
649 {
650 Return (0xF)
651 }
652 Else
653 {
654 Return (0x1) // Present but not enabled
655 }
656 }
657 Method(_EJ0, 1)
658 {
659 Store(0x100000, \_SB.CPUL) // Unlock the CPU
660 Return
661 }
662 }
663 Processor (CPUL, /* Name */
664 0x15, /* Id */
665 0x0, /* Processor IO ports range start */
666 0x0 /* Processor IO ports range length */
667 )
668 {
669 Method(_MAT, 0) {
670 Return(\_SB.MALL)
671 }
672 Method(_STA) // Used for device presence detection
673 {
674 IF (And(\_SB.CPUL, 0x200000))
675 {
676 Return (0xF)
677 }
678 Else
679 {
680 Return (0x1) // Present but not enabled
681 }
682 }
683 Method(_EJ0, 1)
684 {
685 Store(0x200000, \_SB.CPUL) // Unlock the CPU
686 Return
687 }
688 }
689 Processor (CPUM, /* Name */
690 0x16, /* Id */
691 0x0, /* Processor IO ports range start */
692 0x0 /* Processor IO ports range length */
693 )
694 {
695 Method(_MAT, 0) {
696 Return(\_SB.MALM)
697 }
698 Method(_STA) // Used for device presence detection
699 {
700 IF (And(\_SB.CPUL, 0x400000))
701 {
702 Return (0xF)
703 }
704 Else
705 {
706 Return (0x1) // Present but not enabled
707 }
708 }
709 Method(_EJ0, 1)
710 {
711 Store(0x400000, \_SB.CPUL) // Unlock the CPU
712 Return
713 }
714 }
715 Processor (CPUN, /* Name */
716 0x17, /* Id */
717 0x0, /* Processor IO ports range start */
718 0x0 /* Processor IO ports range length */
719 )
720 {
721 Method(_MAT, 0) {
722 Return(\_SB.MALN)
723 }
724 Method(_STA) // Used for device presence detection
725 {
726 IF (And(\_SB.CPUL, 0x800000))
727 {
728 Return (0xF)
729 }
730 Else
731 {
732 Return (0x1) // Present but not enabled
733 }
734 }
735 Method(_EJ0, 1)
736 {
737 Store(0x800000, \_SB.CPUL) // Unlock the CPU
738 Return
739 }
740 }
741 Processor (CPUO, /* Name */
742 0x18, /* Id */
743 0x0, /* Processor IO ports range start */
744 0x0 /* Processor IO ports range length */
745 )
746 {
747 Method(_MAT, 0) {
748 Return(\_SB.MALO)
749 }
750 Method(_STA) // Used for device presence detection
751 {
752 IF (And(\_SB.CPUL, 0x1000000))
753 {
754 Return (0xF)
755 }
756 Else
757 {
758 Return (0x1) // Present but not enabled
759 }
760 }
761 Method(_EJ0, 1)
762 {
763 Store(0x1000000, \_SB.CPUL) // Unlock the CPU
764 Return
765 }
766 }
767 Processor (CPUP, /* Name */
768 0x19, /* Id */
769 0x0, /* Processor IO ports range start */
770 0x0 /* Processor IO ports range length */
771 )
772 {
773 Method(_MAT, 0) {
774 Return(\_SB.MALP)
775 }
776 Method(_STA) // Used for device presence detection
777 {
778 IF (And(\_SB.CPUL, 0x2000000))
779 {
780 Return (0xF)
781 }
782 Else
783 {
784 Return (0x1) // Present but not enabled
785 }
786 }
787 Method(_EJ0, 1)
788 {
789 Store(0x2000000, \_SB.CPUL) // Unlock the CPU
790 Return
791 }
792 }
793 Processor (CPUQ, /* Name */
794 0x1a, /* Id */
795 0x0, /* Processor IO ports range start */
796 0x0 /* Processor IO ports range length */
797 )
798 {
799 Method(_MAT, 0) {
800 Return(\_SB.MALQ)
801 }
802 Method(_STA) // Used for device presence detection
803 {
804 IF (And(\_SB.CPUL, 0x4000000))
805 {
806 Return (0xF)
807 }
808 Else
809 {
810 Return (0x1) // Present but not enabled
811 }
812 }
813 Method(_EJ0, 1)
814 {
815 Store(0x4000000, \_SB.CPUL) // Unlock the CPU
816 Return
817 }
818 }
819 Processor (CPUR, /* Name */
820 0x1b, /* Id */
821 0x0, /* Processor IO ports range start */
822 0x0 /* Processor IO ports range length */
823 )
824 {
825 Method(_MAT, 0) {
826 Return(\_SB.MALR)
827 }
828 Method(_STA) // Used for device presence detection
829 {
830 IF (And(\_SB.CPUL, 0x8000000))
831 {
832 Return (0xF)
833 }
834 Else
835 {
836 Return (0x1) // Present but not enabled
837 }
838 }
839 Method(_EJ0, 1)
840 {
841 Store(0x8000000, \_SB.CPUL) // Unlock the CPU
842 Return
843 }
844 }
845 Processor (CPUS, /* Name */
846 0x1c, /* Id */
847 0x0, /* Processor IO ports range start */
848 0x0 /* Processor IO ports range length */
849 )
850 {
851 Method(_MAT, 0) {
852 Return(\_SB.MALS)
853 }
854 Method(_STA) // Used for device presence detection
855 {
856 IF (And(\_SB.CPUL, 0x10000000))
857 {
858 Return (0xF)
859 }
860 Else
861 {
862 Return (0x1) // Present but not enabled
863 }
864 }
865 Method(_EJ0, 1)
866 {
867 Store(0x10000000, \_SB.CPUL) // Unlock the CPU
868 Return
869 }
870 }
871 Processor (CPUT, /* Name */
872 0x1d, /* Id */
873 0x0, /* Processor IO ports range start */
874 0x0 /* Processor IO ports range length */
875 )
876 {
877 Method(_MAT, 0) {
878 Return(\_SB.MALT)
879 }
880 Method(_STA) // Used for device presence detection
881 {
882 IF (And(\_SB.CPUL, 0x20000000))
883 {
884 Return (0xF)
885 }
886 Else
887 {
888 Return (0x1) // Present but not enabled
889 }
890 }
891 Method(_EJ0, 1)
892 {
893 Store(0x20000000, \_SB.CPUL) // Unlock the CPU
894 Return
895 }
896 }
897 Processor (CPUU, /* Name */
898 0x1e, /* Id */
899 0x0, /* Processor IO ports range start */
900 0x0 /* Processor IO ports range length */
901 )
902 {
903 Method(_MAT, 0) {
904 Return(\_SB.MALU)
905 }
906 Method(_STA) // Used for device presence detection
907 {
908 IF (And(\_SB.CPUL, 0x40000000))
909 {
910 Return (0xF)
911 }
912 Else
913 {
914 Return (0x1) // Present but not enabled
915 }
916 }
917 Method(_EJ0, 1)
918 {
919 Store(0x40000000, \_SB.CPUL) // Unlock the CPU
920 Return
921 }
922 }
923 Processor (CPUV, /* Name */
924 0x1f, /* Id */
925 0x0, /* Processor IO ports range start */
926 0x0 /* Processor IO ports range length */
927 )
928 {
929 Method(_MAT, 0) {
930 Return(\_SB.MALV)
931 }
932 Method(_STA) // Used for device presence detection
933 {
934 IF (And(\_SB.CPUL, 0x80000000))
935 {
936 Return (0xF)
937 }
938 Else
939 {
940 Return (0x1) // Present but not enabled
941 }
942 }
943 Method(_EJ0, 1)
944 {
945 Store(0x80000000, \_SB.CPUL) // Unlock the CPU
946 Return
947 }
948 }
949 }
950 }
951
952 Scope (\_GPE)
953 {
954 // GPE bit 1 handler
955 // GPE.1 must be set and SCI raised when
956 // processor info changed and CPU1 must be
957 // re-evaluated
958 Method (_L01, 0, NotSerialized)
959 {
960 // Eject notifications from ACPI are not supported so far by any guest
961 //IF (And(\_SB.CPUD, 0x2))
962 //{
963 // Notify(\_PR.HPL.CPU1, 0x3)
964 //}
965
966 IF (And(\_SB.CPUL, 0x2))
967 {
968 Notify (\_PR.HPL.CPU1, 0x0)
969 }
970 IF (And(\_SB.CPUL, 0x4))
971 {
972 Notify (\_PR.HPL.CPU2, 0x0)
973 }
974 IF (And(\_SB.CPUL, 0x8))
975 {
976 Notify (\_PR.HPL.CPU3, 0x0)
977 }
978 IF (And(\_SB.CPUL, 0x10))
979 {
980 Notify (\_PR.HPL.CPU4, 0x0)
981 }
982 IF (And(\_SB.CPUL, 0x20))
983 {
984 Notify (\_PR.HPL.CPU5, 0x0)
985 }
986 IF (And(\_SB.CPUL, 0x40))
987 {
988 Notify (\_PR.HPL.CPU6, 0x0)
989 }
990 IF (And(\_SB.CPUL, 0x80))
991 {
992 Notify (\_PR.HPL.CPU7, 0x0)
993 }
994 IF (And(\_SB.CPUL, 0x100))
995 {
996 Notify (\_PR.HPL.CPU8, 0x0)
997 }
998 IF (And(\_SB.CPUL, 0x200))
999 {
1000 Notify (\_PR.HPL.CPU9, 0x0)
1001 }
1002 IF (And(\_SB.CPUL, 0x400))
1003 {
1004 Notify (\_PR.HPL.CPUA, 0x0)
1005 }
1006 IF (And(\_SB.CPUL, 0x800))
1007 {
1008 Notify (\_PR.HPL.CPUB, 0x0)
1009 }
1010 IF (And(\_SB.CPUL, 0x1000))
1011 {
1012 Notify (\_PR.HPL.CPUC, 0x0)
1013 }
1014 IF (And(\_SB.CPUL, 0x2000))
1015 {
1016 Notify (\_PR.HPL.CPUD, 0x0)
1017 }
1018 IF (And(\_SB.CPUL, 0x4000))
1019 {
1020 Notify (\_PR.HPL.CPUE, 0x0)
1021 }
1022 IF (And(\_SB.CPUL, 0x8000))
1023 {
1024 Notify (\_PR.HPL.CPUF, 0x0)
1025 }
1026 IF (And(\_SB.CPUL, 0x10000))
1027 {
1028 Notify (\_PR.HPL.CPUG, 0x0)
1029 }
1030 IF (And(\_SB.CPUL, 0x20000))
1031 {
1032 Notify (\_PR.HPL.CPUH, 0x0)
1033 }
1034 IF (And(\_SB.CPUL, 0x40000))
1035 {
1036 Notify (\_PR.HPL.CPUI, 0x0)
1037 }
1038 IF (And(\_SB.CPUL, 0x80000))
1039 {
1040 Notify (\_PR.HPL.CPUJ, 0x0)
1041 }
1042 IF (And(\_SB.CPUL, 0x100000))
1043 {
1044 Notify (\_PR.HPL.CPUK, 0x0)
1045 }
1046 IF (And(\_SB.CPUL, 0x200000))
1047 {
1048 Notify (\_PR.HPL.CPUL, 0x0)
1049 }
1050 IF (And(\_SB.CPUL, 0x400000))
1051 {
1052 Notify (\_PR.HPL.CPUM, 0x0)
1053 }
1054 IF (And(\_SB.CPUL, 0x800000))
1055 {
1056 Notify (\_PR.HPL.CPUN, 0x0)
1057 }
1058 IF (And(\_SB.CPUL, 0x1000000))
1059 {
1060 Notify (\_PR.HPL.CPUO, 0x0)
1061 }
1062 IF (And(\_SB.CPUL, 0x2000000))
1063 {
1064 Notify (\_PR.HPL.CPUP, 0x0)
1065 }
1066 IF (And(\_SB.CPUL, 0x4000000))
1067 {
1068 Notify (\_PR.HPL.CPUQ, 0x0)
1069 }
1070 IF (And(\_SB.CPUL, 0x8000000))
1071 {
1072 Notify (\_PR.HPL.CPUR, 0x0)
1073 }
1074 IF (And(\_SB.CPUL, 0x10000000))
1075 {
1076 Notify (\_PR.HPL.CPUS, 0x0)
1077 }
1078 IF (And(\_SB.CPUL, 0x20000000))
1079 {
1080 Notify (\_PR.HPL.CPUT, 0x0)
1081 }
1082 IF (And(\_SB.CPUL, 0x40000000))
1083 {
1084 Notify (\_PR.HPL.CPUU, 0x0)
1085 }
1086 IF (And(\_SB.CPUL, 0x80000000))
1087 {
1088 Notify (\_PR.HPL.CPUV, 0x0)
1089 }
1090 }
1091 }
1092
1093 Scope (\_SB)
1094 {
1095 OperationRegion (SYSI, SystemIO, 0x4048, 0x08)
1096 Field (SYSI, DwordAcc, NoLock, Preserve)
1097 {
1098 IDX0, 32,
1099 DAT0, 32,
1100 }
1101
1102 IndexField (IDX0, DAT0, DwordAcc, NoLock, Preserve)
1103 {
1104 MEML, 32,
1105 UIOA, 32,
1106 UHPT, 32,
1107 USMC, 32,
1108 UFDC, 32,
1109 // @todo: maybe make it bitmask instead?
1110 UCP0, 32,
1111 UCP1, 32,
1112 UCP2, 32,
1113 UCP3, 32,
1114 MEMH, 32,
1115 URTC, 32,
1116 CPUL, 32,
1117 MAAD, 32,
1118 MASZ, 32,
1119 Offset (0x80),
1120 ININ, 32,
1121 Offset (0x200),
1122 VAIN, 32,
1123 }
1124
1125 OperationRegion(MABL, SystemMemory, MAAD, MASZ)
1126 Field (MABL, ByteAcc, NoLock, Preserve)
1127 {
1128 MUDA, 288,
1129 MUDD, 32,
1130 MUDF, 32,
1131 MAL0, 64,
1132 MAL1, 64,
1133 MAL2, 64,
1134 MAL3, 64,
1135 MAL4, 64,
1136 MAL5, 64,
1137 MAL6, 64,
1138 MAL7, 64,
1139 MAL8, 64,
1140 MAL9, 64,
1141 MALA, 64,
1142 MALB, 64,
1143 MALC, 64,
1144 MALD, 64,
1145 MALE, 64,
1146 MALF, 64,
1147 MALG, 64,
1148 MALH, 64,
1149 MALI, 64,
1150 MALJ, 64,
1151 MALK, 64,
1152 MALL, 64,
1153 MALM, 64,
1154 MALN, 64,
1155 MALO, 64,
1156 MALP, 64,
1157 MALQ, 64,
1158 MALR, 64,
1159 MALS, 64,
1160 MALT, 64,
1161 MALU, 64,
1162 MALV, 64,
1163 }
1164
1165 Method (_INI, 0, NotSerialized)
1166 {
1167 Store (0xbadc0de, VAIN)
1168 DBG ("MEML: ")
1169 HEX4 (MEML)
1170 DBG ("UIOA: ")
1171 HEX4 (UIOA)
1172 DBG ("UHPT: ")
1173 HEX4 (UHPT)
1174 DBG ("USMC: ")
1175 HEX4 (USMC)
1176 DBG ("UFDC: ")
1177 HEX4 (UFDC)
1178 DBG ("UCP0: ")
1179 HEX4 (UCP0)
1180 DBG ("MEMH: ")
1181 HEX4 (MEMH)
1182 }
1183
1184 // PCI PIC IRQ Routing table
1185 // Must match pci.c:pci_slot_get_pirq
1186 Name (PR00, Package ()
1187 {
1188 Package (0x04) {0x0002FFFF, 0x00, LNKB, 0x00,},
1189 Package (0x04) {0x0002FFFF, 0x01, LNKC, 0x00,},
1190 Package (0x04) {0x0002FFFF, 0x02, LNKD, 0x00,},
1191 Package (0x04) {0x0002FFFF, 0x03, LNKA, 0x00,},
1192
1193 Package (0x04) {0x0003FFFF, 0x00, LNKC, 0x00,},
1194 Package (0x04) {0x0003FFFF, 0x01, LNKD, 0x00,},
1195 Package (0x04) {0x0003FFFF, 0x02, LNKA, 0x00,},
1196 Package (0x04) {0x0003FFFF, 0x03, LNKB, 0x00,},
1197
1198 Package (0x04) {0x0004FFFF, 0x00, LNKD, 0x00,},
1199 Package (0x04) {0x0004FFFF, 0x01, LNKA, 0x00,},
1200 Package (0x04) {0x0004FFFF, 0x02, LNKB, 0x00,},
1201 Package (0x04) {0x0004FFFF, 0x03, LNKC, 0x00,},
1202
1203 Package (0x04) {0x0005FFFF, 0x00, LNKA, 0x00,},
1204 Package (0x04) {0x0005FFFF, 0x01, LNKB, 0x00,},
1205 Package (0x04) {0x0005FFFF, 0x02, LNKC, 0x00,},
1206 Package (0x04) {0x0005FFFF, 0x03, LNKD, 0x00,},
1207
1208 Package (0x04) {0x0006FFFF, 0x00, LNKB, 0x00,},
1209 Package (0x04) {0x0006FFFF, 0x01, LNKC, 0x00,},
1210 Package (0x04) {0x0006FFFF, 0x02, LNKD, 0x00,},
1211 Package (0x04) {0x0006FFFF, 0x03, LNKA, 0x00,},
1212
1213 Package (0x04) {0x0007FFFF, 0x00, LNKC, 0x00,},
1214 Package (0x04) {0x0007FFFF, 0x01, LNKD, 0x00,},
1215 Package (0x04) {0x0007FFFF, 0x02, LNKA, 0x00,},
1216 Package (0x04) {0x0007FFFF, 0x03, LNKB, 0x00,},
1217
1218 Package (0x04) {0x0008FFFF, 0x00, LNKD, 0x00,},
1219 Package (0x04) {0x0008FFFF, 0x01, LNKA, 0x00,},
1220 Package (0x04) {0x0008FFFF, 0x02, LNKB, 0x00,},
1221 Package (0x04) {0x0008FFFF, 0x03, LNKC, 0x00,},
1222
1223 Package (0x04) {0x0009FFFF, 0x00, LNKA, 0x00,},
1224 Package (0x04) {0x0009FFFF, 0x01, LNKB, 0x00,},
1225 Package (0x04) {0x0009FFFF, 0x02, LNKC, 0x00,},
1226 Package (0x04) {0x0009FFFF, 0x03, LNKD, 0x00,},
1227
1228 Package (0x04) {0x000AFFFF, 0x00, LNKB, 0x00,},
1229 Package (0x04) {0x000AFFFF, 0x01, LNKC, 0x00,},
1230 Package (0x04) {0x000AFFFF, 0x02, LNKD, 0x00,},
1231 Package (0x04) {0x000AFFFF, 0x03, LNKA, 0x00,},
1232
1233 Package (0x04) {0x000BFFFF, 0x00, LNKC, 0x00,},
1234 Package (0x04) {0x000BFFFF, 0x01, LNKD, 0x00,},
1235 Package (0x04) {0x000BFFFF, 0x02, LNKA, 0x00,},
1236 Package (0x04) {0x000BFFFF, 0x03, LNKB, 0x00,},
1237
1238 Package (0x04) {0x000CFFFF, 0x00, LNKD, 0x00,},
1239 Package (0x04) {0x000CFFFF, 0x01, LNKA, 0x00,},
1240 Package (0x04) {0x000CFFFF, 0x02, LNKB, 0x00,},
1241 Package (0x04) {0x000CFFFF, 0x03, LNKC, 0x00,},
1242
1243 Package (0x04) {0x000DFFFF, 0x00, LNKA, 0x00,},
1244 Package (0x04) {0x000DFFFF, 0x01, LNKB, 0x00,},
1245 Package (0x04) {0x000DFFFF, 0x02, LNKC, 0x00,},
1246 Package (0x04) {0x000DFFFF, 0x03, LNKD, 0x00,},
1247
1248 Package (0x04) {0x000EFFFF, 0x00, LNKB, 0x00,},
1249 Package (0x04) {0x000EFFFF, 0x01, LNKC, 0x00,},
1250 Package (0x04) {0x000EFFFF, 0x02, LNKD, 0x00,},
1251 Package (0x04) {0x000EFFFF, 0x03, LNKA, 0x00,},
1252
1253 Package (0x04) {0x000FFFFF, 0x00, LNKC, 0x00,},
1254 Package (0x04) {0x000FFFFF, 0x01, LNKD, 0x00,},
1255 Package (0x04) {0x000FFFFF, 0x02, LNKA, 0x00,},
1256 Package (0x04) {0x000FFFFF, 0x03, LNKB, 0x00,},
1257
1258 Package (0x04) {0x0010FFFF, 0x00, LNKD, 0x00,},
1259 Package (0x04) {0x0010FFFF, 0x01, LNKA, 0x00,},
1260 Package (0x04) {0x0010FFFF, 0x02, LNKB, 0x00,},
1261 Package (0x04) {0x0010FFFF, 0x03, LNKC, 0x00,},
1262
1263 Package (0x04) {0x0011FFFF, 0x00, LNKA, 0x00,},
1264 Package (0x04) {0x0011FFFF, 0x01, LNKB, 0x00,},
1265 Package (0x04) {0x0011FFFF, 0x02, LNKC, 0x00,},
1266 Package (0x04) {0x0011FFFF, 0x03, LNKD, 0x00,},
1267
1268 Package (0x04) {0x0012FFFF, 0x00, LNKB, 0x00,},
1269 Package (0x04) {0x0012FFFF, 0x01, LNKC, 0x00,},
1270 Package (0x04) {0x0012FFFF, 0x02, LNKD, 0x00,},
1271 Package (0x04) {0x0012FFFF, 0x03, LNKA, 0x00,},
1272
1273 Package (0x04) {0x0013FFFF, 0x00, LNKC, 0x00,},
1274 Package (0x04) {0x0013FFFF, 0x01, LNKD, 0x00,},
1275 Package (0x04) {0x0013FFFF, 0x02, LNKA, 0x00,},
1276 Package (0x04) {0x0013FFFF, 0x03, LNKB, 0x00,},
1277
1278 Package (0x04) {0x0014FFFF, 0x00, LNKD, 0x00,},
1279 Package (0x04) {0x0014FFFF, 0x01, LNKA, 0x00,},
1280 Package (0x04) {0x0014FFFF, 0x02, LNKB, 0x00,},
1281 Package (0x04) {0x0014FFFF, 0x03, LNKC, 0x00,},
1282
1283 Package (0x04) {0x0015FFFF, 0x00, LNKA, 0x00,},
1284 Package (0x04) {0x0015FFFF, 0x01, LNKB, 0x00,},
1285 Package (0x04) {0x0015FFFF, 0x02, LNKC, 0x00,},
1286 Package (0x04) {0x0015FFFF, 0x03, LNKD, 0x00,},
1287
1288 Package (0x04) {0x0016FFFF, 0x00, LNKB, 0x00,},
1289 Package (0x04) {0x0016FFFF, 0x01, LNKC, 0x00,},
1290 Package (0x04) {0x0016FFFF, 0x02, LNKD, 0x00,},
1291 Package (0x04) {0x0016FFFF, 0x03, LNKA, 0x00,},
1292
1293 Package (0x04) {0x0017FFFF, 0x00, LNKC, 0x00,},
1294 Package (0x04) {0x0017FFFF, 0x01, LNKD, 0x00,},
1295 Package (0x04) {0x0017FFFF, 0x02, LNKA, 0x00,},
1296 Package (0x04) {0x0017FFFF, 0x03, LNKB, 0x00,},
1297
1298 Package (0x04) {0x0018FFFF, 0x00, LNKD, 0x00,},
1299 Package (0x04) {0x0018FFFF, 0x01, LNKA, 0x00,},
1300 Package (0x04) {0x0018FFFF, 0x02, LNKB, 0x00,},
1301 Package (0x04) {0x0018FFFF, 0x03, LNKC, 0x00,},
1302
1303 Package (0x04) {0x0019FFFF, 0x00, LNKA, 0x00,},
1304 Package (0x04) {0x0019FFFF, 0x01, LNKB, 0x00,},
1305 Package (0x04) {0x0019FFFF, 0x02, LNKC, 0x00,},
1306 Package (0x04) {0x0019FFFF, 0x03, LNKD, 0x00,},
1307
1308 Package (0x04) {0x001AFFFF, 0x00, LNKB, 0x00,},
1309 Package (0x04) {0x001AFFFF, 0x01, LNKC, 0x00,},
1310 Package (0x04) {0x001AFFFF, 0x02, LNKD, 0x00,},
1311 Package (0x04) {0x001AFFFF, 0x03, LNKA, 0x00,},
1312
1313 Package (0x04) {0x001BFFFF, 0x00, LNKC, 0x00,},
1314 Package (0x04) {0x001BFFFF, 0x01, LNKD, 0x00,},
1315 Package (0x04) {0x001BFFFF, 0x02, LNKA, 0x00,},
1316 Package (0x04) {0x001BFFFF, 0x03, LNKB, 0x00,},
1317
1318 Package (0x04) {0x001CFFFF, 0x00, LNKD, 0x00,},
1319 Package (0x04) {0x001CFFFF, 0x01, LNKA, 0x00,},
1320 Package (0x04) {0x001CFFFF, 0x02, LNKB, 0x00,},
1321 Package (0x04) {0x001CFFFF, 0x03, LNKC, 0x00,},
1322
1323 Package (0x04) {0x001DFFFF, 0x00, LNKA, 0x00,},
1324 Package (0x04) {0x001DFFFF, 0x01, LNKB, 0x00,},
1325 Package (0x04) {0x001DFFFF, 0x02, LNKC, 0x00,},
1326 Package (0x04) {0x001DFFFF, 0x03, LNKD, 0x00,},
1327
1328 Package (0x04) {0x001EFFFF, 0x00, LNKB, 0x00,},
1329 Package (0x04) {0x001EFFFF, 0x01, LNKC, 0x00,},
1330 Package (0x04) {0x001EFFFF, 0x02, LNKD, 0x00,},
1331 Package (0x04) {0x001EFFFF, 0x03, LNKA, 0x00,},
1332
1333 Package (0x04) {0x001FFFFF, 0x00, LNKC, 0x00,},
1334 Package (0x04) {0x001FFFFF, 0x01, LNKD, 0x00,},
1335 Package (0x04) {0x001FFFFF, 0x02, LNKA, 0x00,},
1336 Package (0x04) {0x001FFFFF, 0x03, LNKB, 0x00,}
1337 })
1338
1339 // PCI I/O APIC IRQ Routing table
1340 // Must match pci.c:pci_slot_get_acpi_pirq
1341 Name (PR01, Package ()
1342 {
1343 Package (0x04) {0x0002FFFF, 0x00, 0x00, 0x12,},
1344 Package (0x04) {0x0002FFFF, 0x01, 0x00, 0x13,},
1345 Package (0x04) {0x0002FFFF, 0x02, 0x00, 0x14,},
1346 Package (0x04) {0x0002FFFF, 0x03, 0x00, 0x15,},
1347
1348 Package (0x04) {0x0003FFFF, 0x00, 0x00, 0x13,},
1349 Package (0x04) {0x0003FFFF, 0x01, 0x00, 0x14,},
1350 Package (0x04) {0x0003FFFF, 0x02, 0x00, 0x15,},
1351 Package (0x04) {0x0003FFFF, 0x03, 0x00, 0x16,},
1352
1353 Package (0x04) {0x0004FFFF, 0x00, 0x00, 0x14,},
1354 Package (0x04) {0x0004FFFF, 0x01, 0x00, 0x15,},
1355 Package (0x04) {0x0004FFFF, 0x02, 0x00, 0x16,},
1356 Package (0x04) {0x0004FFFF, 0x03, 0x00, 0x17,},
1357
1358 Package (0x04) {0x0005FFFF, 0x00, 0x00, 0x15,},
1359 Package (0x04) {0x0005FFFF, 0x01, 0x00, 0x16,},
1360 Package (0x04) {0x0005FFFF, 0x02, 0x00, 0x17,},
1361 Package (0x04) {0x0005FFFF, 0x03, 0x00, 0x10,},
1362
1363 Package (0x04) {0x0006FFFF, 0x00, 0x00, 0x16,},
1364 Package (0x04) {0x0006FFFF, 0x01, 0x00, 0x17,},
1365 Package (0x04) {0x0006FFFF, 0x02, 0x00, 0x10,},
1366 Package (0x04) {0x0006FFFF, 0x03, 0x00, 0x11,},
1367
1368 Package (0x04) {0x0007FFFF, 0x00, 0x00, 0x17,},
1369 Package (0x04) {0x0007FFFF, 0x01, 0x00, 0x10,},
1370 Package (0x04) {0x0007FFFF, 0x02, 0x00, 0x11,},
1371 Package (0x04) {0x0007FFFF, 0x03, 0x00, 0x12,},
1372
1373 Package (0x04) {0x0008FFFF, 0x00, 0x00, 0x10,},
1374 Package (0x04) {0x0008FFFF, 0x01, 0x00, 0x11,},
1375 Package (0x04) {0x0008FFFF, 0x02, 0x00, 0x12,},
1376 Package (0x04) {0x0008FFFF, 0x03, 0x00, 0x13,},
1377
1378 Package (0x04) {0x0009FFFF, 0x00, 0x00, 0x11,},
1379 Package (0x04) {0x0009FFFF, 0x01, 0x00, 0x12,},
1380 Package (0x04) {0x0009FFFF, 0x02, 0x00, 0x13,},
1381 Package (0x04) {0x0009FFFF, 0x03, 0x00, 0x14,},
1382
1383 Package (0x04) {0x000AFFFF, 0x00, 0x00, 0x12,},
1384 Package (0x04) {0x000AFFFF, 0x01, 0x00, 0x13,},
1385 Package (0x04) {0x000AFFFF, 0x02, 0x00, 0x14,},
1386 Package (0x04) {0x000AFFFF, 0x03, 0x00, 0x15,},
1387
1388 Package (0x04) {0x000BFFFF, 0x00, 0x00, 0x13,},
1389 Package (0x04) {0x000BFFFF, 0x01, 0x00, 0x14,},
1390 Package (0x04) {0x000BFFFF, 0x02, 0x00, 0x15,},
1391 Package (0x04) {0x000BFFFF, 0x03, 0x00, 0x16,},
1392
1393 Package (0x04) {0x000CFFFF, 0x00, 0x00, 0x14,},
1394 Package (0x04) {0x000CFFFF, 0x01, 0x00, 0x15,},
1395 Package (0x04) {0x000CFFFF, 0x02, 0x00, 0x16,},
1396 Package (0x04) {0x000CFFFF, 0x03, 0x00, 0x17,},
1397
1398 Package (0x04) {0x000DFFFF, 0x00, 0x00, 0x15,},
1399 Package (0x04) {0x000DFFFF, 0x01, 0x00, 0x16,},
1400 Package (0x04) {0x000DFFFF, 0x02, 0x00, 0x17,},
1401 Package (0x04) {0x000DFFFF, 0x03, 0x00, 0x10,},
1402
1403 Package (0x04) {0x000EFFFF, 0x00, 0x00, 0x16,},
1404 Package (0x04) {0x000EFFFF, 0x01, 0x00, 0x17,},
1405 Package (0x04) {0x000EFFFF, 0x02, 0x00, 0x10,},
1406 Package (0x04) {0x000EFFFF, 0x03, 0x00, 0x11,},
1407
1408 Package (0x04) {0x000FFFFF, 0x00, 0x00, 0x17,},
1409 Package (0x04) {0x000FFFFF, 0x01, 0x00, 0x10,},
1410 Package (0x04) {0x000FFFFF, 0x02, 0x00, 0x11,},
1411 Package (0x04) {0x000FFFFF, 0x03, 0x00, 0x12,},
1412
1413 Package (0x04) {0x0010FFFF, 0x00, 0x00, 0x10,},
1414 Package (0x04) {0x0010FFFF, 0x01, 0x00, 0x11,},
1415 Package (0x04) {0x0010FFFF, 0x02, 0x00, 0x12,},
1416 Package (0x04) {0x0010FFFF, 0x03, 0x00, 0x13,},
1417
1418 Package (0x04) {0x0011FFFF, 0x00, 0x00, 0x11,},
1419 Package (0x04) {0x0011FFFF, 0x01, 0x00, 0x12,},
1420 Package (0x04) {0x0011FFFF, 0x02, 0x00, 0x13,},
1421 Package (0x04) {0x0011FFFF, 0x03, 0x00, 0x14,},
1422
1423 Package (0x04) {0x0012FFFF, 0x00, 0x00, 0x12,},
1424 Package (0x04) {0x0012FFFF, 0x01, 0x00, 0x13,},
1425 Package (0x04) {0x0012FFFF, 0x02, 0x00, 0x14,},
1426 Package (0x04) {0x0012FFFF, 0x03, 0x00, 0x15,},
1427
1428 Package (0x04) {0x0013FFFF, 0x00, 0x00, 0x13,},
1429 Package (0x04) {0x0013FFFF, 0x01, 0x00, 0x14,},
1430 Package (0x04) {0x0013FFFF, 0x02, 0x00, 0x15,},
1431 Package (0x04) {0x0013FFFF, 0x03, 0x00, 0x16,},
1432
1433 Package (0x04) {0x0014FFFF, 0x00, 0x00, 0x14,},
1434 Package (0x04) {0x0014FFFF, 0x01, 0x00, 0x15,},
1435 Package (0x04) {0x0014FFFF, 0x02, 0x00, 0x16,},
1436 Package (0x04) {0x0014FFFF, 0x03, 0x00, 0x17,},
1437
1438 Package (0x04) {0x0015FFFF, 0x00, 0x00, 0x15,},
1439 Package (0x04) {0x0015FFFF, 0x01, 0x00, 0x16,},
1440 Package (0x04) {0x0015FFFF, 0x02, 0x00, 0x17,},
1441 Package (0x04) {0x0015FFFF, 0x03, 0x00, 0x10,},
1442
1443 Package (0x04) {0x0016FFFF, 0x00, 0x00, 0x16,},
1444 Package (0x04) {0x0016FFFF, 0x01, 0x00, 0x17,},
1445 Package (0x04) {0x0016FFFF, 0x02, 0x00, 0x10,},
1446 Package (0x04) {0x0016FFFF, 0x03, 0x00, 0x11,},
1447
1448 Package (0x04) {0x0017FFFF, 0x00, 0x00, 0x17,},
1449 Package (0x04) {0x0017FFFF, 0x01, 0x00, 0x10,},
1450 Package (0x04) {0x0017FFFF, 0x02, 0x00, 0x11,},
1451 Package (0x04) {0x0017FFFF, 0x03, 0x00, 0x12,},
1452
1453 Package (0x04) {0x0018FFFF, 0x00, 0x00, 0x10,},
1454 Package (0x04) {0x0018FFFF, 0x01, 0x00, 0x11,},
1455 Package (0x04) {0x0018FFFF, 0x02, 0x00, 0x12,},
1456 Package (0x04) {0x0018FFFF, 0x03, 0x00, 0x13,},
1457
1458 Package (0x04) {0x0019FFFF, 0x00, 0x00, 0x11,},
1459 Package (0x04) {0x0019FFFF, 0x01, 0x00, 0x12,},
1460 Package (0x04) {0x0019FFFF, 0x02, 0x00, 0x13,},
1461 Package (0x04) {0x0019FFFF, 0x03, 0x00, 0x14,},
1462
1463 Package (0x04) {0x001AFFFF, 0x00, 0x00, 0x12,},
1464 Package (0x04) {0x001AFFFF, 0x01, 0x00, 0x13,},
1465 Package (0x04) {0x001AFFFF, 0x02, 0x00, 0x14,},
1466 Package (0x04) {0x001AFFFF, 0x03, 0x00, 0x15,},
1467
1468 Package (0x04) {0x001BFFFF, 0x00, 0x00, 0x13,},
1469 Package (0x04) {0x001BFFFF, 0x01, 0x00, 0x14,},
1470 Package (0x04) {0x001BFFFF, 0x02, 0x00, 0x15,},
1471 Package (0x04) {0x001BFFFF, 0x03, 0x00, 0x16,},
1472
1473 Package (0x04) {0x001CFFFF, 0x00, 0x00, 0x14,},
1474 Package (0x04) {0x001CFFFF, 0x01, 0x00, 0x15,},
1475 Package (0x04) {0x001CFFFF, 0x02, 0x00, 0x16,},
1476 Package (0x04) {0x001CFFFF, 0x03, 0x00, 0x17,},
1477
1478 Package (0x04) {0x001DFFFF, 0x00, 0x00, 0x15,},
1479 Package (0x04) {0x001DFFFF, 0x01, 0x00, 0x16,},
1480 Package (0x04) {0x001DFFFF, 0x02, 0x00, 0x17,},
1481 Package (0x04) {0x001DFFFF, 0x03, 0x00, 0x10,},
1482
1483 Package (0x04) {0x001EFFFF, 0x00, 0x00, 0x16,},
1484 Package (0x04) {0x001EFFFF, 0x01, 0x00, 0x17,},
1485 Package (0x04) {0x001EFFFF, 0x02, 0x00, 0x10,},
1486 Package (0x04) {0x001EFFFF, 0x03, 0x00, 0x11,},
1487
1488 Package (0x04) {0x001FFFFF, 0x00, 0x00, 0x17,},
1489 Package (0x04) {0x001FFFFF, 0x01, 0x00, 0x10,},
1490 Package (0x04) {0x001FFFFF, 0x02, 0x00, 0x11,},
1491 Package (0x04) {0x001FFFFF, 0x03, 0x00, 0x12,}
1492 })
1493
1494 // Possible resource settings for PCI link A
1495 Name (PRSA, ResourceTemplate ()
1496 {
1497 IRQ (Level, ActiveLow, Shared) {5,9,10,11}
1498 })
1499
1500 // Possible resource settings for PCI link B
1501 Name (PRSB, ResourceTemplate ()
1502 {
1503 IRQ (Level, ActiveLow, Shared) {5,9,10,11}
1504 })
1505
1506 // Possible resource settings for PCI link C
1507 Name (PRSC, ResourceTemplate ()
1508 {
1509 IRQ (Level, ActiveLow, Shared) {5,9,10,11}
1510 })
1511
1512 // Possible resource settings for PCI link D
1513 Name (PRSD, ResourceTemplate ()
1514 {
1515 IRQ (Level, ActiveLow, Shared) {5,9,10,11}
1516 })
1517
1518 // PCI bus 0
1519 Device (PCI0)
1520 {
1521 Name (_HID, EisaId ("PNP0A03"))
1522 Name (_ADR, 0x00) // address
1523 Name (_BBN, 0x00) // base bus adddress
1524 Name (_UID, 0x00)
1525
1526 // Method that returns routing table
1527 Method (_PRT, 0, NotSerialized)
1528 {
1529 if (LEqual (LAnd (PICM, UIOA), Zero)) {
1530 DBG ("RETURNING PIC\n")
1531 Store (0x00, \_SB.PCI0.SBRG.APDE)
1532 Store (0x00, \_SB.PCI0.SBRG.APAD)
1533 Return (PR00)
1534 }
1535 else {
1536 DBG ("RETURNING APIC\n")
1537 Store (0xbe, \_SB.PCI0.SBRG.APDE)
1538 Store (0xef, \_SB.PCI0.SBRG.APAD)
1539 Return (PR01)
1540 }
1541 }
1542
1543 Device (SBRG)
1544 {
1545 // Address of the PIIX3 (device 1 function 0)
1546 Name (_ADR, 0x00010000)
1547 OperationRegion (PCIC, PCI_Config, 0x00, 0xff)
1548
1549 Field (PCIC, ByteAcc, NoLock, Preserve)
1550 {
1551 Offset (0xad),
1552 APAD, 8,
1553 Offset (0xde),
1554 APDE, 8,
1555 }
1556
1557 // Keyboard device
1558 Device (PS2K)
1559 {
1560 Name (_HID, EisaId ("PNP0303"))
1561 Method (_STA, 0, NotSerialized)
1562 {
1563 Return (0x0F)
1564 }
1565
1566 Name (_CRS, ResourceTemplate ()
1567 {
1568 IO (Decode16, 0x0060, 0x0060, 0x00, 0x01)
1569 IO (Decode16, 0x0064, 0x0064, 0x00, 0x01)
1570 IRQNoFlags () {1}
1571 })
1572 }
1573
1574 // DMA Controller
1575 Device (DMAC)
1576 {
1577 Name (_HID, EisaId ("PNP0200"))
1578 Name (_CRS, ResourceTemplate ()
1579 {
1580 IO (Decode16, 0x0000, 0x0000, 0x01, 0x10)
1581 IO (Decode16, 0x0080, 0x0080, 0x01, 0x10)
1582 IO (Decode16, 0x00C0, 0x00C0, 0x01, 0x20)
1583 DMA (Compatibility, BusMaster, Transfer8_16) {4}
1584 })
1585 }
1586
1587 // Floppy disk controller
1588 Device (FDC0)
1589 {
1590 Name (_HID, EisaId ("PNP0700"))
1591
1592 Method (_STA, 0, NotSerialized)
1593 {
1594 Return (UFDC)
1595 }
1596
1597 // Current resource settings
1598 Name (_CRS, ResourceTemplate ()
1599 {
1600 IO (Decode16, 0x03F0, 0x03F0, 0x01, 0x06)
1601 IO (Decode16, 0x03F7, 0x03F7, 0x01, 0x01)
1602 IRQNoFlags () {6}
1603 DMA (Compatibility, NotBusMaster, Transfer8) {2}
1604 })
1605
1606 // Possible resource settings
1607 Name (_PRS, ResourceTemplate ()
1608 {
1609 IO (Decode16, 0x03F0, 0x03F0, 0x01, 0x06)
1610 IO (Decode16, 0x03F7, 0x03F7, 0x01, 0x01)
1611 IRQNoFlags () {6}
1612 DMA (Compatibility, NotBusMaster, Transfer8) {2}
1613 })
1614
1615 }
1616
1617 // Mouse device
1618 Device (PS2M)
1619 {
1620 Name (_HID, EisaId ("PNP0F03"))
1621 Method (_STA, 0, NotSerialized)
1622 {
1623 Return (0x0F)
1624 }
1625
1626 Name (_CRS, ResourceTemplate ()
1627 {
1628 IRQNoFlags () {12}
1629 })
1630 }
1631
1632 // Parallel port
1633 Device (LPT)
1634 {
1635 Name (_HID, EisaId ("PNP0400"))
1636 Method (_STA, 0, NotSerialized)
1637 {
1638 Return (0x0F)
1639 }
1640 Name (_CRS, ResourceTemplate ()
1641 {
1642 IO (Decode16, 0x0378, 0x0378, 0x08, 0x08)
1643 IO (Decode16, 0x0778, 0x0778, 0x08, 0x08)
1644 IRQNoFlags () {7}
1645 })
1646 }
1647
1648 // RTC and CMOS
1649 Device (RTC)
1650 {
1651 Name (_HID, EisaId ("PNP0B00"))
1652 Name (_CRS, ResourceTemplate ()
1653 {
1654 IO (Decode16,
1655 0x0070, // Range Minimum
1656 0x0070, // Range Maximum
1657 0x01, // Alignment
1658 0x02, // Length
1659 )
1660 })
1661 Method (_STA, 0, NotSerialized)
1662 {
1663 Return (0x0f)
1664 }
1665 }
1666
1667 // System Management Controller
1668 Device (SMC)
1669 {
1670 Name (_HID, EisaId ("APP0001"))
1671 Name (_CID, "smc-napa")
1672
1673 Method (_STA, 0, NotSerialized)
1674 {
1675 Return (USMC)
1676 }
1677 Name (_CRS, ResourceTemplate ()
1678 {
1679 IO (Decode16,
1680 0x0300, // Range Minimum
1681 0x0300, // Range Maximum
1682 0x01, // Alignment
1683 0x20, // Length
1684 )
1685 // This line seriously confuses Windows ACPI driver, so not even try to
1686 // enable SMC for Windows guests
1687 IRQNoFlags () {8}
1688 })
1689 }
1690 }
1691
1692 // Control method battery
1693 Device (BAT0)
1694 {
1695 Name (_HID, EisaId ("PNP0C0A"))
1696 Name (_UID, 0x00)
1697
1698 Scope (\_GPE)
1699 {
1700 // GPE bit 0 handler
1701 // GPE.0 must be set and SCI raised when
1702 // battery info changed and _BIF must be
1703 // re-evaluated
1704 Method (_L00, 0, NotSerialized)
1705 {
1706 Notify (\_SB.PCI0.BAT0, 0x81)
1707 }
1708 }
1709
1710 OperationRegion (CBAT, SystemIO, 0x4040, 0x08)
1711 Field (CBAT, DwordAcc, NoLock, Preserve)
1712 {
1713 IDX0, 32,
1714 DAT0, 32,
1715 }
1716
1717 IndexField (IDX0, DAT0, DwordAcc, NoLock, Preserve)
1718 {
1719 STAT, 32,
1720 PRAT, 32,
1721 RCAP, 32,
1722 PVOL, 32,
1723
1724 UNIT, 32,
1725 DCAP, 32,
1726 LFCP, 32,
1727 BTEC, 32,
1728 DVOL, 32,
1729 DWRN, 32,
1730 DLOW, 32,
1731 GRN1, 32,
1732 GRN2, 32,
1733
1734 BSTA, 32,
1735 APSR, 32,
1736 }
1737
1738 Method (_STA, 0, NotSerialized)
1739 {
1740 return (BSTA)
1741 }
1742
1743 Name (PBIF, Package ()
1744 {
1745 0x01, // Power unit, 1 - mA
1746 0x7fffffff, // Design capacity
1747 0x7fffffff, // Last full charge capacity
1748 0x00, // Battery technology
1749 0xffffffff, // Design voltage
1750 0x00, // Design capacity of Warning
1751 0x00, // Design capacity of Low
1752 0x04, // Battery capacity granularity 1
1753 0x04, // Battery capacity granularity 2
1754 "1", // Model number
1755 "0", // Serial number
1756 "VBOX", // Battery type
1757 "innotek" // OEM Information
1758 })
1759
1760 Name (PBST, Package () {
1761 0, // Battery state
1762 0x7fffffff, // Battery present rate
1763 0x7fffffff, // Battery remaining capacity
1764 0x7fffffff // Battery present voltage
1765 })
1766
1767 // Battery information
1768 Method (_BIF, 0, NotSerialized)
1769 {
1770 Store (UNIT, Index (PBIF, 0,))
1771 Store (DCAP, Index (PBIF, 1,))
1772 Store (LFCP, Index (PBIF, 2,))
1773 Store (BTEC, Index (PBIF, 3,))
1774 Store (DVOL, Index (PBIF, 4,))
1775 Store (DWRN, Index (PBIF, 5,))
1776 Store (DLOW, Index (PBIF, 6,))
1777 Store (GRN1, Index (PBIF, 7,))
1778 Store (GRN2, Index (PBIF, 8,))
1779
1780 DBG ("_BIF:\n")
1781 HEX4 (DerefOf (Index (PBIF, 0,)))
1782 HEX4 (DerefOf (Index (PBIF, 1,)))
1783 HEX4 (DerefOf (Index (PBIF, 2,)))
1784 HEX4 (DerefOf (Index (PBIF, 3,)))
1785 HEX4 (DerefOf (Index (PBIF, 4,)))
1786 HEX4 (DerefOf (Index (PBIF, 5,)))
1787 HEX4 (DerefOf (Index (PBIF, 6,)))
1788 HEX4 (DerefOf (Index (PBIF, 7,)))
1789 HEX4 (DerefOf (Index (PBIF, 8,)))
1790
1791 return (PBIF)
1792 }
1793
1794 // Battery status
1795 Method (_BST, 0, NotSerialized)
1796 {
1797 Store (STAT, Index (PBST, 0,))
1798 Store (PRAT, Index (PBST, 1,))
1799 Store (RCAP, Index (PBST, 2,))
1800 Store (PVOL, Index (PBST, 3,))
1801/*
1802 DBG ("_BST:\n")
1803 HEX4 (DerefOf (Index (PBST, 0,)))
1804 HEX4 (DerefOf (Index (PBST, 1,)))
1805 HEX4 (DerefOf (Index (PBST, 2,)))
1806 HEX4 (DerefOf (Index (PBST, 3,)))
1807*/
1808 return (PBST)
1809 }
1810 }
1811
1812 Device (AC)
1813 {
1814 Name (_HID, "ACPI0003")
1815 Name (_UID, 0x00)
1816 Name (_PCL, Package (0x01)
1817 {
1818 \_SB
1819 })
1820
1821 Method (_PSR, 0, NotSerialized)
1822 {
1823 // DBG ("_PSR:\n")
1824 // HEX4 (\_SB.PCI0.BAT0.APSR)
1825 return (\_SB.PCI0.BAT0.APSR)
1826 }
1827
1828 Method (_STA, 0, NotSerialized)
1829 {
1830 return (0x0f)
1831 }
1832 }
1833 }
1834 }
1835
1836 Scope (\_SB)
1837 {
1838 Scope (PCI0)
1839 {
1840 // PCI0 current resource settings
1841 Name (CRS, ResourceTemplate ()
1842 {
1843 WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
1844 0x0000,
1845 0x0000,
1846 0x00FF,
1847 0x0000,
1848 0x0100)
1849 IO (Decode16, 0x0CF8, 0x0CF8, 0x01, 0x08)
1850 WordIO (ResourceProducer, MinFixed, MaxFixed,
1851 PosDecode, EntireRange,
1852 0x0000,
1853 0x0000,
1854 0x0CF7,
1855 0x0000,
1856 0x0CF8)
1857 WordIO (ResourceProducer, MinFixed, MaxFixed,
1858 PosDecode, EntireRange,
1859 0x0000,
1860 0x0D00,
1861 0xFFFF,
1862 0x0000,
1863 0xF300)
1864
1865 /* Taken from ACPI faq (with some modifications) */
1866 DwordMemory( // descriptor for video RAM behind ISA bus
1867 ResourceProducer, // bit 0 of general flags is 0
1868 PosDecode,
1869 MinFixed, // Range is fixed
1870 MaxFixed, // Range is Fixed
1871 Cacheable,
1872 ReadWrite,
1873 0x00000000, // Granularity
1874 0x000a0000, // Min
1875 0x000bffff, // Max
1876 0x00000000, // Translation
1877 0x00020000 // Range Length
1878 )
1879
1880 DwordMemory( // Consumed-and-produced resource
1881 // (all of low memory space)
1882 ResourceProducer, // bit 0 of general flags is 0
1883 PosDecode, // positive Decode
1884 MinFixed, // Range is fixed
1885 MaxFixed, // Range is fixed
1886 Cacheable,
1887 ReadWrite,
1888 0x00000000, // Granularity
1889 0x00000000, // Min (calculated dynamically)
1890
1891 0xffdfffff, // Max = 4GB - 2MB
1892 0x00000000, // Translation
1893 0xdfdfffff, // Range Length (calculated
1894 // dynamically)
1895 , // Optional field left blank
1896 , // Optional field left blank
1897 MEM3 // Name declaration for this
1898 // descriptor
1899 )
1900 })
1901
1902// Name (TOM, ResourceTemplate () // Memory above 4GB (aka high), appended when needed.
1903// {
1904// QWORDMemory(
1905// ResourceProducer, // bit 0 of general flags is 0
1906// PosDecode, // positive Decode
1907// MinFixed, // Range is fixed
1908// MaxFixed, // Range is fixed
1909// Cacheable,
1910// ReadWrite,
1911// 0x0000000000000000, // _GRA: Granularity.
1912// 0 /*0x0000000100000000*/, // _MIN: Min address, 4GB.
1913// 0 /*0x00000fffffffffff*/, // _MAX: Max possible address, 16TB.
1914// 0x0000000000000000, // _TRA: Translation
1915// 0x0000000000000000, // _LEN: Range length (calculated dynamically)
1916// , // ResourceSourceIndex: Optional field left blank
1917// , // ResourceSource: Optional field left blank
1918// MEM4 // Name declaration for this descriptor.
1919// )
1920// })
1921
1922 Method (_CRS, 0, NotSerialized)
1923 {
1924 CreateDwordField (CRS, \_SB.PCI0.MEM3._MIN, RAMT)
1925 CreateDwordField (CRS, \_SB.PCI0.MEM3._LEN, RAMR)
1926// CreateQwordField (TOM, \_SB.PCI0.MEM4._LEN, TM4L)
1927// CreateQwordField (TOM, \_SB.PCI0.MEM4._LEN, TM4N)
1928// CreateQwordField (TOM, \_SB.PCI0.MEM4._LEN, TM4X)
1929
1930 Store (MEML, RAMT)
1931 Subtract (0xffe00000, RAMT, RAMR)
1932
1933// If (LNotEqual (MEMH, 0x00000000))
1934// {
1935// //
1936// // Update the TOM resource template and append it to CRS.
1937// // This way old < 4GB guest doesn't see anything different.
1938// // (MEMH is the memory above 4GB specified in 64KB units.)
1939// //
1940// // Note: ACPI v2 doesn't do 32-bit integers. IASL may fail on
1941// // seeing 64-bit constants and the code probably wont work.
1942// //
1943// Store (1, TM4N)
1944// ShiftLeft (TM4N, 32, TM4N)
1945//
1946// Store (0x00000fff, TM4X)
1947// ShiftLeft (TM4X, 32, TM4X)
1948// Or (TM4X, 0xffffffff, TM4X)
1949//
1950// Store (MEMH, TM4L)
1951// ShiftLeft (TM4L, 16, TM4L)
1952//
1953// ConcatenateResTemplate (CRS, TOM, Local2)
1954// Return (Local2)
1955// }
1956
1957 Return (CRS)
1958 }
1959 }
1960 }
1961
1962 Scope (\_SB)
1963 {
1964 // High Precision Event Timer
1965 Device(HPET) {
1966 Name(_HID, EISAID("PNP0103"))
1967 Name (_CID, 0x010CD041)
1968 Name(_UID, 0)
1969 Method (_STA, 0, NotSerialized) {
1970 Return(UHPT)
1971 }
1972 Name(_CRS, ResourceTemplate() {
1973 DWordMemory(
1974 ResourceConsumer, PosDecode, MinFixed, MaxFixed,
1975 NonCacheable, ReadWrite,
1976 0x00000000,
1977 0xFED00000,
1978 0xFED003FF,
1979 0x00000000,
1980 0x00000400 /* 1K memory: FED00000 - FED003FF */
1981 )
1982 })
1983 }
1984
1985 // Fields within PIIX3 configuration[0x60..0x63] with
1986 // IRQ mappings
1987 Field (\_SB.PCI0.SBRG.PCIC, ByteAcc, NoLock, Preserve)
1988 {
1989 Offset (0x60),
1990 PIRA, 8,
1991 PIRB, 8,
1992 PIRC, 8,
1993 PIRD, 8
1994 }
1995
1996 Name (BUFA, ResourceTemplate ()
1997 {
1998 IRQ (Level, ActiveLow, Shared) {15}
1999 })
2000 CreateWordField (BUFA, 0x01, ICRS)
2001
2002 // Generic status of IRQ routing entry
2003 Method (LSTA, 1, NotSerialized)
2004 {
2005 And (Arg0, 0x80, Local0)
2006// DBG ("LSTA: ")
2007// HEX (Arg0)
2008 If (Local0)
2009 {
2010 Return (0x09)
2011 }
2012 Else
2013 {
2014 Return (0x0B)
2015 }
2016 }
2017
2018 // Generic "current resource settings" for routing entry
2019 Method (LCRS, 1, NotSerialized)
2020 {
2021 And (Arg0, 0x0F, Local0)
2022 ShiftLeft (0x01, Local0, ICRS)
2023// DBG ("LCRS: ")
2024// HEX (ICRS)
2025 Return (BUFA)
2026 }
2027
2028 // Generic "set resource settings" for routing entry
2029 Method (LSRS, 1, NotSerialized)
2030 {
2031 CreateWordField (Arg0, 0x01, ISRS)
2032 FindSetRightBit (ISRS, Local0)
2033 Return (Decrement (Local0))
2034 }
2035
2036 // Generic "disable" for routing entry
2037 Method (LDIS, 1, NotSerialized)
2038 {
2039 Return (Or (Arg0, 0x80))
2040 }
2041
2042 // Link A
2043 Device (LNKA)
2044 {
2045 Name (_HID, EisaId ("PNP0C0F"))
2046 Name (_UID, 0x01)
2047
2048 // Status
2049 Method (_STA, 0, NotSerialized)
2050 {
2051 DBG ("LNKA._STA\n")
2052 Return (LSTA (PIRA))
2053 }
2054
2055 // Possible resource settings
2056 Method (_PRS, 0, NotSerialized)
2057 {
2058 DBG ("LNKA._PRS\n")
2059 Return (PRSA)
2060 }
2061
2062 // Disable
2063 Method (_DIS, 0, NotSerialized)
2064 {
2065 DBG ("LNKA._DIS\n")
2066 Store (LDIS (PIRA), PIRA)
2067 }
2068
2069 // Current resource settings
2070 Method (_CRS, 0, NotSerialized)
2071 {
2072 DBG ("LNKA._CRS\n")
2073 Return (LCRS (PIRA))
2074 }
2075
2076 // Set resource settings
2077 Method (_SRS, 1, NotSerialized)
2078 {
2079 DBG ("LNKA._SRS: ")
2080 HEX (LSRS (Arg0))
2081 Store (LSRS (Arg0), PIRA)
2082 }
2083 }
2084
2085 // Link B
2086 Device (LNKB)
2087 {
2088 Name (_HID, EisaId ("PNP0C0F"))
2089 Name (_UID, 0x02)
2090 Method (_STA, 0, NotSerialized)
2091 {
2092 // DBG ("LNKB._STA\n")
2093 Return (LSTA (PIRB))
2094 }
2095
2096 Method (_PRS, 0, NotSerialized)
2097 {
2098 // DBG ("LNKB._PRS\n")
2099 Return (PRSB)
2100 }
2101
2102 Method (_DIS, 0, NotSerialized)
2103 {
2104 // DBG ("LNKB._DIS\n")
2105 Store (LDIS (PIRB), PIRB)
2106 }
2107
2108 Method (_CRS, 0, NotSerialized)
2109 {
2110 // DBG ("LNKB._CRS\n")
2111 Return (LCRS (PIRB))
2112 }
2113
2114 Method (_SRS, 1, NotSerialized)
2115 {
2116 DBG ("LNKB._SRS: ")
2117 HEX (LSRS (Arg0))
2118 Store (LSRS (Arg0), PIRB)
2119 }
2120 }
2121
2122 // Link C
2123 Device (LNKC)
2124 {
2125 Name (_HID, EisaId ("PNP0C0F"))
2126 Name (_UID, 0x03)
2127 Method (_STA, 0, NotSerialized)
2128 {
2129 // DBG ("LNKC._STA\n")
2130 Return (LSTA (PIRC))
2131 }
2132
2133 Method (_PRS, 0, NotSerialized)
2134 {
2135 // DBG ("LNKC._PRS\n")
2136 Return (PRSC)
2137 }
2138
2139 Method (_DIS, 0, NotSerialized)
2140 {
2141 // DBG ("LNKC._DIS\n")
2142 Store (LDIS (PIRC), PIRC)
2143 }
2144
2145 Method (_CRS, 0, NotSerialized)
2146 {
2147 // DBG ("LNKC._CRS\n")
2148 Return (LCRS (PIRC))
2149 }
2150
2151 Method (_SRS, 1, NotSerialized)
2152 {
2153 DBG ("LNKC._SRS: ")
2154 HEX (LSRS (Arg0))
2155 Store (LSRS (Arg0), PIRC)
2156 }
2157 }
2158
2159 // Link D
2160 Device (LNKD)
2161 {
2162 Name (_HID, EisaId ("PNP0C0F"))
2163 Name (_UID, 0x04)
2164 Method (_STA, 0, NotSerialized)
2165 {
2166 // DBG ("LNKD._STA\n")
2167 Return (LSTA (PIRD))
2168 }
2169
2170 Method (_PRS, 0, NotSerialized)
2171 {
2172 // DBG ("LNKD._PRS\n")
2173 Return (PRSD)
2174 }
2175
2176 Method (_DIS, 0, NotSerialized)
2177 {
2178 // DBG ("LNKD._DIS\n")
2179 Store (LDIS (PIRA), PIRD)
2180 }
2181
2182 Method (_CRS, 0, NotSerialized)
2183 {
2184 // DBG ("LNKD._CRS\n")
2185 Return (LCRS (PIRD))
2186 }
2187
2188 Method (_SRS, 1, NotSerialized)
2189 {
2190 DBG ("LNKD._SRS: ")
2191 HEX (LSRS (Arg0))
2192 Store (LSRS (Arg0), PIRD)
2193 }
2194 }
2195 }
2196
2197 // Sx states
2198 Name (_S0, Package (2) {
2199 0x00,
2200 0x00,
2201 })
2202
2203 Name (_S5, Package (2) {
2204 0x05,
2205 0x05,
2206 })
2207
2208 Method (_PTS, 1, NotSerialized)
2209 {
2210 DBG ("Prepare to sleep: ")
2211 HEX (Arg0)
2212 }
2213}
2214
2215/*
2216 * Local Variables:
2217 * comment-start: "//"
2218 * End:
2219 */
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