VirtualBox

source: vbox/trunk/src/VBox/Devices/PC/vbox-cpuhotplug.dsl@ 25893

Last change on this file since 25893 was 25847, checked in by vboxsync, 15 years ago

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1// $Id: vbox-cpuhotplug.dsl 25847 2010-01-14 21:28:19Z vboxsync $
2/// @file
3//
4// VirtualBox ACPI
5//
6// Copyright (C) 2006-2007 Sun Microsystems, Inc.
7//
8// This file is part of VirtualBox Open Source Edition (OSE), as
9// available from http://www.virtualbox.org. This file is free software;
10// you can redistribute it and/or modify it under the terms of the GNU
11// General Public License (GPL) as published by the Free Software
12// Foundation, in version 2 as it comes in the "COPYING" file of the
13// VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14// hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15//
16// Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
17// Clara, CA 95054 USA or visit http://www.sun.com if you need
18// additional information or have any questions.
19
20DefinitionBlock ("DSDT.aml", "DSDT", 1, "VBOX ", "VBOXBIOS", 2)
21{
22 // Declare debugging ports withing SystemIO
23 OperationRegion(DBG0, SystemIO, 0x3000, 4)
24
25 // Writes to this field Will dump hex char
26 Field (DBG0, ByteAcc, NoLock, Preserve)
27 {
28 DHE1, 8,
29 }
30
31 // Writes to this field Will dump hex word
32 Field (DBG0, WordAcc, NoLock, Preserve)
33 {
34 DHE2, 16,
35 }
36
37 // Writes to this field Will dump hex double word
38 Field (DBG0, DWordAcc, NoLock, Preserve)
39 {
40 DHE4, 32,
41 }
42
43 // Writes to this field will dump ascii char
44 Field (DBG0, ByteAcc, NoLock, Preserve)
45 {
46 Offset (1),
47 DCHR, 8
48 }
49
50 // Shortcuts
51 Method(HEX, 1)
52 {
53 Store (Arg0, DHE1)
54 }
55
56 Method(HEX2, 1)
57 {
58 Store (Arg0, DHE2)
59 }
60
61 Method(HEX4, 1)
62 {
63 Store (Arg0, DHE4)
64 }
65
66 // Code from Microsoft sample
67 // http://www.microsoft.com/whdc/system/pnppwr/powermgmt/_OSI-method.mspx
68
69 //
70 // SLEN(Str) - Returns the length of Str (excluding NULL).
71 //
72 Method(SLEN, 1)
73 {
74 //
75 // Note: The caller must make sure that the argument is a string object.
76 //
77 Store(Arg0, Local0)
78 Return(Sizeof(Local0))
79 }
80
81 Method(S2BF, 1)
82 {
83 //
84 // Note: The caller must make sure that the argument is a string object.
85 //
86 // Local0 contains length of string + NULL.
87 //
88 Store(Arg0, Local0)
89 Add(SLEN(Local0), One, Local0)
90 //
91 // Convert the string object into a buffer object.
92 //
93 Name(BUFF, Buffer(Local0) {})
94 Store(Arg0, BUFF)
95 Return(BUFF)
96 }
97
98 // Convert ASCII string to buffer and store it's contents (char by
99 // char) into DCHR (thus possibly writing the string to console)
100 Method (\DBG, 1, NotSerialized)
101 {
102 Store(Arg0, Local0)
103 Store(S2BF (Local0), Local1)
104 Store(SizeOf (Local1), Local0)
105 Decrement (Local0)
106 Store(Zero, Local2)
107 While (Local0)
108 {
109 Decrement (Local0)
110 Store (DerefOf (Index (Local1, Local2)), DCHR)
111 Increment (Local2)
112 }
113 }
114
115 Name(PICM, 0)
116 Method(_PIC, 1)
117 {
118 DBG ("Pic mode: ")
119 HEX4 (Arg0)
120 Store (Arg0, PICM)
121 }
122
123 // Method to check for the CPU status
124 Method(CPCK, 1)
125 {
126 Store (Arg0, \_SB.CPUC)
127 Return(\_SB.CPUL)
128 }
129
130 // Processor object
131 // #1463: Showing the CPU can make the guest do bad things on it like SpeedStep.
132 // In this case, XP SP2 contains this buggy Intelppm.sys driver which wants to mess
133 // with SpeedStep if it finds a CPU object and when it finds out that it can't, it
134 // tries to unload and crashes (MS probably never tested this code path).
135 // So we enable this ACPI object only for certain guests, which do need it,
136 // if by accident Windows guest seen enabled CPU object, just boot from latest
137 // known good configuration, as it remembers state, even if ACPI object gets disabled.
138 Scope (\_PR)
139 {
140 Processor (CPU0, /* Name */
141 0x00, /* Id */
142 0x0, /* Processor IO ports range start */
143 0x0 /* Processor IO ports range length */
144 )
145 {
146 }
147
148 Device(HPL) // Needed or Linux can't find the CPU after insertion if it was ejected before.
149 {
150 Processor (CPU1, /* Name */
151 0x01, /* Id */
152 0x0, /* Processor IO ports range start */
153 0x0 /* Processor IO ports range length */
154 )
155 {
156 Method(_MAT, 0) {
157 Return(\_SB.MAL1)
158 }
159 Method(_STA) // Used for device presence detection
160 {
161 IF (CPCK(0x01))
162 {
163 Return (0xF)
164 }
165 Else
166 {
167 Return (0x1) // Present but not enabled
168 }
169 }
170 Method(_EJ0, 1)
171 {
172 Store(0x1, \_SB.CPUL) // Unlock the CPU
173 Return
174 }
175 }
176 Processor (CPU2, /* Name */
177 0x02, /* Id */
178 0x0, /* Processor IO ports range start */
179 0x0 /* Processor IO ports range length */
180 )
181 {
182 Method(_MAT, 0) {
183 Return(\_SB.MAL2)
184 }
185 Method(_STA) // Used for device presence detection
186 {
187 IF (CPCK(0x02))
188 {
189 Return (0xF)
190 }
191 Else
192 {
193 Return (0x1) // Present but not enabled
194 }
195 }
196 Method(_EJ0, 1)
197 {
198 Store(0x2, \_SB.CPUL) // Unlock the CPU
199 Return
200 }
201 }
202 Processor (CPU3, /* Name */
203 0x03, /* Id */
204 0x0, /* Processor IO ports range start */
205 0x0 /* Processor IO ports range length */
206 )
207 {
208 Method(_MAT, 0) {
209 Return(\_SB.MAL3)
210 }
211 Method(_STA) // Used for device presence detection
212 {
213 IF (CPCK(0x03))
214 {
215 Return (0xF)
216 }
217 Else
218 {
219 Return (0x1) // Present but not enabled
220 }
221 }
222 Method(_EJ0, 1)
223 {
224 Store(0x3, \_SB.CPUL) // Unlock the CPU
225 Return
226 }
227 }
228 Processor (CPU4, /* Name */
229 0x04, /* Id */
230 0x0, /* Processor IO ports range start */
231 0x0 /* Processor IO ports range length */
232 )
233 {
234 Method(_MAT, 0) {
235 Return(\_SB.MAL4)
236 }
237 Method(_STA) // Used for device presence detection
238 {
239 IF (CPCK(0x04))
240 {
241 Return (0xF)
242 }
243 Else
244 {
245 Return (0x1) // Present but not enabled
246 }
247 }
248 Method(_EJ0, 1)
249 {
250 Store(0x4, \_SB.CPUL) // Unlock the CPU
251 Return
252 }
253 }
254 Processor (CPU5, /* Name */
255 0x05, /* Id */
256 0x0, /* Processor IO ports range start */
257 0x0 /* Processor IO ports range length */
258 )
259 {
260 Method(_MAT, 0) {
261 Return(\_SB.MAL5)
262 }
263 Method(_STA) // Used for device presence detection
264 {
265 IF (CPCK(0x05))
266 {
267 Return (0xF)
268 }
269 Else
270 {
271 Return (0x1) // Present but not enabled
272 }
273 }
274 Method(_EJ0, 1)
275 {
276 Store(0x5, \_SB.CPUL) // Unlock the CPU
277 Return
278 }
279 }
280 Processor (CPU6, /* Name */
281 0x06, /* Id */
282 0x0, /* Processor IO ports range start */
283 0x0 /* Processor IO ports range length */
284 )
285 {
286 Method(_MAT, 0) {
287 Return(\_SB.MAL6)
288 }
289 Method(_STA) // Used for device presence detection
290 {
291 IF (CPCK(0x06))
292 {
293 Return (0xF)
294 }
295 Else
296 {
297 Return (0x1) // Present but not enabled
298 }
299 }
300 Method(_EJ0, 1)
301 {
302 Store(0x6, \_SB.CPUL) // Unlock the CPU
303 Return
304 }
305 }
306 Processor (CPU7, /* Name */
307 0x07, /* Id */
308 0x0, /* Processor IO ports range start */
309 0x0 /* Processor IO ports range length */
310 )
311 {
312 Method(_MAT, 0) {
313 Return(\_SB.MAL7)
314 }
315 Method(_STA) // Used for device presence detection
316 {
317 IF (CPCK(0x07))
318 {
319 Return (0xF)
320 }
321 Else
322 {
323 Return (0x1) // Present but not enabled
324 }
325 }
326 Method(_EJ0, 1)
327 {
328 Store(0x7, \_SB.CPUL) // Unlock the CPU
329 Return
330 }
331 }
332 Processor (CPU8, /* Name */
333 0x08, /* Id */
334 0x0, /* Processor IO ports range start */
335 0x0 /* Processor IO ports range length */
336 )
337 {
338 Method(_MAT, 0) {
339 Return(\_SB.MAL8)
340 }
341 Method(_STA) // Used for device presence detection
342 {
343 IF (CPCK(0x08))
344 {
345 Return (0xF)
346 }
347 Else
348 {
349 Return (0x1) // Present but not enabled
350 }
351 }
352 Method(_EJ0, 1)
353 {
354 Store(0x8, \_SB.CPUL) // Unlock the CPU
355 Return
356 }
357 }
358 Processor (CPU9, /* Name */
359 0x09, /* Id */
360 0x0, /* Processor IO ports range start */
361 0x0 /* Processor IO ports range length */
362 )
363 {
364 Method(_MAT, 0) {
365 Return(\_SB.MAL9)
366 }
367 Method(_STA) // Used for device presence detection
368 {
369 IF (CPCK(0x09))
370 {
371 Return (0xF)
372 }
373 Else
374 {
375 Return (0x1) // Present but not enabled
376 }
377 }
378 Method(_EJ0, 1)
379 {
380 Store(0x9, \_SB.CPUL) // Unlock the CPU
381 Return
382 }
383 }
384 Processor (CPUA, /* Name */
385 0x0a, /* Id */
386 0x0, /* Processor IO ports range start */
387 0x0 /* Processor IO ports range length */
388 )
389 {
390 Method(_MAT, 0) {
391 Return(\_SB.MALA)
392 }
393 Method(_STA) // Used for device presence detection
394 {
395 IF (CPCK(0x0a))
396 {
397 Return (0xF)
398 }
399 Else
400 {
401 Return (0x1) // Present but not enabled
402 }
403 }
404 Method(_EJ0, 1)
405 {
406 Store(0xa, \_SB.CPUL) // Unlock the CPU
407 Return
408 }
409 }
410 Processor (CPUB, /* Name */
411 0x0b, /* Id */
412 0x0, /* Processor IO ports range start */
413 0x0 /* Processor IO ports range length */
414 )
415 {
416 Method(_MAT, 0) {
417 Return(\_SB.MALB)
418 }
419 Method(_STA) // Used for device presence detection
420 {
421 IF (CPCK(0x0b))
422 {
423 Return (0xF)
424 }
425 Else
426 {
427 Return (0x1) // Present but not enabled
428 }
429 }
430 Method(_EJ0, 1)
431 {
432 Store(0xb, \_SB.CPUL) // Unlock the CPU
433 Return
434 }
435 }
436 Processor (CPUC, /* Name */
437 0x0c, /* Id */
438 0x0, /* Processor IO ports range start */
439 0x0 /* Processor IO ports range length */
440 )
441 {
442 Method(_MAT, 0) {
443 Return(\_SB.MALC)
444 }
445 Method(_STA) // Used for device presence detection
446 {
447 IF (CPCK(0x0c))
448 {
449 Return (0xF)
450 }
451 Else
452 {
453 Return (0x1) // Present but not enabled
454 }
455 }
456 Method(_EJ0, 1)
457 {
458 Store(0xc, \_SB.CPUL) // Unlock the CPU
459 Return
460 }
461 }
462 Processor (CPUD, /* Name */
463 0x0d, /* Id */
464 0x0, /* Processor IO ports range start */
465 0x0 /* Processor IO ports range length */
466 )
467 {
468 Method(_MAT, 0) {
469 Return(\_SB.MALD)
470 }
471 Method(_STA) // Used for device presence detection
472 {
473 IF (CPCK(0x0d))
474 {
475 Return (0xF)
476 }
477 Else
478 {
479 Return (0x1) // Present but not enabled
480 }
481 }
482 Method(_EJ0, 1)
483 {
484 Store(0xd, \_SB.CPUL) // Unlock the CPU
485 Return
486 }
487 }
488 Processor (CPUE, /* Name */
489 0x0e, /* Id */
490 0x0, /* Processor IO ports range start */
491 0x0 /* Processor IO ports range length */
492 )
493 {
494 Method(_MAT, 0) {
495 Return(\_SB.MALE)
496 }
497 Method(_STA) // Used for device presence detection
498 {
499 IF (CPCK(0x0e))
500 {
501 Return (0xF)
502 }
503 Else
504 {
505 Return (0x1) // Present but not enabled
506 }
507 }
508 Method(_EJ0, 1)
509 {
510 Store(0xe, \_SB.CPUL) // Unlock the CPU
511 Return
512 }
513 }
514 Processor (CPUF, /* Name */
515 0x0f, /* Id */
516 0x0, /* Processor IO ports range start */
517 0x0 /* Processor IO ports range length */
518 )
519 {
520 Method(_MAT, 0) {
521 Return(\_SB.MALF)
522 }
523 Method(_STA) // Used for device presence detection
524 {
525 IF (CPCK(0x0f))
526 {
527 Return (0xF)
528 }
529 Else
530 {
531 Return (0x1) // Present but not enabled
532 }
533 }
534 Method(_EJ0, 1)
535 {
536 Store(0xf, \_SB.CPUL) // Unlock the CPU
537 Return
538 }
539 }
540 Processor (CPUG, /* Name */
541 0x10, /* Id */
542 0x0, /* Processor IO ports range start */
543 0x0 /* Processor IO ports range length */
544 )
545 {
546 Method(_MAT, 0) {
547 Return(\_SB.MALG)
548 }
549 Method(_STA) // Used for device presence detection
550 {
551 IF (CPCK(0x10))
552 {
553 Return (0xF)
554 }
555 Else
556 {
557 Return (0x1) // Present but not enabled
558 }
559 }
560 Method(_EJ0, 1)
561 {
562 Store(0x10, \_SB.CPUL) // Unlock the CPU
563 Return
564 }
565 }
566 Processor (CPUH, /* Name */
567 0x11, /* Id */
568 0x0, /* Processor IO ports range start */
569 0x0 /* Processor IO ports range length */
570 )
571 {
572 Method(_MAT, 0) {
573 Return(\_SB.MALH)
574 }
575 Method(_STA) // Used for device presence detection
576 {
577 IF (CPCK(0x11))
578 {
579 Return (0xF)
580 }
581 Else
582 {
583 Return (0x1) // Present but not enabled
584 }
585 }
586 Method(_EJ0, 1)
587 {
588 Store(0x11, \_SB.CPUL) // Unlock the CPU
589 Return
590 }
591 }
592 Processor (CPUI, /* Name */
593 0x12, /* Id */
594 0x0, /* Processor IO ports range start */
595 0x0 /* Processor IO ports range length */
596 )
597 {
598 Method(_MAT, 0) {
599 Return(\_SB.MALI)
600 }
601 Method(_STA) // Used for device presence detection
602 {
603 IF (CPCK(0x12))
604 {
605 Return (0xF)
606 }
607 Else
608 {
609 Return (0x1) // Present but not enabled
610 }
611 }
612 Method(_EJ0, 1)
613 {
614 Store(0x12, \_SB.CPUL) // Unlock the CPU
615 Return
616 }
617 }
618 Processor (CPUJ, /* Name */
619 0x13, /* Id */
620 0x0, /* Processor IO ports range start */
621 0x0 /* Processor IO ports range length */
622 )
623 {
624 Method(_MAT, 0) {
625 Return(\_SB.MALJ)
626 }
627 Method(_STA) // Used for device presence detection
628 {
629 IF (CPCK(0x13))
630 {
631 Return (0xF)
632 }
633 Else
634 {
635 Return (0x1) // Present but not enabled
636 }
637 }
638 Method(_EJ0, 1)
639 {
640 Store(0x13, \_SB.CPUL) // Unlock the CPU
641 Return
642 }
643 }
644 Processor (CPUK, /* Name */
645 0x14, /* Id */
646 0x0, /* Processor IO ports range start */
647 0x0 /* Processor IO ports range length */
648 )
649 {
650 Method(_MAT, 0) {
651 Return(\_SB.MALK)
652 }
653 Method(_STA) // Used for device presence detection
654 {
655 IF (CPCK(0x14))
656 {
657 Return (0xF)
658 }
659 Else
660 {
661 Return (0x1) // Present but not enabled
662 }
663 }
664 Method(_EJ0, 1)
665 {
666 Store(0x14, \_SB.CPUL) // Unlock the CPU
667 Return
668 }
669 }
670 Processor (CPUL, /* Name */
671 0x15, /* Id */
672 0x0, /* Processor IO ports range start */
673 0x0 /* Processor IO ports range length */
674 )
675 {
676 Method(_MAT, 0) {
677 Return(\_SB.MALL)
678 }
679 Method(_STA) // Used for device presence detection
680 {
681 IF (CPCK(0x15))
682 {
683 Return (0xF)
684 }
685 Else
686 {
687 Return (0x1) // Present but not enabled
688 }
689 }
690 Method(_EJ0, 1)
691 {
692 Store(0x15, \_SB.CPUL) // Unlock the CPU
693 Return
694 }
695 }
696 Processor (CPUM, /* Name */
697 0x16, /* Id */
698 0x0, /* Processor IO ports range start */
699 0x0 /* Processor IO ports range length */
700 )
701 {
702 Method(_MAT, 0) {
703 Return(\_SB.MALM)
704 }
705 Method(_STA) // Used for device presence detection
706 {
707 IF (CPCK(0x16))
708 {
709 Return (0xF)
710 }
711 Else
712 {
713 Return (0x1) // Present but not enabled
714 }
715 }
716 Method(_EJ0, 1)
717 {
718 Store(0x16, \_SB.CPUL) // Unlock the CPU
719 Return
720 }
721 }
722 Processor (CPUN, /* Name */
723 0x17, /* Id */
724 0x0, /* Processor IO ports range start */
725 0x0 /* Processor IO ports range length */
726 )
727 {
728 Method(_MAT, 0) {
729 Return(\_SB.MALN)
730 }
731 Method(_STA) // Used for device presence detection
732 {
733 IF (CPCK(0x17))
734 {
735 Return (0xF)
736 }
737 Else
738 {
739 Return (0x1) // Present but not enabled
740 }
741 }
742 Method(_EJ0, 1)
743 {
744 Store(0x17, \_SB.CPUL) // Unlock the CPU
745 Return
746 }
747 }
748 Processor (CPUO, /* Name */
749 0x18, /* Id */
750 0x0, /* Processor IO ports range start */
751 0x0 /* Processor IO ports range length */
752 )
753 {
754 Method(_MAT, 0) {
755 Return(\_SB.MALO)
756 }
757 Method(_STA) // Used for device presence detection
758 {
759 IF (CPCK(0x18))
760 {
761 Return (0xF)
762 }
763 Else
764 {
765 Return (0x1) // Present but not enabled
766 }
767 }
768 Method(_EJ0, 1)
769 {
770 Store(0x18, \_SB.CPUL) // Unlock the CPU
771 Return
772 }
773 }
774 Processor (CPUP, /* Name */
775 0x19, /* Id */
776 0x0, /* Processor IO ports range start */
777 0x0 /* Processor IO ports range length */
778 )
779 {
780 Method(_MAT, 0) {
781 Return(\_SB.MALP)
782 }
783 Method(_STA) // Used for device presence detection
784 {
785 IF (CPCK(0x19))
786 {
787 Return (0xF)
788 }
789 Else
790 {
791 Return (0x1) // Present but not enabled
792 }
793 }
794 Method(_EJ0, 1)
795 {
796 Store(0x19, \_SB.CPUL) // Unlock the CPU
797 Return
798 }
799 }
800 Processor (CPUQ, /* Name */
801 0x1a, /* Id */
802 0x0, /* Processor IO ports range start */
803 0x0 /* Processor IO ports range length */
804 )
805 {
806 Method(_MAT, 0) {
807 Return(\_SB.MALQ)
808 }
809 Method(_STA) // Used for device presence detection
810 {
811 IF (CPCK(0x1a))
812 {
813 Return (0xF)
814 }
815 Else
816 {
817 Return (0x1) // Present but not enabled
818 }
819 }
820 Method(_EJ0, 1)
821 {
822 Store(0x1a, \_SB.CPUL) // Unlock the CPU
823 Return
824 }
825 }
826 Processor (CPUR, /* Name */
827 0x1b, /* Id */
828 0x0, /* Processor IO ports range start */
829 0x0 /* Processor IO ports range length */
830 )
831 {
832 Method(_MAT, 0) {
833 Return(\_SB.MALR)
834 }
835 Method(_STA) // Used for device presence detection
836 {
837 IF (CPCK(0x1b))
838 {
839 Return (0xF)
840 }
841 Else
842 {
843 Return (0x1) // Present but not enabled
844 }
845 }
846 Method(_EJ0, 1)
847 {
848 Store(0x1b, \_SB.CPUL) // Unlock the CPU
849 Return
850 }
851 }
852 Processor (CPUS, /* Name */
853 0x1c, /* Id */
854 0x0, /* Processor IO ports range start */
855 0x0 /* Processor IO ports range length */
856 )
857 {
858 Method(_MAT, 0) {
859 Return(\_SB.MALS)
860 }
861 Method(_STA) // Used for device presence detection
862 {
863 IF (CPCK(0x1c))
864 {
865 Return (0xF)
866 }
867 Else
868 {
869 Return (0x1) // Present but not enabled
870 }
871 }
872 Method(_EJ0, 1)
873 {
874 Store(0x1c, \_SB.CPUL) // Unlock the CPU
875 Return
876 }
877 }
878 Processor (CPUT, /* Name */
879 0x1d, /* Id */
880 0x0, /* Processor IO ports range start */
881 0x0 /* Processor IO ports range length */
882 )
883 {
884 Method(_MAT, 0) {
885 Return(\_SB.MALT)
886 }
887 Method(_STA) // Used for device presence detection
888 {
889 IF (CPCK(0x1d))
890 {
891 Return (0xF)
892 }
893 Else
894 {
895 Return (0x1) // Present but not enabled
896 }
897 }
898 Method(_EJ0, 1)
899 {
900 Store(0x1d, \_SB.CPUL) // Unlock the CPU
901 Return
902 }
903 }
904 Processor (CPUU, /* Name */
905 0x1e, /* Id */
906 0x0, /* Processor IO ports range start */
907 0x0 /* Processor IO ports range length */
908 )
909 {
910 Method(_MAT, 0) {
911 Return(\_SB.MALU)
912 }
913 Method(_STA) // Used for device presence detection
914 {
915 IF (CPCK(0x1e))
916 {
917 Return (0xF)
918 }
919 Else
920 {
921 Return (0x1) // Present but not enabled
922 }
923 }
924 Method(_EJ0, 1)
925 {
926 Store(0x1e, \_SB.CPUL) // Unlock the CPU
927 Return
928 }
929 }
930 Processor (CPUV, /* Name */
931 0x1f, /* Id */
932 0x0, /* Processor IO ports range start */
933 0x0 /* Processor IO ports range length */
934 )
935 {
936 Method(_MAT, 0) {
937 Return(\_SB.MALV)
938 }
939 Method(_STA) // Used for device presence detection
940 {
941 IF (CPCK(0x1f))
942 {
943 Return (0xF)
944 }
945 Else
946 {
947 Return (0x1) // Present but not enabled
948 }
949 }
950 Method(_EJ0, 1)
951 {
952 Store(0x1f, \_SB.CPUL) // Unlock the CPU
953 Return
954 }
955 }
956 }
957 }
958
959 Scope (\_GPE)
960 {
961 // GPE bit 1 handler
962 // GPE.1 must be set and SCI raised when
963 // processor info changed and CPU1 must be
964 // re-evaluated
965 Method (_L01, 0, NotSerialized)
966 {
967 // Eject notifications from ACPI are not supported so far by any guest
968 //IF (And(\_SB.CPUD, 0x2))
969 //{
970 // Notify(\_PR.HPL.CPU1, 0x3)
971 //}
972
973 IF (CPCK(0x01))
974 {
975 Notify (\_PR.HPL.CPU1, 0x0)
976 }
977 IF (CPCK(0x02))
978 {
979 Notify (\_PR.HPL.CPU2, 0x0)
980 }
981 IF (CPCK(0x03))
982 {
983 Notify (\_PR.HPL.CPU3, 0x0)
984 }
985 IF (CPCK(0x04))
986 {
987 Notify (\_PR.HPL.CPU4, 0x0)
988 }
989 IF (CPCK(0x05))
990 {
991 Notify (\_PR.HPL.CPU5, 0x0)
992 }
993 IF (CPCK(0x06))
994 {
995 Notify (\_PR.HPL.CPU6, 0x0)
996 }
997 IF (CPCK(0x07))
998 {
999 Notify (\_PR.HPL.CPU7, 0x0)
1000 }
1001 IF (CPCK(0x08))
1002 {
1003 Notify (\_PR.HPL.CPU8, 0x0)
1004 }
1005 IF (CPCK(0x09))
1006 {
1007 Notify (\_PR.HPL.CPU9, 0x0)
1008 }
1009 IF (CPCK(0x0a))
1010 {
1011 Notify (\_PR.HPL.CPUA, 0x0)
1012 }
1013 IF (CPCK(0x0b))
1014 {
1015 Notify (\_PR.HPL.CPUB, 0x0)
1016 }
1017 IF (CPCK(0x0c))
1018 {
1019 Notify (\_PR.HPL.CPUC, 0x0)
1020 }
1021 IF (CPCK(0x0d))
1022 {
1023 Notify (\_PR.HPL.CPUD, 0x0)
1024 }
1025 IF (CPCK(0x0e))
1026 {
1027 Notify (\_PR.HPL.CPUE, 0x0)
1028 }
1029 IF (CPCK(0x0f))
1030 {
1031 Notify (\_PR.HPL.CPUF, 0x0)
1032 }
1033 IF (CPCK(0x10))
1034 {
1035 Notify (\_PR.HPL.CPUG, 0x0)
1036 }
1037 IF (CPCK(0x11))
1038 {
1039 Notify (\_PR.HPL.CPUH, 0x0)
1040 }
1041 IF (CPCK(0x12))
1042 {
1043 Notify (\_PR.HPL.CPUI, 0x0)
1044 }
1045 IF (CPCK(0x13))
1046 {
1047 Notify (\_PR.HPL.CPUJ, 0x0)
1048 }
1049 IF (CPCK(0x14))
1050 {
1051 Notify (\_PR.HPL.CPUK, 0x0)
1052 }
1053 IF (CPCK(0x15))
1054 {
1055 Notify (\_PR.HPL.CPUL, 0x0)
1056 }
1057 IF (CPCK(0x16))
1058 {
1059 Notify (\_PR.HPL.CPUM, 0x0)
1060 }
1061 IF (CPCK(0x17))
1062 {
1063 Notify (\_PR.HPL.CPUN, 0x0)
1064 }
1065 IF (CPCK(0x18))
1066 {
1067 Notify (\_PR.HPL.CPUO, 0x0)
1068 }
1069 IF (CPCK(0x19))
1070 {
1071 Notify (\_PR.HPL.CPUP, 0x0)
1072 }
1073 IF (CPCK(0x1a))
1074 {
1075 Notify (\_PR.HPL.CPUQ, 0x0)
1076 }
1077 IF (CPCK(0x1b))
1078 {
1079 Notify (\_PR.HPL.CPUR, 0x0)
1080 }
1081 IF (CPCK(0x1c))
1082 {
1083 Notify (\_PR.HPL.CPUS, 0x0)
1084 }
1085 IF (CPCK(0x1d))
1086 {
1087 Notify (\_PR.HPL.CPUT, 0x0)
1088 }
1089 IF (CPCK(0x1e))
1090 {
1091 Notify (\_PR.HPL.CPUU, 0x0)
1092 }
1093 IF (CPCK(0x1f))
1094 {
1095 Notify (\_PR.HPL.CPUV, 0x0)
1096 }
1097 }
1098 }
1099
1100 Scope (\_SB)
1101 {
1102 OperationRegion (SYSI, SystemIO, 0x4048, 0x08)
1103 Field (SYSI, DwordAcc, NoLock, Preserve)
1104 {
1105 IDX0, 32,
1106 DAT0, 32,
1107 }
1108
1109 IndexField (IDX0, DAT0, DwordAcc, NoLock, Preserve)
1110 {
1111 MEML, 32,
1112 UIOA, 32,
1113 UHPT, 32,
1114 USMC, 32,
1115 UFDC, 32,
1116 // @todo: maybe make it bitmask instead?
1117 UCP0, 32,
1118 UCP1, 32,
1119 UCP2, 32,
1120 UCP3, 32,
1121 MEMH, 32,
1122 URTC, 32,
1123 CPUL, 32,
1124 CPUC, 32,
1125 MAAD, 32,
1126 MASZ, 32,
1127 Offset (0x80),
1128 ININ, 32,
1129 Offset (0x200),
1130 VAIN, 32,
1131 }
1132
1133 OperationRegion(MABL, SystemMemory, MAAD, MASZ)
1134 Field (MABL, ByteAcc, NoLock, Preserve)
1135 {
1136 MUDA, 288,
1137 MUDD, 32,
1138 MUDF, 32,
1139 MAL0, 64,
1140 MAL1, 64,
1141 MAL2, 64,
1142 MAL3, 64,
1143 MAL4, 64,
1144 MAL5, 64,
1145 MAL6, 64,
1146 MAL7, 64,
1147 MAL8, 64,
1148 MAL9, 64,
1149 MALA, 64,
1150 MALB, 64,
1151 MALC, 64,
1152 MALD, 64,
1153 MALE, 64,
1154 MALF, 64,
1155 MALG, 64,
1156 MALH, 64,
1157 MALI, 64,
1158 MALJ, 64,
1159 MALK, 64,
1160 MALL, 64,
1161 MALM, 64,
1162 MALN, 64,
1163 MALO, 64,
1164 MALP, 64,
1165 MALQ, 64,
1166 MALR, 64,
1167 MALS, 64,
1168 MALT, 64,
1169 MALU, 64,
1170 MALV, 64,
1171 }
1172
1173 Method (_INI, 0, NotSerialized)
1174 {
1175 Store (0xbadc0de, VAIN)
1176 DBG ("MEML: ")
1177 HEX4 (MEML)
1178 DBG ("UIOA: ")
1179 HEX4 (UIOA)
1180 DBG ("UHPT: ")
1181 HEX4 (UHPT)
1182 DBG ("USMC: ")
1183 HEX4 (USMC)
1184 DBG ("UFDC: ")
1185 HEX4 (UFDC)
1186 DBG ("UCP0: ")
1187 HEX4 (UCP0)
1188 DBG ("MEMH: ")
1189 HEX4 (MEMH)
1190 }
1191
1192 // PCI PIC IRQ Routing table
1193 // Must match pci.c:pci_slot_get_pirq
1194 Name (PR00, Package ()
1195 {
1196 Package (0x04) {0x0002FFFF, 0x00, LNKB, 0x00,},
1197 Package (0x04) {0x0002FFFF, 0x01, LNKC, 0x00,},
1198 Package (0x04) {0x0002FFFF, 0x02, LNKD, 0x00,},
1199 Package (0x04) {0x0002FFFF, 0x03, LNKA, 0x00,},
1200
1201 Package (0x04) {0x0003FFFF, 0x00, LNKC, 0x00,},
1202 Package (0x04) {0x0003FFFF, 0x01, LNKD, 0x00,},
1203 Package (0x04) {0x0003FFFF, 0x02, LNKA, 0x00,},
1204 Package (0x04) {0x0003FFFF, 0x03, LNKB, 0x00,},
1205
1206 Package (0x04) {0x0004FFFF, 0x00, LNKD, 0x00,},
1207 Package (0x04) {0x0004FFFF, 0x01, LNKA, 0x00,},
1208 Package (0x04) {0x0004FFFF, 0x02, LNKB, 0x00,},
1209 Package (0x04) {0x0004FFFF, 0x03, LNKC, 0x00,},
1210
1211 Package (0x04) {0x0005FFFF, 0x00, LNKA, 0x00,},
1212 Package (0x04) {0x0005FFFF, 0x01, LNKB, 0x00,},
1213 Package (0x04) {0x0005FFFF, 0x02, LNKC, 0x00,},
1214 Package (0x04) {0x0005FFFF, 0x03, LNKD, 0x00,},
1215
1216 Package (0x04) {0x0006FFFF, 0x00, LNKB, 0x00,},
1217 Package (0x04) {0x0006FFFF, 0x01, LNKC, 0x00,},
1218 Package (0x04) {0x0006FFFF, 0x02, LNKD, 0x00,},
1219 Package (0x04) {0x0006FFFF, 0x03, LNKA, 0x00,},
1220
1221 Package (0x04) {0x0007FFFF, 0x00, LNKC, 0x00,},
1222 Package (0x04) {0x0007FFFF, 0x01, LNKD, 0x00,},
1223 Package (0x04) {0x0007FFFF, 0x02, LNKA, 0x00,},
1224 Package (0x04) {0x0007FFFF, 0x03, LNKB, 0x00,},
1225
1226 Package (0x04) {0x0008FFFF, 0x00, LNKD, 0x00,},
1227 Package (0x04) {0x0008FFFF, 0x01, LNKA, 0x00,},
1228 Package (0x04) {0x0008FFFF, 0x02, LNKB, 0x00,},
1229 Package (0x04) {0x0008FFFF, 0x03, LNKC, 0x00,},
1230
1231 Package (0x04) {0x0009FFFF, 0x00, LNKA, 0x00,},
1232 Package (0x04) {0x0009FFFF, 0x01, LNKB, 0x00,},
1233 Package (0x04) {0x0009FFFF, 0x02, LNKC, 0x00,},
1234 Package (0x04) {0x0009FFFF, 0x03, LNKD, 0x00,},
1235
1236 Package (0x04) {0x000AFFFF, 0x00, LNKB, 0x00,},
1237 Package (0x04) {0x000AFFFF, 0x01, LNKC, 0x00,},
1238 Package (0x04) {0x000AFFFF, 0x02, LNKD, 0x00,},
1239 Package (0x04) {0x000AFFFF, 0x03, LNKA, 0x00,},
1240
1241 Package (0x04) {0x000BFFFF, 0x00, LNKC, 0x00,},
1242 Package (0x04) {0x000BFFFF, 0x01, LNKD, 0x00,},
1243 Package (0x04) {0x000BFFFF, 0x02, LNKA, 0x00,},
1244 Package (0x04) {0x000BFFFF, 0x03, LNKB, 0x00,},
1245
1246 Package (0x04) {0x000CFFFF, 0x00, LNKD, 0x00,},
1247 Package (0x04) {0x000CFFFF, 0x01, LNKA, 0x00,},
1248 Package (0x04) {0x000CFFFF, 0x02, LNKB, 0x00,},
1249 Package (0x04) {0x000CFFFF, 0x03, LNKC, 0x00,},
1250
1251 Package (0x04) {0x000DFFFF, 0x00, LNKA, 0x00,},
1252 Package (0x04) {0x000DFFFF, 0x01, LNKB, 0x00,},
1253 Package (0x04) {0x000DFFFF, 0x02, LNKC, 0x00,},
1254 Package (0x04) {0x000DFFFF, 0x03, LNKD, 0x00,},
1255
1256 Package (0x04) {0x000EFFFF, 0x00, LNKB, 0x00,},
1257 Package (0x04) {0x000EFFFF, 0x01, LNKC, 0x00,},
1258 Package (0x04) {0x000EFFFF, 0x02, LNKD, 0x00,},
1259 Package (0x04) {0x000EFFFF, 0x03, LNKA, 0x00,},
1260
1261 Package (0x04) {0x000FFFFF, 0x00, LNKC, 0x00,},
1262 Package (0x04) {0x000FFFFF, 0x01, LNKD, 0x00,},
1263 Package (0x04) {0x000FFFFF, 0x02, LNKA, 0x00,},
1264 Package (0x04) {0x000FFFFF, 0x03, LNKB, 0x00,},
1265
1266 Package (0x04) {0x0010FFFF, 0x00, LNKD, 0x00,},
1267 Package (0x04) {0x0010FFFF, 0x01, LNKA, 0x00,},
1268 Package (0x04) {0x0010FFFF, 0x02, LNKB, 0x00,},
1269 Package (0x04) {0x0010FFFF, 0x03, LNKC, 0x00,},
1270
1271 Package (0x04) {0x0011FFFF, 0x00, LNKA, 0x00,},
1272 Package (0x04) {0x0011FFFF, 0x01, LNKB, 0x00,},
1273 Package (0x04) {0x0011FFFF, 0x02, LNKC, 0x00,},
1274 Package (0x04) {0x0011FFFF, 0x03, LNKD, 0x00,},
1275
1276 Package (0x04) {0x0012FFFF, 0x00, LNKB, 0x00,},
1277 Package (0x04) {0x0012FFFF, 0x01, LNKC, 0x00,},
1278 Package (0x04) {0x0012FFFF, 0x02, LNKD, 0x00,},
1279 Package (0x04) {0x0012FFFF, 0x03, LNKA, 0x00,},
1280
1281 Package (0x04) {0x0013FFFF, 0x00, LNKC, 0x00,},
1282 Package (0x04) {0x0013FFFF, 0x01, LNKD, 0x00,},
1283 Package (0x04) {0x0013FFFF, 0x02, LNKA, 0x00,},
1284 Package (0x04) {0x0013FFFF, 0x03, LNKB, 0x00,},
1285
1286 Package (0x04) {0x0014FFFF, 0x00, LNKD, 0x00,},
1287 Package (0x04) {0x0014FFFF, 0x01, LNKA, 0x00,},
1288 Package (0x04) {0x0014FFFF, 0x02, LNKB, 0x00,},
1289 Package (0x04) {0x0014FFFF, 0x03, LNKC, 0x00,},
1290
1291 Package (0x04) {0x0015FFFF, 0x00, LNKA, 0x00,},
1292 Package (0x04) {0x0015FFFF, 0x01, LNKB, 0x00,},
1293 Package (0x04) {0x0015FFFF, 0x02, LNKC, 0x00,},
1294 Package (0x04) {0x0015FFFF, 0x03, LNKD, 0x00,},
1295
1296 Package (0x04) {0x0016FFFF, 0x00, LNKB, 0x00,},
1297 Package (0x04) {0x0016FFFF, 0x01, LNKC, 0x00,},
1298 Package (0x04) {0x0016FFFF, 0x02, LNKD, 0x00,},
1299 Package (0x04) {0x0016FFFF, 0x03, LNKA, 0x00,},
1300
1301 Package (0x04) {0x0017FFFF, 0x00, LNKC, 0x00,},
1302 Package (0x04) {0x0017FFFF, 0x01, LNKD, 0x00,},
1303 Package (0x04) {0x0017FFFF, 0x02, LNKA, 0x00,},
1304 Package (0x04) {0x0017FFFF, 0x03, LNKB, 0x00,},
1305
1306 Package (0x04) {0x0018FFFF, 0x00, LNKD, 0x00,},
1307 Package (0x04) {0x0018FFFF, 0x01, LNKA, 0x00,},
1308 Package (0x04) {0x0018FFFF, 0x02, LNKB, 0x00,},
1309 Package (0x04) {0x0018FFFF, 0x03, LNKC, 0x00,},
1310
1311 Package (0x04) {0x0019FFFF, 0x00, LNKA, 0x00,},
1312 Package (0x04) {0x0019FFFF, 0x01, LNKB, 0x00,},
1313 Package (0x04) {0x0019FFFF, 0x02, LNKC, 0x00,},
1314 Package (0x04) {0x0019FFFF, 0x03, LNKD, 0x00,},
1315
1316 Package (0x04) {0x001AFFFF, 0x00, LNKB, 0x00,},
1317 Package (0x04) {0x001AFFFF, 0x01, LNKC, 0x00,},
1318 Package (0x04) {0x001AFFFF, 0x02, LNKD, 0x00,},
1319 Package (0x04) {0x001AFFFF, 0x03, LNKA, 0x00,},
1320
1321 Package (0x04) {0x001BFFFF, 0x00, LNKC, 0x00,},
1322 Package (0x04) {0x001BFFFF, 0x01, LNKD, 0x00,},
1323 Package (0x04) {0x001BFFFF, 0x02, LNKA, 0x00,},
1324 Package (0x04) {0x001BFFFF, 0x03, LNKB, 0x00,},
1325
1326 Package (0x04) {0x001CFFFF, 0x00, LNKD, 0x00,},
1327 Package (0x04) {0x001CFFFF, 0x01, LNKA, 0x00,},
1328 Package (0x04) {0x001CFFFF, 0x02, LNKB, 0x00,},
1329 Package (0x04) {0x001CFFFF, 0x03, LNKC, 0x00,},
1330
1331 Package (0x04) {0x001DFFFF, 0x00, LNKA, 0x00,},
1332 Package (0x04) {0x001DFFFF, 0x01, LNKB, 0x00,},
1333 Package (0x04) {0x001DFFFF, 0x02, LNKC, 0x00,},
1334 Package (0x04) {0x001DFFFF, 0x03, LNKD, 0x00,},
1335
1336 Package (0x04) {0x001EFFFF, 0x00, LNKB, 0x00,},
1337 Package (0x04) {0x001EFFFF, 0x01, LNKC, 0x00,},
1338 Package (0x04) {0x001EFFFF, 0x02, LNKD, 0x00,},
1339 Package (0x04) {0x001EFFFF, 0x03, LNKA, 0x00,},
1340
1341 Package (0x04) {0x001FFFFF, 0x00, LNKC, 0x00,},
1342 Package (0x04) {0x001FFFFF, 0x01, LNKD, 0x00,},
1343 Package (0x04) {0x001FFFFF, 0x02, LNKA, 0x00,},
1344 Package (0x04) {0x001FFFFF, 0x03, LNKB, 0x00,}
1345 })
1346
1347 // PCI I/O APIC IRQ Routing table
1348 // Must match pci.c:pci_slot_get_acpi_pirq
1349 Name (PR01, Package ()
1350 {
1351 Package (0x04) {0x0002FFFF, 0x00, 0x00, 0x12,},
1352 Package (0x04) {0x0002FFFF, 0x01, 0x00, 0x13,},
1353 Package (0x04) {0x0002FFFF, 0x02, 0x00, 0x14,},
1354 Package (0x04) {0x0002FFFF, 0x03, 0x00, 0x15,},
1355
1356 Package (0x04) {0x0003FFFF, 0x00, 0x00, 0x13,},
1357 Package (0x04) {0x0003FFFF, 0x01, 0x00, 0x14,},
1358 Package (0x04) {0x0003FFFF, 0x02, 0x00, 0x15,},
1359 Package (0x04) {0x0003FFFF, 0x03, 0x00, 0x16,},
1360
1361 Package (0x04) {0x0004FFFF, 0x00, 0x00, 0x14,},
1362 Package (0x04) {0x0004FFFF, 0x01, 0x00, 0x15,},
1363 Package (0x04) {0x0004FFFF, 0x02, 0x00, 0x16,},
1364 Package (0x04) {0x0004FFFF, 0x03, 0x00, 0x17,},
1365
1366 Package (0x04) {0x0005FFFF, 0x00, 0x00, 0x15,},
1367 Package (0x04) {0x0005FFFF, 0x01, 0x00, 0x16,},
1368 Package (0x04) {0x0005FFFF, 0x02, 0x00, 0x17,},
1369 Package (0x04) {0x0005FFFF, 0x03, 0x00, 0x10,},
1370
1371 Package (0x04) {0x0006FFFF, 0x00, 0x00, 0x16,},
1372 Package (0x04) {0x0006FFFF, 0x01, 0x00, 0x17,},
1373 Package (0x04) {0x0006FFFF, 0x02, 0x00, 0x10,},
1374 Package (0x04) {0x0006FFFF, 0x03, 0x00, 0x11,},
1375
1376 Package (0x04) {0x0007FFFF, 0x00, 0x00, 0x17,},
1377 Package (0x04) {0x0007FFFF, 0x01, 0x00, 0x10,},
1378 Package (0x04) {0x0007FFFF, 0x02, 0x00, 0x11,},
1379 Package (0x04) {0x0007FFFF, 0x03, 0x00, 0x12,},
1380
1381 Package (0x04) {0x0008FFFF, 0x00, 0x00, 0x10,},
1382 Package (0x04) {0x0008FFFF, 0x01, 0x00, 0x11,},
1383 Package (0x04) {0x0008FFFF, 0x02, 0x00, 0x12,},
1384 Package (0x04) {0x0008FFFF, 0x03, 0x00, 0x13,},
1385
1386 Package (0x04) {0x0009FFFF, 0x00, 0x00, 0x11,},
1387 Package (0x04) {0x0009FFFF, 0x01, 0x00, 0x12,},
1388 Package (0x04) {0x0009FFFF, 0x02, 0x00, 0x13,},
1389 Package (0x04) {0x0009FFFF, 0x03, 0x00, 0x14,},
1390
1391 Package (0x04) {0x000AFFFF, 0x00, 0x00, 0x12,},
1392 Package (0x04) {0x000AFFFF, 0x01, 0x00, 0x13,},
1393 Package (0x04) {0x000AFFFF, 0x02, 0x00, 0x14,},
1394 Package (0x04) {0x000AFFFF, 0x03, 0x00, 0x15,},
1395
1396 Package (0x04) {0x000BFFFF, 0x00, 0x00, 0x13,},
1397 Package (0x04) {0x000BFFFF, 0x01, 0x00, 0x14,},
1398 Package (0x04) {0x000BFFFF, 0x02, 0x00, 0x15,},
1399 Package (0x04) {0x000BFFFF, 0x03, 0x00, 0x16,},
1400
1401 Package (0x04) {0x000CFFFF, 0x00, 0x00, 0x14,},
1402 Package (0x04) {0x000CFFFF, 0x01, 0x00, 0x15,},
1403 Package (0x04) {0x000CFFFF, 0x02, 0x00, 0x16,},
1404 Package (0x04) {0x000CFFFF, 0x03, 0x00, 0x17,},
1405
1406 Package (0x04) {0x000DFFFF, 0x00, 0x00, 0x15,},
1407 Package (0x04) {0x000DFFFF, 0x01, 0x00, 0x16,},
1408 Package (0x04) {0x000DFFFF, 0x02, 0x00, 0x17,},
1409 Package (0x04) {0x000DFFFF, 0x03, 0x00, 0x10,},
1410
1411 Package (0x04) {0x000EFFFF, 0x00, 0x00, 0x16,},
1412 Package (0x04) {0x000EFFFF, 0x01, 0x00, 0x17,},
1413 Package (0x04) {0x000EFFFF, 0x02, 0x00, 0x10,},
1414 Package (0x04) {0x000EFFFF, 0x03, 0x00, 0x11,},
1415
1416 Package (0x04) {0x000FFFFF, 0x00, 0x00, 0x17,},
1417 Package (0x04) {0x000FFFFF, 0x01, 0x00, 0x10,},
1418 Package (0x04) {0x000FFFFF, 0x02, 0x00, 0x11,},
1419 Package (0x04) {0x000FFFFF, 0x03, 0x00, 0x12,},
1420
1421 Package (0x04) {0x0010FFFF, 0x00, 0x00, 0x10,},
1422 Package (0x04) {0x0010FFFF, 0x01, 0x00, 0x11,},
1423 Package (0x04) {0x0010FFFF, 0x02, 0x00, 0x12,},
1424 Package (0x04) {0x0010FFFF, 0x03, 0x00, 0x13,},
1425
1426 Package (0x04) {0x0011FFFF, 0x00, 0x00, 0x11,},
1427 Package (0x04) {0x0011FFFF, 0x01, 0x00, 0x12,},
1428 Package (0x04) {0x0011FFFF, 0x02, 0x00, 0x13,},
1429 Package (0x04) {0x0011FFFF, 0x03, 0x00, 0x14,},
1430
1431 Package (0x04) {0x0012FFFF, 0x00, 0x00, 0x12,},
1432 Package (0x04) {0x0012FFFF, 0x01, 0x00, 0x13,},
1433 Package (0x04) {0x0012FFFF, 0x02, 0x00, 0x14,},
1434 Package (0x04) {0x0012FFFF, 0x03, 0x00, 0x15,},
1435
1436 Package (0x04) {0x0013FFFF, 0x00, 0x00, 0x13,},
1437 Package (0x04) {0x0013FFFF, 0x01, 0x00, 0x14,},
1438 Package (0x04) {0x0013FFFF, 0x02, 0x00, 0x15,},
1439 Package (0x04) {0x0013FFFF, 0x03, 0x00, 0x16,},
1440
1441 Package (0x04) {0x0014FFFF, 0x00, 0x00, 0x14,},
1442 Package (0x04) {0x0014FFFF, 0x01, 0x00, 0x15,},
1443 Package (0x04) {0x0014FFFF, 0x02, 0x00, 0x16,},
1444 Package (0x04) {0x0014FFFF, 0x03, 0x00, 0x17,},
1445
1446 Package (0x04) {0x0015FFFF, 0x00, 0x00, 0x15,},
1447 Package (0x04) {0x0015FFFF, 0x01, 0x00, 0x16,},
1448 Package (0x04) {0x0015FFFF, 0x02, 0x00, 0x17,},
1449 Package (0x04) {0x0015FFFF, 0x03, 0x00, 0x10,},
1450
1451 Package (0x04) {0x0016FFFF, 0x00, 0x00, 0x16,},
1452 Package (0x04) {0x0016FFFF, 0x01, 0x00, 0x17,},
1453 Package (0x04) {0x0016FFFF, 0x02, 0x00, 0x10,},
1454 Package (0x04) {0x0016FFFF, 0x03, 0x00, 0x11,},
1455
1456 Package (0x04) {0x0017FFFF, 0x00, 0x00, 0x17,},
1457 Package (0x04) {0x0017FFFF, 0x01, 0x00, 0x10,},
1458 Package (0x04) {0x0017FFFF, 0x02, 0x00, 0x11,},
1459 Package (0x04) {0x0017FFFF, 0x03, 0x00, 0x12,},
1460
1461 Package (0x04) {0x0018FFFF, 0x00, 0x00, 0x10,},
1462 Package (0x04) {0x0018FFFF, 0x01, 0x00, 0x11,},
1463 Package (0x04) {0x0018FFFF, 0x02, 0x00, 0x12,},
1464 Package (0x04) {0x0018FFFF, 0x03, 0x00, 0x13,},
1465
1466 Package (0x04) {0x0019FFFF, 0x00, 0x00, 0x11,},
1467 Package (0x04) {0x0019FFFF, 0x01, 0x00, 0x12,},
1468 Package (0x04) {0x0019FFFF, 0x02, 0x00, 0x13,},
1469 Package (0x04) {0x0019FFFF, 0x03, 0x00, 0x14,},
1470
1471 Package (0x04) {0x001AFFFF, 0x00, 0x00, 0x12,},
1472 Package (0x04) {0x001AFFFF, 0x01, 0x00, 0x13,},
1473 Package (0x04) {0x001AFFFF, 0x02, 0x00, 0x14,},
1474 Package (0x04) {0x001AFFFF, 0x03, 0x00, 0x15,},
1475
1476 Package (0x04) {0x001BFFFF, 0x00, 0x00, 0x13,},
1477 Package (0x04) {0x001BFFFF, 0x01, 0x00, 0x14,},
1478 Package (0x04) {0x001BFFFF, 0x02, 0x00, 0x15,},
1479 Package (0x04) {0x001BFFFF, 0x03, 0x00, 0x16,},
1480
1481 Package (0x04) {0x001CFFFF, 0x00, 0x00, 0x14,},
1482 Package (0x04) {0x001CFFFF, 0x01, 0x00, 0x15,},
1483 Package (0x04) {0x001CFFFF, 0x02, 0x00, 0x16,},
1484 Package (0x04) {0x001CFFFF, 0x03, 0x00, 0x17,},
1485
1486 Package (0x04) {0x001DFFFF, 0x00, 0x00, 0x15,},
1487 Package (0x04) {0x001DFFFF, 0x01, 0x00, 0x16,},
1488 Package (0x04) {0x001DFFFF, 0x02, 0x00, 0x17,},
1489 Package (0x04) {0x001DFFFF, 0x03, 0x00, 0x10,},
1490
1491 Package (0x04) {0x001EFFFF, 0x00, 0x00, 0x16,},
1492 Package (0x04) {0x001EFFFF, 0x01, 0x00, 0x17,},
1493 Package (0x04) {0x001EFFFF, 0x02, 0x00, 0x10,},
1494 Package (0x04) {0x001EFFFF, 0x03, 0x00, 0x11,},
1495
1496 Package (0x04) {0x001FFFFF, 0x00, 0x00, 0x17,},
1497 Package (0x04) {0x001FFFFF, 0x01, 0x00, 0x10,},
1498 Package (0x04) {0x001FFFFF, 0x02, 0x00, 0x11,},
1499 Package (0x04) {0x001FFFFF, 0x03, 0x00, 0x12,}
1500 })
1501
1502 // Possible resource settings for PCI link A
1503 Name (PRSA, ResourceTemplate ()
1504 {
1505 IRQ (Level, ActiveLow, Shared) {5,9,10,11}
1506 })
1507
1508 // Possible resource settings for PCI link B
1509 Name (PRSB, ResourceTemplate ()
1510 {
1511 IRQ (Level, ActiveLow, Shared) {5,9,10,11}
1512 })
1513
1514 // Possible resource settings for PCI link C
1515 Name (PRSC, ResourceTemplate ()
1516 {
1517 IRQ (Level, ActiveLow, Shared) {5,9,10,11}
1518 })
1519
1520 // Possible resource settings for PCI link D
1521 Name (PRSD, ResourceTemplate ()
1522 {
1523 IRQ (Level, ActiveLow, Shared) {5,9,10,11}
1524 })
1525
1526 // PCI bus 0
1527 Device (PCI0)
1528 {
1529 Name (_HID, EisaId ("PNP0A03"))
1530 Name (_ADR, 0x00) // address
1531 Name (_BBN, 0x00) // base bus adddress
1532 Name (_UID, 0x00)
1533
1534 // Method that returns routing table
1535 Method (_PRT, 0, NotSerialized)
1536 {
1537 if (LEqual (LAnd (PICM, UIOA), Zero)) {
1538 DBG ("RETURNING PIC\n")
1539 Store (0x00, \_SB.PCI0.SBRG.APDE)
1540 Store (0x00, \_SB.PCI0.SBRG.APAD)
1541 Return (PR00)
1542 }
1543 else {
1544 DBG ("RETURNING APIC\n")
1545 Store (0xbe, \_SB.PCI0.SBRG.APDE)
1546 Store (0xef, \_SB.PCI0.SBRG.APAD)
1547 Return (PR01)
1548 }
1549 }
1550
1551 Device (SBRG)
1552 {
1553 // Address of the PIIX3 (device 1 function 0)
1554 Name (_ADR, 0x00010000)
1555 OperationRegion (PCIC, PCI_Config, 0x00, 0xff)
1556
1557 Field (PCIC, ByteAcc, NoLock, Preserve)
1558 {
1559 Offset (0xad),
1560 APAD, 8,
1561 Offset (0xde),
1562 APDE, 8,
1563 }
1564
1565 // Keyboard device
1566 Device (PS2K)
1567 {
1568 Name (_HID, EisaId ("PNP0303"))
1569 Method (_STA, 0, NotSerialized)
1570 {
1571 Return (0x0F)
1572 }
1573
1574 Name (_CRS, ResourceTemplate ()
1575 {
1576 IO (Decode16, 0x0060, 0x0060, 0x00, 0x01)
1577 IO (Decode16, 0x0064, 0x0064, 0x00, 0x01)
1578 IRQNoFlags () {1}
1579 })
1580 }
1581
1582 // DMA Controller
1583 Device (DMAC)
1584 {
1585 Name (_HID, EisaId ("PNP0200"))
1586 Name (_CRS, ResourceTemplate ()
1587 {
1588 IO (Decode16, 0x0000, 0x0000, 0x01, 0x10)
1589 IO (Decode16, 0x0080, 0x0080, 0x01, 0x10)
1590 IO (Decode16, 0x00C0, 0x00C0, 0x01, 0x20)
1591 DMA (Compatibility, BusMaster, Transfer8_16) {4}
1592 })
1593 }
1594
1595 // Floppy disk controller
1596 Device (FDC0)
1597 {
1598 Name (_HID, EisaId ("PNP0700"))
1599
1600 Method (_STA, 0, NotSerialized)
1601 {
1602 Return (UFDC)
1603 }
1604
1605 // Current resource settings
1606 Name (_CRS, ResourceTemplate ()
1607 {
1608 IO (Decode16, 0x03F0, 0x03F0, 0x01, 0x06)
1609 IO (Decode16, 0x03F7, 0x03F7, 0x01, 0x01)
1610 IRQNoFlags () {6}
1611 DMA (Compatibility, NotBusMaster, Transfer8) {2}
1612 })
1613
1614 // Possible resource settings
1615 Name (_PRS, ResourceTemplate ()
1616 {
1617 IO (Decode16, 0x03F0, 0x03F0, 0x01, 0x06)
1618 IO (Decode16, 0x03F7, 0x03F7, 0x01, 0x01)
1619 IRQNoFlags () {6}
1620 DMA (Compatibility, NotBusMaster, Transfer8) {2}
1621 })
1622
1623 }
1624
1625 // Mouse device
1626 Device (PS2M)
1627 {
1628 Name (_HID, EisaId ("PNP0F03"))
1629 Method (_STA, 0, NotSerialized)
1630 {
1631 Return (0x0F)
1632 }
1633
1634 Name (_CRS, ResourceTemplate ()
1635 {
1636 IRQNoFlags () {12}
1637 })
1638 }
1639
1640 // Parallel port
1641 Device (LPT)
1642 {
1643 Name (_HID, EisaId ("PNP0400"))
1644 Method (_STA, 0, NotSerialized)
1645 {
1646 Return (0x0F)
1647 }
1648 Name (_CRS, ResourceTemplate ()
1649 {
1650 IO (Decode16, 0x0378, 0x0378, 0x08, 0x08)
1651 IO (Decode16, 0x0778, 0x0778, 0x08, 0x08)
1652 IRQNoFlags () {7}
1653 })
1654 }
1655
1656 // RTC and CMOS
1657 Device (RTC)
1658 {
1659 Name (_HID, EisaId ("PNP0B00"))
1660 Name (_CRS, ResourceTemplate ()
1661 {
1662 IO (Decode16,
1663 0x0070, // Range Minimum
1664 0x0070, // Range Maximum
1665 0x01, // Alignment
1666 0x02, // Length
1667 )
1668 })
1669 Method (_STA, 0, NotSerialized)
1670 {
1671 Return (0x0f)
1672 }
1673 }
1674
1675 // System Management Controller
1676 Device (SMC)
1677 {
1678 Name (_HID, EisaId ("APP0001"))
1679 Name (_CID, "smc-napa")
1680
1681 Method (_STA, 0, NotSerialized)
1682 {
1683 Return (USMC)
1684 }
1685 Name (_CRS, ResourceTemplate ()
1686 {
1687 IO (Decode16,
1688 0x0300, // Range Minimum
1689 0x0300, // Range Maximum
1690 0x01, // Alignment
1691 0x20, // Length
1692 )
1693 // This line seriously confuses Windows ACPI driver, so not even try to
1694 // enable SMC for Windows guests
1695 IRQNoFlags () {8}
1696 })
1697 }
1698 }
1699
1700 // Control method battery
1701 Device (BAT0)
1702 {
1703 Name (_HID, EisaId ("PNP0C0A"))
1704 Name (_UID, 0x00)
1705
1706 Scope (\_GPE)
1707 {
1708 // GPE bit 0 handler
1709 // GPE.0 must be set and SCI raised when
1710 // battery info changed and _BIF must be
1711 // re-evaluated
1712 Method (_L00, 0, NotSerialized)
1713 {
1714 Notify (\_SB.PCI0.BAT0, 0x81)
1715 }
1716 }
1717
1718 OperationRegion (CBAT, SystemIO, 0x4040, 0x08)
1719 Field (CBAT, DwordAcc, NoLock, Preserve)
1720 {
1721 IDX0, 32,
1722 DAT0, 32,
1723 }
1724
1725 IndexField (IDX0, DAT0, DwordAcc, NoLock, Preserve)
1726 {
1727 STAT, 32,
1728 PRAT, 32,
1729 RCAP, 32,
1730 PVOL, 32,
1731
1732 UNIT, 32,
1733 DCAP, 32,
1734 LFCP, 32,
1735 BTEC, 32,
1736 DVOL, 32,
1737 DWRN, 32,
1738 DLOW, 32,
1739 GRN1, 32,
1740 GRN2, 32,
1741
1742 BSTA, 32,
1743 APSR, 32,
1744 }
1745
1746 Method (_STA, 0, NotSerialized)
1747 {
1748 return (BSTA)
1749 }
1750
1751 Name (PBIF, Package ()
1752 {
1753 0x01, // Power unit, 1 - mA
1754 0x7fffffff, // Design capacity
1755 0x7fffffff, // Last full charge capacity
1756 0x00, // Battery technology
1757 0xffffffff, // Design voltage
1758 0x00, // Design capacity of Warning
1759 0x00, // Design capacity of Low
1760 0x04, // Battery capacity granularity 1
1761 0x04, // Battery capacity granularity 2
1762 "1", // Model number
1763 "0", // Serial number
1764 "VBOX", // Battery type
1765 "innotek" // OEM Information
1766 })
1767
1768 Name (PBST, Package () {
1769 0, // Battery state
1770 0x7fffffff, // Battery present rate
1771 0x7fffffff, // Battery remaining capacity
1772 0x7fffffff // Battery present voltage
1773 })
1774
1775 // Battery information
1776 Method (_BIF, 0, NotSerialized)
1777 {
1778 Store (UNIT, Index (PBIF, 0,))
1779 Store (DCAP, Index (PBIF, 1,))
1780 Store (LFCP, Index (PBIF, 2,))
1781 Store (BTEC, Index (PBIF, 3,))
1782 Store (DVOL, Index (PBIF, 4,))
1783 Store (DWRN, Index (PBIF, 5,))
1784 Store (DLOW, Index (PBIF, 6,))
1785 Store (GRN1, Index (PBIF, 7,))
1786 Store (GRN2, Index (PBIF, 8,))
1787
1788 DBG ("_BIF:\n")
1789 HEX4 (DerefOf (Index (PBIF, 0,)))
1790 HEX4 (DerefOf (Index (PBIF, 1,)))
1791 HEX4 (DerefOf (Index (PBIF, 2,)))
1792 HEX4 (DerefOf (Index (PBIF, 3,)))
1793 HEX4 (DerefOf (Index (PBIF, 4,)))
1794 HEX4 (DerefOf (Index (PBIF, 5,)))
1795 HEX4 (DerefOf (Index (PBIF, 6,)))
1796 HEX4 (DerefOf (Index (PBIF, 7,)))
1797 HEX4 (DerefOf (Index (PBIF, 8,)))
1798
1799 return (PBIF)
1800 }
1801
1802 // Battery status
1803 Method (_BST, 0, NotSerialized)
1804 {
1805 Store (STAT, Index (PBST, 0,))
1806 Store (PRAT, Index (PBST, 1,))
1807 Store (RCAP, Index (PBST, 2,))
1808 Store (PVOL, Index (PBST, 3,))
1809/*
1810 DBG ("_BST:\n")
1811 HEX4 (DerefOf (Index (PBST, 0,)))
1812 HEX4 (DerefOf (Index (PBST, 1,)))
1813 HEX4 (DerefOf (Index (PBST, 2,)))
1814 HEX4 (DerefOf (Index (PBST, 3,)))
1815*/
1816 return (PBST)
1817 }
1818 }
1819
1820 Device (AC)
1821 {
1822 Name (_HID, "ACPI0003")
1823 Name (_UID, 0x00)
1824 Name (_PCL, Package (0x01)
1825 {
1826 \_SB
1827 })
1828
1829 Method (_PSR, 0, NotSerialized)
1830 {
1831 // DBG ("_PSR:\n")
1832 // HEX4 (\_SB.PCI0.BAT0.APSR)
1833 return (\_SB.PCI0.BAT0.APSR)
1834 }
1835
1836 Method (_STA, 0, NotSerialized)
1837 {
1838 return (0x0f)
1839 }
1840 }
1841 }
1842 }
1843
1844 Scope (\_SB)
1845 {
1846 Scope (PCI0)
1847 {
1848 // PCI0 current resource settings
1849 Name (CRS, ResourceTemplate ()
1850 {
1851 WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode,
1852 0x0000,
1853 0x0000,
1854 0x00FF,
1855 0x0000,
1856 0x0100)
1857 IO (Decode16, 0x0CF8, 0x0CF8, 0x01, 0x08)
1858 WordIO (ResourceProducer, MinFixed, MaxFixed,
1859 PosDecode, EntireRange,
1860 0x0000,
1861 0x0000,
1862 0x0CF7,
1863 0x0000,
1864 0x0CF8)
1865 WordIO (ResourceProducer, MinFixed, MaxFixed,
1866 PosDecode, EntireRange,
1867 0x0000,
1868 0x0D00,
1869 0xFFFF,
1870 0x0000,
1871 0xF300)
1872
1873 /* Taken from ACPI faq (with some modifications) */
1874 DwordMemory( // descriptor for video RAM behind ISA bus
1875 ResourceProducer, // bit 0 of general flags is 0
1876 PosDecode,
1877 MinFixed, // Range is fixed
1878 MaxFixed, // Range is Fixed
1879 Cacheable,
1880 ReadWrite,
1881 0x00000000, // Granularity
1882 0x000a0000, // Min
1883 0x000bffff, // Max
1884 0x00000000, // Translation
1885 0x00020000 // Range Length
1886 )
1887
1888 DwordMemory( // Consumed-and-produced resource
1889 // (all of low memory space)
1890 ResourceProducer, // bit 0 of general flags is 0
1891 PosDecode, // positive Decode
1892 MinFixed, // Range is fixed
1893 MaxFixed, // Range is fixed
1894 Cacheable,
1895 ReadWrite,
1896 0x00000000, // Granularity
1897 0x00000000, // Min (calculated dynamically)
1898
1899 0xffdfffff, // Max = 4GB - 2MB
1900 0x00000000, // Translation
1901 0xdfdfffff, // Range Length (calculated
1902 // dynamically)
1903 , // Optional field left blank
1904 , // Optional field left blank
1905 MEM3 // Name declaration for this
1906 // descriptor
1907 )
1908 })
1909
1910// Name (TOM, ResourceTemplate () // Memory above 4GB (aka high), appended when needed.
1911// {
1912// QWORDMemory(
1913// ResourceProducer, // bit 0 of general flags is 0
1914// PosDecode, // positive Decode
1915// MinFixed, // Range is fixed
1916// MaxFixed, // Range is fixed
1917// Cacheable,
1918// ReadWrite,
1919// 0x0000000000000000, // _GRA: Granularity.
1920// 0 /*0x0000000100000000*/, // _MIN: Min address, 4GB.
1921// 0 /*0x00000fffffffffff*/, // _MAX: Max possible address, 16TB.
1922// 0x0000000000000000, // _TRA: Translation
1923// 0x0000000000000000, // _LEN: Range length (calculated dynamically)
1924// , // ResourceSourceIndex: Optional field left blank
1925// , // ResourceSource: Optional field left blank
1926// MEM4 // Name declaration for this descriptor.
1927// )
1928// })
1929
1930 Method (_CRS, 0, NotSerialized)
1931 {
1932 CreateDwordField (CRS, \_SB.PCI0.MEM3._MIN, RAMT)
1933 CreateDwordField (CRS, \_SB.PCI0.MEM3._LEN, RAMR)
1934// CreateQwordField (TOM, \_SB.PCI0.MEM4._LEN, TM4L)
1935// CreateQwordField (TOM, \_SB.PCI0.MEM4._LEN, TM4N)
1936// CreateQwordField (TOM, \_SB.PCI0.MEM4._LEN, TM4X)
1937
1938 Store (MEML, RAMT)
1939 Subtract (0xffe00000, RAMT, RAMR)
1940
1941// If (LNotEqual (MEMH, 0x00000000))
1942// {
1943// //
1944// // Update the TOM resource template and append it to CRS.
1945// // This way old < 4GB guest doesn't see anything different.
1946// // (MEMH is the memory above 4GB specified in 64KB units.)
1947// //
1948// // Note: ACPI v2 doesn't do 32-bit integers. IASL may fail on
1949// // seeing 64-bit constants and the code probably wont work.
1950// //
1951// Store (1, TM4N)
1952// ShiftLeft (TM4N, 32, TM4N)
1953//
1954// Store (0x00000fff, TM4X)
1955// ShiftLeft (TM4X, 32, TM4X)
1956// Or (TM4X, 0xffffffff, TM4X)
1957//
1958// Store (MEMH, TM4L)
1959// ShiftLeft (TM4L, 16, TM4L)
1960//
1961// ConcatenateResTemplate (CRS, TOM, Local2)
1962// Return (Local2)
1963// }
1964
1965 Return (CRS)
1966 }
1967 }
1968 }
1969
1970 Scope (\_SB)
1971 {
1972 // High Precision Event Timer
1973 Device(HPET) {
1974 Name(_HID, EISAID("PNP0103"))
1975 Name (_CID, 0x010CD041)
1976 Name(_UID, 0)
1977 Method (_STA, 0, NotSerialized) {
1978 Return(UHPT)
1979 }
1980 Name(_CRS, ResourceTemplate() {
1981 DWordMemory(
1982 ResourceConsumer, PosDecode, MinFixed, MaxFixed,
1983 NonCacheable, ReadWrite,
1984 0x00000000,
1985 0xFED00000,
1986 0xFED003FF,
1987 0x00000000,
1988 0x00000400 /* 1K memory: FED00000 - FED003FF */
1989 )
1990 })
1991 }
1992
1993 // Fields within PIIX3 configuration[0x60..0x63] with
1994 // IRQ mappings
1995 Field (\_SB.PCI0.SBRG.PCIC, ByteAcc, NoLock, Preserve)
1996 {
1997 Offset (0x60),
1998 PIRA, 8,
1999 PIRB, 8,
2000 PIRC, 8,
2001 PIRD, 8
2002 }
2003
2004 Name (BUFA, ResourceTemplate ()
2005 {
2006 IRQ (Level, ActiveLow, Shared) {15}
2007 })
2008 CreateWordField (BUFA, 0x01, ICRS)
2009
2010 // Generic status of IRQ routing entry
2011 Method (LSTA, 1, NotSerialized)
2012 {
2013 And (Arg0, 0x80, Local0)
2014// DBG ("LSTA: ")
2015// HEX (Arg0)
2016 If (Local0)
2017 {
2018 Return (0x09)
2019 }
2020 Else
2021 {
2022 Return (0x0B)
2023 }
2024 }
2025
2026 // Generic "current resource settings" for routing entry
2027 Method (LCRS, 1, NotSerialized)
2028 {
2029 And (Arg0, 0x0F, Local0)
2030 ShiftLeft (0x01, Local0, ICRS)
2031// DBG ("LCRS: ")
2032// HEX (ICRS)
2033 Return (BUFA)
2034 }
2035
2036 // Generic "set resource settings" for routing entry
2037 Method (LSRS, 1, NotSerialized)
2038 {
2039 CreateWordField (Arg0, 0x01, ISRS)
2040 FindSetRightBit (ISRS, Local0)
2041 Return (Decrement (Local0))
2042 }
2043
2044 // Generic "disable" for routing entry
2045 Method (LDIS, 1, NotSerialized)
2046 {
2047 Return (Or (Arg0, 0x80))
2048 }
2049
2050 // Link A
2051 Device (LNKA)
2052 {
2053 Name (_HID, EisaId ("PNP0C0F"))
2054 Name (_UID, 0x01)
2055
2056 // Status
2057 Method (_STA, 0, NotSerialized)
2058 {
2059 DBG ("LNKA._STA\n")
2060 Return (LSTA (PIRA))
2061 }
2062
2063 // Possible resource settings
2064 Method (_PRS, 0, NotSerialized)
2065 {
2066 DBG ("LNKA._PRS\n")
2067 Return (PRSA)
2068 }
2069
2070 // Disable
2071 Method (_DIS, 0, NotSerialized)
2072 {
2073 DBG ("LNKA._DIS\n")
2074 Store (LDIS (PIRA), PIRA)
2075 }
2076
2077 // Current resource settings
2078 Method (_CRS, 0, NotSerialized)
2079 {
2080 DBG ("LNKA._CRS\n")
2081 Return (LCRS (PIRA))
2082 }
2083
2084 // Set resource settings
2085 Method (_SRS, 1, NotSerialized)
2086 {
2087 DBG ("LNKA._SRS: ")
2088 HEX (LSRS (Arg0))
2089 Store (LSRS (Arg0), PIRA)
2090 }
2091 }
2092
2093 // Link B
2094 Device (LNKB)
2095 {
2096 Name (_HID, EisaId ("PNP0C0F"))
2097 Name (_UID, 0x02)
2098 Method (_STA, 0, NotSerialized)
2099 {
2100 // DBG ("LNKB._STA\n")
2101 Return (LSTA (PIRB))
2102 }
2103
2104 Method (_PRS, 0, NotSerialized)
2105 {
2106 // DBG ("LNKB._PRS\n")
2107 Return (PRSB)
2108 }
2109
2110 Method (_DIS, 0, NotSerialized)
2111 {
2112 // DBG ("LNKB._DIS\n")
2113 Store (LDIS (PIRB), PIRB)
2114 }
2115
2116 Method (_CRS, 0, NotSerialized)
2117 {
2118 // DBG ("LNKB._CRS\n")
2119 Return (LCRS (PIRB))
2120 }
2121
2122 Method (_SRS, 1, NotSerialized)
2123 {
2124 DBG ("LNKB._SRS: ")
2125 HEX (LSRS (Arg0))
2126 Store (LSRS (Arg0), PIRB)
2127 }
2128 }
2129
2130 // Link C
2131 Device (LNKC)
2132 {
2133 Name (_HID, EisaId ("PNP0C0F"))
2134 Name (_UID, 0x03)
2135 Method (_STA, 0, NotSerialized)
2136 {
2137 // DBG ("LNKC._STA\n")
2138 Return (LSTA (PIRC))
2139 }
2140
2141 Method (_PRS, 0, NotSerialized)
2142 {
2143 // DBG ("LNKC._PRS\n")
2144 Return (PRSC)
2145 }
2146
2147 Method (_DIS, 0, NotSerialized)
2148 {
2149 // DBG ("LNKC._DIS\n")
2150 Store (LDIS (PIRC), PIRC)
2151 }
2152
2153 Method (_CRS, 0, NotSerialized)
2154 {
2155 // DBG ("LNKC._CRS\n")
2156 Return (LCRS (PIRC))
2157 }
2158
2159 Method (_SRS, 1, NotSerialized)
2160 {
2161 DBG ("LNKC._SRS: ")
2162 HEX (LSRS (Arg0))
2163 Store (LSRS (Arg0), PIRC)
2164 }
2165 }
2166
2167 // Link D
2168 Device (LNKD)
2169 {
2170 Name (_HID, EisaId ("PNP0C0F"))
2171 Name (_UID, 0x04)
2172 Method (_STA, 0, NotSerialized)
2173 {
2174 // DBG ("LNKD._STA\n")
2175 Return (LSTA (PIRD))
2176 }
2177
2178 Method (_PRS, 0, NotSerialized)
2179 {
2180 // DBG ("LNKD._PRS\n")
2181 Return (PRSD)
2182 }
2183
2184 Method (_DIS, 0, NotSerialized)
2185 {
2186 // DBG ("LNKD._DIS\n")
2187 Store (LDIS (PIRA), PIRD)
2188 }
2189
2190 Method (_CRS, 0, NotSerialized)
2191 {
2192 // DBG ("LNKD._CRS\n")
2193 Return (LCRS (PIRD))
2194 }
2195
2196 Method (_SRS, 1, NotSerialized)
2197 {
2198 DBG ("LNKD._SRS: ")
2199 HEX (LSRS (Arg0))
2200 Store (LSRS (Arg0), PIRD)
2201 }
2202 }
2203 }
2204
2205 // Sx states
2206 Name (_S0, Package (2) {
2207 0x00,
2208 0x00,
2209 })
2210
2211 Name (_S5, Package (2) {
2212 0x05,
2213 0x05,
2214 })
2215
2216 Method (_PTS, 1, NotSerialized)
2217 {
2218 DBG ("Prepare to sleep: ")
2219 HEX (Arg0)
2220 }
2221}
2222
2223/*
2224 * Local Variables:
2225 * comment-start: "//"
2226 * End:
2227 */
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