VirtualBox

source: vbox/trunk/src/VBox/Devices/Storage/ATAController.h@ 43673

Last change on this file since 43673 was 37690, checked in by vboxsync, 13 years ago

Device/AHCI: 32bit alignment fixes

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1/* $Id: ATAController.h 37690 2011-06-29 16:05:54Z vboxsync $ */
2/** @file
3 * DevATA, DevAHCI - Shared ATA/ATAPI controller types.
4 */
5
6/*
7 * Copyright (C) 2006-2011 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18#ifndef ___Storage_ATAController_h
19#define ___Storage_ATAController_h
20
21/*******************************************************************************
22* Header Files *
23*******************************************************************************/
24#include <VBox/vmm/pdmdev.h>
25#ifdef IN_RING3
26# include <iprt/semaphore.h>
27# include <iprt/thread.h>
28#endif /* IN_RING3 */
29#include <iprt/critsect.h>
30#include <VBox/vmm/stam.h>
31
32#include "PIIX3ATABmDma.h"
33#include "ide.h"
34
35
36/*******************************************************************************
37* Defined Constants And Macros *
38*******************************************************************************/
39/**
40 * Maximum number of sectors to transfer in a READ/WRITE MULTIPLE request.
41 * Set to 1 to disable multi-sector read support. According to the ATA
42 * specification this must be a power of 2 and it must fit in an 8 bit
43 * value. Thus the only valid values are 1, 2, 4, 8, 16, 32, 64 and 128.
44 */
45#define ATA_MAX_MULT_SECTORS 128
46
47/**
48 * Fastest PIO mode supported by the drive.
49 */
50#define ATA_PIO_MODE_MAX 4
51/**
52 * Fastest MDMA mode supported by the drive.
53 */
54#define ATA_MDMA_MODE_MAX 2
55/**
56 * Fastest UDMA mode supported by the drive.
57 */
58#define ATA_UDMA_MODE_MAX 6
59
60/** ATAPI sense info size. */
61#define ATAPI_SENSE_SIZE 64
62
63/** The maximum number of release log entries per device. */
64#define MAX_LOG_REL_ERRORS 1024
65
66/* MediaEventStatus */
67#define ATA_EVENT_STATUS_UNCHANGED 0 /**< medium event status not changed */
68#define ATA_EVENT_STATUS_MEDIA_NEW 1 /**< new medium inserted */
69#define ATA_EVENT_STATUS_MEDIA_REMOVED 2 /**< medium removed */
70#define ATA_EVENT_STATUS_MEDIA_CHANGED 3 /**< medium was removed + new medium was inserted */
71#define ATA_EVENT_STATUS_MEDIA_EJECT_REQUESTED 4 /**< medium eject requested (eject button pressed) */
72
73
74/*******************************************************************************
75* Structures and Typedefs *
76*******************************************************************************/
77typedef struct AHCIATADevState {
78 /** Flag indicating whether the current command uses LBA48 mode. */
79 bool fLBA48;
80 /** Flag indicating whether this drive implements the ATAPI command set. */
81 bool fATAPI;
82 /** Set if this interface has asserted the IRQ. */
83 bool fIrqPending;
84 /** Currently configured number of sectors in a multi-sector transfer. */
85 uint8_t cMultSectors;
86 /** PCHS disk geometry. */
87 PDMMEDIAGEOMETRY PCHSGeometry;
88 /** Total number of sectors on this disk. */
89 uint64_t cTotalSectors;
90 /** Number of sectors to transfer per IRQ. */
91 uint32_t cSectorsPerIRQ;
92
93 /** ATA/ATAPI register 1: feature (write-only). */
94 uint8_t uATARegFeature;
95 /** ATA/ATAPI register 1: feature, high order byte. */
96 uint8_t uATARegFeatureHOB;
97 /** ATA/ATAPI register 1: error (read-only). */
98 uint8_t uATARegError;
99 /** ATA/ATAPI register 2: sector count (read/write). */
100 uint8_t uATARegNSector;
101 /** ATA/ATAPI register 2: sector count, high order byte. */
102 uint8_t uATARegNSectorHOB;
103 /** ATA/ATAPI register 3: sector (read/write). */
104 uint8_t uATARegSector;
105 /** ATA/ATAPI register 3: sector, high order byte. */
106 uint8_t uATARegSectorHOB;
107 /** ATA/ATAPI register 4: cylinder low (read/write). */
108 uint8_t uATARegLCyl;
109 /** ATA/ATAPI register 4: cylinder low, high order byte. */
110 uint8_t uATARegLCylHOB;
111 /** ATA/ATAPI register 5: cylinder high (read/write). */
112 uint8_t uATARegHCyl;
113 /** ATA/ATAPI register 5: cylinder high, high order byte. */
114 uint8_t uATARegHCylHOB;
115 /** ATA/ATAPI register 6: select drive/head (read/write). */
116 uint8_t uATARegSelect;
117 /** ATA/ATAPI register 7: status (read-only). */
118 uint8_t uATARegStatus;
119 /** ATA/ATAPI register 7: command (write-only). */
120 uint8_t uATARegCommand;
121 /** ATA/ATAPI drive control register (write-only). */
122 uint8_t uATARegDevCtl;
123
124 /** Currently active transfer mode (MDMA/UDMA) and speed. */
125 uint8_t uATATransferMode;
126 /** Current transfer direction. */
127 uint8_t uTxDir;
128 /** Index of callback for begin transfer. */
129 uint8_t iBeginTransfer;
130 /** Index of callback for source/sink of data. */
131 uint8_t iSourceSink;
132 /** Flag indicating whether the current command transfers data in DMA mode. */
133 bool fDMA;
134 /** Set to indicate that ATAPI transfer semantics must be used. */
135 bool fATAPITransfer;
136
137 /** Total ATA/ATAPI transfer size, shared PIO/DMA. */
138 uint32_t cbTotalTransfer;
139 /** Elementary ATA/ATAPI transfer size, shared PIO/DMA. */
140 uint32_t cbElementaryTransfer;
141 /** Current read/write buffer position, shared PIO/DMA. */
142 uint32_t iIOBufferCur;
143 /** First element beyond end of valid buffer content, shared PIO/DMA. */
144 uint32_t iIOBufferEnd;
145
146 /** ATA/ATAPI current PIO read/write transfer position. Not shared with DMA for safety reasons. */
147 uint32_t iIOBufferPIODataStart;
148 /** ATA/ATAPI current PIO read/write transfer end. Not shared with DMA for safety reasons. */
149 uint32_t iIOBufferPIODataEnd;
150
151 /** ATAPI current LBA position. */
152 uint32_t iATAPILBA;
153 /** ATAPI current sector size. */
154 uint32_t cbATAPISector;
155 /** ATAPI current command. */
156 uint8_t aATAPICmd[ATAPI_PACKET_SIZE];
157 /** ATAPI sense data. */
158 uint8_t abATAPISense[ATAPI_SENSE_SIZE];
159 /** HACK: Countdown till we report a newly unmounted drive as mounted. */
160 uint8_t cNotifiedMediaChange;
161 /** The same for GET_EVENT_STATUS for mechanism */
162 volatile uint32_t MediaEventStatus;
163
164 /** The status LED state for this drive. */
165 R3PTRTYPE(PPDMLED) pLed;
166#if HC_ARCH_BITS == 64
167 uint32_t uAlignment3;
168#endif
169
170 /** Size of I/O buffer. */
171 uint32_t cbIOBuffer;
172 /** Pointer to the I/O buffer. */
173 R3PTRTYPE(uint8_t *) pbIOBufferR3;
174 /** Pointer to the I/O buffer. */
175 R0PTRTYPE(uint8_t *) pbIOBufferR0;
176 /** Pointer to the I/O buffer. */
177 RCPTRTYPE(uint8_t *) pbIOBufferRC;
178
179 RTRCPTR Aligmnent1; /**< Align the statistics at an 8-byte boundary. */
180
181 /*
182 * No data that is part of the saved state after this point!!!!!
183 */
184
185 /* Release statistics: number of ATA DMA commands. */
186 STAMCOUNTER StatATADMA;
187 /* Release statistics: number of ATA PIO commands. */
188 STAMCOUNTER StatATAPIO;
189 /* Release statistics: number of ATAPI PIO commands. */
190 STAMCOUNTER StatATAPIDMA;
191 /* Release statistics: number of ATAPI PIO commands. */
192 STAMCOUNTER StatATAPIPIO;
193#ifdef VBOX_INSTRUMENT_DMA_WRITES
194 /* Release statistics: number of DMA sector writes and the time spent. */
195 STAMPROFILEADV StatInstrVDWrites;
196#endif
197
198 /** Statistics: number of read operations and the time spent reading. */
199 STAMPROFILEADV StatReads;
200 /** Statistics: number of bytes read. */
201 R3PTRTYPE(PSTAMCOUNTER) pStatBytesRead;
202#if HC_ARCH_BITS == 64
203 uint64_t uAlignment4;
204#endif
205 /** Statistics: number of write operations and the time spent writing. */
206 STAMPROFILEADV StatWrites;
207 /** Statistics: number of bytes written. */
208 R3PTRTYPE(PSTAMCOUNTER) pStatBytesWritten;
209#if HC_ARCH_BITS == 64
210 uint64_t uAlignment5;
211#endif
212 /** Statistics: number of flush operations and the time spend flushing. */
213 STAMPROFILE StatFlushes;
214
215 /** The serial number to use for IDENTIFY DEVICE commands. */
216 R3PTRTYPE(const char *) pszSerialNumber;
217 /** The firmware revision to use for IDENTIFY DEVICE commands. */
218 R3PTRTYPE(const char *) pszFirmwareRevision;
219 /** The model number to use for IDENTIFY DEVICE commands. */
220 R3PTRTYPE(const char *) pszModelNumber;
221 /** The vendor identification string for SCSI INQUIRY commands. */
222 R3PTRTYPE(const char *) pszInquiryVendorId;
223 /** The product identification string for SCSI INQUIRY commands. */
224 R3PTRTYPE(const char *) pszInquiryProductId;
225 /** The revision string for SCSI INQUIRY commands. */
226 R3PTRTYPE(const char *) pszInquiryRevision;
227 /** Mark the drive as having a non-rotational medium (i.e. as a SSD). */
228 bool fNonRotational;
229 /** Enable passing through commands directly to the ATAPI drive. */
230 bool fATAPIPassthrough;
231 /** Number of errors we've reported to the release log.
232 * This is to prevent flooding caused by something going horribly wrong.
233 * this value against MAX_LOG_REL_ERRORS in places likely to cause floods
234 * like the ones we currently seeing on the linux smoke tests (2006-11-10). */
235 uint32_t cErrors;
236 /** Timestamp of last started command. 0 if no command pending. */
237 uint64_t u64CmdTS;
238
239 /** Pointer to the attached driver's base interface. */
240 R3PTRTYPE(PPDMIBASE) pDrvBase;
241 /** Pointer to the attached driver's block interface. */
242 R3PTRTYPE(PPDMIBLOCK) pDrvBlock;
243 /** Pointer to the attached driver's block bios interface. */
244 R3PTRTYPE(PPDMIBLOCKBIOS) pDrvBlockBios;
245 /** Pointer to the attached driver's mount interface.
246 * This is NULL if the driver isn't a removable unit. */
247 R3PTRTYPE(PPDMIMOUNT) pDrvMount;
248 /** The base interface. */
249 PDMIBASE IBase;
250 /** The block port interface. */
251 PDMIBLOCKPORT IPort;
252 /** The mount notify interface. */
253 PDMIMOUNTNOTIFY IMountNotify;
254 /** The LUN #. */
255 RTUINT iLUN;
256#if HC_ARCH_BITS == 64
257 RTUINT Alignment2; /**< Align pDevInsR3 correctly. */
258#endif
259 /** Pointer to device instance. */
260 PPDMDEVINSR3 pDevInsR3;
261 /** Pointer to controller instance. */
262 R3PTRTYPE(struct AHCIATACONTROLLER *) pControllerR3;
263 /** Pointer to device instance. */
264 PPDMDEVINSR0 pDevInsR0;
265 /** Pointer to controller instance. */
266 R0PTRTYPE(struct AHCIATACONTROLLER *) pControllerR0;
267 /** Pointer to device instance. */
268 PPDMDEVINSRC pDevInsRC;
269 /** Pointer to controller instance. */
270 RCPTRTYPE(struct AHCIATACONTROLLER *) pControllerRC;
271} AHCIATADevState;
272
273
274typedef struct AHCIATATransferRequest
275{
276 uint8_t iIf;
277 uint8_t iBeginTransfer;
278 uint8_t iSourceSink;
279 uint32_t cbTotalTransfer;
280 uint8_t uTxDir;
281} AHCIATATransferRequest;
282
283
284typedef struct AHCIATAAbortRequest
285{
286 uint8_t iIf;
287 bool fResetDrive;
288} AHCIATAAbortRequest;
289
290
291typedef enum
292{
293 /** Begin a new transfer. */
294 AHCIATA_AIO_NEW = 0,
295 /** Continue a DMA transfer. */
296 AHCIATA_AIO_DMA,
297 /** Continue a PIO transfer. */
298 AHCIATA_AIO_PIO,
299 /** Reset the drives on current controller, stop all transfer activity. */
300 AHCIATA_AIO_RESET_ASSERTED,
301 /** Reset the drives on current controller, resume operation. */
302 AHCIATA_AIO_RESET_CLEARED,
303 /** Abort the current transfer of a particular drive. */
304 AHCIATA_AIO_ABORT
305} AHCIATAAIO;
306
307
308typedef struct AHCIATARequest
309{
310 AHCIATAAIO ReqType;
311 union
312 {
313 AHCIATATransferRequest t;
314 AHCIATAAbortRequest a;
315 } u;
316} AHCIATARequest;
317
318
319typedef struct AHCIATACONTROLLER
320{
321 /** The base of the first I/O Port range. */
322 RTIOPORT IOPortBase1;
323 /** The base of the second I/O Port range. (0 if none) */
324 RTIOPORT IOPortBase2;
325 /** The assigned IRQ. */
326 RTUINT irq;
327 /** Access critical section */
328 PDMCRITSECT lock;
329
330 /** Selected drive. */
331 uint8_t iSelectedIf;
332 /** The interface on which to handle async I/O. */
333 uint8_t iAIOIf;
334 /** The state of the async I/O thread. */
335 uint8_t uAsyncIOState;
336 /** Flag indicating whether the next transfer is part of the current command. */
337 bool fChainedTransfer;
338 /** Set when the reset processing is currently active on this controller. */
339 bool fReset;
340 /** Flag whether the current transfer needs to be redone. */
341 bool fRedo;
342 /** Flag whether the redo suspend has been finished. */
343 bool fRedoIdle;
344 /** Flag whether the DMA operation to be redone is the final transfer. */
345 bool fRedoDMALastDesc;
346 /** The BusMaster DMA state. */
347 BMDMAState BmDma;
348 /** Pointer to first DMA descriptor. */
349 RTGCPHYS32 pFirstDMADesc;
350 /** Pointer to last DMA descriptor. */
351 RTGCPHYS32 pLastDMADesc;
352 /** Pointer to current DMA buffer (for redo operations). */
353 RTGCPHYS32 pRedoDMABuffer;
354 /** Size of current DMA buffer (for redo operations). */
355 uint32_t cbRedoDMABuffer;
356
357 /** The ATA/ATAPI interfaces of this controller. */
358 AHCIATADevState aIfs[2];
359
360 /** Pointer to device instance. */
361 PPDMDEVINSR3 pDevInsR3;
362 /** Pointer to device instance. */
363 PPDMDEVINSR0 pDevInsR0;
364 /** Pointer to device instance. */
365 PPDMDEVINSRC pDevInsRC;
366
367 /** Set when the destroying the device instance and the thread must exit. */
368 uint32_t volatile fShutdown;
369 /** The async I/O thread handle. NIL_RTTHREAD if no thread. */
370 RTTHREAD AsyncIOThread;
371 /** The event semaphore the thread is waiting on for requests. */
372 RTSEMEVENT AsyncIOSem;
373 /** The request queue for the AIO thread. One element is always unused. */
374 AHCIATARequest aAsyncIORequests[4];
375 /** The position at which to insert a new request for the AIO thread. */
376 uint8_t AsyncIOReqHead;
377 /** The position at which to get a new request for the AIO thread. */
378 uint8_t AsyncIOReqTail;
379 /** Whether to call RTThreadUserSignal and PDMDevHlpAsyncNotificationCompleted
380 * when idle. Before setting this, call RTThreadUserReset. */
381 bool volatile fSignalIdle;
382 uint8_t Alignment3[1]; /**< Explicit padding of the 1 byte gap. */
383 /** Magic delay before triggering interrupts in DMA mode. */
384 uint32_t DelayIRQMillies;
385 /** The mutex protecting the request queue. */
386 RTSEMMUTEX AsyncIORequestMutex;
387 /** The event semaphore the thread is waiting on during suspended I/O. */
388 RTSEMEVENT SuspendIOSem;
389 /** Pointer to Media Notify interface. */
390 R3PTRTYPE(PPDMIMEDIANOTIFY) pMediaNotify;
391#if HC_ARCH_BITS == 32
392 uint32_t Alignment0;
393#endif
394
395 /* Statistics */
396 STAMCOUNTER StatAsyncOps;
397 uint64_t StatAsyncMinWait;
398 uint64_t StatAsyncMaxWait;
399 STAMCOUNTER StatAsyncTimeUS;
400 STAMPROFILEADV StatAsyncTime;
401 STAMPROFILE StatLockWait;
402} AHCIATACONTROLLER, *PAHCIATACONTROLLER;
403
404#ifndef VBOX_DEVICE_STRUCT_TESTCASE
405
406#define ATADEVSTATE_2_CONTROLLER(pIf) ( (pIf)->CTX_SUFF(pController) )
407#define ATADEVSTATE_2_DEVINS(pIf) ( (pIf)->CTX_SUFF(pDevIns) )
408#define CONTROLLER_2_DEVINS(pController) ( (pController)->CTX_SUFF(pDevIns) )
409#define PDMIBASE_2_ATASTATE(pInterface) ( (AHCIATADevState *)((uintptr_t)(pInterface) - RT_OFFSETOF(AHCIATADevState, IBase)) )
410
411
412/*******************************************************************************
413 * Internal Functions *
414 ******************************************************************************/
415RT_C_DECLS_BEGIN
416int ataControllerIOPortWrite1(PAHCIATACONTROLLER pCtl, RTIOPORT Port, uint32_t u32, unsigned cb);
417int ataControllerIOPortRead1(PAHCIATACONTROLLER pCtl, RTIOPORT Port, uint32_t *u32, unsigned cb);
418int ataControllerIOPortWriteStr1(PAHCIATACONTROLLER pCtl, RTIOPORT Port, RTGCPTR *pGCPtrSrc, PRTGCUINTREG pcTransfer, unsigned cb);
419int ataControllerIOPortReadStr1(PAHCIATACONTROLLER pCtl, RTIOPORT Port, RTGCPTR *pGCPtrDst, PRTGCUINTREG pcTransfer, unsigned cb);
420int ataControllerIOPortWrite2(PAHCIATACONTROLLER pCtl, RTIOPORT Port, uint32_t u32, unsigned cb);
421int ataControllerIOPortRead2(PAHCIATACONTROLLER pCtl, RTIOPORT Port, uint32_t *u32, unsigned cb);
422int ataControllerBMDMAIOPortRead(PAHCIATACONTROLLER pCtl, RTIOPORT Port, uint32_t *pu32, unsigned cb);
423int ataControllerBMDMAIOPortWrite(PAHCIATACONTROLLER pCtl, RTIOPORT Port, uint32_t u32, unsigned cb);
424RT_C_DECLS_END
425
426#ifdef IN_RING3
427/**
428 * Initialize a controller state.
429 *
430 * @returns VBox status code.
431 * @param pDevIns Pointer to the device instance which creates a controller.
432 * @param pCtl Pointer to the unitialized ATA controller structure.
433 * @param pMediaNotify Pointer to PDM interface for media eject.
434 * @param iLUNMaster Port number of the master device.
435 * @param pDrvBaseMaster Pointer to the base driver interface which acts as the master.
436 * @param pLedMaster Pointer to LED state for master device.
437 * @param pStatBytesReadMaster Pointer to statistics structure for reads.
438 * @param pStatBytesWrittenMaster Pointer to statistics structure for writes.
439 * @param pszSerialNumberMaster VPD serial number for master.
440 * @param pszFirmwareRevisionMaster VPD firmware revision for master
441 * @param pszModelNumberMaster VPD model number for master
442 * @param pszInquiryVendorIdMaster VPD vendor ID for master
443 * @param pszInquiryProductIdMaster VPD product ID for master
444 * @param pszInquiryRevisionMaster VPD revision for master
445 * @param fNonRotationalMaster Flag for non-rotational media.
446 * @param iLUNSlave Port number of the slave device.
447 * @param pDrvBaseSlave Pointer to the base driver interface which acts as the slave.
448 * @param pLedSlave Pointer to LED state for slave device.
449 * @param pStatBytesReadSlave Pointer to statistics structure for reads.
450 * @param pStatBytesWrittenSlave Pointer to statistics structure for writes.
451 * @param pszSerialNumberSlave VPD serial number for slave.
452 * @param pszFirmwareRevisionSlave VPD firmware revision for slave
453 * @param pszModelNumberSlave VPD model number for slave
454 * @param pszInquiryVendorIdSlave VPD vendor ID for slave
455 * @param pszInquiryProductIdSlave VPD product ID for slave
456 * @param pszInquiryRevisionSlave VPD revision for slave
457 * @param fNonRotationalSlave Flag for non-rotational media.
458 * @param pcbSSMState Where to store the size of the device state for loading/saving.
459 * @param szName Name of the controller (Used to initialize the critical section).
460 */
461int ataControllerInit(PPDMDEVINS pDevIns, PAHCIATACONTROLLER pCtl,
462 PPDMIMEDIANOTIFY pMediaNotify,
463 unsigned iLUNMaster, PPDMIBASE pDrvBaseMaster, PPDMLED pLedMaster,
464 PSTAMCOUNTER pStatBytesReadMaster, PSTAMCOUNTER pStatBytesWrittenMaster,
465 const char *pszSerialNumberMaster, const char *pszFirmwareRevisionMaster,
466 const char *pszModelNumberMaster, const char *pszInquiryVendorIdMaster,
467 const char *pszInquiryProductIdMaster, const char *pszInquiryRevisionMaster,
468 bool fNonRotationalMaster,
469 unsigned iLUNSlave, PPDMIBASE pDrvBaseSlave, PPDMLED pLedSlave,
470 PSTAMCOUNTER pStatBytesReadSlave, PSTAMCOUNTER pStatBytesWrittenSlave,
471 const char *pszSerialNumberSlave, const char *pszFirmwareRevisionSlave,
472 const char *pszModelNumberSlave, const char *pszInquiryVendorIdSlave,
473 const char *pszInquiryProductIdSlave, const char *pszInquiryRevisionSlave,
474 bool fNonRotationalSlave,
475 uint32_t *pcbSSMState, const char *szName);
476
477/**
478 * Free all allocated resources for one controller instance.
479 *
480 * @returns VBox status code.
481 * @param pCtl The controller instance.
482 */
483int ataControllerDestroy(PAHCIATACONTROLLER pCtl);
484
485/**
486 * Tests if the controller is idle, leaving the PDM notifications on if busy.
487 *
488 * @returns true if idle, false if idle.
489 * @param pCtl the controller instance.
490 */
491bool ataControllerIsIdle(PAHCIATACONTROLLER pCtl);
492
493/**
494 * Reset a controller instance to an initial state.
495 *
496 * @returns VBox status code.
497 * @param pCtl Pointer to the controller.
498 */
499void ataControllerReset(PAHCIATACONTROLLER pCtl);
500
501/**
502 * Resume operation of an controller.
503 *
504 * @returns nothing
505 * @param pCtl The controller instance.
506 */
507
508void ataControllerResume(PAHCIATACONTROLLER pCtl);
509
510/**
511 * Relocate necessary pointers.
512 *
513 * @returns nothing.
514 * @param pCtl The controller instance.
515 * @param offDelta The relocation delta relative to the old location.
516 */
517void ataControllerRelocate(PAHCIATACONTROLLER pCtl, RTGCINTPTR offDelta);
518
519/**
520 * Execute state save operation.
521 *
522 * @returns VBox status code.
523 * @param pCtl The controller instance.
524 * @param pSSM SSM operation handle.
525 */
526int ataControllerSaveExec(PAHCIATACONTROLLER pCtl, PSSMHANDLE pSSM);
527
528/**
529 * Excute state load operation.
530 *
531 * @returns VBox status code.
532 * @param pCtl The controller instance.
533 * @param pSSM SSM operation handle.
534 */
535int ataControllerLoadExec(PAHCIATACONTROLLER pCtl, PSSMHANDLE pSSM);
536
537/**
538 * Attach command.
539 *
540 * This is called when we change block driver for the DVD drive.
541 *
542 * @returns VBox status code.
543 * @param pDevIns The device instance.
544 * @param iLUN The logical unit which is being detached.
545 */
546int ataControllerAttach(PAHCIATACONTROLLER pCtl, PPDMIBASE pDrvBase, bool fMaster);
547
548/**
549 * Detach notification.
550 *
551 * The DVD drive has been unplugged.
552 *
553 * @param pDevIns The device instance.
554 * @param fMaster True if the master is detached
555 * false for the slave
556 */
557void ataControllerDetach(PAHCIATACONTROLLER pCtl, bool fMaster);
558
559#endif /* IN_RING3 */
560
561#endif /* !VBOX_DEVICE_STRUCT_TESTCASE */
562#endif /* !___Storage_ATAController_h */
563
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