DevBusLogic.cpp@ 44124

Last change on this file since 44124 was 43690, checked in by vboxsync, 12 years ago
BusLogic: Fixed sense buffer allocation.
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1	/* $Id: DevBusLogic.cpp 43690 2012-10-19 14:06:13Z vboxsync $ */
2	/** @file
3	* VBox storage devices: BusLogic SCSI host adapter BT-958.
4	*/
5
6	/*
7	* Copyright (C) 2006-2012 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	/* Based on the Multi-Master Ultra SCSI Systems Technical Reference Manual */
19
20	/*******************************************************************************
21	* Header Files *
22	*******************************************************************************/
23
24	#define LOG_GROUP LOG_GROUP_DEV_BUSLOGIC
25	#include <VBox/vmm/pdmdev.h>
26	#include <VBox/vmm/pdmifs.h>
27	#include <VBox/vmm/pdmcritsect.h>
28	#include <VBox/scsi.h>
29	#include <iprt/asm.h>
30	#include <iprt/assert.h>
31	#include <iprt/string.h>
32	#include <iprt/log.h>
33	#ifdef IN_RING3
34	# include <iprt/alloc.h>
35	# include <iprt/memcache.h>
36	# include <iprt/param.h>
37	# include <iprt/uuid.h>
38	#endif
39
40	#include "VBoxSCSI.h"
41	#include "VBoxDD.h"
42
43	/* Maximum number of attached devices the adapter can handle. */
44	#define BUSLOGIC_MAX_DEVICES 16
45
46	/* Maximum number of scatter gather elements this device can handle. */
47	#define BUSLOGIC_MAX_SCATTER_GATHER_LIST_SIZE 128
48
49	/* Size of the command buffer. */
50	#define BUSLOGIC_COMMAND_SIZE_MAX 5
51
52	/* Size of the reply buffer. */
53	#define BUSLOGIC_REPLY_SIZE_MAX 64
54
55	/*
56	* Custom fixed I/O ports for BIOS controller access. Note that these should
57	* not be in the ISA range (below 400h) to avoid conflicts with ISA device
58	* probing. Addresses in the 300h-340h range should be especially avoided.
59	*/
60
61	#define BUSLOGIC_BIOS_IO_PORT 0x330
62
63	/** State saved version. */
64	#define BUSLOGIC_SAVED_STATE_MINOR_VERSION 2
65
66	/** Saved state version before the suspend on error feature was implemented. */
67	#define BUSLOGIC_SAVED_STATE_MINOR_PRE_ERROR_HANDLING 1
68
69	/** The duration of software-initiated reset. Not documented, set to 500 ms. */
70	#define BUSLOGIC_RESET_DURATION_NS (50010001000UL)
71
72	/**
73	* State of a device attached to the buslogic host adapter.
74	*
75	* @implements PDMIBASE
76	* @implements PDMISCSIPORT
77	* @implements PDMILEDPORTS
78	*/
79	typedef struct BUSLOGICDEVICE
80	{
81	/** Pointer to the owning buslogic device instance. - R3 pointer */
82	R3PTRTYPE(struct BUSLOGIC *) pBusLogicR3;
83	/** Pointer to the owning buslogic device instance. - R0 pointer */
84	R0PTRTYPE(struct BUSLOGIC *) pBusLogicR0;
85	/** Pointer to the owning buslogic device instance. - RC pointer */
86	RCPTRTYPE(struct BUSLOGIC *) pBusLogicRC;
87
88	/** Flag whether device is present. */
89	bool fPresent;
90	/** LUN of the device. */
91	RTUINT iLUN;
92
93	#if HC_ARCH_BITS == 64
94	uint32_t Alignment0;
95	#endif
96
97	/** Our base interface. */
98	PDMIBASE IBase;
99	/** SCSI port interface. */
100	PDMISCSIPORT ISCSIPort;
101	/** Led interface. */
102	PDMILEDPORTS ILed;
103	/** Pointer to the attached driver's base interface. */
104	R3PTRTYPE(PPDMIBASE) pDrvBase;
105	/** Pointer to the underlying SCSI connector interface. */
106	R3PTRTYPE(PPDMISCSICONNECTOR) pDrvSCSIConnector;
107	/** The status LED state for this device. */
108	PDMLED Led;
109
110	#if HC_ARCH_BITS == 64
111	uint32_t Alignment1;
112	#endif
113
114	/** Number of outstanding tasks on the port. */
115	volatile uint32_t cOutstandingRequests;
116
117	} BUSLOGICDEVICE, *PBUSLOGICDEVICE;
118
119	/*
120	* Commands the BusLogic adapter supports.
121	*/
122	enum BUSLOGICCOMMAND
123	{
124	BUSLOGICCOMMAND_TEST_CMDC_INTERRUPT = 0x00,
125	BUSLOGICCOMMAND_INITIALIZE_MAILBOX = 0x01,
126	BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND = 0x02,
127	BUSLOGICCOMMAND_EXECUTE_BIOS_COMMAND = 0x03,
128	BUSLOGICCOMMAND_INQUIRE_BOARD_ID = 0x04,
129	BUSLOGICCOMMAND_ENABLE_OUTGOING_MAILBOX_AVAILABLE_INTERRUPT = 0x05,
130	BUSLOGICCOMMAND_SET_SCSI_SELECTION_TIMEOUT = 0x06,
131	BUSLOGICCOMMAND_SET_PREEMPT_TIME_ON_BUS = 0x07,
132	BUSLOGICCOMMAND_SET_TIME_OFF_BUS = 0x08,
133	BUSLOGICCOMMAND_SET_BUS_TRANSFER_RATE = 0x09,
134	BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_0_TO_7 = 0x0a,
135	BUSLOGICCOMMAND_INQUIRE_CONFIGURATION = 0x0b,
136	BUSLOGICCOMMAND_ENABLE_TARGET_MODE = 0x0c,
137	BUSLOGICCOMMAND_INQUIRE_SETUP_INFORMATION = 0x0d,
138	BUSLOGICCOMMAND_WRITE_ADAPTER_LOCAL_RAM = 0x1a,
139	BUSLOGICCOMMAND_READ_ADAPTER_LOCAL_RAM = 0x1b,
140	BUSLOGICCOMMAND_WRITE_BUSMASTER_CHIP_FIFO = 0x1c,
141	BUSLOGICCOMMAND_READ_BUSMASTER_CHIP_FIFO = 0x1d,
142	BUSLOGICCOMMAND_ECHO_COMMAND_DATA = 0x1f,
143	BUSLOGICCOMMAND_HOST_ADAPTER_DIAGNOSTIC = 0x20,
144	BUSLOGICCOMMAND_SET_ADAPTER_OPTIONS = 0x21,
145	BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_8_TO_15 = 0x23,
146	BUSLOGICCOMMAND_INQUIRE_TARGET_DEVICES = 0x24,
147	BUSLOGICCOMMAND_DISABLE_HOST_ADAPTER_INTERRUPT = 0x25,
148	BUSLOGICCOMMAND_EXT_BIOS_INFO = 0x28,
149	BUSLOGICCOMMAND_UNLOCK_MAILBOX = 0x29,
150	BUSLOGICCOMMAND_INITIALIZE_EXTENDED_MAILBOX = 0x81,
151	BUSLOGICCOMMAND_EXECUTE_SCSI_COMMAND = 0x83,
152	BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_3RD_LETTER = 0x84,
153	BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_LETTER = 0x85,
154	BUSLOGICCOMMAND_INQUIRE_PCI_HOST_ADAPTER_INFORMATION = 0x86,
155	BUSLOGICCOMMAND_INQUIRE_HOST_ADAPTER_MODEL_NUMBER = 0x8b,
156	BUSLOGICCOMMAND_INQUIRE_SYNCHRONOUS_PERIOD = 0x8c,
157	BUSLOGICCOMMAND_INQUIRE_EXTENDED_SETUP_INFORMATION = 0x8d,
158	BUSLOGICCOMMAND_ENABLE_STRICT_ROUND_ROBIN_MODE = 0x8f,
159	BUSLOGICCOMMAND_STORE_HOST_ADAPTER_LOCAL_RAM = 0x90,
160	BUSLOGICCOMMAND_FETCH_HOST_ADAPTER_LOCAL_RAM = 0x91,
161	BUSLOGICCOMMAND_STORE_LOCAL_DATA_IN_EEPROM = 0x92,
162	BUSLOGICCOMMAND_UPLOAD_AUTO_SCSI_CODE = 0x94,
163	BUSLOGICCOMMAND_MODIFY_IO_ADDRESS = 0x95,
164	BUSLOGICCOMMAND_SET_CCB_FORMAT = 0x96,
165	BUSLOGICCOMMAND_WRITE_INQUIRY_BUFFER = 0x9a,
166	BUSLOGICCOMMAND_READ_INQUIRY_BUFFER = 0x9b,
167	BUSLOGICCOMMAND_FLASH_ROM_UPLOAD_DOWNLOAD = 0xa7,
168	BUSLOGICCOMMAND_READ_SCAM_DATA = 0xa8,
169	BUSLOGICCOMMAND_WRITE_SCAM_DATA = 0xa9
170	} BUSLOGICCOMMAND;
171
172	#pragma pack(1)
173	/**
174	* Auto SCSI structure which is located
175	* in host adapter RAM and contains several
176	* configuration parameters.
177	*/
178	typedef struct AutoSCSIRam
179	{
180	uint8_t aInternalSignature[2];
181	uint8_t cbInformation;
182	uint8_t aHostAdaptertype[6];
183	uint8_t uReserved1;
184	bool fFloppyEnabled: 1;
185	bool fFloppySecondary: 1;
186	bool fLevelSensitiveInterrupt: 1;
187	unsigned char uReserved2: 2;
188	unsigned char uSystemRAMAreForBIOS: 3;
189	unsigned char uDMAChannel: 7;
190	bool fDMAAutoConfiguration: 1;
191	unsigned char uIrqChannel: 7;
192	bool fIrqAutoConfiguration: 1;
193	uint8_t uDMATransferRate;
194	uint8_t uSCSIId;
195	bool fLowByteTerminated: 1;
196	bool fParityCheckingEnabled: 1;
197	bool fHighByteTerminated: 1;
198	bool fNoisyCablingEnvironment: 1;
199	bool fFastSynchronousNeogtiation: 1;
200	bool fBusResetEnabled: 1;
201	bool fReserved3: 1;
202	bool fActiveNegotiationEnabled: 1;
203	uint8_t uBusOnDelay;
204	uint8_t uBusOffDelay;
205	bool fHostAdapterBIOSEnabled: 1;
206	bool fBIOSRedirectionOfInt19: 1;
207	bool fExtendedTranslation: 1;
208	bool fMapRemovableAsFixed: 1;
209	bool fReserved4: 1;
210	bool fBIOSSupportsMoreThan2Drives: 1;
211	bool fBIOSInterruptMode: 1;
212	bool fFlopticalSupport: 1;
213	uint16_t u16DeviceEnabledMask;
214	uint16_t u16WidePermittedMask;
215	uint16_t u16FastPermittedMask;
216	uint16_t u16SynchronousPermittedMask;
217	uint16_t u16DisconnectPermittedMask;
218	uint16_t u16SendStartUnitCommandMask;
219	uint16_t u16IgnoreInBIOSScanMask;
220	unsigned char uPCIInterruptPin: 2;
221	unsigned char uHostAdapterIoPortAddress: 2;
222	bool fStrictRoundRobinMode: 1;
223	bool fVesaBusSpeedGreaterThan33MHz: 1;
224	bool fVesaBurstWrite: 1;
225	bool fVesaBurstRead: 1;
226	uint16_t u16UltraPermittedMask;
227	uint32_t uReserved5;
228	uint8_t uReserved6;
229	uint8_t uAutoSCSIMaximumLUN;
230	bool fReserved7: 1;
231	bool fSCAMDominant: 1;
232	bool fSCAMenabled: 1;
233	bool fSCAMLevel2: 1;
234	unsigned char uReserved8: 4;
235	bool fInt13Extension: 1;
236	bool fReserved9: 1;
237	bool fCDROMBoot: 1;
238	unsigned char uReserved10: 5;
239	unsigned char uBootTargetId: 4;
240	unsigned char uBootChannel: 4;
241	bool fForceBusDeviceScanningOrder: 1;
242	unsigned char uReserved11: 7;
243	uint16_t u16NonTaggedToAlternateLunPermittedMask;
244	uint16_t u16RenegotiateSyncAfterCheckConditionMask;
245	uint8_t aReserved12[10];
246	uint8_t aManufacturingDiagnostic[2];
247	uint16_t u16Checksum;
248	} AutoSCSIRam, *PAutoSCSIRam;
249	AssertCompileSize(AutoSCSIRam, 64);
250	#pragma pack()
251
252	/**
253	* The local Ram.
254	*/
255	typedef union HostAdapterLocalRam
256	{
257	/* Byte view. */
258	uint8_t u8View[256];
259	/* Structured view. */
260	struct
261	{
262	/** Offset 0 - 63 is for BIOS. */
263	uint8_t u8Bios[64];
264	/** Auto SCSI structure. */
265	AutoSCSIRam autoSCSIData;
266	} structured;
267	} HostAdapterLocalRam, *PHostAdapterLocalRam;
268	AssertCompileSize(HostAdapterLocalRam, 256);
269
270	/* Compatible ISA base I/O port addresses. Disabled if zero. */
271	#define NUM_ISA_BASES 8
272	#define MAX_ISA_BASE (NUM_ISA_BASES - 1)
273	#define ISA_BASE_DISABLED 6
274
275	static uint16_t aISABases[NUM_ISA_BASES] = {
276	0x330, 0x334, 0x230, 0x234, 0x130, 0x134, 0, 0
277	};
278
279	/** Pointer to a task state structure. */
280	typedef struct BUSLOGICTASKSTATE *PBUSLOGICTASKSTATE;
281
282	/**
283	* Main BusLogic device state.
284	*
285	* @extends PCIDEVICE
286	* @implements PDMILEDPORTS
287	*/
288	typedef struct BUSLOGIC
289	{
290	/** The PCI device structure. */
291	PCIDEVICE dev;
292	/** Pointer to the device instance - HC ptr */
293	PPDMDEVINSR3 pDevInsR3;
294	/** Pointer to the device instance - R0 ptr */
295	PPDMDEVINSR0 pDevInsR0;
296	/** Pointer to the device instance - RC ptr. */
297	PPDMDEVINSRC pDevInsRC;
298
299	/** Whether R0 is enabled. */
300	bool fR0Enabled;
301	/** Whether RC is enabled. */
302	bool fGCEnabled;
303
304	/** Base address of the I/O ports. */
305	RTIOPORT IOPortBase;
306	/** Base address of the memory mapping. */
307	RTGCPHYS MMIOBase;
308	/** Status register - Readonly. */
309	volatile uint8_t regStatus;
310	/** Interrupt register - Readonly. */
311	volatile uint8_t regInterrupt;
312	/** Geometry register - Readonly. */
313	volatile uint8_t regGeometry;
314	/** Pending (delayed) interrupt. */
315	uint8_t uPendingIntr;
316
317	/** Local RAM for the fetch hostadapter local RAM request.
318	* I don't know how big the buffer really is but the maximum
319	* seems to be 256 bytes because the offset and count field in the command request
320	* are only one byte big.
321	*/
322	HostAdapterLocalRam LocalRam;
323
324	/** Command code the guest issued. */
325	uint8_t uOperationCode;
326	/** Buffer for the command parameters the adapter is currently receiving from the guest.
327	* Size of the largest command which is possible.
328	*/
329	uint8_t aCommandBuffer[BUSLOGIC_COMMAND_SIZE_MAX]; /* Size of the biggest request. */
330	/** Current position in the command buffer. */
331	uint8_t iParameter;
332	/** Parameters left until the command is complete. */
333	uint8_t cbCommandParametersLeft;
334
335	/** Whether we are using the RAM or reply buffer. */
336	bool fUseLocalRam;
337	/** Buffer to store reply data from the controller to the guest. */
338	uint8_t aReplyBuffer[BUSLOGIC_REPLY_SIZE_MAX]; /* Size of the biggest reply. */
339	/** Position in the buffer we are reading next. */
340	uint8_t iReply;
341	/** Bytes left until the reply buffer is empty. */
342	uint8_t cbReplyParametersLeft;
343
344	/** Flag whether IRQs are enabled. */
345	bool fIRQEnabled;
346	/** Flag whether the ISA I/O port range is disabled
347	* to prevent the BIOS to access the device. */
348	bool fISAEnabled; //@todo: unused, to be removed
349	/** Flag whether 24-bit mailboxes are in use (default is 32-bit). */
350	bool fMbxIs24Bit; //@todo: save?
351	/** ISA I/O port base (encoded in FW-compatible format). */
352	uint8_t uISABaseCode;
353
354	/** ISA I/O port base (disabled if zero). */
355	RTIOPORT IOISABase;
356	/** Default ISA I/O port base in FW-compatible format. */
357	uint8_t uDefaultISABaseCode;
358
359	/** Number of mailboxes the guest set up. */
360	uint32_t cMailbox;
361
362	#if HC_ARCH_BITS == 64
363	uint32_t Alignment0;
364	#endif
365
366	/** Time when HBA reset was last initiated. */ //@todo: does this need to be saved?
367	uint64_t u64ResetTime;
368	/** Physical base address of the outgoing mailboxes. */
369	RTGCPHYS GCPhysAddrMailboxOutgoingBase;
370	/** Current outgoing mailbox position. */
371	uint32_t uMailboxOutgoingPositionCurrent;
372	/** Number of mailboxes ready. */
373	volatile uint32_t cMailboxesReady;
374	/** Whether a notification to R3 was send. */
375	volatile bool fNotificationSend;
376
377	#if HC_ARCH_BITS == 64
378	uint32_t Alignment1;
379	#endif
380
381	/** Physical base address of the incoming mailboxes. */
382	RTGCPHYS GCPhysAddrMailboxIncomingBase;
383	/** Current incoming mailbox position. */
384	uint32_t uMailboxIncomingPositionCurrent;
385
386	/** Whether strict round robin is enabled. */
387	bool fStrictRoundRobinMode;
388	/** Whether the extended LUN CCB format is enabled for 32 possible logical units. */
389	bool fExtendedLunCCBFormat;
390
391	/** Queue to send tasks to R3. - HC ptr */
392	R3PTRTYPE(PPDMQUEUE) pNotifierQueueR3;
393	/** Queue to send tasks to R3. - HC ptr */
394	R0PTRTYPE(PPDMQUEUE) pNotifierQueueR0;
395	/** Queue to send tasks to R3. - RC ptr */
396	RCPTRTYPE(PPDMQUEUE) pNotifierQueueRC;
397
398	uint32_t Alignment2;
399
400	/** Critical section protecting access to the interrupt status register. */
401	PDMCRITSECT CritSectIntr;
402
403	/** Cache for task states. */
404	R3PTRTYPE(RTMEMCACHE) hTaskCache;
405
406	/** Device state for BIOS access. */
407	VBOXSCSI VBoxSCSI;
408
409	/** BusLogic device states. */
410	BUSLOGICDEVICE aDeviceStates[BUSLOGIC_MAX_DEVICES];
411
412	/** The base interface.
413	* @todo use PDMDEVINS::IBase */
414	PDMIBASE IBase;
415	/** Status Port - Leds interface. */
416	PDMILEDPORTS ILeds;
417	/** Partner of ILeds. */
418	R3PTRTYPE(PPDMILEDCONNECTORS) pLedsConnector;
419
420	#if HC_ARCH_BITS == 64
421	uint32_t Alignment3;
422	#endif
423
424	/** Indicates that PDMDevHlpAsyncNotificationCompleted should be called when
425	* a port is entering the idle state. */
426	bool volatile fSignalIdle;
427	/** Flag whether we have tasks which need to be processed again. */
428	bool volatile fRedo;
429	/** List of tasks which can be redone. */
430	R3PTRTYPE(volatile PBUSLOGICTASKSTATE) pTasksRedoHead;
431
432	#ifdef LOG_ENABLED
433	# if HC_ARCH_BITS == 64
434	uint32_t Alignment4;
435	# endif
436
437	volatile uint32_t cInMailboxesReady;
438	#endif
439
440	} BUSLOGIC, *PBUSLOGIC;
441
442	/** Register offsets in the I/O port space. */
443	#define BUSLOGIC_REGISTER_CONTROL 0 /* Writeonly */
444	/** Fields for the control register. */
445	# define BUSLOGIC_REGISTER_CONTROL_SCSI_BUSRESET RT_BIT(4)
446	# define BUSLOGIC_REGISTER_CONTROL_INTERRUPT_RESET RT_BIT(5)
447	# define BUSLOGIC_REGISTER_CONTROL_SOFT_RESET RT_BIT(6)
448	# define BUSLOGIC_REGISTER_CONTROL_HARD_RESET RT_BIT(7)
449
450	#define BUSLOGIC_REGISTER_STATUS 0 /* Readonly */
451	/** Fields for the status register. */
452	# define BUSLOGIC_REGISTER_STATUS_COMMAND_INVALID RT_BIT(0)
453	# define BUSLOGIC_REGISTER_STATUS_DATA_IN_REGISTER_READY RT_BIT(2)
454	# define BUSLOGIC_REGISTER_STATUS_COMMAND_PARAMETER_REGISTER_BUSY RT_BIT(3)
455	# define BUSLOGIC_REGISTER_STATUS_HOST_ADAPTER_READY RT_BIT(4)
456	# define BUSLOGIC_REGISTER_STATUS_INITIALIZATION_REQUIRED RT_BIT(5)
457	# define BUSLOGIC_REGISTER_STATUS_DIAGNOSTIC_FAILURE RT_BIT(6)
458	# define BUSLOGIC_REGISTER_STATUS_DIAGNOSTIC_ACTIVE RT_BIT(7)
459
460	#define BUSLOGIC_REGISTER_COMMAND 1 /* Writeonly */
461	#define BUSLOGIC_REGISTER_DATAIN 1 /* Readonly */
462	#define BUSLOGIC_REGISTER_INTERRUPT 2 /* Readonly */
463	/** Fields for the interrupt register. */
464	# define BUSLOGIC_REGISTER_INTERRUPT_INCOMING_MAILBOX_LOADED RT_BIT(0)
465	# define BUSLOGIC_REGISTER_INTERRUPT_OUTGOING_MAILBOX_AVAILABLE RT_BIT(1)
466	# define BUSLOGIC_REGISTER_INTERRUPT_COMMAND_COMPLETE RT_BIT(2)
467	# define BUSLOGIC_REGISTER_INTERRUPT_EXTERNAL_BUS_RESET RT_BIT(3)
468	# define BUSLOGIC_REGISTER_INTERRUPT_INTERRUPT_VALID RT_BIT(7)
469
470	#define BUSLOGIC_REGISTER_GEOMETRY 3 /* Readonly */
471	# define BUSLOGIC_REGISTER_GEOMETRY_EXTENTED_TRANSLATION_ENABLED RT_BIT(7)
472
473	/* Structure for the INQUIRE_PCI_HOST_ADAPTER_INFORMATION reply. */
474	typedef struct ReplyInquirePCIHostAdapterInformation
475	{
476	uint8_t IsaIOPort;
477	uint8_t IRQ;
478	unsigned char LowByteTerminated:1;
479	unsigned char HighByteTerminated:1;
480	unsigned char uReserved:2; /* Reserved. */
481	unsigned char JP1:1; /* Whatever that means. */
482	unsigned char JP2:1; /* Whatever that means. */
483	unsigned char JP3:1; /* Whatever that means. */
484	/** Whether the provided info is valid. */
485	unsigned char InformationIsValid: 1;
486	uint8_t uReserved2; /* Reserved. */
487	} ReplyInquirePCIHostAdapterInformation, *PReplyInquirePCIHostAdapterInformation;
488	AssertCompileSize(ReplyInquirePCIHostAdapterInformation, 4);
489
490	/* Structure for the INQUIRE_CONFIGURATION reply. */
491	typedef struct ReplyInquireConfiguration
492	{
493	unsigned char uReserved1: 5;
494	bool fDmaChannel5: 1;
495	bool fDmaChannel6: 1;
496	bool fDmaChannel7: 1;
497	bool fIrqChannel9: 1;
498	bool fIrqChannel10: 1;
499	bool fIrqChannel11: 1;
500	bool fIrqChannel12: 1;
501	unsigned char uReserved2: 1;
502	bool fIrqChannel14: 1;
503	bool fIrqChannel15: 1;
504	unsigned char uReserved3: 1;
505	unsigned char uHostAdapterId: 4;
506	unsigned char uReserved4: 4;
507	} ReplyInquireConfiguration, *PReplyInquireConfiguration;
508	AssertCompileSize(ReplyInquireConfiguration, 3);
509
510	/* Structure for the INQUIRE_SETUP_INFORMATION reply. */
511	typedef struct ReplyInquireSetupInformationSynchronousValue
512	{
513	unsigned char uOffset: 4;
514	unsigned char uTransferPeriod: 3;
515	bool fSynchronous: 1;
516	}ReplyInquireSetupInformationSynchronousValue, *PReplyInquireSetupInformationSynchronousValue;
517	AssertCompileSize(ReplyInquireSetupInformationSynchronousValue, 1);
518
519	typedef struct ReplyInquireSetupInformation
520	{
521	bool fSynchronousInitiationEnabled: 1;
522	bool fParityCheckingEnabled: 1;
523	unsigned char uReserved1: 6;
524	uint8_t uBusTransferRate;
525	uint8_t uPreemptTimeOnBus;
526	uint8_t uTimeOffBus;
527	uint8_t cMailbox;
528	uint8_t MailboxAddress[3];
529	ReplyInquireSetupInformationSynchronousValue SynchronousValuesId0To7[8];
530	uint8_t uDisconnectPermittedId0To7;
531	uint8_t uSignature;
532	uint8_t uCharacterD;
533	uint8_t uHostBusType;
534	uint8_t uWideTransferPermittedId0To7;
535	uint8_t uWideTransfersActiveId0To7;
536	ReplyInquireSetupInformationSynchronousValue SynchronousValuesId8To15[8];
537	uint8_t uDisconnectPermittedId8To15;
538	uint8_t uReserved2;
539	uint8_t uWideTransferPermittedId8To15;
540	uint8_t uWideTransfersActiveId8To15;
541	} ReplyInquireSetupInformation, *PReplyInquireSetupInformation;
542	AssertCompileSize(ReplyInquireSetupInformation, 34);
543
544	/* Structure for the INQUIRE_EXTENDED_SETUP_INFORMATION. */
545	#pragma pack(1)
546	typedef struct ReplyInquireExtendedSetupInformation
547	{
548	uint8_t uBusType;
549	uint8_t uBiosAddress;
550	uint16_t u16ScatterGatherLimit;
551	uint8_t cMailbox;
552	uint32_t uMailboxAddressBase;
553	unsigned char uReserved1: 2;
554	bool fFastEISA: 1;
555	unsigned char uReserved2: 3;
556	bool fLevelSensitiveInterrupt: 1;
557	unsigned char uReserved3: 1;
558	unsigned char aFirmwareRevision[3];
559	bool fHostWideSCSI: 1;
560	bool fHostDifferentialSCSI: 1;
561	bool fHostSupportsSCAM: 1;
562	bool fHostUltraSCSI: 1;
563	bool fHostSmartTermination: 1;
564	unsigned char uReserved4: 3;
565	} ReplyInquireExtendedSetupInformation, *PReplyInquireExtendedSetupInformation;
566	AssertCompileSize(ReplyInquireExtendedSetupInformation, 14);
567	#pragma pack()
568
569	/* Structure for the INITIALIZE EXTENDED MAILBOX request. */
570	#pragma pack(1)
571	typedef struct RequestInitializeExtendedMailbox
572	{
573	/** Number of mailboxes in guest memory. */
574	uint8_t cMailbox;
575	/** Physical address of the first mailbox. */
576	uint32_t uMailboxBaseAddress;
577	} RequestInitializeExtendedMailbox, *PRequestInitializeExtendedMailbox;
578	AssertCompileSize(RequestInitializeExtendedMailbox, 5);
579	#pragma pack()
580
581	/*
582	* Structure of a mailbox in guest memory.
583	* The incoming and outgoing mailbox have the same size
584	* but the incoming one has some more fields defined which
585	* are marked as reserved in the outgoing one.
586	* The last field is also different from the type.
587	* For outgoing mailboxes it is the action and
588	* for incoming ones the completion status code for the task.
589	* We use one structure for both types.
590	*/
591	#pragma pack(1)
592	typedef struct Mailbox
593	{
594	/** Physical address of the CCB structure in the guest memory. */
595	uint32_t u32PhysAddrCCB;
596	/** Type specific data. */
597	union
598	{
599	/** For outgoing mailboxes. */
600	struct
601	{
602	/** Reserved */
603	uint8_t uReserved[3];
604	/** Action code. */
605	uint8_t uActionCode;
606	} out;
607	/** For incoming mailboxes. */
608	struct
609	{
610	/** The host adapter status after finishing the request. */
611	uint8_t uHostAdapterStatus;
612	/** The status of the device which executed the request after executing it. */
613	uint8_t uTargetDeviceStatus;
614	/** Reserved. */
615	uint8_t uReserved;
616	/** The completion status code of the request. */
617	uint8_t uCompletionCode;
618	} in;
619	} u;
620	} Mailbox, *PMailbox;
621	AssertCompileSize(Mailbox, 8);
622	#pragma pack()
623
624	/*
625	* Action codes for outgoing mailboxes.
626	*/
627	enum BUSLOGIC_MAILBOX_OUTGOING_ACTION
628	{
629	BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE = 0x00,
630	BUSLOGIC_MAILBOX_OUTGOING_ACTION_START_COMMAND = 0x01,
631	BUSLOGIC_MAILBOX_OUTGOING_ACTION_ABORT_COMMAND = 0x02
632	};
633
634	/*
635	* Completion codes for incoming mailboxes.
636	*/
637	enum BUSLOGIC_MAILBOX_INCOMING_COMPLETION
638	{
639	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_FREE = 0x00,
640	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITHOUT_ERROR = 0x01,
641	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_ABORTED = 0x02,
642	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_ABORTED_NOT_FOUND = 0x03,
643	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR = 0x04,
644	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_INVALID_CCB = 0x05
645	};
646
647	/*
648	* Host adapter status for incoming mailboxes.
649	*/
650	enum BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS
651	{
652	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_CMD_COMPLETED = 0x00,
653	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_LINKED_CMD_COMPLETED = 0x0a,
654	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_LINKED_CMD_COMPLETED_WITH_FLAG = 0x0b,
655	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_DATA_UNDERUN = 0x0c,
656	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_SCSI_SELECTION_TIMEOUT = 0x11,
657	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_DATA_OVERRUN = 0x12,
658	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_UNEXPECTED_BUS_FREE = 0x13,
659	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_BUS_PHASE_REQUESTED = 0x14,
660	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_OUTGOING_MAILBOX_ACTION_CODE = 0x15,
661	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_COMMAND_OPERATION_CODE = 0x16,
662	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_LINKED_CCB_HAS_INVALID_LUN = 0x17,
663	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_COMMAND_PARAMETER = 0x1a,
664	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_AUTO_REQUEST_SENSE_FAILED = 0x1b,
665	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_TAGGED_QUEUING_MESSAGE_REJECTED = 0x1c,
666	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_UNSUPPORTED_MESSAGE_RECEIVED = 0x1d,
667	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_HARDWARE_FAILED = 0x20,
668	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_TARGET_FAILED_RESPONSE_TO_ATN = 0x21,
669	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_ASSERTED_RST = 0x22,
670	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_OTHER_DEVICE_ASSERTED_RST = 0x23,
671	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_TARGET_DEVICE_RECONNECTED_IMPROPERLY = 0x24,
672	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_ASSERTED_BUS_DEVICE_RESET = 0x25,
673	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_ABORT_QUEUE_GENERATED = 0x26,
674	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_SOFTWARE_ERROR = 0x27,
675	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_HARDWARE_TIMEOUT_ERROR = 0x30,
676	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_SCSI_PARITY_ERROR_DETECTED = 0x34
677	};
678
679	/*
680	* Device status codes for incoming mailboxes.
681	*/
682	enum BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS
683	{
684	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD = 0x00,
685	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_CHECK_CONDITION = 0x02,
686	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_DEVICE_BUSY = 0x08
687	};
688
689	/*
690	* Opcode types for CCB.
691	*/
692	enum BUSLOGIC_CCB_OPCODE
693	{
694	BUSLOGIC_CCB_OPCODE_INITIATOR_CCB = 0x00,
695	BUSLOGIC_CCB_OPCODE_TARGET_CCB = 0x01,
696	BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_SCATTER_GATHER = 0x02,
697	BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_DATA_LENGTH = 0x03,
698	BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_SCATTER_GATHER = 0x04,
699	BUSLOGIC_CCB_OPCODE_BUS_DEVICE_RESET = 0x81
700	};
701
702	/*
703	* Data transfer direction.
704	*/
705	enum BUSLOGIC_CCB_DIRECTION
706	{
707	BUSLOGIC_CCB_DIRECTION_UNKNOWN = 0x00,
708	BUSLOGIC_CCB_DIRECTION_IN = 0x01,
709	BUSLOGIC_CCB_DIRECTION_OUT = 0x02,
710	BUSLOGIC_CCB_DIRECTION_NO_DATA = 0x03
711	};
712
713	/*
714	* The command control block for a SCSI request.
715	*/
716	#pragma pack(1)
717	typedef struct CommandControlBlock
718	{
719	/** Opcode. */
720	uint8_t uOpcode;
721	/** Reserved */
722	unsigned char uReserved1: 3;
723	/** Data direction for the request. */
724	unsigned char uDataDirection: 2;
725	/** Whether the request is tag queued. */
726	bool fTagQueued: 1;
727	/** Queue tag mode. */
728	unsigned char uQueueTag: 2;
729	/** Length of the SCSI CDB. */
730	uint8_t cbCDB;
731	/** Sense data length. */
732	uint8_t cbSenseData;
733	/** Data length. */
734	uint32_t cbData;
735	/** Data pointer.
736	* This points to the data region or a scatter gather list based on the opcode.
737	*/
738	uint32_t u32PhysAddrData;
739	/** Reserved. */
740	uint8_t uReserved2[2];
741	/** Host adapter status. */
742	uint8_t uHostAdapterStatus;
743	/** Device adapter status. */
744	uint8_t uDeviceStatus;
745	/** The device the request is sent to. */
746	uint8_t uTargetId;
747	/*The LUN in the device. /
748	unsigned char uLogicalUnit: 5;
749	/** Legacy tag. */
750	bool fLegacyTagEnable: 1;
751	/** Legacy queue tag. */
752	unsigned char uLegacyQueueTag: 2;
753	/** The SCSI CDB. */
754	uint8_t aCDB[12]; /* A CDB can be 12 bytes long. */
755	/** Reserved. */
756	uint8_t uReserved3[6];
757	/** Sense data pointer. */
758	uint32_t u32PhysAddrSenseData;
759	} CommandControlBlock, *PCommandControlBlock;
760	AssertCompileSize(CommandControlBlock, 40);
761	#pragma pack()
762
763	#pragma pack(1)
764	typedef struct ScatterGatherEntry
765	{
766	uint32_t cbSegment;
767	uint32_t u32PhysAddrSegmentBase;
768	} ScatterGatherEntry, *PScatterGatherEntry;
769	AssertCompileSize(ScatterGatherEntry, 8);
770	#pragma pack()
771
772	/*
773	* Task state for a CCB request.
774	*/
775	typedef struct BUSLOGICTASKSTATE
776	{
777	/** Next in the redo list. */
778	PBUSLOGICTASKSTATE pRedoNext;
779	/** Device this task is assigned to. */
780	R3PTRTYPE(PBUSLOGICDEVICE) pTargetDeviceR3;
781	/** The command control block from the guest. */
782	CommandControlBlock CommandControlBlockGuest;
783	/** Mailbox read from guest memory. */
784	Mailbox MailboxGuest;
785	/** The SCSI request we pass to the underlying SCSI engine. */
786	PDMSCSIREQUEST PDMScsiRequest;
787	/** Data buffer segment */
788	RTSGSEG DataSeg;
789	/** Pointer to the R3 sense buffer. */
790	uint8_t *pbSenseBuffer;
791	/** Flag whether this is a request from the BIOS. */
792	bool fBIOS;
793	} BUSLOGICTASKSTATE;
794
795	#ifndef VBOX_DEVICE_STRUCT_TESTCASE
796
797	#define PDMIBASE_2_PBUSLOGICDEVICE(pInterface) ( (PBUSLOGICDEVICE)((uintptr_t)(pInterface) - RT_OFFSETOF(BUSLOGICDEVICE, IBase)) )
798	#define PDMISCSIPORT_2_PBUSLOGICDEVICE(pInterface) ( (PBUSLOGICDEVICE)((uintptr_t)(pInterface) - RT_OFFSETOF(BUSLOGICDEVICE, ISCSIPort)) )
799	#define PDMILEDPORTS_2_PBUSLOGICDEVICE(pInterface) ( (PBUSLOGICDEVICE)((uintptr_t)(pInterface) - RT_OFFSETOF(BUSLOGICDEVICE, ILed)) )
800	#define PDMIBASE_2_PBUSLOGIC(pInterface) ( (PBUSLOGIC)((uintptr_t)(pInterface) - RT_OFFSETOF(BUSLOGIC, IBase)) )
801	#define PDMILEDPORTS_2_PBUSLOGIC(pInterface) ( (PBUSLOGIC)((uintptr_t)(pInterface) - RT_OFFSETOF(BUSLOGIC, ILeds)) )
802
803	static int buslogicRegisterISARange(PBUSLOGIC pBusLogic, uint8_t uBaseCode);
804
805	/**
806	* Assert IRQ line of the BusLogic adapter.
807	*
808	* @returns nothing.
809	* @param pBusLogic Pointer to the BusLogic device instance.
810	* @param fSuppressIrq Flag to suppress IRQ generation regardless of fIRQEnabled
811	* @param uFlag Type of interrupt being generated.
812	*/
813	static void buslogicSetInterrupt(PBUSLOGIC pBusLogic, bool fSuppressIrq, uint8_t uIrqType)
814	{
815	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
816
817	/* The CMDC interrupt has priority over IMBL and MBOR. */
818	if (uIrqType & (BUSLOGIC_REGISTER_INTERRUPT_INCOMING_MAILBOX_LOADED \| BUSLOGIC_REGISTER_INTERRUPT_OUTGOING_MAILBOX_AVAILABLE))
819	{
820	if (!(pBusLogic->regInterrupt & BUSLOGIC_REGISTER_INTERRUPT_COMMAND_COMPLETE))
821	pBusLogic->regInterrupt \|= uIrqType; /* Report now. */
822	else
823	pBusLogic->uPendingIntr \|= uIrqType; /* Report later. */
824	}
825	else if (uIrqType & BUSLOGIC_REGISTER_INTERRUPT_COMMAND_COMPLETE)
826	{
827	Assert(!pBusLogic->regInterrupt);
828	pBusLogic->regInterrupt \|= uIrqType;
829	}
830	else
831	AssertMsgFailed(("Invalid interrupt state!\n"));
832
833	pBusLogic->regInterrupt \|= BUSLOGIC_REGISTER_INTERRUPT_INTERRUPT_VALID;
834	if (pBusLogic->fIRQEnabled && !fSuppressIrq)
835	PDMDevHlpPCISetIrq(pBusLogic->CTX_SUFF(pDevIns), 0, 1);
836	}
837
838	/**
839	* Deasserts the interrupt line of the BusLogic adapter.
840	*
841	* @returns nothing
842	* @param pBuslogic Pointer to the BusLogic device instance.
843	*/
844	static void buslogicClearInterrupt(PBUSLOGIC pBusLogic)
845	{
846	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
847	pBusLogic->regInterrupt = 0;
848	PDMDevHlpPCISetIrq(pBusLogic->CTX_SUFF(pDevIns), 0, 0);
849	/* If there's another pending interrupt, report it now. */
850	if (pBusLogic->uPendingIntr)
851	{
852	buslogicSetInterrupt(pBusLogic, false, pBusLogic->uPendingIntr);
853	pBusLogic->uPendingIntr = 0;
854	}
855	}
856
857	#if defined(IN_RING3)
858
859	/**
860	* Advances the mailbox pointer to the next slot.
861	*/
862	DECLINLINE(void) buslogicOutgoingMailboxAdvance(PBUSLOGIC pBusLogic)
863	{
864	pBusLogic->uMailboxOutgoingPositionCurrent = (pBusLogic->uMailboxOutgoingPositionCurrent + 1) % pBusLogic->cMailbox;
865	}
866
867	/**
868	* Returns the physical address of the next outgoing mailbox to process.
869	*/
870	DECLINLINE(RTGCPHYS) buslogicOutgoingMailboxGetGCPhys(PBUSLOGIC pBusLogic)
871	{
872	return pBusLogic->GCPhysAddrMailboxOutgoingBase + (pBusLogic->uMailboxOutgoingPositionCurrent * sizeof(Mailbox));
873	}
874
875	/**
876	* Initialize local RAM of host adapter with default values.
877	*
878	* @returns nothing.
879	* @param pBusLogic.
880	*/
881	static void buslogicInitializeLocalRam(PBUSLOGIC pBusLogic)
882	{
883	/*
884	* These values are mostly from what I think is right
885	* looking at the dmesg output from a Linux guest inside
886	* a VMware server VM.
887	*
888	* So they don't have to be right :)
889	*/
890	memset(pBusLogic->LocalRam.u8View, 0, sizeof(HostAdapterLocalRam));
891	pBusLogic->LocalRam.structured.autoSCSIData.fLevelSensitiveInterrupt = true;
892	pBusLogic->LocalRam.structured.autoSCSIData.fParityCheckingEnabled = true;
893	pBusLogic->LocalRam.structured.autoSCSIData.fExtendedTranslation = true; /* Same as in geometry register. */
894	pBusLogic->LocalRam.structured.autoSCSIData.u16DeviceEnabledMask = ~0; /* All enabled. Maybe mask out non present devices? */
895	pBusLogic->LocalRam.structured.autoSCSIData.u16WidePermittedMask = ~0;
896	pBusLogic->LocalRam.structured.autoSCSIData.u16FastPermittedMask = ~0;
897	pBusLogic->LocalRam.structured.autoSCSIData.u16SynchronousPermittedMask = ~0;
898	pBusLogic->LocalRam.structured.autoSCSIData.u16DisconnectPermittedMask = ~0;
899	pBusLogic->LocalRam.structured.autoSCSIData.fStrictRoundRobinMode = pBusLogic->fStrictRoundRobinMode;
900	pBusLogic->LocalRam.structured.autoSCSIData.u16UltraPermittedMask = ~0;
901	/* @todo calculate checksum? */
902	}
903
904	/**
905	* Do a hardware reset of the buslogic adapter.
906	*
907	* @returns VBox status code.
908	* @param pBusLogic Pointer to the BusLogic device instance.
909	* @param fResetIO Flag determining whether ISA I/O should be reset.
910	*/
911	static int buslogicHwReset(PBUSLOGIC pBusLogic, bool fResetIO)
912	{
913	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
914
915	/* Reset registers to default value. */
916	pBusLogic->regStatus = BUSLOGIC_REGISTER_STATUS_HOST_ADAPTER_READY \| BUSLOGIC_REGISTER_STATUS_INITIALIZATION_REQUIRED;
917	pBusLogic->regInterrupt = 0;
918	pBusLogic->uPendingIntr = 0;
919	pBusLogic->regGeometry = BUSLOGIC_REGISTER_GEOMETRY_EXTENTED_TRANSLATION_ENABLED;
920	pBusLogic->uOperationCode = 0xff; /* No command executing. */
921	pBusLogic->iParameter = 0;
922	pBusLogic->cbCommandParametersLeft = 0;
923	pBusLogic->fIRQEnabled = true;
924	pBusLogic->uMailboxOutgoingPositionCurrent = 0;
925	pBusLogic->uMailboxIncomingPositionCurrent = 0;
926
927	/* Guest-initiated HBA reset does not affect ISA port I/O. */
928	if (fResetIO)
929	{
930	buslogicRegisterISARange(pBusLogic, pBusLogic->uDefaultISABaseCode);
931	}
932	buslogicInitializeLocalRam(pBusLogic);
933	vboxscsiInitialize(&pBusLogic->VBoxSCSI);
934
935	return VINF_SUCCESS;
936	}
937	#endif
938
939	/**
940	* Resets the command state machine for the next command and notifies the guest.
941	*
942	* @returns nothing.
943	* @param pBusLogic Pointer to the BusLogic device instance
944	* @param fSuppressIrq Flag to suppress IRQ generation regardless of current state
945	*/
946	static void buslogicCommandComplete(PBUSLOGIC pBusLogic, bool fSuppressIrq)
947	{
948	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
949
950	pBusLogic->fUseLocalRam = false;
951	pBusLogic->regStatus \|= BUSLOGIC_REGISTER_STATUS_HOST_ADAPTER_READY;
952	pBusLogic->iReply = 0;
953
954	/* Modify I/O address does not generate an interrupt. */
955	if (pBusLogic->uOperationCode != BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND)
956	{
957	/* Notify that the command is complete. */
958	pBusLogic->regStatus &= ~BUSLOGIC_REGISTER_STATUS_DATA_IN_REGISTER_READY;
959	buslogicSetInterrupt(pBusLogic, fSuppressIrq, BUSLOGIC_REGISTER_INTERRUPT_COMMAND_COMPLETE);
960	}
961
962	pBusLogic->uOperationCode = 0xff;
963	pBusLogic->iParameter = 0;
964	}
965
966	#if defined(IN_RING3)
967	/**
968	* Initiates a hard reset which was issued from the guest.
969	*
970	* @returns nothing
971	* @param pBusLogic Pointer to the BusLogic device instance.
972	* @param fHardReset Flag initiating a hard (vs. soft) reset.
973	*/
974	static void buslogicInitiateReset(PBUSLOGIC pBusLogic, bool fHardReset)
975	{
976	LogFlowFunc(("pBusLogic=%#p fHardReset=%d\n", pBusLogic, fHardReset));
977
978	buslogicHwReset(pBusLogic, fHardReset);
979
980	if (fHardReset)
981	{
982	/* Set the diagnostic active bit in the status register and clear the ready state. */
983	pBusLogic->regStatus \|= BUSLOGIC_REGISTER_STATUS_DIAGNOSTIC_ACTIVE;
984	pBusLogic->regStatus &= ~BUSLOGIC_REGISTER_STATUS_HOST_ADAPTER_READY;
985
986	/* Remember when the guest initiated a reset (after we're done resetting). */
987	pBusLogic->u64ResetTime = PDMDevHlpTMTimeVirtGetNano(pBusLogic->CTX_SUFF(pDevIns));
988	}
989	}
990
991	/**
992	* Send a mailbox with set status codes to the guest.
993	*
994	* @returns nothing.
995	* @param pBusLogic Pointer to the BusLogic device instance.
996	* @param pTaskState Pointer to the task state with the mailbox to send.
997	* @param uHostAdapterStatus The host adapter status code to set.
998	* @param uDeviceStatus The target device status to set.
999	* @param uMailboxCompletionCode Completion status code to set in the mailbox.
1000	*/
1001	static void buslogicSendIncomingMailbox(PBUSLOGIC pBusLogic, PBUSLOGICTASKSTATE pTaskState,
1002	uint8_t uHostAdapterStatus, uint8_t uDeviceStatus,
1003	uint8_t uMailboxCompletionCode)
1004	{
1005	pTaskState->MailboxGuest.u.in.uHostAdapterStatus = uHostAdapterStatus;
1006	pTaskState->MailboxGuest.u.in.uTargetDeviceStatus = uDeviceStatus;
1007	pTaskState->MailboxGuest.u.in.uCompletionCode = uMailboxCompletionCode;
1008
1009	int rc = PDMCritSectEnter(&pBusLogic->CritSectIntr, VINF_SUCCESS);
1010	AssertRC(rc);
1011	RTGCPHYS GCPhysAddrMailboxIncoming = pBusLogic->GCPhysAddrMailboxIncomingBase + (pBusLogic->uMailboxIncomingPositionCurrent * sizeof(Mailbox));
1012	RTGCPHYS GCPhysAddrCCB = (RTGCPHYS)pTaskState->MailboxGuest.u32PhysAddrCCB;
1013
1014	LogFlowFunc(("Completing CCB %RGp\n", GCPhysAddrCCB));
1015
1016	/* Update CCB. */
1017	pTaskState->CommandControlBlockGuest.uHostAdapterStatus = uHostAdapterStatus;
1018	pTaskState->CommandControlBlockGuest.uDeviceStatus = uDeviceStatus;
1019	/* @todo: this is wrong - writing too much! */
1020	PDMDevHlpPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrCCB, &pTaskState->CommandControlBlockGuest, sizeof(CommandControlBlock));
1021
1022	#ifdef RT_STRICT
1023	Mailbox Tmp;
1024	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxIncoming, &Tmp, sizeof(Mailbox));
1025	Assert(Tmp.u.in.uCompletionCode == BUSLOGIC_MAILBOX_INCOMING_COMPLETION_FREE);
1026	#endif
1027
1028	/* Update mailbox. */
1029	PDMDevHlpPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxIncoming, &pTaskState->MailboxGuest, sizeof(Mailbox));
1030
1031	/* Advance to next mailbox position. */
1032	pBusLogic->uMailboxIncomingPositionCurrent++;
1033	if (pBusLogic->uMailboxIncomingPositionCurrent >= pBusLogic->cMailbox)
1034	pBusLogic->uMailboxIncomingPositionCurrent = 0;
1035
1036	#ifdef LOG_ENABLED
1037	ASMAtomicIncU32(&pBusLogic->cInMailboxesReady);
1038	#endif
1039
1040	buslogicSetInterrupt(pBusLogic, false, BUSLOGIC_REGISTER_INTERRUPT_INCOMING_MAILBOX_LOADED);
1041
1042	PDMCritSectLeave(&pBusLogic->CritSectIntr);
1043	}
1044
1045	#if defined(DEBUG)
1046	/**
1047	* Dumps the content of a mailbox for debugging purposes.
1048	*
1049	* @return nothing
1050	* @param pMailbox The mailbox to dump.
1051	* @param fOutgoing true if dumping the outgoing state.
1052	* false if dumping the incoming state.
1053	*/
1054	static void buslogicDumpMailboxInfo(PMailbox pMailbox, bool fOutgoing)
1055	{
1056	Log(("%s: Dump for %s mailbox:\n", __FUNCTION__, fOutgoing ? "outgoing" : "incoming"));
1057	Log(("%s: u32PhysAddrCCB=%#x\n", __FUNCTION__, pMailbox->u32PhysAddrCCB));
1058	if (fOutgoing)
1059	{
1060	Log(("%s: uActionCode=%u\n", __FUNCTION__, pMailbox->u.out.uActionCode));
1061	}
1062	else
1063	{
1064	Log(("%s: uHostAdapterStatus=%u\n", __FUNCTION__, pMailbox->u.in.uHostAdapterStatus));
1065	Log(("%s: uTargetDeviceStatus=%u\n", __FUNCTION__, pMailbox->u.in.uTargetDeviceStatus));
1066	Log(("%s: uCompletionCode=%u\n", __FUNCTION__, pMailbox->u.in.uCompletionCode));
1067	}
1068	}
1069
1070	/**
1071	* Dumps the content of a command control block for debugging purposes.
1072	*
1073	* @returns nothing.
1074	* @param pCCB Pointer to the command control block to dump.
1075	*/
1076	static void buslogicDumpCCBInfo(PCommandControlBlock pCCB)
1077	{
1078	Log(("%s: Dump for Command Control Block:\n", __FUNCTION__));
1079	Log(("%s: uOpCode=%#x\n", __FUNCTION__, pCCB->uOpcode));
1080	Log(("%s: uDataDirection=%u\n", __FUNCTION__, pCCB->uDataDirection));
1081	Log(("%s: fTagQueued=%d\n", __FUNCTION__, pCCB->fTagQueued));
1082	Log(("%s: uQueueTag=%u\n", __FUNCTION__, pCCB->uQueueTag));
1083	Log(("%s: cbCDB=%u\n", __FUNCTION__, pCCB->cbCDB));
1084	Log(("%s: cbSenseData=%u\n", __FUNCTION__, pCCB->cbSenseData));
1085	Log(("%s: cbData=%u\n", __FUNCTION__, pCCB->cbData));
1086	Log(("%s: u32PhysAddrData=%#x\n", __FUNCTION__, pCCB->u32PhysAddrData));
1087	Log(("%s: uHostAdapterStatus=%u\n", __FUNCTION__, pCCB->uHostAdapterStatus));
1088	Log(("%s: uDeviceStatus=%u\n", __FUNCTION__, pCCB->uDeviceStatus));
1089	Log(("%s: uTargetId=%u\n", __FUNCTION__, pCCB->uTargetId));
1090	Log(("%s: uLogicalUnit=%u\n", __FUNCTION__, pCCB->uLogicalUnit));
1091	Log(("%s: fLegacyTagEnable=%u\n", __FUNCTION__, pCCB->fLegacyTagEnable));
1092	Log(("%s: uLegacyQueueTag=%u\n", __FUNCTION__, pCCB->uLegacyQueueTag));
1093	Log(("%s: uCDB[0]=%#x\n", __FUNCTION__, pCCB->aCDB[0]));
1094	for (int i = 1; i < pCCB->cbCDB; i++)
1095	Log(("%s: uCDB[%d]=%u\n", __FUNCTION__, i, pCCB->aCDB[i]));
1096	Log(("%s: u32PhysAddrSenseData=%#x\n", __FUNCTION__, pCCB->u32PhysAddrSenseData));
1097	}
1098	#endif
1099
1100	/**
1101	* Allocate data buffer.
1102	*
1103	* @returns VBox status code.
1104	* @param pTaskState Pointer to the task state.
1105	*/
1106	static int buslogicDataBufferAlloc(PBUSLOGICTASKSTATE pTaskState)
1107	{
1108	PPDMDEVINS pDevIns = pTaskState->CTX_SUFF(pTargetDevice)->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns);
1109
1110	if ( (pTaskState->CommandControlBlockGuest.uDataDirection != BUSLOGIC_CCB_DIRECTION_NO_DATA)
1111	&& (pTaskState->CommandControlBlockGuest.cbData > 0))
1112	{
1113	/*
1114	* @todo: Check following assumption and what residual means.
1115	*
1116	* The BusLogic adapter can handle two different data buffer formats.
1117	* The first one is that the data pointer entry in the CCB points to
1118	* the buffer directly. In second mode the data pointer points to a
1119	* scatter gather list which describes the buffer.
1120	*/
1121	if ( (pTaskState->CommandControlBlockGuest.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_SCATTER_GATHER)
1122	\|\| (pTaskState->CommandControlBlockGuest.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_SCATTER_GATHER))
1123	{
1124	uint32_t cScatterGatherGCRead;
1125	uint32_t iScatterGatherEntry;
1126	ScatterGatherEntry aScatterGatherReadGC[32]; /* Number of scatter gather list entries read from guest memory. */
1127	uint32_t cScatterGatherGCLeft = pTaskState->CommandControlBlockGuest.cbData / sizeof(ScatterGatherEntry);
1128	RTGCPHYS GCPhysAddrScatterGatherCurrent = (RTGCPHYS)pTaskState->CommandControlBlockGuest.u32PhysAddrData;
1129	size_t cbDataToTransfer = 0;
1130
1131	/* Count number of bytes to transfer. */
1132	do
1133	{
1134	cScatterGatherGCRead = (cScatterGatherGCLeft < RT_ELEMENTS(aScatterGatherReadGC))
1135	? cScatterGatherGCLeft
1136	: RT_ELEMENTS(aScatterGatherReadGC);
1137	cScatterGatherGCLeft -= cScatterGatherGCRead;
1138
1139	/* Read the SG entries. */
1140	PDMDevHlpPhysRead(pDevIns, GCPhysAddrScatterGatherCurrent, &aScatterGatherReadGC[0],
1141	cScatterGatherGCRead * sizeof(ScatterGatherEntry));
1142
1143	for (iScatterGatherEntry = 0; iScatterGatherEntry < cScatterGatherGCRead; iScatterGatherEntry++)
1144	{
1145	RTGCPHYS GCPhysAddrDataBase;
1146
1147	Log(("%s: iScatterGatherEntry=%u\n", __FUNCTION__, iScatterGatherEntry));
1148
1149	GCPhysAddrDataBase = (RTGCPHYS)aScatterGatherReadGC[iScatterGatherEntry].u32PhysAddrSegmentBase;
1150	cbDataToTransfer += aScatterGatherReadGC[iScatterGatherEntry].cbSegment;
1151
1152	Log(("%s: GCPhysAddrDataBase=%RGp cbDataToTransfer=%u\n",
1153	__FUNCTION__, GCPhysAddrDataBase,
1154	aScatterGatherReadGC[iScatterGatherEntry].cbSegment));
1155	}
1156
1157	/* Set address to the next entries to read. */
1158	GCPhysAddrScatterGatherCurrent += cScatterGatherGCRead * sizeof(ScatterGatherEntry);
1159	} while (cScatterGatherGCLeft > 0);
1160
1161	Log(("%s: cbDataToTransfer=%d\n", __FUNCTION__, cbDataToTransfer));
1162
1163	/* Allocate buffer */
1164	pTaskState->DataSeg.cbSeg = cbDataToTransfer;
1165	pTaskState->DataSeg.pvSeg = RTMemAlloc(pTaskState->DataSeg.cbSeg);
1166	if (!pTaskState->DataSeg.pvSeg)
1167	return VERR_NO_MEMORY;
1168
1169	/* Copy the data if needed */
1170	if (pTaskState->CommandControlBlockGuest.uDataDirection == BUSLOGIC_CCB_DIRECTION_OUT)
1171	{
1172	cScatterGatherGCLeft = pTaskState->CommandControlBlockGuest.cbData / sizeof(ScatterGatherEntry);
1173	GCPhysAddrScatterGatherCurrent = (RTGCPHYS)pTaskState->CommandControlBlockGuest.u32PhysAddrData;
1174	uint8_t pbData = (uint8_t )pTaskState->DataSeg.pvSeg;
1175
1176	do
1177	{
1178	cScatterGatherGCRead = (cScatterGatherGCLeft < RT_ELEMENTS(aScatterGatherReadGC))
1179	? cScatterGatherGCLeft
1180	: RT_ELEMENTS(aScatterGatherReadGC);
1181	cScatterGatherGCLeft -= cScatterGatherGCRead;
1182
1183	/* Read the SG entries. */
1184	PDMDevHlpPhysRead(pDevIns, GCPhysAddrScatterGatherCurrent, &aScatterGatherReadGC[0],
1185	cScatterGatherGCRead * sizeof(ScatterGatherEntry));
1186
1187	for (iScatterGatherEntry = 0; iScatterGatherEntry < cScatterGatherGCRead; iScatterGatherEntry++)
1188	{
1189	RTGCPHYS GCPhysAddrDataBase;
1190
1191	Log(("%s: iScatterGatherEntry=%u\n", __FUNCTION__, iScatterGatherEntry));
1192
1193	GCPhysAddrDataBase = (RTGCPHYS)aScatterGatherReadGC[iScatterGatherEntry].u32PhysAddrSegmentBase;
1194	cbDataToTransfer = aScatterGatherReadGC[iScatterGatherEntry].cbSegment;
1195
1196	Log(("%s: GCPhysAddrDataBase=%RGp cbDataToTransfer=%u\n", __FUNCTION__, GCPhysAddrDataBase, cbDataToTransfer));
1197
1198	PDMDevHlpPhysRead(pDevIns, GCPhysAddrDataBase, pbData, cbDataToTransfer);
1199	pbData += cbDataToTransfer;
1200	}
1201
1202	/* Set address to the next entries to read. */
1203	GCPhysAddrScatterGatherCurrent += cScatterGatherGCRead * sizeof(ScatterGatherEntry);
1204	} while (cScatterGatherGCLeft > 0);
1205	}
1206
1207	}
1208	else if ( pTaskState->CommandControlBlockGuest.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB
1209	\|\| pTaskState->CommandControlBlockGuest.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_DATA_LENGTH)
1210	{
1211	/* The buffer is not scattered. */
1212	RTGCPHYS GCPhysAddrDataBase = (RTGCPHYS)pTaskState->CommandControlBlockGuest.u32PhysAddrData;
1213
1214	AssertMsg(GCPhysAddrDataBase != 0, ("Physical address is 0\n"));
1215
1216	pTaskState->DataSeg.cbSeg = pTaskState->CommandControlBlockGuest.cbData;
1217	pTaskState->DataSeg.pvSeg = RTMemAlloc(pTaskState->DataSeg.cbSeg);
1218	if (!pTaskState->DataSeg.pvSeg)
1219	return VERR_NO_MEMORY;
1220
1221	Log(("Non scattered buffer:\n"));
1222	Log(("u32PhysAddrData=%#x\n", pTaskState->CommandControlBlockGuest.u32PhysAddrData));
1223	Log(("cbData=%u\n", pTaskState->CommandControlBlockGuest.cbData));
1224	Log(("GCPhysAddrDataBase=0x%RGp\n", GCPhysAddrDataBase));
1225
1226	/* Copy the data into the buffer. */
1227	PDMDevHlpPhysRead(pDevIns, GCPhysAddrDataBase, pTaskState->DataSeg.pvSeg, pTaskState->DataSeg.cbSeg);
1228	}
1229	}
1230
1231	return VINF_SUCCESS;
1232	}
1233
1234	/**
1235	* Free allocated resources used for the scatter gather list.
1236	*
1237	* @returns nothing.
1238	* @param pTaskState Pointer to the task state.
1239	*/
1240	static void buslogicDataBufferFree(PBUSLOGICTASKSTATE pTaskState)
1241	{
1242	PPDMDEVINS pDevIns = pTaskState->CTX_SUFF(pTargetDevice)->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns);
1243
1244	if ( (pTaskState->CommandControlBlockGuest.cbData > 0)
1245	&& ( (pTaskState->CommandControlBlockGuest.uDataDirection == BUSLOGIC_CCB_DIRECTION_IN)
1246	\|\| (pTaskState->CommandControlBlockGuest.uDataDirection == BUSLOGIC_CCB_DIRECTION_UNKNOWN)))
1247	{
1248	if ( (pTaskState->CommandControlBlockGuest.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_SCATTER_GATHER)
1249	\|\| (pTaskState->CommandControlBlockGuest.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_SCATTER_GATHER))
1250	{
1251	uint32_t cScatterGatherGCRead;
1252	uint32_t iScatterGatherEntry;
1253	ScatterGatherEntry aScatterGatherReadGC[32]; /* Number of scatter gather list entries read from guest memory. */
1254	uint32_t cScatterGatherGCLeft = pTaskState->CommandControlBlockGuest.cbData / sizeof(ScatterGatherEntry);
1255	RTGCPHYS GCPhysAddrScatterGatherCurrent = (RTGCPHYS)pTaskState->CommandControlBlockGuest.u32PhysAddrData;
1256	uint8_t pbData = (uint8_t )pTaskState->DataSeg.pvSeg;
1257
1258	do
1259	{
1260	cScatterGatherGCRead = (cScatterGatherGCLeft < RT_ELEMENTS(aScatterGatherReadGC))
1261	? cScatterGatherGCLeft
1262	: RT_ELEMENTS(aScatterGatherReadGC);
1263	cScatterGatherGCLeft -= cScatterGatherGCRead;
1264
1265	/* Read the SG entries. */
1266	PDMDevHlpPhysRead(pDevIns, GCPhysAddrScatterGatherCurrent, &aScatterGatherReadGC[0],
1267	cScatterGatherGCRead * sizeof(ScatterGatherEntry));
1268
1269	for (iScatterGatherEntry = 0; iScatterGatherEntry < cScatterGatherGCRead; iScatterGatherEntry++)
1270	{
1271	RTGCPHYS GCPhysAddrDataBase;
1272	size_t cbDataToTransfer;
1273
1274	Log(("%s: iScatterGatherEntry=%u\n", __FUNCTION__, iScatterGatherEntry));
1275
1276	GCPhysAddrDataBase = (RTGCPHYS)aScatterGatherReadGC[iScatterGatherEntry].u32PhysAddrSegmentBase;
1277	cbDataToTransfer = aScatterGatherReadGC[iScatterGatherEntry].cbSegment;
1278
1279	Log(("%s: GCPhysAddrDataBase=%RGp cbDataToTransfer=%u\n", __FUNCTION__, GCPhysAddrDataBase, cbDataToTransfer));
1280
1281	PDMDevHlpPhysWrite(pDevIns, GCPhysAddrDataBase, pbData, cbDataToTransfer);
1282	pbData += cbDataToTransfer;
1283	}
1284
1285	/* Set address to the next entries to read. */
1286	GCPhysAddrScatterGatherCurrent += cScatterGatherGCRead * sizeof(ScatterGatherEntry);
1287	} while (cScatterGatherGCLeft > 0);
1288
1289	}
1290	else if ( pTaskState->CommandControlBlockGuest.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB
1291	\|\| pTaskState->CommandControlBlockGuest.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_DATA_LENGTH)
1292	{
1293	/* The buffer is not scattered. */
1294	RTGCPHYS GCPhysAddrDataBase = (RTGCPHYS)pTaskState->CommandControlBlockGuest.u32PhysAddrData;
1295
1296	AssertMsg(GCPhysAddrDataBase != 0, ("Physical address is 0\n"));
1297
1298	Log(("Non scattered buffer:\n"));
1299	Log(("u32PhysAddrData=%#x\n", pTaskState->CommandControlBlockGuest.u32PhysAddrData));
1300	Log(("cbData=%u\n", pTaskState->CommandControlBlockGuest.cbData));
1301	Log(("GCPhysAddrDataBase=0x%RGp\n", GCPhysAddrDataBase));
1302
1303	/* Copy the data into the guest memory. */
1304	PDMDevHlpPhysWrite(pDevIns, GCPhysAddrDataBase, pTaskState->DataSeg.pvSeg, pTaskState->DataSeg.cbSeg);
1305	}
1306	}
1307
1308	RTMemFree(pTaskState->DataSeg.pvSeg);
1309	pTaskState->DataSeg.pvSeg = NULL;
1310	pTaskState->DataSeg.cbSeg = 0;
1311	}
1312
1313	/* Convert sense buffer length taking into account shortcut values. */
1314	static uint32_t buslogicConvertSenseBufferLength(uint32_t cbSense)
1315	{
1316	/* Convert special sense buffer length values. */
1317	if (cbSense == 0)
1318	cbSense = 14; /* 0 means standard 14-byte buffer. */
1319	else if (cbSense == 1)
1320	cbSense = 0; /* 1 means no sense data. */
1321	else if (cbSense < 8)
1322	AssertMsgFailed(("Reserved cbSense value of %d used!\n", cbSense));
1323
1324	return cbSense;
1325	}
1326
1327	/**
1328	* Free the sense buffer.
1329	*
1330	* @returns nothing.
1331	* @param pTaskState Pointer to the task state.
1332	* @param fCopy If sense data should be copied to guest memory.
1333	*/
1334	static void buslogicSenseBufferFree(PBUSLOGICTASKSTATE pTaskState, bool fCopy)
1335	{
1336	uint32_t cbSenseBuffer;
1337
1338	cbSenseBuffer = buslogicConvertSenseBufferLength(pTaskState->CommandControlBlockGuest.cbSenseData);
1339
1340	/* Copy the sense buffer into guest memory if requested. */
1341	if (fCopy && cbSenseBuffer)
1342	{
1343	PPDMDEVINS pDevIns = pTaskState->CTX_SUFF(pTargetDevice)->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns);
1344	RTGCPHYS GCPhysAddrSenseBuffer = (RTGCPHYS)pTaskState->CommandControlBlockGuest.u32PhysAddrSenseData;
1345
1346	PDMDevHlpPhysWrite(pDevIns, GCPhysAddrSenseBuffer, pTaskState->pbSenseBuffer, cbSenseBuffer);
1347	}
1348
1349	RTMemFree(pTaskState->pbSenseBuffer);
1350	pTaskState->pbSenseBuffer = NULL;
1351	}
1352
1353	/**
1354	* Alloc the sense buffer.
1355	*
1356	* @returns VBox status code.
1357	* @param pTaskState Pointer to the task state.
1358	* @note Current assumption is that the sense buffer is not scattered and does not cross a page boundary.
1359	*/
1360	static int buslogicSenseBufferAlloc(PBUSLOGICTASKSTATE pTaskState)
1361	{
1362	PPDMDEVINS pDevIns = pTaskState->CTX_SUFF(pTargetDevice)->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns);
1363	uint32_t cbSenseBuffer;
1364
1365	pTaskState->pbSenseBuffer = NULL;
1366
1367	cbSenseBuffer = buslogicConvertSenseBufferLength(pTaskState->CommandControlBlockGuest.cbSenseData);
1368	if (cbSenseBuffer)
1369	{
1370	pTaskState->pbSenseBuffer = (uint8_t *)RTMemAllocZ(cbSenseBuffer);
1371	if (!pTaskState->pbSenseBuffer)
1372	return VERR_NO_MEMORY;
1373	}
1374
1375	return VINF_SUCCESS;
1376	}
1377	#endif /* IN_RING3 */
1378
1379	/**
1380	* Parses the command buffer and executes it.
1381	*
1382	* @returns VBox status code.
1383	* @param pBusLogic Pointer to the BusLogic device instance.
1384	*/
1385	static int buslogicProcessCommand(PBUSLOGIC pBusLogic)
1386	{
1387	int rc = VINF_SUCCESS;
1388	bool fSuppressIrq = false;
1389
1390	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
1391	AssertMsg(pBusLogic->uOperationCode != 0xff, ("There is no command to execute\n"));
1392
1393	switch (pBusLogic->uOperationCode)
1394	{
1395	case BUSLOGICCOMMAND_TEST_CMDC_INTERRUPT:
1396	/* Valid command, no reply. */
1397	pBusLogic->cbReplyParametersLeft = 0;
1398	break;
1399	case BUSLOGICCOMMAND_INQUIRE_PCI_HOST_ADAPTER_INFORMATION:
1400	{
1401	PReplyInquirePCIHostAdapterInformation pReply = (PReplyInquirePCIHostAdapterInformation)pBusLogic->aReplyBuffer;
1402	memset(pReply, 0, sizeof(ReplyInquirePCIHostAdapterInformation));
1403
1404	/* It seems VMware does not provide valid information here too, lets do the same :) */
1405	pReply->InformationIsValid = 0;
1406	pReply->IsaIOPort = pBusLogic->uISABaseCode;
1407	pReply->IRQ = PCIDevGetInterruptLine(&pBusLogic->dev);
1408	pBusLogic->cbReplyParametersLeft = sizeof(ReplyInquirePCIHostAdapterInformation);
1409	break;
1410	}
1411	case BUSLOGICCOMMAND_MODIFY_IO_ADDRESS:
1412	{
1413	/* Modify the ISA-compatible I/O port base. Note that this technically
1414	* violates the PCI spec, as this address is not reported through PCI.
1415	* However, it is required for compatibility with old drivers.
1416	*/
1417	#ifdef IN_RING3
1418	Log(("ISA I/O for PCI (code %x)\n", pBusLogic->aCommandBuffer[0]));
1419	buslogicRegisterISARange(pBusLogic, pBusLogic->aCommandBuffer[0]);
1420	pBusLogic->cbReplyParametersLeft = 0;
1421	fSuppressIrq = true;
1422	break;
1423	#else
1424	AssertMsgFailed(("Must never get here!\n"));
1425	#endif
1426	}
1427	case BUSLOGICCOMMAND_INQUIRE_BOARD_ID:
1428	{
1429	/* The special option byte is important: If it is '0' or 'B', Windows NT drivers
1430	* for Adaptec AHA-154x may claim the adapter. The BusLogic drivers will claim
1431	* the adapter only when the byte is not '0' or 'B'.
1432	*/
1433	pBusLogic->aReplyBuffer[0] = 'A'; /* Firmware option bytes */
1434	pBusLogic->aReplyBuffer[1] = 'A'; /* Special option byte */
1435
1436	/* We report version 5.07B. This reply will provide the first two digits. */
1437	pBusLogic->aReplyBuffer[2] = '5'; /* Major version 5 */
1438	pBusLogic->aReplyBuffer[3] = '0'; /* Minor version 0 */
1439	pBusLogic->cbReplyParametersLeft = 4; /* Reply is 4 bytes long */
1440	break;
1441	}
1442	case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_3RD_LETTER:
1443	{
1444	pBusLogic->aReplyBuffer[0] = '7';
1445	pBusLogic->cbReplyParametersLeft = 1;
1446	break;
1447	}
1448	case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_LETTER:
1449	{
1450	pBusLogic->aReplyBuffer[0] = 'B';
1451	pBusLogic->cbReplyParametersLeft = 1;
1452	break;
1453	}
1454	case BUSLOGICCOMMAND_SET_ADAPTER_OPTIONS:
1455	/* The parameter list length is determined by the first byte of the command buffer. */
1456	if (pBusLogic->iParameter == 1)
1457	{
1458	/* First pass - set the number of following parameter bytes. */
1459	pBusLogic->cbCommandParametersLeft = pBusLogic->aCommandBuffer[0];
1460	Log(("Set HA options: %u bytes follow\n", pBusLogic->cbCommandParametersLeft));
1461	}
1462	else
1463	{
1464	/* Second pass - process received data. */
1465	Log(("Set HA options: received %u bytes\n", pBusLogic->aCommandBuffer[0]));
1466	/* We ignore the data - it only concerns the SCSI hardware protocol. */
1467	}
1468	pBusLogic->cbReplyParametersLeft = 0;
1469	break;
1470
1471	case BUSLOGICCOMMAND_INQUIRE_HOST_ADAPTER_MODEL_NUMBER:
1472	{
1473	/* The reply length is set by the guest and is found in the first byte of the command buffer. */
1474	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
1475	memset(pBusLogic->aReplyBuffer, ' ', pBusLogic->cbReplyParametersLeft);
1476	const char aModelName[] = "958";
1477	int cCharsToTransfer = (pBusLogic->cbReplyParametersLeft <= (sizeof(aModelName) - 1))
1478	? pBusLogic->cbReplyParametersLeft
1479	: sizeof(aModelName) - 1;
1480
1481	for (int i = 0; i < cCharsToTransfer; i++)
1482	pBusLogic->aReplyBuffer[i] = aModelName[i];
1483
1484	break;
1485	}
1486	case BUSLOGICCOMMAND_INQUIRE_CONFIGURATION:
1487	{
1488	uint8_t uPciIrq = PCIDevGetInterruptLine(&pBusLogic->dev);
1489
1490	pBusLogic->cbReplyParametersLeft = sizeof(ReplyInquireConfiguration);
1491	PReplyInquireConfiguration pReply = (PReplyInquireConfiguration)pBusLogic->aReplyBuffer;
1492	memset(pReply, 0, sizeof(ReplyInquireConfiguration));
1493
1494	pReply->uHostAdapterId = 7; /* The controller has always 7 as ID. */
1495	pReply->fDmaChannel6 = 1; /* DMA channel 6 is a good default. */
1496	/* The PCI IRQ is not necessarily representable in this structure.
1497	* If that is the case, the guest likely won't function correctly,
1498	* therefore we log a warning.
1499	*/
1500	switch (uPciIrq) {
1501	case 9: pReply->fIrqChannel9 = 1; break;
1502	case 10: pReply->fIrqChannel10 = 1; break;
1503	case 11: pReply->fIrqChannel11 = 1; break;
1504	case 12: pReply->fIrqChannel12 = 1; break;
1505	case 14: pReply->fIrqChannel14 = 1; break;
1506	case 15: pReply->fIrqChannel15 = 1; break;
1507	default:
1508	LogRel(("Warning: PCI IRQ %d cannot be represented as ISA!\n", uPciIrq));
1509	break;
1510	}
1511	break;
1512	}
1513	case BUSLOGICCOMMAND_INQUIRE_EXTENDED_SETUP_INFORMATION:
1514	{
1515	/* Some Adaptec AHA-154x drivers (e.g. OS/2) execute this command and expect
1516	* it to fail. If it succeeds, the drivers refuse to load. However, some newer
1517	* Adaptec 154x models supposedly support it too??
1518	*/
1519
1520	/* The reply length is set by the guest and is found in the first byte of the command buffer. */
1521	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
1522	PReplyInquireExtendedSetupInformation pReply = (PReplyInquireExtendedSetupInformation)pBusLogic->aReplyBuffer;
1523	memset(pReply, 0, sizeof(ReplyInquireExtendedSetupInformation));
1524
1525	//@todo: should this reflect the RAM contents (AutoSCSIRam)?
1526	pReply->uBusType = 'E'; /* EISA style */
1527	pReply->u16ScatterGatherLimit = 8192;
1528	pReply->cMailbox = pBusLogic->cMailbox;
1529	pReply->uMailboxAddressBase = (uint32_t)pBusLogic->GCPhysAddrMailboxOutgoingBase;
1530	pReply->fLevelSensitiveInterrupt = true;
1531	pReply->fHostWideSCSI = true;
1532	pReply->fHostUltraSCSI = true;
1533	memcpy(pReply->aFirmwareRevision, "07B", sizeof(pReply->aFirmwareRevision));
1534
1535	break;
1536	}
1537	case BUSLOGICCOMMAND_INQUIRE_SETUP_INFORMATION:
1538	{
1539	/* The reply length is set by the guest and is found in the first byte of the command buffer. */
1540	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
1541	PReplyInquireSetupInformation pReply = (PReplyInquireSetupInformation)pBusLogic->aReplyBuffer;
1542	memset(pReply, 0, sizeof(ReplyInquireSetupInformation));
1543	pReply->fSynchronousInitiationEnabled = true;
1544	pReply->fParityCheckingEnabled = true;
1545	pReply->cMailbox = pBusLogic->cMailbox;
1546	pReply->uSignature = 'B';
1547	/* The 'D' signature prevents Adaptec's OS/2 drivers from getting too
1548	* friendly with BusLogic hardware and upsetting the HBA state.
1549	*/
1550	pReply->uCharacterD = 'D'; /* BusLogic model. */
1551	pReply->uHostBusType = 'F'; /* PCI bus. */
1552	break;
1553	}
1554	case BUSLOGICCOMMAND_FETCH_HOST_ADAPTER_LOCAL_RAM:
1555	{
1556	/*
1557	* First element in the command buffer contains start offset to read from
1558	* and second one the number of bytes to read.
1559	*/
1560	uint8_t uOffset = pBusLogic->aCommandBuffer[0];
1561	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[1];
1562
1563	pBusLogic->fUseLocalRam = true;
1564	pBusLogic->iReply = uOffset;
1565	break;
1566	}
1567	case BUSLOGICCOMMAND_INITIALIZE_EXTENDED_MAILBOX:
1568	{
1569	PRequestInitializeExtendedMailbox pRequest = (PRequestInitializeExtendedMailbox)pBusLogic->aCommandBuffer;
1570
1571	pBusLogic->cMailbox = pRequest->cMailbox;
1572	pBusLogic->GCPhysAddrMailboxOutgoingBase = (RTGCPHYS)pRequest->uMailboxBaseAddress;
1573	/* The area for incoming mailboxes is right after the last entry of outgoing mailboxes. */
1574	pBusLogic->GCPhysAddrMailboxIncomingBase = (RTGCPHYS)pRequest->uMailboxBaseAddress + (pBusLogic->cMailbox * sizeof(Mailbox));
1575
1576	Log(("GCPhysAddrMailboxOutgoingBase=%RGp\n", pBusLogic->GCPhysAddrMailboxOutgoingBase));
1577	Log(("GCPhysAddrMailboxIncomingBase=%RGp\n", pBusLogic->GCPhysAddrMailboxIncomingBase));
1578	Log(("cMailboxes=%u (32-bit mode)\n", pBusLogic->cMailbox));
1579	LogRel(("Initialized 32-bit mailbox, %d entries at %08x\n", pRequest->cMailbox, pRequest->uMailboxBaseAddress));
1580
1581	pBusLogic->regStatus &= ~BUSLOGIC_REGISTER_STATUS_INITIALIZATION_REQUIRED;
1582	pBusLogic->cbReplyParametersLeft = 0;
1583	break;
1584	}
1585	case BUSLOGICCOMMAND_ENABLE_STRICT_ROUND_ROBIN_MODE:
1586	{
1587	if (pBusLogic->aCommandBuffer[0] == 0)
1588	pBusLogic->fStrictRoundRobinMode = false;
1589	else if (pBusLogic->aCommandBuffer[0] == 1)
1590	pBusLogic->fStrictRoundRobinMode = true;
1591	else
1592	AssertMsgFailed(("Invalid round robin mode %d\n", pBusLogic->aCommandBuffer[0]));
1593
1594	pBusLogic->cbReplyParametersLeft = 0;
1595	break;
1596	}
1597	case BUSLOGICCOMMAND_SET_CCB_FORMAT:
1598	{
1599	if (pBusLogic->aCommandBuffer[0] == 0)
1600	pBusLogic->fExtendedLunCCBFormat = false;
1601	else if (pBusLogic->aCommandBuffer[0] == 1)
1602	pBusLogic->fExtendedLunCCBFormat = true;
1603	else
1604	AssertMsgFailed(("Invalid CCB format %d\n", pBusLogic->aCommandBuffer[0]));
1605
1606	pBusLogic->cbReplyParametersLeft = 0;
1607	break;
1608	}
1609	case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_0_TO_7:
1610	/* This is supposed to send TEST UNIT READY to each target/LUN.
1611	* We cheat and skip that, since we already know what's attached
1612	*/
1613	memset(pBusLogic->aReplyBuffer, 0, 8);
1614	for (int i = 0; i < 8; ++i)
1615	{
1616	if (pBusLogic->aDeviceStates[i].fPresent)
1617	pBusLogic->aReplyBuffer[i] = 1;
1618	}
1619	pBusLogic->aReplyBuffer[7] = 0; /* HA hardcoded at ID 7. */
1620	pBusLogic->cbReplyParametersLeft = 8;
1621	break;
1622	case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_8_TO_15:
1623	/* See note about cheating above. */
1624	memset(pBusLogic->aReplyBuffer, 0, 8);
1625	for (int i = 0; i < 8; ++i)
1626	{
1627	if (pBusLogic->aDeviceStates[i + 8].fPresent)
1628	pBusLogic->aReplyBuffer[i] = 1;
1629	}
1630	pBusLogic->cbReplyParametersLeft = 8;
1631	break;
1632	case BUSLOGICCOMMAND_INQUIRE_TARGET_DEVICES:
1633	{
1634	/* Each bit which is set in the 16bit wide variable means a present device. */
1635	uint16_t u16TargetsPresentMask = 0;
1636
1637	for (uint8_t i = 0; i < RT_ELEMENTS(pBusLogic->aDeviceStates); i++)
1638	{
1639	if (pBusLogic->aDeviceStates[i].fPresent)
1640	u16TargetsPresentMask \|= (1 << i);
1641	}
1642	pBusLogic->aReplyBuffer[0] = (uint8_t)u16TargetsPresentMask;
1643	pBusLogic->aReplyBuffer[1] = (uint8_t)(u16TargetsPresentMask >> 8);
1644	pBusLogic->cbReplyParametersLeft = 2;
1645	break;
1646	}
1647	case BUSLOGICCOMMAND_INQUIRE_SYNCHRONOUS_PERIOD:
1648	{
1649	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
1650
1651	for (uint8_t i = 0; i < pBusLogic->cbReplyParametersLeft; i++)
1652	pBusLogic->aReplyBuffer[i] = 0; /* @todo Figure if we need something other here. It's not needed for the linux driver */
1653
1654	break;
1655	}
1656	case BUSLOGICCOMMAND_DISABLE_HOST_ADAPTER_INTERRUPT:
1657	{
1658	if (pBusLogic->aCommandBuffer[0] == 0)
1659	pBusLogic->fIRQEnabled = false;
1660	else
1661	pBusLogic->fIRQEnabled = true;
1662	/* No interrupt signaled regardless of enable/disable. */
1663	fSuppressIrq = true;
1664	break;
1665	}
1666	case BUSLOGICCOMMAND_ECHO_COMMAND_DATA:
1667	{
1668	pBusLogic->aReplyBuffer[0] = pBusLogic->aCommandBuffer[0];
1669	pBusLogic->cbReplyParametersLeft = 1;
1670	break;
1671	}
1672	case BUSLOGICCOMMAND_SET_PREEMPT_TIME_ON_BUS:
1673	{
1674	pBusLogic->cbReplyParametersLeft = 0;
1675	pBusLogic->LocalRam.structured.autoSCSIData.uBusOnDelay = pBusLogic->aCommandBuffer[0];
1676	Log(("Bus-on time: %d\n", pBusLogic->aCommandBuffer[0]));
1677	break;
1678	}
1679	case BUSLOGICCOMMAND_SET_TIME_OFF_BUS:
1680	{
1681	pBusLogic->cbReplyParametersLeft = 0;
1682	pBusLogic->LocalRam.structured.autoSCSIData.uBusOffDelay = pBusLogic->aCommandBuffer[0];
1683	Log(("Bus-off time: %d\n", pBusLogic->aCommandBuffer[0]));
1684	break;
1685	}
1686	case BUSLOGICCOMMAND_SET_BUS_TRANSFER_RATE:
1687	{
1688	pBusLogic->cbReplyParametersLeft = 0;
1689	pBusLogic->LocalRam.structured.autoSCSIData.uDMATransferRate = pBusLogic->aCommandBuffer[0];
1690	Log(("Bus transfer rate: %02X\n", pBusLogic->aCommandBuffer[0]));
1691	break;
1692	}
1693	default:
1694	AssertMsgFailed(("Invalid command %#x\n", pBusLogic->uOperationCode));
1695	case BUSLOGICCOMMAND_EXT_BIOS_INFO:
1696	case BUSLOGICCOMMAND_UNLOCK_MAILBOX:
1697	/* Commands valid for Adaptec 154xC which we don't handle since
1698	* we pretend being 154xB compatible. Just mark the command as invalid.
1699	*/
1700	Log(("Command %#x not valid for this adapter\n", pBusLogic->uOperationCode));
1701	pBusLogic->cbReplyParametersLeft = 0;
1702	pBusLogic->regStatus \|= BUSLOGIC_REGISTER_STATUS_COMMAND_INVALID;
1703	break;
1704	case BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND: /* Should be handled already. */
1705	AssertMsgFailed(("Invalid mailbox execute state!\n"));
1706	}
1707
1708	Log(("uOperationCode=%#x, cbReplyParametersLeft=%d\n", pBusLogic->uOperationCode, pBusLogic->cbReplyParametersLeft));
1709
1710	/* Set the data in ready bit in the status register in case the command has a reply. */
1711	if (pBusLogic->cbReplyParametersLeft)
1712	pBusLogic->regStatus \|= BUSLOGIC_REGISTER_STATUS_DATA_IN_REGISTER_READY;
1713	else if (!pBusLogic->cbCommandParametersLeft)
1714	buslogicCommandComplete(pBusLogic, fSuppressIrq);
1715
1716	return rc;
1717	}
1718
1719	/**
1720	* Read a register from the BusLogic adapter.
1721	*
1722	* @returns VBox status code.
1723	* @param pBusLogic Pointer to the BusLogic instance data.
1724	* @param iRegister The index of the register to read.
1725	* @param pu32 Where to store the register content.
1726	*/
1727	static int buslogicRegisterRead(PBUSLOGIC pBusLogic, unsigned iRegister, uint32_t *pu32)
1728	{
1729	int rc = VINF_SUCCESS;
1730
1731	switch (iRegister)
1732	{
1733	case BUSLOGIC_REGISTER_STATUS:
1734	{
1735	*pu32 = pBusLogic->regStatus;
1736
1737	/* If the diagnostic active bit is set, we are in a guest-initiated
1738	* hard reset. If the guest reads the status register and waits for
1739	* the host adapter ready bit to be set, we terminate the reset right
1740	* away. However, guests may also expect the reset condition to clear
1741	* automatically after a period of time, in which case we can't show
1742	* the DIAG bit at all.
1743	*/
1744	if (pBusLogic->regStatus & BUSLOGIC_REGISTER_STATUS_DIAGNOSTIC_ACTIVE)
1745	{
1746	uint64_t u64AccessTime = PDMDevHlpTMTimeVirtGetNano(pBusLogic->CTX_SUFF(pDevIns));
1747
1748	pBusLogic->regStatus &= ~BUSLOGIC_REGISTER_STATUS_DIAGNOSTIC_ACTIVE;
1749	pBusLogic->regStatus \|= BUSLOGIC_REGISTER_STATUS_HOST_ADAPTER_READY;
1750
1751	if (u64AccessTime - pBusLogic->u64ResetTime > BUSLOGIC_RESET_DURATION_NS)
1752	{
1753	/* If reset already expired, let the guest see that right away. */
1754	*pu32 = pBusLogic->regStatus;
1755	pBusLogic->u64ResetTime = 0;
1756	}
1757	}
1758	break;
1759	}
1760	case BUSLOGIC_REGISTER_DATAIN:
1761	{
1762	if (pBusLogic->fUseLocalRam)
1763	*pu32 = pBusLogic->LocalRam.u8View[pBusLogic->iReply];
1764	else
1765	*pu32 = pBusLogic->aReplyBuffer[pBusLogic->iReply];
1766
1767	/* Careful about underflow - guest can read data register even if
1768	* no data is available.
1769	*/
1770	if (pBusLogic->cbReplyParametersLeft)
1771	{
1772	pBusLogic->iReply++;
1773	pBusLogic->cbReplyParametersLeft--;
1774	if (!pBusLogic->cbReplyParametersLeft)
1775	{
1776	/*
1777	* Reply finished, set command complete bit, unset data-in ready bit and
1778	* interrupt the guest if enabled.
1779	*/
1780	buslogicCommandComplete(pBusLogic, false);
1781	}
1782	}
1783	LogFlowFunc(("data=%02x, iReply=%d, cbReplyParametersLeft=%u\n", *pu32,
1784	pBusLogic->iReply, pBusLogic->cbReplyParametersLeft));
1785	break;
1786	}
1787	case BUSLOGIC_REGISTER_INTERRUPT:
1788	{
1789	*pu32 = pBusLogic->regInterrupt;
1790	break;
1791	}
1792	case BUSLOGIC_REGISTER_GEOMETRY:
1793	{
1794	*pu32 = pBusLogic->regGeometry;
1795	break;
1796	}
1797	default:
1798	*pu32 = UINT32_C(0xffffffff);
1799	}
1800
1801	Log2(("%s: pu32=%p:{%.*Rhxs} iRegister=%d rc=%Rrc\n",
1802	__FUNCTION__, pu32, 1, pu32, iRegister, rc));
1803
1804	return rc;
1805	}
1806
1807	/**
1808	* Write a value to a register.
1809	*
1810	* @returns VBox status code.
1811	* @param pBusLogic Pointer to the BusLogic instance data.
1812	* @param iRegister The index of the register to read.
1813	* @param uVal The value to write.
1814	*/
1815	static int buslogicRegisterWrite(PBUSLOGIC pBusLogic, unsigned iRegister, uint8_t uVal)
1816	{
1817	int rc = VINF_SUCCESS;
1818
1819	switch (iRegister)
1820	{
1821	case BUSLOGIC_REGISTER_CONTROL:
1822	{
1823	if ((uVal & BUSLOGIC_REGISTER_CONTROL_HARD_RESET) \|\| (uVal & BUSLOGIC_REGISTER_CONTROL_SOFT_RESET))
1824	{
1825	#ifdef IN_RING3
1826	bool fHardReset = !!(uVal & BUSLOGIC_REGISTER_CONTROL_HARD_RESET);
1827
1828	LogRel(("BusLogic: %s reset\n", fHardReset ? "hard" : "soft"));
1829	buslogicInitiateReset(pBusLogic, fHardReset);
1830	#else
1831	rc = VINF_IOM_R3_IOPORT_WRITE;
1832	#endif
1833	break;
1834	}
1835
1836	rc = PDMCritSectEnter(&pBusLogic->CritSectIntr, VINF_IOM_R3_IOPORT_WRITE);
1837	if (rc != VINF_SUCCESS)
1838	return rc;
1839
1840	#ifdef LOG_ENABLED
1841	uint32_t cMailboxesReady = ASMAtomicXchgU32(&pBusLogic->cInMailboxesReady, 0);
1842	Log(("%u incoming mailboxes were ready when this interrupt was cleared\n", cMailboxesReady));
1843	#endif
1844
1845	if (uVal & BUSLOGIC_REGISTER_CONTROL_INTERRUPT_RESET)
1846	buslogicClearInterrupt(pBusLogic);
1847
1848	PDMCritSectLeave(&pBusLogic->CritSectIntr);
1849
1850	break;
1851	}
1852	case BUSLOGIC_REGISTER_COMMAND:
1853	{
1854	/* Fast path for mailbox execution command. */
1855	if ((uVal == BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND) && (pBusLogic->uOperationCode == 0xff))
1856	{
1857	ASMAtomicIncU32(&pBusLogic->cMailboxesReady);
1858	if (!ASMAtomicXchgBool(&pBusLogic->fNotificationSend, true))
1859	{
1860	/* Send new notification to the queue. */
1861	PPDMQUEUEITEMCORE pItem = PDMQueueAlloc(pBusLogic->CTX_SUFF(pNotifierQueue));
1862	AssertMsg(pItem, ("Allocating item for queue failed\n"));
1863	PDMQueueInsert(pBusLogic->CTX_SUFF(pNotifierQueue), (PPDMQUEUEITEMCORE)pItem);
1864	}
1865
1866	return rc;
1867	}
1868
1869	/*
1870	* Check if we are already fetch command parameters from the guest.
1871	* If not we initialize executing a new command.
1872	*/
1873	if (pBusLogic->uOperationCode == 0xff)
1874	{
1875	pBusLogic->uOperationCode = uVal;
1876	pBusLogic->iParameter = 0;
1877
1878	/* Mark host adapter as busy and clear the invalid status bit. */
1879	pBusLogic->regStatus &= ~(BUSLOGIC_REGISTER_STATUS_HOST_ADAPTER_READY \| BUSLOGIC_REGISTER_STATUS_COMMAND_INVALID);
1880
1881	/* Get the number of bytes for parameters from the command code. */
1882	switch (pBusLogic->uOperationCode)
1883	{
1884	case BUSLOGICCOMMAND_TEST_CMDC_INTERRUPT:
1885	case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_LETTER:
1886	case BUSLOGICCOMMAND_INQUIRE_BOARD_ID:
1887	case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_3RD_LETTER:
1888	case BUSLOGICCOMMAND_INQUIRE_PCI_HOST_ADAPTER_INFORMATION:
1889	case BUSLOGICCOMMAND_INQUIRE_CONFIGURATION:
1890	case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_0_TO_7:
1891	case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_8_TO_15:
1892	case BUSLOGICCOMMAND_INQUIRE_TARGET_DEVICES:
1893	pBusLogic->cbCommandParametersLeft = 0;
1894	break;
1895	case BUSLOGICCOMMAND_MODIFY_IO_ADDRESS:
1896	case BUSLOGICCOMMAND_INQUIRE_EXTENDED_SETUP_INFORMATION:
1897	case BUSLOGICCOMMAND_INQUIRE_SETUP_INFORMATION:
1898	case BUSLOGICCOMMAND_INQUIRE_HOST_ADAPTER_MODEL_NUMBER:
1899	case BUSLOGICCOMMAND_ENABLE_STRICT_ROUND_ROBIN_MODE:
1900	case BUSLOGICCOMMAND_SET_CCB_FORMAT:
1901	case BUSLOGICCOMMAND_INQUIRE_SYNCHRONOUS_PERIOD:
1902	case BUSLOGICCOMMAND_DISABLE_HOST_ADAPTER_INTERRUPT:
1903	case BUSLOGICCOMMAND_ECHO_COMMAND_DATA:
1904	case BUSLOGICCOMMAND_SET_PREEMPT_TIME_ON_BUS:
1905	case BUSLOGICCOMMAND_SET_TIME_OFF_BUS:
1906	case BUSLOGICCOMMAND_SET_BUS_TRANSFER_RATE:
1907	pBusLogic->cbCommandParametersLeft = 1;
1908	break;
1909	case BUSLOGICCOMMAND_FETCH_HOST_ADAPTER_LOCAL_RAM:
1910	pBusLogic->cbCommandParametersLeft = 2;
1911	break;
1912	case BUSLOGICCOMMAND_INITIALIZE_EXTENDED_MAILBOX:
1913	pBusLogic->cbCommandParametersLeft = sizeof(RequestInitializeExtendedMailbox);
1914	break;
1915	case BUSLOGICCOMMAND_SET_ADAPTER_OPTIONS:
1916	/* There must be at least one byte following this command. */
1917	pBusLogic->cbCommandParametersLeft = 1;
1918	break;
1919	case BUSLOGICCOMMAND_EXT_BIOS_INFO:
1920	case BUSLOGICCOMMAND_UNLOCK_MAILBOX:
1921	/* Invalid commands. */
1922	pBusLogic->cbCommandParametersLeft = 0;
1923	break;
1924	case BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND: /* Should not come here anymore. */
1925	default:
1926	AssertMsgFailed(("Invalid operation code %#x\n", uVal));
1927	}
1928	}
1929	else
1930	{
1931	#ifndef IN_RING3
1932	/* This command must be executed in R3 as it rehooks the ISA I/O port. */
1933	if (pBusLogic->uOperationCode == BUSLOGICCOMMAND_MODIFY_IO_ADDRESS)
1934	{
1935	rc = VINF_IOM_R3_IOPORT_WRITE;
1936	break;
1937	}
1938	#endif
1939	/*
1940	* The real adapter would set the Command register busy bit in the status register.
1941	* The guest has to wait until it is unset.
1942	* We don't need to do it because the guest does not continue execution while we are in this
1943	* function.
1944	*/
1945	pBusLogic->aCommandBuffer[pBusLogic->iParameter] = uVal;
1946	pBusLogic->iParameter++;
1947	pBusLogic->cbCommandParametersLeft--;
1948	}
1949
1950	/* Start execution of command if there are no parameters left. */
1951	if (!pBusLogic->cbCommandParametersLeft)
1952	{
1953	rc = buslogicProcessCommand(pBusLogic);
1954	AssertMsgRC(rc, ("Processing command failed rc=%Rrc\n", rc));
1955	}
1956	break;
1957	}
1958
1959	/* On BusLogic adapters, the interrupt and geometry registers are R/W.
1960	* That is different from Adaptec 154x where those are read only.
1961	*/
1962	case BUSLOGIC_REGISTER_INTERRUPT:
1963	pBusLogic->regInterrupt = uVal;
1964	break;
1965
1966	case BUSLOGIC_REGISTER_GEOMETRY:
1967	pBusLogic->regGeometry = uVal;
1968	break;
1969
1970	default:
1971	AssertMsgFailed(("Register not available\n"));
1972	rc = VERR_IOM_IOPORT_UNUSED;
1973	}
1974
1975	return rc;
1976	}
1977
1978	/**
1979	* Memory mapped I/O Handler for read operations.
1980	*
1981	* @returns VBox status code.
1982	*
1983	* @param pDevIns The device instance.
1984	* @param pvUser User argument.
1985	* @param GCPhysAddr Physical address (in GC) where the read starts.
1986	* @param pv Where to store the result.
1987	* @param cb Number of bytes read.
1988	*/
1989	PDMBOTHCBDECL(int) buslogicMMIORead(PPDMDEVINS pDevIns, void *pvUser,
1990	RTGCPHYS GCPhysAddr, void *pv, unsigned cb)
1991	{
1992	/* the linux driver does not make use of the MMIO area. */
1993	AssertMsgFailed(("MMIO Read\n"));
1994	return VINF_SUCCESS;
1995	}
1996
1997	/**
1998	* Memory mapped I/O Handler for write operations.
1999	*
2000	* @returns VBox status code.
2001	*
2002	* @param pDevIns The device instance.
2003	* @param pvUser User argument.
2004	* @param GCPhysAddr Physical address (in GC) where the read starts.
2005	* @param pv Where to fetch the result.
2006	* @param cb Number of bytes to write.
2007	*/
2008	PDMBOTHCBDECL(int) buslogicMMIOWrite(PPDMDEVINS pDevIns, void *pvUser,
2009	RTGCPHYS GCPhysAddr, void const *pv, unsigned cb)
2010	{
2011	/* the linux driver does not make use of the MMIO area. */
2012	AssertMsgFailed(("MMIO Write\n"));
2013	return VINF_SUCCESS;
2014	}
2015
2016	/**
2017	* Port I/O Handler for IN operations.
2018	*
2019	* @returns VBox status code.
2020	*
2021	* @param pDevIns The device instance.
2022	* @param pvUser User argument.
2023	* @param uPort Port number used for the IN operation.
2024	* @param pu32 Where to store the result.
2025	* @param cb Number of bytes read.
2026	*/
2027	PDMBOTHCBDECL(int) buslogicIOPortRead (PPDMDEVINS pDevIns, void *pvUser,
2028	RTIOPORT Port, uint32_t *pu32, unsigned cb)
2029	{
2030	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2031	unsigned iRegister = Port % 4;
2032
2033	Assert(cb == 1);
2034
2035	return buslogicRegisterRead(pBusLogic, iRegister, pu32);
2036	}
2037
2038	/**
2039	* Port I/O Handler for OUT operations.
2040	*
2041	* @returns VBox status code.
2042	*
2043	* @param pDevIns The device instance.
2044	* @param pvUser User argument.
2045	* @param uPort Port number used for the IN operation.
2046	* @param u32 The value to output.
2047	* @param cb The value size in bytes.
2048	*/
2049	PDMBOTHCBDECL(int) buslogicIOPortWrite (PPDMDEVINS pDevIns, void *pvUser,
2050	RTIOPORT Port, uint32_t u32, unsigned cb)
2051	{
2052	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2053	int rc = VINF_SUCCESS;
2054	unsigned iRegister = Port % 4;
2055	uint8_t uVal = (uint8_t)u32;
2056
2057	Assert(cb == 1);
2058
2059	rc = buslogicRegisterWrite(pBusLogic, iRegister, (uint8_t)uVal);
2060
2061	Log2(("#%d %s: pvUser=%#p cb=%d u32=%#x Port=%#x rc=%Rrc\n",
2062	pDevIns->iInstance, __FUNCTION__, pvUser, cb, u32, Port, rc));
2063
2064	return rc;
2065	}
2066
2067	#ifdef IN_RING3
2068
2069	static int buslogicPrepareBIOSSCSIRequest(PBUSLOGIC pBusLogic)
2070	{
2071	int rc;
2072	PBUSLOGICTASKSTATE pTaskState;
2073	uint32_t uTargetDevice;
2074
2075	rc = RTMemCacheAllocEx(pBusLogic->hTaskCache, (void **)&pTaskState);
2076	AssertMsgRCReturn(rc, ("Getting task from cache failed rc=%Rrc\n", rc), rc);
2077
2078	pTaskState->fBIOS = true;
2079
2080	rc = vboxscsiSetupRequest(&pBusLogic->VBoxSCSI, &pTaskState->PDMScsiRequest, &uTargetDevice);
2081	AssertMsgRCReturn(rc, ("Setting up SCSI request failed rc=%Rrc\n", rc), rc);
2082
2083	pTaskState->PDMScsiRequest.pvUser = pTaskState;
2084
2085	pTaskState->CTX_SUFF(pTargetDevice) = &pBusLogic->aDeviceStates[uTargetDevice];
2086
2087	if (!pTaskState->CTX_SUFF(pTargetDevice)->fPresent)
2088	{
2089	/* Device is not present. */
2090	AssertMsg(pTaskState->PDMScsiRequest.pbCDB[0] == SCSI_INQUIRY,
2091	("Device is not present but command is not inquiry\n"));
2092
2093	SCSIINQUIRYDATA ScsiInquiryData;
2094
2095	memset(&ScsiInquiryData, 0, sizeof(SCSIINQUIRYDATA));
2096	ScsiInquiryData.u5PeripheralDeviceType = SCSI_INQUIRY_DATA_PERIPHERAL_DEVICE_TYPE_UNKNOWN;
2097	ScsiInquiryData.u3PeripheralQualifier = SCSI_INQUIRY_DATA_PERIPHERAL_QUALIFIER_NOT_CONNECTED_NOT_SUPPORTED;
2098
2099	memcpy(pBusLogic->VBoxSCSI.pBuf, &ScsiInquiryData, 5);
2100
2101	rc = vboxscsiRequestFinished(&pBusLogic->VBoxSCSI, &pTaskState->PDMScsiRequest, SCSI_STATUS_OK);
2102	AssertMsgRCReturn(rc, ("Finishing BIOS SCSI request failed rc=%Rrc\n", rc), rc);
2103
2104	RTMemCacheFree(pBusLogic->hTaskCache, pTaskState);
2105	}
2106	else
2107	{
2108	LogFlowFunc(("before increment %u\n", pTaskState->CTX_SUFF(pTargetDevice)->cOutstandingRequests));
2109	ASMAtomicIncU32(&pTaskState->CTX_SUFF(pTargetDevice)->cOutstandingRequests);
2110	LogFlowFunc(("after increment %u\n", pTaskState->CTX_SUFF(pTargetDevice)->cOutstandingRequests));
2111
2112	rc = pTaskState->CTX_SUFF(pTargetDevice)->pDrvSCSIConnector->pfnSCSIRequestSend(pTaskState->CTX_SUFF(pTargetDevice)->pDrvSCSIConnector,
2113	&pTaskState->PDMScsiRequest);
2114	AssertMsgRC(rc, ("Sending request to SCSI layer failed rc=%Rrc\n", rc));
2115	}
2116
2117	return rc;
2118	}
2119
2120
2121	/**
2122	* Port I/O Handler for IN operations - BIOS port.
2123	*
2124	* @returns VBox status code.
2125	*
2126	* @param pDevIns The device instance.
2127	* @param pvUser User argument.
2128	* @param uPort Port number used for the IN operation.
2129	* @param pu32 Where to store the result.
2130	* @param cb Number of bytes read.
2131	*/
2132	static int buslogicBIOSIOPortRead(PPDMDEVINS pDevIns, void *pvUser,
2133	RTIOPORT Port, uint32_t *pu32, unsigned cb)
2134	{
2135	int rc;
2136	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2137
2138	Assert(cb == 1);
2139
2140	rc = vboxscsiReadRegister(&pBusLogic->VBoxSCSI, (Port - BUSLOGIC_BIOS_IO_PORT), pu32);
2141
2142	//Log2(("%s: pu32=%p:{%.*Rhxs} iRegister=%d rc=%Rrc\n",
2143	// __FUNCTION__, pu32, 1, pu32, (Port - BUSLOGIC_BIOS_IO_PORT), rc));
2144
2145	return rc;
2146	}
2147
2148	/**
2149	* Port I/O Handler for OUT operations - BIOS port.
2150	*
2151	* @returns VBox status code.
2152	*
2153	* @param pDevIns The device instance.
2154	* @param pvUser User argument.
2155	* @param uPort Port number used for the IN operation.
2156	* @param u32 The value to output.
2157	* @param cb The value size in bytes.
2158	*/
2159	static int buslogicBIOSIOPortWrite(PPDMDEVINS pDevIns, void *pvUser,
2160	RTIOPORT Port, uint32_t u32, unsigned cb)
2161	{
2162	int rc;
2163	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2164
2165	Log2(("#%d %s: pvUser=%#p cb=%d u32=%#x Port=%#x\n",
2166	pDevIns->iInstance, __FUNCTION__, pvUser, cb, u32, Port));
2167
2168	Assert(cb == 1);
2169
2170	rc = vboxscsiWriteRegister(&pBusLogic->VBoxSCSI, (Port - BUSLOGIC_BIOS_IO_PORT), (uint8_t)u32);
2171	if (rc == VERR_MORE_DATA)
2172	{
2173	rc = buslogicPrepareBIOSSCSIRequest(pBusLogic);
2174	AssertRC(rc);
2175	}
2176	else if (RT_FAILURE(rc))
2177	AssertMsgFailed(("Writing BIOS register failed %Rrc\n", rc));
2178
2179	return VINF_SUCCESS;
2180	}
2181
2182	/**
2183	* Port I/O Handler for primary port range OUT string operations.
2184	* @see FNIOMIOPORTOUTSTRING for details.
2185	*/
2186	static DECLCALLBACK(int) buslogicBIOSIOPortWriteStr(PPDMDEVINS pDevIns, void pvUser, RTIOPORT Port, RTGCPTR pGCPtrSrc, PRTGCUINTREG pcTransfer, unsigned cb)
2187	{
2188	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2189	int rc;
2190
2191	Log2(("#%d %s: pvUser=%#p cb=%d Port=%#x\n",
2192	pDevIns->iInstance, __FUNCTION__, pvUser, cb, Port));
2193
2194	rc = vboxscsiWriteString(pDevIns, &pBusLogic->VBoxSCSI, (Port - BUSLOGIC_BIOS_IO_PORT),
2195	pGCPtrSrc, pcTransfer, cb);
2196	if (rc == VERR_MORE_DATA)
2197	{
2198	rc = buslogicPrepareBIOSSCSIRequest(pBusLogic);
2199	AssertRC(rc);
2200	}
2201	else if (RT_FAILURE(rc))
2202	AssertMsgFailed(("Writing BIOS register failed %Rrc\n", rc));
2203
2204	return rc;
2205	}
2206
2207	/**
2208	* Port I/O Handler for primary port range IN string operations.
2209	* @see FNIOMIOPORTINSTRING for details.
2210	*/
2211	static DECLCALLBACK(int) buslogicBIOSIOPortReadStr(PPDMDEVINS pDevIns, void pvUser, RTIOPORT Port, RTGCPTR pGCPtrDst, PRTGCUINTREG pcTransfer, unsigned cb)
2212	{
2213	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2214
2215	LogFlowFunc(("#%d %s: pvUser=%#p cb=%d Port=%#x\n",
2216	pDevIns->iInstance, __FUNCTION__, pvUser, cb, Port));
2217
2218	return vboxscsiReadString(pDevIns, &pBusLogic->VBoxSCSI, (Port - BUSLOGIC_BIOS_IO_PORT),
2219	pGCPtrDst, pcTransfer, cb);
2220	}
2221
2222	/**
2223	* Update the ISA I/O range.
2224	*
2225	* @returns nothing.
2226	* @param pBusLogic Pointer to the BusLogic device instance.
2227	* @param uBaseCode Encoded ISA I/O base; only low 3 bits are used.
2228	*/
2229	static int buslogicRegisterISARange(PBUSLOGIC pBusLogic, uint8_t uBaseCode)
2230	{
2231	uint8_t uCode = uBaseCode & MAX_ISA_BASE;
2232	uint16_t uNewBase = aISABases[uCode];
2233	int rc = VINF_SUCCESS;
2234
2235	LogFlowFunc(("ISA I/O code %02X, new base %X\n", uBaseCode, uNewBase));
2236
2237	/* Check if the same port range is already registered. */
2238	if (uNewBase != pBusLogic->IOISABase)
2239	{
2240	/* Unregister the old range, if any. */
2241	if (pBusLogic->IOISABase)
2242	rc = PDMDevHlpIOPortDeregister(pBusLogic->CTX_SUFF(pDevIns), pBusLogic->IOISABase, 4);
2243
2244	if (RT_SUCCESS(rc))
2245	{
2246	pBusLogic->IOISABase = 0; /* First mark as unregistered. */
2247	pBusLogic->uISABaseCode = ISA_BASE_DISABLED;
2248
2249	if (uNewBase)
2250	{
2251	/* Register the new range if requested. */
2252	rc = PDMDevHlpIOPortRegister(pBusLogic->CTX_SUFF(pDevIns), uNewBase, 4, NULL,
2253	buslogicIOPortWrite, buslogicIOPortRead,
2254	NULL, NULL,
2255	"BusLogic ISA");
2256	if (RT_SUCCESS(rc))
2257	{
2258	pBusLogic->IOISABase = uNewBase;
2259	pBusLogic->uISABaseCode = uCode;
2260	}
2261	}
2262	}
2263	if (RT_SUCCESS(rc))
2264	{
2265	if (uNewBase)
2266	{
2267	Log(("ISA I/O base: %x\n", uNewBase));
2268	LogRel(("BusLogic: ISA I/O base: %x\n", uNewBase));
2269	}
2270	else
2271	{
2272	Log(("Disabling ISA I/O ports.\n"));
2273	LogRel(("BusLogic: ISA I/O disabled\n"));
2274	}
2275	}
2276
2277	}
2278	return rc;
2279	}
2280
2281	static void buslogicWarningDiskFull(PPDMDEVINS pDevIns)
2282	{
2283	int rc;
2284	LogRel(("BusLogic#%d: Host disk full\n", pDevIns->iInstance));
2285	rc = PDMDevHlpVMSetRuntimeError(pDevIns, VMSETRTERR_FLAGS_SUSPEND \| VMSETRTERR_FLAGS_NO_WAIT, "DevBusLogic_DISKFULL",
2286	N_("Host system reported disk full. VM execution is suspended. You can resume after freeing some space"));
2287	AssertRC(rc);
2288	}
2289
2290	static void buslogicWarningFileTooBig(PPDMDEVINS pDevIns)
2291	{
2292	int rc;
2293	LogRel(("BusLogic#%d: File too big\n", pDevIns->iInstance));
2294	rc = PDMDevHlpVMSetRuntimeError(pDevIns, VMSETRTERR_FLAGS_SUSPEND \| VMSETRTERR_FLAGS_NO_WAIT, "DevBusLogic_FILETOOBIG",
2295	N_("Host system reported that the file size limit of the host file system has been exceeded. VM execution is suspended. You need to move your virtual hard disk to a filesystem which allows bigger files"));
2296	AssertRC(rc);
2297	}
2298
2299	static void buslogicWarningISCSI(PPDMDEVINS pDevIns)
2300	{
2301	int rc;
2302	LogRel(("BusLogic#%d: iSCSI target unavailable\n", pDevIns->iInstance));
2303	rc = PDMDevHlpVMSetRuntimeError(pDevIns, VMSETRTERR_FLAGS_SUSPEND \| VMSETRTERR_FLAGS_NO_WAIT, "DevBusLogic_ISCSIDOWN",
2304	N_("The iSCSI target has stopped responding. VM execution is suspended. You can resume when it is available again"));
2305	AssertRC(rc);
2306	}
2307
2308	static void buslogicWarningUnknown(PPDMDEVINS pDevIns, int rc)
2309	{
2310	int rc2;
2311	LogRel(("BusLogic#%d: Unknown but recoverable error has occurred (rc=%Rrc)\n", pDevIns->iInstance, rc));
2312	rc2 = PDMDevHlpVMSetRuntimeError(pDevIns, VMSETRTERR_FLAGS_SUSPEND \| VMSETRTERR_FLAGS_NO_WAIT, "DevBusLogic_UNKNOWN",
2313	N_("An unknown but recoverable I/O error has occurred (rc=%Rrc). VM execution is suspended. You can resume when the error is fixed"), rc);
2314	AssertRC(rc2);
2315	}
2316
2317	static void buslogicRedoSetWarning(PBUSLOGIC pThis, int rc)
2318	{
2319	if (rc == VERR_DISK_FULL)
2320	buslogicWarningDiskFull(pThis->CTX_SUFF(pDevIns));
2321	else if (rc == VERR_FILE_TOO_BIG)
2322	buslogicWarningFileTooBig(pThis->CTX_SUFF(pDevIns));
2323	else if (rc == VERR_BROKEN_PIPE \|\| rc == VERR_NET_CONNECTION_REFUSED)
2324	{
2325	/* iSCSI connection abort (first error) or failure to reestablish
2326	* connection (second error). Pause VM. On resume we'll retry. */
2327	buslogicWarningISCSI(pThis->CTX_SUFF(pDevIns));
2328	}
2329	else
2330	buslogicWarningUnknown(pThis->CTX_SUFF(pDevIns), rc);
2331	}
2332
2333
2334	static DECLCALLBACK(int) buslogicMMIOMap(PPCIDEVICE pPciDev, /unsigned/ int iRegion,
2335	RTGCPHYS GCPhysAddress, uint32_t cb,
2336	PCIADDRESSSPACE enmType)
2337	{
2338	PPDMDEVINS pDevIns = pPciDev->pDevIns;
2339	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2340	int rc = VINF_SUCCESS;
2341
2342	Log2(("%s: registering MMIO area at GCPhysAddr=%RGp cb=%u\n", __FUNCTION__, GCPhysAddress, cb));
2343
2344	Assert(cb >= 32);
2345
2346	if (enmType == PCI_ADDRESS_SPACE_MEM)
2347	{
2348	/* We use the assigned size here, because we currently only support page aligned MMIO ranges. */
2349	rc = PDMDevHlpMMIORegister(pDevIns, GCPhysAddress, cb, NULL /pvUser/,
2350	IOMMMIO_FLAGS_READ_PASSTHRU \| IOMMMIO_FLAGS_WRITE_PASSTHRU,
2351	buslogicMMIOWrite, buslogicMMIORead, "BusLogic MMIO");
2352	if (RT_FAILURE(rc))
2353	return rc;
2354
2355	if (pThis->fR0Enabled)
2356	{
2357	rc = PDMDevHlpMMIORegisterR0(pDevIns, GCPhysAddress, cb, NIL_RTR0PTR /pvUser/,
2358	"buslogicMMIOWrite", "buslogicMMIORead");
2359	if (RT_FAILURE(rc))
2360	return rc;
2361	}
2362
2363	if (pThis->fGCEnabled)
2364	{
2365	rc = PDMDevHlpMMIORegisterRC(pDevIns, GCPhysAddress, cb, NIL_RTRCPTR /pvUser/,
2366	"buslogicMMIOWrite", "buslogicMMIORead");
2367	if (RT_FAILURE(rc))
2368	return rc;
2369	}
2370
2371	pThis->MMIOBase = GCPhysAddress;
2372	}
2373	else if (enmType == PCI_ADDRESS_SPACE_IO)
2374	{
2375	rc = PDMDevHlpIOPortRegister(pDevIns, (RTIOPORT)GCPhysAddress, 32,
2376	NULL, buslogicIOPortWrite, buslogicIOPortRead, NULL, NULL, "BusLogic PCI");
2377	if (RT_FAILURE(rc))
2378	return rc;
2379
2380	if (pThis->fR0Enabled)
2381	{
2382	rc = PDMDevHlpIOPortRegisterR0(pDevIns, (RTIOPORT)GCPhysAddress, 32,
2383	0, "buslogicIOPortWrite", "buslogicIOPortRead", NULL, NULL, "BusLogic PCI");
2384	if (RT_FAILURE(rc))
2385	return rc;
2386	}
2387
2388	if (pThis->fGCEnabled)
2389	{
2390	rc = PDMDevHlpIOPortRegisterRC(pDevIns, (RTIOPORT)GCPhysAddress, 32,
2391	0, "buslogicIOPortWrite", "buslogicIOPortRead", NULL, NULL, "BusLogic PCI");
2392	if (RT_FAILURE(rc))
2393	return rc;
2394	}
2395
2396	pThis->IOPortBase = (RTIOPORT)GCPhysAddress;
2397	}
2398	else
2399	AssertMsgFailed(("Invalid enmType=%d\n", enmType));
2400
2401	return rc;
2402	}
2403
2404	static DECLCALLBACK(int) buslogicDeviceSCSIRequestCompleted(PPDMISCSIPORT pInterface, PPDMSCSIREQUEST pSCSIRequest,
2405	int rcCompletion, bool fRedo, int rcReq)
2406	{
2407	int rc;
2408	PBUSLOGICTASKSTATE pTaskState = (PBUSLOGICTASKSTATE)pSCSIRequest->pvUser;
2409	PBUSLOGICDEVICE pBusLogicDevice = pTaskState->CTX_SUFF(pTargetDevice);
2410	PBUSLOGIC pBusLogic = pBusLogicDevice->CTX_SUFF(pBusLogic);
2411
2412	LogFlowFunc(("before decrement %u\n", pBusLogicDevice->cOutstandingRequests));
2413	ASMAtomicDecU32(&pBusLogicDevice->cOutstandingRequests);
2414	LogFlowFunc(("after decrement %u\n", pBusLogicDevice->cOutstandingRequests));
2415
2416	if (fRedo)
2417	{
2418	if (!pTaskState->fBIOS)
2419	{
2420	buslogicDataBufferFree(pTaskState);
2421
2422	if (pTaskState->pbSenseBuffer)
2423	buslogicSenseBufferFree(pTaskState, false /* fCopy */);
2424	}
2425
2426	/* Add to the list. */
2427	do
2428	{
2429	pTaskState->pRedoNext = ASMAtomicReadPtrT(&pBusLogic->pTasksRedoHead, PBUSLOGICTASKSTATE);
2430	} while (!ASMAtomicCmpXchgPtr(&pBusLogic->pTasksRedoHead, pTaskState, pTaskState->pRedoNext));
2431
2432	/* Suspend the VM if not done already. */
2433	if (!ASMAtomicXchgBool(&pBusLogic->fRedo, true))
2434	buslogicRedoSetWarning(pBusLogic, rcReq);
2435	}
2436	else
2437	{
2438	if (pTaskState->fBIOS)
2439	{
2440	rc = vboxscsiRequestFinished(&pBusLogic->VBoxSCSI, pSCSIRequest, rcCompletion);
2441	AssertMsgRC(rc, ("Finishing BIOS SCSI request failed rc=%Rrc\n", rc));
2442	}
2443	else
2444	{
2445	buslogicDataBufferFree(pTaskState);
2446
2447	if (pTaskState->pbSenseBuffer)
2448	buslogicSenseBufferFree(pTaskState, (rcCompletion != SCSI_STATUS_OK));
2449
2450	if (rcCompletion == SCSI_STATUS_OK)
2451	buslogicSendIncomingMailbox(pBusLogic, pTaskState,
2452	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_CMD_COMPLETED,
2453	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
2454	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITHOUT_ERROR);
2455	else if (rcCompletion == SCSI_STATUS_CHECK_CONDITION)
2456	buslogicSendIncomingMailbox(pBusLogic, pTaskState,
2457	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_CMD_COMPLETED,
2458	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_CHECK_CONDITION,
2459	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR);
2460	else
2461	AssertMsgFailed(("invalid completion status %d\n", rcCompletion));
2462	}
2463	#ifdef DEBUG
2464	buslogicDumpCCBInfo(&pTaskState->CommandControlBlockGuest);
2465	#endif
2466
2467	/* Remove task from the cache. */
2468	RTMemCacheFree(pBusLogic->hTaskCache, pTaskState);
2469	}
2470
2471	if (pBusLogicDevice->cOutstandingRequests == 0 && pBusLogic->fSignalIdle)
2472	PDMDevHlpAsyncNotificationCompleted(pBusLogic->pDevInsR3);
2473
2474	return VINF_SUCCESS;
2475	}
2476
2477	static DECLCALLBACK(int) buslogicQueryDeviceLocation(PPDMISCSIPORT pInterface, const char **ppcszController,
2478	uint32_t piInstance, uint32_t piLUN)
2479	{
2480	PBUSLOGICDEVICE pBusLogicDevice = PDMISCSIPORT_2_PBUSLOGICDEVICE(pInterface);
2481	PPDMDEVINS pDevIns = pBusLogicDevice->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns);
2482
2483	AssertPtrReturn(ppcszController, VERR_INVALID_POINTER);
2484	AssertPtrReturn(piInstance, VERR_INVALID_POINTER);
2485	AssertPtrReturn(piLUN, VERR_INVALID_POINTER);
2486
2487	*ppcszController = pDevIns->pReg->szName;
2488	*piInstance = pDevIns->iInstance;
2489	*piLUN = pBusLogicDevice->iLUN;
2490
2491	return VINF_SUCCESS;
2492	}
2493
2494	static int buslogicDeviceSCSIRequestSetup(PBUSLOGIC pBusLogic, PBUSLOGICTASKSTATE pTaskState)
2495	{
2496	int rc = VINF_SUCCESS;
2497
2498	/* Fetch the CCB from guest memory. */
2499	RTGCPHYS GCPhysAddrCCB = (RTGCPHYS)pTaskState->MailboxGuest.u32PhysAddrCCB;
2500	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrCCB,
2501	&pTaskState->CommandControlBlockGuest, sizeof(CommandControlBlock));
2502
2503	PBUSLOGICDEVICE pTargetDevice = &pBusLogic->aDeviceStates[pTaskState->CommandControlBlockGuest.uTargetId];
2504	pTaskState->CTX_SUFF(pTargetDevice) = pTargetDevice;
2505
2506	#ifdef DEBUG
2507	buslogicDumpCCBInfo(&pTaskState->CommandControlBlockGuest);
2508	#endif
2509
2510	/* Alloc required buffers. */
2511	rc = buslogicDataBufferAlloc(pTaskState);
2512	AssertMsgRC(rc, ("Alloc failed rc=%Rrc\n", rc));
2513
2514	rc = buslogicSenseBufferAlloc(pTaskState);
2515	AssertMsgRC(rc, ("Mapping sense buffer failed rc=%Rrc\n", rc));
2516
2517	/* Check if device is present on bus. If not return error immediately and don't process this further. */
2518	if (!pBusLogic->aDeviceStates[pTaskState->CommandControlBlockGuest.uTargetId].fPresent)
2519	{
2520	buslogicDataBufferFree(pTaskState);
2521
2522	if (pTaskState->pbSenseBuffer)
2523	buslogicSenseBufferFree(pTaskState, true);
2524
2525	buslogicSendIncomingMailbox(pBusLogic, pTaskState,
2526	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_SCSI_SELECTION_TIMEOUT,
2527	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
2528	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR);
2529
2530	RTMemCacheFree(pBusLogic->hTaskCache, pTaskState);
2531	}
2532	else
2533	{
2534	/* Setup SCSI request. */
2535	pTaskState->PDMScsiRequest.uLogicalUnit = pTaskState->CommandControlBlockGuest.uLogicalUnit;
2536
2537	if (pTaskState->CommandControlBlockGuest.uDataDirection == BUSLOGIC_CCB_DIRECTION_UNKNOWN)
2538	pTaskState->PDMScsiRequest.uDataDirection = PDMSCSIREQUESTTXDIR_UNKNOWN;
2539	else if (pTaskState->CommandControlBlockGuest.uDataDirection == BUSLOGIC_CCB_DIRECTION_IN)
2540	pTaskState->PDMScsiRequest.uDataDirection = PDMSCSIREQUESTTXDIR_FROM_DEVICE;
2541	else if (pTaskState->CommandControlBlockGuest.uDataDirection == BUSLOGIC_CCB_DIRECTION_OUT)
2542	pTaskState->PDMScsiRequest.uDataDirection = PDMSCSIREQUESTTXDIR_TO_DEVICE;
2543	else if (pTaskState->CommandControlBlockGuest.uDataDirection == BUSLOGIC_CCB_DIRECTION_NO_DATA)
2544	pTaskState->PDMScsiRequest.uDataDirection = PDMSCSIREQUESTTXDIR_NONE;
2545	else
2546	AssertMsgFailed(("Invalid data direction type %d\n", pTaskState->CommandControlBlockGuest.uDataDirection));
2547
2548	pTaskState->PDMScsiRequest.cbCDB = pTaskState->CommandControlBlockGuest.cbCDB;
2549	pTaskState->PDMScsiRequest.pbCDB = pTaskState->CommandControlBlockGuest.aCDB;
2550	if (pTaskState->DataSeg.cbSeg)
2551	{
2552	pTaskState->PDMScsiRequest.cbScatterGather = pTaskState->DataSeg.cbSeg;
2553	pTaskState->PDMScsiRequest.cScatterGatherEntries = 1;
2554	pTaskState->PDMScsiRequest.paScatterGatherHead = &pTaskState->DataSeg;
2555	}
2556	else
2557	{
2558	pTaskState->PDMScsiRequest.cbScatterGather = 0;
2559	pTaskState->PDMScsiRequest.cScatterGatherEntries = 0;
2560	pTaskState->PDMScsiRequest.paScatterGatherHead = NULL;
2561	}
2562	pTaskState->PDMScsiRequest.cbSenseBuffer = buslogicConvertSenseBufferLength(pTaskState->CommandControlBlockGuest.cbSenseData);
2563	pTaskState->PDMScsiRequest.pbSenseBuffer = pTaskState->pbSenseBuffer;
2564	pTaskState->PDMScsiRequest.pvUser = pTaskState;
2565
2566	ASMAtomicIncU32(&pTargetDevice->cOutstandingRequests);
2567	rc = pTargetDevice->pDrvSCSIConnector->pfnSCSIRequestSend(pTargetDevice->pDrvSCSIConnector, &pTaskState->PDMScsiRequest);
2568	AssertMsgRC(rc, ("Sending request to SCSI layer failed rc=%Rrc\n", rc));
2569	}
2570
2571	return rc;
2572	}
2573
2574	/**
2575	* Read mailbox from the guest and execute command.
2576	*
2577	* @returns VBox status code.
2578	* @param pBusLogic Pointer to the BusLogic instance data.
2579	*/
2580	static int buslogicProcessMailboxNext(PBUSLOGIC pBusLogic)
2581	{
2582	PBUSLOGICTASKSTATE pTaskState = NULL;
2583	RTGCPHYS GCPhysAddrMailboxCurrent;
2584	int rc;
2585
2586	rc = RTMemCacheAllocEx(pBusLogic->hTaskCache, (void **)&pTaskState);
2587	AssertMsgReturn(RT_SUCCESS(rc) && (pTaskState != NULL), ("Failed to get task state from cache\n"), rc);
2588
2589	pTaskState->fBIOS = false;
2590
2591	if (!pBusLogic->fStrictRoundRobinMode)
2592	{
2593	/* Search for a filled mailbox - stop if we have scanned all mailboxes. */
2594	uint8_t uMailboxPosCur = pBusLogic->uMailboxOutgoingPositionCurrent;
2595
2596	do
2597	{
2598	/* Fetch mailbox from guest memory. */
2599	GCPhysAddrMailboxCurrent = buslogicOutgoingMailboxGetGCPhys(pBusLogic);
2600
2601	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxCurrent,
2602	&pTaskState->MailboxGuest, sizeof(Mailbox));
2603
2604	/* Check the next mailbox. */
2605	buslogicOutgoingMailboxAdvance(pBusLogic);
2606	} while ( pTaskState->MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE
2607	&& uMailboxPosCur != pBusLogic->uMailboxOutgoingPositionCurrent);
2608	}
2609	else
2610	{
2611	/* Fetch mailbox from guest memory. */
2612	GCPhysAddrMailboxCurrent = buslogicOutgoingMailboxGetGCPhys(pBusLogic);
2613
2614	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxCurrent,
2615	&pTaskState->MailboxGuest, sizeof(Mailbox));
2616	}
2617
2618	/*
2619	* Check if the mailbox is actually loaded.
2620	* It might be possible that the guest notified us without
2621	* a loaded mailbox. Do nothing in that case but leave a
2622	* log entry.
2623	*/
2624	if (pTaskState->MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE)
2625	{
2626	Log(("No loaded mailbox left\n"));
2627	RTMemCacheFree(pBusLogic->hTaskCache, pTaskState);
2628	return VERR_NO_DATA;
2629	}
2630
2631	LogFlow(("Got loaded mailbox at slot %u, CCB phys %RGp\n", pBusLogic->uMailboxOutgoingPositionCurrent, (RTGCPHYS)pTaskState->MailboxGuest.u32PhysAddrCCB));
2632	#ifdef DEBUG
2633	buslogicDumpMailboxInfo(&pTaskState->MailboxGuest, true);
2634	#endif
2635
2636	/* We got the mailbox, mark it as free in the guest. */
2637	uint8_t uActionCode = BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE;
2638	PDMDevHlpPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxCurrent + RT_OFFSETOF(Mailbox, u.out.uActionCode), &uActionCode, sizeof(uActionCode));
2639
2640	if (pTaskState->MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_START_COMMAND)
2641	rc = buslogicDeviceSCSIRequestSetup(pBusLogic, pTaskState);
2642	else if (pTaskState->MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_ABORT_COMMAND)
2643	{
2644	AssertMsgFailed(("Not implemented yet\n"));
2645	}
2646	else
2647	AssertMsgFailed(("Invalid outgoing mailbox action code %u\n", pTaskState->MailboxGuest.u.out.uActionCode));
2648
2649	AssertRC(rc);
2650
2651	/* Advance to the next mailbox. */
2652	if (pBusLogic->fStrictRoundRobinMode)
2653	buslogicOutgoingMailboxAdvance(pBusLogic);
2654
2655	return rc;
2656	}
2657
2658	/**
2659	* Transmit queue consumer
2660	* Queue a new async task.
2661	*
2662	* @returns Success indicator.
2663	* If false the item will not be removed and the flushing will stop.
2664	* @param pDevIns The device instance.
2665	* @param pItem The item to consume. Upon return this item will be freed.
2666	*/
2667	static DECLCALLBACK(bool) buslogicNotifyQueueConsumer(PPDMDEVINS pDevIns, PPDMQUEUEITEMCORE pItem)
2668	{
2669	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2670
2671	/* Reset notification send flag now. */
2672	Assert(pBusLogic->fNotificationSend);
2673	ASMAtomicXchgBool(&pBusLogic->fNotificationSend, false);
2674	ASMAtomicXchgU32(&pBusLogic->cMailboxesReady, 0); /* @todo: Actually not required anymore but to stay compatible with older saved states. */
2675
2676	/* Process mailboxes. */
2677	int rc;
2678	do
2679	{
2680	rc = buslogicProcessMailboxNext(pBusLogic);
2681	AssertMsg(RT_SUCCESS(rc) \|\| rc == VERR_NO_DATA, ("Processing mailbox failed rc=%Rrc\n", rc));
2682	} while (RT_SUCCESS(rc));
2683
2684	return true;
2685	}
2686
2687	/**
2688	* Kicks the controller to process pending tasks after the VM was resumed
2689	* or loaded from a saved state.
2690	*
2691	* @returns nothing.
2692	* @param pThis The BusLogic device instance.
2693	*/
2694	static void buslogicKick(PBUSLOGIC pThis)
2695	{
2696	if (pThis->fRedo)
2697	{
2698	pThis->fRedo = false;
2699	if (pThis->VBoxSCSI.fBusy)
2700	{
2701
2702	/* The BIOS had a request active when we got suspended. Resume it. */
2703	int rc = buslogicPrepareBIOSSCSIRequest(pThis);
2704	AssertRC(rc);
2705	}
2706	else
2707	{
2708	/* Queue all pending tasks again. */
2709	PBUSLOGICTASKSTATE pTaskState = pThis->pTasksRedoHead;
2710
2711	pThis->pTasksRedoHead = NULL;
2712
2713	while (pTaskState)
2714	{
2715	PBUSLOGICTASKSTATE pCur = pTaskState;
2716
2717	int rc = buslogicDeviceSCSIRequestSetup(pThis, pCur);
2718	AssertRC(rc);
2719
2720	pTaskState = pTaskState->pRedoNext;
2721	}
2722	}
2723	}
2724	}
2725
2726	static DECLCALLBACK(int) buslogicLiveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uPass)
2727	{
2728	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2729
2730	/* Save the device config. */
2731	for (unsigned i = 0; i < RT_ELEMENTS(pThis->aDeviceStates); i++)
2732	SSMR3PutBool(pSSM, pThis->aDeviceStates[i].fPresent);
2733
2734	return VINF_SSM_DONT_CALL_AGAIN;
2735	}
2736
2737	static DECLCALLBACK(int) buslogicSaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
2738	{
2739	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2740
2741	/* Every device first. */
2742	for (unsigned i = 0; i < RT_ELEMENTS(pBusLogic->aDeviceStates); i++)
2743	{
2744	PBUSLOGICDEVICE pDevice = &pBusLogic->aDeviceStates[i];
2745
2746	AssertMsg(!pDevice->cOutstandingRequests,
2747	("There are still outstanding requests on this device\n"));
2748	SSMR3PutBool(pSSM, pDevice->fPresent);
2749	SSMR3PutU32(pSSM, pDevice->cOutstandingRequests);
2750	}
2751	/* Now the main device state. */
2752	SSMR3PutU8 (pSSM, pBusLogic->regStatus);
2753	SSMR3PutU8 (pSSM, pBusLogic->regInterrupt);
2754	SSMR3PutU8 (pSSM, pBusLogic->regGeometry);
2755	SSMR3PutMem (pSSM, &pBusLogic->LocalRam, sizeof(pBusLogic->LocalRam));
2756	SSMR3PutU8 (pSSM, pBusLogic->uOperationCode);
2757	SSMR3PutMem (pSSM, &pBusLogic->aCommandBuffer, sizeof(pBusLogic->aCommandBuffer));
2758	SSMR3PutU8 (pSSM, pBusLogic->iParameter);
2759	SSMR3PutU8 (pSSM, pBusLogic->cbCommandParametersLeft);
2760	SSMR3PutBool (pSSM, pBusLogic->fUseLocalRam);
2761	SSMR3PutMem (pSSM, pBusLogic->aReplyBuffer, sizeof(pBusLogic->aReplyBuffer));
2762	SSMR3PutU8 (pSSM, pBusLogic->iReply);
2763	SSMR3PutU8 (pSSM, pBusLogic->cbReplyParametersLeft);
2764	SSMR3PutBool (pSSM, pBusLogic->fIRQEnabled);
2765	SSMR3PutU8 (pSSM, pBusLogic->uISABaseCode);
2766	SSMR3PutU32 (pSSM, pBusLogic->cMailbox);
2767	SSMR3PutGCPhys(pSSM, pBusLogic->GCPhysAddrMailboxOutgoingBase);
2768	SSMR3PutU32 (pSSM, pBusLogic->uMailboxOutgoingPositionCurrent);
2769	SSMR3PutU32 (pSSM, pBusLogic->cMailboxesReady);
2770	SSMR3PutBool (pSSM, pBusLogic->fNotificationSend);
2771	SSMR3PutGCPhys(pSSM, pBusLogic->GCPhysAddrMailboxIncomingBase);
2772	SSMR3PutU32 (pSSM, pBusLogic->uMailboxIncomingPositionCurrent);
2773	SSMR3PutBool (pSSM, pBusLogic->fStrictRoundRobinMode);
2774	SSMR3PutBool (pSSM, pBusLogic->fExtendedLunCCBFormat);
2775	/* Now the data for the BIOS interface. */
2776	SSMR3PutU8 (pSSM, pBusLogic->VBoxSCSI.regIdentify);
2777	SSMR3PutU8 (pSSM, pBusLogic->VBoxSCSI.uTargetDevice);
2778	SSMR3PutU8 (pSSM, pBusLogic->VBoxSCSI.uTxDir);
2779	SSMR3PutU8 (pSSM, pBusLogic->VBoxSCSI.cbCDB);
2780	SSMR3PutMem (pSSM, pBusLogic->VBoxSCSI.aCDB, sizeof(pBusLogic->VBoxSCSI.aCDB));
2781	SSMR3PutU8 (pSSM, pBusLogic->VBoxSCSI.iCDB);
2782	SSMR3PutU32 (pSSM, pBusLogic->VBoxSCSI.cbBuf);
2783	SSMR3PutU32 (pSSM, pBusLogic->VBoxSCSI.iBuf);
2784	SSMR3PutBool (pSSM, pBusLogic->VBoxSCSI.fBusy);
2785	SSMR3PutU8 (pSSM, pBusLogic->VBoxSCSI.enmState);
2786	if (pBusLogic->VBoxSCSI.cbBuf)
2787	SSMR3PutMem(pSSM, pBusLogic->VBoxSCSI.pBuf, pBusLogic->VBoxSCSI.cbBuf);
2788
2789	/*
2790	* Save the physical addresses of the command control blocks of still pending tasks.
2791	* They are processed again on resume.
2792	*
2793	* The number of pending tasks needs to be determined first.
2794	*/
2795	uint32_t cTasks = 0;
2796
2797	PBUSLOGICTASKSTATE pTaskState = pBusLogic->pTasksRedoHead;
2798	if (pBusLogic->fRedo)
2799	{
2800	while (pTaskState)
2801	{
2802	cTasks++;
2803	pTaskState = pTaskState->pRedoNext;
2804	}
2805	}
2806	SSMR3PutU32(pSSM, cTasks);
2807
2808	/* Write the address of every task now. */
2809	pTaskState = pBusLogic->pTasksRedoHead;
2810	while (pTaskState)
2811	{
2812	SSMR3PutU32(pSSM, pTaskState->MailboxGuest.u32PhysAddrCCB);
2813	pTaskState = pTaskState->pRedoNext;
2814	}
2815
2816	return SSMR3PutU32(pSSM, ~0);
2817	}
2818
2819	static DECLCALLBACK(int) buslogicLoadDone(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
2820	{
2821	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2822
2823	buslogicRegisterISARange(pThis, pThis->uISABaseCode);
2824	buslogicKick(pThis);
2825	return VINF_SUCCESS;
2826	}
2827
2828	static DECLCALLBACK(int) buslogicLoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
2829	{
2830	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2831	int rc = VINF_SUCCESS;
2832
2833	/* We support saved states only from this and older versions. */
2834	if (uVersion > BUSLOGIC_SAVED_STATE_MINOR_VERSION)
2835	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
2836
2837	/* Every device first. */
2838	for (unsigned i = 0; i < RT_ELEMENTS(pBusLogic->aDeviceStates); i++)
2839	{
2840	PBUSLOGICDEVICE pDevice = &pBusLogic->aDeviceStates[i];
2841
2842	AssertMsg(!pDevice->cOutstandingRequests,
2843	("There are still outstanding requests on this device\n"));
2844	bool fPresent;
2845	rc = SSMR3GetBool(pSSM, &fPresent);
2846	AssertRCReturn(rc, rc);
2847	if (pDevice->fPresent != fPresent)
2848	return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Target %u config mismatch: config=%RTbool state=%RTbool"), i, pDevice->fPresent, fPresent);
2849
2850	if (uPass == SSM_PASS_FINAL)
2851	SSMR3GetU32(pSSM, (uint32_t *)&pDevice->cOutstandingRequests);
2852	}
2853
2854	if (uPass != SSM_PASS_FINAL)
2855	return VINF_SUCCESS;
2856
2857	/* Now the main device state. */
2858	SSMR3GetU8 (pSSM, (uint8_t *)&pBusLogic->regStatus);
2859	SSMR3GetU8 (pSSM, (uint8_t *)&pBusLogic->regInterrupt);
2860	SSMR3GetU8 (pSSM, (uint8_t *)&pBusLogic->regGeometry);
2861	SSMR3GetMem (pSSM, &pBusLogic->LocalRam, sizeof(pBusLogic->LocalRam));
2862	SSMR3GetU8 (pSSM, &pBusLogic->uOperationCode);
2863	SSMR3GetMem (pSSM, &pBusLogic->aCommandBuffer, sizeof(pBusLogic->aCommandBuffer));
2864	SSMR3GetU8 (pSSM, &pBusLogic->iParameter);
2865	SSMR3GetU8 (pSSM, &pBusLogic->cbCommandParametersLeft);
2866	SSMR3GetBool (pSSM, &pBusLogic->fUseLocalRam);
2867	SSMR3GetMem (pSSM, pBusLogic->aReplyBuffer, sizeof(pBusLogic->aReplyBuffer));
2868	SSMR3GetU8 (pSSM, &pBusLogic->iReply);
2869	SSMR3GetU8 (pSSM, &pBusLogic->cbReplyParametersLeft);
2870	SSMR3GetBool (pSSM, &pBusLogic->fIRQEnabled);
2871	SSMR3GetU8 (pSSM, &pBusLogic->uISABaseCode);
2872	SSMR3GetU32 (pSSM, &pBusLogic->cMailbox);
2873	SSMR3GetGCPhys(pSSM, &pBusLogic->GCPhysAddrMailboxOutgoingBase);
2874	SSMR3GetU32 (pSSM, &pBusLogic->uMailboxOutgoingPositionCurrent);
2875	SSMR3GetU32 (pSSM, (uint32_t *)&pBusLogic->cMailboxesReady);
2876	SSMR3GetBool (pSSM, (bool *)&pBusLogic->fNotificationSend);
2877	SSMR3GetGCPhys(pSSM, &pBusLogic->GCPhysAddrMailboxIncomingBase);
2878	SSMR3GetU32 (pSSM, &pBusLogic->uMailboxIncomingPositionCurrent);
2879	SSMR3GetBool (pSSM, &pBusLogic->fStrictRoundRobinMode);
2880	SSMR3GetBool (pSSM, &pBusLogic->fExtendedLunCCBFormat);
2881	/* Now the data for the BIOS interface. */
2882	SSMR3GetU8 (pSSM, &pBusLogic->VBoxSCSI.regIdentify);
2883	SSMR3GetU8 (pSSM, &pBusLogic->VBoxSCSI.uTargetDevice);
2884	SSMR3GetU8 (pSSM, &pBusLogic->VBoxSCSI.uTxDir);
2885	SSMR3GetU8 (pSSM, &pBusLogic->VBoxSCSI.cbCDB);
2886	SSMR3GetMem (pSSM, pBusLogic->VBoxSCSI.aCDB, sizeof(pBusLogic->VBoxSCSI.aCDB));
2887	SSMR3GetU8 (pSSM, &pBusLogic->VBoxSCSI.iCDB);
2888	SSMR3GetU32 (pSSM, &pBusLogic->VBoxSCSI.cbBuf);
2889	SSMR3GetU32 (pSSM, &pBusLogic->VBoxSCSI.iBuf);
2890	SSMR3GetBool(pSSM, (bool *)&pBusLogic->VBoxSCSI.fBusy);
2891	SSMR3GetU8 (pSSM, (uint8_t *)&pBusLogic->VBoxSCSI.enmState);
2892	if (pBusLogic->VBoxSCSI.cbBuf)
2893	{
2894	pBusLogic->VBoxSCSI.pBuf = (uint8_t *)RTMemAllocZ(pBusLogic->VBoxSCSI.cbBuf);
2895	if (!pBusLogic->VBoxSCSI.pBuf)
2896	{
2897	LogRel(("BusLogic: Out of memory during restore.\n"));
2898	return PDMDEV_SET_ERROR(pDevIns, VERR_NO_MEMORY,
2899	N_("BusLogic: Out of memory during restore\n"));
2900	}
2901	SSMR3GetMem(pSSM, pBusLogic->VBoxSCSI.pBuf, pBusLogic->VBoxSCSI.cbBuf);
2902	}
2903
2904	if (pBusLogic->VBoxSCSI.fBusy)
2905	pBusLogic->fRedo = true;
2906
2907	if (uVersion > BUSLOGIC_SAVED_STATE_MINOR_PRE_ERROR_HANDLING)
2908	{
2909	/* Check if there are pending tasks saved. */
2910	uint32_t cTasks = 0;
2911
2912	SSMR3GetU32(pSSM, &cTasks);
2913
2914	if (cTasks)
2915	pBusLogic->fRedo = true;
2916
2917	for (uint32_t i = 0; i < cTasks; i++)
2918	{
2919	PBUSLOGICTASKSTATE pTaskState = (PBUSLOGICTASKSTATE)RTMemCacheAlloc(pBusLogic->hTaskCache);
2920	if (!pTaskState)
2921	{
2922	rc = VERR_NO_MEMORY;
2923	break;
2924	}
2925
2926	rc = SSMR3GetU32(pSSM, &pTaskState->MailboxGuest.u32PhysAddrCCB);
2927	if (RT_FAILURE(rc))
2928	{
2929	RTMemCacheFree(pBusLogic->hTaskCache, pTaskState);
2930	break;
2931	}
2932
2933	/* Link into the list. */
2934	pTaskState->pRedoNext = pBusLogic->pTasksRedoHead;
2935	pBusLogic->pTasksRedoHead = pTaskState;
2936	}
2937	}
2938
2939	if (RT_SUCCESS(rc))
2940	{
2941	uint32_t u32;
2942	rc = SSMR3GetU32(pSSM, &u32);
2943	if (RT_SUCCESS(rc))
2944	AssertMsgReturn(u32 == ~0U, ("%#x\n", u32), VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
2945	}
2946
2947	return rc;
2948	}
2949
2950	/**
2951	* Gets the pointer to the status LED of a device - called from the SCSi driver.
2952	*
2953	* @returns VBox status code.
2954	* @param pInterface Pointer to the interface structure containing the called function pointer.
2955	* @param iLUN The unit which status LED we desire. Always 0 here as the driver
2956	* doesn't know about other LUN's.
2957	* @param ppLed Where to store the LED pointer.
2958	*/
2959	static DECLCALLBACK(int) buslogicDeviceQueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed)
2960	{
2961	PBUSLOGICDEVICE pDevice = PDMILEDPORTS_2_PBUSLOGICDEVICE(pInterface);
2962	if (iLUN == 0)
2963	{
2964	*ppLed = &pDevice->Led;
2965	Assert((*ppLed)->u32Magic == PDMLED_MAGIC);
2966	return VINF_SUCCESS;
2967	}
2968	return VERR_PDM_LUN_NOT_FOUND;
2969	}
2970
2971	/**
2972	* @interface_method_impl{PDMIBASE,pfnQueryInterface}
2973	*/
2974	static DECLCALLBACK(void ) buslogicDeviceQueryInterface(PPDMIBASE pInterface, const char pszIID)
2975	{
2976	PBUSLOGICDEVICE pDevice = PDMIBASE_2_PBUSLOGICDEVICE(pInterface);
2977	PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pDevice->IBase);
2978	PDMIBASE_RETURN_INTERFACE(pszIID, PDMISCSIPORT, &pDevice->ISCSIPort);
2979	PDMIBASE_RETURN_INTERFACE(pszIID, PDMILEDPORTS, &pDevice->ILed);
2980	return NULL;
2981	}
2982
2983	/**
2984	* Gets the pointer to the status LED of a unit.
2985	*
2986	* @returns VBox status code.
2987	* @param pInterface Pointer to the interface structure containing the called function pointer.
2988	* @param iLUN The unit which status LED we desire.
2989	* @param ppLed Where to store the LED pointer.
2990	*/
2991	static DECLCALLBACK(int) buslogicStatusQueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed)
2992	{
2993	PBUSLOGIC pBusLogic = PDMILEDPORTS_2_PBUSLOGIC(pInterface);
2994	if (iLUN < BUSLOGIC_MAX_DEVICES)
2995	{
2996	*ppLed = &pBusLogic->aDeviceStates[iLUN].Led;
2997	Assert((*ppLed)->u32Magic == PDMLED_MAGIC);
2998	return VINF_SUCCESS;
2999	}
3000	return VERR_PDM_LUN_NOT_FOUND;
3001	}
3002
3003	/**
3004	* @interface_method_impl{PDMIBASE,pfnQueryInterface}
3005	*/
3006	static DECLCALLBACK(void ) buslogicStatusQueryInterface(PPDMIBASE pInterface, const char pszIID)
3007	{
3008	PBUSLOGIC pThis = PDMIBASE_2_PBUSLOGIC(pInterface);
3009	PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pThis->IBase);
3010	PDMIBASE_RETURN_INTERFACE(pszIID, PDMILEDPORTS, &pThis->ILeds);
3011	return NULL;
3012	}
3013
3014	/**
3015	* BusLogic debugger info callback.
3016	*
3017	* @param pDevIns The device instance.
3018	* @param pHlp The output helpers.
3019	* @param pszArgs The arguments.
3020	*/
3021	static DECLCALLBACK(void) buslogicInfo(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs)
3022	{
3023	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3024	bool fVerbose = false;
3025
3026	/* Parse arguments. */
3027	if (pszArgs)
3028	fVerbose = strstr(pszArgs, "verbose") != NULL;
3029
3030	/* Show basic information. */
3031	pHlp->pfnPrintf(pHlp,
3032	"%s#%d: PCI I/O=%RTiop ISA I/O=%RTiop MMIO=%RGp IRQ=%u GC=%RTbool R0=%RTbool\n",
3033	pDevIns->pReg->szName,
3034	pDevIns->iInstance,
3035	pThis->IOPortBase, pThis->IOISABase, pThis->MMIOBase,
3036	PCIDevGetInterruptLine(&pThis->dev),
3037	!!pThis->fGCEnabled, !!pThis->fR0Enabled);
3038
3039	/* Print mailbox state. */
3040	if (pThis->regStatus & BUSLOGIC_REGISTER_STATUS_INITIALIZATION_REQUIRED)
3041	pHlp->pfnPrintf(pHlp, "Mailbox not initialized\n");
3042	else
3043	{
3044	pHlp->pfnPrintf(pHlp, "%u-bit mailbox with %u entries at %RGp\n",
3045	pThis->fMbxIs24Bit ? 24 : 32, pThis->cMailbox,
3046	pThis->GCPhysAddrMailboxOutgoingBase);
3047	}
3048
3049	/* Print register contents. */
3050	pHlp->pfnPrintf(pHlp, "Registers: STAT=%02x INTR=%02x GEOM=%02x\n",
3051	pThis->regStatus, pThis->regInterrupt, pThis->regGeometry);
3052
3053	/* Print the current command, if any. */
3054	if (pThis->uOperationCode != 0xff )
3055	pHlp->pfnPrintf(pHlp, "Current command: %02X\n", pThis->uOperationCode);
3056	}
3057
3058	/* -=-=-=-=- Helper -=-=-=-=- */
3059
3060	/**
3061	* Checks if all asynchronous I/O is finished.
3062	*
3063	* Used by buslogicReset, buslogicSuspend and buslogicPowerOff.
3064	*
3065	* @returns true if quiesced, false if busy.
3066	* @param pDevIns The device instance.
3067	*/
3068	static bool buslogicR3AllAsyncIOIsFinished(PPDMDEVINS pDevIns)
3069	{
3070	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3071
3072	for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aDeviceStates); i++)
3073	{
3074	PBUSLOGICDEVICE pThisDevice = &pThis->aDeviceStates[i];
3075	if (pThisDevice->pDrvBase)
3076	{
3077	if (pThisDevice->cOutstandingRequests != 0)
3078	return false;
3079	}
3080	}
3081
3082	return true;
3083	}
3084
3085	/**
3086	* Callback employed by buslogicR3Suspend and buslogicR3PowerOff..
3087	*
3088	* @returns true if we've quiesced, false if we're still working.
3089	* @param pDevIns The device instance.
3090	*/
3091	static DECLCALLBACK(bool) buslogicR3IsAsyncSuspendOrPowerOffDone(PPDMDEVINS pDevIns)
3092	{
3093	if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
3094	return false;
3095
3096	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3097	ASMAtomicWriteBool(&pThis->fSignalIdle, false);
3098	return true;
3099	}
3100
3101	/**
3102	* Common worker for ahciR3Suspend and ahciR3PowerOff.
3103	*/
3104	static void buslogicR3SuspendOrPowerOff(PPDMDEVINS pDevIns, bool fPowerOff)
3105	{
3106	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3107
3108	ASMAtomicWriteBool(&pThis->fSignalIdle, true);
3109	if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
3110	PDMDevHlpSetAsyncNotification(pDevIns, buslogicR3IsAsyncSuspendOrPowerOffDone);
3111	else
3112	{
3113	ASMAtomicWriteBool(&pThis->fSignalIdle, false);
3114
3115	AssertMsg(!pThis->fNotificationSend, ("The PDM Queue should be empty at this point\n"));
3116
3117	if (pThis->fRedo)
3118	{
3119	if (fPowerOff)
3120	{
3121	/* Free tasks which would have been queued again on resume. */
3122	PBUSLOGICTASKSTATE pTaskState = pThis->pTasksRedoHead;
3123
3124	pThis->pTasksRedoHead = NULL;
3125
3126	while (pTaskState)
3127	{
3128	PBUSLOGICTASKSTATE pFree;
3129
3130	pFree = pTaskState;
3131	pTaskState = pTaskState->pRedoNext;
3132
3133	RTMemCacheFree(pThis->hTaskCache, pFree);
3134	}
3135	pThis->fRedo = false;
3136	}
3137	else if (pThis->VBoxSCSI.fBusy)
3138	{
3139	/* Destroy the task because the BIOS interface has all necessary information. */
3140	Assert(pThis->pTasksRedoHead->fBIOS);
3141	Assert(!pThis->pTasksRedoHead->pRedoNext);
3142
3143	RTMemCacheFree(pThis->hTaskCache, pThis->pTasksRedoHead);
3144	pThis->pTasksRedoHead = NULL;
3145	}
3146	}
3147	}
3148	}
3149
3150	/**
3151	* Suspend notification.
3152	*
3153	* @param pDevIns The device instance data.
3154	*/
3155	static DECLCALLBACK(void) buslogicSuspend(PPDMDEVINS pDevIns)
3156	{
3157	Log(("buslogicSuspend\n"));
3158	buslogicR3SuspendOrPowerOff(pDevIns, false /* fPoweroff */);
3159	}
3160
3161	/**
3162	* Resume notification.
3163	*
3164	* @param pDevIns The device instance data.
3165	*/
3166	static DECLCALLBACK(void) buslogicResume(PPDMDEVINS pDevIns)
3167	{
3168	Log(("buslogicResume\n"));
3169	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3170	buslogicKick(pThis);
3171	}
3172
3173
3174	/**
3175	* Detach notification.
3176	*
3177	* One harddisk at one port has been unplugged.
3178	* The VM is suspended at this point.
3179	*
3180	* @param pDevIns The device instance.
3181	* @param iLUN The logical unit which is being detached.
3182	* @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
3183	*/
3184	static DECLCALLBACK(void) buslogicDetach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
3185	{
3186	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3187	PBUSLOGICDEVICE pDevice = &pThis->aDeviceStates[iLUN];
3188
3189	Log(("%s:\n", __FUNCTION__));
3190
3191	AssertMsg(fFlags & PDM_TACH_FLAGS_NOT_HOT_PLUG,
3192	("BusLogic: Device does not support hotplugging\n"));
3193
3194	/*
3195	* Zero some important members.
3196	*/
3197	pDevice->pDrvBase = NULL;
3198	pDevice->fPresent = false;
3199	pDevice->pDrvSCSIConnector = NULL;
3200	}
3201
3202	/**
3203	* Attach command.
3204	*
3205	* This is called when we change block driver.
3206	*
3207	* @returns VBox status code.
3208	* @param pDevIns The device instance.
3209	* @param iLUN The logical unit which is being detached.
3210	* @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
3211	*/
3212	static DECLCALLBACK(int) buslogicAttach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
3213	{
3214	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3215	PBUSLOGICDEVICE pDevice = &pThis->aDeviceStates[iLUN];
3216	int rc;
3217
3218	AssertMsgReturn(fFlags & PDM_TACH_FLAGS_NOT_HOT_PLUG,
3219	("BusLogic: Device does not support hotplugging\n"),
3220	VERR_INVALID_PARAMETER);
3221
3222	/* the usual paranoia */
3223	AssertRelease(!pDevice->pDrvBase);
3224	AssertRelease(!pDevice->pDrvSCSIConnector);
3225	Assert(pDevice->iLUN == iLUN);
3226
3227	/*
3228	* Try attach the block device and get the interfaces,
3229	* required as well as optional.
3230	*/
3231	rc = PDMDevHlpDriverAttach(pDevIns, pDevice->iLUN, &pDevice->IBase, &pDevice->pDrvBase, NULL);
3232	if (RT_SUCCESS(rc))
3233	{
3234	/* Get SCSI connector interface. */
3235	pDevice->pDrvSCSIConnector = PDMIBASE_QUERY_INTERFACE(pDevice->pDrvBase, PDMISCSICONNECTOR);
3236	AssertMsgReturn(pDevice->pDrvSCSIConnector, ("Missing SCSI interface below\n"), VERR_PDM_MISSING_INTERFACE);
3237	pDevice->fPresent = true;
3238	}
3239	else
3240	AssertMsgFailed(("Failed to attach LUN#%d. rc=%Rrc\n", pDevice->iLUN, rc));
3241
3242	if (RT_FAILURE(rc))
3243	{
3244	pDevice->pDrvBase = NULL;
3245	pDevice->pDrvSCSIConnector = NULL;
3246	}
3247	return rc;
3248	}
3249
3250	/**
3251	* Callback employed by buslogicR3Reset.
3252	*
3253	* @returns true if we've quiesced, false if we're still working.
3254	* @param pDevIns The device instance.
3255	*/
3256	static DECLCALLBACK(bool) buslogicR3IsAsyncResetDone(PPDMDEVINS pDevIns)
3257	{
3258	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3259
3260	if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
3261	return false;
3262	ASMAtomicWriteBool(&pThis->fSignalIdle, false);
3263
3264	buslogicHwReset(pThis, true);
3265	return true;
3266	}
3267
3268	/**
3269	* @copydoc FNPDMDEVRESET
3270	*/
3271	static DECLCALLBACK(void) buslogicReset(PPDMDEVINS pDevIns)
3272	{
3273	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3274
3275	ASMAtomicWriteBool(&pThis->fSignalIdle, true);
3276	if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
3277	PDMDevHlpSetAsyncNotification(pDevIns, buslogicR3IsAsyncResetDone);
3278	else
3279	{
3280	ASMAtomicWriteBool(&pThis->fSignalIdle, false);
3281	buslogicHwReset(pThis, true);
3282	}
3283	}
3284
3285	static DECLCALLBACK(void) buslogicRelocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta)
3286	{
3287	uint32_t i;
3288	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3289
3290	pBusLogic->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
3291	pBusLogic->pNotifierQueueRC = PDMQueueRCPtr(pBusLogic->pNotifierQueueR3);
3292
3293	for (i = 0; i < BUSLOGIC_MAX_DEVICES; i++)
3294	{
3295	PBUSLOGICDEVICE pDevice = &pBusLogic->aDeviceStates[i];
3296
3297	pDevice->pBusLogicRC = PDMINS_2_DATA_RCPTR(pDevIns);
3298	}
3299
3300	}
3301
3302	/**
3303	* Poweroff notification.
3304	*
3305	* @param pDevIns Pointer to the device instance
3306	*/
3307	static DECLCALLBACK(void) buslogicPowerOff(PPDMDEVINS pDevIns)
3308	{
3309	Log(("buslogicPowerOff\n"));
3310	buslogicR3SuspendOrPowerOff(pDevIns, true /* fPoweroff */);
3311	}
3312
3313	/**
3314	* Destroy a driver instance.
3315	*
3316	* Most VM resources are freed by the VM. This callback is provided so that any non-VM
3317	* resources can be freed correctly.
3318	*
3319	* @param pDevIns The device instance data.
3320	*/
3321	static DECLCALLBACK(int) buslogicDestruct(PPDMDEVINS pDevIns)
3322	{
3323	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3324	PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns);
3325
3326	PDMR3CritSectDelete(&pThis->CritSectIntr);
3327
3328	/*
3329	* Free all tasks which are still hanging around
3330	* (Power off after the VM was suspended).
3331	*/
3332	if (pThis->fRedo)
3333	{
3334	/* Free tasks which would have been queued again on resume. */
3335	PBUSLOGICTASKSTATE pTaskState = pThis->pTasksRedoHead;
3336
3337	pThis->pTasksRedoHead = NULL;
3338
3339	while (pTaskState)
3340	{
3341	PBUSLOGICTASKSTATE pFree;
3342
3343	pFree = pTaskState;
3344	pTaskState = pTaskState->pRedoNext;
3345
3346	RTMemCacheFree(pThis->hTaskCache, pFree);
3347	}
3348	pThis->fRedo = false;
3349	}
3350
3351	int rc = RTMemCacheDestroy(pThis->hTaskCache);
3352	AssertMsgRC(rc, ("Destroying task cache failed rc=%Rrc\n", rc));
3353
3354	return rc;
3355	}
3356
3357	/**
3358	* @interface_method_impl{PDMDEVREG,pfnConstruct}
3359	*/
3360	static DECLCALLBACK(int) buslogicConstruct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
3361	{
3362	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3363	int rc = VINF_SUCCESS;
3364	bool fBootable = true;
3365	char achISACompat[16];
3366	PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
3367
3368	/*
3369	* Validate and read configuration.
3370	*/
3371	if (!CFGMR3AreValuesValid(pCfg,
3372	"GCEnabled\0"
3373	"R0Enabled\0"
3374	"Bootable\0"
3375	"ISACompat\0"))
3376	return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
3377	N_("BusLogic configuration error: unknown option specified"));
3378
3379	rc = CFGMR3QueryBoolDef(pCfg, "GCEnabled", &pThis->fGCEnabled, true);
3380	if (RT_FAILURE(rc))
3381	return PDMDEV_SET_ERROR(pDevIns, rc,
3382	N_("BusLogic configuration error: failed to read GCEnabled as boolean"));
3383	Log(("%s: fGCEnabled=%d\n", __FUNCTION__, pThis->fGCEnabled));
3384
3385	rc = CFGMR3QueryBoolDef(pCfg, "R0Enabled", &pThis->fR0Enabled, true);
3386	if (RT_FAILURE(rc))
3387	return PDMDEV_SET_ERROR(pDevIns, rc,
3388	N_("BusLogic configuration error: failed to read R0Enabled as boolean"));
3389	Log(("%s: fR0Enabled=%d\n", __FUNCTION__, pThis->fR0Enabled));
3390	rc = CFGMR3QueryBoolDef(pCfg, "Bootable", &fBootable, true);
3391	if (RT_FAILURE(rc))
3392	return PDMDEV_SET_ERROR(pDevIns, rc,
3393	N_("BusLogic configuration error: failed to read Bootable as boolean"));
3394	Log(("%s: fBootable=%RTbool\n", __FUNCTION__, fBootable));
3395	rc = CFGMR3QueryStringDef(pCfg, "ISACompat", achISACompat, sizeof(achISACompat), "Alternate");
3396	if (RT_FAILURE(rc))
3397	return PDMDEV_SET_ERROR(pDevIns, rc,
3398	N_("BusLogic configuration error: failed to read ISACompat as string"));
3399	Log(("%s: ISACompat=%s\n", __FUNCTION__, achISACompat));
3400
3401	/* Grok the ISACompat setting. */
3402	if (!strcmp(achISACompat, "Disabled"))
3403	pThis->uDefaultISABaseCode = ISA_BASE_DISABLED;
3404	else if (!strcmp(achISACompat, "Primary"))
3405	pThis->uDefaultISABaseCode = 0; /* I/O base at 330h. */
3406	else if (!strcmp(achISACompat, "Alternate"))
3407	pThis->uDefaultISABaseCode = 1; /* I/O base at 334h. */
3408	else
3409	return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
3410	N_("BusLogic configuration error: invalid ISACompat setting"));
3411
3412	pThis->pDevInsR3 = pDevIns;
3413	pThis->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
3414	pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
3415	pThis->IBase.pfnQueryInterface = buslogicStatusQueryInterface;
3416	pThis->ILeds.pfnQueryStatusLed = buslogicStatusQueryStatusLed;
3417
3418	PCIDevSetVendorId (&pThis->dev, 0x104b); /* BusLogic */
3419	PCIDevSetDeviceId (&pThis->dev, 0x1040); /* BT-958 */
3420	PCIDevSetCommand (&pThis->dev, 0x0003);
3421	PCIDevSetRevisionId (&pThis->dev, 0x01);
3422	PCIDevSetClassProg (&pThis->dev, 0x00); /* SCSI */
3423	PCIDevSetClassSub (&pThis->dev, 0x00); /* SCSI */
3424	PCIDevSetClassBase (&pThis->dev, 0x01); /* Mass storage */
3425	PCIDevSetBaseAddress (&pThis->dev, 0, true /IO/, false /Pref/, false /64-bit/, 0x00000000);
3426	PCIDevSetBaseAddress (&pThis->dev, 1, false /IO/, false /Pref/, false /64-bit/, 0x00000000);
3427	PCIDevSetSubSystemVendorId(&pThis->dev, 0x104b);
3428	PCIDevSetSubSystemId (&pThis->dev, 0x1040);
3429	PCIDevSetInterruptLine (&pThis->dev, 0x00);
3430	PCIDevSetInterruptPin (&pThis->dev, 0x01);
3431
3432	/*
3433	* Register the PCI device and its I/O regions.
3434	*/
3435	rc = PDMDevHlpPCIRegister (pDevIns, &pThis->dev);
3436	if (RT_FAILURE(rc))
3437	return rc;
3438
3439	rc = PDMDevHlpPCIIORegionRegister(pDevIns, 0, 32, PCI_ADDRESS_SPACE_IO, buslogicMMIOMap);
3440	if (RT_FAILURE(rc))
3441	return rc;
3442
3443	rc = PDMDevHlpPCIIORegionRegister(pDevIns, 1, 32, PCI_ADDRESS_SPACE_MEM, buslogicMMIOMap);
3444	if (RT_FAILURE(rc))
3445	return rc;
3446
3447	if (fBootable)
3448	{
3449	/* Register I/O port space for BIOS access. */
3450	rc = PDMDevHlpIOPortRegister(pDevIns, BUSLOGIC_BIOS_IO_PORT, 4, NULL,
3451	buslogicBIOSIOPortWrite, buslogicBIOSIOPortRead,
3452	buslogicBIOSIOPortWriteStr, buslogicBIOSIOPortReadStr,
3453	"BusLogic BIOS");
3454	if (RT_FAILURE(rc))
3455	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot register BIOS I/O handlers"));
3456	}
3457
3458	/* Set up the compatibility I/O range. */
3459	rc = buslogicRegisterISARange(pThis, pThis->uDefaultISABaseCode);
3460	if (RT_FAILURE(rc))
3461	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot register ISA I/O handlers"));
3462
3463	/* Initialize task cache. */
3464	rc = RTMemCacheCreate(&pThis->hTaskCache, sizeof(BUSLOGICTASKSTATE), 0, UINT32_MAX,
3465	NULL, NULL, NULL, 0);
3466	if (RT_FAILURE(rc))
3467	return PDMDEV_SET_ERROR(pDevIns, rc,
3468	N_("BusLogic: Failed to initialize task cache\n"));
3469
3470	/* Initialize task queue. */
3471	rc = PDMDevHlpQueueCreate(pDevIns, sizeof(PDMQUEUEITEMCORE), 5, 0,
3472	buslogicNotifyQueueConsumer, true, "BusLogicTask", &pThis->pNotifierQueueR3);
3473	if (RT_FAILURE(rc))
3474	return rc;
3475	pThis->pNotifierQueueR0 = PDMQueueR0Ptr(pThis->pNotifierQueueR3);
3476	pThis->pNotifierQueueRC = PDMQueueRCPtr(pThis->pNotifierQueueR3);
3477
3478	rc = PDMDevHlpCritSectInit(pDevIns, &pThis->CritSectIntr, RT_SRC_POS, "BusLogic-Intr#%u", pDevIns->iInstance);
3479	if (RT_FAILURE(rc))
3480	return PDMDEV_SET_ERROR(pDevIns, rc,
3481	N_("BusLogic: cannot create critical section"));
3482
3483	/* Initialize per device state. */
3484	for (unsigned i = 0; i < RT_ELEMENTS(pThis->aDeviceStates); i++)
3485	{
3486	char szName[24];
3487	PBUSLOGICDEVICE pDevice = &pThis->aDeviceStates[i];
3488
3489	RTStrPrintf(szName, sizeof(szName), "Device%d", i);
3490
3491	/* Initialize static parts of the device. */
3492	pDevice->iLUN = i;
3493	pDevice->pBusLogicR3 = pThis;
3494	pDevice->pBusLogicR0 = PDMINS_2_DATA_R0PTR(pDevIns);
3495	pDevice->pBusLogicRC = PDMINS_2_DATA_RCPTR(pDevIns);
3496	pDevice->Led.u32Magic = PDMLED_MAGIC;
3497	pDevice->IBase.pfnQueryInterface = buslogicDeviceQueryInterface;
3498	pDevice->ISCSIPort.pfnSCSIRequestCompleted = buslogicDeviceSCSIRequestCompleted;
3499	pDevice->ISCSIPort.pfnQueryDeviceLocation = buslogicQueryDeviceLocation;
3500	pDevice->ILed.pfnQueryStatusLed = buslogicDeviceQueryStatusLed;
3501
3502	/* Attach SCSI driver. */
3503	rc = PDMDevHlpDriverAttach(pDevIns, pDevice->iLUN, &pDevice->IBase, &pDevice->pDrvBase, szName);
3504	if (RT_SUCCESS(rc))
3505	{
3506	/* Get SCSI connector interface. */
3507	pDevice->pDrvSCSIConnector = PDMIBASE_QUERY_INTERFACE(pDevice->pDrvBase, PDMISCSICONNECTOR);
3508	AssertMsgReturn(pDevice->pDrvSCSIConnector, ("Missing SCSI interface below\n"), VERR_PDM_MISSING_INTERFACE);
3509
3510	pDevice->fPresent = true;
3511	}
3512	else if (rc == VERR_PDM_NO_ATTACHED_DRIVER)
3513	{
3514	pDevice->pDrvBase = NULL;
3515	pDevice->fPresent = false;
3516	rc = VINF_SUCCESS;
3517	Log(("BusLogic: no driver attached to device %s\n", szName));
3518	}
3519	else
3520	{
3521	AssertLogRelMsgFailed(("BusLogic: Failed to attach %s\n", szName));
3522	return rc;
3523	}
3524	}
3525
3526	/*
3527	* Attach status driver (optional).
3528	*/
3529	PPDMIBASE pBase;
3530	rc = PDMDevHlpDriverAttach(pDevIns, PDM_STATUS_LUN, &pThis->IBase, &pBase, "Status Port");
3531	if (RT_SUCCESS(rc))
3532	pThis->pLedsConnector = PDMIBASE_QUERY_INTERFACE(pBase, PDMILEDCONNECTORS);
3533	else if (rc != VERR_PDM_NO_ATTACHED_DRIVER)
3534	{
3535	AssertMsgFailed(("Failed to attach to status driver. rc=%Rrc\n", rc));
3536	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot attach to status driver"));
3537	}
3538
3539	rc = PDMDevHlpSSMRegisterEx(pDevIns, BUSLOGIC_SAVED_STATE_MINOR_VERSION, sizeof(*pThis), NULL,
3540	NULL, buslogicLiveExec, NULL,
3541	NULL, buslogicSaveExec, NULL,
3542	NULL, buslogicLoadExec, buslogicLoadDone);
3543	if (RT_FAILURE(rc))
3544	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot register save state handlers"));
3545
3546	/*
3547	* Register the debugger info callback.
3548	*/
3549	char szTmp[128];
3550	RTStrPrintf(szTmp, sizeof(szTmp), "%s%d", pDevIns->pReg->szName, pDevIns->iInstance);
3551	PDMDevHlpDBGFInfoRegister(pDevIns, szTmp, "BusLogic HBA info", buslogicInfo);
3552
3553	rc = buslogicHwReset(pThis, true);
3554	AssertMsgRC(rc, ("hardware reset of BusLogic host adapter failed rc=%Rrc\n", rc));
3555
3556	return rc;
3557	}
3558
3559	/**
3560	* The device registration structure.
3561	*/
3562	const PDMDEVREG g_DeviceBusLogic =
3563	{
3564	/* u32Version */
3565	PDM_DEVREG_VERSION,
3566	/* szName */
3567	"buslogic",
3568	/* szRCMod */
3569	"VBoxDDGC.gc",
3570	/* szR0Mod */
3571	"VBoxDDR0.r0",
3572	/* pszDescription */
3573	"BusLogic BT-958 SCSI host adapter.\n",
3574	/* fFlags */
3575	PDM_DEVREG_FLAGS_DEFAULT_BITS \| PDM_DEVREG_FLAGS_RC \| PDM_DEVREG_FLAGS_R0 \|
3576	PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION \| PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION \|
3577	PDM_DEVREG_FLAGS_FIRST_RESET_NOTIFICATION,
3578	/* fClass */
3579	PDM_DEVREG_CLASS_STORAGE,
3580	/* cMaxInstances */
3581	~0U,
3582	/* cbInstance */
3583	sizeof(BUSLOGIC),
3584	/* pfnConstruct */
3585	buslogicConstruct,
3586	/* pfnDestruct */
3587	buslogicDestruct,
3588	/* pfnRelocate */
3589	buslogicRelocate,
3590	/* pfnIOCtl */
3591	NULL,
3592	/* pfnPowerOn */
3593	NULL,
3594	/* pfnReset */
3595	buslogicReset,
3596	/* pfnSuspend */
3597	buslogicSuspend,
3598	/* pfnResume */
3599	buslogicResume,
3600	/* pfnAttach */
3601	buslogicAttach,
3602	/* pfnDetach */
3603	buslogicDetach,
3604	/* pfnQueryInterface. */
3605	NULL,
3606	/* pfnInitComplete */
3607	NULL,
3608	/* pfnPowerOff */
3609	buslogicPowerOff,
3610	/* pfnSoftReset */
3611	NULL,
3612	/* u32VersionEnd */
3613	PDM_DEVREG_VERSION
3614	};
3615
3616	#endif /* IN_RING3 */
3617	#endif /* !VBOX_DEVICE_STRUCT_TESTCASE */

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source: vbox/trunk/src/VBox/Devices/Storage/DevBusLogic.cpp@ 44124

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