DevBusLogic.cpp@ 43646

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1	/* $Id: DevBusLogic.cpp 43646 2012-10-15 14:11:35Z vboxsync $ */
2	/** @file
3	* VBox storage devices: BusLogic SCSI host adapter BT-958.
4	*/
5
6	/*
7	* Copyright (C) 2006-2012 Oracle Corporation
8	*
9	* This file is part of VirtualBox Open Source Edition (OSE), as
10	* available from http://www.virtualbox.org. This file is free software;
11	* you can redistribute it and/or modify it under the terms of the GNU
12	* General Public License (GPL) as published by the Free Software
13	* Foundation, in version 2 as it comes in the "COPYING" file of the
14	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16	*/
17
18	/* Based on the Multi-Master Ultra SCSI Systems Technical Reference Manual */
19
20	/*******************************************************************************
21	* Header Files *
22	*******************************************************************************/
23
24	#define LOG_GROUP LOG_GROUP_DEV_BUSLOGIC
25	#include <VBox/vmm/pdmdev.h>
26	#include <VBox/vmm/pdmifs.h>
27	#include <VBox/vmm/pdmcritsect.h>
28	#include <VBox/scsi.h>
29	#include <iprt/asm.h>
30	#include <iprt/assert.h>
31	#include <iprt/string.h>
32	#include <iprt/log.h>
33	#ifdef IN_RING3
34	# include <iprt/alloc.h>
35	# include <iprt/memcache.h>
36	# include <iprt/param.h>
37	# include <iprt/uuid.h>
38	#endif
39
40	#include "VBoxSCSI.h"
41	#include "VBoxDD.h"
42
43	/* Maximum number of attached devices the adapter can handle. */
44	#define BUSLOGIC_MAX_DEVICES 16
45
46	/* Maximum number of scatter gather elements this device can handle. */
47	#define BUSLOGIC_MAX_SCATTER_GATHER_LIST_SIZE 128
48
49	/* Size of the command buffer. */
50	#define BUSLOGIC_COMMAND_SIZE_MAX 5
51
52	/* Size of the reply buffer. */
53	#define BUSLOGIC_REPLY_SIZE_MAX 64
54
55	/*
56	* Custom fixed I/O ports for BIOS controller access. Note that these should
57	* not be in the ISA range (below 400h) to avoid conflicts with ISA device
58	* probing. Addresses in the 300h-340h range should be especially avoided.
59	*/
60
61	#define BUSLOGIC_BIOS_IO_PORT 0x330
62
63	/** State saved version. */
64	#define BUSLOGIC_SAVED_STATE_MINOR_VERSION 2
65
66	/** Saved state version before the suspend on error feature was implemented. */
67	#define BUSLOGIC_SAVED_STATE_MINOR_PRE_ERROR_HANDLING 1
68
69	/** The duration of software-initiated reset. Not documented, set to 2 ms. */
70	#define BUSLOGIC_RESET_DURATION_NS (2000*1000)
71
72	/**
73	* State of a device attached to the buslogic host adapter.
74	*
75	* @implements PDMIBASE
76	* @implements PDMISCSIPORT
77	* @implements PDMILEDPORTS
78	*/
79	typedef struct BUSLOGICDEVICE
80	{
81	/** Pointer to the owning buslogic device instance. - R3 pointer */
82	R3PTRTYPE(struct BUSLOGIC *) pBusLogicR3;
83	/** Pointer to the owning buslogic device instance. - R0 pointer */
84	R0PTRTYPE(struct BUSLOGIC *) pBusLogicR0;
85	/** Pointer to the owning buslogic device instance. - RC pointer */
86	RCPTRTYPE(struct BUSLOGIC *) pBusLogicRC;
87
88	/** Flag whether device is present. */
89	bool fPresent;
90	/** LUN of the device. */
91	RTUINT iLUN;
92
93	#if HC_ARCH_BITS == 64
94	uint32_t Alignment0;
95	#endif
96
97	/** Our base interface. */
98	PDMIBASE IBase;
99	/** SCSI port interface. */
100	PDMISCSIPORT ISCSIPort;
101	/** Led interface. */
102	PDMILEDPORTS ILed;
103	/** Pointer to the attached driver's base interface. */
104	R3PTRTYPE(PPDMIBASE) pDrvBase;
105	/** Pointer to the underlying SCSI connector interface. */
106	R3PTRTYPE(PPDMISCSICONNECTOR) pDrvSCSIConnector;
107	/** The status LED state for this device. */
108	PDMLED Led;
109
110	#if HC_ARCH_BITS == 64
111	uint32_t Alignment1;
112	#endif
113
114	/** Number of outstanding tasks on the port. */
115	volatile uint32_t cOutstandingRequests;
116
117	} BUSLOGICDEVICE, *PBUSLOGICDEVICE;
118
119	/*
120	* Commands the BusLogic adapter supports.
121	*/
122	enum BUSLOGICCOMMAND
123	{
124	BUSLOGICCOMMAND_TEST_CMDC_INTERRUPT = 0x00,
125	BUSLOGICCOMMAND_INITIALIZE_MAILBOX = 0x01,
126	BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND = 0x02,
127	BUSLOGICCOMMAND_EXECUTE_BIOS_COMMAND = 0x03,
128	BUSLOGICCOMMAND_INQUIRE_BOARD_ID = 0x04,
129	BUSLOGICCOMMAND_ENABLE_OUTGOING_MAILBOX_AVAILABLE_INTERRUPT = 0x05,
130	BUSLOGICCOMMAND_SET_SCSI_SELECTION_TIMEOUT = 0x06,
131	BUSLOGICCOMMAND_SET_PREEMPT_TIME_ON_BUS = 0x07,
132	BUSLOGICCOMMAND_SET_TIME_OFF_BUS = 0x08,
133	BUSLOGICCOMMAND_SET_BUS_TRANSFER_RATE = 0x09,
134	BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_0_TO_7 = 0x0a,
135	BUSLOGICCOMMAND_INQUIRE_CONFIGURATION = 0x0b,
136	BUSLOGICCOMMAND_ENABLE_TARGET_MODE = 0x0c,
137	BUSLOGICCOMMAND_INQUIRE_SETUP_INFORMATION = 0x0d,
138	BUSLOGICCOMMAND_WRITE_ADAPTER_LOCAL_RAM = 0x1a,
139	BUSLOGICCOMMAND_READ_ADAPTER_LOCAL_RAM = 0x1b,
140	BUSLOGICCOMMAND_WRITE_BUSMASTER_CHIP_FIFO = 0x1c,
141	BUSLOGICCOMMAND_READ_BUSMASTER_CHIP_FIFO = 0x1d,
142	BUSLOGICCOMMAND_ECHO_COMMAND_DATA = 0x1f,
143	BUSLOGICCOMMAND_HOST_ADAPTER_DIAGNOSTIC = 0x20,
144	BUSLOGICCOMMAND_SET_ADAPTER_OPTIONS = 0x21,
145	BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_8_TO_15 = 0x23,
146	BUSLOGICCOMMAND_INQUIRE_TARGET_DEVICES = 0x24,
147	BUSLOGICCOMMAND_DISABLE_HOST_ADAPTER_INTERRUPT = 0x25,
148	BUSLOGICCOMMAND_EXT_BIOS_INFO = 0x28,
149	BUSLOGICCOMMAND_UNLOCK_MAILBOX = 0x29,
150	BUSLOGICCOMMAND_INITIALIZE_EXTENDED_MAILBOX = 0x81,
151	BUSLOGICCOMMAND_EXECUTE_SCSI_COMMAND = 0x83,
152	BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_3RD_LETTER = 0x84,
153	BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_LETTER = 0x85,
154	BUSLOGICCOMMAND_INQUIRE_PCI_HOST_ADAPTER_INFORMATION = 0x86,
155	BUSLOGICCOMMAND_INQUIRE_HOST_ADAPTER_MODEL_NUMBER = 0x8b,
156	BUSLOGICCOMMAND_INQUIRE_SYNCHRONOUS_PERIOD = 0x8c,
157	BUSLOGICCOMMAND_INQUIRE_EXTENDED_SETUP_INFORMATION = 0x8d,
158	BUSLOGICCOMMAND_ENABLE_STRICT_ROUND_ROBIN_MODE = 0x8f,
159	BUSLOGICCOMMAND_STORE_HOST_ADAPTER_LOCAL_RAM = 0x90,
160	BUSLOGICCOMMAND_FETCH_HOST_ADAPTER_LOCAL_RAM = 0x91,
161	BUSLOGICCOMMAND_STORE_LOCAL_DATA_IN_EEPROM = 0x92,
162	BUSLOGICCOMMAND_UPLOAD_AUTO_SCSI_CODE = 0x94,
163	BUSLOGICCOMMAND_MODIFY_IO_ADDRESS = 0x95,
164	BUSLOGICCOMMAND_SET_CCB_FORMAT = 0x96,
165	BUSLOGICCOMMAND_WRITE_INQUIRY_BUFFER = 0x9a,
166	BUSLOGICCOMMAND_READ_INQUIRY_BUFFER = 0x9b,
167	BUSLOGICCOMMAND_FLASH_ROM_UPLOAD_DOWNLOAD = 0xa7,
168	BUSLOGICCOMMAND_READ_SCAM_DATA = 0xa8,
169	BUSLOGICCOMMAND_WRITE_SCAM_DATA = 0xa9
170	} BUSLOGICCOMMAND;
171
172	#pragma pack(1)
173	/**
174	* Auto SCSI structure which is located
175	* in host adapter RAM and contains several
176	* configuration parameters.
177	*/
178	typedef struct AutoSCSIRam
179	{
180	uint8_t aInternalSignature[2];
181	uint8_t cbInformation;
182	uint8_t aHostAdaptertype[6];
183	uint8_t uReserved1;
184	bool fFloppyEnabled: 1;
185	bool fFloppySecondary: 1;
186	bool fLevelSensitiveInterrupt: 1;
187	unsigned char uReserved2: 2;
188	unsigned char uSystemRAMAreForBIOS: 3;
189	unsigned char uDMAChannel: 7;
190	bool fDMAAutoConfiguration: 1;
191	unsigned char uIrqChannel: 7;
192	bool fIrqAutoConfiguration: 1;
193	uint8_t uDMATransferRate;
194	uint8_t uSCSIId;
195	bool fLowByteTerminated: 1;
196	bool fParityCheckingEnabled: 1;
197	bool fHighByteTerminated: 1;
198	bool fNoisyCablingEnvironment: 1;
199	bool fFastSynchronousNeogtiation: 1;
200	bool fBusResetEnabled: 1;
201	bool fReserved3: 1;
202	bool fActiveNegotiationEnabled: 1;
203	uint8_t uBusOnDelay;
204	uint8_t uBusOffDelay;
205	bool fHostAdapterBIOSEnabled: 1;
206	bool fBIOSRedirectionOfInt19: 1;
207	bool fExtendedTranslation: 1;
208	bool fMapRemovableAsFixed: 1;
209	bool fReserved4: 1;
210	bool fBIOSSupportsMoreThan2Drives: 1;
211	bool fBIOSInterruptMode: 1;
212	bool fFlopticalSupport: 1;
213	uint16_t u16DeviceEnabledMask;
214	uint16_t u16WidePermittedMask;
215	uint16_t u16FastPermittedMask;
216	uint16_t u16SynchronousPermittedMask;
217	uint16_t u16DisconnectPermittedMask;
218	uint16_t u16SendStartUnitCommandMask;
219	uint16_t u16IgnoreInBIOSScanMask;
220	unsigned char uPCIInterruptPin: 2;
221	unsigned char uHostAdapterIoPortAddress: 2;
222	bool fStrictRoundRobinMode: 1;
223	bool fVesaBusSpeedGreaterThan33MHz: 1;
224	bool fVesaBurstWrite: 1;
225	bool fVesaBurstRead: 1;
226	uint16_t u16UltraPermittedMask;
227	uint32_t uReserved5;
228	uint8_t uReserved6;
229	uint8_t uAutoSCSIMaximumLUN;
230	bool fReserved7: 1;
231	bool fSCAMDominant: 1;
232	bool fSCAMenabled: 1;
233	bool fSCAMLevel2: 1;
234	unsigned char uReserved8: 4;
235	bool fInt13Extension: 1;
236	bool fReserved9: 1;
237	bool fCDROMBoot: 1;
238	unsigned char uReserved10: 5;
239	unsigned char uBootTargetId: 4;
240	unsigned char uBootChannel: 4;
241	bool fForceBusDeviceScanningOrder: 1;
242	unsigned char uReserved11: 7;
243	uint16_t u16NonTaggedToAlternateLunPermittedMask;
244	uint16_t u16RenegotiateSyncAfterCheckConditionMask;
245	uint8_t aReserved12[10];
246	uint8_t aManufacturingDiagnostic[2];
247	uint16_t u16Checksum;
248	} AutoSCSIRam, *PAutoSCSIRam;
249	AssertCompileSize(AutoSCSIRam, 64);
250	#pragma pack()
251
252	/**
253	* The local Ram.
254	*/
255	typedef union HostAdapterLocalRam
256	{
257	/* Byte view. */
258	uint8_t u8View[256];
259	/* Structured view. */
260	struct
261	{
262	/** Offset 0 - 63 is for BIOS. */
263	uint8_t u8Bios[64];
264	/** Auto SCSI structure. */
265	AutoSCSIRam autoSCSIData;
266	} structured;
267	} HostAdapterLocalRam, *PHostAdapterLocalRam;
268	AssertCompileSize(HostAdapterLocalRam, 256);
269
270	/* Compatible ISA base I/O port addresses. Disabled if zero. */
271	#define NUM_ISA_BASES 8
272	#define MAX_ISA_BASE (NUM_ISA_BASES - 1)
273	#define ISA_BASE_DISABLED 6
274
275	static uint16_t aISABases[NUM_ISA_BASES] = {
276	0x330, 0x334, 0x230, 0x234, 0x130, 0x134, 0, 0
277	};
278
279	/** Pointer to a task state structure. */
280	typedef struct BUSLOGICTASKSTATE *PBUSLOGICTASKSTATE;
281
282	/**
283	* Main BusLogic device state.
284	*
285	* @extends PCIDEVICE
286	* @implements PDMILEDPORTS
287	*/
288	typedef struct BUSLOGIC
289	{
290	/** The PCI device structure. */
291	PCIDEVICE dev;
292	/** Pointer to the device instance - HC ptr */
293	PPDMDEVINSR3 pDevInsR3;
294	/** Pointer to the device instance - R0 ptr */
295	PPDMDEVINSR0 pDevInsR0;
296	/** Pointer to the device instance - RC ptr. */
297	PPDMDEVINSRC pDevInsRC;
298
299	/** Whether R0 is enabled. */
300	bool fR0Enabled;
301	/** Whether RC is enabled. */
302	bool fGCEnabled;
303
304	/** Base address of the I/O ports. */
305	RTIOPORT IOPortBase;
306	/** Base address of the memory mapping. */
307	RTGCPHYS MMIOBase;
308	/** Status register - Readonly. */
309	volatile uint8_t regStatus;
310	/** Interrupt register - Readonly. */
311	volatile uint8_t regInterrupt;
312	/** Geometry register - Readonly. */
313	volatile uint8_t regGeometry;
314	/** Pending (delayed) interrupt. */
315	uint8_t uPendingIntr;
316
317	/** Local RAM for the fetch hostadapter local RAM request.
318	* I don't know how big the buffer really is but the maximum
319	* seems to be 256 bytes because the offset and count field in the command request
320	* are only one byte big.
321	*/
322	HostAdapterLocalRam LocalRam;
323
324	/** Command code the guest issued. */
325	uint8_t uOperationCode;
326	/** Buffer for the command parameters the adapter is currently receiving from the guest.
327	* Size of the largest command which is possible.
328	*/
329	uint8_t aCommandBuffer[BUSLOGIC_COMMAND_SIZE_MAX]; /* Size of the biggest request. */
330	/** Current position in the command buffer. */
331	uint8_t iParameter;
332	/** Parameters left until the command is complete. */
333	uint8_t cbCommandParametersLeft;
334
335	/** Whether we are using the RAM or reply buffer. */
336	bool fUseLocalRam;
337	/** Buffer to store reply data from the controller to the guest. */
338	uint8_t aReplyBuffer[BUSLOGIC_REPLY_SIZE_MAX]; /* Size of the biggest reply. */
339	/** Position in the buffer we are reading next. */
340	uint8_t iReply;
341	/** Bytes left until the reply buffer is empty. */
342	uint8_t cbReplyParametersLeft;
343
344	/** Flag whether IRQs are enabled. */
345	bool fIRQEnabled;
346	/** Flag whether the ISA I/O port range is disabled
347	* to prevent the BIOS to access the device. */
348	bool fISAEnabled; //@todo: unused, to be removed
349	/** Flag whether 24-bit mailboxes are in use (default is 32-bit). */
350	bool fMbxIs24Bit; //@todo: save?
351	/** ISA I/O port base (encoded in FW-compatible format). */
352	uint8_t uISABaseCode;
353
354	/** ISA I/O port base (disabled if zero). */
355	RTIOPORT IOISABase; //@todo: recalculate when restoring state
356	/** Default ISA I/O port base in FW-compatible format. */
357	uint8_t uDefaultISABaseCode;
358
359	/** Number of mailboxes the guest set up. */
360	uint32_t cMailbox;
361
362	#if HC_ARCH_BITS == 64
363	uint32_t Alignment0;
364	#endif
365
366	/** Time when HBA reset was last initiated. */ //@todo: does this need to be saved?
367	uint64_t u64ResetTime;
368	/** Physical base address of the outgoing mailboxes. */
369	RTGCPHYS GCPhysAddrMailboxOutgoingBase;
370	/** Current outgoing mailbox position. */
371	uint32_t uMailboxOutgoingPositionCurrent;
372	/** Number of mailboxes ready. */
373	volatile uint32_t cMailboxesReady;
374	/** Whether a notification to R3 was send. */
375	volatile bool fNotificationSend;
376
377	#if HC_ARCH_BITS == 64
378	uint32_t Alignment1;
379	#endif
380
381	/** Physical base address of the incoming mailboxes. */
382	RTGCPHYS GCPhysAddrMailboxIncomingBase;
383	/** Current incoming mailbox position. */
384	uint32_t uMailboxIncomingPositionCurrent;
385
386	/** Whether strict round robin is enabled. */
387	bool fStrictRoundRobinMode;
388	/** Whether the extended LUN CCB format is enabled for 32 possible logical units. */
389	bool fExtendedLunCCBFormat;
390
391	/** Queue to send tasks to R3. - HC ptr */
392	R3PTRTYPE(PPDMQUEUE) pNotifierQueueR3;
393	/** Queue to send tasks to R3. - HC ptr */
394	R0PTRTYPE(PPDMQUEUE) pNotifierQueueR0;
395	/** Queue to send tasks to R3. - RC ptr */
396	RCPTRTYPE(PPDMQUEUE) pNotifierQueueRC;
397
398	uint32_t Alignment2;
399
400	/** Critical section protecting access to the interrupt status register. */
401	PDMCRITSECT CritSectIntr;
402
403	/** Cache for task states. */
404	R3PTRTYPE(RTMEMCACHE) hTaskCache;
405
406	/** Device state for BIOS access. */
407	VBOXSCSI VBoxSCSI;
408
409	/** BusLogic device states. */
410	BUSLOGICDEVICE aDeviceStates[BUSLOGIC_MAX_DEVICES];
411
412	/** The base interface.
413	* @todo use PDMDEVINS::IBase */
414	PDMIBASE IBase;
415	/** Status Port - Leds interface. */
416	PDMILEDPORTS ILeds;
417	/** Partner of ILeds. */
418	R3PTRTYPE(PPDMILEDCONNECTORS) pLedsConnector;
419
420	#if HC_ARCH_BITS == 64
421	uint32_t Alignment3;
422	#endif
423
424	/** Indicates that PDMDevHlpAsyncNotificationCompleted should be called when
425	* a port is entering the idle state. */
426	bool volatile fSignalIdle;
427	/** Flag whether we have tasks which need to be processed again. */
428	bool volatile fRedo;
429	/** List of tasks which can be redone. */
430	R3PTRTYPE(volatile PBUSLOGICTASKSTATE) pTasksRedoHead;
431
432	#ifdef LOG_ENABLED
433	# if HC_ARCH_BITS == 64
434	uint32_t Alignment4;
435	# endif
436
437	volatile uint32_t cInMailboxesReady;
438	#endif
439
440	} BUSLOGIC, *PBUSLOGIC;
441
442	/** Register offsets in the I/O port space. */
443	#define BUSLOGIC_REGISTER_CONTROL 0 /* Writeonly */
444	/** Fields for the control register. */
445	# define BUSLOGIC_REGISTER_CONTROL_SCSI_BUSRESET RT_BIT(4)
446	# define BUSLOGIC_REGISTER_CONTROL_INTERRUPT_RESET RT_BIT(5)
447	# define BUSLOGIC_REGISTER_CONTROL_SOFT_RESET RT_BIT(6)
448	# define BUSLOGIC_REGISTER_CONTROL_HARD_RESET RT_BIT(7)
449
450	#define BUSLOGIC_REGISTER_STATUS 0 /* Readonly */
451	/** Fields for the status register. */
452	# define BUSLOGIC_REGISTER_STATUS_COMMAND_INVALID RT_BIT(0)
453	# define BUSLOGIC_REGISTER_STATUS_DATA_IN_REGISTER_READY RT_BIT(2)
454	# define BUSLOGIC_REGISTER_STATUS_COMMAND_PARAMETER_REGISTER_BUSY RT_BIT(3)
455	# define BUSLOGIC_REGISTER_STATUS_HOST_ADAPTER_READY RT_BIT(4)
456	# define BUSLOGIC_REGISTER_STATUS_INITIALIZATION_REQUIRED RT_BIT(5)
457	# define BUSLOGIC_REGISTER_STATUS_DIAGNOSTIC_FAILURE RT_BIT(6)
458	# define BUSLOGIC_REGISTER_STATUS_DIAGNOSTIC_ACTIVE RT_BIT(7)
459
460	#define BUSLOGIC_REGISTER_COMMAND 1 /* Writeonly */
461	#define BUSLOGIC_REGISTER_DATAIN 1 /* Readonly */
462	#define BUSLOGIC_REGISTER_INTERRUPT 2 /* Readonly */
463	/** Fields for the interrupt register. */
464	# define BUSLOGIC_REGISTER_INTERRUPT_INCOMING_MAILBOX_LOADED RT_BIT(0)
465	# define BUSLOGIC_REGISTER_INTERRUPT_OUTGOING_MAILBOX_AVAILABLE RT_BIT(1)
466	# define BUSLOGIC_REGISTER_INTERRUPT_COMMAND_COMPLETE RT_BIT(2)
467	# define BUSLOGIC_REGISTER_INTERRUPT_EXTERNAL_BUS_RESET RT_BIT(3)
468	# define BUSLOGIC_REGISTER_INTERRUPT_INTERRUPT_VALID RT_BIT(7)
469
470	#define BUSLOGIC_REGISTER_GEOMETRY 3 /* Readonly */
471	# define BUSLOGIC_REGISTER_GEOMETRY_EXTENTED_TRANSLATION_ENABLED RT_BIT(7)
472
473	/* Structure for the INQUIRE_PCI_HOST_ADAPTER_INFORMATION reply. */
474	typedef struct ReplyInquirePCIHostAdapterInformation
475	{
476	uint8_t IsaIOPort;
477	uint8_t IRQ;
478	unsigned char LowByteTerminated:1;
479	unsigned char HighByteTerminated:1;
480	unsigned char uReserved:2; /* Reserved. */
481	unsigned char JP1:1; /* Whatever that means. */
482	unsigned char JP2:1; /* Whatever that means. */
483	unsigned char JP3:1; /* Whatever that means. */
484	/** Whether the provided info is valid. */
485	unsigned char InformationIsValid: 1;
486	uint8_t uReserved2; /* Reserved. */
487	} ReplyInquirePCIHostAdapterInformation, *PReplyInquirePCIHostAdapterInformation;
488	AssertCompileSize(ReplyInquirePCIHostAdapterInformation, 4);
489
490	/* Structure for the INQUIRE_CONFIGURATION reply. */
491	typedef struct ReplyInquireConfiguration
492	{
493	unsigned char uReserved1: 5;
494	bool fDmaChannel5: 1;
495	bool fDmaChannel6: 1;
496	bool fDmaChannel7: 1;
497	bool fIrqChannel9: 1;
498	bool fIrqChannel10: 1;
499	bool fIrqChannel11: 1;
500	bool fIrqChannel12: 1;
501	unsigned char uReserved2: 1;
502	bool fIrqChannel14: 1;
503	bool fIrqChannel15: 1;
504	unsigned char uReserved3: 1;
505	unsigned char uHostAdapterId: 4;
506	unsigned char uReserved4: 4;
507	} ReplyInquireConfiguration, *PReplyInquireConfiguration;
508	AssertCompileSize(ReplyInquireConfiguration, 3);
509
510	/* Structure for the INQUIRE_SETUP_INFORMATION reply. */
511	typedef struct ReplyInquireSetupInformationSynchronousValue
512	{
513	unsigned char uOffset: 4;
514	unsigned char uTransferPeriod: 3;
515	bool fSynchronous: 1;
516	}ReplyInquireSetupInformationSynchronousValue, *PReplyInquireSetupInformationSynchronousValue;
517	AssertCompileSize(ReplyInquireSetupInformationSynchronousValue, 1);
518
519	typedef struct ReplyInquireSetupInformation
520	{
521	bool fSynchronousInitiationEnabled: 1;
522	bool fParityCheckingEnabled: 1;
523	unsigned char uReserved1: 6;
524	uint8_t uBusTransferRate;
525	uint8_t uPreemptTimeOnBus;
526	uint8_t uTimeOffBus;
527	uint8_t cMailbox;
528	uint8_t MailboxAddress[3];
529	ReplyInquireSetupInformationSynchronousValue SynchronousValuesId0To7[8];
530	uint8_t uDisconnectPermittedId0To7;
531	uint8_t uSignature;
532	uint8_t uCharacterD;
533	uint8_t uHostBusType;
534	uint8_t uWideTransferPermittedId0To7;
535	uint8_t uWideTransfersActiveId0To7;
536	ReplyInquireSetupInformationSynchronousValue SynchronousValuesId8To15[8];
537	uint8_t uDisconnectPermittedId8To15;
538	uint8_t uReserved2;
539	uint8_t uWideTransferPermittedId8To15;
540	uint8_t uWideTransfersActiveId8To15;
541	} ReplyInquireSetupInformation, *PReplyInquireSetupInformation;
542	AssertCompileSize(ReplyInquireSetupInformation, 34);
543
544	/* Structure for the INQUIRE_EXTENDED_SETUP_INFORMATION. */
545	#pragma pack(1)
546	typedef struct ReplyInquireExtendedSetupInformation
547	{
548	uint8_t uBusType;
549	uint8_t uBiosAddress;
550	uint16_t u16ScatterGatherLimit;
551	uint8_t cMailbox;
552	uint32_t uMailboxAddressBase;
553	unsigned char uReserved1: 2;
554	bool fFastEISA: 1;
555	unsigned char uReserved2: 3;
556	bool fLevelSensitiveInterrupt: 1;
557	unsigned char uReserved3: 1;
558	unsigned char aFirmwareRevision[3];
559	bool fHostWideSCSI: 1;
560	bool fHostDifferentialSCSI: 1;
561	bool fHostSupportsSCAM: 1;
562	bool fHostUltraSCSI: 1;
563	bool fHostSmartTermination: 1;
564	unsigned char uReserved4: 3;
565	} ReplyInquireExtendedSetupInformation, *PReplyInquireExtendedSetupInformation;
566	AssertCompileSize(ReplyInquireExtendedSetupInformation, 14);
567	#pragma pack()
568
569	/* Structure for the INITIALIZE EXTENDED MAILBOX request. */
570	#pragma pack(1)
571	typedef struct RequestInitializeExtendedMailbox
572	{
573	/** Number of mailboxes in guest memory. */
574	uint8_t cMailbox;
575	/** Physical address of the first mailbox. */
576	uint32_t uMailboxBaseAddress;
577	} RequestInitializeExtendedMailbox, *PRequestInitializeExtendedMailbox;
578	AssertCompileSize(RequestInitializeExtendedMailbox, 5);
579	#pragma pack()
580
581	/*
582	* Structure of a mailbox in guest memory.
583	* The incoming and outgoing mailbox have the same size
584	* but the incoming one has some more fields defined which
585	* are marked as reserved in the outgoing one.
586	* The last field is also different from the type.
587	* For outgoing mailboxes it is the action and
588	* for incoming ones the completion status code for the task.
589	* We use one structure for both types.
590	*/
591	#pragma pack(1)
592	typedef struct Mailbox
593	{
594	/** Physical address of the CCB structure in the guest memory. */
595	uint32_t u32PhysAddrCCB;
596	/** Type specific data. */
597	union
598	{
599	/** For outgoing mailboxes. */
600	struct
601	{
602	/** Reserved */
603	uint8_t uReserved[3];
604	/** Action code. */
605	uint8_t uActionCode;
606	} out;
607	/** For incoming mailboxes. */
608	struct
609	{
610	/** The host adapter status after finishing the request. */
611	uint8_t uHostAdapterStatus;
612	/** The status of the device which executed the request after executing it. */
613	uint8_t uTargetDeviceStatus;
614	/** Reserved. */
615	uint8_t uReserved;
616	/** The completion status code of the request. */
617	uint8_t uCompletionCode;
618	} in;
619	} u;
620	} Mailbox, *PMailbox;
621	AssertCompileSize(Mailbox, 8);
622	#pragma pack()
623
624	/*
625	* Action codes for outgoing mailboxes.
626	*/
627	enum BUSLOGIC_MAILBOX_OUTGOING_ACTION
628	{
629	BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE = 0x00,
630	BUSLOGIC_MAILBOX_OUTGOING_ACTION_START_COMMAND = 0x01,
631	BUSLOGIC_MAILBOX_OUTGOING_ACTION_ABORT_COMMAND = 0x02
632	};
633
634	/*
635	* Completion codes for incoming mailboxes.
636	*/
637	enum BUSLOGIC_MAILBOX_INCOMING_COMPLETION
638	{
639	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_FREE = 0x00,
640	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITHOUT_ERROR = 0x01,
641	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_ABORTED = 0x02,
642	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_ABORTED_NOT_FOUND = 0x03,
643	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR = 0x04,
644	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_INVALID_CCB = 0x05
645	};
646
647	/*
648	* Host adapter status for incoming mailboxes.
649	*/
650	enum BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS
651	{
652	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_CMD_COMPLETED = 0x00,
653	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_LINKED_CMD_COMPLETED = 0x0a,
654	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_LINKED_CMD_COMPLETED_WITH_FLAG = 0x0b,
655	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_DATA_UNDERUN = 0x0c,
656	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_SCSI_SELECTION_TIMEOUT = 0x11,
657	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_DATA_OVERRUN = 0x12,
658	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_UNEXPECTED_BUS_FREE = 0x13,
659	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_BUS_PHASE_REQUESTED = 0x14,
660	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_OUTGOING_MAILBOX_ACTION_CODE = 0x15,
661	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_COMMAND_OPERATION_CODE = 0x16,
662	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_LINKED_CCB_HAS_INVALID_LUN = 0x17,
663	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_COMMAND_PARAMETER = 0x1a,
664	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_AUTO_REQUEST_SENSE_FAILED = 0x1b,
665	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_TAGGED_QUEUING_MESSAGE_REJECTED = 0x1c,
666	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_UNSUPPORTED_MESSAGE_RECEIVED = 0x1d,
667	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_HARDWARE_FAILED = 0x20,
668	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_TARGET_FAILED_RESPONSE_TO_ATN = 0x21,
669	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_ASSERTED_RST = 0x22,
670	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_OTHER_DEVICE_ASSERTED_RST = 0x23,
671	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_TARGET_DEVICE_RECONNECTED_IMPROPERLY = 0x24,
672	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_ASSERTED_BUS_DEVICE_RESET = 0x25,
673	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_ABORT_QUEUE_GENERATED = 0x26,
674	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_SOFTWARE_ERROR = 0x27,
675	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_HARDWARE_TIMEOUT_ERROR = 0x30,
676	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_SCSI_PARITY_ERROR_DETECTED = 0x34
677	};
678
679	/*
680	* Device status codes for incoming mailboxes.
681	*/
682	enum BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS
683	{
684	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD = 0x00,
685	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_CHECK_CONDITION = 0x02,
686	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_DEVICE_BUSY = 0x08
687	};
688
689	/*
690	* Opcode types for CCB.
691	*/
692	enum BUSLOGIC_CCB_OPCODE
693	{
694	BUSLOGIC_CCB_OPCODE_INITIATOR_CCB = 0x00,
695	BUSLOGIC_CCB_OPCODE_TARGET_CCB = 0x01,
696	BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_SCATTER_GATHER = 0x02,
697	BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_DATA_LENGTH = 0x03,
698	BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_SCATTER_GATHER = 0x04,
699	BUSLOGIC_CCB_OPCODE_BUS_DEVICE_RESET = 0x81
700	};
701
702	/*
703	* Data transfer direction.
704	*/
705	enum BUSLOGIC_CCB_DIRECTION
706	{
707	BUSLOGIC_CCB_DIRECTION_UNKNOWN = 0x00,
708	BUSLOGIC_CCB_DIRECTION_IN = 0x01,
709	BUSLOGIC_CCB_DIRECTION_OUT = 0x02,
710	BUSLOGIC_CCB_DIRECTION_NO_DATA = 0x03
711	};
712
713	/*
714	* The command control block for a SCSI request.
715	*/
716	#pragma pack(1)
717	typedef struct CommandControlBlock
718	{
719	/** Opcode. */
720	uint8_t uOpcode;
721	/** Reserved */
722	unsigned char uReserved1: 3;
723	/** Data direction for the request. */
724	unsigned char uDataDirection: 2;
725	/** Whether the request is tag queued. */
726	bool fTagQueued: 1;
727	/** Queue tag mode. */
728	unsigned char uQueueTag: 2;
729	/** Length of the SCSI CDB. */
730	uint8_t cbCDB;
731	/** Sense data length. */
732	uint8_t cbSenseData;
733	/** Data length. */
734	uint32_t cbData;
735	/** Data pointer.
736	* This points to the data region or a scatter gather list based on the opcode.
737	*/
738	uint32_t u32PhysAddrData;
739	/** Reserved. */
740	uint8_t uReserved2[2];
741	/** Host adapter status. */
742	uint8_t uHostAdapterStatus;
743	/** Device adapter status. */
744	uint8_t uDeviceStatus;
745	/** The device the request is send to. */
746	uint8_t uTargetId;
747	/*The LUN in the device. /
748	unsigned char uLogicalUnit: 5;
749	/** Legacy tag. */
750	bool fLegacyTagEnable: 1;
751	/** Legacy queue tag. */
752	unsigned char uLegacyQueueTag: 2;
753	/** The SCSI CDB. */
754	uint8_t aCDB[12]; /* A CDB can be 12 bytes long. */
755	/** Reserved. */
756	uint8_t uReserved3[6];
757	/** Sense data pointer. */
758	uint32_t u32PhysAddrSenseData;
759	} CommandControlBlock, *PCommandControlBlock;
760	AssertCompileSize(CommandControlBlock, 40);
761	#pragma pack()
762
763	#pragma pack(1)
764	typedef struct ScatterGatherEntry
765	{
766	uint32_t cbSegment;
767	uint32_t u32PhysAddrSegmentBase;
768	} ScatterGatherEntry, *PScatterGatherEntry;
769	AssertCompileSize(ScatterGatherEntry, 8);
770	#pragma pack()
771
772	/*
773	* Task state for a CCB request.
774	*/
775	typedef struct BUSLOGICTASKSTATE
776	{
777	/** Next in the redo list. */
778	PBUSLOGICTASKSTATE pRedoNext;
779	/** Device this task is assigned to. */
780	R3PTRTYPE(PBUSLOGICDEVICE) pTargetDeviceR3;
781	/** The command control block from the guest. */
782	CommandControlBlock CommandControlBlockGuest;
783	/** Mailbox read from guest memory. */
784	Mailbox MailboxGuest;
785	/** The SCSI request we pass to the underlying SCSI engine. */
786	PDMSCSIREQUEST PDMScsiRequest;
787	/** Data buffer segment */
788	RTSGSEG DataSeg;
789	/** Pointer to the R3 sense buffer. */
790	uint8_t *pbSenseBuffer;
791	/** Flag whether this is a request from the BIOS. */
792	bool fBIOS;
793	} BUSLOGICTASKSTATE;
794
795	#ifndef VBOX_DEVICE_STRUCT_TESTCASE
796
797	#define PDMIBASE_2_PBUSLOGICDEVICE(pInterface) ( (PBUSLOGICDEVICE)((uintptr_t)(pInterface) - RT_OFFSETOF(BUSLOGICDEVICE, IBase)) )
798	#define PDMISCSIPORT_2_PBUSLOGICDEVICE(pInterface) ( (PBUSLOGICDEVICE)((uintptr_t)(pInterface) - RT_OFFSETOF(BUSLOGICDEVICE, ISCSIPort)) )
799	#define PDMILEDPORTS_2_PBUSLOGICDEVICE(pInterface) ( (PBUSLOGICDEVICE)((uintptr_t)(pInterface) - RT_OFFSETOF(BUSLOGICDEVICE, ILed)) )
800	#define PDMIBASE_2_PBUSLOGIC(pInterface) ( (PBUSLOGIC)((uintptr_t)(pInterface) - RT_OFFSETOF(BUSLOGIC, IBase)) )
801	#define PDMILEDPORTS_2_PBUSLOGIC(pInterface) ( (PBUSLOGIC)((uintptr_t)(pInterface) - RT_OFFSETOF(BUSLOGIC, ILeds)) )
802
803	static int buslogicRegisterISARange(PBUSLOGIC pBusLogic, uint8_t uBaseCode);
804
805	/**
806	* Assert IRQ line of the BusLogic adapter.
807	*
808	* @returns nothing.
809	* @param pBusLogic Pointer to the BusLogic device instance.
810	* @param fSuppressIrq Flag to suppress IRQ generation regardless of fIRQEnabled
811	* @param uFlag Type of interrupt being generated.
812	*/
813	static void buslogicSetInterrupt(PBUSLOGIC pBusLogic, bool fSuppressIrq, uint8_t uIrqType)
814	{
815	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
816
817	/* The CMDC interrupt has priority over IMBL and MBOR. */
818	if (uIrqType & (BUSLOGIC_REGISTER_INTERRUPT_INCOMING_MAILBOX_LOADED \| BUSLOGIC_REGISTER_INTERRUPT_OUTGOING_MAILBOX_AVAILABLE))
819	{
820	if (!(pBusLogic->regInterrupt & BUSLOGIC_REGISTER_INTERRUPT_COMMAND_COMPLETE))
821	pBusLogic->regInterrupt \|= uIrqType; /* Report now. */
822	else
823	pBusLogic->uPendingIntr \|= uIrqType; /* Report later. */
824	}
825	else if (uIrqType & BUSLOGIC_REGISTER_INTERRUPT_COMMAND_COMPLETE)
826	{
827	Assert(!pBusLogic->regInterrupt);
828	pBusLogic->regInterrupt \|= uIrqType;
829	}
830	else
831	AssertMsgFailed(("Invalid interrupt state!\n"));
832
833	pBusLogic->regInterrupt \|= BUSLOGIC_REGISTER_INTERRUPT_INTERRUPT_VALID;
834	if (pBusLogic->fIRQEnabled && !fSuppressIrq)
835	PDMDevHlpPCISetIrq(pBusLogic->CTX_SUFF(pDevIns), 0, 1);
836	}
837
838	/**
839	* Deasserts the interrupt line of the BusLogic adapter.
840	*
841	* @returns nothing
842	* @param pBuslogic Pointer to the BusLogic device instance.
843	*/
844	static void buslogicClearInterrupt(PBUSLOGIC pBusLogic)
845	{
846	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
847	pBusLogic->regInterrupt = 0;
848	PDMDevHlpPCISetIrq(pBusLogic->CTX_SUFF(pDevIns), 0, 0);
849	/* If there's another pending interrupt, report it now. */
850	if (pBusLogic->uPendingIntr)
851	{
852	buslogicSetInterrupt(pBusLogic, false, pBusLogic->uPendingIntr);
853	pBusLogic->uPendingIntr = 0;
854	}
855	}
856
857	#if defined(IN_RING3)
858
859	/**
860	* Advances the mailbox pointer to the next slot.
861	*/
862	DECLINLINE(void) buslogicOutgoingMailboxAdvance(PBUSLOGIC pBusLogic)
863	{
864	pBusLogic->uMailboxOutgoingPositionCurrent = (pBusLogic->uMailboxOutgoingPositionCurrent + 1) % pBusLogic->cMailbox;
865	}
866
867	/**
868	* Returns the physical address of the next outgoing mailbox to process.
869	*/
870	DECLINLINE(RTGCPHYS) buslogicOutgoingMailboxGetGCPhys(PBUSLOGIC pBusLogic)
871	{
872	return pBusLogic->GCPhysAddrMailboxOutgoingBase + (pBusLogic->uMailboxOutgoingPositionCurrent * sizeof(Mailbox));
873	}
874
875	/**
876	* Initialize local RAM of host adapter with default values.
877	*
878	* @returns nothing.
879	* @param pBusLogic.
880	*/
881	static void buslogicInitializeLocalRam(PBUSLOGIC pBusLogic)
882	{
883	/*
884	* These values are mostly from what I think is right
885	* looking at the dmesg output from a Linux guest inside
886	* a VMware server VM.
887	*
888	* So they don't have to be right :)
889	*/
890	memset(pBusLogic->LocalRam.u8View, 0, sizeof(HostAdapterLocalRam));
891	pBusLogic->LocalRam.structured.autoSCSIData.fLevelSensitiveInterrupt = true;
892	pBusLogic->LocalRam.structured.autoSCSIData.fParityCheckingEnabled = true;
893	pBusLogic->LocalRam.structured.autoSCSIData.fExtendedTranslation = true; /* Same as in geometry register. */
894	pBusLogic->LocalRam.structured.autoSCSIData.u16DeviceEnabledMask = ~0; /* All enabled. Maybe mask out non present devices? */
895	pBusLogic->LocalRam.structured.autoSCSIData.u16WidePermittedMask = ~0;
896	pBusLogic->LocalRam.structured.autoSCSIData.u16FastPermittedMask = ~0;
897	pBusLogic->LocalRam.structured.autoSCSIData.u16SynchronousPermittedMask = ~0;
898	pBusLogic->LocalRam.structured.autoSCSIData.u16DisconnectPermittedMask = ~0;
899	pBusLogic->LocalRam.structured.autoSCSIData.fStrictRoundRobinMode = pBusLogic->fStrictRoundRobinMode;
900	pBusLogic->LocalRam.structured.autoSCSIData.u16UltraPermittedMask = ~0;
901	/* @todo calculate checksum? */
902	}
903
904	/**
905	* Do a hardware reset of the buslogic adapter.
906	*
907	* @returns VBox status code.
908	* @param pBusLogic Pointer to the BusLogic device instance.
909	* @param fResetIO Flag determining whether ISA I/O should be reset.
910	*/
911	static int buslogicHwReset(PBUSLOGIC pBusLogic, bool fResetIO)
912	{
913	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
914
915	/* Reset registers to default value. */
916	pBusLogic->regStatus = BUSLOGIC_REGISTER_STATUS_HOST_ADAPTER_READY \| BUSLOGIC_REGISTER_STATUS_INITIALIZATION_REQUIRED;
917	pBusLogic->regInterrupt = 0;
918	pBusLogic->uPendingIntr = 0;
919	pBusLogic->regGeometry = BUSLOGIC_REGISTER_GEOMETRY_EXTENTED_TRANSLATION_ENABLED;
920	pBusLogic->uOperationCode = 0xff; /* No command executing. */
921	pBusLogic->iParameter = 0;
922	pBusLogic->cbCommandParametersLeft = 0;
923	pBusLogic->fIRQEnabled = true;
924	pBusLogic->uMailboxOutgoingPositionCurrent = 0;
925	pBusLogic->uMailboxIncomingPositionCurrent = 0;
926
927	/* Guest-initiated HBA reset does not affect ISA port I/O. */
928	if (fResetIO)
929	{
930	buslogicRegisterISARange(pBusLogic, pBusLogic->uDefaultISABaseCode);
931	}
932	buslogicInitializeLocalRam(pBusLogic);
933	vboxscsiInitialize(&pBusLogic->VBoxSCSI);
934
935	return VINF_SUCCESS;
936	}
937	#endif
938
939	/**
940	* Resets the command state machine for the next command and notifies the guest.
941	*
942	* @returns nothing.
943	* @param pBusLogic Pointer to the BusLogic device instance
944	* @param fSuppressIrq Flag to suppress IRQ generation regardless of current state
945	*/
946	static void buslogicCommandComplete(PBUSLOGIC pBusLogic, bool fSuppressIrq)
947	{
948	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
949
950	pBusLogic->fUseLocalRam = false;
951	pBusLogic->regStatus \|= BUSLOGIC_REGISTER_STATUS_HOST_ADAPTER_READY;
952	pBusLogic->iReply = 0;
953
954	/* Modify I/O address does not generate an interrupt. */
955	if (pBusLogic->uOperationCode != BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND)
956	{
957	/* Notify that the command is complete. */
958	pBusLogic->regStatus &= ~BUSLOGIC_REGISTER_STATUS_DATA_IN_REGISTER_READY;
959	buslogicSetInterrupt(pBusLogic, fSuppressIrq, BUSLOGIC_REGISTER_INTERRUPT_COMMAND_COMPLETE);
960	}
961
962	pBusLogic->uOperationCode = 0xff;
963	pBusLogic->iParameter = 0;
964	}
965
966	#if defined(IN_RING3)
967	/**
968	* Initiates a hard reset which was issued from the guest.
969	*
970	* @returns nothing
971	* @param pBusLogic Pointer to the BusLogic device instance.
972	*/
973	static void buslogicIntiateHardReset(PBUSLOGIC pBusLogic)
974	{
975	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
976
977	/* Remember when the guest initiated a reset. */
978	pBusLogic->u64ResetTime = PDMDevHlpTMTimeVirtGetNano(pBusLogic->CTX_SUFF(pDevIns));
979
980	buslogicHwReset(pBusLogic, false);
981
982	/* We set the diagnostic active in the status register. */
983	pBusLogic->regStatus \|= BUSLOGIC_REGISTER_STATUS_DIAGNOSTIC_ACTIVE;
984	}
985
986	/**
987	* Send a mailbox with set status codes to the guest.
988	*
989	* @returns nothing.
990	* @param pBusLogic Pointer to the BusLogic device instance.
991	* @param pTaskState Pointer to the task state with the mailbox to send.
992	* @param uHostAdapterStatus The host adapter status code to set.
993	* @param uDeviceStatus The target device status to set.
994	* @param uMailboxCompletionCode Completion status code to set in the mailbox.
995	*/
996	static void buslogicSendIncomingMailbox(PBUSLOGIC pBusLogic, PBUSLOGICTASKSTATE pTaskState,
997	uint8_t uHostAdapterStatus, uint8_t uDeviceStatus,
998	uint8_t uMailboxCompletionCode)
999	{
1000	pTaskState->MailboxGuest.u.in.uHostAdapterStatus = uHostAdapterStatus;
1001	pTaskState->MailboxGuest.u.in.uTargetDeviceStatus = uDeviceStatus;
1002	pTaskState->MailboxGuest.u.in.uCompletionCode = uMailboxCompletionCode;
1003
1004	int rc = PDMCritSectEnter(&pBusLogic->CritSectIntr, VINF_SUCCESS);
1005	AssertRC(rc);
1006	RTGCPHYS GCPhysAddrMailboxIncoming = pBusLogic->GCPhysAddrMailboxIncomingBase + (pBusLogic->uMailboxIncomingPositionCurrent * sizeof(Mailbox));
1007	RTGCPHYS GCPhysAddrCCB = (RTGCPHYS)pTaskState->MailboxGuest.u32PhysAddrCCB;
1008
1009	LogFlowFunc(("Completing CCB %RGp\n", GCPhysAddrCCB));
1010
1011	/* Update CCB. */
1012	pTaskState->CommandControlBlockGuest.uHostAdapterStatus = uHostAdapterStatus;
1013	pTaskState->CommandControlBlockGuest.uDeviceStatus = uDeviceStatus;
1014	/* @todo: this is wrong - writing too much! */
1015	PDMDevHlpPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrCCB, &pTaskState->CommandControlBlockGuest, sizeof(CommandControlBlock));
1016
1017	#ifdef RT_STRICT
1018	Mailbox Tmp;
1019	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxIncoming, &Tmp, sizeof(Mailbox));
1020	Assert(Tmp.u.in.uCompletionCode == BUSLOGIC_MAILBOX_INCOMING_COMPLETION_FREE);
1021	#endif
1022
1023	/* Update mailbox. */
1024	PDMDevHlpPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxIncoming, &pTaskState->MailboxGuest, sizeof(Mailbox));
1025
1026	/* Advance to next mailbox position. */
1027	pBusLogic->uMailboxIncomingPositionCurrent++;
1028	if (pBusLogic->uMailboxIncomingPositionCurrent >= pBusLogic->cMailbox)
1029	pBusLogic->uMailboxIncomingPositionCurrent = 0;
1030
1031	#ifdef LOG_ENABLED
1032	ASMAtomicIncU32(&pBusLogic->cInMailboxesReady);
1033	#endif
1034
1035	buslogicSetInterrupt(pBusLogic, false, BUSLOGIC_REGISTER_INTERRUPT_INCOMING_MAILBOX_LOADED);
1036
1037	PDMCritSectLeave(&pBusLogic->CritSectIntr);
1038	}
1039
1040	#if defined(DEBUG)
1041	/**
1042	* Dumps the content of a mailbox for debugging purposes.
1043	*
1044	* @return nothing
1045	* @param pMailbox The mailbox to dump.
1046	* @param fOutgoing true if dumping the outgoing state.
1047	* false if dumping the incoming state.
1048	*/
1049	static void buslogicDumpMailboxInfo(PMailbox pMailbox, bool fOutgoing)
1050	{
1051	Log(("%s: Dump for %s mailbox:\n", __FUNCTION__, fOutgoing ? "outgoing" : "incoming"));
1052	Log(("%s: u32PhysAddrCCB=%#x\n", __FUNCTION__, pMailbox->u32PhysAddrCCB));
1053	if (fOutgoing)
1054	{
1055	Log(("%s: uActionCode=%u\n", __FUNCTION__, pMailbox->u.out.uActionCode));
1056	}
1057	else
1058	{
1059	Log(("%s: uHostAdapterStatus=%u\n", __FUNCTION__, pMailbox->u.in.uHostAdapterStatus));
1060	Log(("%s: uTargetDeviceStatus=%u\n", __FUNCTION__, pMailbox->u.in.uTargetDeviceStatus));
1061	Log(("%s: uCompletionCode=%u\n", __FUNCTION__, pMailbox->u.in.uCompletionCode));
1062	}
1063	}
1064
1065	/**
1066	* Dumps the content of a command control block for debugging purposes.
1067	*
1068	* @returns nothing.
1069	* @param pCCB Pointer to the command control block to dump.
1070	*/
1071	static void buslogicDumpCCBInfo(PCommandControlBlock pCCB)
1072	{
1073	Log(("%s: Dump for Command Control Block:\n", __FUNCTION__));
1074	Log(("%s: uOpCode=%#x\n", __FUNCTION__, pCCB->uOpcode));
1075	Log(("%s: uDataDirection=%u\n", __FUNCTION__, pCCB->uDataDirection));
1076	Log(("%s: fTagQueued=%d\n", __FUNCTION__, pCCB->fTagQueued));
1077	Log(("%s: uQueueTag=%u\n", __FUNCTION__, pCCB->uQueueTag));
1078	Log(("%s: cbCDB=%u\n", __FUNCTION__, pCCB->cbCDB));
1079	Log(("%s: cbSenseData=%u\n", __FUNCTION__, pCCB->cbSenseData));
1080	Log(("%s: cbData=%u\n", __FUNCTION__, pCCB->cbData));
1081	Log(("%s: u32PhysAddrData=%#x\n", __FUNCTION__, pCCB->u32PhysAddrData));
1082	Log(("%s: uHostAdapterStatus=%u\n", __FUNCTION__, pCCB->uHostAdapterStatus));
1083	Log(("%s: uDeviceStatus=%u\n", __FUNCTION__, pCCB->uDeviceStatus));
1084	Log(("%s: uTargetId=%u\n", __FUNCTION__, pCCB->uTargetId));
1085	Log(("%s: uLogicalUnit=%u\n", __FUNCTION__, pCCB->uLogicalUnit));
1086	Log(("%s: fLegacyTagEnable=%u\n", __FUNCTION__, pCCB->fLegacyTagEnable));
1087	Log(("%s: uLegacyQueueTag=%u\n", __FUNCTION__, pCCB->uLegacyQueueTag));
1088	Log(("%s: uCDB[0]=%#x\n", __FUNCTION__, pCCB->aCDB[0]));
1089	for (int i = 1; i < pCCB->cbCDB; i++)
1090	Log(("%s: uCDB[%d]=%u\n", __FUNCTION__, i, pCCB->aCDB[i]));
1091	Log(("%s: u32PhysAddrSenseData=%#x\n", __FUNCTION__, pCCB->u32PhysAddrSenseData));
1092	}
1093	#endif
1094
1095	/**
1096	* Allocate data buffer.
1097	*
1098	* @returns VBox status code.
1099	* @param pTaskState Pointer to the task state.
1100	*/
1101	static int buslogicDataBufferAlloc(PBUSLOGICTASKSTATE pTaskState)
1102	{
1103	PPDMDEVINS pDevIns = pTaskState->CTX_SUFF(pTargetDevice)->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns);
1104
1105	if ( (pTaskState->CommandControlBlockGuest.uDataDirection != BUSLOGIC_CCB_DIRECTION_NO_DATA)
1106	&& (pTaskState->CommandControlBlockGuest.cbData > 0))
1107	{
1108	/*
1109	* @todo: Check following assumption and what residual means.
1110	*
1111	* The BusLogic adapter can handle two different data buffer formats.
1112	* The first one is that the data pointer entry in the CCB points to
1113	* the buffer directly. In second mode the data pointer points to a
1114	* scatter gather list which describes the buffer.
1115	*/
1116	if ( (pTaskState->CommandControlBlockGuest.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_SCATTER_GATHER)
1117	\|\| (pTaskState->CommandControlBlockGuest.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_SCATTER_GATHER))
1118	{
1119	uint32_t cScatterGatherGCRead;
1120	uint32_t iScatterGatherEntry;
1121	ScatterGatherEntry aScatterGatherReadGC[32]; /* Number of scatter gather list entries read from guest memory. */
1122	uint32_t cScatterGatherGCLeft = pTaskState->CommandControlBlockGuest.cbData / sizeof(ScatterGatherEntry);
1123	RTGCPHYS GCPhysAddrScatterGatherCurrent = (RTGCPHYS)pTaskState->CommandControlBlockGuest.u32PhysAddrData;
1124	size_t cbDataToTransfer = 0;
1125
1126	/* Count number of bytes to transfer. */
1127	do
1128	{
1129	cScatterGatherGCRead = (cScatterGatherGCLeft < RT_ELEMENTS(aScatterGatherReadGC))
1130	? cScatterGatherGCLeft
1131	: RT_ELEMENTS(aScatterGatherReadGC);
1132	cScatterGatherGCLeft -= cScatterGatherGCRead;
1133
1134	/* Read the SG entries. */
1135	PDMDevHlpPhysRead(pDevIns, GCPhysAddrScatterGatherCurrent, &aScatterGatherReadGC[0],
1136	cScatterGatherGCRead * sizeof(ScatterGatherEntry));
1137
1138	for (iScatterGatherEntry = 0; iScatterGatherEntry < cScatterGatherGCRead; iScatterGatherEntry++)
1139	{
1140	RTGCPHYS GCPhysAddrDataBase;
1141
1142	Log(("%s: iScatterGatherEntry=%u\n", __FUNCTION__, iScatterGatherEntry));
1143
1144	GCPhysAddrDataBase = (RTGCPHYS)aScatterGatherReadGC[iScatterGatherEntry].u32PhysAddrSegmentBase;
1145	cbDataToTransfer += aScatterGatherReadGC[iScatterGatherEntry].cbSegment;
1146
1147	Log(("%s: GCPhysAddrDataBase=%RGp cbDataToTransfer=%u\n",
1148	__FUNCTION__, GCPhysAddrDataBase,
1149	aScatterGatherReadGC[iScatterGatherEntry].cbSegment));
1150	}
1151
1152	/* Set address to the next entries to read. */
1153	GCPhysAddrScatterGatherCurrent += cScatterGatherGCRead * sizeof(ScatterGatherEntry);
1154	} while (cScatterGatherGCLeft > 0);
1155
1156	Log(("%s: cbDataToTransfer=%d\n", __FUNCTION__, cbDataToTransfer));
1157
1158	/* Allocate buffer */
1159	pTaskState->DataSeg.cbSeg = cbDataToTransfer;
1160	pTaskState->DataSeg.pvSeg = RTMemAlloc(pTaskState->DataSeg.cbSeg);
1161	if (!pTaskState->DataSeg.pvSeg)
1162	return VERR_NO_MEMORY;
1163
1164	/* Copy the data if needed */
1165	if (pTaskState->CommandControlBlockGuest.uDataDirection == BUSLOGIC_CCB_DIRECTION_OUT)
1166	{
1167	cScatterGatherGCLeft = pTaskState->CommandControlBlockGuest.cbData / sizeof(ScatterGatherEntry);
1168	GCPhysAddrScatterGatherCurrent = (RTGCPHYS)pTaskState->CommandControlBlockGuest.u32PhysAddrData;
1169	uint8_t pbData = (uint8_t )pTaskState->DataSeg.pvSeg;
1170
1171	do
1172	{
1173	cScatterGatherGCRead = (cScatterGatherGCLeft < RT_ELEMENTS(aScatterGatherReadGC))
1174	? cScatterGatherGCLeft
1175	: RT_ELEMENTS(aScatterGatherReadGC);
1176	cScatterGatherGCLeft -= cScatterGatherGCRead;
1177
1178	/* Read the SG entries. */
1179	PDMDevHlpPhysRead(pDevIns, GCPhysAddrScatterGatherCurrent, &aScatterGatherReadGC[0],
1180	cScatterGatherGCRead * sizeof(ScatterGatherEntry));
1181
1182	for (iScatterGatherEntry = 0; iScatterGatherEntry < cScatterGatherGCRead; iScatterGatherEntry++)
1183	{
1184	RTGCPHYS GCPhysAddrDataBase;
1185
1186	Log(("%s: iScatterGatherEntry=%u\n", __FUNCTION__, iScatterGatherEntry));
1187
1188	GCPhysAddrDataBase = (RTGCPHYS)aScatterGatherReadGC[iScatterGatherEntry].u32PhysAddrSegmentBase;
1189	cbDataToTransfer = aScatterGatherReadGC[iScatterGatherEntry].cbSegment;
1190
1191	Log(("%s: GCPhysAddrDataBase=%RGp cbDataToTransfer=%u\n", __FUNCTION__, GCPhysAddrDataBase, cbDataToTransfer));
1192
1193	PDMDevHlpPhysRead(pDevIns, GCPhysAddrDataBase, pbData, cbDataToTransfer);
1194	pbData += cbDataToTransfer;
1195	}
1196
1197	/* Set address to the next entries to read. */
1198	GCPhysAddrScatterGatherCurrent += cScatterGatherGCRead * sizeof(ScatterGatherEntry);
1199	} while (cScatterGatherGCLeft > 0);
1200	}
1201
1202	}
1203	else if ( pTaskState->CommandControlBlockGuest.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB
1204	\|\| pTaskState->CommandControlBlockGuest.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_DATA_LENGTH)
1205	{
1206	/* The buffer is not scattered. */
1207	RTGCPHYS GCPhysAddrDataBase = (RTGCPHYS)pTaskState->CommandControlBlockGuest.u32PhysAddrData;
1208
1209	AssertMsg(GCPhysAddrDataBase != 0, ("Physical address is 0\n"));
1210
1211	pTaskState->DataSeg.cbSeg = pTaskState->CommandControlBlockGuest.cbData;
1212	pTaskState->DataSeg.pvSeg = RTMemAlloc(pTaskState->DataSeg.cbSeg);
1213	if (!pTaskState->DataSeg.pvSeg)
1214	return VERR_NO_MEMORY;
1215
1216	Log(("Non scattered buffer:\n"));
1217	Log(("u32PhysAddrData=%#x\n", pTaskState->CommandControlBlockGuest.u32PhysAddrData));
1218	Log(("cbData=%u\n", pTaskState->CommandControlBlockGuest.cbData));
1219	Log(("GCPhysAddrDataBase=0x%RGp\n", GCPhysAddrDataBase));
1220
1221	/* Copy the data into the buffer. */
1222	PDMDevHlpPhysRead(pDevIns, GCPhysAddrDataBase, pTaskState->DataSeg.pvSeg, pTaskState->DataSeg.cbSeg);
1223	}
1224	}
1225
1226	return VINF_SUCCESS;
1227	}
1228
1229	/**
1230	* Free allocated resources used for the scatter gather list.
1231	*
1232	* @returns nothing.
1233	* @param pTaskState Pointer to the task state.
1234	*/
1235	static void buslogicDataBufferFree(PBUSLOGICTASKSTATE pTaskState)
1236	{
1237	PPDMDEVINS pDevIns = pTaskState->CTX_SUFF(pTargetDevice)->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns);
1238
1239	if ( (pTaskState->CommandControlBlockGuest.cbData > 0)
1240	&& ( (pTaskState->CommandControlBlockGuest.uDataDirection == BUSLOGIC_CCB_DIRECTION_IN)
1241	\|\| (pTaskState->CommandControlBlockGuest.uDataDirection == BUSLOGIC_CCB_DIRECTION_UNKNOWN)))
1242	{
1243	if ( (pTaskState->CommandControlBlockGuest.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_SCATTER_GATHER)
1244	\|\| (pTaskState->CommandControlBlockGuest.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_SCATTER_GATHER))
1245	{
1246	uint32_t cScatterGatherGCRead;
1247	uint32_t iScatterGatherEntry;
1248	ScatterGatherEntry aScatterGatherReadGC[32]; /* Number of scatter gather list entries read from guest memory. */
1249	uint32_t cScatterGatherGCLeft = pTaskState->CommandControlBlockGuest.cbData / sizeof(ScatterGatherEntry);
1250	RTGCPHYS GCPhysAddrScatterGatherCurrent = (RTGCPHYS)pTaskState->CommandControlBlockGuest.u32PhysAddrData;
1251	uint8_t pbData = (uint8_t )pTaskState->DataSeg.pvSeg;
1252
1253	do
1254	{
1255	cScatterGatherGCRead = (cScatterGatherGCLeft < RT_ELEMENTS(aScatterGatherReadGC))
1256	? cScatterGatherGCLeft
1257	: RT_ELEMENTS(aScatterGatherReadGC);
1258	cScatterGatherGCLeft -= cScatterGatherGCRead;
1259
1260	/* Read the SG entries. */
1261	PDMDevHlpPhysRead(pDevIns, GCPhysAddrScatterGatherCurrent, &aScatterGatherReadGC[0],
1262	cScatterGatherGCRead * sizeof(ScatterGatherEntry));
1263
1264	for (iScatterGatherEntry = 0; iScatterGatherEntry < cScatterGatherGCRead; iScatterGatherEntry++)
1265	{
1266	RTGCPHYS GCPhysAddrDataBase;
1267	size_t cbDataToTransfer;
1268
1269	Log(("%s: iScatterGatherEntry=%u\n", __FUNCTION__, iScatterGatherEntry));
1270
1271	GCPhysAddrDataBase = (RTGCPHYS)aScatterGatherReadGC[iScatterGatherEntry].u32PhysAddrSegmentBase;
1272	cbDataToTransfer = aScatterGatherReadGC[iScatterGatherEntry].cbSegment;
1273
1274	Log(("%s: GCPhysAddrDataBase=%RGp cbDataToTransfer=%u\n", __FUNCTION__, GCPhysAddrDataBase, cbDataToTransfer));
1275
1276	PDMDevHlpPhysWrite(pDevIns, GCPhysAddrDataBase, pbData, cbDataToTransfer);
1277	pbData += cbDataToTransfer;
1278	}
1279
1280	/* Set address to the next entries to read. */
1281	GCPhysAddrScatterGatherCurrent += cScatterGatherGCRead * sizeof(ScatterGatherEntry);
1282	} while (cScatterGatherGCLeft > 0);
1283
1284	}
1285	else if ( pTaskState->CommandControlBlockGuest.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB
1286	\|\| pTaskState->CommandControlBlockGuest.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_DATA_LENGTH)
1287	{
1288	/* The buffer is not scattered. */
1289	RTGCPHYS GCPhysAddrDataBase = (RTGCPHYS)pTaskState->CommandControlBlockGuest.u32PhysAddrData;
1290
1291	AssertMsg(GCPhysAddrDataBase != 0, ("Physical address is 0\n"));
1292
1293	Log(("Non scattered buffer:\n"));
1294	Log(("u32PhysAddrData=%#x\n", pTaskState->CommandControlBlockGuest.u32PhysAddrData));
1295	Log(("cbData=%u\n", pTaskState->CommandControlBlockGuest.cbData));
1296	Log(("GCPhysAddrDataBase=0x%RGp\n", GCPhysAddrDataBase));
1297
1298	/* Copy the data into the guest memory. */
1299	PDMDevHlpPhysWrite(pDevIns, GCPhysAddrDataBase, pTaskState->DataSeg.pvSeg, pTaskState->DataSeg.cbSeg);
1300	}
1301	}
1302
1303	RTMemFree(pTaskState->DataSeg.pvSeg);
1304	pTaskState->DataSeg.pvSeg = NULL;
1305	pTaskState->DataSeg.cbSeg = 0;
1306	}
1307
1308	/**
1309	* Free the sense buffer.
1310	*
1311	* @returns nothing.
1312	* @param pTaskState Pointer to the task state.
1313	* @param fCopy If sense data should be copied to guest memory.
1314	*/
1315	static void buslogicSenseBufferFree(PBUSLOGICTASKSTATE pTaskState, bool fCopy)
1316	{
1317	PPDMDEVINS pDevIns = pTaskState->CTX_SUFF(pTargetDevice)->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns);
1318	RTGCPHYS GCPhysAddrSenseBuffer = (RTGCPHYS)pTaskState->CommandControlBlockGuest.u32PhysAddrSenseData;
1319	uint32_t cbSenseBuffer = pTaskState->CommandControlBlockGuest.cbSenseData;
1320
1321	/* Copy into guest memory. */
1322	if (fCopy)
1323	PDMDevHlpPhysWrite(pDevIns, GCPhysAddrSenseBuffer, pTaskState->pbSenseBuffer, cbSenseBuffer);
1324
1325	RTMemFree(pTaskState->pbSenseBuffer);
1326	pTaskState->pbSenseBuffer = NULL;
1327	}
1328
1329	/**
1330	* Alloc the sense buffer.
1331	*
1332	* @returns VBox status code.
1333	* @param pTaskState Pointer to the task state.
1334	* @note Current assumption is that the sense buffer is not scattered and does not cross a page boundary.
1335	*/
1336	static int buslogicSenseBufferAlloc(PBUSLOGICTASKSTATE pTaskState)
1337	{
1338	PPDMDEVINS pDevIns = pTaskState->CTX_SUFF(pTargetDevice)->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns);
1339	uint32_t cbSenseBuffer = pTaskState->CommandControlBlockGuest.cbSenseData;
1340
1341	pTaskState->pbSenseBuffer = (uint8_t *)RTMemAllocZ(cbSenseBuffer);
1342	if (!pTaskState->pbSenseBuffer)
1343	return VERR_NO_MEMORY;
1344
1345	return VINF_SUCCESS;
1346	}
1347	#endif /* IN_RING3 */
1348
1349	/**
1350	* Parses the command buffer and executes it.
1351	*
1352	* @returns VBox status code.
1353	* @param pBusLogic Pointer to the BusLogic device instance.
1354	*/
1355	static int buslogicProcessCommand(PBUSLOGIC pBusLogic)
1356	{
1357	int rc = VINF_SUCCESS;
1358	bool fSuppressIrq = false;
1359
1360	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
1361	AssertMsg(pBusLogic->uOperationCode != 0xff, ("There is no command to execute\n"));
1362
1363	switch (pBusLogic->uOperationCode)
1364	{
1365	case BUSLOGICCOMMAND_TEST_CMDC_INTERRUPT:
1366	/* Valid command, no reply. */
1367	pBusLogic->cbReplyParametersLeft = 0;
1368	break;
1369	case BUSLOGICCOMMAND_INQUIRE_PCI_HOST_ADAPTER_INFORMATION:
1370	{
1371	PReplyInquirePCIHostAdapterInformation pReply = (PReplyInquirePCIHostAdapterInformation)pBusLogic->aReplyBuffer;
1372	memset(pReply, 0, sizeof(ReplyInquirePCIHostAdapterInformation));
1373
1374	/* It seems VMware does not provide valid information here too, lets do the same :) */
1375	pReply->InformationIsValid = 0;
1376	pReply->IsaIOPort = pBusLogic->uISABaseCode;
1377	pReply->IRQ = PCIDevGetInterruptLine(&pBusLogic->dev);
1378	pBusLogic->cbReplyParametersLeft = sizeof(ReplyInquirePCIHostAdapterInformation);
1379	break;
1380	}
1381	case BUSLOGICCOMMAND_MODIFY_IO_ADDRESS:
1382	{
1383	/* Modify the ISA-compatible I/O port base. Note that this technically
1384	* violates the PCI spec, as this address is not reported through PCI.
1385	* However, it is required for compatibility with old drivers.
1386	*/
1387	#ifdef IN_RING3
1388	Log(("ISA I/O for PCI (code %x)\n", pBusLogic->aCommandBuffer[0]));
1389	buslogicRegisterISARange(pBusLogic, pBusLogic->aCommandBuffer[0]);
1390	pBusLogic->cbReplyParametersLeft = 0;
1391	fSuppressIrq = true;
1392	break;
1393	#else
1394	AssertMsgFailed(("Must never get here!\n"));
1395	#endif
1396	}
1397	case BUSLOGICCOMMAND_INQUIRE_BOARD_ID:
1398	{
1399	/* The special option byte is important: If it is '0' or 'B', Windows NT drivers
1400	* for Adaptec AHA-154x may claim the adapter. The BusLogic drivers will claim
1401	* the adapter only when the byte is not '0' or 'B'.
1402	*/
1403	pBusLogic->aReplyBuffer[0] = 'A'; /* Firmware option bytes */
1404	pBusLogic->aReplyBuffer[1] = 'A'; /* Special option byte */
1405
1406	/* We report version 5.07B. This reply will provide the first two digits. */
1407	pBusLogic->aReplyBuffer[2] = '5'; /* Major version 5 */
1408	pBusLogic->aReplyBuffer[3] = '0'; /* Minor version 0 */
1409	pBusLogic->cbReplyParametersLeft = 4; /* Reply is 4 bytes long */
1410	break;
1411	}
1412	case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_3RD_LETTER:
1413	{
1414	pBusLogic->aReplyBuffer[0] = '7';
1415	pBusLogic->cbReplyParametersLeft = 1;
1416	break;
1417	}
1418	case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_LETTER:
1419	{
1420	pBusLogic->aReplyBuffer[0] = 'B';
1421	pBusLogic->cbReplyParametersLeft = 1;
1422	break;
1423	}
1424	case BUSLOGICCOMMAND_SET_ADAPTER_OPTIONS:
1425	/* The parameter list length is determined by the first byte of the command buffer. */
1426	if (pBusLogic->iParameter == 1)
1427	{
1428	/* First pass - set the number of following parameter bytes. */
1429	pBusLogic->cbCommandParametersLeft = pBusLogic->aCommandBuffer[0];
1430	Log(("Set HA options: %u bytes follow\n", pBusLogic->cbCommandParametersLeft));
1431	}
1432	else
1433	{
1434	/* Second pass - process received data. */
1435	Log(("Set HA options: received %u bytes\n", pBusLogic->aCommandBuffer[0]));
1436	/* We ignore the data - it only concerns the SCSI hardware protocol. */
1437	}
1438	pBusLogic->cbReplyParametersLeft = 0;
1439	break;
1440
1441	case BUSLOGICCOMMAND_INQUIRE_HOST_ADAPTER_MODEL_NUMBER:
1442	{
1443	/* The reply length is set by the guest and is found in the first byte of the command buffer. */
1444	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
1445	memset(pBusLogic->aReplyBuffer, ' ', pBusLogic->cbReplyParametersLeft);
1446	const char aModelName[] = "958";
1447	int cCharsToTransfer = (pBusLogic->cbReplyParametersLeft <= (sizeof(aModelName) - 1))
1448	? pBusLogic->cbReplyParametersLeft
1449	: sizeof(aModelName) - 1;
1450
1451	for (int i = 0; i < cCharsToTransfer; i++)
1452	pBusLogic->aReplyBuffer[i] = aModelName[i];
1453
1454	break;
1455	}
1456	case BUSLOGICCOMMAND_INQUIRE_CONFIGURATION:
1457	{
1458	uint8_t uPciIrq = PCIDevGetInterruptLine(&pBusLogic->dev);
1459
1460	pBusLogic->cbReplyParametersLeft = sizeof(ReplyInquireConfiguration);
1461	PReplyInquireConfiguration pReply = (PReplyInquireConfiguration)pBusLogic->aReplyBuffer;
1462	memset(pReply, 0, sizeof(ReplyInquireConfiguration));
1463
1464	pReply->uHostAdapterId = 7; /* The controller has always 7 as ID. */
1465	//@todo: What should the DMA channel be?
1466	pReply->fDmaChannel6 = 1;
1467	/* The PCI IRQ is not necessarily representable in this structure.
1468	* If that is the case, the guest likely won't function correctly,
1469	* therefore we log a warning.
1470	*/
1471	switch (uPciIrq) {
1472	case 9: pReply->fIrqChannel9 = 1; break;
1473	case 10: pReply->fIrqChannel10 = 1; break;
1474	case 11: pReply->fIrqChannel11 = 1; break;
1475	case 12: pReply->fIrqChannel12 = 1; break;
1476	case 14: pReply->fIrqChannel14 = 1; break;
1477	case 15: pReply->fIrqChannel15 = 1; break;
1478	default:
1479	LogRel(("Warning: PCI IRQ %d cannot be represented as ISA!\n", uPciIrq));
1480	break;
1481	}
1482	break;
1483	}
1484	case BUSLOGICCOMMAND_INQUIRE_EXTENDED_SETUP_INFORMATION:
1485	{
1486	/* Some Adaptec AHA-154x drivers (e.g. OS/2) execute this command and expect
1487	* it to fail. If it succeeds, the drivers refuse to load. However, some newer
1488	* Adaptec 154x models supposedly support it too??
1489	*/
1490
1491	/* The reply length is set by the guest and is found in the first byte of the command buffer. */
1492	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
1493	PReplyInquireExtendedSetupInformation pReply = (PReplyInquireExtendedSetupInformation)pBusLogic->aReplyBuffer;
1494	memset(pReply, 0, sizeof(ReplyInquireExtendedSetupInformation));
1495
1496	//@todo: should this reflect the RAM contents (AutoSCSIRam)?
1497	pReply->uBusType = 'E'; /* EISA style */
1498	pReply->u16ScatterGatherLimit = 8192;
1499	pReply->cMailbox = pBusLogic->cMailbox;
1500	pReply->uMailboxAddressBase = (uint32_t)pBusLogic->GCPhysAddrMailboxOutgoingBase;
1501	pReply->fLevelSensitiveInterrupt = true;
1502	pReply->fHostWideSCSI = true;
1503	pReply->fHostUltraSCSI = true;
1504	memcpy(pReply->aFirmwareRevision, "07B", sizeof(pReply->aFirmwareRevision));
1505
1506	break;
1507	}
1508	case BUSLOGICCOMMAND_INQUIRE_SETUP_INFORMATION:
1509	{
1510	/* The reply length is set by the guest and is found in the first byte of the command buffer. */
1511	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
1512	PReplyInquireSetupInformation pReply = (PReplyInquireSetupInformation)pBusLogic->aReplyBuffer;
1513	memset(pReply, 0, sizeof(ReplyInquireSetupInformation));
1514	pReply->cMailbox = pBusLogic->cMailbox;
1515	pReply->uSignature = 'B';
1516	/* The 'D' signature prevents Adaptec's OS/2 drivers from getting too
1517	* friendly with BusLogic hardware and upsetting the HBA state.
1518	*/
1519	pReply->uCharacterD = 'D'; /* BusLogic model. */
1520	pReply->uHostBusType = 'F'; /* PCI bus. */
1521	break;
1522	}
1523	case BUSLOGICCOMMAND_FETCH_HOST_ADAPTER_LOCAL_RAM:
1524	{
1525	/*
1526	* First element in the command buffer contains start offset to read from
1527	* and second one the number of bytes to read.
1528	*/
1529	uint8_t uOffset = pBusLogic->aCommandBuffer[0];
1530	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[1];
1531
1532	pBusLogic->fUseLocalRam = true;
1533	pBusLogic->iReply = uOffset;
1534	break;
1535	}
1536	case BUSLOGICCOMMAND_INITIALIZE_EXTENDED_MAILBOX:
1537	{
1538	PRequestInitializeExtendedMailbox pRequest = (PRequestInitializeExtendedMailbox)pBusLogic->aCommandBuffer;
1539
1540	pBusLogic->cMailbox = pRequest->cMailbox;
1541	pBusLogic->GCPhysAddrMailboxOutgoingBase = (RTGCPHYS)pRequest->uMailboxBaseAddress;
1542	/* The area for incoming mailboxes is right after the last entry of outgoing mailboxes. */
1543	pBusLogic->GCPhysAddrMailboxIncomingBase = (RTGCPHYS)pRequest->uMailboxBaseAddress + (pBusLogic->cMailbox * sizeof(Mailbox));
1544
1545	Log(("GCPhysAddrMailboxOutgoingBase=%RGp\n", pBusLogic->GCPhysAddrMailboxOutgoingBase));
1546	Log(("GCPhysAddrMailboxIncomingBase=%RGp\n", pBusLogic->GCPhysAddrMailboxIncomingBase));
1547	Log(("cMailboxes=%u (32-bit mode)\n", pBusLogic->cMailbox));
1548	LogRel(("Initialized 32-bit mailbox, %d entries at %08x\n", pRequest->cMailbox, pRequest->uMailboxBaseAddress));
1549
1550	pBusLogic->regStatus &= ~BUSLOGIC_REGISTER_STATUS_INITIALIZATION_REQUIRED;
1551	pBusLogic->cbReplyParametersLeft = 0;
1552	break;
1553	}
1554	case BUSLOGICCOMMAND_ENABLE_STRICT_ROUND_ROBIN_MODE:
1555	{
1556	if (pBusLogic->aCommandBuffer[0] == 0)
1557	pBusLogic->fStrictRoundRobinMode = false;
1558	else if (pBusLogic->aCommandBuffer[0] == 1)
1559	pBusLogic->fStrictRoundRobinMode = true;
1560	else
1561	AssertMsgFailed(("Invalid round robin mode %d\n", pBusLogic->aCommandBuffer[0]));
1562
1563	pBusLogic->cbReplyParametersLeft = 0;
1564	break;
1565	}
1566	case BUSLOGICCOMMAND_SET_CCB_FORMAT:
1567	{
1568	if (pBusLogic->aCommandBuffer[0] == 0)
1569	pBusLogic->fExtendedLunCCBFormat = false;
1570	else if (pBusLogic->aCommandBuffer[0] == 1)
1571	pBusLogic->fExtendedLunCCBFormat = true;
1572	else
1573	AssertMsgFailed(("Invalid CCB format %d\n", pBusLogic->aCommandBuffer[0]));
1574
1575	pBusLogic->cbReplyParametersLeft = 0;
1576	break;
1577	}
1578	case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_0_TO_7:
1579	/* This is supposed to send TEST UNIT READY to each target/LUN.
1580	* We cheat and skip that, since we already know what's attached
1581	*/
1582	memset(pBusLogic->aReplyBuffer, 0, 8);
1583	for (int i = 0; i < 8; ++i)
1584	{
1585	if (pBusLogic->aDeviceStates[i].fPresent)
1586	pBusLogic->aReplyBuffer[i] = 1;
1587	}
1588	pBusLogic->aReplyBuffer[7] = 0; /* HA hardcoded at ID 7. */
1589	pBusLogic->cbReplyParametersLeft = 8;
1590	break;
1591	case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_8_TO_15:
1592	/* See note about cheating above. */
1593	memset(pBusLogic->aReplyBuffer, 0, 8);
1594	for (int i = 0; i < 8; ++i)
1595	{
1596	if (pBusLogic->aDeviceStates[i + 8].fPresent)
1597	pBusLogic->aReplyBuffer[i] = 1;
1598	}
1599	pBusLogic->cbReplyParametersLeft = 8;
1600	break;
1601	case BUSLOGICCOMMAND_INQUIRE_TARGET_DEVICES:
1602	{
1603	/* Each bit which is set in the 16bit wide variable means a present device. */
1604	uint16_t u16TargetsPresentMask = 0;
1605
1606	for (uint8_t i = 0; i < RT_ELEMENTS(pBusLogic->aDeviceStates); i++)
1607	{
1608	if (pBusLogic->aDeviceStates[i].fPresent)
1609	u16TargetsPresentMask \|= (1 << i);
1610	}
1611	pBusLogic->aReplyBuffer[0] = (uint8_t)u16TargetsPresentMask;
1612	pBusLogic->aReplyBuffer[1] = (uint8_t)(u16TargetsPresentMask >> 8);
1613	pBusLogic->cbReplyParametersLeft = 2;
1614	break;
1615	}
1616	case BUSLOGICCOMMAND_INQUIRE_SYNCHRONOUS_PERIOD:
1617	{
1618	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
1619
1620	for (uint8_t i = 0; i < pBusLogic->cbReplyParametersLeft; i++)
1621	pBusLogic->aReplyBuffer[i] = 0; /* @todo Figure if we need something other here. It's not needed for the linux driver */
1622
1623	break;
1624	}
1625	case BUSLOGICCOMMAND_DISABLE_HOST_ADAPTER_INTERRUPT:
1626	{
1627	if (pBusLogic->aCommandBuffer[0] == 0)
1628	pBusLogic->fIRQEnabled = false;
1629	else
1630	pBusLogic->fIRQEnabled = true;
1631	/* No interrupt signaled regardless of enable/disable. */
1632	fSuppressIrq = true;
1633	break;
1634	}
1635	case BUSLOGICCOMMAND_ECHO_COMMAND_DATA:
1636	{
1637	pBusLogic->aReplyBuffer[0] = pBusLogic->aCommandBuffer[0];
1638	pBusLogic->cbReplyParametersLeft = 1;
1639	break;
1640	}
1641	case BUSLOGICCOMMAND_SET_PREEMPT_TIME_ON_BUS:
1642	{
1643	pBusLogic->cbReplyParametersLeft = 0;
1644	pBusLogic->LocalRam.structured.autoSCSIData.uBusOnDelay = pBusLogic->aCommandBuffer[0];
1645	Log(("Bus-on time: %d\n", pBusLogic->aCommandBuffer[0]));
1646	break;
1647	}
1648	case BUSLOGICCOMMAND_SET_TIME_OFF_BUS:
1649	{
1650	pBusLogic->cbReplyParametersLeft = 0;
1651	pBusLogic->LocalRam.structured.autoSCSIData.uBusOffDelay = pBusLogic->aCommandBuffer[0];
1652	Log(("Bus-off time: %d\n", pBusLogic->aCommandBuffer[0]));
1653	break;
1654	}
1655	case BUSLOGICCOMMAND_SET_BUS_TRANSFER_RATE:
1656	{
1657	pBusLogic->cbReplyParametersLeft = 0;
1658	pBusLogic->LocalRam.structured.autoSCSIData.uDMATransferRate = pBusLogic->aCommandBuffer[0];
1659	Log(("Bus transfer rate: %02X\n", pBusLogic->aCommandBuffer[0]));
1660	break;
1661	}
1662	default:
1663	AssertMsgFailed(("Invalid command %#x\n", pBusLogic->uOperationCode));
1664	case BUSLOGICCOMMAND_EXT_BIOS_INFO:
1665	case BUSLOGICCOMMAND_UNLOCK_MAILBOX:
1666	/* Commands valid for Adaptec 154xC which we don't handle since
1667	* we pretend being 154xB compatible. Just mark the command as invalid.
1668	*/
1669	Log(("Command %#x not valid for this adapter\n", pBusLogic->uOperationCode));
1670	pBusLogic->cbReplyParametersLeft = 0;
1671	pBusLogic->regStatus \|= BUSLOGIC_REGISTER_STATUS_COMMAND_INVALID;
1672	break;
1673	case BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND: /* Should be handled already. */
1674	AssertMsgFailed(("Invalid mailbox execute state!\n"));
1675	}
1676
1677	Log(("uOperationCode=%#x, cbReplyParametersLeft=%d\n", pBusLogic->uOperationCode, pBusLogic->cbReplyParametersLeft));
1678
1679	/* Set the data in ready bit in the status register in case the command has a reply. */
1680	if (pBusLogic->cbReplyParametersLeft)
1681	pBusLogic->regStatus \|= BUSLOGIC_REGISTER_STATUS_DATA_IN_REGISTER_READY;
1682	else if (!pBusLogic->cbCommandParametersLeft)
1683	buslogicCommandComplete(pBusLogic, fSuppressIrq);
1684
1685	return rc;
1686	}
1687
1688	/**
1689	* Read a register from the BusLogic adapter.
1690	*
1691	* @returns VBox status code.
1692	* @param pBusLogic Pointer to the BusLogic instance data.
1693	* @param iRegister The index of the register to read.
1694	* @param pu32 Where to store the register content.
1695	*/
1696	static int buslogicRegisterRead(PBUSLOGIC pBusLogic, unsigned iRegister, uint32_t *pu32)
1697	{
1698	int rc = VINF_SUCCESS;
1699
1700	switch (iRegister)
1701	{
1702	case BUSLOGIC_REGISTER_STATUS:
1703	{
1704	*pu32 = pBusLogic->regStatus;
1705
1706	/* If the diagnostic active bit is set, we are in a guest-initiated
1707	* hard or soft reset. If the guest reads the status register and
1708	* waits for the host adapter ready bit to be set, we terminate the
1709	* reset right away. However, guests may also expect the reset
1710	* condition to clear automatically after a period of time.
1711	*/
1712	if (pBusLogic->regStatus & BUSLOGIC_REGISTER_STATUS_DIAGNOSTIC_ACTIVE)
1713	{
1714	uint64_t u64AccessTime = PDMDevHlpTMTimeVirtGetNano(pBusLogic->CTX_SUFF(pDevIns));
1715
1716	pBusLogic->regStatus &= ~BUSLOGIC_REGISTER_STATUS_DIAGNOSTIC_ACTIVE;
1717	pBusLogic->regStatus \|= BUSLOGIC_REGISTER_STATUS_HOST_ADAPTER_READY;
1718	if (u64AccessTime - pBusLogic->u64ResetTime > BUSLOGIC_RESET_DURATION_NS)
1719	{
1720	/* Let the guest see the ready condition right away. */
1721	*pu32 &= ~BUSLOGIC_REGISTER_STATUS_DIAGNOSTIC_ACTIVE;
1722	*pu32 \|= BUSLOGIC_REGISTER_STATUS_HOST_ADAPTER_READY;
1723	pBusLogic->u64ResetTime = 0;
1724	}
1725	}
1726	break;
1727	}
1728	case BUSLOGIC_REGISTER_DATAIN:
1729	{
1730	if (pBusLogic->fUseLocalRam)
1731	*pu32 = pBusLogic->LocalRam.u8View[pBusLogic->iReply];
1732	else
1733	*pu32 = pBusLogic->aReplyBuffer[pBusLogic->iReply];
1734
1735	/* Careful about underflow - guest can read data register even if
1736	* no data is available.
1737	*/
1738	if (pBusLogic->cbReplyParametersLeft)
1739	{
1740	pBusLogic->iReply++;
1741	pBusLogic->cbReplyParametersLeft--;
1742	if (!pBusLogic->cbReplyParametersLeft)
1743	{
1744	/*
1745	* Reply finished, set command complete bit, unset data-in ready bit and
1746	* interrupt the guest if enabled.
1747	*/
1748	buslogicCommandComplete(pBusLogic, false);
1749	}
1750	}
1751	LogFlowFunc(("data=%02x, iReply=%d, cbReplyParametersLeft=%u\n", *pu32,
1752	pBusLogic->iReply, pBusLogic->cbReplyParametersLeft));
1753	break;
1754	}
1755	case BUSLOGIC_REGISTER_INTERRUPT:
1756	{
1757	*pu32 = pBusLogic->regInterrupt;
1758	break;
1759	}
1760	case BUSLOGIC_REGISTER_GEOMETRY:
1761	{
1762	*pu32 = pBusLogic->regGeometry;
1763	break;
1764	}
1765	default:
1766	*pu32 = UINT32_C(0xffffffff);
1767	}
1768
1769	Log2(("%s: pu32=%p:{%.*Rhxs} iRegister=%d rc=%Rrc\n",
1770	__FUNCTION__, pu32, 1, pu32, iRegister, rc));
1771
1772	return rc;
1773	}
1774
1775	/**
1776	* Write a value to a register.
1777	*
1778	* @returns VBox status code.
1779	* @param pBusLogic Pointer to the BusLogic instance data.
1780	* @param iRegister The index of the register to read.
1781	* @param uVal The value to write.
1782	*/
1783	static int buslogicRegisterWrite(PBUSLOGIC pBusLogic, unsigned iRegister, uint8_t uVal)
1784	{
1785	int rc = VINF_SUCCESS;
1786
1787	switch (iRegister)
1788	{
1789	case BUSLOGIC_REGISTER_CONTROL:
1790	{
1791	rc = PDMCritSectEnter(&pBusLogic->CritSectIntr, VINF_IOM_R3_IOPORT_WRITE);
1792	if (rc != VINF_SUCCESS)
1793	return rc;
1794
1795	#ifdef LOG_ENABLED
1796	uint32_t cMailboxesReady = ASMAtomicXchgU32(&pBusLogic->cInMailboxesReady, 0);
1797	Log(("%u incoming mailboxes were ready when this interrupt was cleared\n", cMailboxesReady));
1798	#endif
1799
1800	if (uVal & BUSLOGIC_REGISTER_CONTROL_INTERRUPT_RESET)
1801	buslogicClearInterrupt(pBusLogic);
1802
1803	PDMCritSectLeave(&pBusLogic->CritSectIntr);
1804
1805	if ((uVal & BUSLOGIC_REGISTER_CONTROL_HARD_RESET) \|\| (uVal & BUSLOGIC_REGISTER_CONTROL_SOFT_RESET))
1806	{
1807	#ifdef IN_RING3
1808	buslogicIntiateHardReset(pBusLogic);
1809	#else
1810	rc = VINF_IOM_R3_IOPORT_WRITE;
1811	#endif
1812	}
1813
1814	break;
1815	}
1816	case BUSLOGIC_REGISTER_COMMAND:
1817	{
1818	/* Fast path for mailbox execution command. */
1819	if ((uVal == BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND) && (pBusLogic->uOperationCode == 0xff))
1820	{
1821	ASMAtomicIncU32(&pBusLogic->cMailboxesReady);
1822	if (!ASMAtomicXchgBool(&pBusLogic->fNotificationSend, true))
1823	{
1824	/* Send new notification to the queue. */
1825	PPDMQUEUEITEMCORE pItem = PDMQueueAlloc(pBusLogic->CTX_SUFF(pNotifierQueue));
1826	AssertMsg(pItem, ("Allocating item for queue failed\n"));
1827	PDMQueueInsert(pBusLogic->CTX_SUFF(pNotifierQueue), (PPDMQUEUEITEMCORE)pItem);
1828	}
1829
1830	return rc;
1831	}
1832
1833	/*
1834	* Check if we are already fetch command parameters from the guest.
1835	* If not we initialize executing a new command.
1836	*/
1837	if (pBusLogic->uOperationCode == 0xff)
1838	{
1839	pBusLogic->uOperationCode = uVal;
1840	pBusLogic->iParameter = 0;
1841
1842	/* Mark host adapter as busy and clear the invalid status bit. */
1843	pBusLogic->regStatus &= ~(BUSLOGIC_REGISTER_STATUS_HOST_ADAPTER_READY \| BUSLOGIC_REGISTER_STATUS_COMMAND_INVALID);
1844
1845	/* Get the number of bytes for parameters from the command code. */
1846	switch (pBusLogic->uOperationCode)
1847	{
1848	case BUSLOGICCOMMAND_TEST_CMDC_INTERRUPT:
1849	case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_LETTER:
1850	case BUSLOGICCOMMAND_INQUIRE_BOARD_ID:
1851	case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_3RD_LETTER:
1852	case BUSLOGICCOMMAND_INQUIRE_PCI_HOST_ADAPTER_INFORMATION:
1853	case BUSLOGICCOMMAND_INQUIRE_CONFIGURATION:
1854	case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_0_TO_7:
1855	case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_8_TO_15:
1856	case BUSLOGICCOMMAND_INQUIRE_TARGET_DEVICES:
1857	pBusLogic->cbCommandParametersLeft = 0;
1858	break;
1859	case BUSLOGICCOMMAND_MODIFY_IO_ADDRESS:
1860	case BUSLOGICCOMMAND_INQUIRE_EXTENDED_SETUP_INFORMATION:
1861	case BUSLOGICCOMMAND_INQUIRE_SETUP_INFORMATION:
1862	case BUSLOGICCOMMAND_INQUIRE_HOST_ADAPTER_MODEL_NUMBER:
1863	case BUSLOGICCOMMAND_ENABLE_STRICT_ROUND_ROBIN_MODE:
1864	case BUSLOGICCOMMAND_SET_CCB_FORMAT:
1865	case BUSLOGICCOMMAND_INQUIRE_SYNCHRONOUS_PERIOD:
1866	case BUSLOGICCOMMAND_DISABLE_HOST_ADAPTER_INTERRUPT:
1867	case BUSLOGICCOMMAND_ECHO_COMMAND_DATA:
1868	case BUSLOGICCOMMAND_SET_PREEMPT_TIME_ON_BUS:
1869	case BUSLOGICCOMMAND_SET_TIME_OFF_BUS:
1870	case BUSLOGICCOMMAND_SET_BUS_TRANSFER_RATE:
1871	pBusLogic->cbCommandParametersLeft = 1;
1872	break;
1873	case BUSLOGICCOMMAND_FETCH_HOST_ADAPTER_LOCAL_RAM:
1874	pBusLogic->cbCommandParametersLeft = 2;
1875	break;
1876	case BUSLOGICCOMMAND_INITIALIZE_EXTENDED_MAILBOX:
1877	pBusLogic->cbCommandParametersLeft = sizeof(RequestInitializeExtendedMailbox);
1878	break;
1879	case BUSLOGICCOMMAND_SET_ADAPTER_OPTIONS:
1880	/* There must be at least one byte following this command. */
1881	pBusLogic->cbCommandParametersLeft = 1;
1882	break;
1883	case BUSLOGICCOMMAND_EXT_BIOS_INFO:
1884	case BUSLOGICCOMMAND_UNLOCK_MAILBOX:
1885	/* Invalid commands. */
1886	pBusLogic->cbCommandParametersLeft = 0;
1887	break;
1888	case BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND: /* Should not come here anymore. */
1889	default:
1890	AssertMsgFailed(("Invalid operation code %#x\n", uVal));
1891	}
1892	}
1893	else
1894	{
1895	#ifndef IN_RING3
1896	/* This command must be executed in R3 as it rehooks the ISA I/O port. */
1897	if (pBusLogic->uOperationCode == BUSLOGICCOMMAND_MODIFY_IO_ADDRESS)
1898	{
1899	rc = VINF_IOM_R3_IOPORT_WRITE;
1900	break;
1901	}
1902	#endif
1903	/*
1904	* The real adapter would set the Command register busy bit in the status register.
1905	* The guest has to wait until it is unset.
1906	* We don't need to do it because the guest does not continue execution while we are in this
1907	* function.
1908	*/
1909	pBusLogic->aCommandBuffer[pBusLogic->iParameter] = uVal;
1910	pBusLogic->iParameter++;
1911	pBusLogic->cbCommandParametersLeft--;
1912	}
1913
1914	/* Start execution of command if there are no parameters left. */
1915	if (!pBusLogic->cbCommandParametersLeft)
1916	{
1917	rc = buslogicProcessCommand(pBusLogic);
1918	AssertMsgRC(rc, ("Processing command failed rc=%Rrc\n", rc));
1919	}
1920	break;
1921	}
1922
1923	/* On BusLogic adapters, the interrupt and geometry registers are R/W.
1924	* That is different from Adaptec 154x where those are read only.
1925	*/
1926	case BUSLOGIC_REGISTER_INTERRUPT:
1927	pBusLogic->regInterrupt = uVal;
1928	break;
1929
1930	case BUSLOGIC_REGISTER_GEOMETRY:
1931	pBusLogic->regGeometry = uVal;
1932	break;
1933
1934	default:
1935	AssertMsgFailed(("Register not available\n"));
1936	rc = VERR_IOM_IOPORT_UNUSED;
1937	}
1938
1939	return rc;
1940	}
1941
1942	/**
1943	* Memory mapped I/O Handler for read operations.
1944	*
1945	* @returns VBox status code.
1946	*
1947	* @param pDevIns The device instance.
1948	* @param pvUser User argument.
1949	* @param GCPhysAddr Physical address (in GC) where the read starts.
1950	* @param pv Where to store the result.
1951	* @param cb Number of bytes read.
1952	*/
1953	PDMBOTHCBDECL(int) buslogicMMIORead(PPDMDEVINS pDevIns, void *pvUser,
1954	RTGCPHYS GCPhysAddr, void *pv, unsigned cb)
1955	{
1956	/* the linux driver does not make use of the MMIO area. */
1957	AssertMsgFailed(("MMIO Read\n"));
1958	return VINF_SUCCESS;
1959	}
1960
1961	/**
1962	* Memory mapped I/O Handler for write operations.
1963	*
1964	* @returns VBox status code.
1965	*
1966	* @param pDevIns The device instance.
1967	* @param pvUser User argument.
1968	* @param GCPhysAddr Physical address (in GC) where the read starts.
1969	* @param pv Where to fetch the result.
1970	* @param cb Number of bytes to write.
1971	*/
1972	PDMBOTHCBDECL(int) buslogicMMIOWrite(PPDMDEVINS pDevIns, void *pvUser,
1973	RTGCPHYS GCPhysAddr, void const *pv, unsigned cb)
1974	{
1975	/* the linux driver does not make use of the MMIO area. */
1976	AssertMsgFailed(("MMIO Write\n"));
1977	return VINF_SUCCESS;
1978	}
1979
1980	/**
1981	* Port I/O Handler for IN operations.
1982	*
1983	* @returns VBox status code.
1984	*
1985	* @param pDevIns The device instance.
1986	* @param pvUser User argument.
1987	* @param uPort Port number used for the IN operation.
1988	* @param pu32 Where to store the result.
1989	* @param cb Number of bytes read.
1990	*/
1991	PDMBOTHCBDECL(int) buslogicIOPortRead (PPDMDEVINS pDevIns, void *pvUser,
1992	RTIOPORT Port, uint32_t *pu32, unsigned cb)
1993	{
1994	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
1995	unsigned iRegister = Port % 4;
1996
1997	Assert(cb == 1);
1998
1999	return buslogicRegisterRead(pBusLogic, iRegister, pu32);
2000	}
2001
2002	/**
2003	* Port I/O Handler for OUT operations.
2004	*
2005	* @returns VBox status code.
2006	*
2007	* @param pDevIns The device instance.
2008	* @param pvUser User argument.
2009	* @param uPort Port number used for the IN operation.
2010	* @param u32 The value to output.
2011	* @param cb The value size in bytes.
2012	*/
2013	PDMBOTHCBDECL(int) buslogicIOPortWrite (PPDMDEVINS pDevIns, void *pvUser,
2014	RTIOPORT Port, uint32_t u32, unsigned cb)
2015	{
2016	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2017	int rc = VINF_SUCCESS;
2018	unsigned iRegister = Port % 4;
2019	uint8_t uVal = (uint8_t)u32;
2020
2021	Assert(cb == 1);
2022
2023	rc = buslogicRegisterWrite(pBusLogic, iRegister, (uint8_t)uVal);
2024
2025	Log2(("#%d %s: pvUser=%#p cb=%d u32=%#x Port=%#x rc=%Rrc\n",
2026	pDevIns->iInstance, __FUNCTION__, pvUser, cb, u32, Port, rc));
2027
2028	return rc;
2029	}
2030
2031	#ifdef IN_RING3
2032
2033	static int buslogicPrepareBIOSSCSIRequest(PBUSLOGIC pBusLogic)
2034	{
2035	int rc;
2036	PBUSLOGICTASKSTATE pTaskState;
2037	uint32_t uTargetDevice;
2038
2039	rc = RTMemCacheAllocEx(pBusLogic->hTaskCache, (void **)&pTaskState);
2040	AssertMsgRCReturn(rc, ("Getting task from cache failed rc=%Rrc\n", rc), rc);
2041
2042	pTaskState->fBIOS = true;
2043
2044	rc = vboxscsiSetupRequest(&pBusLogic->VBoxSCSI, &pTaskState->PDMScsiRequest, &uTargetDevice);
2045	AssertMsgRCReturn(rc, ("Setting up SCSI request failed rc=%Rrc\n", rc), rc);
2046
2047	pTaskState->PDMScsiRequest.pvUser = pTaskState;
2048
2049	pTaskState->CTX_SUFF(pTargetDevice) = &pBusLogic->aDeviceStates[uTargetDevice];
2050
2051	if (!pTaskState->CTX_SUFF(pTargetDevice)->fPresent)
2052	{
2053	/* Device is not present. */
2054	AssertMsg(pTaskState->PDMScsiRequest.pbCDB[0] == SCSI_INQUIRY,
2055	("Device is not present but command is not inquiry\n"));
2056
2057	SCSIINQUIRYDATA ScsiInquiryData;
2058
2059	memset(&ScsiInquiryData, 0, sizeof(SCSIINQUIRYDATA));
2060	ScsiInquiryData.u5PeripheralDeviceType = SCSI_INQUIRY_DATA_PERIPHERAL_DEVICE_TYPE_UNKNOWN;
2061	ScsiInquiryData.u3PeripheralQualifier = SCSI_INQUIRY_DATA_PERIPHERAL_QUALIFIER_NOT_CONNECTED_NOT_SUPPORTED;
2062
2063	memcpy(pBusLogic->VBoxSCSI.pBuf, &ScsiInquiryData, 5);
2064
2065	rc = vboxscsiRequestFinished(&pBusLogic->VBoxSCSI, &pTaskState->PDMScsiRequest);
2066	AssertMsgRCReturn(rc, ("Finishing BIOS SCSI request failed rc=%Rrc\n", rc), rc);
2067
2068	RTMemCacheFree(pBusLogic->hTaskCache, pTaskState);
2069	}
2070	else
2071	{
2072	LogFlowFunc(("before increment %u\n", pTaskState->CTX_SUFF(pTargetDevice)->cOutstandingRequests));
2073	ASMAtomicIncU32(&pTaskState->CTX_SUFF(pTargetDevice)->cOutstandingRequests);
2074	LogFlowFunc(("after increment %u\n", pTaskState->CTX_SUFF(pTargetDevice)->cOutstandingRequests));
2075
2076	rc = pTaskState->CTX_SUFF(pTargetDevice)->pDrvSCSIConnector->pfnSCSIRequestSend(pTaskState->CTX_SUFF(pTargetDevice)->pDrvSCSIConnector,
2077	&pTaskState->PDMScsiRequest);
2078	AssertMsgRC(rc, ("Sending request to SCSI layer failed rc=%Rrc\n", rc));
2079	}
2080
2081	return rc;
2082	}
2083
2084
2085	/**
2086	* Port I/O Handler for IN operations - BIOS port.
2087	*
2088	* @returns VBox status code.
2089	*
2090	* @param pDevIns The device instance.
2091	* @param pvUser User argument.
2092	* @param uPort Port number used for the IN operation.
2093	* @param pu32 Where to store the result.
2094	* @param cb Number of bytes read.
2095	*/
2096	static int buslogicBIOSIOPortRead(PPDMDEVINS pDevIns, void *pvUser,
2097	RTIOPORT Port, uint32_t *pu32, unsigned cb)
2098	{
2099	int rc;
2100	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2101
2102	Assert(cb == 1);
2103
2104	rc = vboxscsiReadRegister(&pBusLogic->VBoxSCSI, (Port - BUSLOGIC_BIOS_IO_PORT), pu32);
2105
2106	//Log2(("%s: pu32=%p:{%.*Rhxs} iRegister=%d rc=%Rrc\n",
2107	// __FUNCTION__, pu32, 1, pu32, (Port - BUSLOGIC_BIOS_IO_PORT), rc));
2108
2109	return rc;
2110	}
2111
2112	/**
2113	* Port I/O Handler for OUT operations - BIOS port.
2114	*
2115	* @returns VBox status code.
2116	*
2117	* @param pDevIns The device instance.
2118	* @param pvUser User argument.
2119	* @param uPort Port number used for the IN operation.
2120	* @param u32 The value to output.
2121	* @param cb The value size in bytes.
2122	*/
2123	static int buslogicBIOSIOPortWrite(PPDMDEVINS pDevIns, void *pvUser,
2124	RTIOPORT Port, uint32_t u32, unsigned cb)
2125	{
2126	int rc;
2127	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2128
2129	Log2(("#%d %s: pvUser=%#p cb=%d u32=%#x Port=%#x\n",
2130	pDevIns->iInstance, __FUNCTION__, pvUser, cb, u32, Port));
2131
2132	Assert(cb == 1);
2133
2134	rc = vboxscsiWriteRegister(&pBusLogic->VBoxSCSI, (Port - BUSLOGIC_BIOS_IO_PORT), (uint8_t)u32);
2135	if (rc == VERR_MORE_DATA)
2136	{
2137	rc = buslogicPrepareBIOSSCSIRequest(pBusLogic);
2138	AssertRC(rc);
2139	}
2140	else if (RT_FAILURE(rc))
2141	AssertMsgFailed(("Writing BIOS register failed %Rrc\n", rc));
2142
2143	return VINF_SUCCESS;
2144	}
2145
2146	/**
2147	* Port I/O Handler for primary port range OUT string operations.
2148	* @see FNIOMIOPORTOUTSTRING for details.
2149	*/
2150	static DECLCALLBACK(int) buslogicBIOSIOPortWriteStr(PPDMDEVINS pDevIns, void pvUser, RTIOPORT Port, RTGCPTR pGCPtrSrc, PRTGCUINTREG pcTransfer, unsigned cb)
2151	{
2152	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2153	int rc;
2154
2155	Log2(("#%d %s: pvUser=%#p cb=%d Port=%#x\n",
2156	pDevIns->iInstance, __FUNCTION__, pvUser, cb, Port));
2157
2158	rc = vboxscsiWriteString(pDevIns, &pBusLogic->VBoxSCSI, (Port - BUSLOGIC_BIOS_IO_PORT),
2159	pGCPtrSrc, pcTransfer, cb);
2160	if (rc == VERR_MORE_DATA)
2161	{
2162	rc = buslogicPrepareBIOSSCSIRequest(pBusLogic);
2163	AssertRC(rc);
2164	}
2165	else if (RT_FAILURE(rc))
2166	AssertMsgFailed(("Writing BIOS register failed %Rrc\n", rc));
2167
2168	return rc;
2169	}
2170
2171	/**
2172	* Port I/O Handler for primary port range IN string operations.
2173	* @see FNIOMIOPORTINSTRING for details.
2174	*/
2175	static DECLCALLBACK(int) buslogicBIOSIOPortReadStr(PPDMDEVINS pDevIns, void pvUser, RTIOPORT Port, RTGCPTR pGCPtrDst, PRTGCUINTREG pcTransfer, unsigned cb)
2176	{
2177	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2178
2179	LogFlowFunc(("#%d %s: pvUser=%#p cb=%d Port=%#x\n",
2180	pDevIns->iInstance, __FUNCTION__, pvUser, cb, Port));
2181
2182	return vboxscsiReadString(pDevIns, &pBusLogic->VBoxSCSI, (Port - BUSLOGIC_BIOS_IO_PORT),
2183	pGCPtrDst, pcTransfer, cb);
2184	}
2185
2186	/**
2187	* Update the ISA I/O range.
2188	*
2189	* @returns nothing.
2190	* @param pBusLogic Pointer to the BusLogic device instance.
2191	* @param uBaseCode Encoded ISA I/O base; only low 3 bits are used.
2192	*/
2193	static int buslogicRegisterISARange(PBUSLOGIC pBusLogic, uint8_t uBaseCode)
2194	{
2195	uint8_t uCode = uBaseCode & MAX_ISA_BASE;
2196	uint16_t uNewBase = aISABases[uCode];
2197	int rc = VINF_SUCCESS;
2198
2199	LogFlowFunc(("ISA I/O code %02X, new base %X\n", uBaseCode, uNewBase));
2200
2201	/* Check if the same port range is already registered. */
2202	if (uNewBase != pBusLogic->IOISABase)
2203	{
2204	/* Unregister the old range, if any. */
2205	if (pBusLogic->IOISABase)
2206	rc = PDMDevHlpIOPortDeregister(pBusLogic->CTX_SUFF(pDevIns), pBusLogic->IOISABase, 4);
2207
2208	if (RT_SUCCESS(rc))
2209	{
2210	pBusLogic->IOISABase = 0; /* First mark as unregistered. */
2211	pBusLogic->uISABaseCode = ISA_BASE_DISABLED;
2212
2213	if (uNewBase)
2214	{
2215	/* Register the new range if requested. */
2216	rc = PDMDevHlpIOPortRegister(pBusLogic->CTX_SUFF(pDevIns), uNewBase, 4, NULL,
2217	buslogicIOPortWrite, buslogicIOPortRead,
2218	NULL, NULL,
2219	"BusLogic ISA");
2220	if (RT_SUCCESS(rc))
2221	{
2222	pBusLogic->IOISABase = uNewBase;
2223	pBusLogic->uISABaseCode = uCode;
2224	}
2225	}
2226	}
2227	if (RT_SUCCESS(rc))
2228	{
2229	if (uNewBase)
2230	{
2231	Log(("ISA I/O base: %x\n", uNewBase));
2232	LogRel(("buslogic: ISA I/O base: %x\n", uNewBase));
2233	}
2234	else
2235	{
2236	Log(("Disabling ISA I/O ports.\n"));
2237	LogRel(("buslogic: ISA I/O disabled\n"));
2238	}
2239	}
2240
2241	}
2242	return rc;
2243	}
2244
2245	static void buslogicWarningDiskFull(PPDMDEVINS pDevIns)
2246	{
2247	int rc;
2248	LogRel(("BusLogic#%d: Host disk full\n", pDevIns->iInstance));
2249	rc = PDMDevHlpVMSetRuntimeError(pDevIns, VMSETRTERR_FLAGS_SUSPEND \| VMSETRTERR_FLAGS_NO_WAIT, "DevBusLogic_DISKFULL",
2250	N_("Host system reported disk full. VM execution is suspended. You can resume after freeing some space"));
2251	AssertRC(rc);
2252	}
2253
2254	static void buslogicWarningFileTooBig(PPDMDEVINS pDevIns)
2255	{
2256	int rc;
2257	LogRel(("BusLogic#%d: File too big\n", pDevIns->iInstance));
2258	rc = PDMDevHlpVMSetRuntimeError(pDevIns, VMSETRTERR_FLAGS_SUSPEND \| VMSETRTERR_FLAGS_NO_WAIT, "DevBusLogic_FILETOOBIG",
2259	N_("Host system reported that the file size limit of the host file system has been exceeded. VM execution is suspended. You need to move your virtual hard disk to a filesystem which allows bigger files"));
2260	AssertRC(rc);
2261	}
2262
2263	static void buslogicWarningISCSI(PPDMDEVINS pDevIns)
2264	{
2265	int rc;
2266	LogRel(("BusLogic#%d: iSCSI target unavailable\n", pDevIns->iInstance));
2267	rc = PDMDevHlpVMSetRuntimeError(pDevIns, VMSETRTERR_FLAGS_SUSPEND \| VMSETRTERR_FLAGS_NO_WAIT, "DevBusLogic_ISCSIDOWN",
2268	N_("The iSCSI target has stopped responding. VM execution is suspended. You can resume when it is available again"));
2269	AssertRC(rc);
2270	}
2271
2272	static void buslogicWarningUnknown(PPDMDEVINS pDevIns, int rc)
2273	{
2274	int rc2;
2275	LogRel(("BusLogic#%d: Unknown but recoverable error has occurred (rc=%Rrc)\n", pDevIns->iInstance, rc));
2276	rc2 = PDMDevHlpVMSetRuntimeError(pDevIns, VMSETRTERR_FLAGS_SUSPEND \| VMSETRTERR_FLAGS_NO_WAIT, "DevBusLogic_UNKNOWN",
2277	N_("An unknown but recoverable I/O error has occurred (rc=%Rrc). VM execution is suspended. You can resume when the error is fixed"), rc);
2278	AssertRC(rc2);
2279	}
2280
2281	static void buslogicRedoSetWarning(PBUSLOGIC pThis, int rc)
2282	{
2283	if (rc == VERR_DISK_FULL)
2284	buslogicWarningDiskFull(pThis->CTX_SUFF(pDevIns));
2285	else if (rc == VERR_FILE_TOO_BIG)
2286	buslogicWarningFileTooBig(pThis->CTX_SUFF(pDevIns));
2287	else if (rc == VERR_BROKEN_PIPE \|\| rc == VERR_NET_CONNECTION_REFUSED)
2288	{
2289	/* iSCSI connection abort (first error) or failure to reestablish
2290	* connection (second error). Pause VM. On resume we'll retry. */
2291	buslogicWarningISCSI(pThis->CTX_SUFF(pDevIns));
2292	}
2293	else
2294	buslogicWarningUnknown(pThis->CTX_SUFF(pDevIns), rc);
2295	}
2296
2297
2298	static DECLCALLBACK(int) buslogicMMIOMap(PPCIDEVICE pPciDev, /unsigned/ int iRegion,
2299	RTGCPHYS GCPhysAddress, uint32_t cb,
2300	PCIADDRESSSPACE enmType)
2301	{
2302	PPDMDEVINS pDevIns = pPciDev->pDevIns;
2303	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2304	int rc = VINF_SUCCESS;
2305
2306	Log2(("%s: registering MMIO area at GCPhysAddr=%RGp cb=%u\n", __FUNCTION__, GCPhysAddress, cb));
2307
2308	Assert(cb >= 32);
2309
2310	if (enmType == PCI_ADDRESS_SPACE_MEM)
2311	{
2312	/* We use the assigned size here, because we currently only support page aligned MMIO ranges. */
2313	rc = PDMDevHlpMMIORegister(pDevIns, GCPhysAddress, cb, NULL /pvUser/,
2314	IOMMMIO_FLAGS_READ_PASSTHRU \| IOMMMIO_FLAGS_WRITE_PASSTHRU,
2315	buslogicMMIOWrite, buslogicMMIORead, "BusLogic MMIO");
2316	if (RT_FAILURE(rc))
2317	return rc;
2318
2319	if (pThis->fR0Enabled)
2320	{
2321	rc = PDMDevHlpMMIORegisterR0(pDevIns, GCPhysAddress, cb, NIL_RTR0PTR /pvUser/,
2322	"buslogicMMIOWrite", "buslogicMMIORead");
2323	if (RT_FAILURE(rc))
2324	return rc;
2325	}
2326
2327	if (pThis->fGCEnabled)
2328	{
2329	rc = PDMDevHlpMMIORegisterRC(pDevIns, GCPhysAddress, cb, NIL_RTRCPTR /pvUser/,
2330	"buslogicMMIOWrite", "buslogicMMIORead");
2331	if (RT_FAILURE(rc))
2332	return rc;
2333	}
2334
2335	pThis->MMIOBase = GCPhysAddress;
2336	}
2337	else if (enmType == PCI_ADDRESS_SPACE_IO)
2338	{
2339	rc = PDMDevHlpIOPortRegister(pDevIns, (RTIOPORT)GCPhysAddress, 32,
2340	NULL, buslogicIOPortWrite, buslogicIOPortRead, NULL, NULL, "BusLogic PCI");
2341	if (RT_FAILURE(rc))
2342	return rc;
2343
2344	if (pThis->fR0Enabled)
2345	{
2346	rc = PDMDevHlpIOPortRegisterR0(pDevIns, (RTIOPORT)GCPhysAddress, 32,
2347	0, "buslogicIOPortWrite", "buslogicIOPortRead", NULL, NULL, "BusLogic PCI");
2348	if (RT_FAILURE(rc))
2349	return rc;
2350	}
2351
2352	if (pThis->fGCEnabled)
2353	{
2354	rc = PDMDevHlpIOPortRegisterRC(pDevIns, (RTIOPORT)GCPhysAddress, 32,
2355	0, "buslogicIOPortWrite", "buslogicIOPortRead", NULL, NULL, "BusLogic PCI");
2356	if (RT_FAILURE(rc))
2357	return rc;
2358	}
2359
2360	pThis->IOPortBase = (RTIOPORT)GCPhysAddress;
2361	}
2362	else
2363	AssertMsgFailed(("Invalid enmType=%d\n", enmType));
2364
2365	return rc;
2366	}
2367
2368	static DECLCALLBACK(int) buslogicDeviceSCSIRequestCompleted(PPDMISCSIPORT pInterface, PPDMSCSIREQUEST pSCSIRequest,
2369	int rcCompletion, bool fRedo, int rcReq)
2370	{
2371	int rc;
2372	PBUSLOGICTASKSTATE pTaskState = (PBUSLOGICTASKSTATE)pSCSIRequest->pvUser;
2373	PBUSLOGICDEVICE pBusLogicDevice = pTaskState->CTX_SUFF(pTargetDevice);
2374	PBUSLOGIC pBusLogic = pBusLogicDevice->CTX_SUFF(pBusLogic);
2375
2376	LogFlowFunc(("before decrement %u\n", pBusLogicDevice->cOutstandingRequests));
2377	ASMAtomicDecU32(&pBusLogicDevice->cOutstandingRequests);
2378	LogFlowFunc(("after decrement %u\n", pBusLogicDevice->cOutstandingRequests));
2379
2380	if (fRedo)
2381	{
2382	if (!pTaskState->fBIOS)
2383	{
2384	buslogicDataBufferFree(pTaskState);
2385
2386	if (pTaskState->pbSenseBuffer)
2387	buslogicSenseBufferFree(pTaskState, false /* fCopy */);
2388	}
2389
2390	/* Add to the list. */
2391	do
2392	{
2393	pTaskState->pRedoNext = ASMAtomicReadPtrT(&pBusLogic->pTasksRedoHead, PBUSLOGICTASKSTATE);
2394	} while (!ASMAtomicCmpXchgPtr(&pBusLogic->pTasksRedoHead, pTaskState, pTaskState->pRedoNext));
2395
2396	/* Suspend the VM if not done already. */
2397	if (!ASMAtomicXchgBool(&pBusLogic->fRedo, true))
2398	buslogicRedoSetWarning(pBusLogic, rcReq);
2399	}
2400	else
2401	{
2402	if (pTaskState->fBIOS)
2403	{
2404	rc = vboxscsiRequestFinished(&pBusLogic->VBoxSCSI, pSCSIRequest);
2405	AssertMsgRC(rc, ("Finishing BIOS SCSI request failed rc=%Rrc\n", rc));
2406	}
2407	else
2408	{
2409	buslogicDataBufferFree(pTaskState);
2410
2411	if (pTaskState->pbSenseBuffer)
2412	buslogicSenseBufferFree(pTaskState, (rcCompletion != SCSI_STATUS_OK));
2413
2414	if (rcCompletion == SCSI_STATUS_OK)
2415	buslogicSendIncomingMailbox(pBusLogic, pTaskState,
2416	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_CMD_COMPLETED,
2417	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
2418	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITHOUT_ERROR);
2419	else if (rcCompletion == SCSI_STATUS_CHECK_CONDITION)
2420	buslogicSendIncomingMailbox(pBusLogic, pTaskState,
2421	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_CMD_COMPLETED,
2422	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_CHECK_CONDITION,
2423	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR);
2424	else
2425	AssertMsgFailed(("invalid completion status %d\n", rcCompletion));
2426	}
2427	/* Remove task from the cache. */
2428	RTMemCacheFree(pBusLogic->hTaskCache, pTaskState);
2429	}
2430
2431	if (pBusLogicDevice->cOutstandingRequests == 0 && pBusLogic->fSignalIdle)
2432	PDMDevHlpAsyncNotificationCompleted(pBusLogic->pDevInsR3);
2433
2434	return VINF_SUCCESS;
2435	}
2436
2437	static DECLCALLBACK(int) buslogicQueryDeviceLocation(PPDMISCSIPORT pInterface, const char **ppcszController,
2438	uint32_t piInstance, uint32_t piLUN)
2439	{
2440	PBUSLOGICDEVICE pBusLogicDevice = PDMISCSIPORT_2_PBUSLOGICDEVICE(pInterface);
2441	PPDMDEVINS pDevIns = pBusLogicDevice->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns);
2442
2443	AssertPtrReturn(ppcszController, VERR_INVALID_POINTER);
2444	AssertPtrReturn(piInstance, VERR_INVALID_POINTER);
2445	AssertPtrReturn(piLUN, VERR_INVALID_POINTER);
2446
2447	*ppcszController = pDevIns->pReg->szName;
2448	*piInstance = pDevIns->iInstance;
2449	*piLUN = pBusLogicDevice->iLUN;
2450
2451	return VINF_SUCCESS;
2452	}
2453
2454	static int buslogicDeviceSCSIRequestSetup(PBUSLOGIC pBusLogic, PBUSLOGICTASKSTATE pTaskState)
2455	{
2456	int rc = VINF_SUCCESS;
2457
2458	/* Fetch the CCB from guest memory. */
2459	RTGCPHYS GCPhysAddrCCB = (RTGCPHYS)pTaskState->MailboxGuest.u32PhysAddrCCB;
2460	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrCCB,
2461	&pTaskState->CommandControlBlockGuest, sizeof(CommandControlBlock));
2462
2463	PBUSLOGICDEVICE pTargetDevice = &pBusLogic->aDeviceStates[pTaskState->CommandControlBlockGuest.uTargetId];
2464	pTaskState->CTX_SUFF(pTargetDevice) = pTargetDevice;
2465
2466	#ifdef DEBUG
2467	buslogicDumpCCBInfo(&pTaskState->CommandControlBlockGuest);
2468	#endif
2469
2470	/* Alloc required buffers. */
2471	rc = buslogicDataBufferAlloc(pTaskState);
2472	AssertMsgRC(rc, ("Alloc failed rc=%Rrc\n", rc));
2473
2474	if (pTaskState->CommandControlBlockGuest.cbSenseData)
2475	{
2476	rc = buslogicSenseBufferAlloc(pTaskState);
2477	AssertMsgRC(rc, ("Mapping sense buffer failed rc=%Rrc\n", rc));
2478	}
2479
2480	/* Check if device is present on bus. If not return error immediately and don't process this further. */
2481	if (!pBusLogic->aDeviceStates[pTaskState->CommandControlBlockGuest.uTargetId].fPresent)
2482	{
2483	buslogicDataBufferFree(pTaskState);
2484
2485	if (pTaskState->pbSenseBuffer)
2486	buslogicSenseBufferFree(pTaskState, true);
2487
2488	buslogicSendIncomingMailbox(pBusLogic, pTaskState,
2489	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_SCSI_SELECTION_TIMEOUT,
2490	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
2491	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR);
2492
2493	RTMemCacheFree(pBusLogic->hTaskCache, pTaskState);
2494	}
2495	else
2496	{
2497	/* Setup SCSI request. */
2498	pTaskState->PDMScsiRequest.uLogicalUnit = pTaskState->CommandControlBlockGuest.uLogicalUnit;
2499
2500	if (pTaskState->CommandControlBlockGuest.uDataDirection == BUSLOGIC_CCB_DIRECTION_UNKNOWN)
2501	pTaskState->PDMScsiRequest.uDataDirection = PDMSCSIREQUESTTXDIR_UNKNOWN;
2502	else if (pTaskState->CommandControlBlockGuest.uDataDirection == BUSLOGIC_CCB_DIRECTION_IN)
2503	pTaskState->PDMScsiRequest.uDataDirection = PDMSCSIREQUESTTXDIR_FROM_DEVICE;
2504	else if (pTaskState->CommandControlBlockGuest.uDataDirection == BUSLOGIC_CCB_DIRECTION_OUT)
2505	pTaskState->PDMScsiRequest.uDataDirection = PDMSCSIREQUESTTXDIR_TO_DEVICE;
2506	else if (pTaskState->CommandControlBlockGuest.uDataDirection == BUSLOGIC_CCB_DIRECTION_NO_DATA)
2507	pTaskState->PDMScsiRequest.uDataDirection = PDMSCSIREQUESTTXDIR_NONE;
2508	else
2509	AssertMsgFailed(("Invalid data direction type %d\n", pTaskState->CommandControlBlockGuest.uDataDirection));
2510
2511	pTaskState->PDMScsiRequest.cbCDB = pTaskState->CommandControlBlockGuest.cbCDB;
2512	pTaskState->PDMScsiRequest.pbCDB = pTaskState->CommandControlBlockGuest.aCDB;
2513	if (pTaskState->DataSeg.cbSeg)
2514	{
2515	pTaskState->PDMScsiRequest.cbScatterGather = pTaskState->DataSeg.cbSeg;
2516	pTaskState->PDMScsiRequest.cScatterGatherEntries = 1;
2517	pTaskState->PDMScsiRequest.paScatterGatherHead = &pTaskState->DataSeg;
2518	}
2519	else
2520	{
2521	pTaskState->PDMScsiRequest.cbScatterGather = 0;
2522	pTaskState->PDMScsiRequest.cScatterGatherEntries = 0;
2523	pTaskState->PDMScsiRequest.paScatterGatherHead = NULL;
2524	}
2525	pTaskState->PDMScsiRequest.cbSenseBuffer = pTaskState->CommandControlBlockGuest.cbSenseData;
2526	pTaskState->PDMScsiRequest.pbSenseBuffer = pTaskState->pbSenseBuffer;
2527	pTaskState->PDMScsiRequest.pvUser = pTaskState;
2528
2529	ASMAtomicIncU32(&pTargetDevice->cOutstandingRequests);
2530	rc = pTargetDevice->pDrvSCSIConnector->pfnSCSIRequestSend(pTargetDevice->pDrvSCSIConnector, &pTaskState->PDMScsiRequest);
2531	AssertMsgRC(rc, ("Sending request to SCSI layer failed rc=%Rrc\n", rc));
2532	}
2533
2534	return rc;
2535	}
2536
2537	/**
2538	* Read mailbox from the guest and execute command.
2539	*
2540	* @returns VBox status code.
2541	* @param pBusLogic Pointer to the BusLogic instance data.
2542	*/
2543	static int buslogicProcessMailboxNext(PBUSLOGIC pBusLogic)
2544	{
2545	PBUSLOGICTASKSTATE pTaskState = NULL;
2546	RTGCPHYS GCPhysAddrMailboxCurrent;
2547	int rc;
2548
2549	rc = RTMemCacheAllocEx(pBusLogic->hTaskCache, (void **)&pTaskState);
2550	AssertMsgReturn(RT_SUCCESS(rc) && (pTaskState != NULL), ("Failed to get task state from cache\n"), rc);
2551
2552	pTaskState->fBIOS = false;
2553
2554	if (!pBusLogic->fStrictRoundRobinMode)
2555	{
2556	/* Search for a filled mailbox - stop if we have scanned all mailboxes. */
2557	uint8_t uMailboxPosCur = pBusLogic->uMailboxOutgoingPositionCurrent;
2558
2559	do
2560	{
2561	/* Fetch mailbox from guest memory. */
2562	GCPhysAddrMailboxCurrent = buslogicOutgoingMailboxGetGCPhys(pBusLogic);
2563
2564	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxCurrent,
2565	&pTaskState->MailboxGuest, sizeof(Mailbox));
2566
2567	/* Check the next mailbox. */
2568	buslogicOutgoingMailboxAdvance(pBusLogic);
2569	} while ( pTaskState->MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE
2570	&& uMailboxPosCur != pBusLogic->uMailboxOutgoingPositionCurrent);
2571	}
2572	else
2573	{
2574	/* Fetch mailbox from guest memory. */
2575	GCPhysAddrMailboxCurrent = buslogicOutgoingMailboxGetGCPhys(pBusLogic);
2576
2577	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxCurrent,
2578	&pTaskState->MailboxGuest, sizeof(Mailbox));
2579	}
2580
2581	/*
2582	* Check if the mailbox is actually loaded.
2583	* It might be possible that the guest notified us without
2584	* a loaded mailbox. Do nothing in that case but leave a
2585	* log entry.
2586	*/
2587	if (pTaskState->MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE)
2588	{
2589	Log(("No loaded mailbox left\n"));
2590	RTMemCacheFree(pBusLogic->hTaskCache, pTaskState);
2591	return VERR_NO_DATA;
2592	}
2593
2594	LogFlow(("Got loaded mailbox at slot %u, CCB phys %RGp\n", pBusLogic->uMailboxOutgoingPositionCurrent, (RTGCPHYS)pTaskState->MailboxGuest.u32PhysAddrCCB));
2595	#ifdef DEBUG
2596	buslogicDumpMailboxInfo(&pTaskState->MailboxGuest, true);
2597	#endif
2598
2599	/* We got the mailbox, mark it as free in the guest. */
2600	uint8_t uActionCode = BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE;
2601	PDMDevHlpPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxCurrent + RT_OFFSETOF(Mailbox, u.out.uActionCode), &uActionCode, sizeof(uActionCode));
2602
2603	if (pTaskState->MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_START_COMMAND)
2604	rc = buslogicDeviceSCSIRequestSetup(pBusLogic, pTaskState);
2605	else if (pTaskState->MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_ABORT_COMMAND)
2606	{
2607	AssertMsgFailed(("Not implemented yet\n"));
2608	}
2609	else
2610	AssertMsgFailed(("Invalid outgoing mailbox action code %u\n", pTaskState->MailboxGuest.u.out.uActionCode));
2611
2612	AssertRC(rc);
2613
2614	/* Advance to the next mailbox. */
2615	if (pBusLogic->fStrictRoundRobinMode)
2616	buslogicOutgoingMailboxAdvance(pBusLogic);
2617
2618	return rc;
2619	}
2620
2621	/**
2622	* Transmit queue consumer
2623	* Queue a new async task.
2624	*
2625	* @returns Success indicator.
2626	* If false the item will not be removed and the flushing will stop.
2627	* @param pDevIns The device instance.
2628	* @param pItem The item to consume. Upon return this item will be freed.
2629	*/
2630	static DECLCALLBACK(bool) buslogicNotifyQueueConsumer(PPDMDEVINS pDevIns, PPDMQUEUEITEMCORE pItem)
2631	{
2632	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2633
2634	/* Reset notification send flag now. */
2635	Assert(pBusLogic->fNotificationSend);
2636	ASMAtomicXchgBool(&pBusLogic->fNotificationSend, false);
2637	ASMAtomicXchgU32(&pBusLogic->cMailboxesReady, 0); /* @todo: Actually not required anymore but to stay compatible with older saved states. */
2638
2639	/* Process mailboxes. */
2640	int rc;
2641	do
2642	{
2643	rc = buslogicProcessMailboxNext(pBusLogic);
2644	AssertMsg(RT_SUCCESS(rc) \|\| rc == VERR_NO_DATA, ("Processing mailbox failed rc=%Rrc\n", rc));
2645	} while (RT_SUCCESS(rc));
2646
2647	return true;
2648	}
2649
2650	/**
2651	* Kicks the controller to process pending tasks after the VM was resumed
2652	* or loaded from a saved state.
2653	*
2654	* @returns nothing.
2655	* @param pThis The BusLogic device instance.
2656	*/
2657	static void buslogicKick(PBUSLOGIC pThis)
2658	{
2659	if (pThis->fRedo)
2660	{
2661	pThis->fRedo = false;
2662	if (pThis->VBoxSCSI.fBusy)
2663	{
2664
2665	/* The BIOS had a request active when we got suspended. Resume it. */
2666	int rc = buslogicPrepareBIOSSCSIRequest(pThis);
2667	AssertRC(rc);
2668	}
2669	else
2670	{
2671	/* Queue all pending tasks again. */
2672	PBUSLOGICTASKSTATE pTaskState = pThis->pTasksRedoHead;
2673
2674	pThis->pTasksRedoHead = NULL;
2675
2676	while (pTaskState)
2677	{
2678	PBUSLOGICTASKSTATE pCur = pTaskState;
2679
2680	int rc = buslogicDeviceSCSIRequestSetup(pThis, pCur);
2681	AssertRC(rc);
2682
2683	pTaskState = pTaskState->pRedoNext;
2684	}
2685	}
2686	}
2687	}
2688
2689	static DECLCALLBACK(int) buslogicLiveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uPass)
2690	{
2691	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2692
2693	/* Save the device config. */
2694	for (unsigned i = 0; i < RT_ELEMENTS(pThis->aDeviceStates); i++)
2695	SSMR3PutBool(pSSM, pThis->aDeviceStates[i].fPresent);
2696
2697	return VINF_SSM_DONT_CALL_AGAIN;
2698	}
2699
2700	static DECLCALLBACK(int) buslogicSaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
2701	{
2702	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2703
2704	/* Every device first. */
2705	for (unsigned i = 0; i < RT_ELEMENTS(pBusLogic->aDeviceStates); i++)
2706	{
2707	PBUSLOGICDEVICE pDevice = &pBusLogic->aDeviceStates[i];
2708
2709	AssertMsg(!pDevice->cOutstandingRequests,
2710	("There are still outstanding requests on this device\n"));
2711	SSMR3PutBool(pSSM, pDevice->fPresent);
2712	SSMR3PutU32(pSSM, pDevice->cOutstandingRequests);
2713	}
2714	/* Now the main device state. */
2715	SSMR3PutU8 (pSSM, pBusLogic->regStatus);
2716	SSMR3PutU8 (pSSM, pBusLogic->regInterrupt);
2717	SSMR3PutU8 (pSSM, pBusLogic->regGeometry);
2718	SSMR3PutMem (pSSM, &pBusLogic->LocalRam, sizeof(pBusLogic->LocalRam));
2719	SSMR3PutU8 (pSSM, pBusLogic->uOperationCode);
2720	SSMR3PutMem (pSSM, &pBusLogic->aCommandBuffer, sizeof(pBusLogic->aCommandBuffer));
2721	SSMR3PutU8 (pSSM, pBusLogic->iParameter);
2722	SSMR3PutU8 (pSSM, pBusLogic->cbCommandParametersLeft);
2723	SSMR3PutBool (pSSM, pBusLogic->fUseLocalRam);
2724	SSMR3PutMem (pSSM, pBusLogic->aReplyBuffer, sizeof(pBusLogic->aReplyBuffer));
2725	SSMR3PutU8 (pSSM, pBusLogic->iReply);
2726	SSMR3PutU8 (pSSM, pBusLogic->cbReplyParametersLeft);
2727	SSMR3PutBool (pSSM, pBusLogic->fIRQEnabled);
2728	SSMR3PutU8 (pSSM, pBusLogic->uISABaseCode);
2729	SSMR3PutU32 (pSSM, pBusLogic->cMailbox);
2730	SSMR3PutGCPhys(pSSM, pBusLogic->GCPhysAddrMailboxOutgoingBase);
2731	SSMR3PutU32 (pSSM, pBusLogic->uMailboxOutgoingPositionCurrent);
2732	SSMR3PutU32 (pSSM, pBusLogic->cMailboxesReady);
2733	SSMR3PutBool (pSSM, pBusLogic->fNotificationSend);
2734	SSMR3PutGCPhys(pSSM, pBusLogic->GCPhysAddrMailboxIncomingBase);
2735	SSMR3PutU32 (pSSM, pBusLogic->uMailboxIncomingPositionCurrent);
2736	SSMR3PutBool (pSSM, pBusLogic->fStrictRoundRobinMode);
2737	SSMR3PutBool (pSSM, pBusLogic->fExtendedLunCCBFormat);
2738	/* Now the data for the BIOS interface. */
2739	SSMR3PutU8 (pSSM, pBusLogic->VBoxSCSI.regIdentify);
2740	SSMR3PutU8 (pSSM, pBusLogic->VBoxSCSI.uTargetDevice);
2741	SSMR3PutU8 (pSSM, pBusLogic->VBoxSCSI.uTxDir);
2742	SSMR3PutU8 (pSSM, pBusLogic->VBoxSCSI.cbCDB);
2743	SSMR3PutMem (pSSM, pBusLogic->VBoxSCSI.aCDB, sizeof(pBusLogic->VBoxSCSI.aCDB));
2744	SSMR3PutU8 (pSSM, pBusLogic->VBoxSCSI.iCDB);
2745	SSMR3PutU32 (pSSM, pBusLogic->VBoxSCSI.cbBuf);
2746	SSMR3PutU32 (pSSM, pBusLogic->VBoxSCSI.iBuf);
2747	SSMR3PutBool (pSSM, pBusLogic->VBoxSCSI.fBusy);
2748	SSMR3PutU8 (pSSM, pBusLogic->VBoxSCSI.enmState);
2749	if (pBusLogic->VBoxSCSI.cbBuf)
2750	SSMR3PutMem(pSSM, pBusLogic->VBoxSCSI.pBuf, pBusLogic->VBoxSCSI.cbBuf);
2751
2752	/*
2753	* Save the physical addresses of the command control blocks of still pending tasks.
2754	* They are processed again on resume.
2755	*
2756	* The number of pending tasks needs to be determined first.
2757	*/
2758	uint32_t cTasks = 0;
2759
2760	PBUSLOGICTASKSTATE pTaskState = pBusLogic->pTasksRedoHead;
2761	if (pBusLogic->fRedo)
2762	{
2763	while (pTaskState)
2764	{
2765	cTasks++;
2766	pTaskState = pTaskState->pRedoNext;
2767	}
2768	}
2769	SSMR3PutU32(pSSM, cTasks);
2770
2771	/* Write the address of every task now. */
2772	pTaskState = pBusLogic->pTasksRedoHead;
2773	while (pTaskState)
2774	{
2775	SSMR3PutU32(pSSM, pTaskState->MailboxGuest.u32PhysAddrCCB);
2776	pTaskState = pTaskState->pRedoNext;
2777	}
2778
2779	return SSMR3PutU32(pSSM, ~0);
2780	}
2781
2782	static DECLCALLBACK(int) buslogicLoadDone(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
2783	{
2784	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2785
2786	buslogicRegisterISARange(pThis, pThis->uISABaseCode);
2787	buslogicKick(pThis);
2788	return VINF_SUCCESS;
2789	}
2790
2791	static DECLCALLBACK(int) buslogicLoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
2792	{
2793	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2794	int rc = VINF_SUCCESS;
2795
2796	/* We support saved states only from this and older versions. */
2797	if (uVersion > BUSLOGIC_SAVED_STATE_MINOR_VERSION)
2798	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
2799
2800	/* Every device first. */
2801	for (unsigned i = 0; i < RT_ELEMENTS(pBusLogic->aDeviceStates); i++)
2802	{
2803	PBUSLOGICDEVICE pDevice = &pBusLogic->aDeviceStates[i];
2804
2805	AssertMsg(!pDevice->cOutstandingRequests,
2806	("There are still outstanding requests on this device\n"));
2807	bool fPresent;
2808	rc = SSMR3GetBool(pSSM, &fPresent);
2809	AssertRCReturn(rc, rc);
2810	if (pDevice->fPresent != fPresent)
2811	return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Target %u config mismatch: config=%RTbool state=%RTbool"), i, pDevice->fPresent, fPresent);
2812
2813	if (uPass == SSM_PASS_FINAL)
2814	SSMR3GetU32(pSSM, (uint32_t *)&pDevice->cOutstandingRequests);
2815	}
2816
2817	if (uPass != SSM_PASS_FINAL)
2818	return VINF_SUCCESS;
2819
2820	/* Now the main device state. */
2821	SSMR3GetU8 (pSSM, (uint8_t *)&pBusLogic->regStatus);
2822	SSMR3GetU8 (pSSM, (uint8_t *)&pBusLogic->regInterrupt);
2823	SSMR3GetU8 (pSSM, (uint8_t *)&pBusLogic->regGeometry);
2824	SSMR3GetMem (pSSM, &pBusLogic->LocalRam, sizeof(pBusLogic->LocalRam));
2825	SSMR3GetU8 (pSSM, &pBusLogic->uOperationCode);
2826	SSMR3GetMem (pSSM, &pBusLogic->aCommandBuffer, sizeof(pBusLogic->aCommandBuffer));
2827	SSMR3GetU8 (pSSM, &pBusLogic->iParameter);
2828	SSMR3GetU8 (pSSM, &pBusLogic->cbCommandParametersLeft);
2829	SSMR3GetBool (pSSM, &pBusLogic->fUseLocalRam);
2830	SSMR3GetMem (pSSM, pBusLogic->aReplyBuffer, sizeof(pBusLogic->aReplyBuffer));
2831	SSMR3GetU8 (pSSM, &pBusLogic->iReply);
2832	SSMR3GetU8 (pSSM, &pBusLogic->cbReplyParametersLeft);
2833	SSMR3GetBool (pSSM, &pBusLogic->fIRQEnabled);
2834	SSMR3GetU8 (pSSM, &pBusLogic->uISABaseCode);
2835	SSMR3GetU32 (pSSM, &pBusLogic->cMailbox);
2836	SSMR3GetGCPhys(pSSM, &pBusLogic->GCPhysAddrMailboxOutgoingBase);
2837	SSMR3GetU32 (pSSM, &pBusLogic->uMailboxOutgoingPositionCurrent);
2838	SSMR3GetU32 (pSSM, (uint32_t *)&pBusLogic->cMailboxesReady);
2839	SSMR3GetBool (pSSM, (bool *)&pBusLogic->fNotificationSend);
2840	SSMR3GetGCPhys(pSSM, &pBusLogic->GCPhysAddrMailboxIncomingBase);
2841	SSMR3GetU32 (pSSM, &pBusLogic->uMailboxIncomingPositionCurrent);
2842	SSMR3GetBool (pSSM, &pBusLogic->fStrictRoundRobinMode);
2843	SSMR3GetBool (pSSM, &pBusLogic->fExtendedLunCCBFormat);
2844	/* Now the data for the BIOS interface. */
2845	SSMR3GetU8 (pSSM, &pBusLogic->VBoxSCSI.regIdentify);
2846	SSMR3GetU8 (pSSM, &pBusLogic->VBoxSCSI.uTargetDevice);
2847	SSMR3GetU8 (pSSM, &pBusLogic->VBoxSCSI.uTxDir);
2848	SSMR3GetU8 (pSSM, &pBusLogic->VBoxSCSI.cbCDB);
2849	SSMR3GetMem (pSSM, pBusLogic->VBoxSCSI.aCDB, sizeof(pBusLogic->VBoxSCSI.aCDB));
2850	SSMR3GetU8 (pSSM, &pBusLogic->VBoxSCSI.iCDB);
2851	SSMR3GetU32 (pSSM, &pBusLogic->VBoxSCSI.cbBuf);
2852	SSMR3GetU32 (pSSM, &pBusLogic->VBoxSCSI.iBuf);
2853	SSMR3GetBool(pSSM, (bool *)&pBusLogic->VBoxSCSI.fBusy);
2854	SSMR3GetU8 (pSSM, (uint8_t *)&pBusLogic->VBoxSCSI.enmState);
2855	if (pBusLogic->VBoxSCSI.cbBuf)
2856	{
2857	pBusLogic->VBoxSCSI.pBuf = (uint8_t *)RTMemAllocZ(pBusLogic->VBoxSCSI.cbBuf);
2858	if (!pBusLogic->VBoxSCSI.pBuf)
2859	{
2860	LogRel(("BusLogic: Out of memory during restore.\n"));
2861	return PDMDEV_SET_ERROR(pDevIns, VERR_NO_MEMORY,
2862	N_("BusLogic: Out of memory during restore\n"));
2863	}
2864	SSMR3GetMem(pSSM, pBusLogic->VBoxSCSI.pBuf, pBusLogic->VBoxSCSI.cbBuf);
2865	}
2866
2867	if (pBusLogic->VBoxSCSI.fBusy)
2868	pBusLogic->fRedo = true;
2869
2870	if (uVersion > BUSLOGIC_SAVED_STATE_MINOR_PRE_ERROR_HANDLING)
2871	{
2872	/* Check if there are pending tasks saved. */
2873	uint32_t cTasks = 0;
2874
2875	SSMR3GetU32(pSSM, &cTasks);
2876
2877	if (cTasks)
2878	pBusLogic->fRedo = true;
2879
2880	for (uint32_t i = 0; i < cTasks; i++)
2881	{
2882	PBUSLOGICTASKSTATE pTaskState = (PBUSLOGICTASKSTATE)RTMemCacheAlloc(pBusLogic->hTaskCache);
2883	if (!pTaskState)
2884	{
2885	rc = VERR_NO_MEMORY;
2886	break;
2887	}
2888
2889	rc = SSMR3GetU32(pSSM, &pTaskState->MailboxGuest.u32PhysAddrCCB);
2890	if (RT_FAILURE(rc))
2891	{
2892	RTMemCacheFree(pBusLogic->hTaskCache, pTaskState);
2893	break;
2894	}
2895
2896	/* Link into the list. */
2897	pTaskState->pRedoNext = pBusLogic->pTasksRedoHead;
2898	pBusLogic->pTasksRedoHead = pTaskState;
2899	}
2900	}
2901
2902	if (RT_SUCCESS(rc))
2903	{
2904	uint32_t u32;
2905	rc = SSMR3GetU32(pSSM, &u32);
2906	if (RT_SUCCESS(rc))
2907	AssertMsgReturn(u32 == ~0U, ("%#x\n", u32), VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
2908	}
2909
2910	return rc;
2911	}
2912
2913	/**
2914	* Gets the pointer to the status LED of a device - called from the SCSi driver.
2915	*
2916	* @returns VBox status code.
2917	* @param pInterface Pointer to the interface structure containing the called function pointer.
2918	* @param iLUN The unit which status LED we desire. Always 0 here as the driver
2919	* doesn't know about other LUN's.
2920	* @param ppLed Where to store the LED pointer.
2921	*/
2922	static DECLCALLBACK(int) buslogicDeviceQueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed)
2923	{
2924	PBUSLOGICDEVICE pDevice = PDMILEDPORTS_2_PBUSLOGICDEVICE(pInterface);
2925	if (iLUN == 0)
2926	{
2927	*ppLed = &pDevice->Led;
2928	Assert((*ppLed)->u32Magic == PDMLED_MAGIC);
2929	return VINF_SUCCESS;
2930	}
2931	return VERR_PDM_LUN_NOT_FOUND;
2932	}
2933
2934	/**
2935	* @interface_method_impl{PDMIBASE,pfnQueryInterface}
2936	*/
2937	static DECLCALLBACK(void ) buslogicDeviceQueryInterface(PPDMIBASE pInterface, const char pszIID)
2938	{
2939	PBUSLOGICDEVICE pDevice = PDMIBASE_2_PBUSLOGICDEVICE(pInterface);
2940	PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pDevice->IBase);
2941	PDMIBASE_RETURN_INTERFACE(pszIID, PDMISCSIPORT, &pDevice->ISCSIPort);
2942	PDMIBASE_RETURN_INTERFACE(pszIID, PDMILEDPORTS, &pDevice->ILed);
2943	return NULL;
2944	}
2945
2946	/**
2947	* Gets the pointer to the status LED of a unit.
2948	*
2949	* @returns VBox status code.
2950	* @param pInterface Pointer to the interface structure containing the called function pointer.
2951	* @param iLUN The unit which status LED we desire.
2952	* @param ppLed Where to store the LED pointer.
2953	*/
2954	static DECLCALLBACK(int) buslogicStatusQueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed)
2955	{
2956	PBUSLOGIC pBusLogic = PDMILEDPORTS_2_PBUSLOGIC(pInterface);
2957	if (iLUN < BUSLOGIC_MAX_DEVICES)
2958	{
2959	*ppLed = &pBusLogic->aDeviceStates[iLUN].Led;
2960	Assert((*ppLed)->u32Magic == PDMLED_MAGIC);
2961	return VINF_SUCCESS;
2962	}
2963	return VERR_PDM_LUN_NOT_FOUND;
2964	}
2965
2966	/**
2967	* @interface_method_impl{PDMIBASE,pfnQueryInterface}
2968	*/
2969	static DECLCALLBACK(void ) buslogicStatusQueryInterface(PPDMIBASE pInterface, const char pszIID)
2970	{
2971	PBUSLOGIC pThis = PDMIBASE_2_PBUSLOGIC(pInterface);
2972	PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pThis->IBase);
2973	PDMIBASE_RETURN_INTERFACE(pszIID, PDMILEDPORTS, &pThis->ILeds);
2974	return NULL;
2975	}
2976
2977	/* -=-=-=-=- Helper -=-=-=-=- */
2978
2979	/**
2980	* Checks if all asynchronous I/O is finished.
2981	*
2982	* Used by buslogicReset, buslogicSuspend and buslogicPowerOff.
2983	*
2984	* @returns true if quiesced, false if busy.
2985	* @param pDevIns The device instance.
2986	*/
2987	static bool buslogicR3AllAsyncIOIsFinished(PPDMDEVINS pDevIns)
2988	{
2989	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2990
2991	for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aDeviceStates); i++)
2992	{
2993	PBUSLOGICDEVICE pThisDevice = &pThis->aDeviceStates[i];
2994	if (pThisDevice->pDrvBase)
2995	{
2996	if (pThisDevice->cOutstandingRequests != 0)
2997	return false;
2998	}
2999	}
3000
3001	return true;
3002	}
3003
3004	/**
3005	* Callback employed by buslogicR3Suspend and buslogicR3PowerOff..
3006	*
3007	* @returns true if we've quiesced, false if we're still working.
3008	* @param pDevIns The device instance.
3009	*/
3010	static DECLCALLBACK(bool) buslogicR3IsAsyncSuspendOrPowerOffDone(PPDMDEVINS pDevIns)
3011	{
3012	if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
3013	return false;
3014
3015	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3016	ASMAtomicWriteBool(&pThis->fSignalIdle, false);
3017	return true;
3018	}
3019
3020	/**
3021	* Common worker for ahciR3Suspend and ahciR3PowerOff.
3022	*/
3023	static void buslogicR3SuspendOrPowerOff(PPDMDEVINS pDevIns, bool fPowerOff)
3024	{
3025	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3026
3027	ASMAtomicWriteBool(&pThis->fSignalIdle, true);
3028	if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
3029	PDMDevHlpSetAsyncNotification(pDevIns, buslogicR3IsAsyncSuspendOrPowerOffDone);
3030	else
3031	{
3032	ASMAtomicWriteBool(&pThis->fSignalIdle, false);
3033
3034	AssertMsg(!pThis->fNotificationSend, ("The PDM Queue should be empty at this point\n"));
3035
3036	if (pThis->fRedo)
3037	{
3038	if (fPowerOff)
3039	{
3040	/* Free tasks which would have been queued again on resume. */
3041	PBUSLOGICTASKSTATE pTaskState = pThis->pTasksRedoHead;
3042
3043	pThis->pTasksRedoHead = NULL;
3044
3045	while (pTaskState)
3046	{
3047	PBUSLOGICTASKSTATE pFree;
3048
3049	pFree = pTaskState;
3050	pTaskState = pTaskState->pRedoNext;
3051
3052	RTMemCacheFree(pThis->hTaskCache, pFree);
3053	}
3054	pThis->fRedo = false;
3055	}
3056	else if (pThis->VBoxSCSI.fBusy)
3057	{
3058	/* Destroy the task because the BIOS interface has all necessary information. */
3059	Assert(pThis->pTasksRedoHead->fBIOS);
3060	Assert(!pThis->pTasksRedoHead->pRedoNext);
3061
3062	RTMemCacheFree(pThis->hTaskCache, pThis->pTasksRedoHead);
3063	pThis->pTasksRedoHead = NULL;
3064	}
3065	}
3066	}
3067	}
3068
3069	/**
3070	* Suspend notification.
3071	*
3072	* @param pDevIns The device instance data.
3073	*/
3074	static DECLCALLBACK(void) buslogicSuspend(PPDMDEVINS pDevIns)
3075	{
3076	Log(("buslogicSuspend\n"));
3077	buslogicR3SuspendOrPowerOff(pDevIns, false /* fPoweroff */);
3078	}
3079
3080	/**
3081	* Resume notification.
3082	*
3083	* @param pDevIns The device instance data.
3084	*/
3085	static DECLCALLBACK(void) buslogicResume(PPDMDEVINS pDevIns)
3086	{
3087	Log(("buslogicResume\n"));
3088	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3089	buslogicKick(pThis);
3090	}
3091
3092
3093	/**
3094	* Detach notification.
3095	*
3096	* One harddisk at one port has been unplugged.
3097	* The VM is suspended at this point.
3098	*
3099	* @param pDevIns The device instance.
3100	* @param iLUN The logical unit which is being detached.
3101	* @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
3102	*/
3103	static DECLCALLBACK(void) buslogicDetach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
3104	{
3105	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3106	PBUSLOGICDEVICE pDevice = &pThis->aDeviceStates[iLUN];
3107
3108	Log(("%s:\n", __FUNCTION__));
3109
3110	AssertMsg(fFlags & PDM_TACH_FLAGS_NOT_HOT_PLUG,
3111	("BusLogic: Device does not support hotplugging\n"));
3112
3113	/*
3114	* Zero some important members.
3115	*/
3116	pDevice->pDrvBase = NULL;
3117	pDevice->fPresent = false;
3118	pDevice->pDrvSCSIConnector = NULL;
3119	}
3120
3121	/**
3122	* Attach command.
3123	*
3124	* This is called when we change block driver.
3125	*
3126	* @returns VBox status code.
3127	* @param pDevIns The device instance.
3128	* @param iLUN The logical unit which is being detached.
3129	* @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
3130	*/
3131	static DECLCALLBACK(int) buslogicAttach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
3132	{
3133	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3134	PBUSLOGICDEVICE pDevice = &pThis->aDeviceStates[iLUN];
3135	int rc;
3136
3137	AssertMsgReturn(fFlags & PDM_TACH_FLAGS_NOT_HOT_PLUG,
3138	("BusLogic: Device does not support hotplugging\n"),
3139	VERR_INVALID_PARAMETER);
3140
3141	/* the usual paranoia */
3142	AssertRelease(!pDevice->pDrvBase);
3143	AssertRelease(!pDevice->pDrvSCSIConnector);
3144	Assert(pDevice->iLUN == iLUN);
3145
3146	/*
3147	* Try attach the block device and get the interfaces,
3148	* required as well as optional.
3149	*/
3150	rc = PDMDevHlpDriverAttach(pDevIns, pDevice->iLUN, &pDevice->IBase, &pDevice->pDrvBase, NULL);
3151	if (RT_SUCCESS(rc))
3152	{
3153	/* Get SCSI connector interface. */
3154	pDevice->pDrvSCSIConnector = PDMIBASE_QUERY_INTERFACE(pDevice->pDrvBase, PDMISCSICONNECTOR);
3155	AssertMsgReturn(pDevice->pDrvSCSIConnector, ("Missing SCSI interface below\n"), VERR_PDM_MISSING_INTERFACE);
3156	pDevice->fPresent = true;
3157	}
3158	else
3159	AssertMsgFailed(("Failed to attach LUN#%d. rc=%Rrc\n", pDevice->iLUN, rc));
3160
3161	if (RT_FAILURE(rc))
3162	{
3163	pDevice->pDrvBase = NULL;
3164	pDevice->pDrvSCSIConnector = NULL;
3165	}
3166	return rc;
3167	}
3168
3169	/**
3170	* Callback employed by buslogicR3Reset.
3171	*
3172	* @returns true if we've quiesced, false if we're still working.
3173	* @param pDevIns The device instance.
3174	*/
3175	static DECLCALLBACK(bool) buslogicR3IsAsyncResetDone(PPDMDEVINS pDevIns)
3176	{
3177	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3178
3179	if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
3180	return false;
3181	ASMAtomicWriteBool(&pThis->fSignalIdle, false);
3182
3183	buslogicHwReset(pThis, true);
3184	return true;
3185	}
3186
3187	/**
3188	* @copydoc FNPDMDEVRESET
3189	*/
3190	static DECLCALLBACK(void) buslogicReset(PPDMDEVINS pDevIns)
3191	{
3192	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3193
3194	ASMAtomicWriteBool(&pThis->fSignalIdle, true);
3195	if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
3196	PDMDevHlpSetAsyncNotification(pDevIns, buslogicR3IsAsyncResetDone);
3197	else
3198	{
3199	ASMAtomicWriteBool(&pThis->fSignalIdle, false);
3200	buslogicHwReset(pThis, true);
3201	}
3202	}
3203
3204	static DECLCALLBACK(void) buslogicRelocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta)
3205	{
3206	uint32_t i;
3207	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3208
3209	pBusLogic->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
3210	pBusLogic->pNotifierQueueRC = PDMQueueRCPtr(pBusLogic->pNotifierQueueR3);
3211
3212	for (i = 0; i < BUSLOGIC_MAX_DEVICES; i++)
3213	{
3214	PBUSLOGICDEVICE pDevice = &pBusLogic->aDeviceStates[i];
3215
3216	pDevice->pBusLogicRC = PDMINS_2_DATA_RCPTR(pDevIns);
3217	}
3218
3219	}
3220
3221	/**
3222	* Poweroff notification.
3223	*
3224	* @param pDevIns Pointer to the device instance
3225	*/
3226	static DECLCALLBACK(void) buslogicPowerOff(PPDMDEVINS pDevIns)
3227	{
3228	Log(("buslogicPowerOff\n"));
3229	buslogicR3SuspendOrPowerOff(pDevIns, true /* fPoweroff */);
3230	}
3231
3232	/**
3233	* Destroy a driver instance.
3234	*
3235	* Most VM resources are freed by the VM. This callback is provided so that any non-VM
3236	* resources can be freed correctly.
3237	*
3238	* @param pDevIns The device instance data.
3239	*/
3240	static DECLCALLBACK(int) buslogicDestruct(PPDMDEVINS pDevIns)
3241	{
3242	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3243	PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns);
3244
3245	PDMR3CritSectDelete(&pThis->CritSectIntr);
3246
3247	/*
3248	* Free all tasks which are still hanging around
3249	* (Power off after the VM was suspended).
3250	*/
3251	if (pThis->fRedo)
3252	{
3253	/* Free tasks which would have been queued again on resume. */
3254	PBUSLOGICTASKSTATE pTaskState = pThis->pTasksRedoHead;
3255
3256	pThis->pTasksRedoHead = NULL;
3257
3258	while (pTaskState)
3259	{
3260	PBUSLOGICTASKSTATE pFree;
3261
3262	pFree = pTaskState;
3263	pTaskState = pTaskState->pRedoNext;
3264
3265	RTMemCacheFree(pThis->hTaskCache, pFree);
3266	}
3267	pThis->fRedo = false;
3268	}
3269
3270	int rc = RTMemCacheDestroy(pThis->hTaskCache);
3271	AssertMsgRC(rc, ("Destroying task cache failed rc=%Rrc\n", rc));
3272
3273	return rc;
3274	}
3275
3276	/**
3277	* @interface_method_impl{PDMDEVREG,pfnConstruct}
3278	*/
3279	static DECLCALLBACK(int) buslogicConstruct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
3280	{
3281	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3282	int rc = VINF_SUCCESS;
3283	bool fBootable = true;
3284	char achISACompat[16];
3285	PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
3286
3287	/*
3288	* Validate and read configuration.
3289	*/
3290	if (!CFGMR3AreValuesValid(pCfg,
3291	"GCEnabled\0"
3292	"R0Enabled\0"
3293	"Bootable\0"
3294	"ISACompat\0"))
3295	return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
3296	N_("BusLogic configuration error: unknown option specified"));
3297
3298	rc = CFGMR3QueryBoolDef(pCfg, "GCEnabled", &pThis->fGCEnabled, true);
3299	if (RT_FAILURE(rc))
3300	return PDMDEV_SET_ERROR(pDevIns, rc,
3301	N_("BusLogic configuration error: failed to read GCEnabled as boolean"));
3302	Log(("%s: fGCEnabled=%d\n", __FUNCTION__, pThis->fGCEnabled));
3303
3304	rc = CFGMR3QueryBoolDef(pCfg, "R0Enabled", &pThis->fR0Enabled, true);
3305	if (RT_FAILURE(rc))
3306	return PDMDEV_SET_ERROR(pDevIns, rc,
3307	N_("BusLogic configuration error: failed to read R0Enabled as boolean"));
3308	Log(("%s: fR0Enabled=%d\n", __FUNCTION__, pThis->fR0Enabled));
3309	rc = CFGMR3QueryBoolDef(pCfg, "Bootable", &fBootable, true);
3310	if (RT_FAILURE(rc))
3311	return PDMDEV_SET_ERROR(pDevIns, rc,
3312	N_("BusLogic configuration error: failed to read Bootable as boolean"));
3313	Log(("%s: fBootable=%RTbool\n", __FUNCTION__, fBootable));
3314	rc = CFGMR3QueryStringDef(pCfg, "ISACompat", achISACompat, sizeof(achISACompat), "Alternate");
3315	if (RT_FAILURE(rc))
3316	return PDMDEV_SET_ERROR(pDevIns, rc,
3317	N_("BusLogic configuration error: failed to read ISACompat as string"));
3318	Log(("%s: ISACompat=%s\n", __FUNCTION__, achISACompat));
3319
3320	/* Grok the ISACompat setting. */
3321	if (!strcmp(achISACompat, "Disabled"))
3322	pThis->uDefaultISABaseCode = ISA_BASE_DISABLED;
3323	else if (!strcmp(achISACompat, "Primary"))
3324	pThis->uDefaultISABaseCode = 0; /* I/O base at 330h. */
3325	else if (!strcmp(achISACompat, "Alternate"))
3326	pThis->uDefaultISABaseCode = 1; /* I/O base at 334h. */
3327	else
3328	return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
3329	N_("BusLogic configuration error: invalid ISACompat setting"));
3330
3331	pThis->pDevInsR3 = pDevIns;
3332	pThis->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
3333	pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
3334	pThis->IBase.pfnQueryInterface = buslogicStatusQueryInterface;
3335	pThis->ILeds.pfnQueryStatusLed = buslogicStatusQueryStatusLed;
3336
3337	PCIDevSetVendorId (&pThis->dev, 0x104b); /* BusLogic */
3338	PCIDevSetDeviceId (&pThis->dev, 0x1040); /* BT-958 */
3339	PCIDevSetCommand (&pThis->dev, 0x0003);
3340	PCIDevSetRevisionId (&pThis->dev, 0x01);
3341	PCIDevSetClassProg (&pThis->dev, 0x00); /* SCSI */
3342	PCIDevSetClassSub (&pThis->dev, 0x00); /* SCSI */
3343	PCIDevSetClassBase (&pThis->dev, 0x01); /* Mass storage */
3344	PCIDevSetBaseAddress (&pThis->dev, 0, true /IO/, false /Pref/, false /64-bit/, 0x00000000);
3345	PCIDevSetBaseAddress (&pThis->dev, 1, false /IO/, false /Pref/, false /64-bit/, 0x00000000);
3346	PCIDevSetSubSystemVendorId(&pThis->dev, 0x104b);
3347	PCIDevSetSubSystemId (&pThis->dev, 0x1040);
3348	PCIDevSetInterruptLine (&pThis->dev, 0x00);
3349	PCIDevSetInterruptPin (&pThis->dev, 0x01);
3350
3351	/*
3352	* Register the PCI device and its I/O regions.
3353	*/
3354	rc = PDMDevHlpPCIRegister (pDevIns, &pThis->dev);
3355	if (RT_FAILURE(rc))
3356	return rc;
3357
3358	rc = PDMDevHlpPCIIORegionRegister(pDevIns, 0, 32, PCI_ADDRESS_SPACE_IO, buslogicMMIOMap);
3359	if (RT_FAILURE(rc))
3360	return rc;
3361
3362	rc = PDMDevHlpPCIIORegionRegister(pDevIns, 1, 32, PCI_ADDRESS_SPACE_MEM, buslogicMMIOMap);
3363	if (RT_FAILURE(rc))
3364	return rc;
3365
3366	if (fBootable)
3367	{
3368	/* Register I/O port space for BIOS access. */
3369	rc = PDMDevHlpIOPortRegister(pDevIns, BUSLOGIC_BIOS_IO_PORT, 3, NULL,
3370	buslogicBIOSIOPortWrite, buslogicBIOSIOPortRead,
3371	buslogicBIOSIOPortWriteStr, buslogicBIOSIOPortReadStr,
3372	"BusLogic BIOS");
3373	if (RT_FAILURE(rc))
3374	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot register BIOS I/O handlers"));
3375	}
3376
3377	/* Set up the compatibility I/O range. */
3378	rc = buslogicRegisterISARange(pThis, pThis->uDefaultISABaseCode);
3379	if (RT_FAILURE(rc))
3380	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot register ISA I/O handlers"));
3381
3382	/* Initialize task cache. */
3383	rc = RTMemCacheCreate(&pThis->hTaskCache, sizeof(BUSLOGICTASKSTATE), 0, UINT32_MAX,
3384	NULL, NULL, NULL, 0);
3385	if (RT_FAILURE(rc))
3386	return PDMDEV_SET_ERROR(pDevIns, rc,
3387	N_("BusLogic: Failed to initialize task cache\n"));
3388
3389	/* Initialize task queue. */
3390	rc = PDMDevHlpQueueCreate(pDevIns, sizeof(PDMQUEUEITEMCORE), 5, 0,
3391	buslogicNotifyQueueConsumer, true, "BusLogicTask", &pThis->pNotifierQueueR3);
3392	if (RT_FAILURE(rc))
3393	return rc;
3394	pThis->pNotifierQueueR0 = PDMQueueR0Ptr(pThis->pNotifierQueueR3);
3395	pThis->pNotifierQueueRC = PDMQueueRCPtr(pThis->pNotifierQueueR3);
3396
3397	rc = PDMDevHlpCritSectInit(pDevIns, &pThis->CritSectIntr, RT_SRC_POS, "BusLogic-Intr#%u", pDevIns->iInstance);
3398	if (RT_FAILURE(rc))
3399	return PDMDEV_SET_ERROR(pDevIns, rc,
3400	N_("BusLogic: cannot create critical section"));
3401
3402	/* Initialize per device state. */
3403	for (unsigned i = 0; i < RT_ELEMENTS(pThis->aDeviceStates); i++)
3404	{
3405	char szName[24];
3406	PBUSLOGICDEVICE pDevice = &pThis->aDeviceStates[i];
3407
3408	RTStrPrintf(szName, sizeof(szName), "Device%d", i);
3409
3410	/* Initialize static parts of the device. */
3411	pDevice->iLUN = i;
3412	pDevice->pBusLogicR3 = pThis;
3413	pDevice->pBusLogicR0 = PDMINS_2_DATA_R0PTR(pDevIns);
3414	pDevice->pBusLogicRC = PDMINS_2_DATA_RCPTR(pDevIns);
3415	pDevice->Led.u32Magic = PDMLED_MAGIC;
3416	pDevice->IBase.pfnQueryInterface = buslogicDeviceQueryInterface;
3417	pDevice->ISCSIPort.pfnSCSIRequestCompleted = buslogicDeviceSCSIRequestCompleted;
3418	pDevice->ISCSIPort.pfnQueryDeviceLocation = buslogicQueryDeviceLocation;
3419	pDevice->ILed.pfnQueryStatusLed = buslogicDeviceQueryStatusLed;
3420
3421	/* Attach SCSI driver. */
3422	rc = PDMDevHlpDriverAttach(pDevIns, pDevice->iLUN, &pDevice->IBase, &pDevice->pDrvBase, szName);
3423	if (RT_SUCCESS(rc))
3424	{
3425	/* Get SCSI connector interface. */
3426	pDevice->pDrvSCSIConnector = PDMIBASE_QUERY_INTERFACE(pDevice->pDrvBase, PDMISCSICONNECTOR);
3427	AssertMsgReturn(pDevice->pDrvSCSIConnector, ("Missing SCSI interface below\n"), VERR_PDM_MISSING_INTERFACE);
3428
3429	pDevice->fPresent = true;
3430	}
3431	else if (rc == VERR_PDM_NO_ATTACHED_DRIVER)
3432	{
3433	pDevice->pDrvBase = NULL;
3434	pDevice->fPresent = false;
3435	rc = VINF_SUCCESS;
3436	Log(("BusLogic: no driver attached to device %s\n", szName));
3437	}
3438	else
3439	{
3440	AssertLogRelMsgFailed(("BusLogic: Failed to attach %s\n", szName));
3441	return rc;
3442	}
3443	}
3444
3445	/*
3446	* Attach status driver (optional).
3447	*/
3448	PPDMIBASE pBase;
3449	rc = PDMDevHlpDriverAttach(pDevIns, PDM_STATUS_LUN, &pThis->IBase, &pBase, "Status Port");
3450	if (RT_SUCCESS(rc))
3451	pThis->pLedsConnector = PDMIBASE_QUERY_INTERFACE(pBase, PDMILEDCONNECTORS);
3452	else if (rc != VERR_PDM_NO_ATTACHED_DRIVER)
3453	{
3454	AssertMsgFailed(("Failed to attach to status driver. rc=%Rrc\n", rc));
3455	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot attach to status driver"));
3456	}
3457
3458	rc = PDMDevHlpSSMRegisterEx(pDevIns, BUSLOGIC_SAVED_STATE_MINOR_VERSION, sizeof(*pThis), NULL,
3459	NULL, buslogicLiveExec, NULL,
3460	NULL, buslogicSaveExec, NULL,
3461	NULL, buslogicLoadExec, buslogicLoadDone);
3462	if (RT_FAILURE(rc))
3463	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot register save state handlers"));
3464
3465	rc = buslogicHwReset(pThis, true);
3466	AssertMsgRC(rc, ("hardware reset of BusLogic host adapter failed rc=%Rrc\n", rc));
3467
3468	return rc;
3469	}
3470
3471	/**
3472	* The device registration structure.
3473	*/
3474	const PDMDEVREG g_DeviceBusLogic =
3475	{
3476	/* u32Version */
3477	PDM_DEVREG_VERSION,
3478	/* szName */
3479	"buslogic",
3480	/* szRCMod */
3481	"VBoxDDGC.gc",
3482	/* szR0Mod */
3483	"VBoxDDR0.r0",
3484	/* pszDescription */
3485	"BusLogic BT-958 SCSI host adapter.\n",
3486	/* fFlags */
3487	PDM_DEVREG_FLAGS_DEFAULT_BITS \| PDM_DEVREG_FLAGS_RC \| PDM_DEVREG_FLAGS_R0 \|
3488	PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION \| PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION \|
3489	PDM_DEVREG_FLAGS_FIRST_RESET_NOTIFICATION,
3490	/* fClass */
3491	PDM_DEVREG_CLASS_STORAGE,
3492	/* cMaxInstances */
3493	~0U,
3494	/* cbInstance */
3495	sizeof(BUSLOGIC),
3496	/* pfnConstruct */
3497	buslogicConstruct,
3498	/* pfnDestruct */
3499	buslogicDestruct,
3500	/* pfnRelocate */
3501	buslogicRelocate,
3502	/* pfnIOCtl */
3503	NULL,
3504	/* pfnPowerOn */
3505	NULL,
3506	/* pfnReset */
3507	buslogicReset,
3508	/* pfnSuspend */
3509	buslogicSuspend,
3510	/* pfnResume */
3511	buslogicResume,
3512	/* pfnAttach */
3513	buslogicAttach,
3514	/* pfnDetach */
3515	buslogicDetach,
3516	/* pfnQueryInterface. */
3517	NULL,
3518	/* pfnInitComplete */
3519	NULL,
3520	/* pfnPowerOff */
3521	buslogicPowerOff,
3522	/* pfnSoftReset */
3523	NULL,
3524	/* u32VersionEnd */
3525	PDM_DEVREG_VERSION
3526	};
3527
3528	#endif /* IN_RING3 */
3529	#endif /* !VBOX_DEVICE_STRUCT_TESTCASE */

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source: vbox/trunk/src/VBox/Devices/Storage/DevBusLogic.cpp@ 43646

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