DevBusLogic.cpp@ 44591

Last change on this file since 44591 was 44533, checked in by vboxsync, 12 years ago
VBoxSVSI.cpp: doxygen and hungarian adjustments.
Property svn:eol-style set to `native` Property svn:keywords set to `Author Date Id Revision`
File size: 153.6 KB

Line
1	/* $Id: DevBusLogic.cpp 44533 2013-02-04 20:55:12Z vboxsync $ */
2	/** @file
3	* VBox storage devices - BusLogic SCSI host adapter BT-958.
4	*
5	* Based on the Multi-Master Ultra SCSI Systems Technical Reference Manual.
6	*/
7
8	/*
9	* Copyright (C) 2006-2013 Oracle Corporation
10	*
11	* This file is part of VirtualBox Open Source Edition (OSE), as
12	* available from http://www.virtualbox.org. This file is free software;
13	* you can redistribute it and/or modify it under the terms of the GNU
14	* General Public License (GPL) as published by the Free Software
15	* Foundation, in version 2 as it comes in the "COPYING" file of the
16	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
17	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
18	*/
19
20
21	/*******************************************************************************
22	* Header Files *
23	*******************************************************************************/
24	#define LOG_GROUP LOG_GROUP_DEV_BUSLOGIC
25	#include <VBox/vmm/pdmdev.h>
26	#include <VBox/vmm/pdmifs.h>
27	#include <VBox/vmm/pdmcritsect.h>
28	#include <VBox/scsi.h>
29	#include <iprt/asm.h>
30	#include <iprt/assert.h>
31	#include <iprt/string.h>
32	#include <iprt/log.h>
33	#ifdef IN_RING3
34	# include <iprt/alloc.h>
35	# include <iprt/memcache.h>
36	# include <iprt/param.h>
37	# include <iprt/uuid.h>
38	#endif
39
40	#include "VBoxSCSI.h"
41	#include "VBoxDD.h"
42
43
44	/*******************************************************************************
45	* Defined Constants And Macros *
46	*******************************************************************************/
47	/** Maximum number of attached devices the adapter can handle. */
48	#define BUSLOGIC_MAX_DEVICES 16
49
50	/** Maximum number of scatter gather elements this device can handle. */
51	#define BUSLOGIC_MAX_SCATTER_GATHER_LIST_SIZE 128
52
53	/** Size of the command buffer. */
54	#define BUSLOGIC_COMMAND_SIZE_MAX 5
55
56	/** Size of the reply buffer. */
57	#define BUSLOGIC_REPLY_SIZE_MAX 64
58
59	/** Custom fixed I/O ports for BIOS controller access.
60	* Note that these should not be in the ISA range (below 400h) to avoid
61	* conflicts with ISA device probing. Addresses in the 300h-340h range should be
62	* especially avoided.
63	*/
64	#define BUSLOGIC_BIOS_IO_PORT 0x430
65
66	/** State saved version. */
67	#define BUSLOGIC_SAVED_STATE_MINOR_VERSION 3
68
69	/** Saved state version before the suspend on error feature was implemented. */
70	#define BUSLOGIC_SAVED_STATE_MINOR_PRE_ERROR_HANDLING 1
71	/** Saved state version before 24-bit mailbox support was implemented. */
72	#define BUSLOGIC_SAVED_STATE_MINOR_PRE_24BIT_MBOX 2
73
74	/** The duration of software-initiated reset (in nano seconds).
75	* Not documented, set to 50 ms. */
76	#define BUSLOGIC_RESET_DURATION_NS UINT64_C(50000000)
77
78
79	/*******************************************************************************
80	* Structures and Typedefs *
81	*******************************************************************************/
82	/**
83	* State of a device attached to the buslogic host adapter.
84	*
85	* @implements PDMIBASE
86	* @implements PDMISCSIPORT
87	* @implements PDMILEDPORTS
88	*/
89	typedef struct BUSLOGICDEVICE
90	{
91	/** Pointer to the owning buslogic device instance. - R3 pointer */
92	R3PTRTYPE(struct BUSLOGIC *) pBusLogicR3;
93	/** Pointer to the owning buslogic device instance. - R0 pointer */
94	R0PTRTYPE(struct BUSLOGIC *) pBusLogicR0;
95	/** Pointer to the owning buslogic device instance. - RC pointer */
96	RCPTRTYPE(struct BUSLOGIC *) pBusLogicRC;
97
98	/** Flag whether device is present. */
99	bool fPresent;
100	/** LUN of the device. */
101	RTUINT iLUN;
102
103	#if HC_ARCH_BITS == 64
104	uint32_t Alignment0;
105	#endif
106
107	/** Our base interface. */
108	PDMIBASE IBase;
109	/** SCSI port interface. */
110	PDMISCSIPORT ISCSIPort;
111	/** Led interface. */
112	PDMILEDPORTS ILed;
113	/** Pointer to the attached driver's base interface. */
114	R3PTRTYPE(PPDMIBASE) pDrvBase;
115	/** Pointer to the underlying SCSI connector interface. */
116	R3PTRTYPE(PPDMISCSICONNECTOR) pDrvSCSIConnector;
117	/** The status LED state for this device. */
118	PDMLED Led;
119
120	#if HC_ARCH_BITS == 64
121	uint32_t Alignment1;
122	#endif
123
124	/** Number of outstanding tasks on the port. */
125	volatile uint32_t cOutstandingRequests;
126
127	} BUSLOGICDEVICE, *PBUSLOGICDEVICE;
128
129	/**
130	* Commands the BusLogic adapter supports.
131	*/
132	enum BUSLOGICCOMMAND
133	{
134	BUSLOGICCOMMAND_TEST_CMDC_INTERRUPT = 0x00,
135	BUSLOGICCOMMAND_INITIALIZE_MAILBOX = 0x01,
136	BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND = 0x02,
137	BUSLOGICCOMMAND_EXECUTE_BIOS_COMMAND = 0x03,
138	BUSLOGICCOMMAND_INQUIRE_BOARD_ID = 0x04,
139	BUSLOGICCOMMAND_ENABLE_OUTGOING_MAILBOX_AVAILABLE_INTERRUPT = 0x05,
140	BUSLOGICCOMMAND_SET_SCSI_SELECTION_TIMEOUT = 0x06,
141	BUSLOGICCOMMAND_SET_PREEMPT_TIME_ON_BUS = 0x07,
142	BUSLOGICCOMMAND_SET_TIME_OFF_BUS = 0x08,
143	BUSLOGICCOMMAND_SET_BUS_TRANSFER_RATE = 0x09,
144	BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_0_TO_7 = 0x0a,
145	BUSLOGICCOMMAND_INQUIRE_CONFIGURATION = 0x0b,
146	BUSLOGICCOMMAND_ENABLE_TARGET_MODE = 0x0c,
147	BUSLOGICCOMMAND_INQUIRE_SETUP_INFORMATION = 0x0d,
148	BUSLOGICCOMMAND_WRITE_ADAPTER_LOCAL_RAM = 0x1a,
149	BUSLOGICCOMMAND_READ_ADAPTER_LOCAL_RAM = 0x1b,
150	BUSLOGICCOMMAND_WRITE_BUSMASTER_CHIP_FIFO = 0x1c,
151	BUSLOGICCOMMAND_READ_BUSMASTER_CHIP_FIFO = 0x1d,
152	BUSLOGICCOMMAND_ECHO_COMMAND_DATA = 0x1f,
153	BUSLOGICCOMMAND_HOST_ADAPTER_DIAGNOSTIC = 0x20,
154	BUSLOGICCOMMAND_SET_ADAPTER_OPTIONS = 0x21,
155	BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_8_TO_15 = 0x23,
156	BUSLOGICCOMMAND_INQUIRE_TARGET_DEVICES = 0x24,
157	BUSLOGICCOMMAND_DISABLE_HOST_ADAPTER_INTERRUPT = 0x25,
158	BUSLOGICCOMMAND_EXT_BIOS_INFO = 0x28,
159	BUSLOGICCOMMAND_UNLOCK_MAILBOX = 0x29,
160	BUSLOGICCOMMAND_INITIALIZE_EXTENDED_MAILBOX = 0x81,
161	BUSLOGICCOMMAND_EXECUTE_SCSI_COMMAND = 0x83,
162	BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_3RD_LETTER = 0x84,
163	BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_LETTER = 0x85,
164	BUSLOGICCOMMAND_INQUIRE_PCI_HOST_ADAPTER_INFORMATION = 0x86,
165	BUSLOGICCOMMAND_INQUIRE_HOST_ADAPTER_MODEL_NUMBER = 0x8b,
166	BUSLOGICCOMMAND_INQUIRE_SYNCHRONOUS_PERIOD = 0x8c,
167	BUSLOGICCOMMAND_INQUIRE_EXTENDED_SETUP_INFORMATION = 0x8d,
168	BUSLOGICCOMMAND_ENABLE_STRICT_ROUND_ROBIN_MODE = 0x8f,
169	BUSLOGICCOMMAND_STORE_HOST_ADAPTER_LOCAL_RAM = 0x90,
170	BUSLOGICCOMMAND_FETCH_HOST_ADAPTER_LOCAL_RAM = 0x91,
171	BUSLOGICCOMMAND_STORE_LOCAL_DATA_IN_EEPROM = 0x92,
172	BUSLOGICCOMMAND_UPLOAD_AUTO_SCSI_CODE = 0x94,
173	BUSLOGICCOMMAND_MODIFY_IO_ADDRESS = 0x95,
174	BUSLOGICCOMMAND_SET_CCB_FORMAT = 0x96,
175	BUSLOGICCOMMAND_WRITE_INQUIRY_BUFFER = 0x9a,
176	BUSLOGICCOMMAND_READ_INQUIRY_BUFFER = 0x9b,
177	BUSLOGICCOMMAND_FLASH_ROM_UPLOAD_DOWNLOAD = 0xa7,
178	BUSLOGICCOMMAND_READ_SCAM_DATA = 0xa8,
179	BUSLOGICCOMMAND_WRITE_SCAM_DATA = 0xa9
180	} BUSLOGICCOMMAND;
181
182	#pragma pack(1)
183	/**
184	* Auto SCSI structure which is located
185	* in host adapter RAM and contains several
186	* configuration parameters.
187	*/
188	typedef struct AutoSCSIRam
189	{
190	uint8_t aInternalSignature[2];
191	uint8_t cbInformation;
192	uint8_t aHostAdaptertype[6];
193	uint8_t uReserved1;
194	bool fFloppyEnabled : 1;
195	bool fFloppySecondary : 1;
196	bool fLevelSensitiveInterrupt : 1;
197	unsigned char uReserved2 : 2;
198	unsigned char uSystemRAMAreForBIOS : 3;
199	unsigned char uDMAChannel : 7;
200	bool fDMAAutoConfiguration : 1;
201	unsigned char uIrqChannel : 7;
202	bool fIrqAutoConfiguration : 1;
203	uint8_t uDMATransferRate;
204	uint8_t uSCSIId;
205	bool fLowByteTerminated : 1;
206	bool fParityCheckingEnabled : 1;
207	bool fHighByteTerminated : 1;
208	bool fNoisyCablingEnvironment : 1;
209	bool fFastSynchronousNeogtiation : 1;
210	bool fBusResetEnabled : 1;
211	bool fReserved3 : 1;
212	bool fActiveNegotiationEnabled : 1;
213	uint8_t uBusOnDelay;
214	uint8_t uBusOffDelay;
215	bool fHostAdapterBIOSEnabled : 1;
216	bool fBIOSRedirectionOfInt19 : 1;
217	bool fExtendedTranslation : 1;
218	bool fMapRemovableAsFixed : 1;
219	bool fReserved4 : 1;
220	bool fBIOSSupportsMoreThan2Drives : 1;
221	bool fBIOSInterruptMode : 1;
222	bool fFlopticalSupport : 1;
223	uint16_t u16DeviceEnabledMask;
224	uint16_t u16WidePermittedMask;
225	uint16_t u16FastPermittedMask;
226	uint16_t u16SynchronousPermittedMask;
227	uint16_t u16DisconnectPermittedMask;
228	uint16_t u16SendStartUnitCommandMask;
229	uint16_t u16IgnoreInBIOSScanMask;
230	unsigned char uPCIInterruptPin : 2;
231	unsigned char uHostAdapterIoPortAddress : 2;
232	bool fStrictRoundRobinMode : 1;
233	bool fVesaBusSpeedGreaterThan33MHz : 1;
234	bool fVesaBurstWrite : 1;
235	bool fVesaBurstRead : 1;
236	uint16_t u16UltraPermittedMask;
237	uint32_t uReserved5;
238	uint8_t uReserved6;
239	uint8_t uAutoSCSIMaximumLUN;
240	bool fReserved7 : 1;
241	bool fSCAMDominant : 1;
242	bool fSCAMenabled : 1;
243	bool fSCAMLevel2 : 1;
244	unsigned char uReserved8 : 4;
245	bool fInt13Extension : 1;
246	bool fReserved9 : 1;
247	bool fCDROMBoot : 1;
248	unsigned char uReserved10 : 5;
249	unsigned char uBootTargetId : 4;
250	unsigned char uBootChannel : 4;
251	bool fForceBusDeviceScanningOrder : 1;
252	unsigned char uReserved11 : 7;
253	uint16_t u16NonTaggedToAlternateLunPermittedMask;
254	uint16_t u16RenegotiateSyncAfterCheckConditionMask;
255	uint8_t aReserved12[10];
256	uint8_t aManufacturingDiagnostic[2];
257	uint16_t u16Checksum;
258	} AutoSCSIRam, *PAutoSCSIRam;
259	AssertCompileSize(AutoSCSIRam, 64);
260	#pragma pack()
261
262	/**
263	* The local Ram.
264	*/
265	typedef union HostAdapterLocalRam
266	{
267	/** Byte view. */
268	uint8_t u8View[256];
269	/** Structured view. */
270	struct
271	{
272	/** Offset 0 - 63 is for BIOS. */
273	uint8_t u8Bios[64];
274	/** Auto SCSI structure. */
275	AutoSCSIRam autoSCSIData;
276	} structured;
277	} HostAdapterLocalRam, *PHostAdapterLocalRam;
278	AssertCompileSize(HostAdapterLocalRam, 256);
279
280
281	/** Ugly 24-bit big-endian addressing. */
282	typedef struct
283	{
284	uint8_t hi;
285	uint8_t mid;
286	uint8_t lo;
287	} Addr24, Len24;
288	AssertCompileSize(Addr24, 3);
289
290	#define ADDR_TO_U32(x) (((x).hi << 16) \| ((x).mid << 8) \| (x).lo)
291	#define LEN_TO_U32 ADDR_TO_U32
292	#define U32_TO_ADDR(a, x) do {(a).hi = (x) >> 16; (a).mid = (x) >> 8; (a).lo = (x);} while(0)
293	#define U32_TO_LEN U32_TO_ADDR
294
295	/** @name Compatible ISA base I/O port addresses. Disabled if zero.
296	* @{ */
297	#define NUM_ISA_BASES 8
298	#define MAX_ISA_BASE (NUM_ISA_BASES - 1)
299	#define ISA_BASE_DISABLED 6
300
301	static uint16_t const g_aISABases[NUM_ISA_BASES] =
302	{
303	0x330, 0x334, 0x230, 0x234, 0x130, 0x134, 0, 0
304	};
305	/** @} */
306
307	/** Pointer to a task state structure. */
308	typedef struct BUSLOGICTASKSTATE *PBUSLOGICTASKSTATE;
309
310	/**
311	* Main BusLogic device state.
312	*
313	* @extends PCIDEVICE
314	* @implements PDMILEDPORTS
315	*/
316	typedef struct BUSLOGIC
317	{
318	/** The PCI device structure. */
319	PCIDEVICE dev;
320	/** Pointer to the device instance - HC ptr */
321	PPDMDEVINSR3 pDevInsR3;
322	/** Pointer to the device instance - R0 ptr */
323	PPDMDEVINSR0 pDevInsR0;
324	/** Pointer to the device instance - RC ptr. */
325	PPDMDEVINSRC pDevInsRC;
326
327	/** Whether R0 is enabled. */
328	bool fR0Enabled;
329	/** Whether RC is enabled. */
330	bool fGCEnabled;
331
332	/** Base address of the I/O ports. */
333	RTIOPORT IOPortBase;
334	/** Base address of the memory mapping. */
335	RTGCPHYS MMIOBase;
336	/** Status register - Readonly. */
337	volatile uint8_t regStatus;
338	/** Interrupt register - Readonly. */
339	volatile uint8_t regInterrupt;
340	/** Geometry register - Readonly. */
341	volatile uint8_t regGeometry;
342	/** Pending (delayed) interrupt. */
343	uint8_t uPendingIntr;
344
345	/** Local RAM for the fetch hostadapter local RAM request.
346	* I don't know how big the buffer really is but the maximum
347	* seems to be 256 bytes because the offset and count field in the command request
348	* are only one byte big.
349	*/
350	HostAdapterLocalRam LocalRam;
351
352	/** Command code the guest issued. */
353	uint8_t uOperationCode;
354	/** Buffer for the command parameters the adapter is currently receiving from the guest.
355	* Size of the largest command which is possible.
356	*/
357	uint8_t aCommandBuffer[BUSLOGIC_COMMAND_SIZE_MAX]; /* Size of the biggest request. */
358	/** Current position in the command buffer. */
359	uint8_t iParameter;
360	/** Parameters left until the command is complete. */
361	uint8_t cbCommandParametersLeft;
362
363	/** Whether we are using the RAM or reply buffer. */
364	bool fUseLocalRam;
365	/** Buffer to store reply data from the controller to the guest. */
366	uint8_t aReplyBuffer[BUSLOGIC_REPLY_SIZE_MAX]; /* Size of the biggest reply. */
367	/** Position in the buffer we are reading next. */
368	uint8_t iReply;
369	/** Bytes left until the reply buffer is empty. */
370	uint8_t cbReplyParametersLeft;
371
372	/** Flag whether IRQs are enabled. */
373	bool fIRQEnabled;
374	/** Flag whether the ISA I/O port range is disabled
375	* to prevent the BIOS to access the device. */
376	bool fISAEnabled; /*< @todo unused, to be removed /
377	/** Flag whether 24-bit mailboxes are in use (default is 32-bit). */
378	bool fMbxIs24Bit; /*< @todo save? /
379	/** ISA I/O port base (encoded in FW-compatible format). */
380	uint8_t uISABaseCode;
381
382	/** ISA I/O port base (disabled if zero). */
383	RTIOPORT IOISABase;
384	/** Default ISA I/O port base in FW-compatible format. */
385	uint8_t uDefaultISABaseCode;
386
387	/** Number of mailboxes the guest set up. */
388	uint32_t cMailbox;
389
390	#if HC_ARCH_BITS == 64
391	uint32_t Alignment0;
392	#endif
393
394	/** Time when HBA reset was last initiated. / /< @todo does this need to be saved? /
395	uint64_t u64ResetTime;
396	/** Physical base address of the outgoing mailboxes. */
397	RTGCPHYS GCPhysAddrMailboxOutgoingBase;
398	/** Current outgoing mailbox position. */
399	uint32_t uMailboxOutgoingPositionCurrent;
400	/** Number of mailboxes ready. */
401	volatile uint32_t cMailboxesReady;
402	/** Whether a notification to R3 was send. */
403	volatile bool fNotificationSend;
404
405	#if HC_ARCH_BITS == 64
406	uint32_t Alignment1;
407	#endif
408
409	/** Physical base address of the incoming mailboxes. */
410	RTGCPHYS GCPhysAddrMailboxIncomingBase;
411	/** Current incoming mailbox position. */
412	uint32_t uMailboxIncomingPositionCurrent;
413
414	/** Whether strict round robin is enabled. */
415	bool fStrictRoundRobinMode;
416	/** Whether the extended LUN CCB format is enabled for 32 possible logical units. */
417	bool fExtendedLunCCBFormat;
418
419	/** Queue to send tasks to R3. - HC ptr */
420	R3PTRTYPE(PPDMQUEUE) pNotifierQueueR3;
421	/** Queue to send tasks to R3. - HC ptr */
422	R0PTRTYPE(PPDMQUEUE) pNotifierQueueR0;
423	/** Queue to send tasks to R3. - RC ptr */
424	RCPTRTYPE(PPDMQUEUE) pNotifierQueueRC;
425
426	uint32_t Alignment2;
427
428	/** Critical section protecting access to the interrupt status register. */
429	PDMCRITSECT CritSectIntr;
430
431	/** Cache for task states. */
432	R3PTRTYPE(RTMEMCACHE) hTaskCache;
433
434	/** Device state for BIOS access. */
435	VBOXSCSI VBoxSCSI;
436
437	/** BusLogic device states. */
438	BUSLOGICDEVICE aDeviceStates[BUSLOGIC_MAX_DEVICES];
439
440	/** The base interface.
441	* @todo use PDMDEVINS::IBase */
442	PDMIBASE IBase;
443	/** Status Port - Leds interface. */
444	PDMILEDPORTS ILeds;
445	/** Partner of ILeds. */
446	R3PTRTYPE(PPDMILEDCONNECTORS) pLedsConnector;
447
448	#if HC_ARCH_BITS == 64
449	uint32_t Alignment3;
450	#endif
451
452	/** Indicates that PDMDevHlpAsyncNotificationCompleted should be called when
453	* a port is entering the idle state. */
454	bool volatile fSignalIdle;
455	/** Flag whether we have tasks which need to be processed again. */
456	bool volatile fRedo;
457	/** List of tasks which can be redone. */
458	R3PTRTYPE(volatile PBUSLOGICTASKSTATE) pTasksRedoHead;
459
460	#ifdef LOG_ENABLED
461	# if HC_ARCH_BITS == 64
462	uint32_t Alignment4;
463	# endif
464
465	volatile uint32_t cInMailboxesReady;
466	#endif
467
468	} BUSLOGIC, *PBUSLOGIC;
469
470	/** Register offsets in the I/O port space. */
471	#define BUSLOGIC_REGISTER_CONTROL 0 /*< Writeonly /
472	/** Fields for the control register. */
473	# define BUSLOGIC_REGISTER_CONTROL_SCSI_BUSRESET RT_BIT(4)
474	# define BUSLOGIC_REGISTER_CONTROL_INTERRUPT_RESET RT_BIT(5)
475	# define BUSLOGIC_REGISTER_CONTROL_SOFT_RESET RT_BIT(6)
476	# define BUSLOGIC_REGISTER_CONTROL_HARD_RESET RT_BIT(7)
477
478	#define BUSLOGIC_REGISTER_STATUS 0 /*< Readonly /
479	/** Fields for the status register. */
480	# define BUSLOGIC_REGISTER_STATUS_COMMAND_INVALID RT_BIT(0)
481	# define BUSLOGIC_REGISTER_STATUS_DATA_IN_REGISTER_READY RT_BIT(2)
482	# define BUSLOGIC_REGISTER_STATUS_COMMAND_PARAMETER_REGISTER_BUSY RT_BIT(3)
483	# define BUSLOGIC_REGISTER_STATUS_HOST_ADAPTER_READY RT_BIT(4)
484	# define BUSLOGIC_REGISTER_STATUS_INITIALIZATION_REQUIRED RT_BIT(5)
485	# define BUSLOGIC_REGISTER_STATUS_DIAGNOSTIC_FAILURE RT_BIT(6)
486	# define BUSLOGIC_REGISTER_STATUS_DIAGNOSTIC_ACTIVE RT_BIT(7)
487
488	#define BUSLOGIC_REGISTER_COMMAND 1 /*< Writeonly /
489	#define BUSLOGIC_REGISTER_DATAIN 1 /*< Readonly /
490	#define BUSLOGIC_REGISTER_INTERRUPT 2 /*< Readonly /
491	/** Fields for the interrupt register. */
492	# define BUSLOGIC_REGISTER_INTERRUPT_INCOMING_MAILBOX_LOADED RT_BIT(0)
493	# define BUSLOGIC_REGISTER_INTERRUPT_OUTGOING_MAILBOX_AVAILABLE RT_BIT(1)
494	# define BUSLOGIC_REGISTER_INTERRUPT_COMMAND_COMPLETE RT_BIT(2)
495	# define BUSLOGIC_REGISTER_INTERRUPT_EXTERNAL_BUS_RESET RT_BIT(3)
496	# define BUSLOGIC_REGISTER_INTERRUPT_INTERRUPT_VALID RT_BIT(7)
497
498	#define BUSLOGIC_REGISTER_GEOMETRY 3 /* Readonly */
499	# define BUSLOGIC_REGISTER_GEOMETRY_EXTENTED_TRANSLATION_ENABLED RT_BIT(7)
500
501	/** Structure for the INQUIRE_PCI_HOST_ADAPTER_INFORMATION reply. */
502	typedef struct ReplyInquirePCIHostAdapterInformation
503	{
504	uint8_t IsaIOPort;
505	uint8_t IRQ;
506	unsigned char LowByteTerminated : 1;
507	unsigned char HighByteTerminated : 1;
508	unsigned char uReserved : 2; /* Reserved. */
509	unsigned char JP1 : 1; /* Whatever that means. */
510	unsigned char JP2 : 1; /* Whatever that means. */
511	unsigned char JP3 : 1; /* Whatever that means. */
512	/** Whether the provided info is valid. */
513	unsigned char InformationIsValid: 1;
514	uint8_t uReserved2; /* Reserved. */
515	} ReplyInquirePCIHostAdapterInformation, *PReplyInquirePCIHostAdapterInformation;
516	AssertCompileSize(ReplyInquirePCIHostAdapterInformation, 4);
517
518	/** Structure for the INQUIRE_CONFIGURATION reply. */
519	typedef struct ReplyInquireConfiguration
520	{
521	unsigned char uReserved1 : 5;
522	bool fDmaChannel5 : 1;
523	bool fDmaChannel6 : 1;
524	bool fDmaChannel7 : 1;
525	bool fIrqChannel9 : 1;
526	bool fIrqChannel10 : 1;
527	bool fIrqChannel11 : 1;
528	bool fIrqChannel12 : 1;
529	unsigned char uReserved2 : 1;
530	bool fIrqChannel14 : 1;
531	bool fIrqChannel15 : 1;
532	unsigned char uReserved3 : 1;
533	unsigned char uHostAdapterId : 4;
534	unsigned char uReserved4 : 4;
535	} ReplyInquireConfiguration, *PReplyInquireConfiguration;
536	AssertCompileSize(ReplyInquireConfiguration, 3);
537
538	/** Structure for the INQUIRE_SETUP_INFORMATION reply. */
539	typedef struct ReplyInquireSetupInformationSynchronousValue
540	{
541	unsigned char uOffset : 4;
542	unsigned char uTransferPeriod : 3;
543	bool fSynchronous : 1;
544	}ReplyInquireSetupInformationSynchronousValue, *PReplyInquireSetupInformationSynchronousValue;
545	AssertCompileSize(ReplyInquireSetupInformationSynchronousValue, 1);
546
547	typedef struct ReplyInquireSetupInformation
548	{
549	bool fSynchronousInitiationEnabled : 1;
550	bool fParityCheckingEnabled : 1;
551	unsigned char uReserved1 : 6;
552	uint8_t uBusTransferRate;
553	uint8_t uPreemptTimeOnBus;
554	uint8_t uTimeOffBus;
555	uint8_t cMailbox;
556	Addr24 MailboxAddress;
557	ReplyInquireSetupInformationSynchronousValue SynchronousValuesId0To7[8];
558	uint8_t uDisconnectPermittedId0To7;
559	uint8_t uSignature;
560	uint8_t uCharacterD;
561	uint8_t uHostBusType;
562	uint8_t uWideTransferPermittedId0To7;
563	uint8_t uWideTransfersActiveId0To7;
564	ReplyInquireSetupInformationSynchronousValue SynchronousValuesId8To15[8];
565	uint8_t uDisconnectPermittedId8To15;
566	uint8_t uReserved2;
567	uint8_t uWideTransferPermittedId8To15;
568	uint8_t uWideTransfersActiveId8To15;
569	} ReplyInquireSetupInformation, *PReplyInquireSetupInformation;
570	AssertCompileSize(ReplyInquireSetupInformation, 34);
571
572	/** Structure for the INQUIRE_EXTENDED_SETUP_INFORMATION. */
573	#pragma pack(1)
574	typedef struct ReplyInquireExtendedSetupInformation
575	{
576	uint8_t uBusType;
577	uint8_t uBiosAddress;
578	uint16_t u16ScatterGatherLimit;
579	uint8_t cMailbox;
580	uint32_t uMailboxAddressBase;
581	unsigned char uReserved1 : 2;
582	bool fFastEISA : 1;
583	unsigned char uReserved2 : 3;
584	bool fLevelSensitiveInterrupt : 1;
585	unsigned char uReserved3 : 1;
586	unsigned char aFirmwareRevision[3];
587	bool fHostWideSCSI : 1;
588	bool fHostDifferentialSCSI : 1;
589	bool fHostSupportsSCAM : 1;
590	bool fHostUltraSCSI : 1;
591	bool fHostSmartTermination : 1;
592	unsigned char uReserved4 : 3;
593	} ReplyInquireExtendedSetupInformation, *PReplyInquireExtendedSetupInformation;
594	AssertCompileSize(ReplyInquireExtendedSetupInformation, 14);
595	#pragma pack()
596
597	/** Structure for the INITIALIZE EXTENDED MAILBOX request. */
598	#pragma pack(1)
599	typedef struct RequestInitializeExtendedMailbox
600	{
601	/** Number of mailboxes in guest memory. */
602	uint8_t cMailbox;
603	/** Physical address of the first mailbox. */
604	uint32_t uMailboxBaseAddress;
605	} RequestInitializeExtendedMailbox, *PRequestInitializeExtendedMailbox;
606	AssertCompileSize(RequestInitializeExtendedMailbox, 5);
607	#pragma pack()
608
609	/** Structure for the INITIALIZE MAILBOX request. */
610	typedef struct
611	{
612	/** Number of mailboxes to set up. */
613	uint8_t cMailbox;
614	/** Physical address of the first mailbox. */
615	Addr24 aMailboxBaseAddr;
616	} RequestInitMbx, *PRequestInitMbx;
617	AssertCompileSize(RequestInitMbx, 4);
618
619	/**
620	* Structure of a mailbox in guest memory.
621	* The incoming and outgoing mailbox have the same size
622	* but the incoming one has some more fields defined which
623	* are marked as reserved in the outgoing one.
624	* The last field is also different from the type.
625	* For outgoing mailboxes it is the action and
626	* for incoming ones the completion status code for the task.
627	* We use one structure for both types.
628	*/
629	typedef struct Mailbox32
630	{
631	/** Physical address of the CCB structure in the guest memory. */
632	uint32_t u32PhysAddrCCB;
633	/** Type specific data. */
634	union
635	{
636	/** For outgoing mailboxes. */
637	struct
638	{
639	/** Reserved */
640	uint8_t uReserved[3];
641	/** Action code. */
642	uint8_t uActionCode;
643	} out;
644	/** For incoming mailboxes. */
645	struct
646	{
647	/** The host adapter status after finishing the request. */
648	uint8_t uHostAdapterStatus;
649	/** The status of the device which executed the request after executing it. */
650	uint8_t uTargetDeviceStatus;
651	/** Reserved. */
652	uint8_t uReserved;
653	/** The completion status code of the request. */
654	uint8_t uCompletionCode;
655	} in;
656	} u;
657	} Mailbox32, *PMailbox32;
658	AssertCompileSize(Mailbox32, 8);
659
660	/** Old style 24-bit mailbox entry. */
661	typedef struct Mailbox24
662	{
663	/** Mailbox command (incoming) or state (outgoing). */
664	uint8_t uCmdState;
665	/** Physical address of the CCB structure in the guest memory. */
666	Addr24 aPhysAddrCCB;
667	} Mailbox24, *PMailbox24;
668	AssertCompileSize(Mailbox24, 4);
669
670	/**
671	* Action codes for outgoing mailboxes.
672	*/
673	enum BUSLOGIC_MAILBOX_OUTGOING_ACTION
674	{
675	BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE = 0x00,
676	BUSLOGIC_MAILBOX_OUTGOING_ACTION_START_COMMAND = 0x01,
677	BUSLOGIC_MAILBOX_OUTGOING_ACTION_ABORT_COMMAND = 0x02
678	};
679
680	/**
681	* Completion codes for incoming mailboxes.
682	*/
683	enum BUSLOGIC_MAILBOX_INCOMING_COMPLETION
684	{
685	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_FREE = 0x00,
686	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITHOUT_ERROR = 0x01,
687	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_ABORTED = 0x02,
688	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_ABORTED_NOT_FOUND = 0x03,
689	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR = 0x04,
690	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_INVALID_CCB = 0x05
691	};
692
693	/**
694	* Host adapter status for incoming mailboxes.
695	*/
696	enum BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS
697	{
698	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_CMD_COMPLETED = 0x00,
699	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_LINKED_CMD_COMPLETED = 0x0a,
700	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_LINKED_CMD_COMPLETED_WITH_FLAG = 0x0b,
701	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_DATA_UNDERUN = 0x0c,
702	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_SCSI_SELECTION_TIMEOUT = 0x11,
703	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_DATA_OVERRUN = 0x12,
704	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_UNEXPECTED_BUS_FREE = 0x13,
705	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_BUS_PHASE_REQUESTED = 0x14,
706	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_OUTGOING_MAILBOX_ACTION_CODE = 0x15,
707	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_COMMAND_OPERATION_CODE = 0x16,
708	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_LINKED_CCB_HAS_INVALID_LUN = 0x17,
709	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_COMMAND_PARAMETER = 0x1a,
710	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_AUTO_REQUEST_SENSE_FAILED = 0x1b,
711	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_TAGGED_QUEUING_MESSAGE_REJECTED = 0x1c,
712	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_UNSUPPORTED_MESSAGE_RECEIVED = 0x1d,
713	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_HARDWARE_FAILED = 0x20,
714	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_TARGET_FAILED_RESPONSE_TO_ATN = 0x21,
715	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_ASSERTED_RST = 0x22,
716	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_OTHER_DEVICE_ASSERTED_RST = 0x23,
717	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_TARGET_DEVICE_RECONNECTED_IMPROPERLY = 0x24,
718	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_ASSERTED_BUS_DEVICE_RESET = 0x25,
719	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_ABORT_QUEUE_GENERATED = 0x26,
720	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_SOFTWARE_ERROR = 0x27,
721	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_HARDWARE_TIMEOUT_ERROR = 0x30,
722	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_SCSI_PARITY_ERROR_DETECTED = 0x34
723	};
724
725	/**
726	* Device status codes for incoming mailboxes.
727	*/
728	enum BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS
729	{
730	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD = 0x00,
731	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_CHECK_CONDITION = 0x02,
732	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_DEVICE_BUSY = 0x08
733	};
734
735	/**
736	* Opcode types for CCB.
737	*/
738	enum BUSLOGIC_CCB_OPCODE
739	{
740	BUSLOGIC_CCB_OPCODE_INITIATOR_CCB = 0x00,
741	BUSLOGIC_CCB_OPCODE_TARGET_CCB = 0x01,
742	BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_SCATTER_GATHER = 0x02,
743	BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_DATA_LENGTH = 0x03,
744	BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_SCATTER_GATHER = 0x04,
745	BUSLOGIC_CCB_OPCODE_BUS_DEVICE_RESET = 0x81
746	};
747
748	/**
749	* Data transfer direction.
750	*/
751	enum BUSLOGIC_CCB_DIRECTION
752	{
753	BUSLOGIC_CCB_DIRECTION_UNKNOWN = 0x00,
754	BUSLOGIC_CCB_DIRECTION_IN = 0x01,
755	BUSLOGIC_CCB_DIRECTION_OUT = 0x02,
756	BUSLOGIC_CCB_DIRECTION_NO_DATA = 0x03
757	};
758
759	/**
760	* The command control block for a SCSI request.
761	*/
762	typedef struct CCB32
763	{
764	/** Opcode. */
765	uint8_t uOpcode;
766	/** Reserved */
767	unsigned char uReserved1 : 3;
768	/** Data direction for the request. */
769	unsigned char uDataDirection : 2;
770	/** Whether the request is tag queued. */
771	bool fTagQueued : 1;
772	/** Queue tag mode. */
773	unsigned char uQueueTag : 2;
774	/** Length of the SCSI CDB. */
775	uint8_t cbCDB;
776	/** Sense data length. */
777	uint8_t cbSenseData;
778	/** Data length. */
779	uint32_t cbData;
780	/** Data pointer.
781	* This points to the data region or a scatter gather list based on the opcode.
782	*/
783	uint32_t u32PhysAddrData;
784	/** Reserved. */
785	uint8_t uReserved2[2];
786	/** Host adapter status. */
787	uint8_t uHostAdapterStatus;
788	/** Device adapter status. */
789	uint8_t uDeviceStatus;
790	/** The device the request is sent to. */
791	uint8_t uTargetId;
792	/*The LUN in the device. /
793	unsigned char uLogicalUnit : 5;
794	/** Legacy tag. */
795	bool fLegacyTagEnable : 1;
796	/** Legacy queue tag. */
797	unsigned char uLegacyQueueTag : 2;
798	/** The SCSI CDB. (A CDB can be 12 bytes long.) */
799	uint8_t abCDB[12];
800	/** Reserved. */
801	uint8_t uReserved3[6];
802	/** Sense data pointer. */
803	uint32_t u32PhysAddrSenseData;
804	} CCB32, *PCCB32;
805	AssertCompileSize(CCB32, 40);
806
807
808	/**
809	* The 24-bit command control block.
810	*/
811	typedef struct CCB24
812	{
813	/** Opcode. */
814	uint8_t uOpcode;
815	/** The LUN in the device. */
816	unsigned char uLogicalUnit : 3;
817	/** Data direction for the request. */
818	unsigned char uDataDirection : 2;
819	/** The target device ID. */
820	unsigned char uTargetId : 3;
821	/** Length of the SCSI CDB. */
822	uint8_t cbCDB;
823	/** Sense data length. */
824	uint8_t cbSenseData;
825	/** Data length. */
826	Len24 acbData;
827	/** Data pointer.
828	* This points to the data region or a scatter gather list based on the opc
829	*/
830	Addr24 aPhysAddrData;
831	/** Pointer to next CCB for linked commands. */
832	Addr24 aPhysAddrLink;
833	/** Command linking identifier. */
834	uint8_t uLinkId;
835	/** Host adapter status. */
836	uint8_t uHostAdapterStatus;
837	/** Device adapter status. */
838	uint8_t uDeviceStatus;
839	/** Two unused bytes. */
840	uint8_t aReserved[2];
841	/** The SCSI CDB. (A CDB can be 12 bytes long.) */
842	uint8_t abCDB[12];
843	} CCB24, *PCCB24;
844	AssertCompileSize(CCB24, 30);
845
846	/**
847	* The common 24-bit/32-bit command control block. The 32-bit CCB is laid out
848	* such that many fields are in the same location as in the older 24-bit CCB.
849	*/
850	typedef struct CCBC
851	{
852	/** Opcode. */
853	uint8_t uOpcode;
854	/** The LUN in the device. */
855	unsigned char uPad1 : 3;
856	/** Data direction for the request. */
857	unsigned char uDataDirection : 2;
858	/** The target device ID. */
859	unsigned char uPad2 : 3;
860	/** Length of the SCSI CDB. */
861	uint8_t cbCDB;
862	/** Sense data length. */
863	uint8_t cbSenseData;
864	uint8_t aPad1[10];
865	/** Host adapter status. */
866	uint8_t uHostAdapterStatus;
867	/** Device adapter status. */
868	uint8_t uDeviceStatus;
869	uint8_t aPad2[2];
870	/** The SCSI CDB (up to 12 bytes). */
871	uint8_t abCDB[12];
872	} CCBC, *PCCBC;
873	AssertCompileSize(CCB24, 30);
874
875	/* Make sure that the 24-bit/32-bit/common CCB offsets match. */
876	AssertCompileMemberOffset(CCBC, cbCDB, 2);
877	AssertCompileMemberOffset(CCB24, cbCDB, 2);
878	AssertCompileMemberOffset(CCB32, cbCDB, 2);
879	AssertCompileMemberOffset(CCBC, uHostAdapterStatus, 14);
880	AssertCompileMemberOffset(CCB24, uHostAdapterStatus, 14);
881	AssertCompileMemberOffset(CCB32, uHostAdapterStatus, 14);
882	AssertCompileMemberOffset(CCBC, abCDB, 18);
883	AssertCompileMemberOffset(CCB24, abCDB, 18);
884	AssertCompileMemberOffset(CCB32, abCDB, 18);
885
886	/** A union of all CCB types (24-bit/32-bit/common). */
887	typedef union CCBU
888	{
889	CCB32 n; /*< New 32-bit CCB. /
890	CCB24 o; /*< Old 24-bit CCB. /
891	CCBC c; /*< Common CCB subset. /
892	} CCBU, *PCCBU;
893
894	/** 32-bit scatter-gather list entry. */
895	typedef struct SGE32
896	{
897	uint32_t cbSegment;
898	uint32_t u32PhysAddrSegmentBase;
899	} SGE32, *PSGE32;
900	AssertCompileSize(SGE32, 8);
901
902	/** 24-bit scatter-gather list entry. */
903	typedef struct SGE24
904	{
905	Len24 acbSegment;
906	Addr24 aPhysAddrSegmentBase;
907	} SGE24, *PSGE24;
908	AssertCompileSize(SGE24, 6);
909
910	/**
911	* The structure for the "Execute SCSI Command" command.
912	*/
913	typedef struct ESCMD
914	{
915	/** Data length. */
916	uint32_t cbData;
917	/** Data pointer. */
918	uint32_t u32PhysAddrData;
919	/** The device the request is sent to. */
920	uint8_t uTargetId;
921	/** The LUN in the device. */
922	uint8_t uLogicalUnit;
923	/** Reserved */
924	unsigned char uReserved1 : 3;
925	/** Data direction for the request. */
926	unsigned char uDataDirection : 2;
927	/** Reserved */
928	unsigned char uReserved2 : 3;
929	/** Length of the SCSI CDB. */
930	uint8_t cbCDB;
931	/** The SCSI CDB. (A CDB can be 12 bytes long.) */
932	uint8_t abCDB[12];
933	} ESCMD, *PESCMD;
934	AssertCompileSize(ESCMD, 24);
935
936	/**
937	* Task state for a CCB request.
938	*/
939	typedef struct BUSLOGICTASKSTATE
940	{
941	/** Next in the redo list. */
942	PBUSLOGICTASKSTATE pRedoNext;
943	/** Device this task is assigned to. */
944	R3PTRTYPE(PBUSLOGICDEVICE) pTargetDeviceR3;
945	/** The command control block from the guest. */
946	CCBU CommandControlBlockGuest;
947	/** Mailbox read from guest memory. */
948	Mailbox32 MailboxGuest;
949	/** The SCSI request we pass to the underlying SCSI engine. */
950	PDMSCSIREQUEST PDMScsiRequest;
951	/** Data buffer segment */
952	RTSGSEG DataSeg;
953	/** Pointer to the R3 sense buffer. */
954	uint8_t *pbSenseBuffer;
955	/** Flag whether this is a request from the BIOS. */
956	bool fBIOS;
957	/** 24-bit request flag (default is 32-bit). */
958	bool fIs24Bit;
959	/** S/G entry size (depends on the above flag). */
960	uint8_t cbSGEntry;
961	} BUSLOGICTASKSTATE;
962
963	#ifndef VBOX_DEVICE_STRUCT_TESTCASE
964
965	#define PDMIBASE_2_PBUSLOGICDEVICE(pInterface) ( (PBUSLOGICDEVICE)((uintptr_t)(pInterface) - RT_OFFSETOF(BUSLOGICDEVICE, IBase)) )
966	#define PDMISCSIPORT_2_PBUSLOGICDEVICE(pInterface) ( (PBUSLOGICDEVICE)((uintptr_t)(pInterface) - RT_OFFSETOF(BUSLOGICDEVICE, ISCSIPort)) )
967	#define PDMILEDPORTS_2_PBUSLOGICDEVICE(pInterface) ( (PBUSLOGICDEVICE)((uintptr_t)(pInterface) - RT_OFFSETOF(BUSLOGICDEVICE, ILed)) )
968	#define PDMIBASE_2_PBUSLOGIC(pInterface) ( (PBUSLOGIC)((uintptr_t)(pInterface) - RT_OFFSETOF(BUSLOGIC, IBase)) )
969	#define PDMILEDPORTS_2_PBUSLOGIC(pInterface) ( (PBUSLOGIC)((uintptr_t)(pInterface) - RT_OFFSETOF(BUSLOGIC, ILeds)) )
970
971	/*******************************************************************************
972	* Internal Functions *
973	*******************************************************************************/
974	static int buslogicR3RegisterISARange(PBUSLOGIC pBusLogic, uint8_t uBaseCode);
975
976
977	/**
978	* Assert IRQ line of the BusLogic adapter.
979	*
980	* @returns nothing.
981	* @param pBusLogic Pointer to the BusLogic device instance.
982	* @param fSuppressIrq Flag to suppress IRQ generation regardless of fIRQEnabled
983	* @param uFlag Type of interrupt being generated.
984	*/
985	static void buslogicSetInterrupt(PBUSLOGIC pBusLogic, bool fSuppressIrq, uint8_t uIrqType)
986	{
987	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
988
989	/* The CMDC interrupt has priority over IMBL and MBOR. */
990	if (uIrqType & (BUSLOGIC_REGISTER_INTERRUPT_INCOMING_MAILBOX_LOADED \| BUSLOGIC_REGISTER_INTERRUPT_OUTGOING_MAILBOX_AVAILABLE))
991	{
992	if (!(pBusLogic->regInterrupt & BUSLOGIC_REGISTER_INTERRUPT_COMMAND_COMPLETE))
993	pBusLogic->regInterrupt \|= uIrqType; /* Report now. */
994	else
995	pBusLogic->uPendingIntr \|= uIrqType; /* Report later. */
996	}
997	else if (uIrqType & BUSLOGIC_REGISTER_INTERRUPT_COMMAND_COMPLETE)
998	{
999	Assert(!pBusLogic->regInterrupt);
1000	pBusLogic->regInterrupt \|= uIrqType;
1001	}
1002	else
1003	AssertMsgFailed(("Invalid interrupt state!\n"));
1004
1005	pBusLogic->regInterrupt \|= BUSLOGIC_REGISTER_INTERRUPT_INTERRUPT_VALID;
1006	if (pBusLogic->fIRQEnabled && !fSuppressIrq)
1007	PDMDevHlpPCISetIrq(pBusLogic->CTX_SUFF(pDevIns), 0, 1);
1008	}
1009
1010	/**
1011	* Deasserts the interrupt line of the BusLogic adapter.
1012	*
1013	* @returns nothing
1014	* @param pBuslogic Pointer to the BusLogic device instance.
1015	*/
1016	static void buslogicClearInterrupt(PBUSLOGIC pBusLogic)
1017	{
1018	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
1019	pBusLogic->regInterrupt = 0;
1020	PDMDevHlpPCISetIrq(pBusLogic->CTX_SUFF(pDevIns), 0, 0);
1021	/* If there's another pending interrupt, report it now. */
1022	if (pBusLogic->uPendingIntr)
1023	{
1024	buslogicSetInterrupt(pBusLogic, false, pBusLogic->uPendingIntr);
1025	pBusLogic->uPendingIntr = 0;
1026	}
1027	}
1028
1029	#if defined(IN_RING3)
1030
1031	/**
1032	* Advances the mailbox pointer to the next slot.
1033	*/
1034	DECLINLINE(void) buslogicR3OutgoingMailboxAdvance(PBUSLOGIC pBusLogic)
1035	{
1036	pBusLogic->uMailboxOutgoingPositionCurrent = (pBusLogic->uMailboxOutgoingPositionCurrent + 1) % pBusLogic->cMailbox;
1037	}
1038
1039	/**
1040	* Initialize local RAM of host adapter with default values.
1041	*
1042	* @returns nothing.
1043	* @param pBusLogic.
1044	*/
1045	static void buslogicR3InitializeLocalRam(PBUSLOGIC pBusLogic)
1046	{
1047	/*
1048	* These values are mostly from what I think is right
1049	* looking at the dmesg output from a Linux guest inside
1050	* a VMware server VM.
1051	*
1052	* So they don't have to be right :)
1053	*/
1054	memset(pBusLogic->LocalRam.u8View, 0, sizeof(HostAdapterLocalRam));
1055	pBusLogic->LocalRam.structured.autoSCSIData.fLevelSensitiveInterrupt = true;
1056	pBusLogic->LocalRam.structured.autoSCSIData.fParityCheckingEnabled = true;
1057	pBusLogic->LocalRam.structured.autoSCSIData.fExtendedTranslation = true; /* Same as in geometry register. */
1058	pBusLogic->LocalRam.structured.autoSCSIData.u16DeviceEnabledMask = ~0; /* All enabled. Maybe mask out non present devices? */
1059	pBusLogic->LocalRam.structured.autoSCSIData.u16WidePermittedMask = ~0;
1060	pBusLogic->LocalRam.structured.autoSCSIData.u16FastPermittedMask = ~0;
1061	pBusLogic->LocalRam.structured.autoSCSIData.u16SynchronousPermittedMask = ~0;
1062	pBusLogic->LocalRam.structured.autoSCSIData.u16DisconnectPermittedMask = ~0;
1063	pBusLogic->LocalRam.structured.autoSCSIData.fStrictRoundRobinMode = pBusLogic->fStrictRoundRobinMode;
1064	pBusLogic->LocalRam.structured.autoSCSIData.u16UltraPermittedMask = ~0;
1065	/** @todo calculate checksum? */
1066	}
1067
1068	/**
1069	* Do a hardware reset of the buslogic adapter.
1070	*
1071	* @returns VBox status code.
1072	* @param pBusLogic Pointer to the BusLogic device instance.
1073	* @param fResetIO Flag determining whether ISA I/O should be reset.
1074	*/
1075	static int buslogicR3HwReset(PBUSLOGIC pBusLogic, bool fResetIO)
1076	{
1077	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
1078
1079	/* Reset registers to default value. */
1080	pBusLogic->regStatus = BUSLOGIC_REGISTER_STATUS_HOST_ADAPTER_READY \| BUSLOGIC_REGISTER_STATUS_INITIALIZATION_REQUIRED;
1081	pBusLogic->regInterrupt = 0;
1082	pBusLogic->uPendingIntr = 0;
1083	pBusLogic->regGeometry = BUSLOGIC_REGISTER_GEOMETRY_EXTENTED_TRANSLATION_ENABLED;
1084	pBusLogic->uOperationCode = 0xff; /* No command executing. */
1085	pBusLogic->iParameter = 0;
1086	pBusLogic->cbCommandParametersLeft = 0;
1087	pBusLogic->fIRQEnabled = true;
1088	pBusLogic->uMailboxOutgoingPositionCurrent = 0;
1089	pBusLogic->uMailboxIncomingPositionCurrent = 0;
1090
1091	/* Guest-initiated HBA reset does not affect ISA port I/O. */
1092	if (fResetIO)
1093	{
1094	buslogicR3RegisterISARange(pBusLogic, pBusLogic->uDefaultISABaseCode);
1095	}
1096	buslogicR3InitializeLocalRam(pBusLogic);
1097	vboxscsiInitialize(&pBusLogic->VBoxSCSI);
1098
1099	return VINF_SUCCESS;
1100	}
1101
1102	#endif /* IN_RING3 */
1103
1104	/**
1105	* Resets the command state machine for the next command and notifies the guest.
1106	*
1107	* @returns nothing.
1108	* @param pBusLogic Pointer to the BusLogic device instance
1109	* @param fSuppressIrq Flag to suppress IRQ generation regardless of current state
1110	*/
1111	static void buslogicCommandComplete(PBUSLOGIC pBusLogic, bool fSuppressIrq)
1112	{
1113	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
1114
1115	pBusLogic->fUseLocalRam = false;
1116	pBusLogic->regStatus \|= BUSLOGIC_REGISTER_STATUS_HOST_ADAPTER_READY;
1117	pBusLogic->iReply = 0;
1118
1119	/* Modify I/O address does not generate an interrupt. */
1120	if (pBusLogic->uOperationCode != BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND)
1121	{
1122	/* Notify that the command is complete. */
1123	pBusLogic->regStatus &= ~BUSLOGIC_REGISTER_STATUS_DATA_IN_REGISTER_READY;
1124	buslogicSetInterrupt(pBusLogic, fSuppressIrq, BUSLOGIC_REGISTER_INTERRUPT_COMMAND_COMPLETE);
1125	}
1126
1127	pBusLogic->uOperationCode = 0xff;
1128	pBusLogic->iParameter = 0;
1129	}
1130
1131	#if defined(IN_RING3)
1132
1133	/**
1134	* Initiates a hard reset which was issued from the guest.
1135	*
1136	* @returns nothing
1137	* @param pBusLogic Pointer to the BusLogic device instance.
1138	* @param fHardReset Flag initiating a hard (vs. soft) reset.
1139	*/
1140	static void buslogicR3InitiateReset(PBUSLOGIC pBusLogic, bool fHardReset)
1141	{
1142	LogFlowFunc(("pBusLogic=%#p fHardReset=%d\n", pBusLogic, fHardReset));
1143
1144	buslogicR3HwReset(pBusLogic, false);
1145
1146	if (fHardReset)
1147	{
1148	/* Set the diagnostic active bit in the status register and clear the ready state. */
1149	pBusLogic->regStatus \|= BUSLOGIC_REGISTER_STATUS_DIAGNOSTIC_ACTIVE;
1150	pBusLogic->regStatus &= ~BUSLOGIC_REGISTER_STATUS_HOST_ADAPTER_READY;
1151
1152	/* Remember when the guest initiated a reset (after we're done resetting). */
1153	pBusLogic->u64ResetTime = PDMDevHlpTMTimeVirtGetNano(pBusLogic->CTX_SUFF(pDevIns));
1154	}
1155	}
1156
1157	/**
1158	* Send a mailbox with set status codes to the guest.
1159	*
1160	* @returns nothing.
1161	* @param pBusLogic Pointer to the BusLogic device instance.
1162	* @param pTaskState Pointer to the task state with the mailbox to send.
1163	* @param uHostAdapterStatus The host adapter status code to set.
1164	* @param uDeviceStatus The target device status to set.
1165	* @param uMailboxCompletionCode Completion status code to set in the mailbox.
1166	*/
1167	static void buslogicR3SendIncomingMailbox(PBUSLOGIC pBusLogic, PBUSLOGICTASKSTATE pTaskState,
1168	uint8_t uHostAdapterStatus, uint8_t uDeviceStatus,
1169	uint8_t uMailboxCompletionCode)
1170	{
1171	pTaskState->MailboxGuest.u.in.uHostAdapterStatus = uHostAdapterStatus;
1172	pTaskState->MailboxGuest.u.in.uTargetDeviceStatus = uDeviceStatus;
1173	pTaskState->MailboxGuest.u.in.uCompletionCode = uMailboxCompletionCode;
1174
1175	int rc = PDMCritSectEnter(&pBusLogic->CritSectIntr, VINF_SUCCESS);
1176	AssertRC(rc);
1177	RTGCPHYS GCPhysAddrCCB = pTaskState->MailboxGuest.u32PhysAddrCCB;
1178	RTGCPHYS GCPhysAddrMailboxIncoming = pBusLogic->GCPhysAddrMailboxIncomingBase
1179	+ ( pBusLogic->uMailboxIncomingPositionCurrent
1180	* (pTaskState->fIs24Bit ? sizeof(Mailbox24) : sizeof(Mailbox32)) );
1181	LogFlowFunc(("Completing CCB %RGp hstat=%u, dstat=%u, outgoing mailbox at %RGp\n", GCPhysAddrCCB,
1182	uHostAdapterStatus, uDeviceStatus, GCPhysAddrMailboxIncoming));
1183
1184	/* Update CCB. */
1185	pTaskState->CommandControlBlockGuest.c.uHostAdapterStatus = uHostAdapterStatus;
1186	pTaskState->CommandControlBlockGuest.c.uDeviceStatus = uDeviceStatus;
1187	/** @todo this is wrong - writing too much! */
1188	PDMDevHlpPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrCCB, &pTaskState->CommandControlBlockGuest, sizeof(CCBC));
1189
1190	# ifdef RT_STRICT
1191	uint8_t uCode;
1192	unsigned uCodeOffs = pTaskState->fIs24Bit ? RT_OFFSETOF(Mailbox24, uCmdState) : RT_OFFSETOF(Mailbox32, u.out.uActionCode);
1193	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxIncoming + uCodeOffs, &uCode, sizeof(uCode));
1194	Assert(uCode == BUSLOGIC_MAILBOX_INCOMING_COMPLETION_FREE);
1195	# endif
1196
1197	/* Update mailbox. */
1198	if (pTaskState->fIs24Bit)
1199	{
1200	Mailbox24 Mbx24;
1201
1202	Mbx24.uCmdState = pTaskState->MailboxGuest.u.in.uCompletionCode;
1203	U32_TO_ADDR(Mbx24.aPhysAddrCCB, pTaskState->MailboxGuest.u32PhysAddrCCB);
1204	Log(("24-bit mailbox: completion code=%u, CCB at %RGp\n", Mbx24.uCmdState, (RTGCPHYS)ADDR_TO_U32(Mbx24.aPhysAddrCCB)));
1205	PDMDevHlpPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxIncoming, &Mbx24, sizeof(Mailbox24));
1206	}
1207	else
1208	{
1209	Log(("32-bit mailbox: completion code=%u, CCB at %RGp\n", pTaskState->MailboxGuest.u.in.uCompletionCode, (RTGCPHYS)pTaskState->MailboxGuest.u32PhysAddrCCB));
1210	PDMDevHlpPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxIncoming, &pTaskState->MailboxGuest, sizeof(Mailbox32));
1211	}
1212
1213	/* Advance to next mailbox position. */
1214	pBusLogic->uMailboxIncomingPositionCurrent++;
1215	if (pBusLogic->uMailboxIncomingPositionCurrent >= pBusLogic->cMailbox)
1216	pBusLogic->uMailboxIncomingPositionCurrent = 0;
1217
1218	# ifdef LOG_ENABLED
1219	ASMAtomicIncU32(&pBusLogic->cInMailboxesReady);
1220	# endif
1221
1222	buslogicSetInterrupt(pBusLogic, false, BUSLOGIC_REGISTER_INTERRUPT_INCOMING_MAILBOX_LOADED);
1223
1224	PDMCritSectLeave(&pBusLogic->CritSectIntr);
1225	}
1226
1227	# ifdef LOG_ENABLED
1228
1229	/**
1230	* Dumps the content of a mailbox for debugging purposes.
1231	*
1232	* @return nothing
1233	* @param pMailbox The mailbox to dump.
1234	* @param fOutgoing true if dumping the outgoing state.
1235	* false if dumping the incoming state.
1236	*/
1237	static void buslogicR3DumpMailboxInfo(PMailbox32 pMailbox, bool fOutgoing)
1238	{
1239	Log(("%s: Dump for %s mailbox:\n", __FUNCTION__, fOutgoing ? "outgoing" : "incoming"));
1240	Log(("%s: u32PhysAddrCCB=%#x\n", __FUNCTION__, pMailbox->u32PhysAddrCCB));
1241	if (fOutgoing)
1242	{
1243	Log(("%s: uActionCode=%u\n", __FUNCTION__, pMailbox->u.out.uActionCode));
1244	}
1245	else
1246	{
1247	Log(("%s: uHostAdapterStatus=%u\n", __FUNCTION__, pMailbox->u.in.uHostAdapterStatus));
1248	Log(("%s: uTargetDeviceStatus=%u\n", __FUNCTION__, pMailbox->u.in.uTargetDeviceStatus));
1249	Log(("%s: uCompletionCode=%u\n", __FUNCTION__, pMailbox->u.in.uCompletionCode));
1250	}
1251	}
1252
1253	/**
1254	* Dumps the content of a command control block for debugging purposes.
1255	*
1256	* @returns nothing.
1257	* @param pCCB Pointer to the command control block to dump.
1258	* @param fIs24BitCCB Flag to determine CCB format.
1259	*/
1260	static void buslogicR3DumpCCBInfo(PCCBU pCCB, bool fIs24BitCCB)
1261	{
1262	Log(("%s: Dump for %s Command Control Block:\n", __FUNCTION__, fIs24BitCCB ? "24-bit" : "32-bit"));
1263	Log(("%s: uOpCode=%#x\n", __FUNCTION__, pCCB->c.uOpcode));
1264	Log(("%s: uDataDirection=%u\n", __FUNCTION__, pCCB->c.uDataDirection));
1265	Log(("%s: cbCDB=%u\n", __FUNCTION__, pCCB->c.cbCDB));
1266	Log(("%s: cbSenseData=%u\n", __FUNCTION__, pCCB->c.cbSenseData));
1267	Log(("%s: uHostAdapterStatus=%u\n", __FUNCTION__, pCCB->c.uHostAdapterStatus));
1268	Log(("%s: uDeviceStatus=%u\n", __FUNCTION__, pCCB->c.uDeviceStatus));
1269	if (fIs24BitCCB)
1270	{
1271	Log(("%s: cbData=%u\n", __FUNCTION__, LEN_TO_U32(pCCB->o.acbData)));
1272	Log(("%s: PhysAddrData=%#x\n", __FUNCTION__, ADDR_TO_U32(pCCB->o.aPhysAddrData)));
1273	Log(("%s: uTargetId=%u\n", __FUNCTION__, pCCB->o.uTargetId));
1274	Log(("%s: uLogicalUnit=%u\n", __FUNCTION__, pCCB->o.uLogicalUnit));
1275	}
1276	else
1277	{
1278	Log(("%s: cbData=%u\n", __FUNCTION__, pCCB->n.cbData));
1279	Log(("%s: PhysAddrData=%#x\n", __FUNCTION__, pCCB->n.u32PhysAddrData));
1280	Log(("%s: uTargetId=%u\n", __FUNCTION__, pCCB->n.uTargetId));
1281	Log(("%s: uLogicalUnit=%u\n", __FUNCTION__, pCCB->n.uLogicalUnit));
1282	Log(("%s: fTagQueued=%d\n", __FUNCTION__, pCCB->n.fTagQueued));
1283	Log(("%s: uQueueTag=%u\n", __FUNCTION__, pCCB->n.uQueueTag));
1284	Log(("%s: fLegacyTagEnable=%u\n", __FUNCTION__, pCCB->n.fLegacyTagEnable));
1285	Log(("%s: uLegacyQueueTag=%u\n", __FUNCTION__, pCCB->n.uLegacyQueueTag));
1286	Log(("%s: PhysAddrSenseData=%#x\n", __FUNCTION__, pCCB->n.u32PhysAddrSenseData));
1287	}
1288	Log(("%s: uCDB[0]=%#x\n", __FUNCTION__, pCCB->c.abCDB[0]));
1289	for (int i = 1; i < pCCB->c.cbCDB; i++)
1290	Log(("%s: uCDB[%d]=%u\n", __FUNCTION__, i, pCCB->c.abCDB[i]));
1291	}
1292
1293	# endif /* LOG_ENABLED */
1294
1295	/**
1296	* Allocate data buffer.
1297	*
1298	* @param pTaskState Pointer to the task state.
1299	* @param GCSGList Guest physical address of S/G list.
1300	* @param cEntries Number of list entries to read.
1301	* @param pSGEList Pointer to 32-bit S/G list storage.
1302	*/
1303	static void buslogicR3ReadSGEntries(PBUSLOGICTASKSTATE pTaskState, RTGCPHYS GCSGList, uint32_t cEntries, SGE32 *pSGEList)
1304	{
1305	PPDMDEVINS pDevIns = pTaskState->CTX_SUFF(pTargetDevice)->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns);
1306	SGE24 aSGE24[32];
1307	Assert(cEntries <= RT_ELEMENTS(aSGE24));
1308
1309	/* Read the S/G entries. Convert 24-bit entries to 32-bit format. */
1310	if (pTaskState->fIs24Bit)
1311	{
1312	Log2(("Converting %u 24-bit S/G entries to 32-bit\n", cEntries));
1313	PDMDevHlpPhysRead(pDevIns, GCSGList, &aSGE24, cEntries * sizeof(SGE24));
1314	for (uint32_t i = 0; i < cEntries; ++i)
1315	{
1316	pSGEList[i].cbSegment = LEN_TO_U32(aSGE24[i].acbSegment);
1317	pSGEList[i].u32PhysAddrSegmentBase = ADDR_TO_U32(aSGE24[i].aPhysAddrSegmentBase);
1318	}
1319	}
1320	else
1321	PDMDevHlpPhysRead(pDevIns, GCSGList, pSGEList, cEntries * sizeof(SGE32));
1322	}
1323
1324	/**
1325	* Allocate data buffer.
1326	*
1327	* @returns VBox status code.
1328	* @param pTaskState Pointer to the task state.
1329	*/
1330	static int buslogicR3DataBufferAlloc(PBUSLOGICTASKSTATE pTaskState)
1331	{
1332	PPDMDEVINS pDevIns = pTaskState->CTX_SUFF(pTargetDevice)->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns);
1333	uint32_t cbDataCCB;
1334	uint32_t u32PhysAddrCCB;
1335
1336	/* Extract the data length and physical address from the CCB. */
1337	if (pTaskState->fIs24Bit)
1338	{
1339	u32PhysAddrCCB = ADDR_TO_U32(pTaskState->CommandControlBlockGuest.o.aPhysAddrData);
1340	cbDataCCB = LEN_TO_U32(pTaskState->CommandControlBlockGuest.o.acbData);
1341	}
1342	else
1343	{
1344	u32PhysAddrCCB = pTaskState->CommandControlBlockGuest.n.u32PhysAddrData;
1345	cbDataCCB = pTaskState->CommandControlBlockGuest.n.cbData;
1346	}
1347
1348	if ( (pTaskState->CommandControlBlockGuest.c.uDataDirection != BUSLOGIC_CCB_DIRECTION_NO_DATA)
1349	&& cbDataCCB)
1350	{
1351	/** @todo Check following assumption and what residual means. */
1352	/*
1353	* The BusLogic adapter can handle two different data buffer formats.
1354	* The first one is that the data pointer entry in the CCB points to
1355	* the buffer directly. In second mode the data pointer points to a
1356	* scatter gather list which describes the buffer.
1357	*/
1358	if ( (pTaskState->CommandControlBlockGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_SCATTER_GATHER)
1359	\|\| (pTaskState->CommandControlBlockGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_SCATTER_GATHER))
1360	{
1361	uint32_t cScatterGatherGCRead;
1362	uint32_t iScatterGatherEntry;
1363	SGE32 aScatterGatherReadGC[32]; /* A buffer for scatter gather list entries read from guest memory. */
1364	uint32_t cScatterGatherGCLeft = cbDataCCB / pTaskState->cbSGEntry;
1365	RTGCPHYS GCPhysAddrScatterGatherCurrent = u32PhysAddrCCB;
1366	size_t cbDataToTransfer = 0;
1367
1368	/* Count number of bytes to transfer. */
1369	do
1370	{
1371	cScatterGatherGCRead = (cScatterGatherGCLeft < RT_ELEMENTS(aScatterGatherReadGC))
1372	? cScatterGatherGCLeft
1373	: RT_ELEMENTS(aScatterGatherReadGC);
1374	cScatterGatherGCLeft -= cScatterGatherGCRead;
1375
1376	buslogicR3ReadSGEntries(pTaskState, GCPhysAddrScatterGatherCurrent, cScatterGatherGCRead, aScatterGatherReadGC);
1377
1378	for (iScatterGatherEntry = 0; iScatterGatherEntry < cScatterGatherGCRead; iScatterGatherEntry++)
1379	{
1380	RTGCPHYS GCPhysAddrDataBase;
1381
1382	Log(("%s: iScatterGatherEntry=%u\n", __FUNCTION__, iScatterGatherEntry));
1383
1384	GCPhysAddrDataBase = (RTGCPHYS)aScatterGatherReadGC[iScatterGatherEntry].u32PhysAddrSegmentBase;
1385	cbDataToTransfer += aScatterGatherReadGC[iScatterGatherEntry].cbSegment;
1386
1387	Log(("%s: GCPhysAddrDataBase=%RGp cbDataToTransfer=%u\n",
1388	__FUNCTION__, GCPhysAddrDataBase,
1389	aScatterGatherReadGC[iScatterGatherEntry].cbSegment));
1390	}
1391
1392	/* Set address to the next entries to read. */
1393	GCPhysAddrScatterGatherCurrent += cScatterGatherGCRead * pTaskState->cbSGEntry;
1394	} while (cScatterGatherGCLeft > 0);
1395
1396	Log(("%s: cbDataToTransfer=%d\n", __FUNCTION__, cbDataToTransfer));
1397
1398	/* Allocate buffer */
1399	pTaskState->DataSeg.cbSeg = cbDataToTransfer;
1400	pTaskState->DataSeg.pvSeg = RTMemAlloc(pTaskState->DataSeg.cbSeg);
1401	if (!pTaskState->DataSeg.pvSeg)
1402	return VERR_NO_MEMORY;
1403
1404	/* Copy the data if needed */
1405	if (pTaskState->CommandControlBlockGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_OUT)
1406	{
1407	cScatterGatherGCLeft = cbDataCCB / pTaskState->cbSGEntry;
1408	GCPhysAddrScatterGatherCurrent = u32PhysAddrCCB;
1409	uint8_t pbData = (uint8_t )pTaskState->DataSeg.pvSeg;
1410
1411	do
1412	{
1413	cScatterGatherGCRead = (cScatterGatherGCLeft < RT_ELEMENTS(aScatterGatherReadGC))
1414	? cScatterGatherGCLeft
1415	: RT_ELEMENTS(aScatterGatherReadGC);
1416	cScatterGatherGCLeft -= cScatterGatherGCRead;
1417
1418	buslogicR3ReadSGEntries(pTaskState, GCPhysAddrScatterGatherCurrent, cScatterGatherGCRead, aScatterGatherReadGC);
1419
1420	for (iScatterGatherEntry = 0; iScatterGatherEntry < cScatterGatherGCRead; iScatterGatherEntry++)
1421	{
1422	RTGCPHYS GCPhysAddrDataBase;
1423
1424	Log(("%s: iScatterGatherEntry=%u\n", __FUNCTION__, iScatterGatherEntry));
1425
1426	GCPhysAddrDataBase = (RTGCPHYS)aScatterGatherReadGC[iScatterGatherEntry].u32PhysAddrSegmentBase;
1427	cbDataToTransfer = aScatterGatherReadGC[iScatterGatherEntry].cbSegment;
1428
1429	Log(("%s: GCPhysAddrDataBase=%RGp cbDataToTransfer=%u\n", __FUNCTION__, GCPhysAddrDataBase, cbDataToTransfer));
1430
1431	PDMDevHlpPhysRead(pDevIns, GCPhysAddrDataBase, pbData, cbDataToTransfer);
1432	pbData += cbDataToTransfer;
1433	}
1434
1435	/* Set address to the next entries to read. */
1436	GCPhysAddrScatterGatherCurrent += cScatterGatherGCRead * pTaskState->cbSGEntry;
1437	} while (cScatterGatherGCLeft > 0);
1438	}
1439
1440	}
1441	else if ( pTaskState->CommandControlBlockGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB
1442	\|\| pTaskState->CommandControlBlockGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_DATA_LENGTH)
1443	{
1444	/* The buffer is not scattered. */
1445	RTGCPHYS GCPhysAddrDataBase = u32PhysAddrCCB;
1446
1447	AssertMsg(GCPhysAddrDataBase != 0, ("Physical address is 0\n"));
1448
1449	pTaskState->DataSeg.cbSeg = cbDataCCB;
1450	pTaskState->DataSeg.pvSeg = RTMemAlloc(pTaskState->DataSeg.cbSeg);
1451	if (!pTaskState->DataSeg.pvSeg)
1452	return VERR_NO_MEMORY;
1453
1454	Log(("Non scattered buffer:\n"));
1455	Log(("u32PhysAddrData=%#x\n", u32PhysAddrCCB));
1456	Log(("cbData=%u\n", cbDataCCB));
1457	Log(("GCPhysAddrDataBase=0x%RGp\n", GCPhysAddrDataBase));
1458
1459	/* Copy the data into the buffer. */
1460	PDMDevHlpPhysRead(pDevIns, GCPhysAddrDataBase, pTaskState->DataSeg.pvSeg, pTaskState->DataSeg.cbSeg);
1461	}
1462	}
1463
1464	return VINF_SUCCESS;
1465	}
1466
1467	/**
1468	* Free allocated resources used for the scatter gather list.
1469	*
1470	* @returns nothing.
1471	* @param pTaskState Pointer to the task state.
1472	*/
1473	static void buslogicR3DataBufferFree(PBUSLOGICTASKSTATE pTaskState)
1474	{
1475	PPDMDEVINS pDevIns = pTaskState->CTX_SUFF(pTargetDevice)->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns);
1476	uint32_t cbDataCCB;
1477	uint32_t u32PhysAddrCCB;
1478
1479	/* Extract the data length and physical address from the CCB. */
1480	if (pTaskState->fIs24Bit)
1481	{
1482	u32PhysAddrCCB = ADDR_TO_U32(pTaskState->CommandControlBlockGuest.o.aPhysAddrData);
1483	cbDataCCB = LEN_TO_U32(pTaskState->CommandControlBlockGuest.o.acbData);
1484	}
1485	else
1486	{
1487	u32PhysAddrCCB = pTaskState->CommandControlBlockGuest.n.u32PhysAddrData;
1488	cbDataCCB = pTaskState->CommandControlBlockGuest.n.cbData;
1489	}
1490
1491	#if 1
1492	/* Hack for NT 10/91: A CCB describes a 2K buffer, but TEST UNIT READY is executed. This command
1493	* returns no data, hence the buffer must be left alone!
1494	*/
1495	if (pTaskState->CommandControlBlockGuest.c.abCDB[0] == 0)
1496	cbDataCCB = 0;
1497	#endif
1498
1499	LogFlowFunc(("pTaskState=%#p cbDataCCB=%u direction=%u cbSeg=%u\n", pTaskState, cbDataCCB,
1500	pTaskState->CommandControlBlockGuest.c.uDataDirection, pTaskState->DataSeg.cbSeg));
1501
1502	if ( (cbDataCCB > 0)
1503	&& ( (pTaskState->CommandControlBlockGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_IN)
1504	\|\| (pTaskState->CommandControlBlockGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_UNKNOWN)))
1505	{
1506	if ( (pTaskState->CommandControlBlockGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_SCATTER_GATHER)
1507	\|\| (pTaskState->CommandControlBlockGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_SCATTER_GATHER))
1508	{
1509	uint32_t cScatterGatherGCRead;
1510	uint32_t iScatterGatherEntry;
1511	SGE32 aScatterGatherReadGC[32]; /* Number of scatter gather list entries read from guest memory. */
1512	uint32_t cScatterGatherGCLeft = cbDataCCB / pTaskState->cbSGEntry;
1513	RTGCPHYS GCPhysAddrScatterGatherCurrent = u32PhysAddrCCB;
1514	uint8_t pbData = (uint8_t )pTaskState->DataSeg.pvSeg;
1515
1516	do
1517	{
1518	cScatterGatherGCRead = (cScatterGatherGCLeft < RT_ELEMENTS(aScatterGatherReadGC))
1519	? cScatterGatherGCLeft
1520	: RT_ELEMENTS(aScatterGatherReadGC);
1521	cScatterGatherGCLeft -= cScatterGatherGCRead;
1522
1523	buslogicR3ReadSGEntries(pTaskState, GCPhysAddrScatterGatherCurrent, cScatterGatherGCRead, aScatterGatherReadGC);
1524
1525	for (iScatterGatherEntry = 0; iScatterGatherEntry < cScatterGatherGCRead; iScatterGatherEntry++)
1526	{
1527	RTGCPHYS GCPhysAddrDataBase;
1528	size_t cbDataToTransfer;
1529
1530	Log(("%s: iScatterGatherEntry=%u\n", __FUNCTION__, iScatterGatherEntry));
1531
1532	GCPhysAddrDataBase = (RTGCPHYS)aScatterGatherReadGC[iScatterGatherEntry].u32PhysAddrSegmentBase;
1533	cbDataToTransfer = aScatterGatherReadGC[iScatterGatherEntry].cbSegment;
1534
1535	Log(("%s: GCPhysAddrDataBase=%RGp cbDataToTransfer=%u\n", __FUNCTION__, GCPhysAddrDataBase, cbDataToTransfer));
1536
1537	PDMDevHlpPhysWrite(pDevIns, GCPhysAddrDataBase, pbData, cbDataToTransfer);
1538	pbData += cbDataToTransfer;
1539	}
1540
1541	/* Set address to the next entries to read. */
1542	GCPhysAddrScatterGatherCurrent += cScatterGatherGCRead * pTaskState->cbSGEntry;
1543	} while (cScatterGatherGCLeft > 0);
1544
1545	}
1546	else if ( pTaskState->CommandControlBlockGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB
1547	\|\| pTaskState->CommandControlBlockGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_DATA_LENGTH)
1548	{
1549	/* The buffer is not scattered. */
1550	RTGCPHYS GCPhysAddrDataBase = u32PhysAddrCCB;
1551
1552	AssertMsg(GCPhysAddrDataBase != 0, ("Physical address is 0\n"));
1553
1554	Log(("Non-scattered buffer:\n"));
1555	Log(("u32PhysAddrData=%#x\n", u32PhysAddrCCB));
1556	Log(("cbData=%u\n", cbDataCCB));
1557	Log(("GCPhysAddrDataBase=0x%RGp\n", GCPhysAddrDataBase));
1558
1559	/* Copy the data into the guest memory. */
1560	PDMDevHlpPhysWrite(pDevIns, GCPhysAddrDataBase, pTaskState->DataSeg.pvSeg, pTaskState->DataSeg.cbSeg);
1561	}
1562
1563	}
1564	/* Update residual data length. */
1565	if ( (pTaskState->CommandControlBlockGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_DATA_LENGTH)
1566	\|\| (pTaskState->CommandControlBlockGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_SCATTER_GATHER))
1567	{
1568	uint32_t cbResidual;
1569
1570	/** @todo we need to get the actual transfer length from the VSCSI layer?! */
1571	cbResidual = 0; //LEN_TO_U32(pTaskState->CCBGuest.acbData) - ???;
1572	if (pTaskState->fIs24Bit)
1573	U32_TO_LEN(pTaskState->CommandControlBlockGuest.o.acbData, cbResidual);
1574	else
1575	pTaskState->CommandControlBlockGuest.n.cbData = cbResidual;
1576	}
1577
1578	RTMemFree(pTaskState->DataSeg.pvSeg);
1579	pTaskState->DataSeg.pvSeg = NULL;
1580	pTaskState->DataSeg.cbSeg = 0;
1581	}
1582
1583	/** Convert sense buffer length taking into account shortcut values. */
1584	static uint32_t buslogicR3ConvertSenseBufferLength(uint32_t cbSense)
1585	{
1586	/* Convert special sense buffer length values. */
1587	if (cbSense == 0)
1588	cbSense = 14; /* 0 means standard 14-byte buffer. */
1589	else if (cbSense == 1)
1590	cbSense = 0; /* 1 means no sense data. */
1591	else if (cbSense < 8)
1592	AssertMsgFailed(("Reserved cbSense value of %d used!\n", cbSense));
1593
1594	return cbSense;
1595	}
1596
1597	/**
1598	* Free the sense buffer.
1599	*
1600	* @returns nothing.
1601	* @param pTaskState Pointer to the task state.
1602	* @param fCopy If sense data should be copied to guest memory.
1603	*/
1604	static void buslogicR3SenseBufferFree(PBUSLOGICTASKSTATE pTaskState, bool fCopy)
1605	{
1606	uint32_t cbSenseBuffer;
1607
1608	cbSenseBuffer = buslogicR3ConvertSenseBufferLength(pTaskState->CommandControlBlockGuest.c.cbSenseData);
1609
1610	/* Copy the sense buffer into guest memory if requested. */
1611	if (fCopy && cbSenseBuffer)
1612	{
1613	PPDMDEVINS pDevIns = pTaskState->CTX_SUFF(pTargetDevice)->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns);
1614	RTGCPHYS GCPhysAddrSenseBuffer;
1615
1616	/* With 32-bit CCBs, the (optional) sense buffer physical address is provided separately.
1617	* On the other hand, with 24-bit CCBs, the sense buffer is simply located at the end of
1618	* the CCB, right after the variable-length CDB.
1619	*/
1620	if (pTaskState->fIs24Bit)
1621	{
1622	GCPhysAddrSenseBuffer = pTaskState->MailboxGuest.u32PhysAddrCCB;
1623	GCPhysAddrSenseBuffer += pTaskState->CommandControlBlockGuest.c.cbCDB + RT_OFFSETOF(CCB24, abCDB);
1624	}
1625	else
1626	GCPhysAddrSenseBuffer = pTaskState->CommandControlBlockGuest.n.u32PhysAddrSenseData;
1627
1628	PDMDevHlpPhysWrite(pDevIns, GCPhysAddrSenseBuffer, pTaskState->pbSenseBuffer, cbSenseBuffer);
1629	}
1630
1631	RTMemFree(pTaskState->pbSenseBuffer);
1632	pTaskState->pbSenseBuffer = NULL;
1633	}
1634
1635	/**
1636	* Alloc the sense buffer.
1637	*
1638	* @returns VBox status code.
1639	* @param pTaskState Pointer to the task state.
1640	* @note Current assumption is that the sense buffer is not scattered and does not cross a page boundary.
1641	*/
1642	static int buslogicR3SenseBufferAlloc(PBUSLOGICTASKSTATE pTaskState)
1643	{
1644	PPDMDEVINS pDevIns = pTaskState->CTX_SUFF(pTargetDevice)->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns);
1645	uint32_t cbSenseBuffer;
1646
1647	pTaskState->pbSenseBuffer = NULL;
1648
1649	cbSenseBuffer = buslogicR3ConvertSenseBufferLength(pTaskState->CommandControlBlockGuest.c.cbSenseData);
1650	if (cbSenseBuffer)
1651	{
1652	pTaskState->pbSenseBuffer = (uint8_t *)RTMemAllocZ(cbSenseBuffer);
1653	if (!pTaskState->pbSenseBuffer)
1654	return VERR_NO_MEMORY;
1655	}
1656
1657	return VINF_SUCCESS;
1658	}
1659
1660	#endif /* IN_RING3 */
1661
1662	/**
1663	* Parses the command buffer and executes it.
1664	*
1665	* @returns VBox status code.
1666	* @param pBusLogic Pointer to the BusLogic device instance.
1667	*/
1668	static int buslogicProcessCommand(PBUSLOGIC pBusLogic)
1669	{
1670	int rc = VINF_SUCCESS;
1671	bool fSuppressIrq = false;
1672
1673	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
1674	AssertMsg(pBusLogic->uOperationCode != 0xff, ("There is no command to execute\n"));
1675
1676	switch (pBusLogic->uOperationCode)
1677	{
1678	case BUSLOGICCOMMAND_TEST_CMDC_INTERRUPT:
1679	/* Valid command, no reply. */
1680	pBusLogic->cbReplyParametersLeft = 0;
1681	break;
1682	case BUSLOGICCOMMAND_INQUIRE_PCI_HOST_ADAPTER_INFORMATION:
1683	{
1684	PReplyInquirePCIHostAdapterInformation pReply = (PReplyInquirePCIHostAdapterInformation)pBusLogic->aReplyBuffer;
1685	memset(pReply, 0, sizeof(ReplyInquirePCIHostAdapterInformation));
1686
1687	/* It seems VMware does not provide valid information here too, lets do the same :) */
1688	pReply->InformationIsValid = 0;
1689	pReply->IsaIOPort = pBusLogic->uISABaseCode;
1690	pReply->IRQ = PCIDevGetInterruptLine(&pBusLogic->dev);
1691	pBusLogic->cbReplyParametersLeft = sizeof(ReplyInquirePCIHostAdapterInformation);
1692	break;
1693	}
1694	case BUSLOGICCOMMAND_MODIFY_IO_ADDRESS:
1695	{
1696	/* Modify the ISA-compatible I/O port base. Note that this technically
1697	* violates the PCI spec, as this address is not reported through PCI.
1698	* However, it is required for compatibility with old drivers.
1699	*/
1700	#ifdef IN_RING3
1701	Log(("ISA I/O for PCI (code %x)\n", pBusLogic->aCommandBuffer[0]));
1702	buslogicR3RegisterISARange(pBusLogic, pBusLogic->aCommandBuffer[0]);
1703	pBusLogic->cbReplyParametersLeft = 0;
1704	fSuppressIrq = true;
1705	break;
1706	#else
1707	AssertMsgFailed(("Must never get here!\n"));
1708	#endif
1709	}
1710	case BUSLOGICCOMMAND_INQUIRE_BOARD_ID:
1711	{
1712	/* The special option byte is important: If it is '0' or 'B', Windows NT drivers
1713	* for Adaptec AHA-154x may claim the adapter. The BusLogic drivers will claim
1714	* the adapter only when the byte is not '0' or 'B'.
1715	*/
1716	pBusLogic->aReplyBuffer[0] = 'A'; /* Firmware option bytes */
1717	pBusLogic->aReplyBuffer[1] = 'A'; /* Special option byte */
1718
1719	/* We report version 5.07B. This reply will provide the first two digits. */
1720	pBusLogic->aReplyBuffer[2] = '5'; /* Major version 5 */
1721	pBusLogic->aReplyBuffer[3] = '0'; /* Minor version 0 */
1722	pBusLogic->cbReplyParametersLeft = 4; /* Reply is 4 bytes long */
1723	break;
1724	}
1725	case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_3RD_LETTER:
1726	{
1727	pBusLogic->aReplyBuffer[0] = '7';
1728	pBusLogic->cbReplyParametersLeft = 1;
1729	break;
1730	}
1731	case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_LETTER:
1732	{
1733	pBusLogic->aReplyBuffer[0] = 'B';
1734	pBusLogic->cbReplyParametersLeft = 1;
1735	break;
1736	}
1737	case BUSLOGICCOMMAND_SET_ADAPTER_OPTIONS:
1738	/* The parameter list length is determined by the first byte of the command buffer. */
1739	if (pBusLogic->iParameter == 1)
1740	{
1741	/* First pass - set the number of following parameter bytes. */
1742	pBusLogic->cbCommandParametersLeft = pBusLogic->aCommandBuffer[0];
1743	Log(("Set HA options: %u bytes follow\n", pBusLogic->cbCommandParametersLeft));
1744	}
1745	else
1746	{
1747	/* Second pass - process received data. */
1748	Log(("Set HA options: received %u bytes\n", pBusLogic->aCommandBuffer[0]));
1749	/* We ignore the data - it only concerns the SCSI hardware protocol. */
1750	}
1751	pBusLogic->cbReplyParametersLeft = 0;
1752	break;
1753
1754	case BUSLOGICCOMMAND_INQUIRE_HOST_ADAPTER_MODEL_NUMBER:
1755	{
1756	/* The reply length is set by the guest and is found in the first byte of the command buffer. */
1757	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
1758	memset(pBusLogic->aReplyBuffer, ' ', pBusLogic->cbReplyParametersLeft);
1759	const char aModelName[] = "958";
1760	int cCharsToTransfer = (pBusLogic->cbReplyParametersLeft <= (sizeof(aModelName) - 1))
1761	? pBusLogic->cbReplyParametersLeft
1762	: sizeof(aModelName) - 1;
1763
1764	for (int i = 0; i < cCharsToTransfer; i++)
1765	pBusLogic->aReplyBuffer[i] = aModelName[i];
1766
1767	break;
1768	}
1769	case BUSLOGICCOMMAND_INQUIRE_CONFIGURATION:
1770	{
1771	uint8_t uPciIrq = PCIDevGetInterruptLine(&pBusLogic->dev);
1772
1773	pBusLogic->cbReplyParametersLeft = sizeof(ReplyInquireConfiguration);
1774	PReplyInquireConfiguration pReply = (PReplyInquireConfiguration)pBusLogic->aReplyBuffer;
1775	memset(pReply, 0, sizeof(ReplyInquireConfiguration));
1776
1777	pReply->uHostAdapterId = 7; /* The controller has always 7 as ID. */
1778	pReply->fDmaChannel6 = 1; /* DMA channel 6 is a good default. */
1779	/* The PCI IRQ is not necessarily representable in this structure.
1780	* If that is the case, the guest likely won't function correctly,
1781	* therefore we log a warning.
1782	*/
1783	switch (uPciIrq)
1784	{
1785	case 9: pReply->fIrqChannel9 = 1; break;
1786	case 10: pReply->fIrqChannel10 = 1; break;
1787	case 11: pReply->fIrqChannel11 = 1; break;
1788	case 12: pReply->fIrqChannel12 = 1; break;
1789	case 14: pReply->fIrqChannel14 = 1; break;
1790	case 15: pReply->fIrqChannel15 = 1; break;
1791	default:
1792	LogRel(("Warning: PCI IRQ %d cannot be represented as ISA!\n", uPciIrq));
1793	break;
1794	}
1795	break;
1796	}
1797	case BUSLOGICCOMMAND_INQUIRE_EXTENDED_SETUP_INFORMATION:
1798	{
1799	/* Some Adaptec AHA-154x drivers (e.g. OS/2) execute this command and expect
1800	* it to fail. If it succeeds, the drivers refuse to load. However, some newer
1801	* Adaptec 154x models supposedly support it too??
1802	*/
1803
1804	/* The reply length is set by the guest and is found in the first byte of the command buffer. */
1805	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
1806	PReplyInquireExtendedSetupInformation pReply = (PReplyInquireExtendedSetupInformation)pBusLogic->aReplyBuffer;
1807	memset(pReply, 0, sizeof(ReplyInquireExtendedSetupInformation));
1808
1809	/** @todo should this reflect the RAM contents (AutoSCSIRam)? */
1810	pReply->uBusType = 'E'; /* EISA style */
1811	pReply->u16ScatterGatherLimit = 8192;
1812	pReply->cMailbox = pBusLogic->cMailbox;
1813	pReply->uMailboxAddressBase = (uint32_t)pBusLogic->GCPhysAddrMailboxOutgoingBase;
1814	pReply->fLevelSensitiveInterrupt = true;
1815	pReply->fHostWideSCSI = true;
1816	pReply->fHostUltraSCSI = true;
1817	memcpy(pReply->aFirmwareRevision, "07B", sizeof(pReply->aFirmwareRevision));
1818
1819	break;
1820	}
1821	case BUSLOGICCOMMAND_INQUIRE_SETUP_INFORMATION:
1822	{
1823	/* The reply length is set by the guest and is found in the first byte of the command buffer. */
1824	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
1825	PReplyInquireSetupInformation pReply = (PReplyInquireSetupInformation)pBusLogic->aReplyBuffer;
1826	memset(pReply, 0, sizeof(ReplyInquireSetupInformation));
1827	pReply->fSynchronousInitiationEnabled = true;
1828	pReply->fParityCheckingEnabled = true;
1829	pReply->cMailbox = pBusLogic->cMailbox;
1830	U32_TO_ADDR(pReply->MailboxAddress, pBusLogic->GCPhysAddrMailboxOutgoingBase);
1831	pReply->uSignature = 'B';
1832	/* The 'D' signature prevents Adaptec's OS/2 drivers from getting too
1833	* friendly with BusLogic hardware and upsetting the HBA state.
1834	*/
1835	pReply->uCharacterD = 'D'; /* BusLogic model. */
1836	pReply->uHostBusType = 'F'; /* PCI bus. */
1837	break;
1838	}
1839	case BUSLOGICCOMMAND_FETCH_HOST_ADAPTER_LOCAL_RAM:
1840	{
1841	/*
1842	* First element in the command buffer contains start offset to read from
1843	* and second one the number of bytes to read.
1844	*/
1845	uint8_t uOffset = pBusLogic->aCommandBuffer[0];
1846	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[1];
1847
1848	pBusLogic->fUseLocalRam = true;
1849	pBusLogic->iReply = uOffset;
1850	break;
1851	}
1852	case BUSLOGICCOMMAND_INITIALIZE_MAILBOX:
1853	{
1854	PRequestInitMbx pRequest = (PRequestInitMbx)pBusLogic->aCommandBuffer;
1855
1856	pBusLogic->fMbxIs24Bit = true;
1857	pBusLogic->cMailbox = pRequest->cMailbox;
1858	pBusLogic->GCPhysAddrMailboxOutgoingBase = (RTGCPHYS)ADDR_TO_U32(pRequest->aMailboxBaseAddr);
1859	/* The area for incoming mailboxes is right after the last entry of outgoing mailboxes. */
1860	pBusLogic->GCPhysAddrMailboxIncomingBase = pBusLogic->GCPhysAddrMailboxOutgoingBase + (pBusLogic->cMailbox * sizeof(Mailbox24));
1861
1862	Log(("GCPhysAddrMailboxOutgoingBase=%RGp\n", pBusLogic->GCPhysAddrMailboxOutgoingBase));
1863	Log(("GCPhysAddrMailboxIncomingBase=%RGp\n", pBusLogic->GCPhysAddrMailboxIncomingBase));
1864	Log(("cMailboxes=%u (24-bit mode)\n", pBusLogic->cMailbox));
1865	LogRel(("Initialized 24-bit mailbox, %d entries at %08x\n", pRequest->cMailbox, ADDR_TO_U32(pRequest->aMailboxBaseAddr)));
1866
1867	pBusLogic->regStatus &= ~BUSLOGIC_REGISTER_STATUS_INITIALIZATION_REQUIRED;
1868	pBusLogic->cbReplyParametersLeft = 0;
1869	break;
1870	}
1871	case BUSLOGICCOMMAND_INITIALIZE_EXTENDED_MAILBOX:
1872	{
1873	PRequestInitializeExtendedMailbox pRequest = (PRequestInitializeExtendedMailbox)pBusLogic->aCommandBuffer;
1874
1875	pBusLogic->fMbxIs24Bit = false;
1876	pBusLogic->cMailbox = pRequest->cMailbox;
1877	pBusLogic->GCPhysAddrMailboxOutgoingBase = (RTGCPHYS)pRequest->uMailboxBaseAddress;
1878	/* The area for incoming mailboxes is right after the last entry of outgoing mailboxes. */
1879	pBusLogic->GCPhysAddrMailboxIncomingBase = (RTGCPHYS)pRequest->uMailboxBaseAddress + (pBusLogic->cMailbox * sizeof(Mailbox32));
1880
1881	Log(("GCPhysAddrMailboxOutgoingBase=%RGp\n", pBusLogic->GCPhysAddrMailboxOutgoingBase));
1882	Log(("GCPhysAddrMailboxIncomingBase=%RGp\n", pBusLogic->GCPhysAddrMailboxIncomingBase));
1883	Log(("cMailboxes=%u (32-bit mode)\n", pBusLogic->cMailbox));
1884	LogRel(("Initialized 32-bit mailbox, %d entries at %08x\n", pRequest->cMailbox, pRequest->uMailboxBaseAddress));
1885
1886	pBusLogic->regStatus &= ~BUSLOGIC_REGISTER_STATUS_INITIALIZATION_REQUIRED;
1887	pBusLogic->cbReplyParametersLeft = 0;
1888	break;
1889	}
1890	case BUSLOGICCOMMAND_ENABLE_STRICT_ROUND_ROBIN_MODE:
1891	{
1892	if (pBusLogic->aCommandBuffer[0] == 0)
1893	pBusLogic->fStrictRoundRobinMode = false;
1894	else if (pBusLogic->aCommandBuffer[0] == 1)
1895	pBusLogic->fStrictRoundRobinMode = true;
1896	else
1897	AssertMsgFailed(("Invalid round robin mode %d\n", pBusLogic->aCommandBuffer[0]));
1898
1899	pBusLogic->cbReplyParametersLeft = 0;
1900	break;
1901	}
1902	case BUSLOGICCOMMAND_SET_CCB_FORMAT:
1903	{
1904	if (pBusLogic->aCommandBuffer[0] == 0)
1905	pBusLogic->fExtendedLunCCBFormat = false;
1906	else if (pBusLogic->aCommandBuffer[0] == 1)
1907	pBusLogic->fExtendedLunCCBFormat = true;
1908	else
1909	AssertMsgFailed(("Invalid CCB format %d\n", pBusLogic->aCommandBuffer[0]));
1910
1911	pBusLogic->cbReplyParametersLeft = 0;
1912	break;
1913	}
1914	case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_0_TO_7:
1915	/* This is supposed to send TEST UNIT READY to each target/LUN.
1916	* We cheat and skip that, since we already know what's attached
1917	*/
1918	memset(pBusLogic->aReplyBuffer, 0, 8);
1919	for (int i = 0; i < 8; ++i)
1920	{
1921	if (pBusLogic->aDeviceStates[i].fPresent)
1922	pBusLogic->aReplyBuffer[i] = 1;
1923	}
1924	pBusLogic->aReplyBuffer[7] = 0; /* HA hardcoded at ID 7. */
1925	pBusLogic->cbReplyParametersLeft = 8;
1926	break;
1927	case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_8_TO_15:
1928	/* See note about cheating above. */
1929	memset(pBusLogic->aReplyBuffer, 0, 8);
1930	for (int i = 0; i < 8; ++i)
1931	{
1932	if (pBusLogic->aDeviceStates[i + 8].fPresent)
1933	pBusLogic->aReplyBuffer[i] = 1;
1934	}
1935	pBusLogic->cbReplyParametersLeft = 8;
1936	break;
1937	case BUSLOGICCOMMAND_INQUIRE_TARGET_DEVICES:
1938	{
1939	/* Each bit which is set in the 16bit wide variable means a present device. */
1940	uint16_t u16TargetsPresentMask = 0;
1941
1942	for (uint8_t i = 0; i < RT_ELEMENTS(pBusLogic->aDeviceStates); i++)
1943	{
1944	if (pBusLogic->aDeviceStates[i].fPresent)
1945	u16TargetsPresentMask \|= (1 << i);
1946	}
1947	pBusLogic->aReplyBuffer[0] = (uint8_t)u16TargetsPresentMask;
1948	pBusLogic->aReplyBuffer[1] = (uint8_t)(u16TargetsPresentMask >> 8);
1949	pBusLogic->cbReplyParametersLeft = 2;
1950	break;
1951	}
1952	case BUSLOGICCOMMAND_INQUIRE_SYNCHRONOUS_PERIOD:
1953	{
1954	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
1955
1956	for (uint8_t i = 0; i < pBusLogic->cbReplyParametersLeft; i++)
1957	pBusLogic->aReplyBuffer[i] = 0; /** @todo Figure if we need something other here. It's not needed for the linux driver */
1958
1959	break;
1960	}
1961	case BUSLOGICCOMMAND_DISABLE_HOST_ADAPTER_INTERRUPT:
1962	{
1963	if (pBusLogic->aCommandBuffer[0] == 0)
1964	pBusLogic->fIRQEnabled = false;
1965	else
1966	pBusLogic->fIRQEnabled = true;
1967	/* No interrupt signaled regardless of enable/disable. */
1968	fSuppressIrq = true;
1969	break;
1970	}
1971	case BUSLOGICCOMMAND_ECHO_COMMAND_DATA:
1972	{
1973	pBusLogic->aReplyBuffer[0] = pBusLogic->aCommandBuffer[0];
1974	pBusLogic->cbReplyParametersLeft = 1;
1975	break;
1976	}
1977	case BUSLOGICCOMMAND_SET_PREEMPT_TIME_ON_BUS:
1978	{
1979	pBusLogic->cbReplyParametersLeft = 0;
1980	pBusLogic->LocalRam.structured.autoSCSIData.uBusOnDelay = pBusLogic->aCommandBuffer[0];
1981	Log(("Bus-on time: %d\n", pBusLogic->aCommandBuffer[0]));
1982	break;
1983	}
1984	case BUSLOGICCOMMAND_SET_TIME_OFF_BUS:
1985	{
1986	pBusLogic->cbReplyParametersLeft = 0;
1987	pBusLogic->LocalRam.structured.autoSCSIData.uBusOffDelay = pBusLogic->aCommandBuffer[0];
1988	Log(("Bus-off time: %d\n", pBusLogic->aCommandBuffer[0]));
1989	break;
1990	}
1991	case BUSLOGICCOMMAND_SET_BUS_TRANSFER_RATE:
1992	{
1993	pBusLogic->cbReplyParametersLeft = 0;
1994	pBusLogic->LocalRam.structured.autoSCSIData.uDMATransferRate = pBusLogic->aCommandBuffer[0];
1995	Log(("Bus transfer rate: %02X\n", pBusLogic->aCommandBuffer[0]));
1996	break;
1997	}
1998	default:
1999	AssertMsgFailed(("Invalid command %#x\n", pBusLogic->uOperationCode));
2000	case BUSLOGICCOMMAND_EXT_BIOS_INFO:
2001	case BUSLOGICCOMMAND_UNLOCK_MAILBOX:
2002	/* Commands valid for Adaptec 154xC which we don't handle since
2003	* we pretend being 154xB compatible. Just mark the command as invalid.
2004	*/
2005	Log(("Command %#x not valid for this adapter\n", pBusLogic->uOperationCode));
2006	pBusLogic->cbReplyParametersLeft = 0;
2007	pBusLogic->regStatus \|= BUSLOGIC_REGISTER_STATUS_COMMAND_INVALID;
2008	break;
2009	case BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND: /* Should be handled already. */
2010	AssertMsgFailed(("Invalid mailbox execute state!\n"));
2011	}
2012
2013	Log(("uOperationCode=%#x, cbReplyParametersLeft=%d\n", pBusLogic->uOperationCode, pBusLogic->cbReplyParametersLeft));
2014
2015	/* Set the data in ready bit in the status register in case the command has a reply. */
2016	if (pBusLogic->cbReplyParametersLeft)
2017	pBusLogic->regStatus \|= BUSLOGIC_REGISTER_STATUS_DATA_IN_REGISTER_READY;
2018	else if (!pBusLogic->cbCommandParametersLeft)
2019	buslogicCommandComplete(pBusLogic, fSuppressIrq);
2020
2021	return rc;
2022	}
2023
2024	/**
2025	* Read a register from the BusLogic adapter.
2026	*
2027	* @returns VBox status code.
2028	* @param pBusLogic Pointer to the BusLogic instance data.
2029	* @param iRegister The index of the register to read.
2030	* @param pu32 Where to store the register content.
2031	*/
2032	static int buslogicRegisterRead(PBUSLOGIC pBusLogic, unsigned iRegister, uint32_t *pu32)
2033	{
2034	int rc = VINF_SUCCESS;
2035
2036	switch (iRegister)
2037	{
2038	case BUSLOGIC_REGISTER_STATUS:
2039	{
2040	*pu32 = pBusLogic->regStatus;
2041
2042	/* If the diagnostic active bit is set, we are in a guest-initiated
2043	* hard reset. If the guest reads the status register and waits for
2044	* the host adapter ready bit to be set, we terminate the reset right
2045	* away. However, guests may also expect the reset condition to clear
2046	* automatically after a period of time, in which case we can't show
2047	* the DIAG bit at all.
2048	*/
2049	if (pBusLogic->regStatus & BUSLOGIC_REGISTER_STATUS_DIAGNOSTIC_ACTIVE)
2050	{
2051	uint64_t u64AccessTime = PDMDevHlpTMTimeVirtGetNano(pBusLogic->CTX_SUFF(pDevIns));
2052
2053	pBusLogic->regStatus &= ~BUSLOGIC_REGISTER_STATUS_DIAGNOSTIC_ACTIVE;
2054	pBusLogic->regStatus \|= BUSLOGIC_REGISTER_STATUS_HOST_ADAPTER_READY;
2055
2056	if (u64AccessTime - pBusLogic->u64ResetTime > BUSLOGIC_RESET_DURATION_NS)
2057	{
2058	/* If reset already expired, let the guest see that right away. */
2059	*pu32 = pBusLogic->regStatus;
2060	pBusLogic->u64ResetTime = 0;
2061	}
2062	}
2063	break;
2064	}
2065	case BUSLOGIC_REGISTER_DATAIN:
2066	{
2067	if (pBusLogic->fUseLocalRam)
2068	*pu32 = pBusLogic->LocalRam.u8View[pBusLogic->iReply];
2069	else
2070	*pu32 = pBusLogic->aReplyBuffer[pBusLogic->iReply];
2071
2072	/* Careful about underflow - guest can read data register even if
2073	* no data is available.
2074	*/
2075	if (pBusLogic->cbReplyParametersLeft)
2076	{
2077	pBusLogic->iReply++;
2078	pBusLogic->cbReplyParametersLeft--;
2079	if (!pBusLogic->cbReplyParametersLeft)
2080	{
2081	/*
2082	* Reply finished, set command complete bit, unset data-in ready bit and
2083	* interrupt the guest if enabled.
2084	*/
2085	buslogicCommandComplete(pBusLogic, false);
2086	}
2087	}
2088	LogFlowFunc(("data=%02x, iReply=%d, cbReplyParametersLeft=%u\n", *pu32,
2089	pBusLogic->iReply, pBusLogic->cbReplyParametersLeft));
2090	break;
2091	}
2092	case BUSLOGIC_REGISTER_INTERRUPT:
2093	{
2094	*pu32 = pBusLogic->regInterrupt;
2095	break;
2096	}
2097	case BUSLOGIC_REGISTER_GEOMETRY:
2098	{
2099	*pu32 = pBusLogic->regGeometry;
2100	break;
2101	}
2102	default:
2103	*pu32 = UINT32_C(0xffffffff);
2104	}
2105
2106	Log2(("%s: pu32=%p:{%.*Rhxs} iRegister=%d rc=%Rrc\n",
2107	__FUNCTION__, pu32, 1, pu32, iRegister, rc));
2108
2109	return rc;
2110	}
2111
2112	/**
2113	* Write a value to a register.
2114	*
2115	* @returns VBox status code.
2116	* @param pBusLogic Pointer to the BusLogic instance data.
2117	* @param iRegister The index of the register to read.
2118	* @param uVal The value to write.
2119	*/
2120	static int buslogicRegisterWrite(PBUSLOGIC pBusLogic, unsigned iRegister, uint8_t uVal)
2121	{
2122	int rc = VINF_SUCCESS;
2123
2124	switch (iRegister)
2125	{
2126	case BUSLOGIC_REGISTER_CONTROL:
2127	{
2128	if ((uVal & BUSLOGIC_REGISTER_CONTROL_HARD_RESET) \|\| (uVal & BUSLOGIC_REGISTER_CONTROL_SOFT_RESET))
2129	{
2130	#ifdef IN_RING3
2131	bool fHardReset = !!(uVal & BUSLOGIC_REGISTER_CONTROL_HARD_RESET);
2132
2133	LogRel(("BusLogic: %s reset\n", fHardReset ? "hard" : "soft"));
2134	buslogicR3InitiateReset(pBusLogic, fHardReset);
2135	#else
2136	rc = VINF_IOM_R3_IOPORT_WRITE;
2137	#endif
2138	break;
2139	}
2140
2141	rc = PDMCritSectEnter(&pBusLogic->CritSectIntr, VINF_IOM_R3_IOPORT_WRITE);
2142	if (rc != VINF_SUCCESS)
2143	return rc;
2144
2145	#ifdef LOG_ENABLED
2146	uint32_t cMailboxesReady = ASMAtomicXchgU32(&pBusLogic->cInMailboxesReady, 0);
2147	Log(("%u incoming mailboxes were ready when this interrupt was cleared\n", cMailboxesReady));
2148	#endif
2149
2150	if (uVal & BUSLOGIC_REGISTER_CONTROL_INTERRUPT_RESET)
2151	buslogicClearInterrupt(pBusLogic);
2152
2153	PDMCritSectLeave(&pBusLogic->CritSectIntr);
2154
2155	break;
2156	}
2157	case BUSLOGIC_REGISTER_COMMAND:
2158	{
2159	/* Fast path for mailbox execution command. */
2160	if ((uVal == BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND) && (pBusLogic->uOperationCode == 0xff))
2161	{
2162	ASMAtomicIncU32(&pBusLogic->cMailboxesReady);
2163	if (!ASMAtomicXchgBool(&pBusLogic->fNotificationSend, true))
2164	{
2165	/* Send new notification to the queue. */
2166	PPDMQUEUEITEMCORE pItem = PDMQueueAlloc(pBusLogic->CTX_SUFF(pNotifierQueue));
2167	AssertMsg(pItem, ("Allocating item for queue failed\n"));
2168	PDMQueueInsert(pBusLogic->CTX_SUFF(pNotifierQueue), (PPDMQUEUEITEMCORE)pItem);
2169	}
2170
2171	return rc;
2172	}
2173
2174	/*
2175	* Check if we are already fetch command parameters from the guest.
2176	* If not we initialize executing a new command.
2177	*/
2178	if (pBusLogic->uOperationCode == 0xff)
2179	{
2180	pBusLogic->uOperationCode = uVal;
2181	pBusLogic->iParameter = 0;
2182
2183	/* Mark host adapter as busy and clear the invalid status bit. */
2184	pBusLogic->regStatus &= ~(BUSLOGIC_REGISTER_STATUS_HOST_ADAPTER_READY \| BUSLOGIC_REGISTER_STATUS_COMMAND_INVALID);
2185
2186	/* Get the number of bytes for parameters from the command code. */
2187	switch (pBusLogic->uOperationCode)
2188	{
2189	case BUSLOGICCOMMAND_TEST_CMDC_INTERRUPT:
2190	case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_LETTER:
2191	case BUSLOGICCOMMAND_INQUIRE_BOARD_ID:
2192	case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_3RD_LETTER:
2193	case BUSLOGICCOMMAND_INQUIRE_PCI_HOST_ADAPTER_INFORMATION:
2194	case BUSLOGICCOMMAND_INQUIRE_CONFIGURATION:
2195	case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_0_TO_7:
2196	case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_8_TO_15:
2197	case BUSLOGICCOMMAND_INQUIRE_TARGET_DEVICES:
2198	pBusLogic->cbCommandParametersLeft = 0;
2199	break;
2200	case BUSLOGICCOMMAND_MODIFY_IO_ADDRESS:
2201	case BUSLOGICCOMMAND_INQUIRE_EXTENDED_SETUP_INFORMATION:
2202	case BUSLOGICCOMMAND_INQUIRE_SETUP_INFORMATION:
2203	case BUSLOGICCOMMAND_INQUIRE_HOST_ADAPTER_MODEL_NUMBER:
2204	case BUSLOGICCOMMAND_ENABLE_STRICT_ROUND_ROBIN_MODE:
2205	case BUSLOGICCOMMAND_SET_CCB_FORMAT:
2206	case BUSLOGICCOMMAND_INQUIRE_SYNCHRONOUS_PERIOD:
2207	case BUSLOGICCOMMAND_DISABLE_HOST_ADAPTER_INTERRUPT:
2208	case BUSLOGICCOMMAND_ECHO_COMMAND_DATA:
2209	case BUSLOGICCOMMAND_SET_PREEMPT_TIME_ON_BUS:
2210	case BUSLOGICCOMMAND_SET_TIME_OFF_BUS:
2211	case BUSLOGICCOMMAND_SET_BUS_TRANSFER_RATE:
2212	pBusLogic->cbCommandParametersLeft = 1;
2213	break;
2214	case BUSLOGICCOMMAND_FETCH_HOST_ADAPTER_LOCAL_RAM:
2215	pBusLogic->cbCommandParametersLeft = 2;
2216	break;
2217	case BUSLOGICCOMMAND_INITIALIZE_MAILBOX:
2218	pBusLogic->cbCommandParametersLeft = sizeof(RequestInitMbx);
2219	break;
2220	case BUSLOGICCOMMAND_INITIALIZE_EXTENDED_MAILBOX:
2221	pBusLogic->cbCommandParametersLeft = sizeof(RequestInitializeExtendedMailbox);
2222	break;
2223	case BUSLOGICCOMMAND_SET_ADAPTER_OPTIONS:
2224	/* There must be at least one byte following this command. */
2225	pBusLogic->cbCommandParametersLeft = 1;
2226	break;
2227	case BUSLOGICCOMMAND_EXT_BIOS_INFO:
2228	case BUSLOGICCOMMAND_UNLOCK_MAILBOX:
2229	/* Invalid commands. */
2230	pBusLogic->cbCommandParametersLeft = 0;
2231	break;
2232	case BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND: /* Should not come here anymore. */
2233	default:
2234	AssertMsgFailed(("Invalid operation code %#x\n", uVal));
2235	}
2236	}
2237	else
2238	{
2239	#ifndef IN_RING3
2240	/* This command must be executed in R3 as it rehooks the ISA I/O port. */
2241	if (pBusLogic->uOperationCode == BUSLOGICCOMMAND_MODIFY_IO_ADDRESS)
2242	{
2243	rc = VINF_IOM_R3_IOPORT_WRITE;
2244	break;
2245	}
2246	#endif
2247	/*
2248	* The real adapter would set the Command register busy bit in the status register.
2249	* The guest has to wait until it is unset.
2250	* We don't need to do it because the guest does not continue execution while we are in this
2251	* function.
2252	*/
2253	pBusLogic->aCommandBuffer[pBusLogic->iParameter] = uVal;
2254	pBusLogic->iParameter++;
2255	pBusLogic->cbCommandParametersLeft--;
2256	}
2257
2258	/* Start execution of command if there are no parameters left. */
2259	if (!pBusLogic->cbCommandParametersLeft)
2260	{
2261	rc = buslogicProcessCommand(pBusLogic);
2262	AssertMsgRC(rc, ("Processing command failed rc=%Rrc\n", rc));
2263	}
2264	break;
2265	}
2266
2267	/* On BusLogic adapters, the interrupt and geometry registers are R/W.
2268	* That is different from Adaptec 154x where those are read only.
2269	*/
2270	case BUSLOGIC_REGISTER_INTERRUPT:
2271	pBusLogic->regInterrupt = uVal;
2272	break;
2273
2274	case BUSLOGIC_REGISTER_GEOMETRY:
2275	pBusLogic->regGeometry = uVal;
2276	break;
2277
2278	default:
2279	AssertMsgFailed(("Register not available\n"));
2280	rc = VERR_IOM_IOPORT_UNUSED;
2281	}
2282
2283	return rc;
2284	}
2285
2286	/**
2287	* Memory mapped I/O Handler for read operations.
2288	*
2289	* @returns VBox status code.
2290	*
2291	* @param pDevIns The device instance.
2292	* @param pvUser User argument.
2293	* @param GCPhysAddr Physical address (in GC) where the read starts.
2294	* @param pv Where to store the result.
2295	* @param cb Number of bytes read.
2296	*/
2297	PDMBOTHCBDECL(int) buslogicMMIORead(PPDMDEVINS pDevIns, void pvUser, RTGCPHYS GCPhysAddr, void pv, unsigned cb)
2298	{
2299	/* the linux driver does not make use of the MMIO area. */
2300	AssertMsgFailed(("MMIO Read\n"));
2301	return VINF_SUCCESS;
2302	}
2303
2304	/**
2305	* Memory mapped I/O Handler for write operations.
2306	*
2307	* @returns VBox status code.
2308	*
2309	* @param pDevIns The device instance.
2310	* @param pvUser User argument.
2311	* @param GCPhysAddr Physical address (in GC) where the read starts.
2312	* @param pv Where to fetch the result.
2313	* @param cb Number of bytes to write.
2314	*/
2315	PDMBOTHCBDECL(int) buslogicMMIOWrite(PPDMDEVINS pDevIns, void pvUser, RTGCPHYS GCPhysAddr, void const pv, unsigned cb)
2316	{
2317	/* the linux driver does not make use of the MMIO area. */
2318	AssertMsgFailed(("MMIO Write\n"));
2319	return VINF_SUCCESS;
2320	}
2321
2322	/**
2323	* Port I/O Handler for IN operations.
2324	*
2325	* @returns VBox status code.
2326	*
2327	* @param pDevIns The device instance.
2328	* @param pvUser User argument.
2329	* @param uPort Port number used for the IN operation.
2330	* @param pu32 Where to store the result.
2331	* @param cb Number of bytes read.
2332	*/
2333	PDMBOTHCBDECL(int) buslogicIOPortRead(PPDMDEVINS pDevIns, void pvUser, RTIOPORT Port, uint32_t pu32, unsigned cb)
2334	{
2335	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2336	unsigned iRegister = Port % 4;
2337
2338	Assert(cb == 1);
2339
2340	return buslogicRegisterRead(pBusLogic, iRegister, pu32);
2341	}
2342
2343	/**
2344	* Port I/O Handler for OUT operations.
2345	*
2346	* @returns VBox status code.
2347	*
2348	* @param pDevIns The device instance.
2349	* @param pvUser User argument.
2350	* @param uPort Port number used for the IN operation.
2351	* @param u32 The value to output.
2352	* @param cb The value size in bytes.
2353	*/
2354	PDMBOTHCBDECL(int) buslogicIOPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
2355	{
2356	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2357	int rc = VINF_SUCCESS;
2358	unsigned iRegister = Port % 4;
2359	uint8_t uVal = (uint8_t)u32;
2360
2361	Assert(cb == 1);
2362
2363	rc = buslogicRegisterWrite(pBusLogic, iRegister, (uint8_t)uVal);
2364
2365	Log2(("#%d %s: pvUser=%#p cb=%d u32=%#x Port=%#x rc=%Rrc\n",
2366	pDevIns->iInstance, __FUNCTION__, pvUser, cb, u32, Port, rc));
2367
2368	return rc;
2369	}
2370
2371	#ifdef IN_RING3
2372
2373	static int buslogicR3PrepareBIOSSCSIRequest(PBUSLOGIC pBusLogic)
2374	{
2375	int rc;
2376	PBUSLOGICTASKSTATE pTaskState;
2377	uint32_t uTargetDevice;
2378
2379	rc = RTMemCacheAllocEx(pBusLogic->hTaskCache, (void **)&pTaskState);
2380	AssertMsgRCReturn(rc, ("Getting task from cache failed rc=%Rrc\n", rc), rc);
2381
2382	pTaskState->fBIOS = true;
2383
2384	rc = vboxscsiSetupRequest(&pBusLogic->VBoxSCSI, &pTaskState->PDMScsiRequest, &uTargetDevice);
2385	AssertMsgRCReturn(rc, ("Setting up SCSI request failed rc=%Rrc\n", rc), rc);
2386
2387	pTaskState->PDMScsiRequest.pvUser = pTaskState;
2388
2389	pTaskState->CTX_SUFF(pTargetDevice) = &pBusLogic->aDeviceStates[uTargetDevice];
2390
2391	if (!pTaskState->CTX_SUFF(pTargetDevice)->fPresent)
2392	{
2393	/* Device is not present. */
2394	AssertMsg(pTaskState->PDMScsiRequest.pbCDB[0] == SCSI_INQUIRY,
2395	("Device is not present but command is not inquiry\n"));
2396
2397	SCSIINQUIRYDATA ScsiInquiryData;
2398
2399	memset(&ScsiInquiryData, 0, sizeof(SCSIINQUIRYDATA));
2400	ScsiInquiryData.u5PeripheralDeviceType = SCSI_INQUIRY_DATA_PERIPHERAL_DEVICE_TYPE_UNKNOWN;
2401	ScsiInquiryData.u3PeripheralQualifier = SCSI_INQUIRY_DATA_PERIPHERAL_QUALIFIER_NOT_CONNECTED_NOT_SUPPORTED;
2402
2403	memcpy(pBusLogic->VBoxSCSI.pbBuf, &ScsiInquiryData, 5);
2404
2405	rc = vboxscsiRequestFinished(&pBusLogic->VBoxSCSI, &pTaskState->PDMScsiRequest, SCSI_STATUS_OK);
2406	AssertMsgRCReturn(rc, ("Finishing BIOS SCSI request failed rc=%Rrc\n", rc), rc);
2407
2408	RTMemCacheFree(pBusLogic->hTaskCache, pTaskState);
2409	}
2410	else
2411	{
2412	LogFlowFunc(("before increment %u\n", pTaskState->CTX_SUFF(pTargetDevice)->cOutstandingRequests));
2413	ASMAtomicIncU32(&pTaskState->CTX_SUFF(pTargetDevice)->cOutstandingRequests);
2414	LogFlowFunc(("after increment %u\n", pTaskState->CTX_SUFF(pTargetDevice)->cOutstandingRequests));
2415
2416	rc = pTaskState->CTX_SUFF(pTargetDevice)->pDrvSCSIConnector->pfnSCSIRequestSend(pTaskState->CTX_SUFF(pTargetDevice)->pDrvSCSIConnector,
2417	&pTaskState->PDMScsiRequest);
2418	AssertMsgRC(rc, ("Sending request to SCSI layer failed rc=%Rrc\n", rc));
2419	}
2420
2421	return rc;
2422	}
2423
2424
2425	/**
2426	* Port I/O Handler for IN operations - BIOS port.
2427	*
2428	* @returns VBox status code.
2429	*
2430	* @param pDevIns The device instance.
2431	* @param pvUser User argument.
2432	* @param uPort Port number used for the IN operation.
2433	* @param pu32 Where to store the result.
2434	* @param cb Number of bytes read.
2435	*/
2436	static DECLCALLBACK(int) buslogicR3BiosIoPortRead(PPDMDEVINS pDevIns, void pvUser, RTIOPORT Port, uint32_t pu32, unsigned cb)
2437	{
2438	int rc;
2439	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2440
2441	Assert(cb == 1);
2442
2443	rc = vboxscsiReadRegister(&pBusLogic->VBoxSCSI, (Port - BUSLOGIC_BIOS_IO_PORT), pu32);
2444
2445	//Log2(("%s: pu32=%p:{%.*Rhxs} iRegister=%d rc=%Rrc\n",
2446	// __FUNCTION__, pu32, 1, pu32, (Port - BUSLOGIC_BIOS_IO_PORT), rc));
2447
2448	return rc;
2449	}
2450
2451	/**
2452	* Port I/O Handler for OUT operations - BIOS port.
2453	*
2454	* @returns VBox status code.
2455	*
2456	* @param pDevIns The device instance.
2457	* @param pvUser User argument.
2458	* @param uPort Port number used for the IN operation.
2459	* @param u32 The value to output.
2460	* @param cb The value size in bytes.
2461	*/
2462	static DECLCALLBACK(int) buslogicR3BiosIoPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port, uint32_t u32, unsigned cb)
2463	{
2464	int rc;
2465	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2466
2467	Log2(("#%d %s: pvUser=%#p cb=%d u32=%#x Port=%#x\n",
2468	pDevIns->iInstance, __FUNCTION__, pvUser, cb, u32, Port));
2469
2470	Assert(cb == 1);
2471
2472	rc = vboxscsiWriteRegister(&pBusLogic->VBoxSCSI, (Port - BUSLOGIC_BIOS_IO_PORT), (uint8_t)u32);
2473	if (rc == VERR_MORE_DATA)
2474	{
2475	rc = buslogicR3PrepareBIOSSCSIRequest(pBusLogic);
2476	AssertRC(rc);
2477	}
2478	else if (RT_FAILURE(rc))
2479	AssertMsgFailed(("Writing BIOS register failed %Rrc\n", rc));
2480
2481	return VINF_SUCCESS;
2482	}
2483
2484	/**
2485	* Port I/O Handler for primary port range OUT string operations.
2486	* @see FNIOMIOPORTOUTSTRING for details.
2487	*/
2488	static DECLCALLBACK(int) buslogicR3BiosIoPortWriteStr(PPDMDEVINS pDevIns, void pvUser, RTIOPORT Port, RTGCPTR pGCPtrSrc,
2489	PRTGCUINTREG pcTransfer, unsigned cb)
2490	{
2491	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2492	int rc;
2493
2494	Log2(("#%d %s: pvUser=%#p cb=%d Port=%#x\n",
2495	pDevIns->iInstance, __FUNCTION__, pvUser, cb, Port));
2496
2497	rc = vboxscsiWriteString(pDevIns, &pBusLogic->VBoxSCSI, (Port - BUSLOGIC_BIOS_IO_PORT),
2498	pGCPtrSrc, pcTransfer, cb);
2499	if (rc == VERR_MORE_DATA)
2500	{
2501	rc = buslogicR3PrepareBIOSSCSIRequest(pBusLogic);
2502	AssertRC(rc);
2503	}
2504	else if (RT_FAILURE(rc))
2505	AssertMsgFailed(("Writing BIOS register failed %Rrc\n", rc));
2506
2507	return rc;
2508	}
2509
2510	/**
2511	* Port I/O Handler for primary port range IN string operations.
2512	* @see FNIOMIOPORTINSTRING for details.
2513	*/
2514	static DECLCALLBACK(int) buslogicR3BiosIoPortReadStr(PPDMDEVINS pDevIns, void pvUser, RTIOPORT Port, RTGCPTR pGCPtrDst,
2515	PRTGCUINTREG pcTransfer, unsigned cb)
2516	{
2517	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2518
2519	LogFlowFunc(("#%d %s: pvUser=%#p cb=%d Port=%#x\n",
2520	pDevIns->iInstance, __FUNCTION__, pvUser, cb, Port));
2521
2522	return vboxscsiReadString(pDevIns, &pBusLogic->VBoxSCSI, (Port - BUSLOGIC_BIOS_IO_PORT),
2523	pGCPtrDst, pcTransfer, cb);
2524	}
2525
2526	/**
2527	* Update the ISA I/O range.
2528	*
2529	* @returns nothing.
2530	* @param pBusLogic Pointer to the BusLogic device instance.
2531	* @param uBaseCode Encoded ISA I/O base; only low 3 bits are used.
2532	*/
2533	static int buslogicR3RegisterISARange(PBUSLOGIC pBusLogic, uint8_t uBaseCode)
2534	{
2535	uint8_t uCode = uBaseCode & MAX_ISA_BASE;
2536	uint16_t uNewBase = g_aISABases[uCode];
2537	int rc = VINF_SUCCESS;
2538
2539	LogFlowFunc(("ISA I/O code %02X, new base %X\n", uBaseCode, uNewBase));
2540
2541	/* Check if the same port range is already registered. */
2542	if (uNewBase != pBusLogic->IOISABase)
2543	{
2544	/* Unregister the old range, if any. */
2545	if (pBusLogic->IOISABase)
2546	rc = PDMDevHlpIOPortDeregister(pBusLogic->CTX_SUFF(pDevIns), pBusLogic->IOISABase, 4);
2547
2548	if (RT_SUCCESS(rc))
2549	{
2550	pBusLogic->IOISABase = 0; /* First mark as unregistered. */
2551	pBusLogic->uISABaseCode = ISA_BASE_DISABLED;
2552
2553	if (uNewBase)
2554	{
2555	/* Register the new range if requested. */
2556	rc = PDMDevHlpIOPortRegister(pBusLogic->CTX_SUFF(pDevIns), uNewBase, 4, NULL,
2557	buslogicIOPortWrite, buslogicIOPortRead,
2558	NULL, NULL,
2559	"BusLogic ISA");
2560	if (RT_SUCCESS(rc))
2561	{
2562	pBusLogic->IOISABase = uNewBase;
2563	pBusLogic->uISABaseCode = uCode;
2564	}
2565	}
2566	}
2567	if (RT_SUCCESS(rc))
2568	{
2569	if (uNewBase)
2570	{
2571	Log(("ISA I/O base: %x\n", uNewBase));
2572	LogRel(("BusLogic: ISA I/O base: %x\n", uNewBase));
2573	}
2574	else
2575	{
2576	Log(("Disabling ISA I/O ports.\n"));
2577	LogRel(("BusLogic: ISA I/O disabled\n"));
2578	}
2579	}
2580
2581	}
2582	return rc;
2583	}
2584
2585	static void buslogicR3WarningDiskFull(PPDMDEVINS pDevIns)
2586	{
2587	int rc;
2588	LogRel(("BusLogic#%d: Host disk full\n", pDevIns->iInstance));
2589	rc = PDMDevHlpVMSetRuntimeError(pDevIns, VMSETRTERR_FLAGS_SUSPEND \| VMSETRTERR_FLAGS_NO_WAIT, "DevBusLogic_DISKFULL",
2590	N_("Host system reported disk full. VM execution is suspended. You can resume after freeing some space"));
2591	AssertRC(rc);
2592	}
2593
2594	static void buslogicR3WarningFileTooBig(PPDMDEVINS pDevIns)
2595	{
2596	int rc;
2597	LogRel(("BusLogic#%d: File too big\n", pDevIns->iInstance));
2598	rc = PDMDevHlpVMSetRuntimeError(pDevIns, VMSETRTERR_FLAGS_SUSPEND \| VMSETRTERR_FLAGS_NO_WAIT, "DevBusLogic_FILETOOBIG",
2599	N_("Host system reported that the file size limit of the host file system has been exceeded. VM execution is suspended. You need to move your virtual hard disk to a filesystem which allows bigger files"));
2600	AssertRC(rc);
2601	}
2602
2603	static void buslogicR3WarningISCSI(PPDMDEVINS pDevIns)
2604	{
2605	int rc;
2606	LogRel(("BusLogic#%d: iSCSI target unavailable\n", pDevIns->iInstance));
2607	rc = PDMDevHlpVMSetRuntimeError(pDevIns, VMSETRTERR_FLAGS_SUSPEND \| VMSETRTERR_FLAGS_NO_WAIT, "DevBusLogic_ISCSIDOWN",
2608	N_("The iSCSI target has stopped responding. VM execution is suspended. You can resume when it is available again"));
2609	AssertRC(rc);
2610	}
2611
2612	static void buslogicR3WarningUnknown(PPDMDEVINS pDevIns, int rc)
2613	{
2614	int rc2;
2615	LogRel(("BusLogic#%d: Unknown but recoverable error has occurred (rc=%Rrc)\n", pDevIns->iInstance, rc));
2616	rc2 = PDMDevHlpVMSetRuntimeError(pDevIns, VMSETRTERR_FLAGS_SUSPEND \| VMSETRTERR_FLAGS_NO_WAIT, "DevBusLogic_UNKNOWN",
2617	N_("An unknown but recoverable I/O error has occurred (rc=%Rrc). VM execution is suspended. You can resume when the error is fixed"), rc);
2618	AssertRC(rc2);
2619	}
2620
2621	static void buslogicR3RedoSetWarning(PBUSLOGIC pThis, int rc)
2622	{
2623	if (rc == VERR_DISK_FULL)
2624	buslogicR3WarningDiskFull(pThis->CTX_SUFF(pDevIns));
2625	else if (rc == VERR_FILE_TOO_BIG)
2626	buslogicR3WarningFileTooBig(pThis->CTX_SUFF(pDevIns));
2627	else if (rc == VERR_BROKEN_PIPE \|\| rc == VERR_NET_CONNECTION_REFUSED)
2628	{
2629	/* iSCSI connection abort (first error) or failure to reestablish
2630	* connection (second error). Pause VM. On resume we'll retry. */
2631	buslogicR3WarningISCSI(pThis->CTX_SUFF(pDevIns));
2632	}
2633	else
2634	buslogicR3WarningUnknown(pThis->CTX_SUFF(pDevIns), rc);
2635	}
2636
2637
2638	static DECLCALLBACK(int) buslogicR3MmioMap(PPCIDEVICE pPciDev, /unsigned/ int iRegion,
2639	RTGCPHYS GCPhysAddress, uint32_t cb, PCIADDRESSSPACE enmType)
2640	{
2641	PPDMDEVINS pDevIns = pPciDev->pDevIns;
2642	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2643	int rc = VINF_SUCCESS;
2644
2645	Log2(("%s: registering MMIO area at GCPhysAddr=%RGp cb=%u\n", __FUNCTION__, GCPhysAddress, cb));
2646
2647	Assert(cb >= 32);
2648
2649	if (enmType == PCI_ADDRESS_SPACE_MEM)
2650	{
2651	/* We use the assigned size here, because we currently only support page aligned MMIO ranges. */
2652	rc = PDMDevHlpMMIORegister(pDevIns, GCPhysAddress, cb, NULL /pvUser/,
2653	IOMMMIO_FLAGS_READ_PASSTHRU \| IOMMMIO_FLAGS_WRITE_PASSTHRU,
2654	buslogicMMIOWrite, buslogicMMIORead, "BusLogic MMIO");
2655	if (RT_FAILURE(rc))
2656	return rc;
2657
2658	if (pThis->fR0Enabled)
2659	{
2660	rc = PDMDevHlpMMIORegisterR0(pDevIns, GCPhysAddress, cb, NIL_RTR0PTR /pvUser/,
2661	"buslogicMMIOWrite", "buslogicMMIORead");
2662	if (RT_FAILURE(rc))
2663	return rc;
2664	}
2665
2666	if (pThis->fGCEnabled)
2667	{
2668	rc = PDMDevHlpMMIORegisterRC(pDevIns, GCPhysAddress, cb, NIL_RTRCPTR /pvUser/,
2669	"buslogicMMIOWrite", "buslogicMMIORead");
2670	if (RT_FAILURE(rc))
2671	return rc;
2672	}
2673
2674	pThis->MMIOBase = GCPhysAddress;
2675	}
2676	else if (enmType == PCI_ADDRESS_SPACE_IO)
2677	{
2678	rc = PDMDevHlpIOPortRegister(pDevIns, (RTIOPORT)GCPhysAddress, 32,
2679	NULL, buslogicIOPortWrite, buslogicIOPortRead, NULL, NULL, "BusLogic PCI");
2680	if (RT_FAILURE(rc))
2681	return rc;
2682
2683	if (pThis->fR0Enabled)
2684	{
2685	rc = PDMDevHlpIOPortRegisterR0(pDevIns, (RTIOPORT)GCPhysAddress, 32,
2686	0, "buslogicIOPortWrite", "buslogicIOPortRead", NULL, NULL, "BusLogic PCI");
2687	if (RT_FAILURE(rc))
2688	return rc;
2689	}
2690
2691	if (pThis->fGCEnabled)
2692	{
2693	rc = PDMDevHlpIOPortRegisterRC(pDevIns, (RTIOPORT)GCPhysAddress, 32,
2694	0, "buslogicIOPortWrite", "buslogicIOPortRead", NULL, NULL, "BusLogic PCI");
2695	if (RT_FAILURE(rc))
2696	return rc;
2697	}
2698
2699	pThis->IOPortBase = (RTIOPORT)GCPhysAddress;
2700	}
2701	else
2702	AssertMsgFailed(("Invalid enmType=%d\n", enmType));
2703
2704	return rc;
2705	}
2706
2707	static DECLCALLBACK(int) buslogicR3DeviceSCSIRequestCompleted(PPDMISCSIPORT pInterface, PPDMSCSIREQUEST pSCSIRequest,
2708	int rcCompletion, bool fRedo, int rcReq)
2709	{
2710	int rc;
2711	PBUSLOGICTASKSTATE pTaskState = (PBUSLOGICTASKSTATE)pSCSIRequest->pvUser;
2712	PBUSLOGICDEVICE pBusLogicDevice = pTaskState->CTX_SUFF(pTargetDevice);
2713	PBUSLOGIC pBusLogic = pBusLogicDevice->CTX_SUFF(pBusLogic);
2714
2715	LogFlowFunc(("before decrement %u\n", pBusLogicDevice->cOutstandingRequests));
2716	ASMAtomicDecU32(&pBusLogicDevice->cOutstandingRequests);
2717	LogFlowFunc(("after decrement %u\n", pBusLogicDevice->cOutstandingRequests));
2718
2719	if (fRedo)
2720	{
2721	if (!pTaskState->fBIOS)
2722	{
2723	buslogicR3DataBufferFree(pTaskState);
2724
2725	if (pTaskState->pbSenseBuffer)
2726	buslogicR3SenseBufferFree(pTaskState, false /* fCopy */);
2727	}
2728
2729	/* Add to the list. */
2730	do
2731	{
2732	pTaskState->pRedoNext = ASMAtomicReadPtrT(&pBusLogic->pTasksRedoHead, PBUSLOGICTASKSTATE);
2733	} while (!ASMAtomicCmpXchgPtr(&pBusLogic->pTasksRedoHead, pTaskState, pTaskState->pRedoNext));
2734
2735	/* Suspend the VM if not done already. */
2736	if (!ASMAtomicXchgBool(&pBusLogic->fRedo, true))
2737	buslogicR3RedoSetWarning(pBusLogic, rcReq);
2738	}
2739	else
2740	{
2741	if (pTaskState->fBIOS)
2742	{
2743	rc = vboxscsiRequestFinished(&pBusLogic->VBoxSCSI, pSCSIRequest, rcCompletion);
2744	AssertMsgRC(rc, ("Finishing BIOS SCSI request failed rc=%Rrc\n", rc));
2745	}
2746	else
2747	{
2748	buslogicR3DataBufferFree(pTaskState);
2749
2750	if (pTaskState->pbSenseBuffer)
2751	buslogicR3SenseBufferFree(pTaskState, (rcCompletion != SCSI_STATUS_OK));
2752
2753	if (rcCompletion == SCSI_STATUS_OK)
2754	buslogicR3SendIncomingMailbox(pBusLogic, pTaskState,
2755	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_CMD_COMPLETED,
2756	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
2757	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITHOUT_ERROR);
2758	else if (rcCompletion == SCSI_STATUS_CHECK_CONDITION)
2759	buslogicR3SendIncomingMailbox(pBusLogic, pTaskState,
2760	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_CMD_COMPLETED,
2761	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_CHECK_CONDITION,
2762	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR);
2763	else
2764	AssertMsgFailed(("invalid completion status %d\n", rcCompletion));
2765	}
2766	#ifdef LOG_ENABLED
2767	buslogicR3DumpCCBInfo(&pTaskState->CommandControlBlockGuest, pTaskState->fIs24Bit);
2768	#endif
2769
2770	/* Remove task from the cache. */
2771	RTMemCacheFree(pBusLogic->hTaskCache, pTaskState);
2772	}
2773
2774	if (pBusLogicDevice->cOutstandingRequests == 0 && pBusLogic->fSignalIdle)
2775	PDMDevHlpAsyncNotificationCompleted(pBusLogic->pDevInsR3);
2776
2777	return VINF_SUCCESS;
2778	}
2779
2780	static DECLCALLBACK(int) buslogicR3QueryDeviceLocation(PPDMISCSIPORT pInterface, const char **ppcszController,
2781	uint32_t piInstance, uint32_t piLUN)
2782	{
2783	PBUSLOGICDEVICE pBusLogicDevice = PDMISCSIPORT_2_PBUSLOGICDEVICE(pInterface);
2784	PPDMDEVINS pDevIns = pBusLogicDevice->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns);
2785
2786	AssertPtrReturn(ppcszController, VERR_INVALID_POINTER);
2787	AssertPtrReturn(piInstance, VERR_INVALID_POINTER);
2788	AssertPtrReturn(piLUN, VERR_INVALID_POINTER);
2789
2790	*ppcszController = pDevIns->pReg->szName;
2791	*piInstance = pDevIns->iInstance;
2792	*piLUN = pBusLogicDevice->iLUN;
2793
2794	return VINF_SUCCESS;
2795	}
2796
2797	static int buslogicR3DeviceSCSIRequestSetup(PBUSLOGIC pBusLogic, PBUSLOGICTASKSTATE pTaskState)
2798	{
2799	int rc = VINF_SUCCESS;
2800	uint8_t uTargetIdCCB;
2801	PBUSLOGICDEVICE pTargetDevice;
2802
2803	/* Fetch the CCB from guest memory. */
2804	/** @todo How much do we really have to read? */
2805	RTGCPHYS GCPhysAddrCCB = (RTGCPHYS)pTaskState->MailboxGuest.u32PhysAddrCCB;
2806	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrCCB,
2807	&pTaskState->CommandControlBlockGuest, sizeof(CCB32));
2808
2809	uTargetIdCCB = pTaskState->fIs24Bit ? pTaskState->CommandControlBlockGuest.o.uTargetId : pTaskState->CommandControlBlockGuest.n.uTargetId;
2810	pTargetDevice = &pBusLogic->aDeviceStates[uTargetIdCCB];
2811	pTaskState->CTX_SUFF(pTargetDevice) = pTargetDevice;
2812
2813	#ifdef LOG_ENABLED
2814	buslogicR3DumpCCBInfo(&pTaskState->CommandControlBlockGuest, pTaskState->fIs24Bit);
2815	#endif
2816
2817	/* Alloc required buffers. */
2818	rc = buslogicR3DataBufferAlloc(pTaskState);
2819	AssertMsgRC(rc, ("Alloc failed rc=%Rrc\n", rc));
2820
2821	rc = buslogicR3SenseBufferAlloc(pTaskState);
2822	AssertMsgRC(rc, ("Mapping sense buffer failed rc=%Rrc\n", rc));
2823
2824	/* Check if device is present on bus. If not return error immediately and don't process this further. */
2825	if (!pBusLogic->aDeviceStates[uTargetIdCCB].fPresent)
2826	{
2827	buslogicR3DataBufferFree(pTaskState);
2828
2829	if (pTaskState->pbSenseBuffer)
2830	buslogicR3SenseBufferFree(pTaskState, true);
2831
2832	buslogicR3SendIncomingMailbox(pBusLogic, pTaskState,
2833	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_SCSI_SELECTION_TIMEOUT,
2834	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
2835	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR);
2836
2837	RTMemCacheFree(pBusLogic->hTaskCache, pTaskState);
2838	}
2839	else
2840	{
2841	/* Setup SCSI request. */
2842	pTaskState->PDMScsiRequest.uLogicalUnit = pTaskState->fIs24Bit ? pTaskState->CommandControlBlockGuest.o.uLogicalUnit
2843	: pTaskState->CommandControlBlockGuest.n.uLogicalUnit;
2844
2845	if (pTaskState->CommandControlBlockGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_UNKNOWN)
2846	pTaskState->PDMScsiRequest.uDataDirection = PDMSCSIREQUESTTXDIR_UNKNOWN;
2847	else if (pTaskState->CommandControlBlockGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_IN)
2848	pTaskState->PDMScsiRequest.uDataDirection = PDMSCSIREQUESTTXDIR_FROM_DEVICE;
2849	else if (pTaskState->CommandControlBlockGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_OUT)
2850	pTaskState->PDMScsiRequest.uDataDirection = PDMSCSIREQUESTTXDIR_TO_DEVICE;
2851	else if (pTaskState->CommandControlBlockGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_NO_DATA)
2852	pTaskState->PDMScsiRequest.uDataDirection = PDMSCSIREQUESTTXDIR_NONE;
2853	else
2854	AssertMsgFailed(("Invalid data direction type %d\n", pTaskState->CommandControlBlockGuest.c.uDataDirection));
2855
2856	pTaskState->PDMScsiRequest.cbCDB = pTaskState->CommandControlBlockGuest.c.cbCDB;
2857	pTaskState->PDMScsiRequest.pbCDB = pTaskState->CommandControlBlockGuest.c.abCDB;
2858	if (pTaskState->DataSeg.cbSeg)
2859	{
2860	pTaskState->PDMScsiRequest.cbScatterGather = pTaskState->DataSeg.cbSeg;
2861	pTaskState->PDMScsiRequest.cScatterGatherEntries = 1;
2862	pTaskState->PDMScsiRequest.paScatterGatherHead = &pTaskState->DataSeg;
2863	}
2864	else
2865	{
2866	pTaskState->PDMScsiRequest.cbScatterGather = 0;
2867	pTaskState->PDMScsiRequest.cScatterGatherEntries = 0;
2868	pTaskState->PDMScsiRequest.paScatterGatherHead = NULL;
2869	}
2870	pTaskState->PDMScsiRequest.cbSenseBuffer = buslogicR3ConvertSenseBufferLength(pTaskState->CommandControlBlockGuest.c.cbSenseData);
2871	pTaskState->PDMScsiRequest.pbSenseBuffer = pTaskState->pbSenseBuffer;
2872	pTaskState->PDMScsiRequest.pvUser = pTaskState;
2873
2874	ASMAtomicIncU32(&pTargetDevice->cOutstandingRequests);
2875	rc = pTargetDevice->pDrvSCSIConnector->pfnSCSIRequestSend(pTargetDevice->pDrvSCSIConnector, &pTaskState->PDMScsiRequest);
2876	AssertMsgRC(rc, ("Sending request to SCSI layer failed rc=%Rrc\n", rc));
2877	}
2878
2879	return rc;
2880	}
2881
2882	/**
2883	* Read a mailbox from guest memory. Convert 24-bit mailboxes to
2884	* 32-bit format.
2885	*
2886	* @returns Mailbox guest physical address.
2887	* @param pBusLogic Pointer to the BusLogic instance data.
2888	* @param pTaskStat Pointer to the task state being set up.
2889	*/
2890	static RTGCPHYS buslogicR3ReadOutgoingMailbox(PBUSLOGIC pBusLogic, PBUSLOGICTASKSTATE pTaskState)
2891	{
2892	RTGCPHYS GCMailbox;
2893
2894	if (pBusLogic->fMbxIs24Bit)
2895	{
2896	Mailbox24 Mbx24;
2897
2898	GCMailbox = pBusLogic->GCPhysAddrMailboxOutgoingBase + (pBusLogic->uMailboxOutgoingPositionCurrent * sizeof(Mailbox24));
2899	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCMailbox, &Mbx24, sizeof(Mailbox24));
2900	pTaskState->MailboxGuest.u32PhysAddrCCB = ADDR_TO_U32(Mbx24.aPhysAddrCCB);
2901	pTaskState->MailboxGuest.u.out.uActionCode = Mbx24.uCmdState;
2902	}
2903	else
2904	{
2905	GCMailbox = pBusLogic->GCPhysAddrMailboxOutgoingBase + (pBusLogic->uMailboxOutgoingPositionCurrent * sizeof(Mailbox32));
2906	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCMailbox, &pTaskState->MailboxGuest, sizeof(Mailbox32));
2907	}
2908
2909	return GCMailbox;
2910	}
2911
2912	/**
2913	* Read mailbox from the guest and execute command.
2914	*
2915	* @returns VBox status code.
2916	* @param pBusLogic Pointer to the BusLogic instance data.
2917	*/
2918	static int buslogicR3ProcessMailboxNext(PBUSLOGIC pBusLogic)
2919	{
2920	PBUSLOGICTASKSTATE pTaskState = NULL;
2921	RTGCPHYS GCPhysAddrMailboxCurrent;
2922	int rc;
2923
2924	rc = RTMemCacheAllocEx(pBusLogic->hTaskCache, (void **)&pTaskState);
2925	AssertMsgReturn(RT_SUCCESS(rc) && (pTaskState != NULL), ("Failed to get task state from cache\n"), rc);
2926
2927	pTaskState->fBIOS = false;
2928	pTaskState->fIs24Bit = pBusLogic->fMbxIs24Bit;
2929	pTaskState->cbSGEntry = pBusLogic->fMbxIs24Bit ? sizeof(SGE24) : sizeof(SGE32);
2930
2931	if (!pBusLogic->fStrictRoundRobinMode)
2932	{
2933	/* Search for a filled mailbox - stop if we have scanned all mailboxes. */
2934	uint8_t uMailboxPosCur = pBusLogic->uMailboxOutgoingPositionCurrent;
2935
2936	do
2937	{
2938	/* Fetch mailbox from guest memory. */
2939	GCPhysAddrMailboxCurrent = buslogicR3ReadOutgoingMailbox(pBusLogic,pTaskState);
2940
2941	/* Check the next mailbox. */
2942	buslogicR3OutgoingMailboxAdvance(pBusLogic);
2943	} while ( pTaskState->MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE
2944	&& uMailboxPosCur != pBusLogic->uMailboxOutgoingPositionCurrent);
2945	}
2946	else
2947	{
2948	/* Fetch mailbox from guest memory. */
2949	GCPhysAddrMailboxCurrent = buslogicR3ReadOutgoingMailbox(pBusLogic,pTaskState);
2950	}
2951
2952	/*
2953	* Check if the mailbox is actually loaded.
2954	* It might be possible that the guest notified us without
2955	* a loaded mailbox. Do nothing in that case but leave a
2956	* log entry.
2957	*/
2958	if (pTaskState->MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE)
2959	{
2960	Log(("No loaded mailbox left\n"));
2961	RTMemCacheFree(pBusLogic->hTaskCache, pTaskState);
2962	return VERR_NO_DATA;
2963	}
2964
2965	LogFlow(("Got loaded mailbox at slot %u, CCB phys %RGp\n", pBusLogic->uMailboxOutgoingPositionCurrent, (RTGCPHYS)pTaskState->MailboxGuest.u32PhysAddrCCB));
2966	#ifdef LOG_ENABLED
2967	buslogicR3DumpMailboxInfo(&pTaskState->MailboxGuest, true);
2968	#endif
2969
2970	/* We got the mailbox, mark it as free in the guest. */
2971	uint8_t uActionCode = BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE;
2972	unsigned uCodeOffs = pTaskState->fIs24Bit ? RT_OFFSETOF(Mailbox24, uCmdState) : RT_OFFSETOF(Mailbox32, u.out.uActionCode);
2973	PDMDevHlpPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxCurrent + uCodeOffs, &uActionCode, sizeof(uActionCode));
2974
2975	if (pTaskState->MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_START_COMMAND)
2976	rc = buslogicR3DeviceSCSIRequestSetup(pBusLogic, pTaskState);
2977	else if (pTaskState->MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_ABORT_COMMAND)
2978	{
2979	AssertMsgFailed(("Not implemented yet\n"));
2980	}
2981	else
2982	AssertMsgFailed(("Invalid outgoing mailbox action code %u\n", pTaskState->MailboxGuest.u.out.uActionCode));
2983
2984	AssertRC(rc);
2985
2986	/* Advance to the next mailbox. */
2987	if (pBusLogic->fStrictRoundRobinMode)
2988	buslogicR3OutgoingMailboxAdvance(pBusLogic);
2989
2990	return rc;
2991	}
2992
2993	/**
2994	* Transmit queue consumer
2995	* Queue a new async task.
2996	*
2997	* @returns Success indicator.
2998	* If false the item will not be removed and the flushing will stop.
2999	* @param pDevIns The device instance.
3000	* @param pItem The item to consume. Upon return this item will be freed.
3001	*/
3002	static DECLCALLBACK(bool) buslogicR3NotifyQueueConsumer(PPDMDEVINS pDevIns, PPDMQUEUEITEMCORE pItem)
3003	{
3004	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3005
3006	/* Reset notification send flag now. */
3007	Assert(pBusLogic->fNotificationSend);
3008	ASMAtomicXchgBool(&pBusLogic->fNotificationSend, false);
3009	ASMAtomicXchgU32(&pBusLogic->cMailboxesReady, 0); /** @todo Actually not required anymore but to stay compatible with older saved states. */
3010
3011	/* Process mailboxes. */
3012	int rc;
3013	do
3014	{
3015	rc = buslogicR3ProcessMailboxNext(pBusLogic);
3016	AssertMsg(RT_SUCCESS(rc) \|\| rc == VERR_NO_DATA, ("Processing mailbox failed rc=%Rrc\n", rc));
3017	} while (RT_SUCCESS(rc));
3018
3019	return true;
3020	}
3021
3022	/**
3023	* Kicks the controller to process pending tasks after the VM was resumed
3024	* or loaded from a saved state.
3025	*
3026	* @returns nothing.
3027	* @param pThis The BusLogic device instance.
3028	*/
3029	static void buslogicR3Kick(PBUSLOGIC pThis)
3030	{
3031	if (pThis->fRedo)
3032	{
3033	pThis->fRedo = false;
3034	if (pThis->VBoxSCSI.fBusy)
3035	{
3036
3037	/* The BIOS had a request active when we got suspended. Resume it. */
3038	int rc = buslogicR3PrepareBIOSSCSIRequest(pThis);
3039	AssertRC(rc);
3040	}
3041	else
3042	{
3043	/* Queue all pending tasks again. */
3044	PBUSLOGICTASKSTATE pTaskState = pThis->pTasksRedoHead;
3045
3046	pThis->pTasksRedoHead = NULL;
3047
3048	while (pTaskState)
3049	{
3050	PBUSLOGICTASKSTATE pCur = pTaskState;
3051
3052	int rc = buslogicR3DeviceSCSIRequestSetup(pThis, pCur);
3053	AssertRC(rc);
3054
3055	pTaskState = pTaskState->pRedoNext;
3056	}
3057	}
3058	}
3059	}
3060
3061	/** @callback_method_impl{FNSSMDEVLIVEEXEC} */
3062	static DECLCALLBACK(int) buslogicR3LiveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uPass)
3063	{
3064	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3065
3066	/* Save the device config. */
3067	for (unsigned i = 0; i < RT_ELEMENTS(pThis->aDeviceStates); i++)
3068	SSMR3PutBool(pSSM, pThis->aDeviceStates[i].fPresent);
3069
3070	return VINF_SSM_DONT_CALL_AGAIN;
3071	}
3072
3073	/** @callback_method_impl{FNSSMDEVSAVEEXEC} */
3074	static DECLCALLBACK(int) buslogicR3SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
3075	{
3076	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3077
3078	/* Every device first. */
3079	for (unsigned i = 0; i < RT_ELEMENTS(pBusLogic->aDeviceStates); i++)
3080	{
3081	PBUSLOGICDEVICE pDevice = &pBusLogic->aDeviceStates[i];
3082
3083	AssertMsg(!pDevice->cOutstandingRequests,
3084	("There are still outstanding requests on this device\n"));
3085	SSMR3PutBool(pSSM, pDevice->fPresent);
3086	SSMR3PutU32(pSSM, pDevice->cOutstandingRequests);
3087	}
3088	/* Now the main device state. */
3089	SSMR3PutU8 (pSSM, pBusLogic->regStatus);
3090	SSMR3PutU8 (pSSM, pBusLogic->regInterrupt);
3091	SSMR3PutU8 (pSSM, pBusLogic->regGeometry);
3092	SSMR3PutMem (pSSM, &pBusLogic->LocalRam, sizeof(pBusLogic->LocalRam));
3093	SSMR3PutU8 (pSSM, pBusLogic->uOperationCode);
3094	SSMR3PutMem (pSSM, &pBusLogic->aCommandBuffer, sizeof(pBusLogic->aCommandBuffer));
3095	SSMR3PutU8 (pSSM, pBusLogic->iParameter);
3096	SSMR3PutU8 (pSSM, pBusLogic->cbCommandParametersLeft);
3097	SSMR3PutBool (pSSM, pBusLogic->fUseLocalRam);
3098	SSMR3PutMem (pSSM, pBusLogic->aReplyBuffer, sizeof(pBusLogic->aReplyBuffer));
3099	SSMR3PutU8 (pSSM, pBusLogic->iReply);
3100	SSMR3PutU8 (pSSM, pBusLogic->cbReplyParametersLeft);
3101	SSMR3PutBool (pSSM, pBusLogic->fIRQEnabled);
3102	SSMR3PutU8 (pSSM, pBusLogic->uISABaseCode);
3103	SSMR3PutU32 (pSSM, pBusLogic->cMailbox);
3104	SSMR3PutBool (pSSM, pBusLogic->fMbxIs24Bit);
3105	SSMR3PutGCPhys(pSSM, pBusLogic->GCPhysAddrMailboxOutgoingBase);
3106	SSMR3PutU32 (pSSM, pBusLogic->uMailboxOutgoingPositionCurrent);
3107	SSMR3PutU32 (pSSM, pBusLogic->cMailboxesReady);
3108	SSMR3PutBool (pSSM, pBusLogic->fNotificationSend);
3109	SSMR3PutGCPhys(pSSM, pBusLogic->GCPhysAddrMailboxIncomingBase);
3110	SSMR3PutU32 (pSSM, pBusLogic->uMailboxIncomingPositionCurrent);
3111	SSMR3PutBool (pSSM, pBusLogic->fStrictRoundRobinMode);
3112	SSMR3PutBool (pSSM, pBusLogic->fExtendedLunCCBFormat);
3113	/* Now the data for the BIOS interface. */
3114	SSMR3PutU8 (pSSM, pBusLogic->VBoxSCSI.regIdentify);
3115	SSMR3PutU8 (pSSM, pBusLogic->VBoxSCSI.uTargetDevice);
3116	SSMR3PutU8 (pSSM, pBusLogic->VBoxSCSI.uTxDir);
3117	SSMR3PutU8 (pSSM, pBusLogic->VBoxSCSI.cbCDB);
3118	SSMR3PutMem (pSSM, pBusLogic->VBoxSCSI.abCDB, sizeof(pBusLogic->VBoxSCSI.abCDB));
3119	SSMR3PutU8 (pSSM, pBusLogic->VBoxSCSI.iCDB);
3120	SSMR3PutU32 (pSSM, pBusLogic->VBoxSCSI.cbBuf);
3121	SSMR3PutU32 (pSSM, pBusLogic->VBoxSCSI.iBuf);
3122	SSMR3PutBool (pSSM, pBusLogic->VBoxSCSI.fBusy);
3123	SSMR3PutU8 (pSSM, pBusLogic->VBoxSCSI.enmState);
3124	if (pBusLogic->VBoxSCSI.cbBuf)
3125	SSMR3PutMem(pSSM, pBusLogic->VBoxSCSI.pbBuf, pBusLogic->VBoxSCSI.cbBuf);
3126
3127	/*
3128	* Save the physical addresses of the command control blocks of still pending tasks.
3129	* They are processed again on resume.
3130	*
3131	* The number of pending tasks needs to be determined first.
3132	*/
3133	uint32_t cTasks = 0;
3134
3135	PBUSLOGICTASKSTATE pTaskState = pBusLogic->pTasksRedoHead;
3136	if (pBusLogic->fRedo)
3137	{
3138	while (pTaskState)
3139	{
3140	cTasks++;
3141	pTaskState = pTaskState->pRedoNext;
3142	}
3143	}
3144	SSMR3PutU32(pSSM, cTasks);
3145
3146	/* Write the address of every task now. */
3147	pTaskState = pBusLogic->pTasksRedoHead;
3148	while (pTaskState)
3149	{
3150	SSMR3PutU32(pSSM, pTaskState->MailboxGuest.u32PhysAddrCCB);
3151	pTaskState = pTaskState->pRedoNext;
3152	}
3153
3154	return SSMR3PutU32(pSSM, ~0);
3155	}
3156
3157	/** @callback_method_impl{FNSSMDEVLOADDONE} */
3158	static DECLCALLBACK(int) buslogicR3LoadDone(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
3159	{
3160	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3161
3162	buslogicR3RegisterISARange(pThis, pThis->uISABaseCode);
3163	buslogicR3Kick(pThis);
3164	return VINF_SUCCESS;
3165	}
3166
3167	/** @callback_method_impl{FNSSMDEVLOADEXEC} */
3168	static DECLCALLBACK(int) buslogicR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
3169	{
3170	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3171	int rc = VINF_SUCCESS;
3172
3173	/* We support saved states only from this and older versions. */
3174	if (uVersion > BUSLOGIC_SAVED_STATE_MINOR_VERSION)
3175	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
3176
3177	/* Every device first. */
3178	for (unsigned i = 0; i < RT_ELEMENTS(pBusLogic->aDeviceStates); i++)
3179	{
3180	PBUSLOGICDEVICE pDevice = &pBusLogic->aDeviceStates[i];
3181
3182	AssertMsg(!pDevice->cOutstandingRequests,
3183	("There are still outstanding requests on this device\n"));
3184	bool fPresent;
3185	rc = SSMR3GetBool(pSSM, &fPresent);
3186	AssertRCReturn(rc, rc);
3187	if (pDevice->fPresent != fPresent)
3188	return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Target %u config mismatch: config=%RTbool state=%RTbool"), i, pDevice->fPresent, fPresent);
3189
3190	if (uPass == SSM_PASS_FINAL)
3191	SSMR3GetU32(pSSM, (uint32_t *)&pDevice->cOutstandingRequests);
3192	}
3193
3194	if (uPass != SSM_PASS_FINAL)
3195	return VINF_SUCCESS;
3196
3197	/* Now the main device state. */
3198	SSMR3GetU8 (pSSM, (uint8_t *)&pBusLogic->regStatus);
3199	SSMR3GetU8 (pSSM, (uint8_t *)&pBusLogic->regInterrupt);
3200	SSMR3GetU8 (pSSM, (uint8_t *)&pBusLogic->regGeometry);
3201	SSMR3GetMem (pSSM, &pBusLogic->LocalRam, sizeof(pBusLogic->LocalRam));
3202	SSMR3GetU8 (pSSM, &pBusLogic->uOperationCode);
3203	SSMR3GetMem (pSSM, &pBusLogic->aCommandBuffer, sizeof(pBusLogic->aCommandBuffer));
3204	SSMR3GetU8 (pSSM, &pBusLogic->iParameter);
3205	SSMR3GetU8 (pSSM, &pBusLogic->cbCommandParametersLeft);
3206	SSMR3GetBool (pSSM, &pBusLogic->fUseLocalRam);
3207	SSMR3GetMem (pSSM, pBusLogic->aReplyBuffer, sizeof(pBusLogic->aReplyBuffer));
3208	SSMR3GetU8 (pSSM, &pBusLogic->iReply);
3209	SSMR3GetU8 (pSSM, &pBusLogic->cbReplyParametersLeft);
3210	SSMR3GetBool (pSSM, &pBusLogic->fIRQEnabled);
3211	SSMR3GetU8 (pSSM, &pBusLogic->uISABaseCode);
3212	SSMR3GetU32 (pSSM, &pBusLogic->cMailbox);
3213	if (uVersion > BUSLOGIC_SAVED_STATE_MINOR_PRE_24BIT_MBOX)
3214	SSMR3GetBool (pSSM, &pBusLogic->fMbxIs24Bit);
3215	SSMR3GetGCPhys(pSSM, &pBusLogic->GCPhysAddrMailboxOutgoingBase);
3216	SSMR3GetU32 (pSSM, &pBusLogic->uMailboxOutgoingPositionCurrent);
3217	SSMR3GetU32 (pSSM, (uint32_t *)&pBusLogic->cMailboxesReady);
3218	SSMR3GetBool (pSSM, (bool *)&pBusLogic->fNotificationSend);
3219	SSMR3GetGCPhys(pSSM, &pBusLogic->GCPhysAddrMailboxIncomingBase);
3220	SSMR3GetU32 (pSSM, &pBusLogic->uMailboxIncomingPositionCurrent);
3221	SSMR3GetBool (pSSM, &pBusLogic->fStrictRoundRobinMode);
3222	SSMR3GetBool (pSSM, &pBusLogic->fExtendedLunCCBFormat);
3223	/* Now the data for the BIOS interface. */
3224	SSMR3GetU8 (pSSM, &pBusLogic->VBoxSCSI.regIdentify);
3225	SSMR3GetU8 (pSSM, &pBusLogic->VBoxSCSI.uTargetDevice);
3226	SSMR3GetU8 (pSSM, &pBusLogic->VBoxSCSI.uTxDir);
3227	SSMR3GetU8 (pSSM, &pBusLogic->VBoxSCSI.cbCDB);
3228	SSMR3GetMem (pSSM, pBusLogic->VBoxSCSI.abCDB, sizeof(pBusLogic->VBoxSCSI.abCDB));
3229	SSMR3GetU8 (pSSM, &pBusLogic->VBoxSCSI.iCDB);
3230	SSMR3GetU32 (pSSM, &pBusLogic->VBoxSCSI.cbBuf);
3231	SSMR3GetU32 (pSSM, &pBusLogic->VBoxSCSI.iBuf);
3232	SSMR3GetBool(pSSM, (bool *)&pBusLogic->VBoxSCSI.fBusy);
3233	SSMR3GetU8 (pSSM, (uint8_t *)&pBusLogic->VBoxSCSI.enmState);
3234	if (pBusLogic->VBoxSCSI.cbBuf)
3235	{
3236	pBusLogic->VBoxSCSI.pbBuf = (uint8_t *)RTMemAllocZ(pBusLogic->VBoxSCSI.cbBuf);
3237	if (!pBusLogic->VBoxSCSI.pbBuf)
3238	{
3239	LogRel(("BusLogic: Out of memory during restore.\n"));
3240	return PDMDEV_SET_ERROR(pDevIns, VERR_NO_MEMORY,
3241	N_("BusLogic: Out of memory during restore\n"));
3242	}
3243	SSMR3GetMem(pSSM, pBusLogic->VBoxSCSI.pbBuf, pBusLogic->VBoxSCSI.cbBuf);
3244	}
3245
3246	if (pBusLogic->VBoxSCSI.fBusy)
3247	pBusLogic->fRedo = true;
3248
3249	if (uVersion > BUSLOGIC_SAVED_STATE_MINOR_PRE_ERROR_HANDLING)
3250	{
3251	/* Check if there are pending tasks saved. */
3252	uint32_t cTasks = 0;
3253
3254	SSMR3GetU32(pSSM, &cTasks);
3255
3256	if (cTasks)
3257	pBusLogic->fRedo = true;
3258
3259	for (uint32_t i = 0; i < cTasks; i++)
3260	{
3261	PBUSLOGICTASKSTATE pTaskState = (PBUSLOGICTASKSTATE)RTMemCacheAlloc(pBusLogic->hTaskCache);
3262	if (!pTaskState)
3263	{
3264	rc = VERR_NO_MEMORY;
3265	break;
3266	}
3267
3268	rc = SSMR3GetU32(pSSM, &pTaskState->MailboxGuest.u32PhysAddrCCB);
3269	if (RT_FAILURE(rc))
3270	{
3271	RTMemCacheFree(pBusLogic->hTaskCache, pTaskState);
3272	break;
3273	}
3274
3275	/* Link into the list. */
3276	pTaskState->pRedoNext = pBusLogic->pTasksRedoHead;
3277	pBusLogic->pTasksRedoHead = pTaskState;
3278	}
3279	}
3280
3281	if (RT_SUCCESS(rc))
3282	{
3283	uint32_t u32;
3284	rc = SSMR3GetU32(pSSM, &u32);
3285	if (RT_SUCCESS(rc))
3286	AssertMsgReturn(u32 == ~0U, ("%#x\n", u32), VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
3287	}
3288
3289	return rc;
3290	}
3291
3292	/**
3293	* Gets the pointer to the status LED of a device - called from the SCSI driver.
3294	*
3295	* @returns VBox status code.
3296	* @param pInterface Pointer to the interface structure containing the called function pointer.
3297	* @param iLUN The unit which status LED we desire. Always 0 here as the driver
3298	* doesn't know about other LUN's.
3299	* @param ppLed Where to store the LED pointer.
3300	*/
3301	static DECLCALLBACK(int) buslogicR3DeviceQueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed)
3302	{
3303	PBUSLOGICDEVICE pDevice = PDMILEDPORTS_2_PBUSLOGICDEVICE(pInterface);
3304	if (iLUN == 0)
3305	{
3306	*ppLed = &pDevice->Led;
3307	Assert((*ppLed)->u32Magic == PDMLED_MAGIC);
3308	return VINF_SUCCESS;
3309	}
3310	return VERR_PDM_LUN_NOT_FOUND;
3311	}
3312
3313	/**
3314	* @interface_method_impl{PDMIBASE,pfnQueryInterface}
3315	*/
3316	static DECLCALLBACK(void ) buslogicR3DeviceQueryInterface(PPDMIBASE pInterface, const char pszIID)
3317	{
3318	PBUSLOGICDEVICE pDevice = PDMIBASE_2_PBUSLOGICDEVICE(pInterface);
3319	PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pDevice->IBase);
3320	PDMIBASE_RETURN_INTERFACE(pszIID, PDMISCSIPORT, &pDevice->ISCSIPort);
3321	PDMIBASE_RETURN_INTERFACE(pszIID, PDMILEDPORTS, &pDevice->ILed);
3322	return NULL;
3323	}
3324
3325	/**
3326	* Gets the pointer to the status LED of a unit.
3327	*
3328	* @returns VBox status code.
3329	* @param pInterface Pointer to the interface structure containing the called function pointer.
3330	* @param iLUN The unit which status LED we desire.
3331	* @param ppLed Where to store the LED pointer.
3332	*/
3333	static DECLCALLBACK(int) buslogicR3StatusQueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed)
3334	{
3335	PBUSLOGIC pBusLogic = PDMILEDPORTS_2_PBUSLOGIC(pInterface);
3336	if (iLUN < BUSLOGIC_MAX_DEVICES)
3337	{
3338	*ppLed = &pBusLogic->aDeviceStates[iLUN].Led;
3339	Assert((*ppLed)->u32Magic == PDMLED_MAGIC);
3340	return VINF_SUCCESS;
3341	}
3342	return VERR_PDM_LUN_NOT_FOUND;
3343	}
3344
3345	/**
3346	* @interface_method_impl{PDMIBASE,pfnQueryInterface}
3347	*/
3348	static DECLCALLBACK(void ) buslogicR3StatusQueryInterface(PPDMIBASE pInterface, const char pszIID)
3349	{
3350	PBUSLOGIC pThis = PDMIBASE_2_PBUSLOGIC(pInterface);
3351	PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pThis->IBase);
3352	PDMIBASE_RETURN_INTERFACE(pszIID, PDMILEDPORTS, &pThis->ILeds);
3353	return NULL;
3354	}
3355
3356	/**
3357	* BusLogic debugger info callback.
3358	*
3359	* @param pDevIns The device instance.
3360	* @param pHlp The output helpers.
3361	* @param pszArgs The arguments.
3362	*/
3363	static DECLCALLBACK(void) buslogicR3Info(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs)
3364	{
3365	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3366	bool fVerbose = false;
3367
3368	/* Parse arguments. */
3369	if (pszArgs)
3370	fVerbose = strstr(pszArgs, "verbose") != NULL;
3371
3372	/* Show basic information. */
3373	pHlp->pfnPrintf(pHlp,
3374	"%s#%d: PCI I/O=%RTiop ISA I/O=%RTiop MMIO=%RGp IRQ=%u GC=%RTbool R0=%RTbool\n",
3375	pDevIns->pReg->szName,
3376	pDevIns->iInstance,
3377	pThis->IOPortBase, pThis->IOISABase, pThis->MMIOBase,
3378	PCIDevGetInterruptLine(&pThis->dev),
3379	!!pThis->fGCEnabled, !!pThis->fR0Enabled);
3380
3381	/* Print mailbox state. */
3382	if (pThis->regStatus & BUSLOGIC_REGISTER_STATUS_INITIALIZATION_REQUIRED)
3383	pHlp->pfnPrintf(pHlp, "Mailbox not initialized\n");
3384	else
3385	pHlp->pfnPrintf(pHlp, "%u-bit mailbox with %u entries at %RGp\n",
3386	pThis->fMbxIs24Bit ? 24 : 32, pThis->cMailbox,
3387	pThis->GCPhysAddrMailboxOutgoingBase);
3388
3389	/* Print register contents. */
3390	pHlp->pfnPrintf(pHlp, "Registers: STAT=%02x INTR=%02x GEOM=%02x\n",
3391	pThis->regStatus, pThis->regInterrupt, pThis->regGeometry);
3392
3393	/* Print the current command, if any. */
3394	if (pThis->uOperationCode != 0xff )
3395	pHlp->pfnPrintf(pHlp, "Current command: %02X\n", pThis->uOperationCode);
3396	}
3397
3398	/* -=-=-=-=- Helper -=-=-=-=- */
3399
3400	/**
3401	* Checks if all asynchronous I/O is finished.
3402	*
3403	* Used by buslogicR3Reset, buslogicR3Suspend and buslogicR3PowerOff.
3404	*
3405	* @returns true if quiesced, false if busy.
3406	* @param pDevIns The device instance.
3407	*/
3408	static bool buslogicR3AllAsyncIOIsFinished(PPDMDEVINS pDevIns)
3409	{
3410	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3411
3412	for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aDeviceStates); i++)
3413	{
3414	PBUSLOGICDEVICE pThisDevice = &pThis->aDeviceStates[i];
3415	if (pThisDevice->pDrvBase)
3416	{
3417	if (pThisDevice->cOutstandingRequests != 0)
3418	return false;
3419	}
3420	}
3421
3422	return true;
3423	}
3424
3425	/**
3426	* Callback employed by buslogicR3Suspend and buslogicR3PowerOff..
3427	*
3428	* @returns true if we've quiesced, false if we're still working.
3429	* @param pDevIns The device instance.
3430	*/
3431	static DECLCALLBACK(bool) buslogicR3IsAsyncSuspendOrPowerOffDone(PPDMDEVINS pDevIns)
3432	{
3433	if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
3434	return false;
3435
3436	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3437	ASMAtomicWriteBool(&pThis->fSignalIdle, false);
3438	return true;
3439	}
3440
3441	/**
3442	* Common worker for ahciR3Suspend and ahciR3PowerOff.
3443	*/
3444	static void buslogicR3SuspendOrPowerOff(PPDMDEVINS pDevIns, bool fPowerOff)
3445	{
3446	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3447
3448	ASMAtomicWriteBool(&pThis->fSignalIdle, true);
3449	if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
3450	PDMDevHlpSetAsyncNotification(pDevIns, buslogicR3IsAsyncSuspendOrPowerOffDone);
3451	else
3452	{
3453	ASMAtomicWriteBool(&pThis->fSignalIdle, false);
3454
3455	AssertMsg(!pThis->fNotificationSend, ("The PDM Queue should be empty at this point\n"));
3456
3457	if (pThis->fRedo)
3458	{
3459	if (fPowerOff)
3460	{
3461	/* Free tasks which would have been queued again on resume. */
3462	PBUSLOGICTASKSTATE pTaskState = pThis->pTasksRedoHead;
3463
3464	pThis->pTasksRedoHead = NULL;
3465
3466	while (pTaskState)
3467	{
3468	PBUSLOGICTASKSTATE pFree;
3469
3470	pFree = pTaskState;
3471	pTaskState = pTaskState->pRedoNext;
3472
3473	RTMemCacheFree(pThis->hTaskCache, pFree);
3474	}
3475	pThis->fRedo = false;
3476	}
3477	else if (pThis->VBoxSCSI.fBusy)
3478	{
3479	/* Destroy the task because the BIOS interface has all necessary information. */
3480	Assert(pThis->pTasksRedoHead->fBIOS);
3481	Assert(!pThis->pTasksRedoHead->pRedoNext);
3482
3483	RTMemCacheFree(pThis->hTaskCache, pThis->pTasksRedoHead);
3484	pThis->pTasksRedoHead = NULL;
3485	}
3486	}
3487	}
3488	}
3489
3490	/**
3491	* Suspend notification.
3492	*
3493	* @param pDevIns The device instance data.
3494	*/
3495	static DECLCALLBACK(void) buslogicR3Suspend(PPDMDEVINS pDevIns)
3496	{
3497	Log(("buslogicR3Suspend\n"));
3498	buslogicR3SuspendOrPowerOff(pDevIns, false /* fPoweroff */);
3499	}
3500
3501	/**
3502	* Resume notification.
3503	*
3504	* @param pDevIns The device instance data.
3505	*/
3506	static DECLCALLBACK(void) buslogicR3Resume(PPDMDEVINS pDevIns)
3507	{
3508	Log(("buslogicR3Resume\n"));
3509	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3510	buslogicR3Kick(pThis);
3511	}
3512
3513
3514	/**
3515	* Detach notification.
3516	*
3517	* One harddisk at one port has been unplugged.
3518	* The VM is suspended at this point.
3519	*
3520	* @param pDevIns The device instance.
3521	* @param iLUN The logical unit which is being detached.
3522	* @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
3523	*/
3524	static DECLCALLBACK(void) buslogicR3Detach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
3525	{
3526	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3527	PBUSLOGICDEVICE pDevice = &pThis->aDeviceStates[iLUN];
3528
3529	Log(("%s:\n", __FUNCTION__));
3530
3531	AssertMsg(fFlags & PDM_TACH_FLAGS_NOT_HOT_PLUG,
3532	("BusLogic: Device does not support hotplugging\n"));
3533
3534	/*
3535	* Zero some important members.
3536	*/
3537	pDevice->pDrvBase = NULL;
3538	pDevice->fPresent = false;
3539	pDevice->pDrvSCSIConnector = NULL;
3540	}
3541
3542	/**
3543	* Attach command.
3544	*
3545	* This is called when we change block driver.
3546	*
3547	* @returns VBox status code.
3548	* @param pDevIns The device instance.
3549	* @param iLUN The logical unit which is being detached.
3550	* @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
3551	*/
3552	static DECLCALLBACK(int) buslogicR3Attach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
3553	{
3554	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3555	PBUSLOGICDEVICE pDevice = &pThis->aDeviceStates[iLUN];
3556	int rc;
3557
3558	AssertMsgReturn(fFlags & PDM_TACH_FLAGS_NOT_HOT_PLUG,
3559	("BusLogic: Device does not support hotplugging\n"),
3560	VERR_INVALID_PARAMETER);
3561
3562	/* the usual paranoia */
3563	AssertRelease(!pDevice->pDrvBase);
3564	AssertRelease(!pDevice->pDrvSCSIConnector);
3565	Assert(pDevice->iLUN == iLUN);
3566
3567	/*
3568	* Try attach the block device and get the interfaces,
3569	* required as well as optional.
3570	*/
3571	rc = PDMDevHlpDriverAttach(pDevIns, pDevice->iLUN, &pDevice->IBase, &pDevice->pDrvBase, NULL);
3572	if (RT_SUCCESS(rc))
3573	{
3574	/* Get SCSI connector interface. */
3575	pDevice->pDrvSCSIConnector = PDMIBASE_QUERY_INTERFACE(pDevice->pDrvBase, PDMISCSICONNECTOR);
3576	AssertMsgReturn(pDevice->pDrvSCSIConnector, ("Missing SCSI interface below\n"), VERR_PDM_MISSING_INTERFACE);
3577	pDevice->fPresent = true;
3578	}
3579	else
3580	AssertMsgFailed(("Failed to attach LUN#%d. rc=%Rrc\n", pDevice->iLUN, rc));
3581
3582	if (RT_FAILURE(rc))
3583	{
3584	pDevice->pDrvBase = NULL;
3585	pDevice->pDrvSCSIConnector = NULL;
3586	}
3587	return rc;
3588	}
3589
3590	/**
3591	* Callback employed by buslogicR3Reset.
3592	*
3593	* @returns true if we've quiesced, false if we're still working.
3594	* @param pDevIns The device instance.
3595	*/
3596	static DECLCALLBACK(bool) buslogicR3IsAsyncResetDone(PPDMDEVINS pDevIns)
3597	{
3598	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3599
3600	if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
3601	return false;
3602	ASMAtomicWriteBool(&pThis->fSignalIdle, false);
3603
3604	buslogicR3HwReset(pThis, true);
3605	return true;
3606	}
3607
3608	/**
3609	* @copydoc FNPDMDEVRESET
3610	*/
3611	static DECLCALLBACK(void) buslogicR3Reset(PPDMDEVINS pDevIns)
3612	{
3613	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3614
3615	ASMAtomicWriteBool(&pThis->fSignalIdle, true);
3616	if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
3617	PDMDevHlpSetAsyncNotification(pDevIns, buslogicR3IsAsyncResetDone);
3618	else
3619	{
3620	ASMAtomicWriteBool(&pThis->fSignalIdle, false);
3621	buslogicR3HwReset(pThis, true);
3622	}
3623	}
3624
3625	static DECLCALLBACK(void) buslogicR3Relocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta)
3626	{
3627	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3628
3629	pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
3630	pThis->pNotifierQueueRC = PDMQueueRCPtr(pThis->pNotifierQueueR3);
3631
3632	for (uint32_t i = 0; i < BUSLOGIC_MAX_DEVICES; i++)
3633	{
3634	PBUSLOGICDEVICE pDevice = &pThis->aDeviceStates[i];
3635
3636	pDevice->pBusLogicRC = PDMINS_2_DATA_RCPTR(pDevIns);
3637	}
3638
3639	}
3640
3641	/**
3642	* Poweroff notification.
3643	*
3644	* @param pDevIns Pointer to the device instance
3645	*/
3646	static DECLCALLBACK(void) buslogicR3PowerOff(PPDMDEVINS pDevIns)
3647	{
3648	Log(("buslogicR3PowerOff\n"));
3649	buslogicR3SuspendOrPowerOff(pDevIns, true /* fPoweroff */);
3650	}
3651
3652	/**
3653	* Destroy a driver instance.
3654	*
3655	* Most VM resources are freed by the VM. This callback is provided so that any non-VM
3656	* resources can be freed correctly.
3657	*
3658	* @param pDevIns The device instance data.
3659	*/
3660	static DECLCALLBACK(int) buslogicR3Destruct(PPDMDEVINS pDevIns)
3661	{
3662	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3663	PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns);
3664
3665	PDMR3CritSectDelete(&pThis->CritSectIntr);
3666
3667	/*
3668	* Free all tasks which are still hanging around
3669	* (Power off after the VM was suspended).
3670	*/
3671	if (pThis->fRedo)
3672	{
3673	/* Free tasks which would have been queued again on resume. */
3674	PBUSLOGICTASKSTATE pTaskState = pThis->pTasksRedoHead;
3675
3676	pThis->pTasksRedoHead = NULL;
3677
3678	while (pTaskState)
3679	{
3680	PBUSLOGICTASKSTATE pFree;
3681
3682	pFree = pTaskState;
3683	pTaskState = pTaskState->pRedoNext;
3684
3685	RTMemCacheFree(pThis->hTaskCache, pFree);
3686	}
3687	pThis->fRedo = false;
3688	}
3689
3690	int rc = RTMemCacheDestroy(pThis->hTaskCache);
3691	AssertMsgRC(rc, ("Destroying task cache failed rc=%Rrc\n", rc));
3692
3693	return rc;
3694	}
3695
3696	/**
3697	* @interface_method_impl{PDMDEVREG,pfnConstruct}
3698	*/
3699	static DECLCALLBACK(int) buslogicR3Construct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
3700	{
3701	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3702	int rc = VINF_SUCCESS;
3703	bool fBootable = true;
3704	char achISACompat[16];
3705	PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
3706
3707	/*
3708	* Init instance data (do early because of constructor).
3709	*/
3710	pThis->hTaskCache = NIL_RTMEMCACHE;
3711	pThis->pDevInsR3 = pDevIns;
3712	pThis->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
3713	pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
3714	pThis->IBase.pfnQueryInterface = buslogicR3StatusQueryInterface;
3715	pThis->ILeds.pfnQueryStatusLed = buslogicR3StatusQueryStatusLed;
3716
3717	PCIDevSetVendorId (&pThis->dev, 0x104b); /* BusLogic */
3718	PCIDevSetDeviceId (&pThis->dev, 0x1040); /* BT-958 */
3719	PCIDevSetCommand (&pThis->dev, 0x0003);
3720	PCIDevSetRevisionId (&pThis->dev, 0x01);
3721	PCIDevSetClassProg (&pThis->dev, 0x00); /* SCSI */
3722	PCIDevSetClassSub (&pThis->dev, 0x00); /* SCSI */
3723	PCIDevSetClassBase (&pThis->dev, 0x01); /* Mass storage */
3724	PCIDevSetBaseAddress (&pThis->dev, 0, true /IO/, false /Pref/, false /64-bit/, 0x00000000);
3725	PCIDevSetBaseAddress (&pThis->dev, 1, false /IO/, false /Pref/, false /64-bit/, 0x00000000);
3726	PCIDevSetSubSystemVendorId(&pThis->dev, 0x104b);
3727	PCIDevSetSubSystemId (&pThis->dev, 0x1040);
3728	PCIDevSetInterruptLine (&pThis->dev, 0x00);
3729	PCIDevSetInterruptPin (&pThis->dev, 0x01);
3730
3731	/*
3732	* Validate and read configuration.
3733	*/
3734	if (!CFGMR3AreValuesValid(pCfg,
3735	"GCEnabled\0"
3736	"R0Enabled\0"
3737	"Bootable\0"
3738	"ISACompat\0"))
3739	return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
3740	N_("BusLogic configuration error: unknown option specified"));
3741
3742	rc = CFGMR3QueryBoolDef(pCfg, "GCEnabled", &pThis->fGCEnabled, true);
3743	if (RT_FAILURE(rc))
3744	return PDMDEV_SET_ERROR(pDevIns, rc,
3745	N_("BusLogic configuration error: failed to read GCEnabled as boolean"));
3746	Log(("%s: fGCEnabled=%d\n", __FUNCTION__, pThis->fGCEnabled));
3747
3748	rc = CFGMR3QueryBoolDef(pCfg, "R0Enabled", &pThis->fR0Enabled, true);
3749	if (RT_FAILURE(rc))
3750	return PDMDEV_SET_ERROR(pDevIns, rc,
3751	N_("BusLogic configuration error: failed to read R0Enabled as boolean"));
3752	Log(("%s: fR0Enabled=%d\n", __FUNCTION__, pThis->fR0Enabled));
3753	rc = CFGMR3QueryBoolDef(pCfg, "Bootable", &fBootable, true);
3754	if (RT_FAILURE(rc))
3755	return PDMDEV_SET_ERROR(pDevIns, rc,
3756	N_("BusLogic configuration error: failed to read Bootable as boolean"));
3757	Log(("%s: fBootable=%RTbool\n", __FUNCTION__, fBootable));
3758	rc = CFGMR3QueryStringDef(pCfg, "ISACompat", achISACompat, sizeof(achISACompat), "Alternate");
3759	if (RT_FAILURE(rc))
3760	return PDMDEV_SET_ERROR(pDevIns, rc,
3761	N_("BusLogic configuration error: failed to read ISACompat as string"));
3762	Log(("%s: ISACompat=%s\n", __FUNCTION__, achISACompat));
3763
3764	/* Grok the ISACompat setting. */
3765	if (!strcmp(achISACompat, "Disabled"))
3766	pThis->uDefaultISABaseCode = ISA_BASE_DISABLED;
3767	else if (!strcmp(achISACompat, "Primary"))
3768	pThis->uDefaultISABaseCode = 0; /* I/O base at 330h. */
3769	else if (!strcmp(achISACompat, "Alternate"))
3770	pThis->uDefaultISABaseCode = 1; /* I/O base at 334h. */
3771	else
3772	return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
3773	N_("BusLogic configuration error: invalid ISACompat setting"));
3774
3775	/*
3776	* Register the PCI device and its I/O regions.
3777	*/
3778	rc = PDMDevHlpPCIRegister(pDevIns, &pThis->dev);
3779	if (RT_FAILURE(rc))
3780	return rc;
3781
3782	rc = PDMDevHlpPCIIORegionRegister(pDevIns, 0, 32, PCI_ADDRESS_SPACE_IO, buslogicR3MmioMap);
3783	if (RT_FAILURE(rc))
3784	return rc;
3785
3786	rc = PDMDevHlpPCIIORegionRegister(pDevIns, 1, 32, PCI_ADDRESS_SPACE_MEM, buslogicR3MmioMap);
3787	if (RT_FAILURE(rc))
3788	return rc;
3789
3790	if (fBootable)
3791	{
3792	/* Register I/O port space for BIOS access. */
3793	rc = PDMDevHlpIOPortRegister(pDevIns, BUSLOGIC_BIOS_IO_PORT, 4, NULL,
3794	buslogicR3BiosIoPortWrite, buslogicR3BiosIoPortRead,
3795	buslogicR3BiosIoPortWriteStr, buslogicR3BiosIoPortReadStr,
3796	"BusLogic BIOS");
3797	if (RT_FAILURE(rc))
3798	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot register BIOS I/O handlers"));
3799	}
3800
3801	/* Set up the compatibility I/O range. */
3802	rc = buslogicR3RegisterISARange(pThis, pThis->uDefaultISABaseCode);
3803	if (RT_FAILURE(rc))
3804	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot register ISA I/O handlers"));
3805
3806	/* Initialize task cache. */
3807	rc = RTMemCacheCreate(&pThis->hTaskCache, sizeof(BUSLOGICTASKSTATE), 0, UINT32_MAX,
3808	NULL, NULL, NULL, 0);
3809	if (RT_FAILURE(rc))
3810	return PDMDEV_SET_ERROR(pDevIns, rc,
3811	N_("BusLogic: Failed to initialize task cache\n"));
3812
3813	/* Initialize task queue. */
3814	rc = PDMDevHlpQueueCreate(pDevIns, sizeof(PDMQUEUEITEMCORE), 5, 0,
3815	buslogicR3NotifyQueueConsumer, true, "BusLogicTask", &pThis->pNotifierQueueR3);
3816	if (RT_FAILURE(rc))
3817	return rc;
3818	pThis->pNotifierQueueR0 = PDMQueueR0Ptr(pThis->pNotifierQueueR3);
3819	pThis->pNotifierQueueRC = PDMQueueRCPtr(pThis->pNotifierQueueR3);
3820
3821	rc = PDMDevHlpCritSectInit(pDevIns, &pThis->CritSectIntr, RT_SRC_POS, "BusLogic-Intr#%u", pDevIns->iInstance);
3822	if (RT_FAILURE(rc))
3823	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic: cannot create critical section"));
3824
3825	/* Initialize per device state. */
3826	for (unsigned i = 0; i < RT_ELEMENTS(pThis->aDeviceStates); i++)
3827	{
3828	char szName[24];
3829	PBUSLOGICDEVICE pDevice = &pThis->aDeviceStates[i];
3830
3831	RTStrPrintf(szName, sizeof(szName), "Device%u", i);
3832
3833	/* Initialize static parts of the device. */
3834	pDevice->iLUN = i;
3835	pDevice->pBusLogicR3 = pThis;
3836	pDevice->pBusLogicR0 = PDMINS_2_DATA_R0PTR(pDevIns);
3837	pDevice->pBusLogicRC = PDMINS_2_DATA_RCPTR(pDevIns);
3838	pDevice->Led.u32Magic = PDMLED_MAGIC;
3839	pDevice->IBase.pfnQueryInterface = buslogicR3DeviceQueryInterface;
3840	pDevice->ISCSIPort.pfnSCSIRequestCompleted = buslogicR3DeviceSCSIRequestCompleted;
3841	pDevice->ISCSIPort.pfnQueryDeviceLocation = buslogicR3QueryDeviceLocation;
3842	pDevice->ILed.pfnQueryStatusLed = buslogicR3DeviceQueryStatusLed;
3843
3844	/* Attach SCSI driver. */
3845	rc = PDMDevHlpDriverAttach(pDevIns, pDevice->iLUN, &pDevice->IBase, &pDevice->pDrvBase, szName);
3846	if (RT_SUCCESS(rc))
3847	{
3848	/* Get SCSI connector interface. */
3849	pDevice->pDrvSCSIConnector = PDMIBASE_QUERY_INTERFACE(pDevice->pDrvBase, PDMISCSICONNECTOR);
3850	AssertMsgReturn(pDevice->pDrvSCSIConnector, ("Missing SCSI interface below\n"), VERR_PDM_MISSING_INTERFACE);
3851
3852	pDevice->fPresent = true;
3853	}
3854	else if (rc == VERR_PDM_NO_ATTACHED_DRIVER)
3855	{
3856	pDevice->pDrvBase = NULL;
3857	pDevice->fPresent = false;
3858	rc = VINF_SUCCESS;
3859	Log(("BusLogic: no driver attached to device %s\n", szName));
3860	}
3861	else
3862	{
3863	AssertLogRelMsgFailed(("BusLogic: Failed to attach %s\n", szName));
3864	return rc;
3865	}
3866	}
3867
3868	/*
3869	* Attach status driver (optional).
3870	*/
3871	PPDMIBASE pBase;
3872	rc = PDMDevHlpDriverAttach(pDevIns, PDM_STATUS_LUN, &pThis->IBase, &pBase, "Status Port");
3873	if (RT_SUCCESS(rc))
3874	pThis->pLedsConnector = PDMIBASE_QUERY_INTERFACE(pBase, PDMILEDCONNECTORS);
3875	else if (rc != VERR_PDM_NO_ATTACHED_DRIVER)
3876	{
3877	AssertMsgFailed(("Failed to attach to status driver. rc=%Rrc\n", rc));
3878	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot attach to status driver"));
3879	}
3880
3881	rc = PDMDevHlpSSMRegisterEx(pDevIns, BUSLOGIC_SAVED_STATE_MINOR_VERSION, sizeof(*pThis), NULL,
3882	NULL, buslogicR3LiveExec, NULL,
3883	NULL, buslogicR3SaveExec, NULL,
3884	NULL, buslogicR3LoadExec, buslogicR3LoadDone);
3885	if (RT_FAILURE(rc))
3886	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot register save state handlers"));
3887
3888	/*
3889	* Register the debugger info callback.
3890	*/
3891	char szTmp[128];
3892	RTStrPrintf(szTmp, sizeof(szTmp), "%s%d", pDevIns->pReg->szName, pDevIns->iInstance);
3893	PDMDevHlpDBGFInfoRegister(pDevIns, szTmp, "BusLogic HBA info", buslogicR3Info);
3894
3895	rc = buslogicR3HwReset(pThis, true);
3896	AssertMsgRC(rc, ("hardware reset of BusLogic host adapter failed rc=%Rrc\n", rc));
3897
3898	return rc;
3899	}
3900
3901	/**
3902	* The device registration structure.
3903	*/
3904	const PDMDEVREG g_DeviceBusLogic =
3905	{
3906	/* u32Version */
3907	PDM_DEVREG_VERSION,
3908	/* szName */
3909	"buslogic",
3910	/* szRCMod */
3911	"VBoxDDGC.gc",
3912	/* szR0Mod */
3913	"VBoxDDR0.r0",
3914	/* pszDescription */
3915	"BusLogic BT-958 SCSI host adapter.\n",
3916	/* fFlags */
3917	PDM_DEVREG_FLAGS_DEFAULT_BITS \| PDM_DEVREG_FLAGS_RC \| PDM_DEVREG_FLAGS_R0 \|
3918	PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION \| PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION \|
3919	PDM_DEVREG_FLAGS_FIRST_RESET_NOTIFICATION,
3920	/* fClass */
3921	PDM_DEVREG_CLASS_STORAGE,
3922	/* cMaxInstances */
3923	~0U,
3924	/* cbInstance */
3925	sizeof(BUSLOGIC),
3926	/* pfnConstruct */
3927	buslogicR3Construct,
3928	/* pfnDestruct */
3929	buslogicR3Destruct,
3930	/* pfnRelocate */
3931	buslogicR3Relocate,
3932	/* pfnIOCtl */
3933	NULL,
3934	/* pfnPowerOn */
3935	NULL,
3936	/* pfnReset */
3937	buslogicR3Reset,
3938	/* pfnSuspend */
3939	buslogicR3Suspend,
3940	/* pfnResume */
3941	buslogicR3Resume,
3942	/* pfnAttach */
3943	buslogicR3Attach,
3944	/* pfnDetach */
3945	buslogicR3Detach,
3946	/* pfnQueryInterface. */
3947	NULL,
3948	/* pfnInitComplete */
3949	NULL,
3950	/* pfnPowerOff */
3951	buslogicR3PowerOff,
3952	/* pfnSoftReset */
3953	NULL,
3954	/* u32VersionEnd */
3955	PDM_DEVREG_VERSION
3956	};
3957
3958	#endif /* IN_RING3 */
3959	#endif /* !VBOX_DEVICE_STRUCT_TESTCASE */

Note: See TracBrowser for help on using the repository browser.

source: vbox/trunk/src/VBox/Devices/Storage/DevBusLogic.cpp@ 44591

Download in other formats: