DevBusLogic.cpp@ 64744

Last change on this file since 64744 was 64660, checked in by vboxsync, 8 years ago
pdmstorageifs.h,AHCI,NVMe,LsiLogic,BusLogic,DrvSCSI: Prepare for a new callback in PDMIMEDIAEXPORT which can reduce the overhead of copying data between buffers under certain circumstances
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1	/* $Id: DevBusLogic.cpp 64660 2016-11-14 14:40:34Z vboxsync $ */
2	/** @file
3	* VBox storage devices - BusLogic SCSI host adapter BT-958.
4	*
5	* Based on the Multi-Master Ultra SCSI Systems Technical Reference Manual.
6	*/
7
8	/*
9	* Copyright (C) 2006-2016 Oracle Corporation
10	*
11	* This file is part of VirtualBox Open Source Edition (OSE), as
12	* available from http://www.virtualbox.org. This file is free software;
13	* you can redistribute it and/or modify it under the terms of the GNU
14	* General Public License (GPL) as published by the Free Software
15	* Foundation, in version 2 as it comes in the "COPYING" file of the
16	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
17	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
18	*/
19
20
21	/*********************************************************************************************************************************
22	* Header Files *
23	*********************************************************************************************************************************/
24	#define LOG_GROUP LOG_GROUP_DEV_BUSLOGIC
25	#include <VBox/vmm/pdmdev.h>
26	#include <VBox/vmm/pdmstorageifs.h>
27	#include <VBox/vmm/pdmcritsect.h>
28	#include <VBox/scsi.h>
29	#include <iprt/asm.h>
30	#include <iprt/assert.h>
31	#include <iprt/string.h>
32	#include <iprt/log.h>
33	#ifdef IN_RING3
34	# include <iprt/alloc.h>
35	# include <iprt/memcache.h>
36	# include <iprt/param.h>
37	# include <iprt/uuid.h>
38	#endif
39
40	#include "VBoxSCSI.h"
41	#include "VBoxDD.h"
42
43
44	/*********************************************************************************************************************************
45	* Defined Constants And Macros *
46	*********************************************************************************************************************************/
47	/** Maximum number of attached devices the adapter can handle. */
48	#define BUSLOGIC_MAX_DEVICES 16
49
50	/** Maximum number of scatter gather elements this device can handle. */
51	#define BUSLOGIC_MAX_SCATTER_GATHER_LIST_SIZE 128
52
53	/** Size of the command buffer. */
54	#define BUSLOGIC_COMMAND_SIZE_MAX 53
55
56	/** Size of the reply buffer. */
57	#define BUSLOGIC_REPLY_SIZE_MAX 64
58
59	/** Custom fixed I/O ports for BIOS controller access.
60	* Note that these should not be in the ISA range (below 400h) to avoid
61	* conflicts with ISA device probing. Addresses in the 300h-340h range should be
62	* especially avoided.
63	*/
64	#define BUSLOGIC_BIOS_IO_PORT 0x430
65
66	/** State saved version. */
67	#define BUSLOGIC_SAVED_STATE_MINOR_VERSION 4
68
69	/** Saved state version before the suspend on error feature was implemented. */
70	#define BUSLOGIC_SAVED_STATE_MINOR_PRE_ERROR_HANDLING 1
71	/** Saved state version before 24-bit mailbox support was implemented. */
72	#define BUSLOGIC_SAVED_STATE_MINOR_PRE_24BIT_MBOX 2
73	/** Saved state version before command buffer size was raised. */
74	#define BUSLOGIC_SAVED_STATE_MINOR_PRE_CMDBUF_RESIZE 3
75
76	/** Command buffer size in old saved states. */
77	#define BUSLOGIC_COMMAND_SIZE_OLD 5
78
79	/** The duration of software-initiated reset (in nano seconds).
80	* Not documented, set to 50 ms. */
81	#define BUSLOGIC_RESET_DURATION_NS UINT64_C(50000000)
82
83
84	/*********************************************************************************************************************************
85	* Structures and Typedefs *
86	*********************************************************************************************************************************/
87	/**
88	* State of a device attached to the buslogic host adapter.
89	*
90	* @implements PDMIBASE
91	* @implements PDMISCSIPORT
92	* @implements PDMILEDPORTS
93	*/
94	typedef struct BUSLOGICDEVICE
95	{
96	/** Pointer to the owning buslogic device instance. - R3 pointer */
97	R3PTRTYPE(struct BUSLOGIC *) pBusLogicR3;
98	/** Pointer to the owning buslogic device instance. - R0 pointer */
99	R0PTRTYPE(struct BUSLOGIC *) pBusLogicR0;
100	/** Pointer to the owning buslogic device instance. - RC pointer */
101	RCPTRTYPE(struct BUSLOGIC *) pBusLogicRC;
102
103	/** Flag whether device is present. */
104	bool fPresent;
105	/** LUN of the device. */
106	RTUINT iLUN;
107
108	#if HC_ARCH_BITS == 64
109	uint32_t Alignment0;
110	#endif
111
112	/** Our base interface. */
113	PDMIBASE IBase;
114	/** Media port interface. */
115	PDMIMEDIAPORT IMediaPort;
116	/** Extended media port interface. */
117	PDMIMEDIAEXPORT IMediaExPort;
118	/** Led interface. */
119	PDMILEDPORTS ILed;
120	/** Pointer to the attached driver's base interface. */
121	R3PTRTYPE(PPDMIBASE) pDrvBase;
122	/** Pointer to the attached driver's media interface. */
123	R3PTRTYPE(PPDMIMEDIA) pDrvMedia;
124	/** Pointer to the attached driver's extended media interface. */
125	R3PTRTYPE(PPDMIMEDIAEX) pDrvMediaEx;
126	/** The status LED state for this device. */
127	PDMLED Led;
128
129	#if HC_ARCH_BITS == 64
130	uint32_t Alignment1;
131	#endif
132
133	/** Number of outstanding tasks on the port. */
134	volatile uint32_t cOutstandingRequests;
135
136	} BUSLOGICDEVICE, *PBUSLOGICDEVICE;
137
138	/**
139	* Commands the BusLogic adapter supports.
140	*/
141	enum BUSLOGICCOMMAND
142	{
143	BUSLOGICCOMMAND_TEST_CMDC_INTERRUPT = 0x00,
144	BUSLOGICCOMMAND_INITIALIZE_MAILBOX = 0x01,
145	BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND = 0x02,
146	BUSLOGICCOMMAND_EXECUTE_BIOS_COMMAND = 0x03,
147	BUSLOGICCOMMAND_INQUIRE_BOARD_ID = 0x04,
148	BUSLOGICCOMMAND_ENABLE_OUTGOING_MAILBOX_AVAILABLE_INTERRUPT = 0x05,
149	BUSLOGICCOMMAND_SET_SCSI_SELECTION_TIMEOUT = 0x06,
150	BUSLOGICCOMMAND_SET_PREEMPT_TIME_ON_BUS = 0x07,
151	BUSLOGICCOMMAND_SET_TIME_OFF_BUS = 0x08,
152	BUSLOGICCOMMAND_SET_BUS_TRANSFER_RATE = 0x09,
153	BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_0_TO_7 = 0x0a,
154	BUSLOGICCOMMAND_INQUIRE_CONFIGURATION = 0x0b,
155	BUSLOGICCOMMAND_ENABLE_TARGET_MODE = 0x0c,
156	BUSLOGICCOMMAND_INQUIRE_SETUP_INFORMATION = 0x0d,
157	BUSLOGICCOMMAND_WRITE_ADAPTER_LOCAL_RAM = 0x1a,
158	BUSLOGICCOMMAND_READ_ADAPTER_LOCAL_RAM = 0x1b,
159	BUSLOGICCOMMAND_WRITE_BUSMASTER_CHIP_FIFO = 0x1c,
160	BUSLOGICCOMMAND_READ_BUSMASTER_CHIP_FIFO = 0x1d,
161	BUSLOGICCOMMAND_ECHO_COMMAND_DATA = 0x1f,
162	BUSLOGICCOMMAND_HOST_ADAPTER_DIAGNOSTIC = 0x20,
163	BUSLOGICCOMMAND_SET_ADAPTER_OPTIONS = 0x21,
164	BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_8_TO_15 = 0x23,
165	BUSLOGICCOMMAND_INQUIRE_TARGET_DEVICES = 0x24,
166	BUSLOGICCOMMAND_DISABLE_HOST_ADAPTER_INTERRUPT = 0x25,
167	BUSLOGICCOMMAND_EXT_BIOS_INFO = 0x28,
168	BUSLOGICCOMMAND_UNLOCK_MAILBOX = 0x29,
169	BUSLOGICCOMMAND_INITIALIZE_EXTENDED_MAILBOX = 0x81,
170	BUSLOGICCOMMAND_EXECUTE_SCSI_COMMAND = 0x83,
171	BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_3RD_LETTER = 0x84,
172	BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_LETTER = 0x85,
173	BUSLOGICCOMMAND_INQUIRE_PCI_HOST_ADAPTER_INFORMATION = 0x86,
174	BUSLOGICCOMMAND_INQUIRE_HOST_ADAPTER_MODEL_NUMBER = 0x8b,
175	BUSLOGICCOMMAND_INQUIRE_SYNCHRONOUS_PERIOD = 0x8c,
176	BUSLOGICCOMMAND_INQUIRE_EXTENDED_SETUP_INFORMATION = 0x8d,
177	BUSLOGICCOMMAND_ENABLE_STRICT_ROUND_ROBIN_MODE = 0x8f,
178	BUSLOGICCOMMAND_STORE_HOST_ADAPTER_LOCAL_RAM = 0x90,
179	BUSLOGICCOMMAND_FETCH_HOST_ADAPTER_LOCAL_RAM = 0x91,
180	BUSLOGICCOMMAND_STORE_LOCAL_DATA_IN_EEPROM = 0x92,
181	BUSLOGICCOMMAND_UPLOAD_AUTO_SCSI_CODE = 0x94,
182	BUSLOGICCOMMAND_MODIFY_IO_ADDRESS = 0x95,
183	BUSLOGICCOMMAND_SET_CCB_FORMAT = 0x96,
184	BUSLOGICCOMMAND_WRITE_INQUIRY_BUFFER = 0x9a,
185	BUSLOGICCOMMAND_READ_INQUIRY_BUFFER = 0x9b,
186	BUSLOGICCOMMAND_FLASH_ROM_UPLOAD_DOWNLOAD = 0xa7,
187	BUSLOGICCOMMAND_READ_SCAM_DATA = 0xa8,
188	BUSLOGICCOMMAND_WRITE_SCAM_DATA = 0xa9
189	} BUSLOGICCOMMAND;
190
191	#pragma pack(1)
192	/**
193	* Auto SCSI structure which is located
194	* in host adapter RAM and contains several
195	* configuration parameters.
196	*/
197	typedef struct AutoSCSIRam
198	{
199	uint8_t aInternalSignature[2];
200	uint8_t cbInformation;
201	uint8_t aHostAdaptertype[6];
202	uint8_t uReserved1;
203	bool fFloppyEnabled : 1;
204	bool fFloppySecondary : 1;
205	bool fLevelSensitiveInterrupt : 1;
206	unsigned char uReserved2 : 2;
207	unsigned char uSystemRAMAreForBIOS : 3;
208	unsigned char uDMAChannel : 7;
209	bool fDMAAutoConfiguration : 1;
210	unsigned char uIrqChannel : 7;
211	bool fIrqAutoConfiguration : 1;
212	uint8_t uDMATransferRate;
213	uint8_t uSCSIId;
214	bool fLowByteTerminated : 1;
215	bool fParityCheckingEnabled : 1;
216	bool fHighByteTerminated : 1;
217	bool fNoisyCablingEnvironment : 1;
218	bool fFastSynchronousNeogtiation : 1;
219	bool fBusResetEnabled : 1;
220	bool fReserved3 : 1;
221	bool fActiveNegotiationEnabled : 1;
222	uint8_t uBusOnDelay;
223	uint8_t uBusOffDelay;
224	bool fHostAdapterBIOSEnabled : 1;
225	bool fBIOSRedirectionOfInt19 : 1;
226	bool fExtendedTranslation : 1;
227	bool fMapRemovableAsFixed : 1;
228	bool fReserved4 : 1;
229	bool fBIOSSupportsMoreThan2Drives : 1;
230	bool fBIOSInterruptMode : 1;
231	bool fFlopticalSupport : 1;
232	uint16_t u16DeviceEnabledMask;
233	uint16_t u16WidePermittedMask;
234	uint16_t u16FastPermittedMask;
235	uint16_t u16SynchronousPermittedMask;
236	uint16_t u16DisconnectPermittedMask;
237	uint16_t u16SendStartUnitCommandMask;
238	uint16_t u16IgnoreInBIOSScanMask;
239	unsigned char uPCIInterruptPin : 2;
240	unsigned char uHostAdapterIoPortAddress : 2;
241	bool fStrictRoundRobinMode : 1;
242	bool fVesaBusSpeedGreaterThan33MHz : 1;
243	bool fVesaBurstWrite : 1;
244	bool fVesaBurstRead : 1;
245	uint16_t u16UltraPermittedMask;
246	uint32_t uReserved5;
247	uint8_t uReserved6;
248	uint8_t uAutoSCSIMaximumLUN;
249	bool fReserved7 : 1;
250	bool fSCAMDominant : 1;
251	bool fSCAMenabled : 1;
252	bool fSCAMLevel2 : 1;
253	unsigned char uReserved8 : 4;
254	bool fInt13Extension : 1;
255	bool fReserved9 : 1;
256	bool fCDROMBoot : 1;
257	unsigned char uReserved10 : 5;
258	unsigned char uBootTargetId : 4;
259	unsigned char uBootChannel : 4;
260	bool fForceBusDeviceScanningOrder : 1;
261	unsigned char uReserved11 : 7;
262	uint16_t u16NonTaggedToAlternateLunPermittedMask;
263	uint16_t u16RenegotiateSyncAfterCheckConditionMask;
264	uint8_t aReserved12[10];
265	uint8_t aManufacturingDiagnostic[2];
266	uint16_t u16Checksum;
267	} AutoSCSIRam, *PAutoSCSIRam;
268	AssertCompileSize(AutoSCSIRam, 64);
269	#pragma pack()
270
271	/**
272	* The local Ram.
273	*/
274	typedef union HostAdapterLocalRam
275	{
276	/** Byte view. */
277	uint8_t u8View[256];
278	/** Structured view. */
279	struct
280	{
281	/** Offset 0 - 63 is for BIOS. */
282	uint8_t u8Bios[64];
283	/** Auto SCSI structure. */
284	AutoSCSIRam autoSCSIData;
285	} structured;
286	} HostAdapterLocalRam, *PHostAdapterLocalRam;
287	AssertCompileSize(HostAdapterLocalRam, 256);
288
289
290	/** Ugly 24-bit big-endian addressing. */
291	typedef struct
292	{
293	uint8_t hi;
294	uint8_t mid;
295	uint8_t lo;
296	} Addr24, Len24;
297	AssertCompileSize(Addr24, 3);
298
299	#define ADDR_TO_U32(x) (((x).hi << 16) \| ((x).mid << 8) \| (x).lo)
300	#define LEN_TO_U32 ADDR_TO_U32
301	#define U32_TO_ADDR(a, x) do {(a).hi = (x) >> 16; (a).mid = (x) >> 8; (a).lo = (x);} while(0)
302	#define U32_TO_LEN U32_TO_ADDR
303
304	/** @name Compatible ISA base I/O port addresses. Disabled if zero.
305	* @{ */
306	#define NUM_ISA_BASES 8
307	#define MAX_ISA_BASE (NUM_ISA_BASES - 1)
308	#define ISA_BASE_DISABLED 6
309
310	#ifdef IN_RING3
311	static uint16_t const g_aISABases[NUM_ISA_BASES] =
312	{
313	0x330, 0x334, 0x230, 0x234, 0x130, 0x134, 0, 0
314	};
315	#endif
316	/** @} */
317
318	/** Pointer to a task state structure. */
319	typedef struct BUSLOGICREQ *PBUSLOGICREQ;
320
321	/**
322	* Main BusLogic device state.
323	*
324	* @extends PDMPCIDEV
325	* @implements PDMILEDPORTS
326	*/
327	typedef struct BUSLOGIC
328	{
329	/** The PCI device structure. */
330	PDMPCIDEV dev;
331	/** Pointer to the device instance - HC ptr */
332	PPDMDEVINSR3 pDevInsR3;
333	/** Pointer to the device instance - R0 ptr */
334	PPDMDEVINSR0 pDevInsR0;
335	/** Pointer to the device instance - RC ptr. */
336	PPDMDEVINSRC pDevInsRC;
337
338	/** Whether R0 is enabled. */
339	bool fR0Enabled;
340	/** Whether RC is enabled. */
341	bool fGCEnabled;
342
343	/** Base address of the I/O ports. */
344	RTIOPORT IOPortBase;
345	/** Base address of the memory mapping. */
346	RTGCPHYS MMIOBase;
347	/** Status register - Readonly. */
348	volatile uint8_t regStatus;
349	/** Interrupt register - Readonly. */
350	volatile uint8_t regInterrupt;
351	/** Geometry register - Readonly. */
352	volatile uint8_t regGeometry;
353	/** Pending (delayed) interrupt. */
354	uint8_t uPendingIntr;
355
356	/** Local RAM for the fetch hostadapter local RAM request.
357	* I don't know how big the buffer really is but the maximum
358	* seems to be 256 bytes because the offset and count field in the command request
359	* are only one byte big.
360	*/
361	HostAdapterLocalRam LocalRam;
362
363	/** Command code the guest issued. */
364	uint8_t uOperationCode;
365	/** Buffer for the command parameters the adapter is currently receiving from the guest.
366	* Size of the largest command which is possible.
367	*/
368	uint8_t aCommandBuffer[BUSLOGIC_COMMAND_SIZE_MAX]; /* Size of the biggest request. */
369	/** Current position in the command buffer. */
370	uint8_t iParameter;
371	/** Parameters left until the command is complete. */
372	uint8_t cbCommandParametersLeft;
373
374	/** Whether we are using the RAM or reply buffer. */
375	bool fUseLocalRam;
376	/** Buffer to store reply data from the controller to the guest. */
377	uint8_t aReplyBuffer[BUSLOGIC_REPLY_SIZE_MAX]; /* Size of the biggest reply. */
378	/** Position in the buffer we are reading next. */
379	uint8_t iReply;
380	/** Bytes left until the reply buffer is empty. */
381	uint8_t cbReplyParametersLeft;
382
383	/** Flag whether IRQs are enabled. */
384	bool fIRQEnabled;
385	/** Flag whether the ISA I/O port range is disabled
386	* to prevent the BIOS to access the device. */
387	bool fISAEnabled; /*< @todo unused, to be removed /
388	/** Flag whether 24-bit mailboxes are in use (default is 32-bit). */
389	bool fMbxIs24Bit;
390	/** ISA I/O port base (encoded in FW-compatible format). */
391	uint8_t uISABaseCode;
392
393	/** ISA I/O port base (disabled if zero). */
394	RTIOPORT IOISABase;
395	/** Default ISA I/O port base in FW-compatible format. */
396	uint8_t uDefaultISABaseCode;
397
398	/** Number of mailboxes the guest set up. */
399	uint32_t cMailbox;
400
401	#if HC_ARCH_BITS == 64
402	uint32_t Alignment0;
403	#endif
404
405	/** Time when HBA reset was last initiated. / /< @todo does this need to be saved? /
406	uint64_t u64ResetTime;
407	/** Physical base address of the outgoing mailboxes. */
408	RTGCPHYS GCPhysAddrMailboxOutgoingBase;
409	/** Current outgoing mailbox position. */
410	uint32_t uMailboxOutgoingPositionCurrent;
411	/** Number of mailboxes ready. */
412	volatile uint32_t cMailboxesReady;
413	/** Whether a notification to R3 was sent. */
414	volatile bool fNotificationSent;
415
416	#if HC_ARCH_BITS == 64
417	uint32_t Alignment1;
418	#endif
419
420	/** Physical base address of the incoming mailboxes. */
421	RTGCPHYS GCPhysAddrMailboxIncomingBase;
422	/** Current incoming mailbox position. */
423	uint32_t uMailboxIncomingPositionCurrent;
424
425	/** Whether strict round robin is enabled. */
426	bool fStrictRoundRobinMode;
427	/** Whether the extended LUN CCB format is enabled for 32 possible logical units. */
428	bool fExtendedLunCCBFormat;
429
430	/** Queue to send tasks to R3. - HC ptr */
431	R3PTRTYPE(PPDMQUEUE) pNotifierQueueR3;
432	/** Queue to send tasks to R3. - HC ptr */
433	R0PTRTYPE(PPDMQUEUE) pNotifierQueueR0;
434	/** Queue to send tasks to R3. - RC ptr */
435	RCPTRTYPE(PPDMQUEUE) pNotifierQueueRC;
436
437	uint32_t Alignment2;
438
439	/** Critical section protecting access to the interrupt status register. */
440	PDMCRITSECT CritSectIntr;
441
442	/** Device state for BIOS access. */
443	VBOXSCSI VBoxSCSI;
444
445	/** BusLogic device states. */
446	BUSLOGICDEVICE aDeviceStates[BUSLOGIC_MAX_DEVICES];
447
448	/** The base interface.
449	* @todo use PDMDEVINS::IBase */
450	PDMIBASE IBase;
451	/** Status Port - Leds interface. */
452	PDMILEDPORTS ILeds;
453	/** Partner of ILeds. */
454	R3PTRTYPE(PPDMILEDCONNECTORS) pLedsConnector;
455	/** Status LUN: Media Notifys. */
456	R3PTRTYPE(PPDMIMEDIANOTIFY) pMediaNotify;
457
458	#if HC_ARCH_BITS == 64
459	uint32_t Alignment3;
460	#endif
461
462	/** Indicates that PDMDevHlpAsyncNotificationCompleted should be called when
463	* a port is entering the idle state. */
464	bool volatile fSignalIdle;
465	/** Flag whether the worker thread is sleeping. */
466	volatile bool fWrkThreadSleeping;
467	/** Flag whether a request from the BIOS is pending which the
468	* worker thread needs to process. */
469	volatile bool fBiosReqPending;
470
471	/** The support driver session handle. */
472	R3R0PTRTYPE(PSUPDRVSESSION) pSupDrvSession;
473	/** Worker thread. */
474	R3PTRTYPE(PPDMTHREAD) pThreadWrk;
475	/** The event semaphore the processing thread waits on. */
476	SUPSEMEVENT hEvtProcess;
477
478	/** Pointer to the array of addresses to redo. */
479	R3PTRTYPE(PRTGCPHYS) paGCPhysAddrCCBRedo;
480	/** Number of addresses the redo array holds. */
481	uint32_t cReqsRedo;
482
483	#ifdef LOG_ENABLED
484	volatile uint32_t cInMailboxesReady;
485	#else
486	# if HC_ARCH_BITS == 64
487	uint32_t Alignment4;
488	# endif
489	#endif
490
491	} BUSLOGIC, *PBUSLOGIC;
492
493	/** Register offsets in the I/O port space. */
494	#define BUSLOGIC_REGISTER_CONTROL 0 /*< Writeonly /
495	/** Fields for the control register. */
496	# define BL_CTRL_RSBUS RT_BIT(4) /* Reset SCSI Bus. */
497	# define BL_CTRL_RINT RT_BIT(5) /* Reset Interrupt. */
498	# define BL_CTRL_RSOFT RT_BIT(6) /* Soft Reset. */
499	# define BL_CTRL_RHARD RT_BIT(7) /* Hard Reset. */
500
501	#define BUSLOGIC_REGISTER_STATUS 0 /*< Readonly /
502	/** Fields for the status register. */
503	# define BL_STAT_CMDINV RT_BIT(0) /* Command Invalid. */
504	# define BL_STAT_DIRRDY RT_BIT(2) /* Data In Register Ready. */
505	# define BL_STAT_CPRBSY RT_BIT(3) /* Command/Parameter Out Register Busy. */
506	# define BL_STAT_HARDY RT_BIT(4) /* Host Adapter Ready. */
507	# define BL_STAT_INREQ RT_BIT(5) /* Initialization Required. */
508	# define BL_STAT_DFAIL RT_BIT(6) /* Diagnostic Failure. */
509	# define BL_STAT_DACT RT_BIT(7) /* Diagnistic Active. */
510
511	#define BUSLOGIC_REGISTER_COMMAND 1 /*< Writeonly /
512	#define BUSLOGIC_REGISTER_DATAIN 1 /*< Readonly /
513	#define BUSLOGIC_REGISTER_INTERRUPT 2 /*< Readonly /
514	/** Fields for the interrupt register. */
515	# define BL_INTR_IMBL RT_BIT(0) /* Incoming Mailbox Loaded. */
516	# define BL_INTR_OMBR RT_BIT(1) /* Outgoing Mailbox Available. */
517	# define BL_INTR_CMDC RT_BIT(2) /* Command Complete. */
518	# define BL_INTR_RSTS RT_BIT(3) /* SCSI Bus Reset State. */
519	# define BL_INTR_INTV RT_BIT(7) /* Interrupt Valid. */
520
521	#define BUSLOGIC_REGISTER_GEOMETRY 3 /* Readonly */
522	# define BL_GEOM_XLATEN RT_BIT(7) /* Extended geometry translation enabled. */
523
524	/** Structure for the INQUIRE_PCI_HOST_ADAPTER_INFORMATION reply. */
525	typedef struct ReplyInquirePCIHostAdapterInformation
526	{
527	uint8_t IsaIOPort;
528	uint8_t IRQ;
529	unsigned char LowByteTerminated : 1;
530	unsigned char HighByteTerminated : 1;
531	unsigned char uReserved : 2; /* Reserved. */
532	unsigned char JP1 : 1; /* Whatever that means. */
533	unsigned char JP2 : 1; /* Whatever that means. */
534	unsigned char JP3 : 1; /* Whatever that means. */
535	/** Whether the provided info is valid. */
536	unsigned char InformationIsValid: 1;
537	uint8_t uReserved2; /* Reserved. */
538	} ReplyInquirePCIHostAdapterInformation, *PReplyInquirePCIHostAdapterInformation;
539	AssertCompileSize(ReplyInquirePCIHostAdapterInformation, 4);
540
541	/** Structure for the INQUIRE_CONFIGURATION reply. */
542	typedef struct ReplyInquireConfiguration
543	{
544	unsigned char uReserved1 : 5;
545	bool fDmaChannel5 : 1;
546	bool fDmaChannel6 : 1;
547	bool fDmaChannel7 : 1;
548	bool fIrqChannel9 : 1;
549	bool fIrqChannel10 : 1;
550	bool fIrqChannel11 : 1;
551	bool fIrqChannel12 : 1;
552	unsigned char uReserved2 : 1;
553	bool fIrqChannel14 : 1;
554	bool fIrqChannel15 : 1;
555	unsigned char uReserved3 : 1;
556	unsigned char uHostAdapterId : 4;
557	unsigned char uReserved4 : 4;
558	} ReplyInquireConfiguration, *PReplyInquireConfiguration;
559	AssertCompileSize(ReplyInquireConfiguration, 3);
560
561	/** Structure for the INQUIRE_SETUP_INFORMATION reply. */
562	typedef struct ReplyInquireSetupInformationSynchronousValue
563	{
564	unsigned char uOffset : 4;
565	unsigned char uTransferPeriod : 3;
566	bool fSynchronous : 1;
567	}ReplyInquireSetupInformationSynchronousValue, *PReplyInquireSetupInformationSynchronousValue;
568	AssertCompileSize(ReplyInquireSetupInformationSynchronousValue, 1);
569
570	typedef struct ReplyInquireSetupInformation
571	{
572	bool fSynchronousInitiationEnabled : 1;
573	bool fParityCheckingEnabled : 1;
574	unsigned char uReserved1 : 6;
575	uint8_t uBusTransferRate;
576	uint8_t uPreemptTimeOnBus;
577	uint8_t uTimeOffBus;
578	uint8_t cMailbox;
579	Addr24 MailboxAddress;
580	ReplyInquireSetupInformationSynchronousValue SynchronousValuesId0To7[8];
581	uint8_t uDisconnectPermittedId0To7;
582	uint8_t uSignature;
583	uint8_t uCharacterD;
584	uint8_t uHostBusType;
585	uint8_t uWideTransferPermittedId0To7;
586	uint8_t uWideTransfersActiveId0To7;
587	ReplyInquireSetupInformationSynchronousValue SynchronousValuesId8To15[8];
588	uint8_t uDisconnectPermittedId8To15;
589	uint8_t uReserved2;
590	uint8_t uWideTransferPermittedId8To15;
591	uint8_t uWideTransfersActiveId8To15;
592	} ReplyInquireSetupInformation, *PReplyInquireSetupInformation;
593	AssertCompileSize(ReplyInquireSetupInformation, 34);
594
595	/** Structure for the INQUIRE_EXTENDED_SETUP_INFORMATION. */
596	#pragma pack(1)
597	typedef struct ReplyInquireExtendedSetupInformation
598	{
599	uint8_t uBusType;
600	uint8_t uBiosAddress;
601	uint16_t u16ScatterGatherLimit;
602	uint8_t cMailbox;
603	uint32_t uMailboxAddressBase;
604	unsigned char uReserved1 : 2;
605	bool fFastEISA : 1;
606	unsigned char uReserved2 : 3;
607	bool fLevelSensitiveInterrupt : 1;
608	unsigned char uReserved3 : 1;
609	unsigned char aFirmwareRevision[3];
610	bool fHostWideSCSI : 1;
611	bool fHostDifferentialSCSI : 1;
612	bool fHostSupportsSCAM : 1;
613	bool fHostUltraSCSI : 1;
614	bool fHostSmartTermination : 1;
615	unsigned char uReserved4 : 3;
616	} ReplyInquireExtendedSetupInformation, *PReplyInquireExtendedSetupInformation;
617	AssertCompileSize(ReplyInquireExtendedSetupInformation, 14);
618	#pragma pack()
619
620	/** Structure for the INITIALIZE EXTENDED MAILBOX request. */
621	#pragma pack(1)
622	typedef struct RequestInitializeExtendedMailbox
623	{
624	/** Number of mailboxes in guest memory. */
625	uint8_t cMailbox;
626	/** Physical address of the first mailbox. */
627	uint32_t uMailboxBaseAddress;
628	} RequestInitializeExtendedMailbox, *PRequestInitializeExtendedMailbox;
629	AssertCompileSize(RequestInitializeExtendedMailbox, 5);
630	#pragma pack()
631
632	/** Structure for the INITIALIZE MAILBOX request. */
633	typedef struct
634	{
635	/** Number of mailboxes to set up. */
636	uint8_t cMailbox;
637	/** Physical address of the first mailbox. */
638	Addr24 aMailboxBaseAddr;
639	} RequestInitMbx, *PRequestInitMbx;
640	AssertCompileSize(RequestInitMbx, 4);
641
642	/**
643	* Structure of a mailbox in guest memory.
644	* The incoming and outgoing mailbox have the same size
645	* but the incoming one has some more fields defined which
646	* are marked as reserved in the outgoing one.
647	* The last field is also different from the type.
648	* For outgoing mailboxes it is the action and
649	* for incoming ones the completion status code for the task.
650	* We use one structure for both types.
651	*/
652	typedef struct Mailbox32
653	{
654	/** Physical address of the CCB structure in the guest memory. */
655	uint32_t u32PhysAddrCCB;
656	/** Type specific data. */
657	union
658	{
659	/** For outgoing mailboxes. */
660	struct
661	{
662	/** Reserved */
663	uint8_t uReserved[3];
664	/** Action code. */
665	uint8_t uActionCode;
666	} out;
667	/** For incoming mailboxes. */
668	struct
669	{
670	/** The host adapter status after finishing the request. */
671	uint8_t uHostAdapterStatus;
672	/** The status of the device which executed the request after executing it. */
673	uint8_t uTargetDeviceStatus;
674	/** Reserved. */
675	uint8_t uReserved;
676	/** The completion status code of the request. */
677	uint8_t uCompletionCode;
678	} in;
679	} u;
680	} Mailbox32, *PMailbox32;
681	AssertCompileSize(Mailbox32, 8);
682
683	/** Old style 24-bit mailbox entry. */
684	typedef struct Mailbox24
685	{
686	/** Mailbox command (incoming) or state (outgoing). */
687	uint8_t uCmdState;
688	/** Physical address of the CCB structure in the guest memory. */
689	Addr24 aPhysAddrCCB;
690	} Mailbox24, *PMailbox24;
691	AssertCompileSize(Mailbox24, 4);
692
693	/**
694	* Action codes for outgoing mailboxes.
695	*/
696	enum BUSLOGIC_MAILBOX_OUTGOING_ACTION
697	{
698	BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE = 0x00,
699	BUSLOGIC_MAILBOX_OUTGOING_ACTION_START_COMMAND = 0x01,
700	BUSLOGIC_MAILBOX_OUTGOING_ACTION_ABORT_COMMAND = 0x02
701	};
702
703	/**
704	* Completion codes for incoming mailboxes.
705	*/
706	enum BUSLOGIC_MAILBOX_INCOMING_COMPLETION
707	{
708	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_FREE = 0x00,
709	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITHOUT_ERROR = 0x01,
710	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_ABORTED = 0x02,
711	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_ABORTED_NOT_FOUND = 0x03,
712	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR = 0x04,
713	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_INVALID_CCB = 0x05
714	};
715
716	/**
717	* Host adapter status for incoming mailboxes.
718	*/
719	enum BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS
720	{
721	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_CMD_COMPLETED = 0x00,
722	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_LINKED_CMD_COMPLETED = 0x0a,
723	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_LINKED_CMD_COMPLETED_WITH_FLAG = 0x0b,
724	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_DATA_UNDERUN = 0x0c,
725	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_SCSI_SELECTION_TIMEOUT = 0x11,
726	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_DATA_OVERRUN = 0x12,
727	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_UNEXPECTED_BUS_FREE = 0x13,
728	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_BUS_PHASE_REQUESTED = 0x14,
729	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_OUTGOING_MAILBOX_ACTION_CODE = 0x15,
730	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_COMMAND_OPERATION_CODE = 0x16,
731	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_LINKED_CCB_HAS_INVALID_LUN = 0x17,
732	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_COMMAND_PARAMETER = 0x1a,
733	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_AUTO_REQUEST_SENSE_FAILED = 0x1b,
734	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_TAGGED_QUEUING_MESSAGE_REJECTED = 0x1c,
735	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_UNSUPPORTED_MESSAGE_RECEIVED = 0x1d,
736	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_HARDWARE_FAILED = 0x20,
737	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_TARGET_FAILED_RESPONSE_TO_ATN = 0x21,
738	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_ASSERTED_RST = 0x22,
739	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_OTHER_DEVICE_ASSERTED_RST = 0x23,
740	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_TARGET_DEVICE_RECONNECTED_IMPROPERLY = 0x24,
741	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_ASSERTED_BUS_DEVICE_RESET = 0x25,
742	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_ABORT_QUEUE_GENERATED = 0x26,
743	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_SOFTWARE_ERROR = 0x27,
744	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_HARDWARE_TIMEOUT_ERROR = 0x30,
745	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_SCSI_PARITY_ERROR_DETECTED = 0x34
746	};
747
748	/**
749	* Device status codes for incoming mailboxes.
750	*/
751	enum BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS
752	{
753	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD = 0x00,
754	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_CHECK_CONDITION = 0x02,
755	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_DEVICE_BUSY = 0x08
756	};
757
758	/**
759	* Opcode types for CCB.
760	*/
761	enum BUSLOGIC_CCB_OPCODE
762	{
763	BUSLOGIC_CCB_OPCODE_INITIATOR_CCB = 0x00,
764	BUSLOGIC_CCB_OPCODE_TARGET_CCB = 0x01,
765	BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_SCATTER_GATHER = 0x02,
766	BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_DATA_LENGTH = 0x03,
767	BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_SCATTER_GATHER = 0x04,
768	BUSLOGIC_CCB_OPCODE_BUS_DEVICE_RESET = 0x81
769	};
770
771	/**
772	* Data transfer direction.
773	*/
774	enum BUSLOGIC_CCB_DIRECTION
775	{
776	BUSLOGIC_CCB_DIRECTION_UNKNOWN = 0x00,
777	BUSLOGIC_CCB_DIRECTION_IN = 0x01,
778	BUSLOGIC_CCB_DIRECTION_OUT = 0x02,
779	BUSLOGIC_CCB_DIRECTION_NO_DATA = 0x03
780	};
781
782	/**
783	* The command control block for a SCSI request.
784	*/
785	typedef struct CCB32
786	{
787	/** Opcode. */
788	uint8_t uOpcode;
789	/** Reserved */
790	unsigned char uReserved1 : 3;
791	/** Data direction for the request. */
792	unsigned char uDataDirection : 2;
793	/** Whether the request is tag queued. */
794	bool fTagQueued : 1;
795	/** Queue tag mode. */
796	unsigned char uQueueTag : 2;
797	/** Length of the SCSI CDB. */
798	uint8_t cbCDB;
799	/** Sense data length. */
800	uint8_t cbSenseData;
801	/** Data length. */
802	uint32_t cbData;
803	/** Data pointer.
804	* This points to the data region or a scatter gather list based on the opcode.
805	*/
806	uint32_t u32PhysAddrData;
807	/** Reserved. */
808	uint8_t uReserved2[2];
809	/** Host adapter status. */
810	uint8_t uHostAdapterStatus;
811	/** Device adapter status. */
812	uint8_t uDeviceStatus;
813	/** The device the request is sent to. */
814	uint8_t uTargetId;
815	/*The LUN in the device. /
816	unsigned char uLogicalUnit : 5;
817	/** Legacy tag. */
818	bool fLegacyTagEnable : 1;
819	/** Legacy queue tag. */
820	unsigned char uLegacyQueueTag : 2;
821	/** The SCSI CDB. (A CDB can be 12 bytes long.) */
822	uint8_t abCDB[12];
823	/** Reserved. */
824	uint8_t uReserved3[6];
825	/** Sense data pointer. */
826	uint32_t u32PhysAddrSenseData;
827	} CCB32, *PCCB32;
828	AssertCompileSize(CCB32, 40);
829
830
831	/**
832	* The 24-bit command control block.
833	*/
834	typedef struct CCB24
835	{
836	/** Opcode. */
837	uint8_t uOpcode;
838	/** The LUN in the device. */
839	unsigned char uLogicalUnit : 3;
840	/** Data direction for the request. */
841	unsigned char uDataDirection : 2;
842	/** The target device ID. */
843	unsigned char uTargetId : 3;
844	/** Length of the SCSI CDB. */
845	uint8_t cbCDB;
846	/** Sense data length. */
847	uint8_t cbSenseData;
848	/** Data length. */
849	Len24 acbData;
850	/** Data pointer.
851	* This points to the data region or a scatter gather list based on the opc
852	*/
853	Addr24 aPhysAddrData;
854	/** Pointer to next CCB for linked commands. */
855	Addr24 aPhysAddrLink;
856	/** Command linking identifier. */
857	uint8_t uLinkId;
858	/** Host adapter status. */
859	uint8_t uHostAdapterStatus;
860	/** Device adapter status. */
861	uint8_t uDeviceStatus;
862	/** Two unused bytes. */
863	uint8_t aReserved[2];
864	/** The SCSI CDB. (A CDB can be 12 bytes long.) */
865	uint8_t abCDB[12];
866	} CCB24, *PCCB24;
867	AssertCompileSize(CCB24, 30);
868
869	/**
870	* The common 24-bit/32-bit command control block. The 32-bit CCB is laid out
871	* such that many fields are in the same location as in the older 24-bit CCB.
872	*/
873	typedef struct CCBC
874	{
875	/** Opcode. */
876	uint8_t uOpcode;
877	/** The LUN in the device. */
878	unsigned char uPad1 : 3;
879	/** Data direction for the request. */
880	unsigned char uDataDirection : 2;
881	/** The target device ID. */
882	unsigned char uPad2 : 3;
883	/** Length of the SCSI CDB. */
884	uint8_t cbCDB;
885	/** Sense data length. */
886	uint8_t cbSenseData;
887	uint8_t aPad1[10];
888	/** Host adapter status. */
889	uint8_t uHostAdapterStatus;
890	/** Device adapter status. */
891	uint8_t uDeviceStatus;
892	uint8_t aPad2[2];
893	/** The SCSI CDB (up to 12 bytes). */
894	uint8_t abCDB[12];
895	} CCBC, *PCCBC;
896	AssertCompileSize(CCBC, 30);
897
898	/* Make sure that the 24-bit/32-bit/common CCB offsets match. */
899	AssertCompileMemberOffset(CCBC, cbCDB, 2);
900	AssertCompileMemberOffset(CCB24, cbCDB, 2);
901	AssertCompileMemberOffset(CCB32, cbCDB, 2);
902	AssertCompileMemberOffset(CCBC, uHostAdapterStatus, 14);
903	AssertCompileMemberOffset(CCB24, uHostAdapterStatus, 14);
904	AssertCompileMemberOffset(CCB32, uHostAdapterStatus, 14);
905	AssertCompileMemberOffset(CCBC, abCDB, 18);
906	AssertCompileMemberOffset(CCB24, abCDB, 18);
907	AssertCompileMemberOffset(CCB32, abCDB, 18);
908
909	/** A union of all CCB types (24-bit/32-bit/common). */
910	typedef union CCBU
911	{
912	CCB32 n; /*< New 32-bit CCB. /
913	CCB24 o; /*< Old 24-bit CCB. /
914	CCBC c; /*< Common CCB subset. /
915	} CCBU, *PCCBU;
916
917	/** 32-bit scatter-gather list entry. */
918	typedef struct SGE32
919	{
920	uint32_t cbSegment;
921	uint32_t u32PhysAddrSegmentBase;
922	} SGE32, *PSGE32;
923	AssertCompileSize(SGE32, 8);
924
925	/** 24-bit scatter-gather list entry. */
926	typedef struct SGE24
927	{
928	Len24 acbSegment;
929	Addr24 aPhysAddrSegmentBase;
930	} SGE24, *PSGE24;
931	AssertCompileSize(SGE24, 6);
932
933	/**
934	* The structure for the "Execute SCSI Command" command.
935	*/
936	typedef struct ESCMD
937	{
938	/** Data length. */
939	uint32_t cbData;
940	/** Data pointer. */
941	uint32_t u32PhysAddrData;
942	/** The device the request is sent to. */
943	uint8_t uTargetId;
944	/** The LUN in the device. */
945	uint8_t uLogicalUnit;
946	/** Reserved */
947	unsigned char uReserved1 : 3;
948	/** Data direction for the request. */
949	unsigned char uDataDirection : 2;
950	/** Reserved */
951	unsigned char uReserved2 : 3;
952	/** Length of the SCSI CDB. */
953	uint8_t cbCDB;
954	/** The SCSI CDB. (A CDB can be 12 bytes long.) */
955	uint8_t abCDB[12];
956	} ESCMD, *PESCMD;
957	AssertCompileSize(ESCMD, 24);
958
959	/**
960	* Task state for a CCB request.
961	*/
962	typedef struct BUSLOGICREQ
963	{
964	/** PDM extended media interface I/O request hande. */
965	PDMMEDIAEXIOREQ hIoReq;
966	/** Device this task is assigned to. */
967	PBUSLOGICDEVICE pTargetDevice;
968	/** The command control block from the guest. */
969	CCBU CCBGuest;
970	/** Guest physical address of th CCB. */
971	RTGCPHYS GCPhysAddrCCB;
972	/** Pointer to the R3 sense buffer. */
973	uint8_t *pbSenseBuffer;
974	/** Flag whether this is a request from the BIOS. */
975	bool fBIOS;
976	/** 24-bit request flag (default is 32-bit). */
977	bool fIs24Bit;
978	/** SCSI status code. */
979	uint8_t u8ScsiSts;
980	} BUSLOGICREQ;
981
982	#ifdef IN_RING3
983	/**
984	* Memory buffer callback.
985	*
986	* @returns nothing.
987	* @param pThis The LsiLogic controller instance.
988	* @param GCPhys The guest physical address of the memory buffer.
989	* @param pSgBuf The pointer to the host R3 S/G buffer.
990	* @param cbCopy How many bytes to copy between the two buffers.
991	* @param pcbSkip Initially contains the amount of bytes to skip
992	* starting from the guest physical address before
993	* accessing the S/G buffer and start copying data.
994	* On return this contains the remaining amount if
995	* cbCopy < *pcbSkip or 0 otherwise.
996	*/
997	typedef DECLCALLBACK(void) BUSLOGICR3MEMCOPYCALLBACK(PBUSLOGIC pThis, RTGCPHYS GCPhys, PRTSGBUF pSgBuf, size_t cbCopy,
998	size_t *pcbSkip);
999	/** Pointer to a memory copy buffer callback. */
1000	typedef BUSLOGICR3MEMCOPYCALLBACK *PBUSLOGICR3MEMCOPYCALLBACK;
1001	#endif
1002
1003	#ifndef VBOX_DEVICE_STRUCT_TESTCASE
1004
1005
1006	/*********************************************************************************************************************************
1007	* Internal Functions *
1008	*********************************************************************************************************************************/
1009	#ifdef IN_RING3
1010	static int buslogicR3RegisterISARange(PBUSLOGIC pBusLogic, uint8_t uBaseCode);
1011	#endif
1012
1013
1014	/**
1015	* Assert IRQ line of the BusLogic adapter.
1016	*
1017	* @returns nothing.
1018	* @param pBusLogic Pointer to the BusLogic device instance.
1019	* @param fSuppressIrq Flag to suppress IRQ generation regardless of fIRQEnabled
1020	* @param uIrqType Type of interrupt being generated.
1021	*/
1022	static void buslogicSetInterrupt(PBUSLOGIC pBusLogic, bool fSuppressIrq, uint8_t uIrqType)
1023	{
1024	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
1025
1026	/* The CMDC interrupt has priority over IMBL and OMBR. */
1027	if (uIrqType & (BL_INTR_IMBL \| BL_INTR_OMBR))
1028	{
1029	if (!(pBusLogic->regInterrupt & BL_INTR_CMDC))
1030	pBusLogic->regInterrupt \|= uIrqType; /* Report now. */
1031	else
1032	pBusLogic->uPendingIntr \|= uIrqType; /* Report later. */
1033	}
1034	else if (uIrqType & BL_INTR_CMDC)
1035	{
1036	AssertMsg(pBusLogic->regInterrupt == 0 \|\| pBusLogic->regInterrupt == (BL_INTR_INTV \| BL_INTR_CMDC),
1037	("regInterrupt=%02X\n", pBusLogic->regInterrupt));
1038	pBusLogic->regInterrupt \|= uIrqType;
1039	}
1040	else
1041	AssertMsgFailed(("Invalid interrupt state!\n"));
1042
1043	pBusLogic->regInterrupt \|= BL_INTR_INTV;
1044	if (pBusLogic->fIRQEnabled && !fSuppressIrq)
1045	PDMDevHlpPCISetIrq(pBusLogic->CTX_SUFF(pDevIns), 0, 1);
1046	}
1047
1048	/**
1049	* Deasserts the interrupt line of the BusLogic adapter.
1050	*
1051	* @returns nothing.
1052	* @param pBusLogic Pointer to the BusLogic device instance.
1053	*/
1054	static void buslogicClearInterrupt(PBUSLOGIC pBusLogic)
1055	{
1056	LogFlowFunc(("pBusLogic=%#p, clearing %#02x (pending %#02x)\n",
1057	pBusLogic, pBusLogic->regInterrupt, pBusLogic->uPendingIntr));
1058	pBusLogic->regInterrupt = 0;
1059	PDMDevHlpPCISetIrq(pBusLogic->CTX_SUFF(pDevIns), 0, 0);
1060	/* If there's another pending interrupt, report it now. */
1061	if (pBusLogic->uPendingIntr)
1062	{
1063	buslogicSetInterrupt(pBusLogic, false, pBusLogic->uPendingIntr);
1064	pBusLogic->uPendingIntr = 0;
1065	}
1066	}
1067
1068	#if defined(IN_RING3)
1069
1070	/**
1071	* Advances the mailbox pointer to the next slot.
1072	*
1073	* @returns nothing.
1074	* @param pBusLogic The BusLogic controller instance.
1075	*/
1076	DECLINLINE(void) buslogicR3OutgoingMailboxAdvance(PBUSLOGIC pBusLogic)
1077	{
1078	pBusLogic->uMailboxOutgoingPositionCurrent = (pBusLogic->uMailboxOutgoingPositionCurrent + 1) % pBusLogic->cMailbox;
1079	}
1080
1081	/**
1082	* Initialize local RAM of host adapter with default values.
1083	*
1084	* @returns nothing.
1085	* @param pBusLogic The BusLogic controller instance.
1086	*/
1087	static void buslogicR3InitializeLocalRam(PBUSLOGIC pBusLogic)
1088	{
1089	/*
1090	* These values are mostly from what I think is right
1091	* looking at the dmesg output from a Linux guest inside
1092	* a VMware server VM.
1093	*
1094	* So they don't have to be right :)
1095	*/
1096	memset(pBusLogic->LocalRam.u8View, 0, sizeof(HostAdapterLocalRam));
1097	pBusLogic->LocalRam.structured.autoSCSIData.fLevelSensitiveInterrupt = true;
1098	pBusLogic->LocalRam.structured.autoSCSIData.fParityCheckingEnabled = true;
1099	pBusLogic->LocalRam.structured.autoSCSIData.fExtendedTranslation = true; /* Same as in geometry register. */
1100	pBusLogic->LocalRam.structured.autoSCSIData.u16DeviceEnabledMask = UINT16_MAX; /* All enabled. Maybe mask out non present devices? */
1101	pBusLogic->LocalRam.structured.autoSCSIData.u16WidePermittedMask = UINT16_MAX;
1102	pBusLogic->LocalRam.structured.autoSCSIData.u16FastPermittedMask = UINT16_MAX;
1103	pBusLogic->LocalRam.structured.autoSCSIData.u16SynchronousPermittedMask = UINT16_MAX;
1104	pBusLogic->LocalRam.structured.autoSCSIData.u16DisconnectPermittedMask = UINT16_MAX;
1105	pBusLogic->LocalRam.structured.autoSCSIData.fStrictRoundRobinMode = pBusLogic->fStrictRoundRobinMode;
1106	pBusLogic->LocalRam.structured.autoSCSIData.u16UltraPermittedMask = UINT16_MAX;
1107	/** @todo calculate checksum? */
1108	}
1109
1110	/**
1111	* Do a hardware reset of the buslogic adapter.
1112	*
1113	* @returns VBox status code.
1114	* @param pBusLogic Pointer to the BusLogic device instance.
1115	* @param fResetIO Flag determining whether ISA I/O should be reset.
1116	*/
1117	static int buslogicR3HwReset(PBUSLOGIC pBusLogic, bool fResetIO)
1118	{
1119	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
1120
1121	/* Reset registers to default values. */
1122	pBusLogic->regStatus = BL_STAT_HARDY \| BL_STAT_INREQ;
1123	pBusLogic->regGeometry = BL_GEOM_XLATEN;
1124	pBusLogic->uOperationCode = 0xff; /* No command executing. */
1125	pBusLogic->iParameter = 0;
1126	pBusLogic->cbCommandParametersLeft = 0;
1127	pBusLogic->fIRQEnabled = true;
1128	pBusLogic->fStrictRoundRobinMode = false;
1129	pBusLogic->fExtendedLunCCBFormat = false;
1130	pBusLogic->uMailboxOutgoingPositionCurrent = 0;
1131	pBusLogic->uMailboxIncomingPositionCurrent = 0;
1132
1133	/* Clear any active/pending interrupts. */
1134	pBusLogic->uPendingIntr = 0;
1135	buslogicClearInterrupt(pBusLogic);
1136
1137	/* Guest-initiated HBA reset does not affect ISA port I/O. */
1138	if (fResetIO)
1139	{
1140	buslogicR3RegisterISARange(pBusLogic, pBusLogic->uDefaultISABaseCode);
1141	}
1142	buslogicR3InitializeLocalRam(pBusLogic);
1143	vboxscsiInitialize(&pBusLogic->VBoxSCSI);
1144
1145	return VINF_SUCCESS;
1146	}
1147
1148	#endif /* IN_RING3 */
1149
1150	/**
1151	* Resets the command state machine for the next command and notifies the guest.
1152	*
1153	* @returns nothing.
1154	* @param pBusLogic Pointer to the BusLogic device instance
1155	* @param fSuppressIrq Flag to suppress IRQ generation regardless of current state
1156	*/
1157	static void buslogicCommandComplete(PBUSLOGIC pBusLogic, bool fSuppressIrq)
1158	{
1159	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
1160
1161	pBusLogic->fUseLocalRam = false;
1162	pBusLogic->regStatus \|= BL_STAT_HARDY;
1163	pBusLogic->iReply = 0;
1164
1165	/* Modify I/O address does not generate an interrupt. */
1166	if (pBusLogic->uOperationCode != BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND)
1167	{
1168	/* Notify that the command is complete. */
1169	pBusLogic->regStatus &= ~BL_STAT_DIRRDY;
1170	buslogicSetInterrupt(pBusLogic, fSuppressIrq, BL_INTR_CMDC);
1171	}
1172
1173	pBusLogic->uOperationCode = 0xff;
1174	pBusLogic->iParameter = 0;
1175	}
1176
1177	#if defined(IN_RING3)
1178
1179	/**
1180	* Initiates a hard reset which was issued from the guest.
1181	*
1182	* @returns nothing
1183	* @param pBusLogic Pointer to the BusLogic device instance.
1184	* @param fHardReset Flag initiating a hard (vs. soft) reset.
1185	*/
1186	static void buslogicR3InitiateReset(PBUSLOGIC pBusLogic, bool fHardReset)
1187	{
1188	LogFlowFunc(("pBusLogic=%#p fHardReset=%d\n", pBusLogic, fHardReset));
1189
1190	buslogicR3HwReset(pBusLogic, false);
1191
1192	if (fHardReset)
1193	{
1194	/* Set the diagnostic active bit in the status register and clear the ready state. */
1195	pBusLogic->regStatus \|= BL_STAT_DACT;
1196	pBusLogic->regStatus &= ~BL_STAT_HARDY;
1197
1198	/* Remember when the guest initiated a reset (after we're done resetting). */
1199	pBusLogic->u64ResetTime = PDMDevHlpTMTimeVirtGetNano(pBusLogic->CTX_SUFF(pDevIns));
1200	}
1201	}
1202
1203	/**
1204	* Send a mailbox with set status codes to the guest.
1205	*
1206	* @returns nothing.
1207	* @param pBusLogic Pointer to the BusLogic device instance.
1208	* @param GCPhysAddrCCB The physical guest address of the CCB the mailbox is for.
1209	* @param pCCBGuest The command control block.
1210	* @param uHostAdapterStatus The host adapter status code to set.
1211	* @param uDeviceStatus The target device status to set.
1212	* @param uMailboxCompletionCode Completion status code to set in the mailbox.
1213	*/
1214	static void buslogicR3SendIncomingMailbox(PBUSLOGIC pBusLogic, RTGCPHYS GCPhysAddrCCB,
1215	PCCBU pCCBGuest, uint8_t uHostAdapterStatus,
1216	uint8_t uDeviceStatus, uint8_t uMailboxCompletionCode)
1217	{
1218	Mailbox32 MbxIn;
1219
1220	MbxIn.u32PhysAddrCCB = (uint32_t)GCPhysAddrCCB;
1221	MbxIn.u.in.uHostAdapterStatus = uHostAdapterStatus;
1222	MbxIn.u.in.uTargetDeviceStatus = uDeviceStatus;
1223	MbxIn.u.in.uCompletionCode = uMailboxCompletionCode;
1224
1225	int rc = PDMCritSectEnter(&pBusLogic->CritSectIntr, VINF_SUCCESS);
1226	AssertRC(rc);
1227
1228	RTGCPHYS GCPhysAddrMailboxIncoming = pBusLogic->GCPhysAddrMailboxIncomingBase
1229	+ ( pBusLogic->uMailboxIncomingPositionCurrent
1230	* (pBusLogic->fMbxIs24Bit ? sizeof(Mailbox24) : sizeof(Mailbox32)) );
1231
1232	if (uMailboxCompletionCode != BUSLOGIC_MAILBOX_INCOMING_COMPLETION_ABORTED_NOT_FOUND)
1233	{
1234	LogFlowFunc(("Completing CCB %RGp hstat=%u, dstat=%u, outgoing mailbox at %RGp\n", GCPhysAddrCCB,
1235	uHostAdapterStatus, uDeviceStatus, GCPhysAddrMailboxIncoming));
1236
1237	/* Update CCB. */
1238	pCCBGuest->c.uHostAdapterStatus = uHostAdapterStatus;
1239	pCCBGuest->c.uDeviceStatus = uDeviceStatus;
1240	/* Rewrite CCB up to the CDB; perhaps more than necessary. */
1241	PDMDevHlpPCIPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrCCB,
1242	pCCBGuest, RT_OFFSETOF(CCBC, abCDB));
1243	}
1244
1245	# ifdef RT_STRICT
1246	uint8_t uCode;
1247	unsigned uCodeOffs = pBusLogic->fMbxIs24Bit ? RT_OFFSETOF(Mailbox24, uCmdState) : RT_OFFSETOF(Mailbox32, u.out.uActionCode);
1248	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxIncoming + uCodeOffs, &uCode, sizeof(uCode));
1249	Assert(uCode == BUSLOGIC_MAILBOX_INCOMING_COMPLETION_FREE);
1250	# endif
1251
1252	/* Update mailbox. */
1253	if (pBusLogic->fMbxIs24Bit)
1254	{
1255	Mailbox24 Mbx24;
1256
1257	Mbx24.uCmdState = MbxIn.u.in.uCompletionCode;
1258	U32_TO_ADDR(Mbx24.aPhysAddrCCB, MbxIn.u32PhysAddrCCB);
1259	Log(("24-bit mailbox: completion code=%u, CCB at %RGp\n", Mbx24.uCmdState, (RTGCPHYS)ADDR_TO_U32(Mbx24.aPhysAddrCCB)));
1260	PDMDevHlpPCIPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxIncoming, &Mbx24, sizeof(Mailbox24));
1261	}
1262	else
1263	{
1264	Log(("32-bit mailbox: completion code=%u, CCB at %RGp\n", MbxIn.u.in.uCompletionCode, GCPhysAddrCCB));
1265	PDMDevHlpPCIPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxIncoming,
1266	&MbxIn, sizeof(Mailbox32));
1267	}
1268
1269	/* Advance to next mailbox position. */
1270	pBusLogic->uMailboxIncomingPositionCurrent++;
1271	if (pBusLogic->uMailboxIncomingPositionCurrent >= pBusLogic->cMailbox)
1272	pBusLogic->uMailboxIncomingPositionCurrent = 0;
1273
1274	# ifdef LOG_ENABLED
1275	ASMAtomicIncU32(&pBusLogic->cInMailboxesReady);
1276	# endif
1277
1278	buslogicSetInterrupt(pBusLogic, false, BL_INTR_IMBL);
1279
1280	PDMCritSectLeave(&pBusLogic->CritSectIntr);
1281	}
1282
1283	# ifdef LOG_ENABLED
1284
1285	/**
1286	* Dumps the content of a mailbox for debugging purposes.
1287	*
1288	* @return nothing
1289	* @param pMailbox The mailbox to dump.
1290	* @param fOutgoing true if dumping the outgoing state.
1291	* false if dumping the incoming state.
1292	*/
1293	static void buslogicR3DumpMailboxInfo(PMailbox32 pMailbox, bool fOutgoing)
1294	{
1295	Log(("%s: Dump for %s mailbox:\n", __FUNCTION__, fOutgoing ? "outgoing" : "incoming"));
1296	Log(("%s: u32PhysAddrCCB=%#x\n", __FUNCTION__, pMailbox->u32PhysAddrCCB));
1297	if (fOutgoing)
1298	{
1299	Log(("%s: uActionCode=%u\n", __FUNCTION__, pMailbox->u.out.uActionCode));
1300	}
1301	else
1302	{
1303	Log(("%s: uHostAdapterStatus=%u\n", __FUNCTION__, pMailbox->u.in.uHostAdapterStatus));
1304	Log(("%s: uTargetDeviceStatus=%u\n", __FUNCTION__, pMailbox->u.in.uTargetDeviceStatus));
1305	Log(("%s: uCompletionCode=%u\n", __FUNCTION__, pMailbox->u.in.uCompletionCode));
1306	}
1307	}
1308
1309	/**
1310	* Dumps the content of a command control block for debugging purposes.
1311	*
1312	* @returns nothing.
1313	* @param pCCB Pointer to the command control block to dump.
1314	* @param fIs24BitCCB Flag to determine CCB format.
1315	*/
1316	static void buslogicR3DumpCCBInfo(PCCBU pCCB, bool fIs24BitCCB)
1317	{
1318	Log(("%s: Dump for %s Command Control Block:\n", __FUNCTION__, fIs24BitCCB ? "24-bit" : "32-bit"));
1319	Log(("%s: uOpCode=%#x\n", __FUNCTION__, pCCB->c.uOpcode));
1320	Log(("%s: uDataDirection=%u\n", __FUNCTION__, pCCB->c.uDataDirection));
1321	Log(("%s: cbCDB=%u\n", __FUNCTION__, pCCB->c.cbCDB));
1322	Log(("%s: cbSenseData=%u\n", __FUNCTION__, pCCB->c.cbSenseData));
1323	Log(("%s: uHostAdapterStatus=%u\n", __FUNCTION__, pCCB->c.uHostAdapterStatus));
1324	Log(("%s: uDeviceStatus=%u\n", __FUNCTION__, pCCB->c.uDeviceStatus));
1325	if (fIs24BitCCB)
1326	{
1327	Log(("%s: cbData=%u\n", __FUNCTION__, LEN_TO_U32(pCCB->o.acbData)));
1328	Log(("%s: PhysAddrData=%#x\n", __FUNCTION__, ADDR_TO_U32(pCCB->o.aPhysAddrData)));
1329	Log(("%s: uTargetId=%u\n", __FUNCTION__, pCCB->o.uTargetId));
1330	Log(("%s: uLogicalUnit=%u\n", __FUNCTION__, pCCB->o.uLogicalUnit));
1331	}
1332	else
1333	{
1334	Log(("%s: cbData=%u\n", __FUNCTION__, pCCB->n.cbData));
1335	Log(("%s: PhysAddrData=%#x\n", __FUNCTION__, pCCB->n.u32PhysAddrData));
1336	Log(("%s: uTargetId=%u\n", __FUNCTION__, pCCB->n.uTargetId));
1337	Log(("%s: uLogicalUnit=%u\n", __FUNCTION__, pCCB->n.uLogicalUnit));
1338	Log(("%s: fTagQueued=%d\n", __FUNCTION__, pCCB->n.fTagQueued));
1339	Log(("%s: uQueueTag=%u\n", __FUNCTION__, pCCB->n.uQueueTag));
1340	Log(("%s: fLegacyTagEnable=%u\n", __FUNCTION__, pCCB->n.fLegacyTagEnable));
1341	Log(("%s: uLegacyQueueTag=%u\n", __FUNCTION__, pCCB->n.uLegacyQueueTag));
1342	Log(("%s: PhysAddrSenseData=%#x\n", __FUNCTION__, pCCB->n.u32PhysAddrSenseData));
1343	}
1344	Log(("%s: uCDB[0]=%#x\n", __FUNCTION__, pCCB->c.abCDB[0]));
1345	for (int i = 1; i < pCCB->c.cbCDB; i++)
1346	Log(("%s: uCDB[%d]=%u\n", __FUNCTION__, i, pCCB->c.abCDB[i]));
1347	}
1348
1349	# endif /* LOG_ENABLED */
1350
1351	/**
1352	* Allocate data buffer.
1353	*
1354	* @param pDevIns PDM device instance.
1355	* @param fIs24Bit Flag whether the 24bit SG format is used.
1356	* @param GCSGList Guest physical address of S/G list.
1357	* @param cEntries Number of list entries to read.
1358	* @param pSGEList Pointer to 32-bit S/G list storage.
1359	*/
1360	static void buslogicR3ReadSGEntries(PPDMDEVINS pDevIns, bool fIs24Bit, RTGCPHYS GCSGList,
1361	uint32_t cEntries, SGE32 *pSGEList)
1362	{
1363	/* Read the S/G entries. Convert 24-bit entries to 32-bit format. */
1364	if (fIs24Bit)
1365	{
1366	SGE24 aSGE24[32];
1367	Assert(cEntries <= RT_ELEMENTS(aSGE24));
1368
1369	Log2(("Converting %u 24-bit S/G entries to 32-bit\n", cEntries));
1370	PDMDevHlpPhysRead(pDevIns, GCSGList, &aSGE24, cEntries * sizeof(SGE24));
1371	for (uint32_t i = 0; i < cEntries; ++i)
1372	{
1373	pSGEList[i].cbSegment = LEN_TO_U32(aSGE24[i].acbSegment);
1374	pSGEList[i].u32PhysAddrSegmentBase = ADDR_TO_U32(aSGE24[i].aPhysAddrSegmentBase);
1375	}
1376	}
1377	else
1378	PDMDevHlpPhysRead(pDevIns, GCSGList, pSGEList, cEntries * sizeof(SGE32));
1379	}
1380
1381	/**
1382	* Determines the size of th guest data buffer.
1383	*
1384	* @returns VBox status code.
1385	* @param pDevIns PDM device instance.
1386	* @param pCCBGuest The CCB of the guest.
1387	* @param fIs24Bit Flag whether the 24bit SG format is used.
1388	* @param pcbBuf Where to store the size of the guest data buffer on success.
1389	*/
1390	static int buslogicR3QueryDataBufferSize(PPDMDEVINS pDevIns, PCCBU pCCBGuest, bool fIs24Bit, size_t *pcbBuf)
1391	{
1392	int rc = VINF_SUCCESS;
1393	uint32_t cbDataCCB;
1394	uint32_t u32PhysAddrCCB;
1395	size_t cbBuf = 0;
1396
1397	/* Extract the data length and physical address from the CCB. */
1398	if (fIs24Bit)
1399	{
1400	u32PhysAddrCCB = ADDR_TO_U32(pCCBGuest->o.aPhysAddrData);
1401	cbDataCCB = LEN_TO_U32(pCCBGuest->o.acbData);
1402	}
1403	else
1404	{
1405	u32PhysAddrCCB = pCCBGuest->n.u32PhysAddrData;
1406	cbDataCCB = pCCBGuest->n.cbData;
1407	}
1408
1409	if ( (pCCBGuest->c.uDataDirection != BUSLOGIC_CCB_DIRECTION_NO_DATA)
1410	&& cbDataCCB)
1411	{
1412	/*
1413	* The BusLogic adapter can handle two different data buffer formats.
1414	* The first one is that the data pointer entry in the CCB points to
1415	* the buffer directly. In second mode the data pointer points to a
1416	* scatter gather list which describes the buffer.
1417	*/
1418	if ( (pCCBGuest->c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_SCATTER_GATHER)
1419	\|\| (pCCBGuest->c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_SCATTER_GATHER))
1420	{
1421	uint32_t cScatterGatherGCRead;
1422	uint32_t iScatterGatherEntry;
1423	SGE32 aScatterGatherReadGC[32]; /* A buffer for scatter gather list entries read from guest memory. */
1424	uint32_t cScatterGatherGCLeft = cbDataCCB / (fIs24Bit ? sizeof(SGE24) : sizeof(SGE32));
1425	RTGCPHYS GCPhysAddrScatterGatherCurrent = u32PhysAddrCCB;
1426
1427	/* Count number of bytes to transfer. */
1428	do
1429	{
1430	cScatterGatherGCRead = (cScatterGatherGCLeft < RT_ELEMENTS(aScatterGatherReadGC))
1431	? cScatterGatherGCLeft
1432	: RT_ELEMENTS(aScatterGatherReadGC);
1433	cScatterGatherGCLeft -= cScatterGatherGCRead;
1434
1435	buslogicR3ReadSGEntries(pDevIns, fIs24Bit, GCPhysAddrScatterGatherCurrent, cScatterGatherGCRead, aScatterGatherReadGC);
1436
1437	for (iScatterGatherEntry = 0; iScatterGatherEntry < cScatterGatherGCRead; iScatterGatherEntry++)
1438	cbBuf += aScatterGatherReadGC[iScatterGatherEntry].cbSegment;
1439
1440	/* Set address to the next entries to read. */
1441	GCPhysAddrScatterGatherCurrent += cScatterGatherGCRead * (fIs24Bit ? sizeof(SGE24) : sizeof(SGE32));
1442	} while (cScatterGatherGCLeft > 0);
1443
1444	Log(("%s: cbBuf=%d\n", __FUNCTION__, cbBuf));
1445	}
1446	else if ( pCCBGuest->c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB
1447	\|\| pCCBGuest->c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_DATA_LENGTH)
1448	cbBuf = cbDataCCB;
1449	}
1450
1451	if (RT_SUCCESS(rc))
1452	*pcbBuf = cbBuf;
1453
1454	return rc;
1455	}
1456
1457	/**
1458	* Copy from guest to host memory worker.
1459	*
1460	* @copydoc BUSLOGICR3MEMCOPYCALLBACK
1461	*/
1462	static DECLCALLBACK(void) buslogicR3CopyBufferFromGuestWorker(PBUSLOGIC pThis, RTGCPHYS GCPhys, PRTSGBUF pSgBuf,
1463	size_t cbCopy, size_t *pcbSkip)
1464	{
1465	size_t cbSkipped = RT_MIN(cbCopy, *pcbSkip);
1466	cbCopy -= cbSkipped;
1467	GCPhys += cbSkipped;
1468	*pcbSkip -= cbSkipped;
1469
1470	while (cbCopy)
1471	{
1472	size_t cbSeg = cbCopy;
1473	void *pvSeg = RTSgBufGetNextSegment(pSgBuf, &cbSeg);
1474
1475	AssertPtr(pvSeg);
1476	PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), GCPhys, pvSeg, cbSeg);
1477	GCPhys += cbSeg;
1478	cbCopy -= cbSeg;
1479	}
1480	}
1481
1482	/**
1483	* Copy from host to guest memory worker.
1484	*
1485	* @copydoc BUSLOGICR3MEMCOPYCALLBACK
1486	*/
1487	static DECLCALLBACK(void) buslogicR3CopyBufferToGuestWorker(PBUSLOGIC pThis, RTGCPHYS GCPhys, PRTSGBUF pSgBuf,
1488	size_t cbCopy, size_t *pcbSkip)
1489	{
1490	size_t cbSkipped = RT_MIN(cbCopy, *pcbSkip);
1491	cbCopy -= cbSkipped;
1492	GCPhys += cbSkipped;
1493	*pcbSkip -= cbSkipped;
1494
1495	while (cbCopy)
1496	{
1497	size_t cbSeg = cbCopy;
1498	void *pvSeg = RTSgBufGetNextSegment(pSgBuf, &cbSeg);
1499
1500	AssertPtr(pvSeg);
1501	PDMDevHlpPCIPhysWrite(pThis->CTX_SUFF(pDevIns), GCPhys, pvSeg, cbSeg);
1502	GCPhys += cbSeg;
1503	cbCopy -= cbSeg;
1504	}
1505	}
1506
1507	/**
1508	* Walks the guest S/G buffer calling the given copy worker for every buffer.
1509	*
1510	* @returns The amout of bytes actually copied.
1511	* @param pThis Pointer to the Buslogic device state.
1512	* @param pReq Pointe to the request state.
1513	* @param pfnCopyWorker The copy method to apply for each guest buffer.
1514	* @param pSgBuf The host S/G buffer.
1515	* @param cbSkip How many bytes to skip in advance before starting to copy.
1516	* @param cbCopy How many bytes to copy.
1517	*/
1518	static size_t buslogicR3SgBufWalker(PBUSLOGIC pThis, PBUSLOGICREQ pReq,
1519	PBUSLOGICR3MEMCOPYCALLBACK pfnCopyWorker,
1520	PRTSGBUF pSgBuf, size_t cbSkip, size_t cbCopy)
1521	{
1522	PPDMDEVINS pDevIns = pThis->CTX_SUFF(pDevIns);
1523	uint32_t cbDataCCB;
1524	uint32_t u32PhysAddrCCB;
1525	size_t cbCopied = 0;
1526
1527	/*
1528	* Add the amount to skip to the host buffer size to avoid a
1529	* few conditionals later on.
1530	*/
1531	cbCopy += cbSkip;
1532
1533	/* Extract the data length and physical address from the CCB. */
1534	if (pReq->fIs24Bit)
1535	{
1536	u32PhysAddrCCB = ADDR_TO_U32(pReq->CCBGuest.o.aPhysAddrData);
1537	cbDataCCB = LEN_TO_U32(pReq->CCBGuest.o.acbData);
1538	}
1539	else
1540	{
1541	u32PhysAddrCCB = pReq->CCBGuest.n.u32PhysAddrData;
1542	cbDataCCB = pReq->CCBGuest.n.cbData;
1543	}
1544
1545	#if 1
1546	/* Hack for NT 10/91: A CCB describes a 2K buffer, but TEST UNIT READY is executed. This command
1547	* returns no data, hence the buffer must be left alone!
1548	*/
1549	if (pReq->CCBGuest.c.abCDB[0] == 0)
1550	cbDataCCB = 0;
1551	#endif
1552
1553	LogFlowFunc(("pReq=%#p cbDataCCB=%u direction=%u cbCopy=%zu\n", pReq, cbDataCCB,
1554	pReq->CCBGuest.c.uDataDirection, cbCopy));
1555
1556	if ( (cbDataCCB > 0)
1557	&& ( pReq->CCBGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_IN
1558	\|\| pReq->CCBGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_OUT
1559	\|\| pReq->CCBGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_UNKNOWN))
1560	{
1561	if ( (pReq->CCBGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_SCATTER_GATHER)
1562	\|\| (pReq->CCBGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_SCATTER_GATHER))
1563	{
1564	uint32_t cScatterGatherGCRead;
1565	uint32_t iScatterGatherEntry;
1566	SGE32 aScatterGatherReadGC[32]; /* Number of scatter gather list entries read from guest memory. */
1567	uint32_t cScatterGatherGCLeft = cbDataCCB / (pReq->fIs24Bit ? sizeof(SGE24) : sizeof(SGE32));
1568	RTGCPHYS GCPhysAddrScatterGatherCurrent = u32PhysAddrCCB;
1569
1570	do
1571	{
1572	cScatterGatherGCRead = (cScatterGatherGCLeft < RT_ELEMENTS(aScatterGatherReadGC))
1573	? cScatterGatherGCLeft
1574	: RT_ELEMENTS(aScatterGatherReadGC);
1575	cScatterGatherGCLeft -= cScatterGatherGCRead;
1576
1577	buslogicR3ReadSGEntries(pDevIns, pReq->fIs24Bit, GCPhysAddrScatterGatherCurrent,
1578	cScatterGatherGCRead, aScatterGatherReadGC);
1579
1580	for (iScatterGatherEntry = 0; iScatterGatherEntry < cScatterGatherGCRead && cbCopy > 0; iScatterGatherEntry++)
1581	{
1582	RTGCPHYS GCPhysAddrDataBase;
1583	size_t cbCopyThis;
1584
1585	Log(("%s: iScatterGatherEntry=%u\n", __FUNCTION__, iScatterGatherEntry));
1586
1587	GCPhysAddrDataBase = (RTGCPHYS)aScatterGatherReadGC[iScatterGatherEntry].u32PhysAddrSegmentBase;
1588	cbCopyThis = RT_MIN(cbCopy, aScatterGatherReadGC[iScatterGatherEntry].cbSegment);
1589
1590	Log(("%s: GCPhysAddrDataBase=%RGp cbCopyThis=%zu\n", __FUNCTION__, GCPhysAddrDataBase, cbCopyThis));
1591
1592	pfnCopyWorker(pThis, GCPhysAddrDataBase, pSgBuf, cbCopyThis, &cbSkip);
1593	cbCopied += cbCopyThis;
1594	cbCopy -= cbCopyThis;
1595	}
1596
1597	/* Set address to the next entries to read. */
1598	GCPhysAddrScatterGatherCurrent += cScatterGatherGCRead * (pReq->fIs24Bit ? sizeof(SGE24) : sizeof(SGE32));
1599	} while ( cScatterGatherGCLeft > 0
1600	&& cbCopy > 0);
1601
1602	}
1603	else if ( pReq->CCBGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB
1604	\|\| pReq->CCBGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_DATA_LENGTH)
1605	{
1606	/* The buffer is not scattered. */
1607	RTGCPHYS GCPhysAddrDataBase = u32PhysAddrCCB;
1608
1609	AssertMsg(GCPhysAddrDataBase != 0, ("Physical address is 0\n"));
1610
1611	Log(("Non-scattered buffer:\n"));
1612	Log(("u32PhysAddrData=%#x\n", u32PhysAddrCCB));
1613	Log(("cbData=%u\n", cbDataCCB));
1614	Log(("GCPhysAddrDataBase=0x%RGp\n", GCPhysAddrDataBase));
1615
1616	/* Copy the data into the guest memory. */
1617	pfnCopyWorker(pThis, GCPhysAddrDataBase, pSgBuf, RT_MIN(cbDataCCB, cbCopy), &cbSkip);
1618	cbCopied += RT_MIN(cbDataCCB, cbCopy);
1619	}
1620	}
1621
1622	return cbCopied - RT_MIN(cbSkip, cbCopied);
1623	}
1624
1625	/**
1626	* Copies a data buffer into the S/G buffer set up by the guest.
1627	*
1628	* @returns Amount of bytes copied to the guest.
1629	* @param pThis The LsiLogic controller device instance.
1630	* @param pReq Request structure.
1631	* @param pSgBuf The S/G buffer to copy from.
1632	* @param cbSkip How many bytes to skip in advance before starting to copy.
1633	* @param cbCopy How many bytes to copy.
1634	*/
1635	static size_t buslogicR3CopySgBufToGuest(PBUSLOGIC pThis, PBUSLOGICREQ pReq, PRTSGBUF pSgBuf,
1636	size_t cbSkip, size_t cbCopy)
1637	{
1638	return buslogicR3SgBufWalker(pThis, pReq, buslogicR3CopyBufferToGuestWorker,
1639	pSgBuf, cbSkip, cbCopy);
1640	}
1641
1642	/**
1643	* Copies the guest S/G buffer into a host data buffer.
1644	*
1645	* @returns Amount of bytes copied from the guest.
1646	* @param pThis The LsiLogic controller device instance.
1647	* @param pReq Request structure.
1648	* @param pSgBuf The S/G buffer to copy into.
1649	* @param cbSkip How many bytes to skip in advance before starting to copy.
1650	* @param cbCopy How many bytes to copy.
1651	*/
1652	static size_t buslogicR3CopySgBufFromGuest(PBUSLOGIC pThis, PBUSLOGICREQ pReq, PRTSGBUF pSgBuf,
1653	size_t cbSkip, size_t cbCopy)
1654	{
1655	return buslogicR3SgBufWalker(pThis, pReq, buslogicR3CopyBufferFromGuestWorker,
1656	pSgBuf, cbSkip, cbCopy);
1657	}
1658
1659	/** Convert sense buffer length taking into account shortcut values. */
1660	static uint32_t buslogicR3ConvertSenseBufferLength(uint32_t cbSense)
1661	{
1662	/* Convert special sense buffer length values. */
1663	if (cbSense == 0)
1664	cbSense = 14; /* 0 means standard 14-byte buffer. */
1665	else if (cbSense == 1)
1666	cbSense = 0; /* 1 means no sense data. */
1667	else if (cbSense < 8)
1668	AssertMsgFailed(("Reserved cbSense value of %d used!\n", cbSense));
1669
1670	return cbSense;
1671	}
1672
1673	/**
1674	* Free the sense buffer.
1675	*
1676	* @returns nothing.
1677	* @param pReq Pointer to the request state.
1678	* @param fCopy If sense data should be copied to guest memory.
1679	*/
1680	static void buslogicR3SenseBufferFree(PBUSLOGICREQ pReq, bool fCopy)
1681	{
1682	uint32_t cbSenseBuffer;
1683
1684	cbSenseBuffer = buslogicR3ConvertSenseBufferLength(pReq->CCBGuest.c.cbSenseData);
1685
1686	/* Copy the sense buffer into guest memory if requested. */
1687	if (fCopy && cbSenseBuffer)
1688	{
1689	PPDMDEVINS pDevIns = pReq->pTargetDevice->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns);
1690	RTGCPHYS GCPhysAddrSenseBuffer;
1691
1692	/* With 32-bit CCBs, the (optional) sense buffer physical address is provided separately.
1693	* On the other hand, with 24-bit CCBs, the sense buffer is simply located at the end of
1694	* the CCB, right after the variable-length CDB.
1695	*/
1696	if (pReq->fIs24Bit)
1697	{
1698	GCPhysAddrSenseBuffer = pReq->GCPhysAddrCCB;
1699	GCPhysAddrSenseBuffer += pReq->CCBGuest.c.cbCDB + RT_OFFSETOF(CCB24, abCDB);
1700	}
1701	else
1702	GCPhysAddrSenseBuffer = pReq->CCBGuest.n.u32PhysAddrSenseData;
1703
1704	Log3(("%s: sense buffer: %.*Rhxs\n", __FUNCTION__, cbSenseBuffer, pReq->pbSenseBuffer));
1705	PDMDevHlpPCIPhysWrite(pDevIns, GCPhysAddrSenseBuffer, pReq->pbSenseBuffer, cbSenseBuffer);
1706	}
1707
1708	RTMemFree(pReq->pbSenseBuffer);
1709	pReq->pbSenseBuffer = NULL;
1710	}
1711
1712	/**
1713	* Alloc the sense buffer.
1714	*
1715	* @returns VBox status code.
1716	* @param pReq Pointer to the task state.
1717	*/
1718	static int buslogicR3SenseBufferAlloc(PBUSLOGICREQ pReq)
1719	{
1720	pReq->pbSenseBuffer = NULL;
1721
1722	uint32_t cbSenseBuffer = buslogicR3ConvertSenseBufferLength(pReq->CCBGuest.c.cbSenseData);
1723	if (cbSenseBuffer)
1724	{
1725	pReq->pbSenseBuffer = (uint8_t *)RTMemAllocZ(cbSenseBuffer);
1726	if (!pReq->pbSenseBuffer)
1727	return VERR_NO_MEMORY;
1728	}
1729
1730	return VINF_SUCCESS;
1731	}
1732
1733	#endif /* IN_RING3 */
1734
1735	/**
1736	* Parses the command buffer and executes it.
1737	*
1738	* @returns VBox status code.
1739	* @param pBusLogic Pointer to the BusLogic device instance.
1740	*/
1741	static int buslogicProcessCommand(PBUSLOGIC pBusLogic)
1742	{
1743	int rc = VINF_SUCCESS;
1744	bool fSuppressIrq = false;
1745
1746	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
1747	AssertMsg(pBusLogic->uOperationCode != 0xff, ("There is no command to execute\n"));
1748
1749	switch (pBusLogic->uOperationCode)
1750	{
1751	case BUSLOGICCOMMAND_TEST_CMDC_INTERRUPT:
1752	/* Valid command, no reply. */
1753	pBusLogic->cbReplyParametersLeft = 0;
1754	break;
1755	case BUSLOGICCOMMAND_INQUIRE_PCI_HOST_ADAPTER_INFORMATION:
1756	{
1757	PReplyInquirePCIHostAdapterInformation pReply = (PReplyInquirePCIHostAdapterInformation)pBusLogic->aReplyBuffer;
1758	memset(pReply, 0, sizeof(ReplyInquirePCIHostAdapterInformation));
1759
1760	/* It seems VMware does not provide valid information here too, lets do the same :) */
1761	pReply->InformationIsValid = 0;
1762	pReply->IsaIOPort = pBusLogic->uISABaseCode;
1763	pReply->IRQ = PCIDevGetInterruptLine(&pBusLogic->dev);
1764	pBusLogic->cbReplyParametersLeft = sizeof(ReplyInquirePCIHostAdapterInformation);
1765	break;
1766	}
1767	case BUSLOGICCOMMAND_SET_SCSI_SELECTION_TIMEOUT:
1768	{
1769	/* no-op */
1770	pBusLogic->cbReplyParametersLeft = 0;
1771	break;
1772	}
1773	case BUSLOGICCOMMAND_MODIFY_IO_ADDRESS:
1774	{
1775	/* Modify the ISA-compatible I/O port base. Note that this technically
1776	* violates the PCI spec, as this address is not reported through PCI.
1777	* However, it is required for compatibility with old drivers.
1778	*/
1779	#ifdef IN_RING3
1780	Log(("ISA I/O for PCI (code %x)\n", pBusLogic->aCommandBuffer[0]));
1781	buslogicR3RegisterISARange(pBusLogic, pBusLogic->aCommandBuffer[0]);
1782	pBusLogic->cbReplyParametersLeft = 0;
1783	fSuppressIrq = true;
1784	break;
1785	#else
1786	AssertMsgFailed(("Must never get here!\n"));
1787	#endif
1788	}
1789	case BUSLOGICCOMMAND_INQUIRE_BOARD_ID:
1790	{
1791	/* The special option byte is important: If it is '0' or 'B', Windows NT drivers
1792	* for Adaptec AHA-154x may claim the adapter. The BusLogic drivers will claim
1793	* the adapter only when the byte is not '0' or 'B'.
1794	*/
1795	pBusLogic->aReplyBuffer[0] = 'A'; /* Firmware option bytes */
1796	pBusLogic->aReplyBuffer[1] = 'A'; /* Special option byte */
1797
1798	/* We report version 5.07B. This reply will provide the first two digits. */
1799	pBusLogic->aReplyBuffer[2] = '5'; /* Major version 5 */
1800	pBusLogic->aReplyBuffer[3] = '0'; /* Minor version 0 */
1801	pBusLogic->cbReplyParametersLeft = 4; /* Reply is 4 bytes long */
1802	break;
1803	}
1804	case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_3RD_LETTER:
1805	{
1806	pBusLogic->aReplyBuffer[0] = '7';
1807	pBusLogic->cbReplyParametersLeft = 1;
1808	break;
1809	}
1810	case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_LETTER:
1811	{
1812	pBusLogic->aReplyBuffer[0] = 'B';
1813	pBusLogic->cbReplyParametersLeft = 1;
1814	break;
1815	}
1816	case BUSLOGICCOMMAND_SET_ADAPTER_OPTIONS:
1817	/* The parameter list length is determined by the first byte of the command buffer. */
1818	if (pBusLogic->iParameter == 1)
1819	{
1820	/* First pass - set the number of following parameter bytes. */
1821	pBusLogic->cbCommandParametersLeft = pBusLogic->aCommandBuffer[0];
1822	Log(("Set HA options: %u bytes follow\n", pBusLogic->cbCommandParametersLeft));
1823	}
1824	else
1825	{
1826	/* Second pass - process received data. */
1827	Log(("Set HA options: received %u bytes\n", pBusLogic->aCommandBuffer[0]));
1828	/* We ignore the data - it only concerns the SCSI hardware protocol. */
1829	}
1830	pBusLogic->cbReplyParametersLeft = 0;
1831	break;
1832
1833	case BUSLOGICCOMMAND_EXECUTE_SCSI_COMMAND:
1834	/* The parameter list length is at least 12 bytes; the 12th byte determines
1835	* the number of additional CDB bytes that will follow.
1836	*/
1837	if (pBusLogic->iParameter == 12)
1838	{
1839	/* First pass - set the number of following CDB bytes. */
1840	pBusLogic->cbCommandParametersLeft = pBusLogic->aCommandBuffer[11];
1841	Log(("Execute SCSI cmd: %u more bytes follow\n", pBusLogic->cbCommandParametersLeft));
1842	}
1843	else
1844	{
1845	PESCMD pCmd;
1846
1847	/* Second pass - process received data. */
1848	Log(("Execute SCSI cmd: received %u bytes\n", pBusLogic->aCommandBuffer[0]));
1849
1850	pCmd = (PESCMD)pBusLogic->aCommandBuffer;
1851	Log(("Addr %08X, cbData %08X, cbCDB=%u\n", pCmd->u32PhysAddrData, pCmd->cbData, pCmd->cbCDB));
1852	}
1853	// This is currently a dummy - just fails every command.
1854	pBusLogic->cbReplyParametersLeft = 4;
1855	pBusLogic->aReplyBuffer[0] = pBusLogic->aReplyBuffer[1] = 0;
1856	pBusLogic->aReplyBuffer[2] = 0x11; /* HBA status (timeout). */
1857	pBusLogic->aReplyBuffer[3] = 0; /* Device status. */
1858	break;
1859
1860	case BUSLOGICCOMMAND_INQUIRE_HOST_ADAPTER_MODEL_NUMBER:
1861	{
1862	/* The reply length is set by the guest and is found in the first byte of the command buffer. */
1863	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
1864	memset(pBusLogic->aReplyBuffer, 0, pBusLogic->cbReplyParametersLeft);
1865	const char aModelName[] = "958D "; /* Trailing \0 is fine, that's the filler anyway. */
1866	int cCharsToTransfer = pBusLogic->cbReplyParametersLeft <= sizeof(aModelName)
1867	? pBusLogic->cbReplyParametersLeft
1868	: sizeof(aModelName);
1869
1870	for (int i = 0; i < cCharsToTransfer; i++)
1871	pBusLogic->aReplyBuffer[i] = aModelName[i];
1872
1873	break;
1874	}
1875	case BUSLOGICCOMMAND_INQUIRE_CONFIGURATION:
1876	{
1877	uint8_t uPciIrq = PCIDevGetInterruptLine(&pBusLogic->dev);
1878
1879	pBusLogic->cbReplyParametersLeft = sizeof(ReplyInquireConfiguration);
1880	PReplyInquireConfiguration pReply = (PReplyInquireConfiguration)pBusLogic->aReplyBuffer;
1881	memset(pReply, 0, sizeof(ReplyInquireConfiguration));
1882
1883	pReply->uHostAdapterId = 7; /* The controller has always 7 as ID. */
1884	pReply->fDmaChannel6 = 1; /* DMA channel 6 is a good default. */
1885	/* The PCI IRQ is not necessarily representable in this structure.
1886	* If that is the case, the guest likely won't function correctly,
1887	* therefore we log a warning.
1888	*/
1889	switch (uPciIrq)
1890	{
1891	case 9: pReply->fIrqChannel9 = 1; break;
1892	case 10: pReply->fIrqChannel10 = 1; break;
1893	case 11: pReply->fIrqChannel11 = 1; break;
1894	case 12: pReply->fIrqChannel12 = 1; break;
1895	case 14: pReply->fIrqChannel14 = 1; break;
1896	case 15: pReply->fIrqChannel15 = 1; break;
1897	default:
1898	LogRel(("Warning: PCI IRQ %d cannot be represented as ISA!\n", uPciIrq));
1899	break;
1900	}
1901	break;
1902	}
1903	case BUSLOGICCOMMAND_INQUIRE_EXTENDED_SETUP_INFORMATION:
1904	{
1905	/* Some Adaptec AHA-154x drivers (e.g. OS/2) execute this command and expect
1906	* it to fail. If it succeeds, the drivers refuse to load. However, some newer
1907	* Adaptec 154x models supposedly support it too??
1908	*/
1909
1910	/* The reply length is set by the guest and is found in the first byte of the command buffer. */
1911	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
1912	PReplyInquireExtendedSetupInformation pReply = (PReplyInquireExtendedSetupInformation)pBusLogic->aReplyBuffer;
1913	memset(pReply, 0, sizeof(ReplyInquireExtendedSetupInformation));
1914
1915	/** @todo should this reflect the RAM contents (AutoSCSIRam)? */
1916	pReply->uBusType = 'E'; /* EISA style */
1917	pReply->u16ScatterGatherLimit = 8192;
1918	pReply->cMailbox = pBusLogic->cMailbox;
1919	pReply->uMailboxAddressBase = (uint32_t)pBusLogic->GCPhysAddrMailboxOutgoingBase;
1920	pReply->fLevelSensitiveInterrupt = true;
1921	pReply->fHostWideSCSI = true;
1922	pReply->fHostUltraSCSI = true;
1923	memcpy(pReply->aFirmwareRevision, "07B", sizeof(pReply->aFirmwareRevision));
1924
1925	break;
1926	}
1927	case BUSLOGICCOMMAND_INQUIRE_SETUP_INFORMATION:
1928	{
1929	/* The reply length is set by the guest and is found in the first byte of the command buffer. */
1930	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
1931	PReplyInquireSetupInformation pReply = (PReplyInquireSetupInformation)pBusLogic->aReplyBuffer;
1932	memset(pReply, 0, sizeof(ReplyInquireSetupInformation));
1933	pReply->fSynchronousInitiationEnabled = true;
1934	pReply->fParityCheckingEnabled = true;
1935	pReply->cMailbox = pBusLogic->cMailbox;
1936	U32_TO_ADDR(pReply->MailboxAddress, pBusLogic->GCPhysAddrMailboxOutgoingBase);
1937	pReply->uSignature = 'B';
1938	/* The 'D' signature prevents Adaptec's OS/2 drivers from getting too
1939	* friendly with BusLogic hardware and upsetting the HBA state.
1940	*/
1941	pReply->uCharacterD = 'D'; /* BusLogic model. */
1942	pReply->uHostBusType = 'F'; /* PCI bus. */
1943	break;
1944	}
1945	case BUSLOGICCOMMAND_FETCH_HOST_ADAPTER_LOCAL_RAM:
1946	{
1947	/*
1948	* First element in the command buffer contains start offset to read from
1949	* and second one the number of bytes to read.
1950	*/
1951	uint8_t uOffset = pBusLogic->aCommandBuffer[0];
1952	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[1];
1953
1954	pBusLogic->fUseLocalRam = true;
1955	pBusLogic->iReply = uOffset;
1956	break;
1957	}
1958	case BUSLOGICCOMMAND_INITIALIZE_MAILBOX:
1959	{
1960	PRequestInitMbx pRequest = (PRequestInitMbx)pBusLogic->aCommandBuffer;
1961
1962	pBusLogic->fMbxIs24Bit = true;
1963	pBusLogic->cMailbox = pRequest->cMailbox;
1964	pBusLogic->GCPhysAddrMailboxOutgoingBase = (RTGCPHYS)ADDR_TO_U32(pRequest->aMailboxBaseAddr);
1965	/* The area for incoming mailboxes is right after the last entry of outgoing mailboxes. */
1966	pBusLogic->GCPhysAddrMailboxIncomingBase = pBusLogic->GCPhysAddrMailboxOutgoingBase + (pBusLogic->cMailbox * sizeof(Mailbox24));
1967
1968	Log(("GCPhysAddrMailboxOutgoingBase=%RGp\n", pBusLogic->GCPhysAddrMailboxOutgoingBase));
1969	Log(("GCPhysAddrMailboxIncomingBase=%RGp\n", pBusLogic->GCPhysAddrMailboxIncomingBase));
1970	Log(("cMailboxes=%u (24-bit mode)\n", pBusLogic->cMailbox));
1971	LogRel(("Initialized 24-bit mailbox, %d entries at %08x\n", pRequest->cMailbox, ADDR_TO_U32(pRequest->aMailboxBaseAddr)));
1972
1973	pBusLogic->regStatus &= ~BL_STAT_INREQ;
1974	pBusLogic->cbReplyParametersLeft = 0;
1975	break;
1976	}
1977	case BUSLOGICCOMMAND_INITIALIZE_EXTENDED_MAILBOX:
1978	{
1979	PRequestInitializeExtendedMailbox pRequest = (PRequestInitializeExtendedMailbox)pBusLogic->aCommandBuffer;
1980
1981	pBusLogic->fMbxIs24Bit = false;
1982	pBusLogic->cMailbox = pRequest->cMailbox;
1983	pBusLogic->GCPhysAddrMailboxOutgoingBase = (RTGCPHYS)pRequest->uMailboxBaseAddress;
1984	/* The area for incoming mailboxes is right after the last entry of outgoing mailboxes. */
1985	pBusLogic->GCPhysAddrMailboxIncomingBase = (RTGCPHYS)pRequest->uMailboxBaseAddress + (pBusLogic->cMailbox * sizeof(Mailbox32));
1986
1987	Log(("GCPhysAddrMailboxOutgoingBase=%RGp\n", pBusLogic->GCPhysAddrMailboxOutgoingBase));
1988	Log(("GCPhysAddrMailboxIncomingBase=%RGp\n", pBusLogic->GCPhysAddrMailboxIncomingBase));
1989	Log(("cMailboxes=%u (32-bit mode)\n", pBusLogic->cMailbox));
1990	LogRel(("Initialized 32-bit mailbox, %d entries at %08x\n", pRequest->cMailbox, pRequest->uMailboxBaseAddress));
1991
1992	pBusLogic->regStatus &= ~BL_STAT_INREQ;
1993	pBusLogic->cbReplyParametersLeft = 0;
1994	break;
1995	}
1996	case BUSLOGICCOMMAND_ENABLE_STRICT_ROUND_ROBIN_MODE:
1997	{
1998	if (pBusLogic->aCommandBuffer[0] == 0)
1999	pBusLogic->fStrictRoundRobinMode = false;
2000	else if (pBusLogic->aCommandBuffer[0] == 1)
2001	pBusLogic->fStrictRoundRobinMode = true;
2002	else
2003	AssertMsgFailed(("Invalid round robin mode %d\n", pBusLogic->aCommandBuffer[0]));
2004
2005	pBusLogic->cbReplyParametersLeft = 0;
2006	break;
2007	}
2008	case BUSLOGICCOMMAND_SET_CCB_FORMAT:
2009	{
2010	if (pBusLogic->aCommandBuffer[0] == 0)
2011	pBusLogic->fExtendedLunCCBFormat = false;
2012	else if (pBusLogic->aCommandBuffer[0] == 1)
2013	pBusLogic->fExtendedLunCCBFormat = true;
2014	else
2015	AssertMsgFailed(("Invalid CCB format %d\n", pBusLogic->aCommandBuffer[0]));
2016
2017	pBusLogic->cbReplyParametersLeft = 0;
2018	break;
2019	}
2020	case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_0_TO_7:
2021	/* This is supposed to send TEST UNIT READY to each target/LUN.
2022	* We cheat and skip that, since we already know what's attached
2023	*/
2024	memset(pBusLogic->aReplyBuffer, 0, 8);
2025	for (int i = 0; i < 8; ++i)
2026	{
2027	if (pBusLogic->aDeviceStates[i].fPresent)
2028	pBusLogic->aReplyBuffer[i] = 1;
2029	}
2030	pBusLogic->aReplyBuffer[7] = 0; /* HA hardcoded at ID 7. */
2031	pBusLogic->cbReplyParametersLeft = 8;
2032	break;
2033	case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_8_TO_15:
2034	/* See note about cheating above. */
2035	memset(pBusLogic->aReplyBuffer, 0, 8);
2036	for (int i = 0; i < 8; ++i)
2037	{
2038	if (pBusLogic->aDeviceStates[i + 8].fPresent)
2039	pBusLogic->aReplyBuffer[i] = 1;
2040	}
2041	pBusLogic->cbReplyParametersLeft = 8;
2042	break;
2043	case BUSLOGICCOMMAND_INQUIRE_TARGET_DEVICES:
2044	{
2045	/* Each bit which is set in the 16bit wide variable means a present device. */
2046	uint16_t u16TargetsPresentMask = 0;
2047
2048	for (uint8_t i = 0; i < RT_ELEMENTS(pBusLogic->aDeviceStates); i++)
2049	{
2050	if (pBusLogic->aDeviceStates[i].fPresent)
2051	u16TargetsPresentMask \|= (1 << i);
2052	}
2053	pBusLogic->aReplyBuffer[0] = (uint8_t)u16TargetsPresentMask;
2054	pBusLogic->aReplyBuffer[1] = (uint8_t)(u16TargetsPresentMask >> 8);
2055	pBusLogic->cbReplyParametersLeft = 2;
2056	break;
2057	}
2058	case BUSLOGICCOMMAND_INQUIRE_SYNCHRONOUS_PERIOD:
2059	{
2060	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
2061
2062	for (uint8_t i = 0; i < pBusLogic->cbReplyParametersLeft; i++)
2063	pBusLogic->aReplyBuffer[i] = 0; /** @todo Figure if we need something other here. It's not needed for the linux driver */
2064
2065	break;
2066	}
2067	case BUSLOGICCOMMAND_DISABLE_HOST_ADAPTER_INTERRUPT:
2068	{
2069	if (pBusLogic->aCommandBuffer[0] == 0)
2070	pBusLogic->fIRQEnabled = false;
2071	else
2072	pBusLogic->fIRQEnabled = true;
2073	/* No interrupt signaled regardless of enable/disable. */
2074	fSuppressIrq = true;
2075	break;
2076	}
2077	case BUSLOGICCOMMAND_ECHO_COMMAND_DATA:
2078	{
2079	pBusLogic->aReplyBuffer[0] = pBusLogic->aCommandBuffer[0];
2080	pBusLogic->cbReplyParametersLeft = 1;
2081	break;
2082	}
2083	case BUSLOGICCOMMAND_SET_PREEMPT_TIME_ON_BUS:
2084	{
2085	pBusLogic->cbReplyParametersLeft = 0;
2086	pBusLogic->LocalRam.structured.autoSCSIData.uBusOnDelay = pBusLogic->aCommandBuffer[0];
2087	Log(("Bus-on time: %d\n", pBusLogic->aCommandBuffer[0]));
2088	break;
2089	}
2090	case BUSLOGICCOMMAND_SET_TIME_OFF_BUS:
2091	{
2092	pBusLogic->cbReplyParametersLeft = 0;
2093	pBusLogic->LocalRam.structured.autoSCSIData.uBusOffDelay = pBusLogic->aCommandBuffer[0];
2094	Log(("Bus-off time: %d\n", pBusLogic->aCommandBuffer[0]));
2095	break;
2096	}
2097	case BUSLOGICCOMMAND_SET_BUS_TRANSFER_RATE:
2098	{
2099	pBusLogic->cbReplyParametersLeft = 0;
2100	pBusLogic->LocalRam.structured.autoSCSIData.uDMATransferRate = pBusLogic->aCommandBuffer[0];
2101	Log(("Bus transfer rate: %02X\n", pBusLogic->aCommandBuffer[0]));
2102	break;
2103	}
2104	case BUSLOGICCOMMAND_WRITE_BUSMASTER_CHIP_FIFO:
2105	{
2106	RTGCPHYS GCPhysFifoBuf;
2107	Addr24 addr;
2108
2109	pBusLogic->cbReplyParametersLeft = 0;
2110	addr.hi = pBusLogic->aCommandBuffer[0];
2111	addr.mid = pBusLogic->aCommandBuffer[1];
2112	addr.lo = pBusLogic->aCommandBuffer[2];
2113	GCPhysFifoBuf = (RTGCPHYS)ADDR_TO_U32(addr);
2114	Log(("Write busmaster FIFO at: %04X\n", ADDR_TO_U32(addr)));
2115	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysFifoBuf,
2116	&pBusLogic->LocalRam.u8View[64], 64);
2117	break;
2118	}
2119	case BUSLOGICCOMMAND_READ_BUSMASTER_CHIP_FIFO:
2120	{
2121	RTGCPHYS GCPhysFifoBuf;
2122	Addr24 addr;
2123
2124	pBusLogic->cbReplyParametersLeft = 0;
2125	addr.hi = pBusLogic->aCommandBuffer[0];
2126	addr.mid = pBusLogic->aCommandBuffer[1];
2127	addr.lo = pBusLogic->aCommandBuffer[2];
2128	GCPhysFifoBuf = (RTGCPHYS)ADDR_TO_U32(addr);
2129	Log(("Read busmaster FIFO at: %04X\n", ADDR_TO_U32(addr)));
2130	PDMDevHlpPCIPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysFifoBuf,
2131	&pBusLogic->LocalRam.u8View[64], 64);
2132	break;
2133	}
2134	default:
2135	AssertMsgFailed(("Invalid command %#x\n", pBusLogic->uOperationCode));
2136	case BUSLOGICCOMMAND_EXT_BIOS_INFO:
2137	case BUSLOGICCOMMAND_UNLOCK_MAILBOX:
2138	/* Commands valid for Adaptec 154xC which we don't handle since
2139	* we pretend being 154xB compatible. Just mark the command as invalid.
2140	*/
2141	Log(("Command %#x not valid for this adapter\n", pBusLogic->uOperationCode));
2142	pBusLogic->cbReplyParametersLeft = 0;
2143	pBusLogic->regStatus \|= BL_STAT_CMDINV;
2144	break;
2145	case BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND: /* Should be handled already. */
2146	AssertMsgFailed(("Invalid mailbox execute state!\n"));
2147	}
2148
2149	Log(("uOperationCode=%#x, cbReplyParametersLeft=%d\n", pBusLogic->uOperationCode, pBusLogic->cbReplyParametersLeft));
2150
2151	/* Set the data in ready bit in the status register in case the command has a reply. */
2152	if (pBusLogic->cbReplyParametersLeft)
2153	pBusLogic->regStatus \|= BL_STAT_DIRRDY;
2154	else if (!pBusLogic->cbCommandParametersLeft)
2155	buslogicCommandComplete(pBusLogic, fSuppressIrq);
2156
2157	return rc;
2158	}
2159
2160	/**
2161	* Read a register from the BusLogic adapter.
2162	*
2163	* @returns VBox status code.
2164	* @param pBusLogic Pointer to the BusLogic instance data.
2165	* @param iRegister The index of the register to read.
2166	* @param pu32 Where to store the register content.
2167	*/
2168	static int buslogicRegisterRead(PBUSLOGIC pBusLogic, unsigned iRegister, uint32_t *pu32)
2169	{
2170	int rc = VINF_SUCCESS;
2171
2172	switch (iRegister)
2173	{
2174	case BUSLOGIC_REGISTER_STATUS:
2175	{
2176	*pu32 = pBusLogic->regStatus;
2177
2178	/* If the diagnostic active bit is set, we are in a guest-initiated
2179	* hard reset. If the guest reads the status register and waits for
2180	* the host adapter ready bit to be set, we terminate the reset right
2181	* away. However, guests may also expect the reset condition to clear
2182	* automatically after a period of time, in which case we can't show
2183	* the DIAG bit at all.
2184	*/
2185	if (pBusLogic->regStatus & BL_STAT_DACT)
2186	{
2187	uint64_t u64AccessTime = PDMDevHlpTMTimeVirtGetNano(pBusLogic->CTX_SUFF(pDevIns));
2188
2189	pBusLogic->regStatus &= ~BL_STAT_DACT;
2190	pBusLogic->regStatus \|= BL_STAT_HARDY;
2191
2192	if (u64AccessTime - pBusLogic->u64ResetTime > BUSLOGIC_RESET_DURATION_NS)
2193	{
2194	/* If reset already expired, let the guest see that right away. */
2195	*pu32 = pBusLogic->regStatus;
2196	pBusLogic->u64ResetTime = 0;
2197	}
2198	}
2199	break;
2200	}
2201	case BUSLOGIC_REGISTER_DATAIN:
2202	{
2203	if (pBusLogic->fUseLocalRam)
2204	*pu32 = pBusLogic->LocalRam.u8View[pBusLogic->iReply];
2205	else
2206	*pu32 = pBusLogic->aReplyBuffer[pBusLogic->iReply];
2207
2208	/* Careful about underflow - guest can read data register even if
2209	* no data is available.
2210	*/
2211	if (pBusLogic->cbReplyParametersLeft)
2212	{
2213	pBusLogic->iReply++;
2214	pBusLogic->cbReplyParametersLeft--;
2215	if (!pBusLogic->cbReplyParametersLeft)
2216	{
2217	/*
2218	* Reply finished, set command complete bit, unset data-in ready bit and
2219	* interrupt the guest if enabled.
2220	*/
2221	buslogicCommandComplete(pBusLogic, false);
2222	}
2223	}
2224	LogFlowFunc(("data=%02x, iReply=%d, cbReplyParametersLeft=%u\n", *pu32,
2225	pBusLogic->iReply, pBusLogic->cbReplyParametersLeft));
2226	break;
2227	}
2228	case BUSLOGIC_REGISTER_INTERRUPT:
2229	{
2230	*pu32 = pBusLogic->regInterrupt;
2231	break;
2232	}
2233	case BUSLOGIC_REGISTER_GEOMETRY:
2234	{
2235	*pu32 = pBusLogic->regGeometry;
2236	break;
2237	}
2238	default:
2239	*pu32 = UINT32_C(0xffffffff);
2240	}
2241
2242	Log2(("%s: pu32=%p:{%.*Rhxs} iRegister=%d rc=%Rrc\n",
2243	__FUNCTION__, pu32, 1, pu32, iRegister, rc));
2244
2245	return rc;
2246	}
2247
2248	/**
2249	* Write a value to a register.
2250	*
2251	* @returns VBox status code.
2252	* @param pBusLogic Pointer to the BusLogic instance data.
2253	* @param iRegister The index of the register to read.
2254	* @param uVal The value to write.
2255	*/
2256	static int buslogicRegisterWrite(PBUSLOGIC pBusLogic, unsigned iRegister, uint8_t uVal)
2257	{
2258	int rc = VINF_SUCCESS;
2259
2260	switch (iRegister)
2261	{
2262	case BUSLOGIC_REGISTER_CONTROL:
2263	{
2264	if ((uVal & BL_CTRL_RHARD) \|\| (uVal & BL_CTRL_RSOFT))
2265	{
2266	#ifdef IN_RING3
2267	bool fHardReset = !!(uVal & BL_CTRL_RHARD);
2268
2269	LogRel(("BusLogic: %s reset\n", fHardReset ? "hard" : "soft"));
2270	buslogicR3InitiateReset(pBusLogic, fHardReset);
2271	#else
2272	rc = VINF_IOM_R3_IOPORT_WRITE;
2273	#endif
2274	break;
2275	}
2276
2277	rc = PDMCritSectEnter(&pBusLogic->CritSectIntr, VINF_IOM_R3_IOPORT_WRITE);
2278	if (rc != VINF_SUCCESS)
2279	return rc;
2280
2281	#ifdef LOG_ENABLED
2282	uint32_t cMailboxesReady = ASMAtomicXchgU32(&pBusLogic->cInMailboxesReady, 0);
2283	Log(("%u incoming mailboxes were ready when this interrupt was cleared\n", cMailboxesReady));
2284	#endif
2285
2286	if (uVal & BL_CTRL_RINT)
2287	buslogicClearInterrupt(pBusLogic);
2288
2289	PDMCritSectLeave(&pBusLogic->CritSectIntr);
2290
2291	break;
2292	}
2293	case BUSLOGIC_REGISTER_COMMAND:
2294	{
2295	/* Fast path for mailbox execution command. */
2296	if ((uVal == BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND) && (pBusLogic->uOperationCode == 0xff))
2297	{
2298	/* If there are no mailboxes configured, don't even try to do anything. */
2299	if (pBusLogic->cMailbox)
2300	{
2301	ASMAtomicIncU32(&pBusLogic->cMailboxesReady);
2302	if (!ASMAtomicXchgBool(&pBusLogic->fNotificationSent, true))
2303	{
2304	/* Send new notification to the queue. */
2305	PPDMQUEUEITEMCORE pItem = PDMQueueAlloc(pBusLogic->CTX_SUFF(pNotifierQueue));
2306	AssertMsg(pItem, ("Allocating item for queue failed\n"));
2307	PDMQueueInsert(pBusLogic->CTX_SUFF(pNotifierQueue), (PPDMQUEUEITEMCORE)pItem);
2308	}
2309	}
2310
2311	return rc;
2312	}
2313
2314	/*
2315	* Check if we are already fetch command parameters from the guest.
2316	* If not we initialize executing a new command.
2317	*/
2318	if (pBusLogic->uOperationCode == 0xff)
2319	{
2320	pBusLogic->uOperationCode = uVal;
2321	pBusLogic->iParameter = 0;
2322
2323	/* Mark host adapter as busy and clear the invalid status bit. */
2324	pBusLogic->regStatus &= ~(BL_STAT_HARDY \| BL_STAT_CMDINV);
2325
2326	/* Get the number of bytes for parameters from the command code. */
2327	switch (pBusLogic->uOperationCode)
2328	{
2329	case BUSLOGICCOMMAND_TEST_CMDC_INTERRUPT:
2330	case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_LETTER:
2331	case BUSLOGICCOMMAND_INQUIRE_BOARD_ID:
2332	case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_3RD_LETTER:
2333	case BUSLOGICCOMMAND_INQUIRE_PCI_HOST_ADAPTER_INFORMATION:
2334	case BUSLOGICCOMMAND_INQUIRE_CONFIGURATION:
2335	case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_0_TO_7:
2336	case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_8_TO_15:
2337	case BUSLOGICCOMMAND_INQUIRE_TARGET_DEVICES:
2338	pBusLogic->cbCommandParametersLeft = 0;
2339	break;
2340	case BUSLOGICCOMMAND_MODIFY_IO_ADDRESS:
2341	case BUSLOGICCOMMAND_INQUIRE_EXTENDED_SETUP_INFORMATION:
2342	case BUSLOGICCOMMAND_INQUIRE_SETUP_INFORMATION:
2343	case BUSLOGICCOMMAND_INQUIRE_HOST_ADAPTER_MODEL_NUMBER:
2344	case BUSLOGICCOMMAND_ENABLE_STRICT_ROUND_ROBIN_MODE:
2345	case BUSLOGICCOMMAND_SET_CCB_FORMAT:
2346	case BUSLOGICCOMMAND_INQUIRE_SYNCHRONOUS_PERIOD:
2347	case BUSLOGICCOMMAND_DISABLE_HOST_ADAPTER_INTERRUPT:
2348	case BUSLOGICCOMMAND_ECHO_COMMAND_DATA:
2349	case BUSLOGICCOMMAND_SET_PREEMPT_TIME_ON_BUS:
2350	case BUSLOGICCOMMAND_SET_TIME_OFF_BUS:
2351	case BUSLOGICCOMMAND_SET_BUS_TRANSFER_RATE:
2352	pBusLogic->cbCommandParametersLeft = 1;
2353	break;
2354	case BUSLOGICCOMMAND_FETCH_HOST_ADAPTER_LOCAL_RAM:
2355	pBusLogic->cbCommandParametersLeft = 2;
2356	break;
2357	case BUSLOGICCOMMAND_READ_BUSMASTER_CHIP_FIFO:
2358	case BUSLOGICCOMMAND_WRITE_BUSMASTER_CHIP_FIFO:
2359	pBusLogic->cbCommandParametersLeft = 3;
2360	break;
2361	case BUSLOGICCOMMAND_SET_SCSI_SELECTION_TIMEOUT:
2362	pBusLogic->cbCommandParametersLeft = 4;
2363	break;
2364	case BUSLOGICCOMMAND_INITIALIZE_MAILBOX:
2365	pBusLogic->cbCommandParametersLeft = sizeof(RequestInitMbx);
2366	break;
2367	case BUSLOGICCOMMAND_INITIALIZE_EXTENDED_MAILBOX:
2368	pBusLogic->cbCommandParametersLeft = sizeof(RequestInitializeExtendedMailbox);
2369	break;
2370	case BUSLOGICCOMMAND_SET_ADAPTER_OPTIONS:
2371	/* There must be at least one byte following this command. */
2372	pBusLogic->cbCommandParametersLeft = 1;
2373	break;
2374	case BUSLOGICCOMMAND_EXECUTE_SCSI_COMMAND:
2375	/* 12 bytes + variable-length CDB. */
2376	pBusLogic->cbCommandParametersLeft = 12;
2377	break;
2378	case BUSLOGICCOMMAND_EXT_BIOS_INFO:
2379	case BUSLOGICCOMMAND_UNLOCK_MAILBOX:
2380	/* Invalid commands. */
2381	pBusLogic->cbCommandParametersLeft = 0;
2382	break;
2383	case BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND: /* Should not come here anymore. */
2384	default:
2385	AssertMsgFailed(("Invalid operation code %#x\n", uVal));
2386	}
2387	}
2388	else
2389	{
2390	#ifndef IN_RING3
2391	/* This command must be executed in R3 as it rehooks the ISA I/O port. */
2392	if (pBusLogic->uOperationCode == BUSLOGICCOMMAND_MODIFY_IO_ADDRESS)
2393	{
2394	rc = VINF_IOM_R3_IOPORT_WRITE;
2395	break;
2396	}
2397	#endif
2398	/*
2399	* The real adapter would set the Command register busy bit in the status register.
2400	* The guest has to wait until it is unset.
2401	* We don't need to do it because the guest does not continue execution while we are in this
2402	* function.
2403	*/
2404	pBusLogic->aCommandBuffer[pBusLogic->iParameter] = uVal;
2405	pBusLogic->iParameter++;
2406	pBusLogic->cbCommandParametersLeft--;
2407	}
2408
2409	/* Start execution of command if there are no parameters left. */
2410	if (!pBusLogic->cbCommandParametersLeft)
2411	{
2412	rc = buslogicProcessCommand(pBusLogic);
2413	AssertMsgRC(rc, ("Processing command failed rc=%Rrc\n", rc));
2414	}
2415	break;
2416	}
2417
2418	/* On BusLogic adapters, the interrupt and geometry registers are R/W.
2419	* That is different from Adaptec 154x where those are read only.
2420	*/
2421	case BUSLOGIC_REGISTER_INTERRUPT:
2422	pBusLogic->regInterrupt = uVal;
2423	break;
2424
2425	case BUSLOGIC_REGISTER_GEOMETRY:
2426	pBusLogic->regGeometry = uVal;
2427	break;
2428
2429	default:
2430	AssertMsgFailed(("Register not available\n"));
2431	rc = VERR_IOM_IOPORT_UNUSED;
2432	}
2433
2434	return rc;
2435	}
2436
2437	/**
2438	* Memory mapped I/O Handler for read operations.
2439	*
2440	* @returns VBox status code.
2441	*
2442	* @param pDevIns The device instance.
2443	* @param pvUser User argument.
2444	* @param GCPhysAddr Physical address (in GC) where the read starts.
2445	* @param pv Where to store the result.
2446	* @param cb Number of bytes read.
2447	*/
2448	PDMBOTHCBDECL(int) buslogicMMIORead(PPDMDEVINS pDevIns, void pvUser, RTGCPHYS GCPhysAddr, void pv, unsigned cb)
2449	{
2450	RT_NOREF_PV(pDevIns); RT_NOREF_PV(pvUser); RT_NOREF_PV(GCPhysAddr); RT_NOREF_PV(pv); RT_NOREF_PV(cb);
2451
2452	/* the linux driver does not make use of the MMIO area. */
2453	AssertMsgFailed(("MMIO Read\n"));
2454	return VINF_SUCCESS;
2455	}
2456
2457	/**
2458	* Memory mapped I/O Handler for write operations.
2459	*
2460	* @returns VBox status code.
2461	*
2462	* @param pDevIns The device instance.
2463	* @param pvUser User argument.
2464	* @param GCPhysAddr Physical address (in GC) where the read starts.
2465	* @param pv Where to fetch the result.
2466	* @param cb Number of bytes to write.
2467	*/
2468	PDMBOTHCBDECL(int) buslogicMMIOWrite(PPDMDEVINS pDevIns, void pvUser, RTGCPHYS GCPhysAddr, void const pv, unsigned cb)
2469	{
2470	RT_NOREF_PV(pDevIns); RT_NOREF_PV(pvUser); RT_NOREF_PV(GCPhysAddr); RT_NOREF_PV(pv); RT_NOREF_PV(cb);
2471
2472	/* the linux driver does not make use of the MMIO area. */
2473	AssertMsgFailed(("MMIO Write\n"));
2474	return VINF_SUCCESS;
2475	}
2476
2477	/**
2478	* Port I/O Handler for IN operations.
2479	*
2480	* @returns VBox status code.
2481	*
2482	* @param pDevIns The device instance.
2483	* @param pvUser User argument.
2484	* @param uPort Port number used for the IN operation.
2485	* @param pu32 Where to store the result.
2486	* @param cb Number of bytes read.
2487	*/
2488	PDMBOTHCBDECL(int) buslogicIOPortRead(PPDMDEVINS pDevIns, void pvUser, RTIOPORT uPort, uint32_t pu32, unsigned cb)
2489	{
2490	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2491	unsigned iRegister = uPort % 4;
2492	RT_NOREF_PV(pvUser); RT_NOREF_PV(cb);
2493
2494	Assert(cb == 1);
2495
2496	return buslogicRegisterRead(pBusLogic, iRegister, pu32);
2497	}
2498
2499	/**
2500	* Port I/O Handler for OUT operations.
2501	*
2502	* @returns VBox status code.
2503	*
2504	* @param pDevIns The device instance.
2505	* @param pvUser User argument.
2506	* @param uPort Port number used for the IN operation.
2507	* @param u32 The value to output.
2508	* @param cb The value size in bytes.
2509	*/
2510	PDMBOTHCBDECL(int) buslogicIOPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint32_t u32, unsigned cb)
2511	{
2512	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2513	unsigned iRegister = uPort % 4;
2514	uint8_t uVal = (uint8_t)u32;
2515	RT_NOREF2(pvUser, cb);
2516
2517	Assert(cb == 1);
2518
2519	int rc = buslogicRegisterWrite(pBusLogic, iRegister, (uint8_t)uVal);
2520
2521	Log2(("#%d %s: pvUser=%#p cb=%d u32=%#x uPort=%#x rc=%Rrc\n",
2522	pDevIns->iInstance, __FUNCTION__, pvUser, cb, u32, uPort, rc));
2523
2524	return rc;
2525	}
2526
2527	#ifdef IN_RING3
2528
2529	static int buslogicR3PrepareBIOSSCSIRequest(PBUSLOGIC pThis)
2530	{
2531	uint32_t uTargetDevice;
2532	uint32_t uLun;
2533	uint8_t *pbCdb;
2534	size_t cbCdb;
2535	size_t cbBuf;
2536
2537	int rc = vboxscsiSetupRequest(&pThis->VBoxSCSI, &uLun, &pbCdb, &cbCdb, &cbBuf, &uTargetDevice);
2538	AssertMsgRCReturn(rc, ("Setting up SCSI request failed rc=%Rrc\n", rc), rc);
2539
2540	if ( uTargetDevice < RT_ELEMENTS(pThis->aDeviceStates)
2541	&& pThis->aDeviceStates[uTargetDevice].pDrvBase)
2542	{
2543	PBUSLOGICDEVICE pTgtDev = &pThis->aDeviceStates[uTargetDevice];
2544	PDMMEDIAEXIOREQ hIoReq;
2545	PBUSLOGICREQ pReq;
2546
2547	rc = pTgtDev->pDrvMediaEx->pfnIoReqAlloc(pTgtDev->pDrvMediaEx, &hIoReq, (void **)&pReq,
2548	0, PDMIMEDIAEX_F_SUSPEND_ON_RECOVERABLE_ERR);
2549	AssertMsgRCReturn(rc, ("Getting task from cache failed rc=%Rrc\n", rc), rc);
2550
2551	pReq->fBIOS = true;
2552	pReq->hIoReq = hIoReq;
2553	pReq->pTargetDevice = pTgtDev;
2554
2555	ASMAtomicIncU32(&pTgtDev->cOutstandingRequests);
2556
2557	rc = pTgtDev->pDrvMediaEx->pfnIoReqSendScsiCmd(pTgtDev->pDrvMediaEx, pReq->hIoReq, uLun,
2558	pbCdb, cbCdb, PDMMEDIAEXIOREQSCSITXDIR_UNKNOWN,
2559	cbBuf, NULL, 0, &pReq->u8ScsiSts, 30 * RT_MS_1SEC);
2560	if (rc == VINF_SUCCESS \|\| rc != VINF_PDM_MEDIAEX_IOREQ_IN_PROGRESS)
2561	{
2562	uint8_t u8ScsiSts = pReq->u8ScsiSts;
2563	pTgtDev->pDrvMediaEx->pfnIoReqFree(pTgtDev->pDrvMediaEx, pReq->hIoReq);
2564	rc = vboxscsiRequestFinished(&pThis->VBoxSCSI, u8ScsiSts);
2565	}
2566	else if (rc == VINF_PDM_MEDIAEX_IOREQ_IN_PROGRESS)
2567	rc = VINF_SUCCESS;
2568
2569	return rc;
2570	}
2571
2572	/* Device is not present. */
2573	AssertMsg(pbCdb[0] == SCSI_INQUIRY,
2574	("Device is not present but command is not inquiry\n"));
2575
2576	SCSIINQUIRYDATA ScsiInquiryData;
2577
2578	memset(&ScsiInquiryData, 0, sizeof(SCSIINQUIRYDATA));
2579	ScsiInquiryData.u5PeripheralDeviceType = SCSI_INQUIRY_DATA_PERIPHERAL_DEVICE_TYPE_UNKNOWN;
2580	ScsiInquiryData.u3PeripheralQualifier = SCSI_INQUIRY_DATA_PERIPHERAL_QUALIFIER_NOT_CONNECTED_NOT_SUPPORTED;
2581
2582	memcpy(pThis->VBoxSCSI.pbBuf, &ScsiInquiryData, 5);
2583
2584	rc = vboxscsiRequestFinished(&pThis->VBoxSCSI, SCSI_STATUS_OK);
2585	AssertMsgRCReturn(rc, ("Finishing BIOS SCSI request failed rc=%Rrc\n", rc), rc);
2586
2587	return rc;
2588	}
2589
2590
2591	/**
2592	* Port I/O Handler for IN operations - BIOS port.
2593	*
2594	* @returns VBox status code.
2595	*
2596	* @param pDevIns The device instance.
2597	* @param pvUser User argument.
2598	* @param uPort Port number used for the IN operation.
2599	* @param pu32 Where to store the result.
2600	* @param cb Number of bytes read.
2601	*/
2602	static DECLCALLBACK(int) buslogicR3BiosIoPortRead(PPDMDEVINS pDevIns, void pvUser, RTIOPORT uPort, uint32_t pu32, unsigned cb)
2603	{
2604	RT_NOREF(pvUser, cb);
2605	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2606
2607	Assert(cb == 1);
2608
2609	int rc = vboxscsiReadRegister(&pBusLogic->VBoxSCSI, (uPort - BUSLOGIC_BIOS_IO_PORT), pu32);
2610
2611	//Log2(("%s: pu32=%p:{%.*Rhxs} iRegister=%d rc=%Rrc\n",
2612	// __FUNCTION__, pu32, 1, pu32, (uPort - BUSLOGIC_BIOS_IO_PORT), rc));
2613
2614	return rc;
2615	}
2616
2617	/**
2618	* Port I/O Handler for OUT operations - BIOS port.
2619	*
2620	* @returns VBox status code.
2621	*
2622	* @param pDevIns The device instance.
2623	* @param pvUser User argument.
2624	* @param uPort Port number used for the IN operation.
2625	* @param u32 The value to output.
2626	* @param cb The value size in bytes.
2627	*/
2628	static DECLCALLBACK(int) buslogicR3BiosIoPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint32_t u32, unsigned cb)
2629	{
2630	RT_NOREF(pvUser, cb);
2631	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2632	Log2(("#%d %s: pvUser=%#p cb=%d u32=%#x uPort=%#x\n", pDevIns->iInstance, __FUNCTION__, pvUser, cb, u32, uPort));
2633
2634	/*
2635	* If there is already a request form the BIOS pending ignore this write
2636	* because it should not happen.
2637	*/
2638	if (ASMAtomicReadBool(&pThis->fBiosReqPending))
2639	return VINF_SUCCESS;
2640
2641	Assert(cb == 1);
2642
2643	int rc = vboxscsiWriteRegister(&pThis->VBoxSCSI, (uPort - BUSLOGIC_BIOS_IO_PORT), (uint8_t)u32);
2644	if (rc == VERR_MORE_DATA)
2645	{
2646	ASMAtomicXchgBool(&pThis->fBiosReqPending, true);
2647	/* Send a notifier to the PDM queue that there are pending requests. */
2648	PPDMQUEUEITEMCORE pItem = PDMQueueAlloc(pThis->CTX_SUFF(pNotifierQueue));
2649	AssertMsg(pItem, ("Allocating item for queue failed\n"));
2650	PDMQueueInsert(pThis->CTX_SUFF(pNotifierQueue), (PPDMQUEUEITEMCORE)pItem);
2651	rc = VINF_SUCCESS;
2652	}
2653	else if (RT_FAILURE(rc))
2654	AssertMsgFailed(("Writing BIOS register failed %Rrc\n", rc));
2655
2656	return VINF_SUCCESS;
2657	}
2658
2659	/**
2660	* Port I/O Handler for primary port range OUT string operations.
2661	* @see FNIOMIOPORTOUTSTRING for details.
2662	*/
2663	static DECLCALLBACK(int) buslogicR3BiosIoPortWriteStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port,
2664	uint8_t const pbSrc, uint32_t pcTransfers, unsigned cb)
2665	{
2666	RT_NOREF(pvUser);
2667	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2668	Log2(("#%d %s: pvUser=%#p cb=%d Port=%#x\n", pDevIns->iInstance, __FUNCTION__, pvUser, cb, Port));
2669
2670	/*
2671	* If there is already a request form the BIOS pending ignore this write
2672	* because it should not happen.
2673	*/
2674	if (ASMAtomicReadBool(&pThis->fBiosReqPending))
2675	return VINF_SUCCESS;
2676
2677	int rc = vboxscsiWriteString(pDevIns, &pThis->VBoxSCSI, (Port - BUSLOGIC_BIOS_IO_PORT), pbSrc, pcTransfers, cb);
2678	if (rc == VERR_MORE_DATA)
2679	{
2680	ASMAtomicXchgBool(&pThis->fBiosReqPending, true);
2681	/* Send a notifier to the PDM queue that there are pending requests. */
2682	PPDMQUEUEITEMCORE pItem = PDMQueueAlloc(pThis->CTX_SUFF(pNotifierQueue));
2683	AssertMsg(pItem, ("Allocating item for queue failed\n"));
2684	PDMQueueInsert(pThis->CTX_SUFF(pNotifierQueue), (PPDMQUEUEITEMCORE)pItem);
2685	}
2686	else if (RT_FAILURE(rc))
2687	AssertMsgFailed(("Writing BIOS register failed %Rrc\n", rc));
2688
2689	return VINF_SUCCESS;
2690	}
2691
2692	/**
2693	* Port I/O Handler for primary port range IN string operations.
2694	* @see FNIOMIOPORTINSTRING for details.
2695	*/
2696	static DECLCALLBACK(int) buslogicR3BiosIoPortReadStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port,
2697	uint8_t pbDst, uint32_t pcTransfers, unsigned cb)
2698	{
2699	RT_NOREF(pvUser);
2700	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2701	LogFlowFunc(("#%d %s: pvUser=%#p cb=%d Port=%#x\n", pDevIns->iInstance, __FUNCTION__, pvUser, cb, Port));
2702
2703	return vboxscsiReadString(pDevIns, &pBusLogic->VBoxSCSI, (Port - BUSLOGIC_BIOS_IO_PORT),
2704	pbDst, pcTransfers, cb);
2705	}
2706
2707	/**
2708	* Update the ISA I/O range.
2709	*
2710	* @returns nothing.
2711	* @param pBusLogic Pointer to the BusLogic device instance.
2712	* @param uBaseCode Encoded ISA I/O base; only low 3 bits are used.
2713	*/
2714	static int buslogicR3RegisterISARange(PBUSLOGIC pBusLogic, uint8_t uBaseCode)
2715	{
2716	uint8_t uCode = uBaseCode & MAX_ISA_BASE;
2717	uint16_t uNewBase = g_aISABases[uCode];
2718	int rc = VINF_SUCCESS;
2719
2720	LogFlowFunc(("ISA I/O code %02X, new base %X\n", uBaseCode, uNewBase));
2721
2722	/* Check if the same port range is already registered. */
2723	if (uNewBase != pBusLogic->IOISABase)
2724	{
2725	/* Unregister the old range, if any. */
2726	if (pBusLogic->IOISABase)
2727	rc = PDMDevHlpIOPortDeregister(pBusLogic->CTX_SUFF(pDevIns), pBusLogic->IOISABase, 4);
2728
2729	if (RT_SUCCESS(rc))
2730	{
2731	pBusLogic->IOISABase = 0; /* First mark as unregistered. */
2732	pBusLogic->uISABaseCode = ISA_BASE_DISABLED;
2733
2734	if (uNewBase)
2735	{
2736	/* Register the new range if requested. */
2737	rc = PDMDevHlpIOPortRegister(pBusLogic->CTX_SUFF(pDevIns), uNewBase, 4, NULL,
2738	buslogicIOPortWrite, buslogicIOPortRead,
2739	NULL, NULL,
2740	"BusLogic ISA");
2741	if (RT_SUCCESS(rc))
2742	{
2743	pBusLogic->IOISABase = uNewBase;
2744	pBusLogic->uISABaseCode = uCode;
2745	}
2746	}
2747	}
2748	if (RT_SUCCESS(rc))
2749	{
2750	if (uNewBase)
2751	{
2752	Log(("ISA I/O base: %x\n", uNewBase));
2753	LogRel(("BusLogic: ISA I/O base: %x\n", uNewBase));
2754	}
2755	else
2756	{
2757	Log(("Disabling ISA I/O ports.\n"));
2758	LogRel(("BusLogic: ISA I/O disabled\n"));
2759	}
2760	}
2761
2762	}
2763	return rc;
2764	}
2765
2766
2767	/**
2768	* @callback_method_impl{FNPCIIOREGIONMAP}
2769	*/
2770	static DECLCALLBACK(int) buslogicR3MmioMap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
2771	RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType)
2772	{
2773	RT_NOREF(pPciDev, iRegion);
2774	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2775	int rc = VINF_SUCCESS;
2776
2777	Log2(("%s: registering MMIO area at GCPhysAddr=%RGp cb=%RGp\n", __FUNCTION__, GCPhysAddress, cb));
2778
2779	Assert(cb >= 32);
2780
2781	if (enmType == PCI_ADDRESS_SPACE_MEM)
2782	{
2783	/* We use the assigned size here, because we currently only support page aligned MMIO ranges. */
2784	rc = PDMDevHlpMMIORegister(pDevIns, GCPhysAddress, cb, NULL /pvUser/,
2785	IOMMMIO_FLAGS_READ_PASSTHRU \| IOMMMIO_FLAGS_WRITE_PASSTHRU,
2786	buslogicMMIOWrite, buslogicMMIORead, "BusLogic MMIO");
2787	if (RT_FAILURE(rc))
2788	return rc;
2789
2790	if (pThis->fR0Enabled)
2791	{
2792	rc = PDMDevHlpMMIORegisterR0(pDevIns, GCPhysAddress, cb, NIL_RTR0PTR /pvUser/,
2793	"buslogicMMIOWrite", "buslogicMMIORead");
2794	if (RT_FAILURE(rc))
2795	return rc;
2796	}
2797
2798	if (pThis->fGCEnabled)
2799	{
2800	rc = PDMDevHlpMMIORegisterRC(pDevIns, GCPhysAddress, cb, NIL_RTRCPTR /pvUser/,
2801	"buslogicMMIOWrite", "buslogicMMIORead");
2802	if (RT_FAILURE(rc))
2803	return rc;
2804	}
2805
2806	pThis->MMIOBase = GCPhysAddress;
2807	}
2808	else if (enmType == PCI_ADDRESS_SPACE_IO)
2809	{
2810	rc = PDMDevHlpIOPortRegister(pDevIns, (RTIOPORT)GCPhysAddress, 32,
2811	NULL, buslogicIOPortWrite, buslogicIOPortRead, NULL, NULL, "BusLogic PCI");
2812	if (RT_FAILURE(rc))
2813	return rc;
2814
2815	if (pThis->fR0Enabled)
2816	{
2817	rc = PDMDevHlpIOPortRegisterR0(pDevIns, (RTIOPORT)GCPhysAddress, 32,
2818	0, "buslogicIOPortWrite", "buslogicIOPortRead", NULL, NULL, "BusLogic PCI");
2819	if (RT_FAILURE(rc))
2820	return rc;
2821	}
2822
2823	if (pThis->fGCEnabled)
2824	{
2825	rc = PDMDevHlpIOPortRegisterRC(pDevIns, (RTIOPORT)GCPhysAddress, 32,
2826	0, "buslogicIOPortWrite", "buslogicIOPortRead", NULL, NULL, "BusLogic PCI");
2827	if (RT_FAILURE(rc))
2828	return rc;
2829	}
2830
2831	pThis->IOPortBase = (RTIOPORT)GCPhysAddress;
2832	}
2833	else
2834	AssertMsgFailed(("Invalid enmType=%d\n", enmType));
2835
2836	return rc;
2837	}
2838
2839	static int buslogicR3ReqComplete(PBUSLOGIC pThis, PBUSLOGICREQ pReq, int rcReq)
2840	{
2841	RT_NOREF(rcReq);
2842	PBUSLOGICDEVICE pTgtDev = pReq->pTargetDevice;
2843
2844	LogFlowFunc(("before decrement %u\n", pTgtDev->cOutstandingRequests));
2845	ASMAtomicDecU32(&pTgtDev->cOutstandingRequests);
2846	LogFlowFunc(("after decrement %u\n", pTgtDev->cOutstandingRequests));
2847
2848	if (pReq->fBIOS)
2849	{
2850	uint8_t u8ScsiSts = pReq->u8ScsiSts;
2851	pTgtDev->pDrvMediaEx->pfnIoReqFree(pTgtDev->pDrvMediaEx, pReq->hIoReq);
2852	int rc = vboxscsiRequestFinished(&pThis->VBoxSCSI, u8ScsiSts);
2853	AssertMsgRC(rc, ("Finishing BIOS SCSI request failed rc=%Rrc\n", rc));
2854	}
2855	else
2856	{
2857	if (pReq->pbSenseBuffer)
2858	buslogicR3SenseBufferFree(pReq, (pReq->u8ScsiSts != SCSI_STATUS_OK));
2859
2860	/* Update residual data length. */
2861	if ( (pReq->CCBGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_DATA_LENGTH)
2862	\|\| (pReq->CCBGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_SCATTER_GATHER))
2863	{
2864	size_t cbResidual = 0;
2865	int rc = pTgtDev->pDrvMediaEx->pfnIoReqQueryResidual(pTgtDev->pDrvMediaEx, pReq->hIoReq, &cbResidual);
2866	AssertRC(rc); Assert(cbResidual == (uint32_t)cbResidual);
2867
2868	if (pReq->fIs24Bit)
2869	U32_TO_LEN(pReq->CCBGuest.o.acbData, (uint32_t)cbResidual);
2870	else
2871	pReq->CCBGuest.n.cbData = (uint32_t)cbResidual;
2872	}
2873
2874	/*
2875	* Save vital things from the request and free it before posting completion
2876	* to avoid that the guest submits a new request with the same ID as the still
2877	* allocated one.
2878	*/
2879	#ifdef LOG_ENABLED
2880	bool fIs24Bit = pReq->fIs24Bit;
2881	#endif
2882	uint8_t u8ScsiSts = pReq->u8ScsiSts;
2883	RTGCPHYS GCPhysAddrCCB = pReq->GCPhysAddrCCB;
2884	CCBU CCBGuest;
2885	memcpy(&CCBGuest, &pReq->CCBGuest, sizeof(CCBU));
2886
2887	pTgtDev->pDrvMediaEx->pfnIoReqFree(pTgtDev->pDrvMediaEx, pReq->hIoReq);
2888	if (u8ScsiSts == SCSI_STATUS_OK)
2889	buslogicR3SendIncomingMailbox(pThis, GCPhysAddrCCB, &CCBGuest,
2890	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_CMD_COMPLETED,
2891	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
2892	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITHOUT_ERROR);
2893	else if (u8ScsiSts == SCSI_STATUS_CHECK_CONDITION)
2894	buslogicR3SendIncomingMailbox(pThis, GCPhysAddrCCB, &CCBGuest,
2895	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_CMD_COMPLETED,
2896	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_CHECK_CONDITION,
2897	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR);
2898	else
2899	AssertMsgFailed(("invalid completion status %u\n", u8ScsiSts));
2900
2901	#ifdef LOG_ENABLED
2902	buslogicR3DumpCCBInfo(&CCBGuest, fIs24Bit);
2903	#endif
2904	}
2905
2906	if (pTgtDev->cOutstandingRequests == 0 && pThis->fSignalIdle)
2907	PDMDevHlpAsyncNotificationCompleted(pThis->pDevInsR3);
2908
2909	return VINF_SUCCESS;
2910	}
2911
2912	static DECLCALLBACK(int) buslogicR3QueryDeviceLocation(PPDMIMEDIAPORT pInterface, const char **ppcszController,
2913	uint32_t piInstance, uint32_t piLUN)
2914	{
2915	PBUSLOGICDEVICE pBusLogicDevice = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, IMediaPort);
2916	PPDMDEVINS pDevIns = pBusLogicDevice->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns);
2917
2918	AssertPtrReturn(ppcszController, VERR_INVALID_POINTER);
2919	AssertPtrReturn(piInstance, VERR_INVALID_POINTER);
2920	AssertPtrReturn(piLUN, VERR_INVALID_POINTER);
2921
2922	*ppcszController = pDevIns->pReg->szName;
2923	*piInstance = pDevIns->iInstance;
2924	*piLUN = pBusLogicDevice->iLUN;
2925
2926	return VINF_SUCCESS;
2927	}
2928
2929	/**
2930	* @interface_method_impl{PDMIMEDIAEXPORT,pfnIoReqCopyFromBuf}
2931	*/
2932	static DECLCALLBACK(int) buslogicR3IoReqCopyFromBuf(PPDMIMEDIAEXPORT pInterface, PDMMEDIAEXIOREQ hIoReq,
2933	void *pvIoReqAlloc, uint32_t offDst, PRTSGBUF pSgBuf,
2934	size_t cbCopy)
2935	{
2936	RT_NOREF1(hIoReq);
2937	PBUSLOGICDEVICE pTgtDev = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, IMediaExPort);
2938	PBUSLOGICREQ pReq = (PBUSLOGICREQ)pvIoReqAlloc;
2939
2940	size_t cbCopied = 0;
2941	if (RT_UNLIKELY(pReq->fBIOS))
2942	cbCopied = vboxscsiCopyToBuf(&pTgtDev->CTX_SUFF(pBusLogic)->VBoxSCSI, pSgBuf, offDst, cbCopy);
2943	else
2944	cbCopied = buslogicR3CopySgBufToGuest(pTgtDev->CTX_SUFF(pBusLogic), pReq, pSgBuf, offDst, cbCopy);
2945	return cbCopied == cbCopy ? VINF_SUCCESS : VERR_PDM_MEDIAEX_IOBUF_OVERFLOW;
2946	}
2947
2948	/**
2949	* @interface_method_impl{PDMIMEDIAEXPORT,pfnIoReqCopyToBuf}
2950	*/
2951	static DECLCALLBACK(int) buslogicR3IoReqCopyToBuf(PPDMIMEDIAEXPORT pInterface, PDMMEDIAEXIOREQ hIoReq,
2952	void *pvIoReqAlloc, uint32_t offSrc, PRTSGBUF pSgBuf,
2953	size_t cbCopy)
2954	{
2955	RT_NOREF1(hIoReq);
2956	PBUSLOGICDEVICE pTgtDev = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, IMediaExPort);
2957	PBUSLOGICREQ pReq = (PBUSLOGICREQ)pvIoReqAlloc;
2958
2959	size_t cbCopied = 0;
2960	if (RT_UNLIKELY(pReq->fBIOS))
2961	cbCopied = vboxscsiCopyFromBuf(&pTgtDev->CTX_SUFF(pBusLogic)->VBoxSCSI, pSgBuf, offSrc, cbCopy);
2962	else
2963	cbCopied = buslogicR3CopySgBufFromGuest(pTgtDev->CTX_SUFF(pBusLogic), pReq, pSgBuf, offSrc, cbCopy);
2964	return cbCopied == cbCopy ? VINF_SUCCESS : VERR_PDM_MEDIAEX_IOBUF_UNDERRUN;
2965	}
2966
2967	/**
2968	* @interface_method_impl{PDMIMEDIAEXPORT,pfnIoReqCompleteNotify}
2969	*/
2970	static DECLCALLBACK(int) buslogicR3IoReqCompleteNotify(PPDMIMEDIAEXPORT pInterface, PDMMEDIAEXIOREQ hIoReq,
2971	void *pvIoReqAlloc, int rcReq)
2972	{
2973	RT_NOREF(hIoReq);
2974	PBUSLOGICDEVICE pTgtDev = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, IMediaExPort);
2975	buslogicR3ReqComplete(pTgtDev->CTX_SUFF(pBusLogic), (PBUSLOGICREQ)pvIoReqAlloc, rcReq);
2976	return VINF_SUCCESS;
2977	}
2978
2979	/**
2980	* @interface_method_impl{PDMIMEDIAEXPORT,pfnIoReqStateChanged}
2981	*/
2982	static DECLCALLBACK(void) buslogicR3IoReqStateChanged(PPDMIMEDIAEXPORT pInterface, PDMMEDIAEXIOREQ hIoReq,
2983	void *pvIoReqAlloc, PDMMEDIAEXIOREQSTATE enmState)
2984	{
2985	RT_NOREF3(hIoReq, pvIoReqAlloc, enmState);
2986	PBUSLOGICDEVICE pTgtDev = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, IMediaExPort);
2987
2988	switch (enmState)
2989	{
2990	case PDMMEDIAEXIOREQSTATE_SUSPENDED:
2991	{
2992	/* Make sure the request is not accounted for so the VM can suspend successfully. */
2993	uint32_t cTasksActive = ASMAtomicDecU32(&pTgtDev->cOutstandingRequests);
2994	if (!cTasksActive && pTgtDev->CTX_SUFF(pBusLogic)->fSignalIdle)
2995	PDMDevHlpAsyncNotificationCompleted(pTgtDev->CTX_SUFF(pBusLogic)->pDevInsR3);
2996	break;
2997	}
2998	case PDMMEDIAEXIOREQSTATE_ACTIVE:
2999	/* Make sure the request is accounted for so the VM suspends only when the request is complete. */
3000	ASMAtomicIncU32(&pTgtDev->cOutstandingRequests);
3001	break;
3002	default:
3003	AssertMsgFailed(("Invalid request state given %u\n", enmState));
3004	}
3005	}
3006
3007	/**
3008	* @interface_method_impl{PDMIMEDIAEXPORT,pfnMediumEjected}
3009	*/
3010	static DECLCALLBACK(void) buslogicR3MediumEjected(PPDMIMEDIAEXPORT pInterface)
3011	{
3012	PBUSLOGICDEVICE pTgtDev = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, IMediaExPort);
3013	PBUSLOGIC pThis = pTgtDev->CTX_SUFF(pBusLogic);
3014
3015	if (pThis->pMediaNotify)
3016	{
3017	int rc = VMR3ReqCallNoWait(PDMDevHlpGetVM(pThis->CTX_SUFF(pDevIns)), VMCPUID_ANY,
3018	(PFNRT)pThis->pMediaNotify->pfnEjected, 2,
3019	pThis->pMediaNotify, pTgtDev->iLUN);
3020	AssertRC(rc);
3021	}
3022	}
3023
3024	static int buslogicR3DeviceSCSIRequestSetup(PBUSLOGIC pBusLogic, RTGCPHYS GCPhysAddrCCB)
3025	{
3026	int rc = VINF_SUCCESS;
3027	uint8_t uTargetIdCCB;
3028	CCBU CCBGuest;
3029
3030	/* Fetch the CCB from guest memory. */
3031	/** @todo How much do we really have to read? */
3032	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrCCB,
3033	&CCBGuest, sizeof(CCB32));
3034
3035	uTargetIdCCB = pBusLogic->fMbxIs24Bit ? CCBGuest.o.uTargetId : CCBGuest.n.uTargetId;
3036	if (RT_LIKELY(uTargetIdCCB < RT_ELEMENTS(pBusLogic->aDeviceStates)))
3037	{
3038	PBUSLOGICDEVICE pTgtDev = &pBusLogic->aDeviceStates[uTargetIdCCB];
3039
3040	#ifdef LOG_ENABLED
3041	buslogicR3DumpCCBInfo(&CCBGuest, pBusLogic->fMbxIs24Bit);
3042	#endif
3043
3044	/* Check if device is present on bus. If not return error immediately and don't process this further. */
3045	if (RT_LIKELY(pTgtDev->fPresent))
3046	{
3047	PDMMEDIAEXIOREQ hIoReq;
3048	PBUSLOGICREQ pReq;
3049	rc = pTgtDev->pDrvMediaEx->pfnIoReqAlloc(pTgtDev->pDrvMediaEx, &hIoReq, (void **)&pReq,
3050	GCPhysAddrCCB, PDMIMEDIAEX_F_SUSPEND_ON_RECOVERABLE_ERR);
3051	if (RT_SUCCESS(rc))
3052	{
3053	pReq->pTargetDevice = pTgtDev;
3054	pReq->GCPhysAddrCCB = GCPhysAddrCCB;
3055	pReq->fBIOS = false;
3056	pReq->hIoReq = hIoReq;
3057	pReq->fIs24Bit = pBusLogic->fMbxIs24Bit;
3058
3059	/* Make a copy of the CCB */
3060	memcpy(&pReq->CCBGuest, &CCBGuest, sizeof(CCBGuest));
3061
3062	/* Alloc required buffers. */
3063	rc = buslogicR3SenseBufferAlloc(pReq);
3064	AssertMsgRC(rc, ("Mapping sense buffer failed rc=%Rrc\n", rc));
3065
3066	size_t cbBuf = 0;
3067	rc = buslogicR3QueryDataBufferSize(pBusLogic->CTX_SUFF(pDevIns), &pReq->CCBGuest, pReq->fIs24Bit, &cbBuf);
3068	AssertRC(rc);
3069
3070	uint32_t uLun = pReq->fIs24Bit ? pReq->CCBGuest.o.uLogicalUnit
3071	: pReq->CCBGuest.n.uLogicalUnit;
3072
3073	PDMMEDIAEXIOREQSCSITXDIR enmXferDir = PDMMEDIAEXIOREQSCSITXDIR_UNKNOWN;
3074	size_t cbSense = buslogicR3ConvertSenseBufferLength(CCBGuest.c.cbSenseData);
3075
3076	if (CCBGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_NO_DATA)
3077	enmXferDir = PDMMEDIAEXIOREQSCSITXDIR_NONE;
3078	else if (CCBGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_OUT)
3079	enmXferDir = PDMMEDIAEXIOREQSCSITXDIR_TO_DEVICE;
3080	else if (CCBGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_IN)
3081	enmXferDir = PDMMEDIAEXIOREQSCSITXDIR_FROM_DEVICE;
3082
3083	ASMAtomicIncU32(&pTgtDev->cOutstandingRequests);
3084	rc = pTgtDev->pDrvMediaEx->pfnIoReqSendScsiCmd(pTgtDev->pDrvMediaEx, pReq->hIoReq, uLun,
3085	&pReq->CCBGuest.c.abCDB[0], pReq->CCBGuest.c.cbCDB,
3086	enmXferDir, cbBuf, pReq->pbSenseBuffer, cbSense,
3087	&pReq->u8ScsiSts, 30 * RT_MS_1SEC);
3088	if (rc != VINF_PDM_MEDIAEX_IOREQ_IN_PROGRESS)
3089	buslogicR3ReqComplete(pBusLogic, pReq, rc);
3090	}
3091	else
3092	buslogicR3SendIncomingMailbox(pBusLogic, GCPhysAddrCCB, &CCBGuest,
3093	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_SCSI_SELECTION_TIMEOUT,
3094	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
3095	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR);
3096	}
3097	else
3098	buslogicR3SendIncomingMailbox(pBusLogic, GCPhysAddrCCB, &CCBGuest,
3099	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_SCSI_SELECTION_TIMEOUT,
3100	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
3101	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR);
3102	}
3103	else
3104	buslogicR3SendIncomingMailbox(pBusLogic, GCPhysAddrCCB, &CCBGuest,
3105	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_COMMAND_PARAMETER,
3106	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
3107	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR);
3108
3109	return rc;
3110	}
3111
3112	static int buslogicR3DeviceSCSIRequestAbort(PBUSLOGIC pBusLogic, RTGCPHYS GCPhysAddrCCB)
3113	{
3114	int rc = VINF_SUCCESS;
3115	uint8_t uTargetIdCCB;
3116	CCBU CCBGuest;
3117
3118	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrCCB,
3119	&CCBGuest, sizeof(CCB32));
3120
3121	uTargetIdCCB = pBusLogic->fMbxIs24Bit ? CCBGuest.o.uTargetId : CCBGuest.n.uTargetId;
3122	if (RT_LIKELY(uTargetIdCCB < RT_ELEMENTS(pBusLogic->aDeviceStates)))
3123	buslogicR3SendIncomingMailbox(pBusLogic, GCPhysAddrCCB, &CCBGuest,
3124	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_ABORT_QUEUE_GENERATED,
3125	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
3126	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_ABORTED_NOT_FOUND);
3127	else
3128	buslogicR3SendIncomingMailbox(pBusLogic, GCPhysAddrCCB, &CCBGuest,
3129	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_COMMAND_PARAMETER,
3130	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
3131	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR);
3132
3133	return rc;
3134	}
3135
3136	/**
3137	* Read a mailbox from guest memory. Convert 24-bit mailboxes to
3138	* 32-bit format.
3139	*
3140	* @returns Mailbox guest physical address.
3141	* @param pBusLogic Pointer to the BusLogic instance data.
3142	* @param pMbx Pointer to the mailbox to read into.
3143	*/
3144	static RTGCPHYS buslogicR3ReadOutgoingMailbox(PBUSLOGIC pBusLogic, PMailbox32 pMbx)
3145	{
3146	RTGCPHYS GCMailbox;
3147
3148	if (pBusLogic->fMbxIs24Bit)
3149	{
3150	Mailbox24 Mbx24;
3151
3152	GCMailbox = pBusLogic->GCPhysAddrMailboxOutgoingBase + (pBusLogic->uMailboxOutgoingPositionCurrent * sizeof(Mailbox24));
3153	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCMailbox, &Mbx24, sizeof(Mailbox24));
3154	pMbx->u32PhysAddrCCB = ADDR_TO_U32(Mbx24.aPhysAddrCCB);
3155	pMbx->u.out.uActionCode = Mbx24.uCmdState;
3156	}
3157	else
3158	{
3159	GCMailbox = pBusLogic->GCPhysAddrMailboxOutgoingBase + (pBusLogic->uMailboxOutgoingPositionCurrent * sizeof(Mailbox32));
3160	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCMailbox, pMbx, sizeof(Mailbox32));
3161	}
3162
3163	return GCMailbox;
3164	}
3165
3166	/**
3167	* Read mailbox from the guest and execute command.
3168	*
3169	* @returns VBox status code.
3170	* @param pBusLogic Pointer to the BusLogic instance data.
3171	*/
3172	static int buslogicR3ProcessMailboxNext(PBUSLOGIC pBusLogic)
3173	{
3174	RTGCPHYS GCPhysAddrMailboxCurrent;
3175	Mailbox32 MailboxGuest;
3176	int rc = VINF_SUCCESS;
3177
3178	if (!pBusLogic->fStrictRoundRobinMode)
3179	{
3180	/* Search for a filled mailbox - stop if we have scanned all mailboxes. */
3181	uint8_t uMailboxPosCur = pBusLogic->uMailboxOutgoingPositionCurrent;
3182
3183	do
3184	{
3185	/* Fetch mailbox from guest memory. */
3186	GCPhysAddrMailboxCurrent = buslogicR3ReadOutgoingMailbox(pBusLogic, &MailboxGuest);
3187
3188	/* Check the next mailbox. */
3189	buslogicR3OutgoingMailboxAdvance(pBusLogic);
3190	} while ( MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE
3191	&& uMailboxPosCur != pBusLogic->uMailboxOutgoingPositionCurrent);
3192	}
3193	else
3194	{
3195	/* Fetch mailbox from guest memory. */
3196	GCPhysAddrMailboxCurrent = buslogicR3ReadOutgoingMailbox(pBusLogic, &MailboxGuest);
3197	}
3198
3199	/*
3200	* Check if the mailbox is actually loaded.
3201	* It might be possible that the guest notified us without
3202	* a loaded mailbox. Do nothing in that case but leave a
3203	* log entry.
3204	*/
3205	if (MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE)
3206	{
3207	Log(("No loaded mailbox left\n"));
3208	return VERR_NO_DATA;
3209	}
3210
3211	LogFlow(("Got loaded mailbox at slot %u, CCB phys %RGp\n", pBusLogic->uMailboxOutgoingPositionCurrent, (RTGCPHYS)MailboxGuest.u32PhysAddrCCB));
3212	#ifdef LOG_ENABLED
3213	buslogicR3DumpMailboxInfo(&MailboxGuest, true);
3214	#endif
3215
3216	/* We got the mailbox, mark it as free in the guest. */
3217	uint8_t uActionCode = BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE;
3218	unsigned uCodeOffs = pBusLogic->fMbxIs24Bit ? RT_OFFSETOF(Mailbox24, uCmdState) : RT_OFFSETOF(Mailbox32, u.out.uActionCode);
3219	PDMDevHlpPCIPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxCurrent + uCodeOffs, &uActionCode, sizeof(uActionCode));
3220
3221	if (MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_START_COMMAND)
3222	rc = buslogicR3DeviceSCSIRequestSetup(pBusLogic, (RTGCPHYS)MailboxGuest.u32PhysAddrCCB);
3223	else if (MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_ABORT_COMMAND)
3224	{
3225	LogFlow(("Aborting mailbox\n"));
3226	rc = buslogicR3DeviceSCSIRequestAbort(pBusLogic, (RTGCPHYS)MailboxGuest.u32PhysAddrCCB);
3227	}
3228	else
3229	AssertMsgFailed(("Invalid outgoing mailbox action code %u\n", MailboxGuest.u.out.uActionCode));
3230
3231	AssertRC(rc);
3232
3233	/* Advance to the next mailbox. */
3234	if (pBusLogic->fStrictRoundRobinMode)
3235	buslogicR3OutgoingMailboxAdvance(pBusLogic);
3236
3237	return rc;
3238	}
3239
3240	/**
3241	* Transmit queue consumer
3242	* Queue a new async task.
3243	*
3244	* @returns Success indicator.
3245	* If false the item will not be removed and the flushing will stop.
3246	* @param pDevIns The device instance.
3247	* @param pItem The item to consume. Upon return this item will be freed.
3248	*/
3249	static DECLCALLBACK(bool) buslogicR3NotifyQueueConsumer(PPDMDEVINS pDevIns, PPDMQUEUEITEMCORE pItem)
3250	{
3251	RT_NOREF(pItem);
3252	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3253
3254	int rc = SUPSemEventSignal(pThis->pSupDrvSession, pThis->hEvtProcess);
3255	AssertRC(rc);
3256
3257	return true;
3258	}
3259
3260	/** @callback_method_impl{FNSSMDEVLIVEEXEC} */
3261	static DECLCALLBACK(int) buslogicR3LiveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uPass)
3262	{
3263	RT_NOREF(uPass);
3264	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3265
3266	/* Save the device config. */
3267	for (unsigned i = 0; i < RT_ELEMENTS(pThis->aDeviceStates); i++)
3268	SSMR3PutBool(pSSM, pThis->aDeviceStates[i].fPresent);
3269
3270	return VINF_SSM_DONT_CALL_AGAIN;
3271	}
3272
3273	/** @callback_method_impl{FNSSMDEVSAVEEXEC} */
3274	static DECLCALLBACK(int) buslogicR3SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
3275	{
3276	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3277	uint32_t cReqsSuspended = 0;
3278
3279	/* Every device first. */
3280	for (unsigned i = 0; i < RT_ELEMENTS(pBusLogic->aDeviceStates); i++)
3281	{
3282	PBUSLOGICDEVICE pDevice = &pBusLogic->aDeviceStates[i];
3283
3284	AssertMsg(!pDevice->cOutstandingRequests,
3285	("There are still outstanding requests on this device\n"));
3286	SSMR3PutBool(pSSM, pDevice->fPresent);
3287	SSMR3PutU32(pSSM, pDevice->cOutstandingRequests);
3288
3289	if (pDevice->fPresent)
3290	cReqsSuspended += pDevice->pDrvMediaEx->pfnIoReqGetSuspendedCount(pDevice->pDrvMediaEx);
3291	}
3292	/* Now the main device state. */
3293	SSMR3PutU8 (pSSM, pBusLogic->regStatus);
3294	SSMR3PutU8 (pSSM, pBusLogic->regInterrupt);
3295	SSMR3PutU8 (pSSM, pBusLogic->regGeometry);
3296	SSMR3PutMem (pSSM, &pBusLogic->LocalRam, sizeof(pBusLogic->LocalRam));
3297	SSMR3PutU8 (pSSM, pBusLogic->uOperationCode);
3298	SSMR3PutMem (pSSM, &pBusLogic->aCommandBuffer, sizeof(pBusLogic->aCommandBuffer));
3299	SSMR3PutU8 (pSSM, pBusLogic->iParameter);
3300	SSMR3PutU8 (pSSM, pBusLogic->cbCommandParametersLeft);
3301	SSMR3PutBool (pSSM, pBusLogic->fUseLocalRam);
3302	SSMR3PutMem (pSSM, pBusLogic->aReplyBuffer, sizeof(pBusLogic->aReplyBuffer));
3303	SSMR3PutU8 (pSSM, pBusLogic->iReply);
3304	SSMR3PutU8 (pSSM, pBusLogic->cbReplyParametersLeft);
3305	SSMR3PutBool (pSSM, pBusLogic->fIRQEnabled);
3306	SSMR3PutU8 (pSSM, pBusLogic->uISABaseCode);
3307	SSMR3PutU32 (pSSM, pBusLogic->cMailbox);
3308	SSMR3PutBool (pSSM, pBusLogic->fMbxIs24Bit);
3309	SSMR3PutGCPhys(pSSM, pBusLogic->GCPhysAddrMailboxOutgoingBase);
3310	SSMR3PutU32 (pSSM, pBusLogic->uMailboxOutgoingPositionCurrent);
3311	SSMR3PutU32 (pSSM, pBusLogic->cMailboxesReady);
3312	SSMR3PutBool (pSSM, pBusLogic->fNotificationSent);
3313	SSMR3PutGCPhys(pSSM, pBusLogic->GCPhysAddrMailboxIncomingBase);
3314	SSMR3PutU32 (pSSM, pBusLogic->uMailboxIncomingPositionCurrent);
3315	SSMR3PutBool (pSSM, pBusLogic->fStrictRoundRobinMode);
3316	SSMR3PutBool (pSSM, pBusLogic->fExtendedLunCCBFormat);
3317
3318	vboxscsiR3SaveExec(&pBusLogic->VBoxSCSI, pSSM);
3319
3320	SSMR3PutU32(pSSM, cReqsSuspended);
3321
3322	/* Save the physical CCB address of all suspended requests. */
3323	for (unsigned i = 0; i < RT_ELEMENTS(pBusLogic->aDeviceStates) && cReqsSuspended; i++)
3324	{
3325	PBUSLOGICDEVICE pDevice = &pBusLogic->aDeviceStates[i];
3326	if (pDevice->fPresent)
3327	{
3328	uint32_t cThisReqsSuspended = pDevice->pDrvMediaEx->pfnIoReqGetSuspendedCount(pDevice->pDrvMediaEx);
3329
3330	cReqsSuspended -= cThisReqsSuspended;
3331	if (cThisReqsSuspended)
3332	{
3333	PDMMEDIAEXIOREQ hIoReq;
3334	PBUSLOGICREQ pReq;
3335	int rc = pDevice->pDrvMediaEx->pfnIoReqQuerySuspendedStart(pDevice->pDrvMediaEx, &hIoReq,
3336	(void **)&pReq);
3337	AssertRCBreak(rc);
3338
3339	for (;;)
3340	{
3341	SSMR3PutU32(pSSM, (uint32_t)pReq->GCPhysAddrCCB);
3342
3343	cThisReqsSuspended--;
3344	if (!cThisReqsSuspended)
3345	break;
3346
3347	rc = pDevice->pDrvMediaEx->pfnIoReqQuerySuspendedNext(pDevice->pDrvMediaEx, hIoReq,
3348	&hIoReq, (void **)&pReq);
3349	AssertRCBreak(rc);
3350	}
3351	}
3352	}
3353	}
3354
3355	return SSMR3PutU32(pSSM, UINT32_MAX);
3356	}
3357
3358	/** @callback_method_impl{FNSSMDEVLOADDONE} */
3359	static DECLCALLBACK(int) buslogicR3LoadDone(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
3360	{
3361	RT_NOREF(pSSM);
3362	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3363
3364	buslogicR3RegisterISARange(pThis, pThis->uISABaseCode);
3365
3366	/* Kick of any requests we might need to redo. */
3367	if (pThis->VBoxSCSI.fBusy)
3368	{
3369
3370	/* The BIOS had a request active when we got suspended. Resume it. */
3371	int rc = buslogicR3PrepareBIOSSCSIRequest(pThis);
3372	AssertRC(rc);
3373	}
3374	else if (pThis->cReqsRedo)
3375	{
3376	for (unsigned i = 0; i < pThis->cReqsRedo; i++)
3377	{
3378	int rc = buslogicR3DeviceSCSIRequestSetup(pThis, pThis->paGCPhysAddrCCBRedo[i]);
3379	AssertRC(rc);
3380	}
3381
3382	RTMemFree(pThis->paGCPhysAddrCCBRedo);
3383	pThis->paGCPhysAddrCCBRedo = NULL;
3384	pThis->cReqsRedo = 0;
3385	}
3386
3387	return VINF_SUCCESS;
3388	}
3389
3390	/** @callback_method_impl{FNSSMDEVLOADEXEC} */
3391	static DECLCALLBACK(int) buslogicR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
3392	{
3393	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3394	int rc = VINF_SUCCESS;
3395
3396	/* We support saved states only from this and older versions. */
3397	if (uVersion > BUSLOGIC_SAVED_STATE_MINOR_VERSION)
3398	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
3399
3400	/* Every device first. */
3401	for (unsigned i = 0; i < RT_ELEMENTS(pBusLogic->aDeviceStates); i++)
3402	{
3403	PBUSLOGICDEVICE pDevice = &pBusLogic->aDeviceStates[i];
3404
3405	AssertMsg(!pDevice->cOutstandingRequests,
3406	("There are still outstanding requests on this device\n"));
3407	bool fPresent;
3408	rc = SSMR3GetBool(pSSM, &fPresent);
3409	AssertRCReturn(rc, rc);
3410	if (pDevice->fPresent != fPresent)
3411	return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Target %u config mismatch: config=%RTbool state=%RTbool"), i, pDevice->fPresent, fPresent);
3412
3413	if (uPass == SSM_PASS_FINAL)
3414	SSMR3GetU32(pSSM, (uint32_t *)&pDevice->cOutstandingRequests);
3415	}
3416
3417	if (uPass != SSM_PASS_FINAL)
3418	return VINF_SUCCESS;
3419
3420	/* Now the main device state. */
3421	SSMR3GetU8 (pSSM, (uint8_t *)&pBusLogic->regStatus);
3422	SSMR3GetU8 (pSSM, (uint8_t *)&pBusLogic->regInterrupt);
3423	SSMR3GetU8 (pSSM, (uint8_t *)&pBusLogic->regGeometry);
3424	SSMR3GetMem (pSSM, &pBusLogic->LocalRam, sizeof(pBusLogic->LocalRam));
3425	SSMR3GetU8 (pSSM, &pBusLogic->uOperationCode);
3426	if (uVersion > BUSLOGIC_SAVED_STATE_MINOR_PRE_CMDBUF_RESIZE)
3427	SSMR3GetMem (pSSM, &pBusLogic->aCommandBuffer, sizeof(pBusLogic->aCommandBuffer));
3428	else
3429	SSMR3GetMem (pSSM, &pBusLogic->aCommandBuffer, BUSLOGIC_COMMAND_SIZE_OLD);
3430	SSMR3GetU8 (pSSM, &pBusLogic->iParameter);
3431	SSMR3GetU8 (pSSM, &pBusLogic->cbCommandParametersLeft);
3432	SSMR3GetBool (pSSM, &pBusLogic->fUseLocalRam);
3433	SSMR3GetMem (pSSM, pBusLogic->aReplyBuffer, sizeof(pBusLogic->aReplyBuffer));
3434	SSMR3GetU8 (pSSM, &pBusLogic->iReply);
3435	SSMR3GetU8 (pSSM, &pBusLogic->cbReplyParametersLeft);
3436	SSMR3GetBool (pSSM, &pBusLogic->fIRQEnabled);
3437	SSMR3GetU8 (pSSM, &pBusLogic->uISABaseCode);
3438	SSMR3GetU32 (pSSM, &pBusLogic->cMailbox);
3439	if (uVersion > BUSLOGIC_SAVED_STATE_MINOR_PRE_24BIT_MBOX)
3440	SSMR3GetBool (pSSM, &pBusLogic->fMbxIs24Bit);
3441	SSMR3GetGCPhys(pSSM, &pBusLogic->GCPhysAddrMailboxOutgoingBase);
3442	SSMR3GetU32 (pSSM, &pBusLogic->uMailboxOutgoingPositionCurrent);
3443	SSMR3GetU32 (pSSM, (uint32_t *)&pBusLogic->cMailboxesReady);
3444	SSMR3GetBool (pSSM, (bool *)&pBusLogic->fNotificationSent);
3445	SSMR3GetGCPhys(pSSM, &pBusLogic->GCPhysAddrMailboxIncomingBase);
3446	SSMR3GetU32 (pSSM, &pBusLogic->uMailboxIncomingPositionCurrent);
3447	SSMR3GetBool (pSSM, &pBusLogic->fStrictRoundRobinMode);
3448	SSMR3GetBool (pSSM, &pBusLogic->fExtendedLunCCBFormat);
3449
3450	rc = vboxscsiR3LoadExec(&pBusLogic->VBoxSCSI, pSSM);
3451	if (RT_FAILURE(rc))
3452	{
3453	LogRel(("BusLogic: Failed to restore BIOS state: %Rrc.\n", rc));
3454	return PDMDEV_SET_ERROR(pDevIns, rc,
3455	N_("BusLogic: Failed to restore BIOS state\n"));
3456	}
3457
3458	if (uVersion > BUSLOGIC_SAVED_STATE_MINOR_PRE_ERROR_HANDLING)
3459	{
3460	/* Check if there are pending tasks saved. */
3461	uint32_t cTasks = 0;
3462
3463	SSMR3GetU32(pSSM, &cTasks);
3464
3465	if (cTasks)
3466	{
3467	pBusLogic->paGCPhysAddrCCBRedo = (PRTGCPHYS)RTMemAllocZ(cTasks * sizeof(RTGCPHYS));
3468	if (RT_LIKELY(pBusLogic->paGCPhysAddrCCBRedo))
3469	{
3470	pBusLogic->cReqsRedo = cTasks;
3471
3472	for (uint32_t i = 0; i < cTasks; i++)
3473	{
3474	uint32_t u32PhysAddrCCB;
3475
3476	rc = SSMR3GetU32(pSSM, &u32PhysAddrCCB);
3477	if (RT_FAILURE(rc))
3478	break;
3479
3480	pBusLogic->paGCPhysAddrCCBRedo[i] = u32PhysAddrCCB;
3481	}
3482	}
3483	else
3484	rc = VERR_NO_MEMORY;
3485	}
3486	}
3487
3488	if (RT_SUCCESS(rc))
3489	{
3490	uint32_t u32;
3491	rc = SSMR3GetU32(pSSM, &u32);
3492	if (RT_SUCCESS(rc))
3493	AssertMsgReturn(u32 == UINT32_MAX, ("%#x\n", u32), VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
3494	}
3495
3496	return rc;
3497	}
3498
3499	/**
3500	* Gets the pointer to the status LED of a device - called from the SCSI driver.
3501	*
3502	* @returns VBox status code.
3503	* @param pInterface Pointer to the interface structure containing the called function pointer.
3504	* @param iLUN The unit which status LED we desire. Always 0 here as the driver
3505	* doesn't know about other LUN's.
3506	* @param ppLed Where to store the LED pointer.
3507	*/
3508	static DECLCALLBACK(int) buslogicR3DeviceQueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed)
3509	{
3510	PBUSLOGICDEVICE pDevice = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, ILed);
3511	if (iLUN == 0)
3512	{
3513	*ppLed = &pDevice->Led;
3514	Assert((*ppLed)->u32Magic == PDMLED_MAGIC);
3515	return VINF_SUCCESS;
3516	}
3517	return VERR_PDM_LUN_NOT_FOUND;
3518	}
3519
3520	/**
3521	* @interface_method_impl{PDMIBASE,pfnQueryInterface}
3522	*/
3523	static DECLCALLBACK(void ) buslogicR3DeviceQueryInterface(PPDMIBASE pInterface, const char pszIID)
3524	{
3525	PBUSLOGICDEVICE pDevice = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, IBase);
3526	PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pDevice->IBase);
3527	PDMIBASE_RETURN_INTERFACE(pszIID, PDMIMEDIAPORT, &pDevice->IMediaPort);
3528	PDMIBASE_RETURN_INTERFACE(pszIID, PDMIMEDIAEXPORT, &pDevice->IMediaExPort);
3529	PDMIBASE_RETURN_INTERFACE(pszIID, PDMILEDPORTS, &pDevice->ILed);
3530	return NULL;
3531	}
3532
3533	/**
3534	* Gets the pointer to the status LED of a unit.
3535	*
3536	* @returns VBox status code.
3537	* @param pInterface Pointer to the interface structure containing the called function pointer.
3538	* @param iLUN The unit which status LED we desire.
3539	* @param ppLed Where to store the LED pointer.
3540	*/
3541	static DECLCALLBACK(int) buslogicR3StatusQueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed)
3542	{
3543	PBUSLOGIC pBusLogic = RT_FROM_MEMBER(pInterface, BUSLOGIC, ILeds);
3544	if (iLUN < BUSLOGIC_MAX_DEVICES)
3545	{
3546	*ppLed = &pBusLogic->aDeviceStates[iLUN].Led;
3547	Assert((*ppLed)->u32Magic == PDMLED_MAGIC);
3548	return VINF_SUCCESS;
3549	}
3550	return VERR_PDM_LUN_NOT_FOUND;
3551	}
3552
3553	/**
3554	* @interface_method_impl{PDMIBASE,pfnQueryInterface}
3555	*/
3556	static DECLCALLBACK(void ) buslogicR3StatusQueryInterface(PPDMIBASE pInterface, const char pszIID)
3557	{
3558	PBUSLOGIC pThis = RT_FROM_MEMBER(pInterface, BUSLOGIC, IBase);
3559	PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pThis->IBase);
3560	PDMIBASE_RETURN_INTERFACE(pszIID, PDMILEDPORTS, &pThis->ILeds);
3561	return NULL;
3562	}
3563
3564	/**
3565	* The worker thread processing requests from the guest.
3566	*
3567	* @returns VBox status code.
3568	* @param pDevIns The device instance.
3569	* @param pThread The thread structure.
3570	*/
3571	static DECLCALLBACK(int) buslogicR3Worker(PPDMDEVINS pDevIns, PPDMTHREAD pThread)
3572	{
3573	RT_NOREF(pDevIns);
3574	PBUSLOGIC pThis = (PBUSLOGIC)pThread->pvUser;
3575	int rc = VINF_SUCCESS;
3576
3577	if (pThread->enmState == PDMTHREADSTATE_INITIALIZING)
3578	return VINF_SUCCESS;
3579
3580	while (pThread->enmState == PDMTHREADSTATE_RUNNING)
3581	{
3582	ASMAtomicWriteBool(&pThis->fWrkThreadSleeping, true);
3583	bool fNotificationSent = ASMAtomicXchgBool(&pThis->fNotificationSent, false);
3584	if (!fNotificationSent)
3585	{
3586	Assert(ASMAtomicReadBool(&pThis->fWrkThreadSleeping));
3587	rc = SUPSemEventWaitNoResume(pThis->pSupDrvSession, pThis->hEvtProcess, RT_INDEFINITE_WAIT);
3588	AssertLogRelMsgReturn(RT_SUCCESS(rc) \|\| rc == VERR_INTERRUPTED, ("%Rrc\n", rc), rc);
3589	if (RT_UNLIKELY(pThread->enmState != PDMTHREADSTATE_RUNNING))
3590	break;
3591	LogFlowFunc(("Woken up with rc=%Rrc\n", rc));
3592	ASMAtomicWriteBool(&pThis->fNotificationSent, false);
3593	}
3594
3595	ASMAtomicWriteBool(&pThis->fWrkThreadSleeping, false);
3596
3597	/* Check whether there is a BIOS request pending and process it first. */
3598	if (ASMAtomicReadBool(&pThis->fBiosReqPending))
3599	{
3600	rc = buslogicR3PrepareBIOSSCSIRequest(pThis);
3601	AssertRC(rc);
3602	ASMAtomicXchgBool(&pThis->fBiosReqPending, false);
3603	}
3604	else
3605	{
3606	ASMAtomicXchgU32(&pThis->cMailboxesReady, 0); /** @todo Actually not required anymore but to stay compatible with older saved states. */
3607
3608	/* Process mailboxes. */
3609	do
3610	{
3611	rc = buslogicR3ProcessMailboxNext(pThis);
3612	AssertMsg(RT_SUCCESS(rc) \|\| rc == VERR_NO_DATA, ("Processing mailbox failed rc=%Rrc\n", rc));
3613	} while (RT_SUCCESS(rc));
3614	}
3615	} /* While running */
3616
3617	return VINF_SUCCESS;
3618	}
3619
3620
3621	/**
3622	* Unblock the worker thread so it can respond to a state change.
3623	*
3624	* @returns VBox status code.
3625	* @param pDevIns The device instance.
3626	* @param pThread The send thread.
3627	*/
3628	static DECLCALLBACK(int) buslogicR3WorkerWakeUp(PPDMDEVINS pDevIns, PPDMTHREAD pThread)
3629	{
3630	RT_NOREF(pThread);
3631	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3632	return SUPSemEventSignal(pThis->pSupDrvSession, pThis->hEvtProcess);
3633	}
3634
3635	/**
3636	* BusLogic debugger info callback.
3637	*
3638	* @param pDevIns The device instance.
3639	* @param pHlp The output helpers.
3640	* @param pszArgs The arguments.
3641	*/
3642	static DECLCALLBACK(void) buslogicR3Info(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs)
3643	{
3644	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3645	unsigned i;
3646	bool fVerbose = false;
3647
3648	/* Parse arguments. */
3649	if (pszArgs)
3650	fVerbose = strstr(pszArgs, "verbose") != NULL;
3651
3652	/* Show basic information. */
3653	pHlp->pfnPrintf(pHlp,
3654	"%s#%d: PCI I/O=%RTiop ISA I/O=%RTiop MMIO=%RGp IRQ=%u GC=%RTbool R0=%RTbool\n",
3655	pDevIns->pReg->szName,
3656	pDevIns->iInstance,
3657	pThis->IOPortBase, pThis->IOISABase, pThis->MMIOBase,
3658	PCIDevGetInterruptLine(&pThis->dev),
3659	!!pThis->fGCEnabled, !!pThis->fR0Enabled);
3660
3661	/* Print mailbox state. */
3662	if (pThis->regStatus & BL_STAT_INREQ)
3663	pHlp->pfnPrintf(pHlp, "Mailbox not initialized\n");
3664	else
3665	pHlp->pfnPrintf(pHlp, "%u-bit mailbox with %u entries at %RGp (%d LUN CCBs)\n",
3666	pThis->fMbxIs24Bit ? 24 : 32, pThis->cMailbox,
3667	pThis->GCPhysAddrMailboxOutgoingBase,
3668	pThis->fMbxIs24Bit ? 8 : pThis->fExtendedLunCCBFormat ? 64 : 8);
3669
3670	/* Print register contents. */
3671	pHlp->pfnPrintf(pHlp, "Registers: STAT=%02x INTR=%02x GEOM=%02x\n",
3672	pThis->regStatus, pThis->regInterrupt, pThis->regGeometry);
3673
3674	/* Print miscellaneous state. */
3675	pHlp->pfnPrintf(pHlp, "HAC interrupts: %s\n",
3676	pThis->fIRQEnabled ? "on" : "off");
3677
3678	/* Print the current command, if any. */
3679	if (pThis->uOperationCode != 0xff )
3680	pHlp->pfnPrintf(pHlp, "Current command: %02X\n", pThis->uOperationCode);
3681
3682	if (fVerbose && (pThis->regStatus & BL_STAT_INREQ) == 0)
3683	{
3684	RTGCPHYS GCMailbox;
3685
3686	/* Dump the mailbox contents. */
3687	if (pThis->fMbxIs24Bit)
3688	{
3689	Mailbox24 Mbx24;
3690
3691	/* Outgoing mailbox, 24-bit format. */
3692	GCMailbox = pThis->GCPhysAddrMailboxOutgoingBase;
3693	pHlp->pfnPrintf(pHlp, " Outgoing mailbox entries (24-bit) at %06X:\n", GCMailbox);
3694	for (i = 0; i < pThis->cMailbox; ++i)
3695	{
3696	PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), GCMailbox, &Mbx24, sizeof(Mailbox24));
3697	pHlp->pfnPrintf(pHlp, " slot %03d: CCB at %06X action code %02X", i, ADDR_TO_U32(Mbx24.aPhysAddrCCB), Mbx24.uCmdState);
3698	pHlp->pfnPrintf(pHlp, "%s\n", pThis->uMailboxOutgoingPositionCurrent == i ? " *" : "");
3699	GCMailbox += sizeof(Mailbox24);
3700	}
3701
3702	/* Incoming mailbox, 24-bit format. */
3703	GCMailbox = pThis->GCPhysAddrMailboxOutgoingBase + (pThis->cMailbox * sizeof(Mailbox24));
3704	pHlp->pfnPrintf(pHlp, " Incoming mailbox entries (24-bit) at %06X:\n", GCMailbox);
3705	for (i = 0; i < pThis->cMailbox; ++i)
3706	{
3707	PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), GCMailbox, &Mbx24, sizeof(Mailbox24));
3708	pHlp->pfnPrintf(pHlp, " slot %03d: CCB at %06X completion code %02X", i, ADDR_TO_U32(Mbx24.aPhysAddrCCB), Mbx24.uCmdState);
3709	pHlp->pfnPrintf(pHlp, "%s\n", pThis->uMailboxIncomingPositionCurrent == i ? " *" : "");
3710	GCMailbox += sizeof(Mailbox24);
3711	}
3712
3713	}
3714	else
3715	{
3716	Mailbox32 Mbx32;
3717
3718	/* Outgoing mailbox, 32-bit format. */
3719	GCMailbox = pThis->GCPhysAddrMailboxOutgoingBase;
3720	pHlp->pfnPrintf(pHlp, " Outgoing mailbox entries (32-bit) at %08X:\n", (uint32_t)GCMailbox);
3721	for (i = 0; i < pThis->cMailbox; ++i)
3722	{
3723	PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), GCMailbox, &Mbx32, sizeof(Mailbox32));
3724	pHlp->pfnPrintf(pHlp, " slot %03d: CCB at %08X action code %02X", i, Mbx32.u32PhysAddrCCB, Mbx32.u.out.uActionCode);
3725	pHlp->pfnPrintf(pHlp, "%s\n", pThis->uMailboxOutgoingPositionCurrent == i ? " *" : "");
3726	GCMailbox += sizeof(Mailbox32);
3727	}
3728
3729	/* Incoming mailbox, 32-bit format. */
3730	GCMailbox = pThis->GCPhysAddrMailboxOutgoingBase + (pThis->cMailbox * sizeof(Mailbox32));
3731	pHlp->pfnPrintf(pHlp, " Outgoing mailbox entries (32-bit) at %08X:\n", (uint32_t)GCMailbox);
3732	for (i = 0; i < pThis->cMailbox; ++i)
3733	{
3734	PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), GCMailbox, &Mbx32, sizeof(Mailbox32));
3735	pHlp->pfnPrintf(pHlp, " slot %03d: CCB at %08X completion code %02X BTSTAT %02X SDSTAT %02X", i,
3736	Mbx32.u32PhysAddrCCB, Mbx32.u.in.uCompletionCode, Mbx32.u.in.uHostAdapterStatus, Mbx32.u.in.uTargetDeviceStatus);
3737	pHlp->pfnPrintf(pHlp, "%s\n", pThis->uMailboxOutgoingPositionCurrent == i ? " *" : "");
3738	GCMailbox += sizeof(Mailbox32);
3739	}
3740
3741	}
3742	}
3743	}
3744
3745	/* -=-=-=-=- Helper -=-=-=-=- */
3746
3747	/**
3748	* Checks if all asynchronous I/O is finished.
3749	*
3750	* Used by buslogicR3Reset, buslogicR3Suspend and buslogicR3PowerOff.
3751	*
3752	* @returns true if quiesced, false if busy.
3753	* @param pDevIns The device instance.
3754	*/
3755	static bool buslogicR3AllAsyncIOIsFinished(PPDMDEVINS pDevIns)
3756	{
3757	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3758
3759	for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aDeviceStates); i++)
3760	{
3761	PBUSLOGICDEVICE pThisDevice = &pThis->aDeviceStates[i];
3762	if (pThisDevice->pDrvBase)
3763	{
3764	if (pThisDevice->cOutstandingRequests != 0)
3765	return false;
3766	}
3767	}
3768
3769	return true;
3770	}
3771
3772	/**
3773	* Callback employed by buslogicR3Suspend and buslogicR3PowerOff.
3774	*
3775	* @returns true if we've quiesced, false if we're still working.
3776	* @param pDevIns The device instance.
3777	*/
3778	static DECLCALLBACK(bool) buslogicR3IsAsyncSuspendOrPowerOffDone(PPDMDEVINS pDevIns)
3779	{
3780	if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
3781	return false;
3782
3783	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3784	ASMAtomicWriteBool(&pThis->fSignalIdle, false);
3785	return true;
3786	}
3787
3788	/**
3789	* Common worker for buslogicR3Suspend and buslogicR3PowerOff.
3790	*/
3791	static void buslogicR3SuspendOrPowerOff(PPDMDEVINS pDevIns)
3792	{
3793	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3794
3795	ASMAtomicWriteBool(&pThis->fSignalIdle, true);
3796	if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
3797	PDMDevHlpSetAsyncNotification(pDevIns, buslogicR3IsAsyncSuspendOrPowerOffDone);
3798	else
3799	{
3800	ASMAtomicWriteBool(&pThis->fSignalIdle, false);
3801	AssertMsg(!pThis->fNotificationSent, ("The PDM Queue should be empty at this point\n"));
3802	}
3803	}
3804
3805	/**
3806	* Suspend notification.
3807	*
3808	* @param pDevIns The device instance data.
3809	*/
3810	static DECLCALLBACK(void) buslogicR3Suspend(PPDMDEVINS pDevIns)
3811	{
3812	Log(("buslogicR3Suspend\n"));
3813	buslogicR3SuspendOrPowerOff(pDevIns);
3814	}
3815
3816	/**
3817	* Detach notification.
3818	*
3819	* One harddisk at one port has been unplugged.
3820	* The VM is suspended at this point.
3821	*
3822	* @param pDevIns The device instance.
3823	* @param iLUN The logical unit which is being detached.
3824	* @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
3825	*/
3826	static DECLCALLBACK(void) buslogicR3Detach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
3827	{
3828	RT_NOREF(fFlags);
3829	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3830	PBUSLOGICDEVICE pDevice = &pThis->aDeviceStates[iLUN];
3831
3832	Log(("%s:\n", __FUNCTION__));
3833
3834	AssertMsg(fFlags & PDM_TACH_FLAGS_NOT_HOT_PLUG,
3835	("BusLogic: Device does not support hotplugging\n"));
3836
3837	/*
3838	* Zero some important members.
3839	*/
3840	pDevice->fPresent = false;
3841	pDevice->pDrvBase = NULL;
3842	pDevice->pDrvMedia = NULL;
3843	pDevice->pDrvMediaEx = NULL;
3844	}
3845
3846	/**
3847	* Attach command.
3848	*
3849	* This is called when we change block driver.
3850	*
3851	* @returns VBox status code.
3852	* @param pDevIns The device instance.
3853	* @param iLUN The logical unit which is being detached.
3854	* @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
3855	*/
3856	static DECLCALLBACK(int) buslogicR3Attach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
3857	{
3858	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3859	PBUSLOGICDEVICE pDevice = &pThis->aDeviceStates[iLUN];
3860	int rc;
3861
3862	AssertMsgReturn(fFlags & PDM_TACH_FLAGS_NOT_HOT_PLUG,
3863	("BusLogic: Device does not support hotplugging\n"),
3864	VERR_INVALID_PARAMETER);
3865
3866	/* the usual paranoia */
3867	AssertRelease(!pDevice->pDrvBase);
3868	AssertRelease(!pDevice->pDrvMedia);
3869	AssertRelease(!pDevice->pDrvMediaEx);
3870	Assert(pDevice->iLUN == iLUN);
3871
3872	/*
3873	* Try attach the SCSI driver and get the interfaces,
3874	* required as well as optional.
3875	*/
3876	rc = PDMDevHlpDriverAttach(pDevIns, pDevice->iLUN, &pDevice->IBase, &pDevice->pDrvBase, NULL);
3877	if (RT_SUCCESS(rc))
3878	{
3879	/* Query the media interface. */
3880	pDevice->pDrvMedia = PDMIBASE_QUERY_INTERFACE(pDevice->pDrvBase, PDMIMEDIA);
3881	AssertMsgReturn(VALID_PTR(pDevice->pDrvMedia),
3882	("BusLogic configuration error: LUN#%d misses the basic media interface!\n", pDevice->iLUN),
3883	VERR_PDM_MISSING_INTERFACE);
3884
3885	/* Get the extended media interface. */
3886	pDevice->pDrvMediaEx = PDMIBASE_QUERY_INTERFACE(pDevice->pDrvBase, PDMIMEDIAEX);
3887	AssertMsgReturn(VALID_PTR(pDevice->pDrvMediaEx),
3888	("BusLogic configuration error: LUN#%d misses the extended media interface!\n", pDevice->iLUN),
3889	VERR_PDM_MISSING_INTERFACE);
3890
3891	rc = pDevice->pDrvMediaEx->pfnIoReqAllocSizeSet(pDevice->pDrvMediaEx, sizeof(BUSLOGICREQ));
3892	AssertMsgRCReturn(rc, ("BusLogic configuration error: LUN#%u: Failed to set I/O request size!", pDevice->iLUN),
3893	rc);
3894
3895	pDevice->fPresent = true;
3896	}
3897	else
3898	AssertMsgFailed(("Failed to attach LUN#%d. rc=%Rrc\n", pDevice->iLUN, rc));
3899
3900	if (RT_FAILURE(rc))
3901	{
3902	pDevice->fPresent = false;
3903	pDevice->pDrvBase = NULL;
3904	pDevice->pDrvMedia = NULL;
3905	pDevice->pDrvMediaEx = NULL;
3906	}
3907	return rc;
3908	}
3909
3910	/**
3911	* Callback employed by buslogicR3Reset.
3912	*
3913	* @returns true if we've quiesced, false if we're still working.
3914	* @param pDevIns The device instance.
3915	*/
3916	static DECLCALLBACK(bool) buslogicR3IsAsyncResetDone(PPDMDEVINS pDevIns)
3917	{
3918	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3919
3920	if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
3921	return false;
3922	ASMAtomicWriteBool(&pThis->fSignalIdle, false);
3923
3924	buslogicR3HwReset(pThis, true);
3925	return true;
3926	}
3927
3928	/**
3929	* @copydoc FNPDMDEVRESET
3930	*/
3931	static DECLCALLBACK(void) buslogicR3Reset(PPDMDEVINS pDevIns)
3932	{
3933	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3934
3935	ASMAtomicWriteBool(&pThis->fSignalIdle, true);
3936	if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
3937	PDMDevHlpSetAsyncNotification(pDevIns, buslogicR3IsAsyncResetDone);
3938	else
3939	{
3940	ASMAtomicWriteBool(&pThis->fSignalIdle, false);
3941	buslogicR3HwReset(pThis, true);
3942	}
3943	}
3944
3945	static DECLCALLBACK(void) buslogicR3Relocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta)
3946	{
3947	RT_NOREF(offDelta);
3948	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3949
3950	pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
3951	pThis->pNotifierQueueRC = PDMQueueRCPtr(pThis->pNotifierQueueR3);
3952
3953	for (uint32_t i = 0; i < BUSLOGIC_MAX_DEVICES; i++)
3954	{
3955	PBUSLOGICDEVICE pDevice = &pThis->aDeviceStates[i];
3956
3957	pDevice->pBusLogicRC = PDMINS_2_DATA_RCPTR(pDevIns);
3958	}
3959
3960	}
3961
3962	/**
3963	* Poweroff notification.
3964	*
3965	* @param pDevIns Pointer to the device instance
3966	*/
3967	static DECLCALLBACK(void) buslogicR3PowerOff(PPDMDEVINS pDevIns)
3968	{
3969	Log(("buslogicR3PowerOff\n"));
3970	buslogicR3SuspendOrPowerOff(pDevIns);
3971	}
3972
3973	/**
3974	* Destroy a driver instance.
3975	*
3976	* Most VM resources are freed by the VM. This callback is provided so that any non-VM
3977	* resources can be freed correctly.
3978	*
3979	* @param pDevIns The device instance data.
3980	*/
3981	static DECLCALLBACK(int) buslogicR3Destruct(PPDMDEVINS pDevIns)
3982	{
3983	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3984	PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns);
3985
3986	PDMR3CritSectDelete(&pThis->CritSectIntr);
3987
3988	if (pThis->hEvtProcess != NIL_SUPSEMEVENT)
3989	{
3990	SUPSemEventClose(pThis->pSupDrvSession, pThis->hEvtProcess);
3991	pThis->hEvtProcess = NIL_SUPSEMEVENT;
3992	}
3993
3994	return VINF_SUCCESS;
3995	}
3996
3997	/**
3998	* @interface_method_impl{PDMDEVREG,pfnConstruct}
3999	*/
4000	static DECLCALLBACK(int) buslogicR3Construct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
4001	{
4002	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
4003	int rc = VINF_SUCCESS;
4004	bool fBootable = true;
4005	char achISACompat[16];
4006	PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
4007
4008	/*
4009	* Init instance data (do early because of constructor).
4010	*/
4011	pThis->pDevInsR3 = pDevIns;
4012	pThis->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
4013	pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
4014	pThis->IBase.pfnQueryInterface = buslogicR3StatusQueryInterface;
4015	pThis->ILeds.pfnQueryStatusLed = buslogicR3StatusQueryStatusLed;
4016
4017	PCIDevSetVendorId (&pThis->dev, 0x104b); /* BusLogic */
4018	PCIDevSetDeviceId (&pThis->dev, 0x1040); /* BT-958 */
4019	PCIDevSetCommand (&pThis->dev, 0x0003);
4020	PCIDevSetRevisionId (&pThis->dev, 0x01);
4021	PCIDevSetClassProg (&pThis->dev, 0x00); /* SCSI */
4022	PCIDevSetClassSub (&pThis->dev, 0x00); /* SCSI */
4023	PCIDevSetClassBase (&pThis->dev, 0x01); /* Mass storage */
4024	PCIDevSetBaseAddress (&pThis->dev, 0, true /IO/, false /Pref/, false /64-bit/, 0x00000000);
4025	PCIDevSetBaseAddress (&pThis->dev, 1, false /IO/, false /Pref/, false /64-bit/, 0x00000000);
4026	PCIDevSetSubSystemVendorId(&pThis->dev, 0x104b);
4027	PCIDevSetSubSystemId (&pThis->dev, 0x1040);
4028	PCIDevSetInterruptLine (&pThis->dev, 0x00);
4029	PCIDevSetInterruptPin (&pThis->dev, 0x01);
4030
4031	/*
4032	* Validate and read configuration.
4033	*/
4034	if (!CFGMR3AreValuesValid(pCfg,
4035	"GCEnabled\0"
4036	"R0Enabled\0"
4037	"Bootable\0"
4038	"ISACompat\0"))
4039	return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
4040	N_("BusLogic configuration error: unknown option specified"));
4041
4042	rc = CFGMR3QueryBoolDef(pCfg, "GCEnabled", &pThis->fGCEnabled, true);
4043	if (RT_FAILURE(rc))
4044	return PDMDEV_SET_ERROR(pDevIns, rc,
4045	N_("BusLogic configuration error: failed to read GCEnabled as boolean"));
4046	Log(("%s: fGCEnabled=%d\n", __FUNCTION__, pThis->fGCEnabled));
4047
4048	rc = CFGMR3QueryBoolDef(pCfg, "R0Enabled", &pThis->fR0Enabled, true);
4049	if (RT_FAILURE(rc))
4050	return PDMDEV_SET_ERROR(pDevIns, rc,
4051	N_("BusLogic configuration error: failed to read R0Enabled as boolean"));
4052	Log(("%s: fR0Enabled=%d\n", __FUNCTION__, pThis->fR0Enabled));
4053	rc = CFGMR3QueryBoolDef(pCfg, "Bootable", &fBootable, true);
4054	if (RT_FAILURE(rc))
4055	return PDMDEV_SET_ERROR(pDevIns, rc,
4056	N_("BusLogic configuration error: failed to read Bootable as boolean"));
4057	Log(("%s: fBootable=%RTbool\n", __FUNCTION__, fBootable));
4058
4059	/* Only the first instance defaults to having the ISA compatibility ports enabled. */
4060	if (iInstance == 0)
4061	rc = CFGMR3QueryStringDef(pCfg, "ISACompat", achISACompat, sizeof(achISACompat), "Alternate");
4062	else
4063	rc = CFGMR3QueryStringDef(pCfg, "ISACompat", achISACompat, sizeof(achISACompat), "Disabled");
4064	if (RT_FAILURE(rc))
4065	return PDMDEV_SET_ERROR(pDevIns, rc,
4066	N_("BusLogic configuration error: failed to read ISACompat as string"));
4067	Log(("%s: ISACompat=%s\n", __FUNCTION__, achISACompat));
4068
4069	/* Grok the ISACompat setting. */
4070	if (!strcmp(achISACompat, "Disabled"))
4071	pThis->uDefaultISABaseCode = ISA_BASE_DISABLED;
4072	else if (!strcmp(achISACompat, "Primary"))
4073	pThis->uDefaultISABaseCode = 0; /* I/O base at 330h. */
4074	else if (!strcmp(achISACompat, "Alternate"))
4075	pThis->uDefaultISABaseCode = 1; /* I/O base at 334h. */
4076	else
4077	return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
4078	N_("BusLogic configuration error: invalid ISACompat setting"));
4079
4080	/*
4081	* Register the PCI device and its I/O regions.
4082	*/
4083	rc = PDMDevHlpPCIRegister(pDevIns, &pThis->dev);
4084	if (RT_FAILURE(rc))
4085	return rc;
4086
4087	rc = PDMDevHlpPCIIORegionRegister(pDevIns, 0, 32, PCI_ADDRESS_SPACE_IO, buslogicR3MmioMap);
4088	if (RT_FAILURE(rc))
4089	return rc;
4090
4091	rc = PDMDevHlpPCIIORegionRegister(pDevIns, 1, 32, PCI_ADDRESS_SPACE_MEM, buslogicR3MmioMap);
4092	if (RT_FAILURE(rc))
4093	return rc;
4094
4095	if (fBootable)
4096	{
4097	/* Register I/O port space for BIOS access. */
4098	rc = PDMDevHlpIOPortRegister(pDevIns, BUSLOGIC_BIOS_IO_PORT, 4, NULL,
4099	buslogicR3BiosIoPortWrite, buslogicR3BiosIoPortRead,
4100	buslogicR3BiosIoPortWriteStr, buslogicR3BiosIoPortReadStr,
4101	"BusLogic BIOS");
4102	if (RT_FAILURE(rc))
4103	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot register BIOS I/O handlers"));
4104	}
4105
4106	/* Set up the compatibility I/O range. */
4107	rc = buslogicR3RegisterISARange(pThis, pThis->uDefaultISABaseCode);
4108	if (RT_FAILURE(rc))
4109	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot register ISA I/O handlers"));
4110
4111	/* Initialize task queue. */
4112	rc = PDMDevHlpQueueCreate(pDevIns, sizeof(PDMQUEUEITEMCORE), 5, 0,
4113	buslogicR3NotifyQueueConsumer, true, "BusLogicTask", &pThis->pNotifierQueueR3);
4114	if (RT_FAILURE(rc))
4115	return rc;
4116	pThis->pNotifierQueueR0 = PDMQueueR0Ptr(pThis->pNotifierQueueR3);
4117	pThis->pNotifierQueueRC = PDMQueueRCPtr(pThis->pNotifierQueueR3);
4118
4119	rc = PDMDevHlpCritSectInit(pDevIns, &pThis->CritSectIntr, RT_SRC_POS, "BusLogic-Intr#%u", pDevIns->iInstance);
4120	if (RT_FAILURE(rc))
4121	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic: cannot create critical section"));
4122
4123	/*
4124	* Create event semaphore and worker thread.
4125	*/
4126	rc = SUPSemEventCreate(pThis->pSupDrvSession, &pThis->hEvtProcess);
4127	if (RT_FAILURE(rc))
4128	return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
4129	N_("BusLogic: Failed to create SUP event semaphore"));
4130
4131	char szDevTag[20];
4132	RTStrPrintf(szDevTag, sizeof(szDevTag), "BUSLOGIC-%u", iInstance);
4133
4134	rc = PDMDevHlpThreadCreate(pDevIns, &pThis->pThreadWrk, pThis, buslogicR3Worker,
4135	buslogicR3WorkerWakeUp, 0, RTTHREADTYPE_IO, szDevTag);
4136	if (RT_FAILURE(rc))
4137	return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
4138	N_("BusLogic: Failed to create worker thread %s"), szDevTag);
4139
4140	/* Initialize per device state. */
4141	for (unsigned i = 0; i < RT_ELEMENTS(pThis->aDeviceStates); i++)
4142	{
4143	char szName[24];
4144	PBUSLOGICDEVICE pDevice = &pThis->aDeviceStates[i];
4145
4146	RTStrPrintf(szName, sizeof(szName), "Device%u", i);
4147
4148	/* Initialize static parts of the device. */
4149	pDevice->iLUN = i;
4150	pDevice->pBusLogicR3 = pThis;
4151	pDevice->pBusLogicR0 = PDMINS_2_DATA_R0PTR(pDevIns);
4152	pDevice->pBusLogicRC = PDMINS_2_DATA_RCPTR(pDevIns);
4153	pDevice->Led.u32Magic = PDMLED_MAGIC;
4154	pDevice->IBase.pfnQueryInterface = buslogicR3DeviceQueryInterface;
4155	pDevice->IMediaPort.pfnQueryDeviceLocation = buslogicR3QueryDeviceLocation;
4156	pDevice->IMediaExPort.pfnIoReqCompleteNotify = buslogicR3IoReqCompleteNotify;
4157	pDevice->IMediaExPort.pfnIoReqCopyFromBuf = buslogicR3IoReqCopyFromBuf;
4158	pDevice->IMediaExPort.pfnIoReqCopyToBuf = buslogicR3IoReqCopyToBuf;
4159	pDevice->IMediaExPort.pfnIoReqQueryBuf = NULL;
4160	pDevice->IMediaExPort.pfnIoReqQueryDiscardRanges = NULL;
4161	pDevice->IMediaExPort.pfnIoReqStateChanged = buslogicR3IoReqStateChanged;
4162	pDevice->IMediaExPort.pfnMediumEjected = buslogicR3MediumEjected;
4163	pDevice->ILed.pfnQueryStatusLed = buslogicR3DeviceQueryStatusLed;
4164
4165	/* Attach SCSI driver. */
4166	rc = PDMDevHlpDriverAttach(pDevIns, pDevice->iLUN, &pDevice->IBase, &pDevice->pDrvBase, szName);
4167	if (RT_SUCCESS(rc))
4168	{
4169	/* Query the media interface. */
4170	pDevice->pDrvMedia = PDMIBASE_QUERY_INTERFACE(pDevice->pDrvBase, PDMIMEDIA);
4171	AssertMsgReturn(VALID_PTR(pDevice->pDrvMedia),
4172	("Buslogic configuration error: LUN#%d misses the basic media interface!\n", pDevice->iLUN),
4173	VERR_PDM_MISSING_INTERFACE);
4174
4175	/* Get the extended media interface. */
4176	pDevice->pDrvMediaEx = PDMIBASE_QUERY_INTERFACE(pDevice->pDrvBase, PDMIMEDIAEX);
4177	AssertMsgReturn(VALID_PTR(pDevice->pDrvMediaEx),
4178	("Buslogic configuration error: LUN#%d misses the extended media interface!\n", pDevice->iLUN),
4179	VERR_PDM_MISSING_INTERFACE);
4180
4181	rc = pDevice->pDrvMediaEx->pfnIoReqAllocSizeSet(pDevice->pDrvMediaEx, sizeof(BUSLOGICREQ));
4182	if (RT_FAILURE(rc))
4183	return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
4184	N_("Buslogic configuration error: LUN#%u: Failed to set I/O request size!"),
4185	pDevice->iLUN);
4186
4187	pDevice->fPresent = true;
4188	}
4189	else if (rc == VERR_PDM_NO_ATTACHED_DRIVER)
4190	{
4191	pDevice->fPresent = false;
4192	pDevice->pDrvBase = NULL;
4193	pDevice->pDrvMedia = NULL;
4194	pDevice->pDrvMediaEx = NULL;
4195	rc = VINF_SUCCESS;
4196	Log(("BusLogic: no driver attached to device %s\n", szName));
4197	}
4198	else
4199	{
4200	AssertLogRelMsgFailed(("BusLogic: Failed to attach %s\n", szName));
4201	return rc;
4202	}
4203	}
4204
4205	/*
4206	* Attach status driver (optional).
4207	*/
4208	PPDMIBASE pBase;
4209	rc = PDMDevHlpDriverAttach(pDevIns, PDM_STATUS_LUN, &pThis->IBase, &pBase, "Status Port");
4210	if (RT_SUCCESS(rc))
4211	{
4212	pThis->pLedsConnector = PDMIBASE_QUERY_INTERFACE(pBase, PDMILEDCONNECTORS);
4213	pThis->pMediaNotify = PDMIBASE_QUERY_INTERFACE(pBase, PDMIMEDIANOTIFY);
4214	}
4215	else if (rc != VERR_PDM_NO_ATTACHED_DRIVER)
4216	{
4217	AssertMsgFailed(("Failed to attach to status driver. rc=%Rrc\n", rc));
4218	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot attach to status driver"));
4219	}
4220
4221	rc = PDMDevHlpSSMRegisterEx(pDevIns, BUSLOGIC_SAVED_STATE_MINOR_VERSION, sizeof(*pThis), NULL,
4222	NULL, buslogicR3LiveExec, NULL,
4223	NULL, buslogicR3SaveExec, NULL,
4224	NULL, buslogicR3LoadExec, buslogicR3LoadDone);
4225	if (RT_FAILURE(rc))
4226	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot register save state handlers"));
4227
4228	/*
4229	* Register the debugger info callback.
4230	*/
4231	char szTmp[128];
4232	RTStrPrintf(szTmp, sizeof(szTmp), "%s%d", pDevIns->pReg->szName, pDevIns->iInstance);
4233	PDMDevHlpDBGFInfoRegister(pDevIns, szTmp, "BusLogic HBA info", buslogicR3Info);
4234
4235	rc = buslogicR3HwReset(pThis, true);
4236	AssertMsgRC(rc, ("hardware reset of BusLogic host adapter failed rc=%Rrc\n", rc));
4237
4238	return rc;
4239	}
4240
4241	/**
4242	* The device registration structure.
4243	*/
4244	const PDMDEVREG g_DeviceBusLogic =
4245	{
4246	/* u32Version */
4247	PDM_DEVREG_VERSION,
4248	/* szName */
4249	"buslogic",
4250	/* szRCMod */
4251	"VBoxDDRC.rc",
4252	/* szR0Mod */
4253	"VBoxDDR0.r0",
4254	/* pszDescription */
4255	"BusLogic BT-958 SCSI host adapter.\n",
4256	/* fFlags */
4257	PDM_DEVREG_FLAGS_DEFAULT_BITS \| PDM_DEVREG_FLAGS_RC \| PDM_DEVREG_FLAGS_R0 \|
4258	PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION \| PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION \|
4259	PDM_DEVREG_FLAGS_FIRST_RESET_NOTIFICATION,
4260	/* fClass */
4261	PDM_DEVREG_CLASS_STORAGE,
4262	/* cMaxInstances */
4263	~0U,
4264	/* cbInstance */
4265	sizeof(BUSLOGIC),
4266	/* pfnConstruct */
4267	buslogicR3Construct,
4268	/* pfnDestruct */
4269	buslogicR3Destruct,
4270	/* pfnRelocate */
4271	buslogicR3Relocate,
4272	/* pfnMemSetup */
4273	NULL,
4274	/* pfnPowerOn */
4275	NULL,
4276	/* pfnReset */
4277	buslogicR3Reset,
4278	/* pfnSuspend */
4279	buslogicR3Suspend,
4280	/* pfnResume */
4281	NULL,
4282	/* pfnAttach */
4283	buslogicR3Attach,
4284	/* pfnDetach */
4285	buslogicR3Detach,
4286	/* pfnQueryInterface. */
4287	NULL,
4288	/* pfnInitComplete */
4289	NULL,
4290	/* pfnPowerOff */
4291	buslogicR3PowerOff,
4292	/* pfnSoftReset */
4293	NULL,
4294	/* u32VersionEnd */
4295	PDM_DEVREG_VERSION
4296	};
4297
4298	#endif /* IN_RING3 */
4299	#endif /* !VBOX_DEVICE_STRUCT_TESTCASE */

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source: vbox/trunk/src/VBox/Devices/Storage/DevBusLogic.cpp@ 64744

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