DevBusLogic.cpp@ 67903

Last change on this file since 67903 was 67887, checked in by vboxsync, 8 years ago
BusLogic: Clear CMDINV bit when dismissing interrupts. Matches docs and hardware.
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1	/* $Id: DevBusLogic.cpp 67887 2017-07-10 17:19:26Z vboxsync $ */
2	/** @file
3	* VBox storage devices - BusLogic SCSI host adapter BT-958.
4	*
5	* Based on the Multi-Master Ultra SCSI Systems Technical Reference Manual.
6	*/
7
8	/*
9	* Copyright (C) 2006-2016 Oracle Corporation
10	*
11	* This file is part of VirtualBox Open Source Edition (OSE), as
12	* available from http://www.virtualbox.org. This file is free software;
13	* you can redistribute it and/or modify it under the terms of the GNU
14	* General Public License (GPL) as published by the Free Software
15	* Foundation, in version 2 as it comes in the "COPYING" file of the
16	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
17	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
18	*/
19
20
21	/*********************************************************************************************************************************
22	* Header Files *
23	*********************************************************************************************************************************/
24	#define LOG_GROUP LOG_GROUP_DEV_BUSLOGIC
25	#include <VBox/vmm/pdmdev.h>
26	#include <VBox/vmm/pdmstorageifs.h>
27	#include <VBox/vmm/pdmcritsect.h>
28	#include <VBox/scsi.h>
29	#include <iprt/asm.h>
30	#include <iprt/assert.h>
31	#include <iprt/string.h>
32	#include <iprt/log.h>
33	#ifdef IN_RING3
34	# include <iprt/alloc.h>
35	# include <iprt/memcache.h>
36	# include <iprt/param.h>
37	# include <iprt/uuid.h>
38	#endif
39
40	#include "VBoxSCSI.h"
41	#include "VBoxDD.h"
42
43
44	/*********************************************************************************************************************************
45	* Defined Constants And Macros *
46	*********************************************************************************************************************************/
47	/** Maximum number of attached devices the adapter can handle. */
48	#define BUSLOGIC_MAX_DEVICES 16
49
50	/** Maximum number of scatter gather elements this device can handle. */
51	#define BUSLOGIC_MAX_SCATTER_GATHER_LIST_SIZE 128
52
53	/** Size of the command buffer. */
54	#define BUSLOGIC_COMMAND_SIZE_MAX 53
55
56	/** Size of the reply buffer. */
57	#define BUSLOGIC_REPLY_SIZE_MAX 64
58
59	/** Custom fixed I/O ports for BIOS controller access.
60	* Note that these should not be in the ISA range (below 400h) to avoid
61	* conflicts with ISA device probing. Addresses in the 300h-340h range should be
62	* especially avoided.
63	*/
64	#define BUSLOGIC_BIOS_IO_PORT 0x430
65
66	/** State saved version. */
67	#define BUSLOGIC_SAVED_STATE_MINOR_VERSION 4
68
69	/** Saved state version before the suspend on error feature was implemented. */
70	#define BUSLOGIC_SAVED_STATE_MINOR_PRE_ERROR_HANDLING 1
71	/** Saved state version before 24-bit mailbox support was implemented. */
72	#define BUSLOGIC_SAVED_STATE_MINOR_PRE_24BIT_MBOX 2
73	/** Saved state version before command buffer size was raised. */
74	#define BUSLOGIC_SAVED_STATE_MINOR_PRE_CMDBUF_RESIZE 3
75
76	/** Command buffer size in old saved states. */
77	#define BUSLOGIC_COMMAND_SIZE_OLD 5
78
79	/** The duration of software-initiated reset (in nano seconds).
80	* Not documented, set to 50 ms. */
81	#define BUSLOGIC_RESET_DURATION_NS UINT64_C(50000000)
82
83
84	/*********************************************************************************************************************************
85	* Structures and Typedefs *
86	*********************************************************************************************************************************/
87	/**
88	* State of a device attached to the buslogic host adapter.
89	*
90	* @implements PDMIBASE
91	* @implements PDMISCSIPORT
92	* @implements PDMILEDPORTS
93	*/
94	typedef struct BUSLOGICDEVICE
95	{
96	/** Pointer to the owning buslogic device instance. - R3 pointer */
97	R3PTRTYPE(struct BUSLOGIC *) pBusLogicR3;
98	/** Pointer to the owning buslogic device instance. - R0 pointer */
99	R0PTRTYPE(struct BUSLOGIC *) pBusLogicR0;
100	/** Pointer to the owning buslogic device instance. - RC pointer */
101	RCPTRTYPE(struct BUSLOGIC *) pBusLogicRC;
102
103	/** Flag whether device is present. */
104	bool fPresent;
105	/** LUN of the device. */
106	RTUINT iLUN;
107
108	#if HC_ARCH_BITS == 64
109	uint32_t Alignment0;
110	#endif
111
112	/** Our base interface. */
113	PDMIBASE IBase;
114	/** Media port interface. */
115	PDMIMEDIAPORT IMediaPort;
116	/** Extended media port interface. */
117	PDMIMEDIAEXPORT IMediaExPort;
118	/** Led interface. */
119	PDMILEDPORTS ILed;
120	/** Pointer to the attached driver's base interface. */
121	R3PTRTYPE(PPDMIBASE) pDrvBase;
122	/** Pointer to the attached driver's media interface. */
123	R3PTRTYPE(PPDMIMEDIA) pDrvMedia;
124	/** Pointer to the attached driver's extended media interface. */
125	R3PTRTYPE(PPDMIMEDIAEX) pDrvMediaEx;
126	/** The status LED state for this device. */
127	PDMLED Led;
128
129	#if HC_ARCH_BITS == 64
130	uint32_t Alignment1;
131	#endif
132
133	/** Number of outstanding tasks on the port. */
134	volatile uint32_t cOutstandingRequests;
135
136	} BUSLOGICDEVICE, *PBUSLOGICDEVICE;
137
138	/**
139	* Commands the BusLogic adapter supports.
140	*/
141	enum BUSLOGICCOMMAND
142	{
143	BUSLOGICCOMMAND_TEST_CMDC_INTERRUPT = 0x00,
144	BUSLOGICCOMMAND_INITIALIZE_MAILBOX = 0x01,
145	BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND = 0x02,
146	BUSLOGICCOMMAND_EXECUTE_BIOS_COMMAND = 0x03,
147	BUSLOGICCOMMAND_INQUIRE_BOARD_ID = 0x04,
148	BUSLOGICCOMMAND_ENABLE_OUTGOING_MAILBOX_AVAILABLE_INTERRUPT = 0x05,
149	BUSLOGICCOMMAND_SET_SCSI_SELECTION_TIMEOUT = 0x06,
150	BUSLOGICCOMMAND_SET_PREEMPT_TIME_ON_BUS = 0x07,
151	BUSLOGICCOMMAND_SET_TIME_OFF_BUS = 0x08,
152	BUSLOGICCOMMAND_SET_BUS_TRANSFER_RATE = 0x09,
153	BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_0_TO_7 = 0x0a,
154	BUSLOGICCOMMAND_INQUIRE_CONFIGURATION = 0x0b,
155	BUSLOGICCOMMAND_ENABLE_TARGET_MODE = 0x0c,
156	BUSLOGICCOMMAND_INQUIRE_SETUP_INFORMATION = 0x0d,
157	BUSLOGICCOMMAND_WRITE_ADAPTER_LOCAL_RAM = 0x1a,
158	BUSLOGICCOMMAND_READ_ADAPTER_LOCAL_RAM = 0x1b,
159	BUSLOGICCOMMAND_WRITE_BUSMASTER_CHIP_FIFO = 0x1c,
160	BUSLOGICCOMMAND_READ_BUSMASTER_CHIP_FIFO = 0x1d,
161	BUSLOGICCOMMAND_ECHO_COMMAND_DATA = 0x1f,
162	BUSLOGICCOMMAND_HOST_ADAPTER_DIAGNOSTIC = 0x20,
163	BUSLOGICCOMMAND_SET_ADAPTER_OPTIONS = 0x21,
164	BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_8_TO_15 = 0x23,
165	BUSLOGICCOMMAND_INQUIRE_TARGET_DEVICES = 0x24,
166	BUSLOGICCOMMAND_DISABLE_HOST_ADAPTER_INTERRUPT = 0x25,
167	BUSLOGICCOMMAND_EXT_BIOS_INFO = 0x28,
168	BUSLOGICCOMMAND_UNLOCK_MAILBOX = 0x29,
169	BUSLOGICCOMMAND_INITIALIZE_EXTENDED_MAILBOX = 0x81,
170	BUSLOGICCOMMAND_EXECUTE_SCSI_COMMAND = 0x83,
171	BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_3RD_LETTER = 0x84,
172	BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_LETTER = 0x85,
173	BUSLOGICCOMMAND_INQUIRE_PCI_HOST_ADAPTER_INFORMATION = 0x86,
174	BUSLOGICCOMMAND_INQUIRE_HOST_ADAPTER_MODEL_NUMBER = 0x8b,
175	BUSLOGICCOMMAND_INQUIRE_SYNCHRONOUS_PERIOD = 0x8c,
176	BUSLOGICCOMMAND_INQUIRE_EXTENDED_SETUP_INFORMATION = 0x8d,
177	BUSLOGICCOMMAND_ENABLE_STRICT_ROUND_ROBIN_MODE = 0x8f,
178	BUSLOGICCOMMAND_STORE_HOST_ADAPTER_LOCAL_RAM = 0x90,
179	BUSLOGICCOMMAND_FETCH_HOST_ADAPTER_LOCAL_RAM = 0x91,
180	BUSLOGICCOMMAND_STORE_LOCAL_DATA_IN_EEPROM = 0x92,
181	BUSLOGICCOMMAND_UPLOAD_AUTO_SCSI_CODE = 0x94,
182	BUSLOGICCOMMAND_MODIFY_IO_ADDRESS = 0x95,
183	BUSLOGICCOMMAND_SET_CCB_FORMAT = 0x96,
184	BUSLOGICCOMMAND_WRITE_INQUIRY_BUFFER = 0x9a,
185	BUSLOGICCOMMAND_READ_INQUIRY_BUFFER = 0x9b,
186	BUSLOGICCOMMAND_FLASH_ROM_UPLOAD_DOWNLOAD = 0xa7,
187	BUSLOGICCOMMAND_READ_SCAM_DATA = 0xa8,
188	BUSLOGICCOMMAND_WRITE_SCAM_DATA = 0xa9
189	} BUSLOGICCOMMAND;
190
191	#pragma pack(1)
192	/**
193	* Auto SCSI structure which is located
194	* in host adapter RAM and contains several
195	* configuration parameters.
196	*/
197	typedef struct AutoSCSIRam
198	{
199	uint8_t aInternalSignature[2];
200	uint8_t cbInformation;
201	uint8_t aHostAdaptertype[6];
202	uint8_t uReserved1;
203	bool fFloppyEnabled : 1;
204	bool fFloppySecondary : 1;
205	bool fLevelSensitiveInterrupt : 1;
206	unsigned char uReserved2 : 2;
207	unsigned char uSystemRAMAreForBIOS : 3;
208	unsigned char uDMAChannel : 7;
209	bool fDMAAutoConfiguration : 1;
210	unsigned char uIrqChannel : 7;
211	bool fIrqAutoConfiguration : 1;
212	uint8_t uDMATransferRate;
213	uint8_t uSCSIId;
214	bool fLowByteTerminated : 1;
215	bool fParityCheckingEnabled : 1;
216	bool fHighByteTerminated : 1;
217	bool fNoisyCablingEnvironment : 1;
218	bool fFastSynchronousNeogtiation : 1;
219	bool fBusResetEnabled : 1;
220	bool fReserved3 : 1;
221	bool fActiveNegotiationEnabled : 1;
222	uint8_t uBusOnDelay;
223	uint8_t uBusOffDelay;
224	bool fHostAdapterBIOSEnabled : 1;
225	bool fBIOSRedirectionOfInt19 : 1;
226	bool fExtendedTranslation : 1;
227	bool fMapRemovableAsFixed : 1;
228	bool fReserved4 : 1;
229	bool fBIOSSupportsMoreThan2Drives : 1;
230	bool fBIOSInterruptMode : 1;
231	bool fFlopticalSupport : 1;
232	uint16_t u16DeviceEnabledMask;
233	uint16_t u16WidePermittedMask;
234	uint16_t u16FastPermittedMask;
235	uint16_t u16SynchronousPermittedMask;
236	uint16_t u16DisconnectPermittedMask;
237	uint16_t u16SendStartUnitCommandMask;
238	uint16_t u16IgnoreInBIOSScanMask;
239	unsigned char uPCIInterruptPin : 2;
240	unsigned char uHostAdapterIoPortAddress : 2;
241	bool fStrictRoundRobinMode : 1;
242	bool fVesaBusSpeedGreaterThan33MHz : 1;
243	bool fVesaBurstWrite : 1;
244	bool fVesaBurstRead : 1;
245	uint16_t u16UltraPermittedMask;
246	uint32_t uReserved5;
247	uint8_t uReserved6;
248	uint8_t uAutoSCSIMaximumLUN;
249	bool fReserved7 : 1;
250	bool fSCAMDominant : 1;
251	bool fSCAMenabled : 1;
252	bool fSCAMLevel2 : 1;
253	unsigned char uReserved8 : 4;
254	bool fInt13Extension : 1;
255	bool fReserved9 : 1;
256	bool fCDROMBoot : 1;
257	unsigned char uReserved10 : 5;
258	unsigned char uBootTargetId : 4;
259	unsigned char uBootChannel : 4;
260	bool fForceBusDeviceScanningOrder : 1;
261	unsigned char uReserved11 : 7;
262	uint16_t u16NonTaggedToAlternateLunPermittedMask;
263	uint16_t u16RenegotiateSyncAfterCheckConditionMask;
264	uint8_t aReserved12[10];
265	uint8_t aManufacturingDiagnostic[2];
266	uint16_t u16Checksum;
267	} AutoSCSIRam, *PAutoSCSIRam;
268	AssertCompileSize(AutoSCSIRam, 64);
269	#pragma pack()
270
271	/**
272	* The local Ram.
273	*/
274	typedef union HostAdapterLocalRam
275	{
276	/** Byte view. */
277	uint8_t u8View[256];
278	/** Structured view. */
279	struct
280	{
281	/** Offset 0 - 63 is for BIOS. */
282	uint8_t u8Bios[64];
283	/** Auto SCSI structure. */
284	AutoSCSIRam autoSCSIData;
285	} structured;
286	} HostAdapterLocalRam, *PHostAdapterLocalRam;
287	AssertCompileSize(HostAdapterLocalRam, 256);
288
289
290	/** Ugly 24-bit big-endian addressing. */
291	typedef struct
292	{
293	uint8_t hi;
294	uint8_t mid;
295	uint8_t lo;
296	} Addr24, Len24;
297	AssertCompileSize(Addr24, 3);
298
299	#define ADDR_TO_U32(x) (((x).hi << 16) \| ((x).mid << 8) \| (x).lo)
300	#define LEN_TO_U32 ADDR_TO_U32
301	#define U32_TO_ADDR(a, x) do {(a).hi = (x) >> 16; (a).mid = (x) >> 8; (a).lo = (x);} while(0)
302	#define U32_TO_LEN U32_TO_ADDR
303
304	/** @name Compatible ISA base I/O port addresses. Disabled if zero.
305	* @{ */
306	#define NUM_ISA_BASES 8
307	#define MAX_ISA_BASE (NUM_ISA_BASES - 1)
308	#define ISA_BASE_DISABLED 6
309
310	#ifdef IN_RING3
311	static uint16_t const g_aISABases[NUM_ISA_BASES] =
312	{
313	0x330, 0x334, 0x230, 0x234, 0x130, 0x134, 0, 0
314	};
315	#endif
316	/** @} */
317
318	/** Pointer to a task state structure. */
319	typedef struct BUSLOGICREQ *PBUSLOGICREQ;
320
321	/**
322	* Main BusLogic device state.
323	*
324	* @extends PDMPCIDEV
325	* @implements PDMILEDPORTS
326	*/
327	typedef struct BUSLOGIC
328	{
329	/** The PCI device structure. */
330	PDMPCIDEV dev;
331	/** Pointer to the device instance - HC ptr */
332	PPDMDEVINSR3 pDevInsR3;
333	/** Pointer to the device instance - R0 ptr */
334	PPDMDEVINSR0 pDevInsR0;
335	/** Pointer to the device instance - RC ptr. */
336	PPDMDEVINSRC pDevInsRC;
337
338	/** Whether R0 is enabled. */
339	bool fR0Enabled;
340	/** Whether RC is enabled. */
341	bool fGCEnabled;
342
343	/** Base address of the I/O ports. */
344	RTIOPORT IOPortBase;
345	/** Base address of the memory mapping. */
346	RTGCPHYS MMIOBase;
347	/** Status register - Readonly. */
348	volatile uint8_t regStatus;
349	/** Interrupt register - Readonly. */
350	volatile uint8_t regInterrupt;
351	/** Geometry register - Readonly. */
352	volatile uint8_t regGeometry;
353	/** Pending (delayed) interrupt. */
354	uint8_t uPendingIntr;
355
356	/** Local RAM for the fetch hostadapter local RAM request.
357	* I don't know how big the buffer really is but the maximum
358	* seems to be 256 bytes because the offset and count field in the command request
359	* are only one byte big.
360	*/
361	HostAdapterLocalRam LocalRam;
362
363	/** Command code the guest issued. */
364	uint8_t uOperationCode;
365	/** Buffer for the command parameters the adapter is currently receiving from the guest.
366	* Size of the largest command which is possible.
367	*/
368	uint8_t aCommandBuffer[BUSLOGIC_COMMAND_SIZE_MAX]; /* Size of the biggest request. */
369	/** Current position in the command buffer. */
370	uint8_t iParameter;
371	/** Parameters left until the command is complete. */
372	uint8_t cbCommandParametersLeft;
373
374	/** Whether we are using the RAM or reply buffer. */
375	bool fUseLocalRam;
376	/** Buffer to store reply data from the controller to the guest. */
377	uint8_t aReplyBuffer[BUSLOGIC_REPLY_SIZE_MAX]; /* Size of the biggest reply. */
378	/** Position in the buffer we are reading next. */
379	uint8_t iReply;
380	/** Bytes left until the reply buffer is empty. */
381	uint8_t cbReplyParametersLeft;
382
383	/** Flag whether IRQs are enabled. */
384	bool fIRQEnabled;
385	/** Flag whether the ISA I/O port range is disabled
386	* to prevent the BIOS to access the device. */
387	bool fISAEnabled; /*< @todo unused, to be removed /
388	/** Flag whether 24-bit mailboxes are in use (default is 32-bit). */
389	bool fMbxIs24Bit;
390	/** ISA I/O port base (encoded in FW-compatible format). */
391	uint8_t uISABaseCode;
392
393	/** ISA I/O port base (disabled if zero). */
394	RTIOPORT IOISABase;
395	/** Default ISA I/O port base in FW-compatible format. */
396	uint8_t uDefaultISABaseCode;
397
398	/** Number of mailboxes the guest set up. */
399	uint32_t cMailbox;
400
401	#if HC_ARCH_BITS == 64
402	uint32_t Alignment0;
403	#endif
404
405	/** Time when HBA reset was last initiated. / /< @todo does this need to be saved? /
406	uint64_t u64ResetTime;
407	/** Physical base address of the outgoing mailboxes. */
408	RTGCPHYS GCPhysAddrMailboxOutgoingBase;
409	/** Current outgoing mailbox position. */
410	uint32_t uMailboxOutgoingPositionCurrent;
411	/** Number of mailboxes ready. */
412	volatile uint32_t cMailboxesReady;
413	/** Whether a notification to R3 was sent. */
414	volatile bool fNotificationSent;
415
416	#if HC_ARCH_BITS == 64
417	uint32_t Alignment1;
418	#endif
419
420	/** Physical base address of the incoming mailboxes. */
421	RTGCPHYS GCPhysAddrMailboxIncomingBase;
422	/** Current incoming mailbox position. */
423	uint32_t uMailboxIncomingPositionCurrent;
424
425	/** Whether strict round robin is enabled. */
426	bool fStrictRoundRobinMode;
427	/** Whether the extended LUN CCB format is enabled for 32 possible logical units. */
428	bool fExtendedLunCCBFormat;
429
430	/** Queue to send tasks to R3. - HC ptr */
431	R3PTRTYPE(PPDMQUEUE) pNotifierQueueR3;
432	/** Queue to send tasks to R3. - HC ptr */
433	R0PTRTYPE(PPDMQUEUE) pNotifierQueueR0;
434	/** Queue to send tasks to R3. - RC ptr */
435	RCPTRTYPE(PPDMQUEUE) pNotifierQueueRC;
436
437	uint32_t Alignment2;
438
439	/** Critical section protecting access to the interrupt status register. */
440	PDMCRITSECT CritSectIntr;
441
442	/** Device state for BIOS access. */
443	VBOXSCSI VBoxSCSI;
444
445	/** BusLogic device states. */
446	BUSLOGICDEVICE aDeviceStates[BUSLOGIC_MAX_DEVICES];
447
448	/** The base interface.
449	* @todo use PDMDEVINS::IBase */
450	PDMIBASE IBase;
451	/** Status Port - Leds interface. */
452	PDMILEDPORTS ILeds;
453	/** Partner of ILeds. */
454	R3PTRTYPE(PPDMILEDCONNECTORS) pLedsConnector;
455	/** Status LUN: Media Notifys. */
456	R3PTRTYPE(PPDMIMEDIANOTIFY) pMediaNotify;
457
458	#if HC_ARCH_BITS == 64
459	uint32_t Alignment3;
460	#endif
461
462	/** Indicates that PDMDevHlpAsyncNotificationCompleted should be called when
463	* a port is entering the idle state. */
464	bool volatile fSignalIdle;
465	/** Flag whether the worker thread is sleeping. */
466	volatile bool fWrkThreadSleeping;
467	/** Flag whether a request from the BIOS is pending which the
468	* worker thread needs to process. */
469	volatile bool fBiosReqPending;
470
471	/** The support driver session handle. */
472	R3R0PTRTYPE(PSUPDRVSESSION) pSupDrvSession;
473	/** Worker thread. */
474	R3PTRTYPE(PPDMTHREAD) pThreadWrk;
475	/** The event semaphore the processing thread waits on. */
476	SUPSEMEVENT hEvtProcess;
477
478	/** Pointer to the array of addresses to redo. */
479	R3PTRTYPE(PRTGCPHYS) paGCPhysAddrCCBRedo;
480	/** Number of addresses the redo array holds. */
481	uint32_t cReqsRedo;
482
483	#ifdef LOG_ENABLED
484	volatile uint32_t cInMailboxesReady;
485	#else
486	# if HC_ARCH_BITS == 64
487	uint32_t Alignment4;
488	# endif
489	#endif
490
491	} BUSLOGIC, *PBUSLOGIC;
492
493	/** Register offsets in the I/O port space. */
494	#define BUSLOGIC_REGISTER_CONTROL 0 /*< Writeonly /
495	/** Fields for the control register. */
496	# define BL_CTRL_RSBUS RT_BIT(4) /* Reset SCSI Bus. */
497	# define BL_CTRL_RINT RT_BIT(5) /* Reset Interrupt. */
498	# define BL_CTRL_RSOFT RT_BIT(6) /* Soft Reset. */
499	# define BL_CTRL_RHARD RT_BIT(7) /* Hard Reset. */
500
501	#define BUSLOGIC_REGISTER_STATUS 0 /*< Readonly /
502	/** Fields for the status register. */
503	# define BL_STAT_CMDINV RT_BIT(0) /* Command Invalid. */
504	# define BL_STAT_DIRRDY RT_BIT(2) /* Data In Register Ready. */
505	# define BL_STAT_CPRBSY RT_BIT(3) /* Command/Parameter Out Register Busy. */
506	# define BL_STAT_HARDY RT_BIT(4) /* Host Adapter Ready. */
507	# define BL_STAT_INREQ RT_BIT(5) /* Initialization Required. */
508	# define BL_STAT_DFAIL RT_BIT(6) /* Diagnostic Failure. */
509	# define BL_STAT_DACT RT_BIT(7) /* Diagnistic Active. */
510
511	#define BUSLOGIC_REGISTER_COMMAND 1 /*< Writeonly /
512	#define BUSLOGIC_REGISTER_DATAIN 1 /*< Readonly /
513	#define BUSLOGIC_REGISTER_INTERRUPT 2 /*< Readonly /
514	/** Fields for the interrupt register. */
515	# define BL_INTR_IMBL RT_BIT(0) /* Incoming Mailbox Loaded. */
516	# define BL_INTR_OMBR RT_BIT(1) /* Outgoing Mailbox Available. */
517	# define BL_INTR_CMDC RT_BIT(2) /* Command Complete. */
518	# define BL_INTR_RSTS RT_BIT(3) /* SCSI Bus Reset State. */
519	# define BL_INTR_INTV RT_BIT(7) /* Interrupt Valid. */
520
521	#define BUSLOGIC_REGISTER_GEOMETRY 3 /* Readonly */
522	# define BL_GEOM_XLATEN RT_BIT(7) /* Extended geometry translation enabled. */
523
524	/** Structure for the INQUIRE_PCI_HOST_ADAPTER_INFORMATION reply. */
525	typedef struct ReplyInquirePCIHostAdapterInformation
526	{
527	uint8_t IsaIOPort;
528	uint8_t IRQ;
529	unsigned char LowByteTerminated : 1;
530	unsigned char HighByteTerminated : 1;
531	unsigned char uReserved : 2; /* Reserved. */
532	unsigned char JP1 : 1; /* Whatever that means. */
533	unsigned char JP2 : 1; /* Whatever that means. */
534	unsigned char JP3 : 1; /* Whatever that means. */
535	/** Whether the provided info is valid. */
536	unsigned char InformationIsValid: 1;
537	uint8_t uReserved2; /* Reserved. */
538	} ReplyInquirePCIHostAdapterInformation, *PReplyInquirePCIHostAdapterInformation;
539	AssertCompileSize(ReplyInquirePCIHostAdapterInformation, 4);
540
541	/** Structure for the INQUIRE_CONFIGURATION reply. */
542	typedef struct ReplyInquireConfiguration
543	{
544	unsigned char uReserved1 : 5;
545	bool fDmaChannel5 : 1;
546	bool fDmaChannel6 : 1;
547	bool fDmaChannel7 : 1;
548	bool fIrqChannel9 : 1;
549	bool fIrqChannel10 : 1;
550	bool fIrqChannel11 : 1;
551	bool fIrqChannel12 : 1;
552	unsigned char uReserved2 : 1;
553	bool fIrqChannel14 : 1;
554	bool fIrqChannel15 : 1;
555	unsigned char uReserved3 : 1;
556	unsigned char uHostAdapterId : 4;
557	unsigned char uReserved4 : 4;
558	} ReplyInquireConfiguration, *PReplyInquireConfiguration;
559	AssertCompileSize(ReplyInquireConfiguration, 3);
560
561	/** Structure for the INQUIRE_SETUP_INFORMATION reply. */
562	typedef struct ReplyInquireSetupInformationSynchronousValue
563	{
564	unsigned char uOffset : 4;
565	unsigned char uTransferPeriod : 3;
566	bool fSynchronous : 1;
567	}ReplyInquireSetupInformationSynchronousValue, *PReplyInquireSetupInformationSynchronousValue;
568	AssertCompileSize(ReplyInquireSetupInformationSynchronousValue, 1);
569
570	typedef struct ReplyInquireSetupInformation
571	{
572	bool fSynchronousInitiationEnabled : 1;
573	bool fParityCheckingEnabled : 1;
574	unsigned char uReserved1 : 6;
575	uint8_t uBusTransferRate;
576	uint8_t uPreemptTimeOnBus;
577	uint8_t uTimeOffBus;
578	uint8_t cMailbox;
579	Addr24 MailboxAddress;
580	ReplyInquireSetupInformationSynchronousValue SynchronousValuesId0To7[8];
581	uint8_t uDisconnectPermittedId0To7;
582	uint8_t uSignature;
583	uint8_t uCharacterD;
584	uint8_t uHostBusType;
585	uint8_t uWideTransferPermittedId0To7;
586	uint8_t uWideTransfersActiveId0To7;
587	ReplyInquireSetupInformationSynchronousValue SynchronousValuesId8To15[8];
588	uint8_t uDisconnectPermittedId8To15;
589	uint8_t uReserved2;
590	uint8_t uWideTransferPermittedId8To15;
591	uint8_t uWideTransfersActiveId8To15;
592	} ReplyInquireSetupInformation, *PReplyInquireSetupInformation;
593	AssertCompileSize(ReplyInquireSetupInformation, 34);
594
595	/** Structure for the INQUIRE_EXTENDED_SETUP_INFORMATION. */
596	#pragma pack(1)
597	typedef struct ReplyInquireExtendedSetupInformation
598	{
599	uint8_t uBusType;
600	uint8_t uBiosAddress;
601	uint16_t u16ScatterGatherLimit;
602	uint8_t cMailbox;
603	uint32_t uMailboxAddressBase;
604	unsigned char uReserved1 : 2;
605	bool fFastEISA : 1;
606	unsigned char uReserved2 : 3;
607	bool fLevelSensitiveInterrupt : 1;
608	unsigned char uReserved3 : 1;
609	unsigned char aFirmwareRevision[3];
610	bool fHostWideSCSI : 1;
611	bool fHostDifferentialSCSI : 1;
612	bool fHostSupportsSCAM : 1;
613	bool fHostUltraSCSI : 1;
614	bool fHostSmartTermination : 1;
615	unsigned char uReserved4 : 3;
616	} ReplyInquireExtendedSetupInformation, *PReplyInquireExtendedSetupInformation;
617	AssertCompileSize(ReplyInquireExtendedSetupInformation, 14);
618	#pragma pack()
619
620	/** Structure for the INITIALIZE EXTENDED MAILBOX request. */
621	#pragma pack(1)
622	typedef struct RequestInitializeExtendedMailbox
623	{
624	/** Number of mailboxes in guest memory. */
625	uint8_t cMailbox;
626	/** Physical address of the first mailbox. */
627	uint32_t uMailboxBaseAddress;
628	} RequestInitializeExtendedMailbox, *PRequestInitializeExtendedMailbox;
629	AssertCompileSize(RequestInitializeExtendedMailbox, 5);
630	#pragma pack()
631
632	/** Structure for the INITIALIZE MAILBOX request. */
633	typedef struct
634	{
635	/** Number of mailboxes to set up. */
636	uint8_t cMailbox;
637	/** Physical address of the first mailbox. */
638	Addr24 aMailboxBaseAddr;
639	} RequestInitMbx, *PRequestInitMbx;
640	AssertCompileSize(RequestInitMbx, 4);
641
642	/**
643	* Structure of a mailbox in guest memory.
644	* The incoming and outgoing mailbox have the same size
645	* but the incoming one has some more fields defined which
646	* are marked as reserved in the outgoing one.
647	* The last field is also different from the type.
648	* For outgoing mailboxes it is the action and
649	* for incoming ones the completion status code for the task.
650	* We use one structure for both types.
651	*/
652	typedef struct Mailbox32
653	{
654	/** Physical address of the CCB structure in the guest memory. */
655	uint32_t u32PhysAddrCCB;
656	/** Type specific data. */
657	union
658	{
659	/** For outgoing mailboxes. */
660	struct
661	{
662	/** Reserved */
663	uint8_t uReserved[3];
664	/** Action code. */
665	uint8_t uActionCode;
666	} out;
667	/** For incoming mailboxes. */
668	struct
669	{
670	/** The host adapter status after finishing the request. */
671	uint8_t uHostAdapterStatus;
672	/** The status of the device which executed the request after executing it. */
673	uint8_t uTargetDeviceStatus;
674	/** Reserved. */
675	uint8_t uReserved;
676	/** The completion status code of the request. */
677	uint8_t uCompletionCode;
678	} in;
679	} u;
680	} Mailbox32, *PMailbox32;
681	AssertCompileSize(Mailbox32, 8);
682
683	/** Old style 24-bit mailbox entry. */
684	typedef struct Mailbox24
685	{
686	/** Mailbox command (incoming) or state (outgoing). */
687	uint8_t uCmdState;
688	/** Physical address of the CCB structure in the guest memory. */
689	Addr24 aPhysAddrCCB;
690	} Mailbox24, *PMailbox24;
691	AssertCompileSize(Mailbox24, 4);
692
693	/**
694	* Action codes for outgoing mailboxes.
695	*/
696	enum BUSLOGIC_MAILBOX_OUTGOING_ACTION
697	{
698	BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE = 0x00,
699	BUSLOGIC_MAILBOX_OUTGOING_ACTION_START_COMMAND = 0x01,
700	BUSLOGIC_MAILBOX_OUTGOING_ACTION_ABORT_COMMAND = 0x02
701	};
702
703	/**
704	* Completion codes for incoming mailboxes.
705	*/
706	enum BUSLOGIC_MAILBOX_INCOMING_COMPLETION
707	{
708	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_FREE = 0x00,
709	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITHOUT_ERROR = 0x01,
710	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_ABORTED = 0x02,
711	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_ABORTED_NOT_FOUND = 0x03,
712	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR = 0x04,
713	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_INVALID_CCB = 0x05
714	};
715
716	/**
717	* Host adapter status for incoming mailboxes.
718	*/
719	enum BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS
720	{
721	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_CMD_COMPLETED = 0x00,
722	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_LINKED_CMD_COMPLETED = 0x0a,
723	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_LINKED_CMD_COMPLETED_WITH_FLAG = 0x0b,
724	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_DATA_UNDERUN = 0x0c,
725	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_SCSI_SELECTION_TIMEOUT = 0x11,
726	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_DATA_OVERRUN = 0x12,
727	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_UNEXPECTED_BUS_FREE = 0x13,
728	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_BUS_PHASE_REQUESTED = 0x14,
729	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_OUTGOING_MAILBOX_ACTION_CODE = 0x15,
730	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_COMMAND_OPERATION_CODE = 0x16,
731	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_LINKED_CCB_HAS_INVALID_LUN = 0x17,
732	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_COMMAND_PARAMETER = 0x1a,
733	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_AUTO_REQUEST_SENSE_FAILED = 0x1b,
734	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_TAGGED_QUEUING_MESSAGE_REJECTED = 0x1c,
735	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_UNSUPPORTED_MESSAGE_RECEIVED = 0x1d,
736	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_HARDWARE_FAILED = 0x20,
737	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_TARGET_FAILED_RESPONSE_TO_ATN = 0x21,
738	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_ASSERTED_RST = 0x22,
739	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_OTHER_DEVICE_ASSERTED_RST = 0x23,
740	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_TARGET_DEVICE_RECONNECTED_IMPROPERLY = 0x24,
741	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_ASSERTED_BUS_DEVICE_RESET = 0x25,
742	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_ABORT_QUEUE_GENERATED = 0x26,
743	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_SOFTWARE_ERROR = 0x27,
744	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_HARDWARE_TIMEOUT_ERROR = 0x30,
745	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_SCSI_PARITY_ERROR_DETECTED = 0x34
746	};
747
748	/**
749	* Device status codes for incoming mailboxes.
750	*/
751	enum BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS
752	{
753	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD = 0x00,
754	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_CHECK_CONDITION = 0x02,
755	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_DEVICE_BUSY = 0x08
756	};
757
758	/**
759	* Opcode types for CCB.
760	*/
761	enum BUSLOGIC_CCB_OPCODE
762	{
763	BUSLOGIC_CCB_OPCODE_INITIATOR_CCB = 0x00,
764	BUSLOGIC_CCB_OPCODE_TARGET_CCB = 0x01,
765	BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_SCATTER_GATHER = 0x02,
766	BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_DATA_LENGTH = 0x03,
767	BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_SCATTER_GATHER = 0x04,
768	BUSLOGIC_CCB_OPCODE_BUS_DEVICE_RESET = 0x81
769	};
770
771	/**
772	* Data transfer direction.
773	*/
774	enum BUSLOGIC_CCB_DIRECTION
775	{
776	BUSLOGIC_CCB_DIRECTION_UNKNOWN = 0x00,
777	BUSLOGIC_CCB_DIRECTION_IN = 0x01,
778	BUSLOGIC_CCB_DIRECTION_OUT = 0x02,
779	BUSLOGIC_CCB_DIRECTION_NO_DATA = 0x03
780	};
781
782	/**
783	* The command control block for a SCSI request.
784	*/
785	typedef struct CCB32
786	{
787	/** Opcode. */
788	uint8_t uOpcode;
789	/** Reserved */
790	unsigned char uReserved1 : 3;
791	/** Data direction for the request. */
792	unsigned char uDataDirection : 2;
793	/** Whether the request is tag queued. */
794	bool fTagQueued : 1;
795	/** Queue tag mode. */
796	unsigned char uQueueTag : 2;
797	/** Length of the SCSI CDB. */
798	uint8_t cbCDB;
799	/** Sense data length. */
800	uint8_t cbSenseData;
801	/** Data length. */
802	uint32_t cbData;
803	/** Data pointer.
804	* This points to the data region or a scatter gather list based on the opcode.
805	*/
806	uint32_t u32PhysAddrData;
807	/** Reserved. */
808	uint8_t uReserved2[2];
809	/** Host adapter status. */
810	uint8_t uHostAdapterStatus;
811	/** Device adapter status. */
812	uint8_t uDeviceStatus;
813	/** The device the request is sent to. */
814	uint8_t uTargetId;
815	/*The LUN in the device. /
816	unsigned char uLogicalUnit : 5;
817	/** Legacy tag. */
818	bool fLegacyTagEnable : 1;
819	/** Legacy queue tag. */
820	unsigned char uLegacyQueueTag : 2;
821	/** The SCSI CDB. (A CDB can be 12 bytes long.) */
822	uint8_t abCDB[12];
823	/** Reserved. */
824	uint8_t uReserved3[6];
825	/** Sense data pointer. */
826	uint32_t u32PhysAddrSenseData;
827	} CCB32, *PCCB32;
828	AssertCompileSize(CCB32, 40);
829
830
831	/**
832	* The 24-bit command control block.
833	*/
834	typedef struct CCB24
835	{
836	/** Opcode. */
837	uint8_t uOpcode;
838	/** The LUN in the device. */
839	unsigned char uLogicalUnit : 3;
840	/** Data direction for the request. */
841	unsigned char uDataDirection : 2;
842	/** The target device ID. */
843	unsigned char uTargetId : 3;
844	/** Length of the SCSI CDB. */
845	uint8_t cbCDB;
846	/** Sense data length. */
847	uint8_t cbSenseData;
848	/** Data length. */
849	Len24 acbData;
850	/** Data pointer.
851	* This points to the data region or a scatter gather list based on the opc
852	*/
853	Addr24 aPhysAddrData;
854	/** Pointer to next CCB for linked commands. */
855	Addr24 aPhysAddrLink;
856	/** Command linking identifier. */
857	uint8_t uLinkId;
858	/** Host adapter status. */
859	uint8_t uHostAdapterStatus;
860	/** Device adapter status. */
861	uint8_t uDeviceStatus;
862	/** Two unused bytes. */
863	uint8_t aReserved[2];
864	/** The SCSI CDB. (A CDB can be 12 bytes long.) */
865	uint8_t abCDB[12];
866	} CCB24, *PCCB24;
867	AssertCompileSize(CCB24, 30);
868
869	/**
870	* The common 24-bit/32-bit command control block. The 32-bit CCB is laid out
871	* such that many fields are in the same location as in the older 24-bit CCB.
872	*/
873	typedef struct CCBC
874	{
875	/** Opcode. */
876	uint8_t uOpcode;
877	/** The LUN in the device. */
878	unsigned char uPad1 : 3;
879	/** Data direction for the request. */
880	unsigned char uDataDirection : 2;
881	/** The target device ID. */
882	unsigned char uPad2 : 3;
883	/** Length of the SCSI CDB. */
884	uint8_t cbCDB;
885	/** Sense data length. */
886	uint8_t cbSenseData;
887	uint8_t aPad1[10];
888	/** Host adapter status. */
889	uint8_t uHostAdapterStatus;
890	/** Device adapter status. */
891	uint8_t uDeviceStatus;
892	uint8_t aPad2[2];
893	/** The SCSI CDB (up to 12 bytes). */
894	uint8_t abCDB[12];
895	} CCBC, *PCCBC;
896	AssertCompileSize(CCBC, 30);
897
898	/* Make sure that the 24-bit/32-bit/common CCB offsets match. */
899	AssertCompileMemberOffset(CCBC, cbCDB, 2);
900	AssertCompileMemberOffset(CCB24, cbCDB, 2);
901	AssertCompileMemberOffset(CCB32, cbCDB, 2);
902	AssertCompileMemberOffset(CCBC, uHostAdapterStatus, 14);
903	AssertCompileMemberOffset(CCB24, uHostAdapterStatus, 14);
904	AssertCompileMemberOffset(CCB32, uHostAdapterStatus, 14);
905	AssertCompileMemberOffset(CCBC, abCDB, 18);
906	AssertCompileMemberOffset(CCB24, abCDB, 18);
907	AssertCompileMemberOffset(CCB32, abCDB, 18);
908
909	/** A union of all CCB types (24-bit/32-bit/common). */
910	typedef union CCBU
911	{
912	CCB32 n; /*< New 32-bit CCB. /
913	CCB24 o; /*< Old 24-bit CCB. /
914	CCBC c; /*< Common CCB subset. /
915	} CCBU, *PCCBU;
916
917	/** 32-bit scatter-gather list entry. */
918	typedef struct SGE32
919	{
920	uint32_t cbSegment;
921	uint32_t u32PhysAddrSegmentBase;
922	} SGE32, *PSGE32;
923	AssertCompileSize(SGE32, 8);
924
925	/** 24-bit scatter-gather list entry. */
926	typedef struct SGE24
927	{
928	Len24 acbSegment;
929	Addr24 aPhysAddrSegmentBase;
930	} SGE24, *PSGE24;
931	AssertCompileSize(SGE24, 6);
932
933	/**
934	* The structure for the "Execute SCSI Command" command.
935	*/
936	typedef struct ESCMD
937	{
938	/** Data length. */
939	uint32_t cbData;
940	/** Data pointer. */
941	uint32_t u32PhysAddrData;
942	/** The device the request is sent to. */
943	uint8_t uTargetId;
944	/** The LUN in the device. */
945	uint8_t uLogicalUnit;
946	/** Reserved */
947	unsigned char uReserved1 : 3;
948	/** Data direction for the request. */
949	unsigned char uDataDirection : 2;
950	/** Reserved */
951	unsigned char uReserved2 : 3;
952	/** Length of the SCSI CDB. */
953	uint8_t cbCDB;
954	/** The SCSI CDB. (A CDB can be 12 bytes long.) */
955	uint8_t abCDB[12];
956	} ESCMD, *PESCMD;
957	AssertCompileSize(ESCMD, 24);
958
959	/**
960	* Task state for a CCB request.
961	*/
962	typedef struct BUSLOGICREQ
963	{
964	/** PDM extended media interface I/O request hande. */
965	PDMMEDIAEXIOREQ hIoReq;
966	/** Device this task is assigned to. */
967	PBUSLOGICDEVICE pTargetDevice;
968	/** The command control block from the guest. */
969	CCBU CCBGuest;
970	/** Guest physical address of th CCB. */
971	RTGCPHYS GCPhysAddrCCB;
972	/** Pointer to the R3 sense buffer. */
973	uint8_t *pbSenseBuffer;
974	/** Flag whether this is a request from the BIOS. */
975	bool fBIOS;
976	/** 24-bit request flag (default is 32-bit). */
977	bool fIs24Bit;
978	/** SCSI status code. */
979	uint8_t u8ScsiSts;
980	} BUSLOGICREQ;
981
982	#ifdef IN_RING3
983	/**
984	* Memory buffer callback.
985	*
986	* @returns nothing.
987	* @param pThis The LsiLogic controller instance.
988	* @param GCPhys The guest physical address of the memory buffer.
989	* @param pSgBuf The pointer to the host R3 S/G buffer.
990	* @param cbCopy How many bytes to copy between the two buffers.
991	* @param pcbSkip Initially contains the amount of bytes to skip
992	* starting from the guest physical address before
993	* accessing the S/G buffer and start copying data.
994	* On return this contains the remaining amount if
995	* cbCopy < *pcbSkip or 0 otherwise.
996	*/
997	typedef DECLCALLBACK(void) BUSLOGICR3MEMCOPYCALLBACK(PBUSLOGIC pThis, RTGCPHYS GCPhys, PRTSGBUF pSgBuf, size_t cbCopy,
998	size_t *pcbSkip);
999	/** Pointer to a memory copy buffer callback. */
1000	typedef BUSLOGICR3MEMCOPYCALLBACK *PBUSLOGICR3MEMCOPYCALLBACK;
1001	#endif
1002
1003	#ifndef VBOX_DEVICE_STRUCT_TESTCASE
1004
1005
1006	/*********************************************************************************************************************************
1007	* Internal Functions *
1008	*********************************************************************************************************************************/
1009	#ifdef IN_RING3
1010	static int buslogicR3RegisterISARange(PBUSLOGIC pBusLogic, uint8_t uBaseCode);
1011	#endif
1012
1013
1014	/**
1015	* Assert IRQ line of the BusLogic adapter.
1016	*
1017	* @returns nothing.
1018	* @param pBusLogic Pointer to the BusLogic device instance.
1019	* @param fSuppressIrq Flag to suppress IRQ generation regardless of fIRQEnabled
1020	* @param uIrqType Type of interrupt being generated.
1021	*/
1022	static void buslogicSetInterrupt(PBUSLOGIC pBusLogic, bool fSuppressIrq, uint8_t uIrqType)
1023	{
1024	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
1025
1026	/* The CMDC interrupt has priority over IMBL and OMBR. */
1027	if (uIrqType & (BL_INTR_IMBL \| BL_INTR_OMBR))
1028	{
1029	if (!(pBusLogic->regInterrupt & BL_INTR_CMDC))
1030	pBusLogic->regInterrupt \|= uIrqType; /* Report now. */
1031	else
1032	pBusLogic->uPendingIntr \|= uIrqType; /* Report later. */
1033	}
1034	else if (uIrqType & BL_INTR_CMDC)
1035	{
1036	AssertMsg(pBusLogic->regInterrupt == 0 \|\| pBusLogic->regInterrupt == (BL_INTR_INTV \| BL_INTR_CMDC),
1037	("regInterrupt=%02X\n", pBusLogic->regInterrupt));
1038	pBusLogic->regInterrupt \|= uIrqType;
1039	}
1040	else
1041	AssertMsgFailed(("Invalid interrupt state!\n"));
1042
1043	pBusLogic->regInterrupt \|= BL_INTR_INTV;
1044	if (pBusLogic->fIRQEnabled && !fSuppressIrq)
1045	PDMDevHlpPCISetIrq(pBusLogic->CTX_SUFF(pDevIns), 0, 1);
1046	}
1047
1048	/**
1049	* Deasserts the interrupt line of the BusLogic adapter.
1050	*
1051	* @returns nothing.
1052	* @param pBusLogic Pointer to the BusLogic device instance.
1053	*/
1054	static void buslogicClearInterrupt(PBUSLOGIC pBusLogic)
1055	{
1056	LogFlowFunc(("pBusLogic=%#p, clearing %#02x (pending %#02x)\n",
1057	pBusLogic, pBusLogic->regInterrupt, pBusLogic->uPendingIntr));
1058	pBusLogic->regInterrupt = 0;
1059	pBusLogic->regStatus &= ~BL_STAT_CMDINV;
1060	PDMDevHlpPCISetIrq(pBusLogic->CTX_SUFF(pDevIns), 0, 0);
1061	/* If there's another pending interrupt, report it now. */
1062	if (pBusLogic->uPendingIntr)
1063	{
1064	buslogicSetInterrupt(pBusLogic, false, pBusLogic->uPendingIntr);
1065	pBusLogic->uPendingIntr = 0;
1066	}
1067	}
1068
1069	#if defined(IN_RING3)
1070
1071	/**
1072	* Advances the mailbox pointer to the next slot.
1073	*
1074	* @returns nothing.
1075	* @param pBusLogic The BusLogic controller instance.
1076	*/
1077	DECLINLINE(void) buslogicR3OutgoingMailboxAdvance(PBUSLOGIC pBusLogic)
1078	{
1079	pBusLogic->uMailboxOutgoingPositionCurrent = (pBusLogic->uMailboxOutgoingPositionCurrent + 1) % pBusLogic->cMailbox;
1080	}
1081
1082	/**
1083	* Initialize local RAM of host adapter with default values.
1084	*
1085	* @returns nothing.
1086	* @param pBusLogic The BusLogic controller instance.
1087	*/
1088	static void buslogicR3InitializeLocalRam(PBUSLOGIC pBusLogic)
1089	{
1090	/*
1091	* These values are mostly from what I think is right
1092	* looking at the dmesg output from a Linux guest inside
1093	* a VMware server VM.
1094	*
1095	* So they don't have to be right :)
1096	*/
1097	memset(pBusLogic->LocalRam.u8View, 0, sizeof(HostAdapterLocalRam));
1098	pBusLogic->LocalRam.structured.autoSCSIData.fLevelSensitiveInterrupt = true;
1099	pBusLogic->LocalRam.structured.autoSCSIData.fParityCheckingEnabled = true;
1100	pBusLogic->LocalRam.structured.autoSCSIData.fExtendedTranslation = true; /* Same as in geometry register. */
1101	pBusLogic->LocalRam.structured.autoSCSIData.u16DeviceEnabledMask = UINT16_MAX; /* All enabled. Maybe mask out non present devices? */
1102	pBusLogic->LocalRam.structured.autoSCSIData.u16WidePermittedMask = UINT16_MAX;
1103	pBusLogic->LocalRam.structured.autoSCSIData.u16FastPermittedMask = UINT16_MAX;
1104	pBusLogic->LocalRam.structured.autoSCSIData.u16SynchronousPermittedMask = UINT16_MAX;
1105	pBusLogic->LocalRam.structured.autoSCSIData.u16DisconnectPermittedMask = UINT16_MAX;
1106	pBusLogic->LocalRam.structured.autoSCSIData.fStrictRoundRobinMode = pBusLogic->fStrictRoundRobinMode;
1107	pBusLogic->LocalRam.structured.autoSCSIData.u16UltraPermittedMask = UINT16_MAX;
1108	/** @todo calculate checksum? */
1109	}
1110
1111	/**
1112	* Do a hardware reset of the buslogic adapter.
1113	*
1114	* @returns VBox status code.
1115	* @param pBusLogic Pointer to the BusLogic device instance.
1116	* @param fResetIO Flag determining whether ISA I/O should be reset.
1117	*/
1118	static int buslogicR3HwReset(PBUSLOGIC pBusLogic, bool fResetIO)
1119	{
1120	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
1121
1122	/* Reset registers to default values. */
1123	pBusLogic->regStatus = BL_STAT_HARDY \| BL_STAT_INREQ;
1124	pBusLogic->regGeometry = BL_GEOM_XLATEN;
1125	pBusLogic->uOperationCode = 0xff; /* No command executing. */
1126	pBusLogic->iParameter = 0;
1127	pBusLogic->cbCommandParametersLeft = 0;
1128	pBusLogic->fIRQEnabled = true;
1129	pBusLogic->fStrictRoundRobinMode = false;
1130	pBusLogic->fExtendedLunCCBFormat = false;
1131	pBusLogic->uMailboxOutgoingPositionCurrent = 0;
1132	pBusLogic->uMailboxIncomingPositionCurrent = 0;
1133
1134	/* Clear any active/pending interrupts. */
1135	pBusLogic->uPendingIntr = 0;
1136	buslogicClearInterrupt(pBusLogic);
1137
1138	/* Guest-initiated HBA reset does not affect ISA port I/O. */
1139	if (fResetIO)
1140	{
1141	buslogicR3RegisterISARange(pBusLogic, pBusLogic->uDefaultISABaseCode);
1142	}
1143	buslogicR3InitializeLocalRam(pBusLogic);
1144	vboxscsiInitialize(&pBusLogic->VBoxSCSI);
1145
1146	return VINF_SUCCESS;
1147	}
1148
1149	#endif /* IN_RING3 */
1150
1151	/**
1152	* Resets the command state machine for the next command and notifies the guest.
1153	*
1154	* @returns nothing.
1155	* @param pBusLogic Pointer to the BusLogic device instance
1156	* @param fSuppressIrq Flag to suppress IRQ generation regardless of current state
1157	*/
1158	static void buslogicCommandComplete(PBUSLOGIC pBusLogic, bool fSuppressIrq)
1159	{
1160	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
1161	Assert(pBusLogic->uOperationCode != BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND);
1162
1163	pBusLogic->fUseLocalRam = false;
1164	pBusLogic->regStatus \|= BL_STAT_HARDY;
1165	pBusLogic->iReply = 0;
1166
1167	/* The Enable OMBR command does not set CMDC when successful. */
1168	if (pBusLogic->uOperationCode != BUSLOGICCOMMAND_ENABLE_OUTGOING_MAILBOX_AVAILABLE_INTERRUPT)
1169	{
1170	/* Notify that the command is complete. */
1171	pBusLogic->regStatus &= ~BL_STAT_DIRRDY;
1172	buslogicSetInterrupt(pBusLogic, fSuppressIrq, BL_INTR_CMDC);
1173	}
1174
1175	pBusLogic->uOperationCode = 0xff;
1176	pBusLogic->iParameter = 0;
1177	}
1178
1179	#if defined(IN_RING3)
1180
1181	/**
1182	* Initiates a hard reset which was issued from the guest.
1183	*
1184	* @returns nothing
1185	* @param pBusLogic Pointer to the BusLogic device instance.
1186	* @param fHardReset Flag initiating a hard (vs. soft) reset.
1187	*/
1188	static void buslogicR3InitiateReset(PBUSLOGIC pBusLogic, bool fHardReset)
1189	{
1190	LogFlowFunc(("pBusLogic=%#p fHardReset=%d\n", pBusLogic, fHardReset));
1191
1192	buslogicR3HwReset(pBusLogic, false);
1193
1194	if (fHardReset)
1195	{
1196	/* Set the diagnostic active bit in the status register and clear the ready state. */
1197	pBusLogic->regStatus \|= BL_STAT_DACT;
1198	pBusLogic->regStatus &= ~BL_STAT_HARDY;
1199
1200	/* Remember when the guest initiated a reset (after we're done resetting). */
1201	pBusLogic->u64ResetTime = PDMDevHlpTMTimeVirtGetNano(pBusLogic->CTX_SUFF(pDevIns));
1202	}
1203	}
1204
1205	/**
1206	* Send a mailbox with set status codes to the guest.
1207	*
1208	* @returns nothing.
1209	* @param pBusLogic Pointer to the BusLogic device instance.
1210	* @param GCPhysAddrCCB The physical guest address of the CCB the mailbox is for.
1211	* @param pCCBGuest The command control block.
1212	* @param uHostAdapterStatus The host adapter status code to set.
1213	* @param uDeviceStatus The target device status to set.
1214	* @param uMailboxCompletionCode Completion status code to set in the mailbox.
1215	*/
1216	static void buslogicR3SendIncomingMailbox(PBUSLOGIC pBusLogic, RTGCPHYS GCPhysAddrCCB,
1217	PCCBU pCCBGuest, uint8_t uHostAdapterStatus,
1218	uint8_t uDeviceStatus, uint8_t uMailboxCompletionCode)
1219	{
1220	Mailbox32 MbxIn;
1221
1222	MbxIn.u32PhysAddrCCB = (uint32_t)GCPhysAddrCCB;
1223	MbxIn.u.in.uHostAdapterStatus = uHostAdapterStatus;
1224	MbxIn.u.in.uTargetDeviceStatus = uDeviceStatus;
1225	MbxIn.u.in.uCompletionCode = uMailboxCompletionCode;
1226
1227	int rc = PDMCritSectEnter(&pBusLogic->CritSectIntr, VINF_SUCCESS);
1228	AssertRC(rc);
1229
1230	RTGCPHYS GCPhysAddrMailboxIncoming = pBusLogic->GCPhysAddrMailboxIncomingBase
1231	+ ( pBusLogic->uMailboxIncomingPositionCurrent
1232	* (pBusLogic->fMbxIs24Bit ? sizeof(Mailbox24) : sizeof(Mailbox32)) );
1233
1234	if (uMailboxCompletionCode != BUSLOGIC_MAILBOX_INCOMING_COMPLETION_ABORTED_NOT_FOUND)
1235	{
1236	LogFlowFunc(("Completing CCB %RGp hstat=%u, dstat=%u, outgoing mailbox at %RGp\n", GCPhysAddrCCB,
1237	uHostAdapterStatus, uDeviceStatus, GCPhysAddrMailboxIncoming));
1238
1239	/* Update CCB. */
1240	pCCBGuest->c.uHostAdapterStatus = uHostAdapterStatus;
1241	pCCBGuest->c.uDeviceStatus = uDeviceStatus;
1242	/* Rewrite CCB up to the CDB; perhaps more than necessary. */
1243	PDMDevHlpPCIPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrCCB,
1244	pCCBGuest, RT_OFFSETOF(CCBC, abCDB));
1245	}
1246
1247	# ifdef RT_STRICT
1248	uint8_t uCode;
1249	unsigned uCodeOffs = pBusLogic->fMbxIs24Bit ? RT_OFFSETOF(Mailbox24, uCmdState) : RT_OFFSETOF(Mailbox32, u.out.uActionCode);
1250	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxIncoming + uCodeOffs, &uCode, sizeof(uCode));
1251	Assert(uCode == BUSLOGIC_MAILBOX_INCOMING_COMPLETION_FREE);
1252	# endif
1253
1254	/* Update mailbox. */
1255	if (pBusLogic->fMbxIs24Bit)
1256	{
1257	Mailbox24 Mbx24;
1258
1259	Mbx24.uCmdState = MbxIn.u.in.uCompletionCode;
1260	U32_TO_ADDR(Mbx24.aPhysAddrCCB, MbxIn.u32PhysAddrCCB);
1261	Log(("24-bit mailbox: completion code=%u, CCB at %RGp\n", Mbx24.uCmdState, (RTGCPHYS)ADDR_TO_U32(Mbx24.aPhysAddrCCB)));
1262	PDMDevHlpPCIPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxIncoming, &Mbx24, sizeof(Mailbox24));
1263	}
1264	else
1265	{
1266	Log(("32-bit mailbox: completion code=%u, CCB at %RGp\n", MbxIn.u.in.uCompletionCode, GCPhysAddrCCB));
1267	PDMDevHlpPCIPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxIncoming,
1268	&MbxIn, sizeof(Mailbox32));
1269	}
1270
1271	/* Advance to next mailbox position. */
1272	pBusLogic->uMailboxIncomingPositionCurrent++;
1273	if (pBusLogic->uMailboxIncomingPositionCurrent >= pBusLogic->cMailbox)
1274	pBusLogic->uMailboxIncomingPositionCurrent = 0;
1275
1276	# ifdef LOG_ENABLED
1277	ASMAtomicIncU32(&pBusLogic->cInMailboxesReady);
1278	# endif
1279
1280	buslogicSetInterrupt(pBusLogic, false, BL_INTR_IMBL);
1281
1282	PDMCritSectLeave(&pBusLogic->CritSectIntr);
1283	}
1284
1285	# ifdef LOG_ENABLED
1286
1287	/**
1288	* Dumps the content of a mailbox for debugging purposes.
1289	*
1290	* @return nothing
1291	* @param pMailbox The mailbox to dump.
1292	* @param fOutgoing true if dumping the outgoing state.
1293	* false if dumping the incoming state.
1294	*/
1295	static void buslogicR3DumpMailboxInfo(PMailbox32 pMailbox, bool fOutgoing)
1296	{
1297	Log(("%s: Dump for %s mailbox:\n", __FUNCTION__, fOutgoing ? "outgoing" : "incoming"));
1298	Log(("%s: u32PhysAddrCCB=%#x\n", __FUNCTION__, pMailbox->u32PhysAddrCCB));
1299	if (fOutgoing)
1300	{
1301	Log(("%s: uActionCode=%u\n", __FUNCTION__, pMailbox->u.out.uActionCode));
1302	}
1303	else
1304	{
1305	Log(("%s: uHostAdapterStatus=%u\n", __FUNCTION__, pMailbox->u.in.uHostAdapterStatus));
1306	Log(("%s: uTargetDeviceStatus=%u\n", __FUNCTION__, pMailbox->u.in.uTargetDeviceStatus));
1307	Log(("%s: uCompletionCode=%u\n", __FUNCTION__, pMailbox->u.in.uCompletionCode));
1308	}
1309	}
1310
1311	/**
1312	* Dumps the content of a command control block for debugging purposes.
1313	*
1314	* @returns nothing.
1315	* @param pCCB Pointer to the command control block to dump.
1316	* @param fIs24BitCCB Flag to determine CCB format.
1317	*/
1318	static void buslogicR3DumpCCBInfo(PCCBU pCCB, bool fIs24BitCCB)
1319	{
1320	Log(("%s: Dump for %s Command Control Block:\n", __FUNCTION__, fIs24BitCCB ? "24-bit" : "32-bit"));
1321	Log(("%s: uOpCode=%#x\n", __FUNCTION__, pCCB->c.uOpcode));
1322	Log(("%s: uDataDirection=%u\n", __FUNCTION__, pCCB->c.uDataDirection));
1323	Log(("%s: cbCDB=%u\n", __FUNCTION__, pCCB->c.cbCDB));
1324	Log(("%s: cbSenseData=%u\n", __FUNCTION__, pCCB->c.cbSenseData));
1325	Log(("%s: uHostAdapterStatus=%u\n", __FUNCTION__, pCCB->c.uHostAdapterStatus));
1326	Log(("%s: uDeviceStatus=%u\n", __FUNCTION__, pCCB->c.uDeviceStatus));
1327	if (fIs24BitCCB)
1328	{
1329	Log(("%s: cbData=%u\n", __FUNCTION__, LEN_TO_U32(pCCB->o.acbData)));
1330	Log(("%s: PhysAddrData=%#x\n", __FUNCTION__, ADDR_TO_U32(pCCB->o.aPhysAddrData)));
1331	Log(("%s: uTargetId=%u\n", __FUNCTION__, pCCB->o.uTargetId));
1332	Log(("%s: uLogicalUnit=%u\n", __FUNCTION__, pCCB->o.uLogicalUnit));
1333	}
1334	else
1335	{
1336	Log(("%s: cbData=%u\n", __FUNCTION__, pCCB->n.cbData));
1337	Log(("%s: PhysAddrData=%#x\n", __FUNCTION__, pCCB->n.u32PhysAddrData));
1338	Log(("%s: uTargetId=%u\n", __FUNCTION__, pCCB->n.uTargetId));
1339	Log(("%s: uLogicalUnit=%u\n", __FUNCTION__, pCCB->n.uLogicalUnit));
1340	Log(("%s: fTagQueued=%d\n", __FUNCTION__, pCCB->n.fTagQueued));
1341	Log(("%s: uQueueTag=%u\n", __FUNCTION__, pCCB->n.uQueueTag));
1342	Log(("%s: fLegacyTagEnable=%u\n", __FUNCTION__, pCCB->n.fLegacyTagEnable));
1343	Log(("%s: uLegacyQueueTag=%u\n", __FUNCTION__, pCCB->n.uLegacyQueueTag));
1344	Log(("%s: PhysAddrSenseData=%#x\n", __FUNCTION__, pCCB->n.u32PhysAddrSenseData));
1345	}
1346	Log(("%s: uCDB[0]=%#x\n", __FUNCTION__, pCCB->c.abCDB[0]));
1347	for (int i = 1; i < pCCB->c.cbCDB; i++)
1348	Log(("%s: uCDB[%d]=%u\n", __FUNCTION__, i, pCCB->c.abCDB[i]));
1349	}
1350
1351	# endif /* LOG_ENABLED */
1352
1353	/**
1354	* Allocate data buffer.
1355	*
1356	* @param pDevIns PDM device instance.
1357	* @param fIs24Bit Flag whether the 24bit SG format is used.
1358	* @param GCSGList Guest physical address of S/G list.
1359	* @param cEntries Number of list entries to read.
1360	* @param pSGEList Pointer to 32-bit S/G list storage.
1361	*/
1362	static void buslogicR3ReadSGEntries(PPDMDEVINS pDevIns, bool fIs24Bit, RTGCPHYS GCSGList,
1363	uint32_t cEntries, SGE32 *pSGEList)
1364	{
1365	/* Read the S/G entries. Convert 24-bit entries to 32-bit format. */
1366	if (fIs24Bit)
1367	{
1368	SGE24 aSGE24[32];
1369	Assert(cEntries <= RT_ELEMENTS(aSGE24));
1370
1371	Log2(("Converting %u 24-bit S/G entries to 32-bit\n", cEntries));
1372	PDMDevHlpPhysRead(pDevIns, GCSGList, &aSGE24, cEntries * sizeof(SGE24));
1373	for (uint32_t i = 0; i < cEntries; ++i)
1374	{
1375	pSGEList[i].cbSegment = LEN_TO_U32(aSGE24[i].acbSegment);
1376	pSGEList[i].u32PhysAddrSegmentBase = ADDR_TO_U32(aSGE24[i].aPhysAddrSegmentBase);
1377	}
1378	}
1379	else
1380	PDMDevHlpPhysRead(pDevIns, GCSGList, pSGEList, cEntries * sizeof(SGE32));
1381	}
1382
1383	/**
1384	* Determines the size of th guest data buffer.
1385	*
1386	* @returns VBox status code.
1387	* @param pDevIns PDM device instance.
1388	* @param pCCBGuest The CCB of the guest.
1389	* @param fIs24Bit Flag whether the 24bit SG format is used.
1390	* @param pcbBuf Where to store the size of the guest data buffer on success.
1391	*/
1392	static int buslogicR3QueryDataBufferSize(PPDMDEVINS pDevIns, PCCBU pCCBGuest, bool fIs24Bit, size_t *pcbBuf)
1393	{
1394	int rc = VINF_SUCCESS;
1395	uint32_t cbDataCCB;
1396	uint32_t u32PhysAddrCCB;
1397	size_t cbBuf = 0;
1398
1399	/* Extract the data length and physical address from the CCB. */
1400	if (fIs24Bit)
1401	{
1402	u32PhysAddrCCB = ADDR_TO_U32(pCCBGuest->o.aPhysAddrData);
1403	cbDataCCB = LEN_TO_U32(pCCBGuest->o.acbData);
1404	}
1405	else
1406	{
1407	u32PhysAddrCCB = pCCBGuest->n.u32PhysAddrData;
1408	cbDataCCB = pCCBGuest->n.cbData;
1409	}
1410
1411	#if 1
1412	/* Hack for NT 10/91: A CCB describes a 2K buffer, but TEST UNIT READY is executed. This command
1413	* returns no data, hence the buffer must be left alone!
1414	*/
1415	if (pCCBGuest->c.abCDB[0] == 0)
1416	cbDataCCB = 0;
1417	#endif
1418
1419	if ( (pCCBGuest->c.uDataDirection != BUSLOGIC_CCB_DIRECTION_NO_DATA)
1420	&& cbDataCCB)
1421	{
1422	/*
1423	* The BusLogic adapter can handle two different data buffer formats.
1424	* The first one is that the data pointer entry in the CCB points to
1425	* the buffer directly. In second mode the data pointer points to a
1426	* scatter gather list which describes the buffer.
1427	*/
1428	if ( (pCCBGuest->c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_SCATTER_GATHER)
1429	\|\| (pCCBGuest->c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_SCATTER_GATHER))
1430	{
1431	uint32_t cScatterGatherGCRead;
1432	uint32_t iScatterGatherEntry;
1433	SGE32 aScatterGatherReadGC[32]; /* A buffer for scatter gather list entries read from guest memory. */
1434	uint32_t cScatterGatherGCLeft = cbDataCCB / (fIs24Bit ? sizeof(SGE24) : sizeof(SGE32));
1435	RTGCPHYS GCPhysAddrScatterGatherCurrent = u32PhysAddrCCB;
1436
1437	/* Count number of bytes to transfer. */
1438	do
1439	{
1440	cScatterGatherGCRead = (cScatterGatherGCLeft < RT_ELEMENTS(aScatterGatherReadGC))
1441	? cScatterGatherGCLeft
1442	: RT_ELEMENTS(aScatterGatherReadGC);
1443	cScatterGatherGCLeft -= cScatterGatherGCRead;
1444
1445	buslogicR3ReadSGEntries(pDevIns, fIs24Bit, GCPhysAddrScatterGatherCurrent, cScatterGatherGCRead, aScatterGatherReadGC);
1446
1447	for (iScatterGatherEntry = 0; iScatterGatherEntry < cScatterGatherGCRead; iScatterGatherEntry++)
1448	cbBuf += aScatterGatherReadGC[iScatterGatherEntry].cbSegment;
1449
1450	/* Set address to the next entries to read. */
1451	GCPhysAddrScatterGatherCurrent += cScatterGatherGCRead * (fIs24Bit ? sizeof(SGE24) : sizeof(SGE32));
1452	} while (cScatterGatherGCLeft > 0);
1453
1454	Log(("%s: cbBuf=%d\n", __FUNCTION__, cbBuf));
1455	}
1456	else if ( pCCBGuest->c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB
1457	\|\| pCCBGuest->c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_DATA_LENGTH)
1458	cbBuf = cbDataCCB;
1459	}
1460
1461	if (RT_SUCCESS(rc))
1462	*pcbBuf = cbBuf;
1463
1464	return rc;
1465	}
1466
1467	/**
1468	* Copy from guest to host memory worker.
1469	*
1470	* @copydoc BUSLOGICR3MEMCOPYCALLBACK
1471	*/
1472	static DECLCALLBACK(void) buslogicR3CopyBufferFromGuestWorker(PBUSLOGIC pThis, RTGCPHYS GCPhys, PRTSGBUF pSgBuf,
1473	size_t cbCopy, size_t *pcbSkip)
1474	{
1475	size_t cbSkipped = RT_MIN(cbCopy, *pcbSkip);
1476	cbCopy -= cbSkipped;
1477	GCPhys += cbSkipped;
1478	*pcbSkip -= cbSkipped;
1479
1480	while (cbCopy)
1481	{
1482	size_t cbSeg = cbCopy;
1483	void *pvSeg = RTSgBufGetNextSegment(pSgBuf, &cbSeg);
1484
1485	AssertPtr(pvSeg);
1486	PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), GCPhys, pvSeg, cbSeg);
1487	GCPhys += cbSeg;
1488	cbCopy -= cbSeg;
1489	}
1490	}
1491
1492	/**
1493	* Copy from host to guest memory worker.
1494	*
1495	* @copydoc BUSLOGICR3MEMCOPYCALLBACK
1496	*/
1497	static DECLCALLBACK(void) buslogicR3CopyBufferToGuestWorker(PBUSLOGIC pThis, RTGCPHYS GCPhys, PRTSGBUF pSgBuf,
1498	size_t cbCopy, size_t *pcbSkip)
1499	{
1500	size_t cbSkipped = RT_MIN(cbCopy, *pcbSkip);
1501	cbCopy -= cbSkipped;
1502	GCPhys += cbSkipped;
1503	*pcbSkip -= cbSkipped;
1504
1505	while (cbCopy)
1506	{
1507	size_t cbSeg = cbCopy;
1508	void *pvSeg = RTSgBufGetNextSegment(pSgBuf, &cbSeg);
1509
1510	AssertPtr(pvSeg);
1511	PDMDevHlpPCIPhysWrite(pThis->CTX_SUFF(pDevIns), GCPhys, pvSeg, cbSeg);
1512	GCPhys += cbSeg;
1513	cbCopy -= cbSeg;
1514	}
1515	}
1516
1517	/**
1518	* Walks the guest S/G buffer calling the given copy worker for every buffer.
1519	*
1520	* @returns The amout of bytes actually copied.
1521	* @param pThis Pointer to the Buslogic device state.
1522	* @param pReq Pointe to the request state.
1523	* @param pfnCopyWorker The copy method to apply for each guest buffer.
1524	* @param pSgBuf The host S/G buffer.
1525	* @param cbSkip How many bytes to skip in advance before starting to copy.
1526	* @param cbCopy How many bytes to copy.
1527	*/
1528	static size_t buslogicR3SgBufWalker(PBUSLOGIC pThis, PBUSLOGICREQ pReq,
1529	PBUSLOGICR3MEMCOPYCALLBACK pfnCopyWorker,
1530	PRTSGBUF pSgBuf, size_t cbSkip, size_t cbCopy)
1531	{
1532	PPDMDEVINS pDevIns = pThis->CTX_SUFF(pDevIns);
1533	uint32_t cbDataCCB;
1534	uint32_t u32PhysAddrCCB;
1535	size_t cbCopied = 0;
1536
1537	/*
1538	* Add the amount to skip to the host buffer size to avoid a
1539	* few conditionals later on.
1540	*/
1541	cbCopy += cbSkip;
1542
1543	/* Extract the data length and physical address from the CCB. */
1544	if (pReq->fIs24Bit)
1545	{
1546	u32PhysAddrCCB = ADDR_TO_U32(pReq->CCBGuest.o.aPhysAddrData);
1547	cbDataCCB = LEN_TO_U32(pReq->CCBGuest.o.acbData);
1548	}
1549	else
1550	{
1551	u32PhysAddrCCB = pReq->CCBGuest.n.u32PhysAddrData;
1552	cbDataCCB = pReq->CCBGuest.n.cbData;
1553	}
1554
1555	#if 1
1556	/* Hack for NT 10/91: A CCB describes a 2K buffer, but TEST UNIT READY is executed. This command
1557	* returns no data, hence the buffer must be left alone!
1558	*/
1559	if (pReq->CCBGuest.c.abCDB[0] == 0)
1560	cbDataCCB = 0;
1561	#endif
1562
1563	LogFlowFunc(("pReq=%#p cbDataCCB=%u direction=%u cbCopy=%zu\n", pReq, cbDataCCB,
1564	pReq->CCBGuest.c.uDataDirection, cbCopy));
1565
1566	if ( (cbDataCCB > 0)
1567	&& ( pReq->CCBGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_IN
1568	\|\| pReq->CCBGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_OUT
1569	\|\| pReq->CCBGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_UNKNOWN))
1570	{
1571	if ( (pReq->CCBGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_SCATTER_GATHER)
1572	\|\| (pReq->CCBGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_SCATTER_GATHER))
1573	{
1574	uint32_t cScatterGatherGCRead;
1575	uint32_t iScatterGatherEntry;
1576	SGE32 aScatterGatherReadGC[32]; /* Number of scatter gather list entries read from guest memory. */
1577	uint32_t cScatterGatherGCLeft = cbDataCCB / (pReq->fIs24Bit ? sizeof(SGE24) : sizeof(SGE32));
1578	RTGCPHYS GCPhysAddrScatterGatherCurrent = u32PhysAddrCCB;
1579
1580	do
1581	{
1582	cScatterGatherGCRead = (cScatterGatherGCLeft < RT_ELEMENTS(aScatterGatherReadGC))
1583	? cScatterGatherGCLeft
1584	: RT_ELEMENTS(aScatterGatherReadGC);
1585	cScatterGatherGCLeft -= cScatterGatherGCRead;
1586
1587	buslogicR3ReadSGEntries(pDevIns, pReq->fIs24Bit, GCPhysAddrScatterGatherCurrent,
1588	cScatterGatherGCRead, aScatterGatherReadGC);
1589
1590	for (iScatterGatherEntry = 0; iScatterGatherEntry < cScatterGatherGCRead && cbCopy > 0; iScatterGatherEntry++)
1591	{
1592	RTGCPHYS GCPhysAddrDataBase;
1593	size_t cbCopyThis;
1594
1595	Log(("%s: iScatterGatherEntry=%u\n", __FUNCTION__, iScatterGatherEntry));
1596
1597	GCPhysAddrDataBase = (RTGCPHYS)aScatterGatherReadGC[iScatterGatherEntry].u32PhysAddrSegmentBase;
1598	cbCopyThis = RT_MIN(cbCopy, aScatterGatherReadGC[iScatterGatherEntry].cbSegment);
1599
1600	Log(("%s: GCPhysAddrDataBase=%RGp cbCopyThis=%zu\n", __FUNCTION__, GCPhysAddrDataBase, cbCopyThis));
1601
1602	pfnCopyWorker(pThis, GCPhysAddrDataBase, pSgBuf, cbCopyThis, &cbSkip);
1603	cbCopied += cbCopyThis;
1604	cbCopy -= cbCopyThis;
1605	}
1606
1607	/* Set address to the next entries to read. */
1608	GCPhysAddrScatterGatherCurrent += cScatterGatherGCRead * (pReq->fIs24Bit ? sizeof(SGE24) : sizeof(SGE32));
1609	} while ( cScatterGatherGCLeft > 0
1610	&& cbCopy > 0);
1611
1612	}
1613	else if ( pReq->CCBGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB
1614	\|\| pReq->CCBGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_DATA_LENGTH)
1615	{
1616	/* The buffer is not scattered. */
1617	RTGCPHYS GCPhysAddrDataBase = u32PhysAddrCCB;
1618
1619	AssertMsg(GCPhysAddrDataBase != 0, ("Physical address is 0\n"));
1620
1621	Log(("Non-scattered buffer:\n"));
1622	Log(("u32PhysAddrData=%#x\n", u32PhysAddrCCB));
1623	Log(("cbData=%u\n", cbDataCCB));
1624	Log(("GCPhysAddrDataBase=0x%RGp\n", GCPhysAddrDataBase));
1625
1626	/* Copy the data into the guest memory. */
1627	pfnCopyWorker(pThis, GCPhysAddrDataBase, pSgBuf, RT_MIN(cbDataCCB, cbCopy), &cbSkip);
1628	cbCopied += RT_MIN(cbDataCCB, cbCopy);
1629	}
1630	}
1631
1632	return cbCopied - RT_MIN(cbSkip, cbCopied);
1633	}
1634
1635	/**
1636	* Copies a data buffer into the S/G buffer set up by the guest.
1637	*
1638	* @returns Amount of bytes copied to the guest.
1639	* @param pThis The LsiLogic controller device instance.
1640	* @param pReq Request structure.
1641	* @param pSgBuf The S/G buffer to copy from.
1642	* @param cbSkip How many bytes to skip in advance before starting to copy.
1643	* @param cbCopy How many bytes to copy.
1644	*/
1645	static size_t buslogicR3CopySgBufToGuest(PBUSLOGIC pThis, PBUSLOGICREQ pReq, PRTSGBUF pSgBuf,
1646	size_t cbSkip, size_t cbCopy)
1647	{
1648	return buslogicR3SgBufWalker(pThis, pReq, buslogicR3CopyBufferToGuestWorker,
1649	pSgBuf, cbSkip, cbCopy);
1650	}
1651
1652	/**
1653	* Copies the guest S/G buffer into a host data buffer.
1654	*
1655	* @returns Amount of bytes copied from the guest.
1656	* @param pThis The LsiLogic controller device instance.
1657	* @param pReq Request structure.
1658	* @param pSgBuf The S/G buffer to copy into.
1659	* @param cbSkip How many bytes to skip in advance before starting to copy.
1660	* @param cbCopy How many bytes to copy.
1661	*/
1662	static size_t buslogicR3CopySgBufFromGuest(PBUSLOGIC pThis, PBUSLOGICREQ pReq, PRTSGBUF pSgBuf,
1663	size_t cbSkip, size_t cbCopy)
1664	{
1665	return buslogicR3SgBufWalker(pThis, pReq, buslogicR3CopyBufferFromGuestWorker,
1666	pSgBuf, cbSkip, cbCopy);
1667	}
1668
1669	/** Convert sense buffer length taking into account shortcut values. */
1670	static uint32_t buslogicR3ConvertSenseBufferLength(uint32_t cbSense)
1671	{
1672	/* Convert special sense buffer length values. */
1673	if (cbSense == 0)
1674	cbSense = 14; /* 0 means standard 14-byte buffer. */
1675	else if (cbSense == 1)
1676	cbSense = 0; /* 1 means no sense data. */
1677	else if (cbSense < 8)
1678	AssertMsgFailed(("Reserved cbSense value of %d used!\n", cbSense));
1679
1680	return cbSense;
1681	}
1682
1683	/**
1684	* Free the sense buffer.
1685	*
1686	* @returns nothing.
1687	* @param pReq Pointer to the request state.
1688	* @param fCopy If sense data should be copied to guest memory.
1689	*/
1690	static void buslogicR3SenseBufferFree(PBUSLOGICREQ pReq, bool fCopy)
1691	{
1692	uint32_t cbSenseBuffer;
1693
1694	cbSenseBuffer = buslogicR3ConvertSenseBufferLength(pReq->CCBGuest.c.cbSenseData);
1695
1696	/* Copy the sense buffer into guest memory if requested. */
1697	if (fCopy && cbSenseBuffer)
1698	{
1699	PPDMDEVINS pDevIns = pReq->pTargetDevice->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns);
1700	RTGCPHYS GCPhysAddrSenseBuffer;
1701
1702	/* With 32-bit CCBs, the (optional) sense buffer physical address is provided separately.
1703	* On the other hand, with 24-bit CCBs, the sense buffer is simply located at the end of
1704	* the CCB, right after the variable-length CDB.
1705	*/
1706	if (pReq->fIs24Bit)
1707	{
1708	GCPhysAddrSenseBuffer = pReq->GCPhysAddrCCB;
1709	GCPhysAddrSenseBuffer += pReq->CCBGuest.c.cbCDB + RT_OFFSETOF(CCB24, abCDB);
1710	}
1711	else
1712	GCPhysAddrSenseBuffer = pReq->CCBGuest.n.u32PhysAddrSenseData;
1713
1714	Log3(("%s: sense buffer: %.*Rhxs\n", __FUNCTION__, cbSenseBuffer, pReq->pbSenseBuffer));
1715	PDMDevHlpPCIPhysWrite(pDevIns, GCPhysAddrSenseBuffer, pReq->pbSenseBuffer, cbSenseBuffer);
1716	}
1717
1718	RTMemFree(pReq->pbSenseBuffer);
1719	pReq->pbSenseBuffer = NULL;
1720	}
1721
1722	/**
1723	* Alloc the sense buffer.
1724	*
1725	* @returns VBox status code.
1726	* @param pReq Pointer to the task state.
1727	*/
1728	static int buslogicR3SenseBufferAlloc(PBUSLOGICREQ pReq)
1729	{
1730	pReq->pbSenseBuffer = NULL;
1731
1732	uint32_t cbSenseBuffer = buslogicR3ConvertSenseBufferLength(pReq->CCBGuest.c.cbSenseData);
1733	if (cbSenseBuffer)
1734	{
1735	pReq->pbSenseBuffer = (uint8_t *)RTMemAllocZ(cbSenseBuffer);
1736	if (!pReq->pbSenseBuffer)
1737	return VERR_NO_MEMORY;
1738	}
1739
1740	return VINF_SUCCESS;
1741	}
1742
1743	#endif /* IN_RING3 */
1744
1745	/**
1746	* Parses the command buffer and executes it.
1747	*
1748	* @returns VBox status code.
1749	* @param pBusLogic Pointer to the BusLogic device instance.
1750	*/
1751	static int buslogicProcessCommand(PBUSLOGIC pBusLogic)
1752	{
1753	int rc = VINF_SUCCESS;
1754	bool fSuppressIrq = false;
1755
1756	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
1757	AssertMsg(pBusLogic->uOperationCode != 0xff, ("There is no command to execute\n"));
1758
1759	switch (pBusLogic->uOperationCode)
1760	{
1761	case BUSLOGICCOMMAND_TEST_CMDC_INTERRUPT:
1762	/* Valid command, no reply. */
1763	pBusLogic->cbReplyParametersLeft = 0;
1764	break;
1765	case BUSLOGICCOMMAND_INQUIRE_PCI_HOST_ADAPTER_INFORMATION:
1766	{
1767	PReplyInquirePCIHostAdapterInformation pReply = (PReplyInquirePCIHostAdapterInformation)pBusLogic->aReplyBuffer;
1768	memset(pReply, 0, sizeof(ReplyInquirePCIHostAdapterInformation));
1769
1770	/* It seems VMware does not provide valid information here too, lets do the same :) */
1771	pReply->InformationIsValid = 0;
1772	pReply->IsaIOPort = pBusLogic->uISABaseCode;
1773	pReply->IRQ = PCIDevGetInterruptLine(&pBusLogic->dev);
1774	pBusLogic->cbReplyParametersLeft = sizeof(ReplyInquirePCIHostAdapterInformation);
1775	break;
1776	}
1777	case BUSLOGICCOMMAND_SET_SCSI_SELECTION_TIMEOUT:
1778	{
1779	/* no-op */
1780	pBusLogic->cbReplyParametersLeft = 0;
1781	break;
1782	}
1783	case BUSLOGICCOMMAND_MODIFY_IO_ADDRESS:
1784	{
1785	/* Modify the ISA-compatible I/O port base. Note that this technically
1786	* violates the PCI spec, as this address is not reported through PCI.
1787	* However, it is required for compatibility with old drivers.
1788	*/
1789	#ifdef IN_RING3
1790	Log(("ISA I/O for PCI (code %x)\n", pBusLogic->aCommandBuffer[0]));
1791	buslogicR3RegisterISARange(pBusLogic, pBusLogic->aCommandBuffer[0]);
1792	pBusLogic->cbReplyParametersLeft = 0;
1793	fSuppressIrq = true;
1794	break;
1795	#else
1796	AssertMsgFailed(("Must never get here!\n"));
1797	break;
1798	#endif
1799	}
1800	case BUSLOGICCOMMAND_INQUIRE_BOARD_ID:
1801	{
1802	/* The special option byte is important: If it is '0' or 'B', Windows NT drivers
1803	* for Adaptec AHA-154x may claim the adapter. The BusLogic drivers will claim
1804	* the adapter only when the byte is not '0' or 'B'.
1805	*/
1806	pBusLogic->aReplyBuffer[0] = 'A'; /* Firmware option bytes */
1807	pBusLogic->aReplyBuffer[1] = 'A'; /* Special option byte */
1808
1809	/* We report version 5.07B. This reply will provide the first two digits. */
1810	pBusLogic->aReplyBuffer[2] = '5'; /* Major version 5 */
1811	pBusLogic->aReplyBuffer[3] = '0'; /* Minor version 0 */
1812	pBusLogic->cbReplyParametersLeft = 4; /* Reply is 4 bytes long */
1813	break;
1814	}
1815	case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_3RD_LETTER:
1816	{
1817	pBusLogic->aReplyBuffer[0] = '7';
1818	pBusLogic->cbReplyParametersLeft = 1;
1819	break;
1820	}
1821	case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_LETTER:
1822	{
1823	pBusLogic->aReplyBuffer[0] = 'B';
1824	pBusLogic->cbReplyParametersLeft = 1;
1825	break;
1826	}
1827	case BUSLOGICCOMMAND_SET_ADAPTER_OPTIONS:
1828	/* The parameter list length is determined by the first byte of the command buffer. */
1829	if (pBusLogic->iParameter == 1)
1830	{
1831	/* First pass - set the number of following parameter bytes. */
1832	pBusLogic->cbCommandParametersLeft = pBusLogic->aCommandBuffer[0];
1833	Log(("Set HA options: %u bytes follow\n", pBusLogic->cbCommandParametersLeft));
1834	}
1835	else
1836	{
1837	/* Second pass - process received data. */
1838	Log(("Set HA options: received %u bytes\n", pBusLogic->aCommandBuffer[0]));
1839	/* We ignore the data - it only concerns the SCSI hardware protocol. */
1840	}
1841	pBusLogic->cbReplyParametersLeft = 0;
1842	break;
1843
1844	case BUSLOGICCOMMAND_EXECUTE_SCSI_COMMAND:
1845	/* The parameter list length is at least 12 bytes; the 12th byte determines
1846	* the number of additional CDB bytes that will follow.
1847	*/
1848	if (pBusLogic->iParameter == 12)
1849	{
1850	/* First pass - set the number of following CDB bytes. */
1851	pBusLogic->cbCommandParametersLeft = pBusLogic->aCommandBuffer[11];
1852	Log(("Execute SCSI cmd: %u more bytes follow\n", pBusLogic->cbCommandParametersLeft));
1853	}
1854	else
1855	{
1856	PESCMD pCmd;
1857
1858	/* Second pass - process received data. */
1859	Log(("Execute SCSI cmd: received %u bytes\n", pBusLogic->aCommandBuffer[0]));
1860
1861	pCmd = (PESCMD)pBusLogic->aCommandBuffer;
1862	Log(("Addr %08X, cbData %08X, cbCDB=%u\n", pCmd->u32PhysAddrData, pCmd->cbData, pCmd->cbCDB));
1863	}
1864	// This is currently a dummy - just fails every command.
1865	pBusLogic->cbReplyParametersLeft = 4;
1866	pBusLogic->aReplyBuffer[0] = pBusLogic->aReplyBuffer[1] = 0;
1867	pBusLogic->aReplyBuffer[2] = 0x11; /* HBA status (timeout). */
1868	pBusLogic->aReplyBuffer[3] = 0; /* Device status. */
1869	break;
1870
1871	case BUSLOGICCOMMAND_INQUIRE_HOST_ADAPTER_MODEL_NUMBER:
1872	{
1873	/* The reply length is set by the guest and is found in the first byte of the command buffer. */
1874	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
1875	memset(pBusLogic->aReplyBuffer, 0, pBusLogic->cbReplyParametersLeft);
1876	const char aModelName[] = "958D "; /* Trailing \0 is fine, that's the filler anyway. */
1877	int cCharsToTransfer = pBusLogic->cbReplyParametersLeft <= sizeof(aModelName)
1878	? pBusLogic->cbReplyParametersLeft
1879	: sizeof(aModelName);
1880
1881	for (int i = 0; i < cCharsToTransfer; i++)
1882	pBusLogic->aReplyBuffer[i] = aModelName[i];
1883
1884	break;
1885	}
1886	case BUSLOGICCOMMAND_INQUIRE_CONFIGURATION:
1887	{
1888	uint8_t uPciIrq = PCIDevGetInterruptLine(&pBusLogic->dev);
1889
1890	pBusLogic->cbReplyParametersLeft = sizeof(ReplyInquireConfiguration);
1891	PReplyInquireConfiguration pReply = (PReplyInquireConfiguration)pBusLogic->aReplyBuffer;
1892	memset(pReply, 0, sizeof(ReplyInquireConfiguration));
1893
1894	pReply->uHostAdapterId = 7; /* The controller has always 7 as ID. */
1895	pReply->fDmaChannel6 = 1; /* DMA channel 6 is a good default. */
1896	/* The PCI IRQ is not necessarily representable in this structure.
1897	* If that is the case, the guest likely won't function correctly,
1898	* therefore we log a warning.
1899	*/
1900	switch (uPciIrq)
1901	{
1902	case 9: pReply->fIrqChannel9 = 1; break;
1903	case 10: pReply->fIrqChannel10 = 1; break;
1904	case 11: pReply->fIrqChannel11 = 1; break;
1905	case 12: pReply->fIrqChannel12 = 1; break;
1906	case 14: pReply->fIrqChannel14 = 1; break;
1907	case 15: pReply->fIrqChannel15 = 1; break;
1908	default:
1909	LogRel(("Warning: PCI IRQ %d cannot be represented as ISA!\n", uPciIrq));
1910	break;
1911	}
1912	break;
1913	}
1914	case BUSLOGICCOMMAND_INQUIRE_EXTENDED_SETUP_INFORMATION:
1915	{
1916	/* Some Adaptec AHA-154x drivers (e.g. OS/2) execute this command and expect
1917	* it to fail. If it succeeds, the drivers refuse to load. However, some newer
1918	* Adaptec 154x models supposedly support it too??
1919	*/
1920
1921	/* The reply length is set by the guest and is found in the first byte of the command buffer. */
1922	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
1923	PReplyInquireExtendedSetupInformation pReply = (PReplyInquireExtendedSetupInformation)pBusLogic->aReplyBuffer;
1924	memset(pReply, 0, sizeof(ReplyInquireExtendedSetupInformation));
1925
1926	/** @todo should this reflect the RAM contents (AutoSCSIRam)? */
1927	pReply->uBusType = 'E'; /* EISA style */
1928	pReply->u16ScatterGatherLimit = 8192;
1929	pReply->cMailbox = pBusLogic->cMailbox;
1930	pReply->uMailboxAddressBase = (uint32_t)pBusLogic->GCPhysAddrMailboxOutgoingBase;
1931	pReply->fLevelSensitiveInterrupt = true;
1932	pReply->fHostWideSCSI = true;
1933	pReply->fHostUltraSCSI = true;
1934	memcpy(pReply->aFirmwareRevision, "07B", sizeof(pReply->aFirmwareRevision));
1935
1936	break;
1937	}
1938	case BUSLOGICCOMMAND_INQUIRE_SETUP_INFORMATION:
1939	{
1940	/* The reply length is set by the guest and is found in the first byte of the command buffer. */
1941	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
1942	PReplyInquireSetupInformation pReply = (PReplyInquireSetupInformation)pBusLogic->aReplyBuffer;
1943	memset(pReply, 0, sizeof(ReplyInquireSetupInformation));
1944	pReply->fSynchronousInitiationEnabled = true;
1945	pReply->fParityCheckingEnabled = true;
1946	pReply->cMailbox = pBusLogic->cMailbox;
1947	U32_TO_ADDR(pReply->MailboxAddress, pBusLogic->GCPhysAddrMailboxOutgoingBase);
1948	pReply->uSignature = 'B';
1949	/* The 'D' signature prevents Adaptec's OS/2 drivers from getting too
1950	* friendly with BusLogic hardware and upsetting the HBA state.
1951	*/
1952	pReply->uCharacterD = 'D'; /* BusLogic model. */
1953	pReply->uHostBusType = 'F'; /* PCI bus. */
1954	break;
1955	}
1956	case BUSLOGICCOMMAND_FETCH_HOST_ADAPTER_LOCAL_RAM:
1957	{
1958	/*
1959	* First element in the command buffer contains start offset to read from
1960	* and second one the number of bytes to read.
1961	*/
1962	uint8_t uOffset = pBusLogic->aCommandBuffer[0];
1963	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[1];
1964
1965	pBusLogic->fUseLocalRam = true;
1966	pBusLogic->iReply = uOffset;
1967	break;
1968	}
1969	case BUSLOGICCOMMAND_INITIALIZE_MAILBOX:
1970	{
1971	PRequestInitMbx pRequest = (PRequestInitMbx)pBusLogic->aCommandBuffer;
1972
1973	///@todo: Command should fail if requested no. of mailbox entries is zero
1974	pBusLogic->fMbxIs24Bit = true;
1975	pBusLogic->cMailbox = pRequest->cMailbox;
1976	pBusLogic->GCPhysAddrMailboxOutgoingBase = (RTGCPHYS)ADDR_TO_U32(pRequest->aMailboxBaseAddr);
1977	/* The area for incoming mailboxes is right after the last entry of outgoing mailboxes. */
1978	pBusLogic->GCPhysAddrMailboxIncomingBase = pBusLogic->GCPhysAddrMailboxOutgoingBase + (pBusLogic->cMailbox * sizeof(Mailbox24));
1979
1980	Log(("GCPhysAddrMailboxOutgoingBase=%RGp\n", pBusLogic->GCPhysAddrMailboxOutgoingBase));
1981	Log(("GCPhysAddrMailboxIncomingBase=%RGp\n", pBusLogic->GCPhysAddrMailboxIncomingBase));
1982	Log(("cMailboxes=%u (24-bit mode)\n", pBusLogic->cMailbox));
1983	LogRel(("Initialized 24-bit mailbox, %d entries at %08x\n", pRequest->cMailbox, ADDR_TO_U32(pRequest->aMailboxBaseAddr)));
1984
1985	pBusLogic->regStatus &= ~BL_STAT_INREQ;
1986	pBusLogic->cbReplyParametersLeft = 0;
1987	break;
1988	}
1989	case BUSLOGICCOMMAND_INITIALIZE_EXTENDED_MAILBOX:
1990	{
1991	PRequestInitializeExtendedMailbox pRequest = (PRequestInitializeExtendedMailbox)pBusLogic->aCommandBuffer;
1992
1993	///@todo: Command should fail if requested no. of mailbox entries is zero
1994	pBusLogic->fMbxIs24Bit = false;
1995	pBusLogic->cMailbox = pRequest->cMailbox;
1996	pBusLogic->GCPhysAddrMailboxOutgoingBase = (RTGCPHYS)pRequest->uMailboxBaseAddress;
1997	/* The area for incoming mailboxes is right after the last entry of outgoing mailboxes. */
1998	pBusLogic->GCPhysAddrMailboxIncomingBase = (RTGCPHYS)pRequest->uMailboxBaseAddress + (pBusLogic->cMailbox * sizeof(Mailbox32));
1999
2000	Log(("GCPhysAddrMailboxOutgoingBase=%RGp\n", pBusLogic->GCPhysAddrMailboxOutgoingBase));
2001	Log(("GCPhysAddrMailboxIncomingBase=%RGp\n", pBusLogic->GCPhysAddrMailboxIncomingBase));
2002	Log(("cMailboxes=%u (32-bit mode)\n", pBusLogic->cMailbox));
2003	LogRel(("Initialized 32-bit mailbox, %d entries at %08x\n", pRequest->cMailbox, pRequest->uMailboxBaseAddress));
2004
2005	pBusLogic->regStatus &= ~BL_STAT_INREQ;
2006	pBusLogic->cbReplyParametersLeft = 0;
2007	break;
2008	}
2009	case BUSLOGICCOMMAND_ENABLE_STRICT_ROUND_ROBIN_MODE:
2010	{
2011	if (pBusLogic->aCommandBuffer[0] == 0)
2012	pBusLogic->fStrictRoundRobinMode = false;
2013	else if (pBusLogic->aCommandBuffer[0] == 1)
2014	pBusLogic->fStrictRoundRobinMode = true;
2015	else
2016	AssertMsgFailed(("Invalid round robin mode %d\n", pBusLogic->aCommandBuffer[0]));
2017
2018	pBusLogic->cbReplyParametersLeft = 0;
2019	break;
2020	}
2021	case BUSLOGICCOMMAND_SET_CCB_FORMAT:
2022	{
2023	if (pBusLogic->aCommandBuffer[0] == 0)
2024	pBusLogic->fExtendedLunCCBFormat = false;
2025	else if (pBusLogic->aCommandBuffer[0] == 1)
2026	pBusLogic->fExtendedLunCCBFormat = true;
2027	else
2028	AssertMsgFailed(("Invalid CCB format %d\n", pBusLogic->aCommandBuffer[0]));
2029
2030	pBusLogic->cbReplyParametersLeft = 0;
2031	break;
2032	}
2033	case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_0_TO_7:
2034	/* This is supposed to send TEST UNIT READY to each target/LUN.
2035	* We cheat and skip that, since we already know what's attached
2036	*/
2037	memset(pBusLogic->aReplyBuffer, 0, 8);
2038	for (int i = 0; i < 8; ++i)
2039	{
2040	if (pBusLogic->aDeviceStates[i].fPresent)
2041	pBusLogic->aReplyBuffer[i] = 1;
2042	}
2043	pBusLogic->aReplyBuffer[7] = 0; /* HA hardcoded at ID 7. */
2044	pBusLogic->cbReplyParametersLeft = 8;
2045	break;
2046	case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_8_TO_15:
2047	/* See note about cheating above. */
2048	memset(pBusLogic->aReplyBuffer, 0, 8);
2049	for (int i = 0; i < 8; ++i)
2050	{
2051	if (pBusLogic->aDeviceStates[i + 8].fPresent)
2052	pBusLogic->aReplyBuffer[i] = 1;
2053	}
2054	pBusLogic->cbReplyParametersLeft = 8;
2055	break;
2056	case BUSLOGICCOMMAND_INQUIRE_TARGET_DEVICES:
2057	{
2058	/* Each bit which is set in the 16bit wide variable means a present device. */
2059	uint16_t u16TargetsPresentMask = 0;
2060
2061	for (uint8_t i = 0; i < RT_ELEMENTS(pBusLogic->aDeviceStates); i++)
2062	{
2063	if (pBusLogic->aDeviceStates[i].fPresent)
2064	u16TargetsPresentMask \|= (1 << i);
2065	}
2066	pBusLogic->aReplyBuffer[0] = (uint8_t)u16TargetsPresentMask;
2067	pBusLogic->aReplyBuffer[1] = (uint8_t)(u16TargetsPresentMask >> 8);
2068	pBusLogic->cbReplyParametersLeft = 2;
2069	break;
2070	}
2071	case BUSLOGICCOMMAND_INQUIRE_SYNCHRONOUS_PERIOD:
2072	{
2073	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
2074
2075	for (uint8_t i = 0; i < pBusLogic->cbReplyParametersLeft; i++)
2076	pBusLogic->aReplyBuffer[i] = 0; /** @todo Figure if we need something other here. It's not needed for the linux driver */
2077
2078	break;
2079	}
2080	case BUSLOGICCOMMAND_DISABLE_HOST_ADAPTER_INTERRUPT:
2081	{
2082	if (pBusLogic->aCommandBuffer[0] == 0)
2083	pBusLogic->fIRQEnabled = false;
2084	else
2085	pBusLogic->fIRQEnabled = true;
2086	/* No interrupt signaled regardless of enable/disable. */
2087	fSuppressIrq = true;
2088	break;
2089	}
2090	case BUSLOGICCOMMAND_ECHO_COMMAND_DATA:
2091	{
2092	pBusLogic->aReplyBuffer[0] = pBusLogic->aCommandBuffer[0];
2093	pBusLogic->cbReplyParametersLeft = 1;
2094	break;
2095	}
2096	case BUSLOGICCOMMAND_ENABLE_OUTGOING_MAILBOX_AVAILABLE_INTERRUPT:
2097	{
2098	uint8_t uEnable = pBusLogic->aCommandBuffer[0];
2099
2100	pBusLogic->cbReplyParametersLeft = 0;
2101	Log(("Enable OMBR: %u\n", uEnable));
2102	/* Only 0/1 are accepted. */
2103	if (uEnable > 1)
2104	pBusLogic->regStatus \|= BL_STAT_CMDINV;
2105	else
2106	{
2107	pBusLogic->LocalRam.structured.autoSCSIData.uReserved6 = uEnable;
2108	fSuppressIrq = true;
2109	}
2110	break;
2111	}
2112	case BUSLOGICCOMMAND_SET_PREEMPT_TIME_ON_BUS:
2113	{
2114	pBusLogic->cbReplyParametersLeft = 0;
2115	pBusLogic->LocalRam.structured.autoSCSIData.uBusOnDelay = pBusLogic->aCommandBuffer[0];
2116	Log(("Bus-on time: %d\n", pBusLogic->aCommandBuffer[0]));
2117	break;
2118	}
2119	case BUSLOGICCOMMAND_SET_TIME_OFF_BUS:
2120	{
2121	pBusLogic->cbReplyParametersLeft = 0;
2122	pBusLogic->LocalRam.structured.autoSCSIData.uBusOffDelay = pBusLogic->aCommandBuffer[0];
2123	Log(("Bus-off time: %d\n", pBusLogic->aCommandBuffer[0]));
2124	break;
2125	}
2126	case BUSLOGICCOMMAND_SET_BUS_TRANSFER_RATE:
2127	{
2128	pBusLogic->cbReplyParametersLeft = 0;
2129	pBusLogic->LocalRam.structured.autoSCSIData.uDMATransferRate = pBusLogic->aCommandBuffer[0];
2130	Log(("Bus transfer rate: %02X\n", pBusLogic->aCommandBuffer[0]));
2131	break;
2132	}
2133	case BUSLOGICCOMMAND_WRITE_BUSMASTER_CHIP_FIFO:
2134	{
2135	RTGCPHYS GCPhysFifoBuf;
2136	Addr24 addr;
2137
2138	pBusLogic->cbReplyParametersLeft = 0;
2139	addr.hi = pBusLogic->aCommandBuffer[0];
2140	addr.mid = pBusLogic->aCommandBuffer[1];
2141	addr.lo = pBusLogic->aCommandBuffer[2];
2142	GCPhysFifoBuf = (RTGCPHYS)ADDR_TO_U32(addr);
2143	Log(("Write busmaster FIFO at: %04X\n", ADDR_TO_U32(addr)));
2144	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysFifoBuf,
2145	&pBusLogic->LocalRam.u8View[64], 64);
2146	break;
2147	}
2148	case BUSLOGICCOMMAND_READ_BUSMASTER_CHIP_FIFO:
2149	{
2150	RTGCPHYS GCPhysFifoBuf;
2151	Addr24 addr;
2152
2153	pBusLogic->cbReplyParametersLeft = 0;
2154	addr.hi = pBusLogic->aCommandBuffer[0];
2155	addr.mid = pBusLogic->aCommandBuffer[1];
2156	addr.lo = pBusLogic->aCommandBuffer[2];
2157	GCPhysFifoBuf = (RTGCPHYS)ADDR_TO_U32(addr);
2158	Log(("Read busmaster FIFO at: %04X\n", ADDR_TO_U32(addr)));
2159	PDMDevHlpPCIPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysFifoBuf,
2160	&pBusLogic->LocalRam.u8View[64], 64);
2161	break;
2162	}
2163	default:
2164	AssertMsgFailed(("Invalid command %#x\n", pBusLogic->uOperationCode));
2165	/* fall thru */
2166	case BUSLOGICCOMMAND_EXT_BIOS_INFO:
2167	case BUSLOGICCOMMAND_UNLOCK_MAILBOX:
2168	/* Commands valid for Adaptec 154xC which we don't handle since
2169	* we pretend being 154xB compatible. Just mark the command as invalid.
2170	*/
2171	Log(("Command %#x not valid for this adapter\n", pBusLogic->uOperationCode));
2172	pBusLogic->cbReplyParametersLeft = 0;
2173	pBusLogic->regStatus \|= BL_STAT_CMDINV;
2174	break;
2175	case BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND: /* Should be handled already. */
2176	AssertMsgFailed(("Invalid mailbox execute state!\n"));
2177	}
2178
2179	Log(("uOperationCode=%#x, cbReplyParametersLeft=%d\n", pBusLogic->uOperationCode, pBusLogic->cbReplyParametersLeft));
2180
2181	/* Set the data in ready bit in the status register in case the command has a reply. */
2182	if (pBusLogic->cbReplyParametersLeft)
2183	pBusLogic->regStatus \|= BL_STAT_DIRRDY;
2184	else if (!pBusLogic->cbCommandParametersLeft)
2185	buslogicCommandComplete(pBusLogic, fSuppressIrq);
2186
2187	return rc;
2188	}
2189
2190	/**
2191	* Read a register from the BusLogic adapter.
2192	*
2193	* @returns VBox status code.
2194	* @param pBusLogic Pointer to the BusLogic instance data.
2195	* @param iRegister The index of the register to read.
2196	* @param pu32 Where to store the register content.
2197	*/
2198	static int buslogicRegisterRead(PBUSLOGIC pBusLogic, unsigned iRegister, uint32_t *pu32)
2199	{
2200	int rc = VINF_SUCCESS;
2201
2202	switch (iRegister)
2203	{
2204	case BUSLOGIC_REGISTER_STATUS:
2205	{
2206	*pu32 = pBusLogic->regStatus;
2207
2208	/* If the diagnostic active bit is set, we are in a guest-initiated
2209	* hard reset. If the guest reads the status register and waits for
2210	* the host adapter ready bit to be set, we terminate the reset right
2211	* away. However, guests may also expect the reset condition to clear
2212	* automatically after a period of time, in which case we can't show
2213	* the DIAG bit at all.
2214	*/
2215	if (pBusLogic->regStatus & BL_STAT_DACT)
2216	{
2217	uint64_t u64AccessTime = PDMDevHlpTMTimeVirtGetNano(pBusLogic->CTX_SUFF(pDevIns));
2218
2219	pBusLogic->regStatus &= ~BL_STAT_DACT;
2220	pBusLogic->regStatus \|= BL_STAT_HARDY;
2221
2222	if (u64AccessTime - pBusLogic->u64ResetTime > BUSLOGIC_RESET_DURATION_NS)
2223	{
2224	/* If reset already expired, let the guest see that right away. */
2225	*pu32 = pBusLogic->regStatus;
2226	pBusLogic->u64ResetTime = 0;
2227	}
2228	}
2229	break;
2230	}
2231	case BUSLOGIC_REGISTER_DATAIN:
2232	{
2233	if (pBusLogic->fUseLocalRam)
2234	*pu32 = pBusLogic->LocalRam.u8View[pBusLogic->iReply];
2235	else
2236	*pu32 = pBusLogic->aReplyBuffer[pBusLogic->iReply];
2237
2238	/* Careful about underflow - guest can read data register even if
2239	* no data is available.
2240	*/
2241	if (pBusLogic->cbReplyParametersLeft)
2242	{
2243	pBusLogic->iReply++;
2244	pBusLogic->cbReplyParametersLeft--;
2245	if (!pBusLogic->cbReplyParametersLeft)
2246	{
2247	/*
2248	* Reply finished, set command complete bit, unset data-in ready bit and
2249	* interrupt the guest if enabled.
2250	*/
2251	buslogicCommandComplete(pBusLogic, false);
2252	}
2253	}
2254	LogFlowFunc(("data=%02x, iReply=%d, cbReplyParametersLeft=%u\n", *pu32,
2255	pBusLogic->iReply, pBusLogic->cbReplyParametersLeft));
2256	break;
2257	}
2258	case BUSLOGIC_REGISTER_INTERRUPT:
2259	{
2260	*pu32 = pBusLogic->regInterrupt;
2261	break;
2262	}
2263	case BUSLOGIC_REGISTER_GEOMETRY:
2264	{
2265	*pu32 = pBusLogic->regGeometry;
2266	break;
2267	}
2268	default:
2269	*pu32 = UINT32_C(0xffffffff);
2270	}
2271
2272	Log2(("%s: pu32=%p:{%.*Rhxs} iRegister=%d rc=%Rrc\n",
2273	__FUNCTION__, pu32, 1, pu32, iRegister, rc));
2274
2275	return rc;
2276	}
2277
2278	/**
2279	* Write a value to a register.
2280	*
2281	* @returns VBox status code.
2282	* @param pBusLogic Pointer to the BusLogic instance data.
2283	* @param iRegister The index of the register to read.
2284	* @param uVal The value to write.
2285	*/
2286	static int buslogicRegisterWrite(PBUSLOGIC pBusLogic, unsigned iRegister, uint8_t uVal)
2287	{
2288	int rc = VINF_SUCCESS;
2289
2290	switch (iRegister)
2291	{
2292	case BUSLOGIC_REGISTER_CONTROL:
2293	{
2294	if ((uVal & BL_CTRL_RHARD) \|\| (uVal & BL_CTRL_RSOFT))
2295	{
2296	#ifdef IN_RING3
2297	bool fHardReset = !!(uVal & BL_CTRL_RHARD);
2298
2299	LogRel(("BusLogic: %s reset\n", fHardReset ? "hard" : "soft"));
2300	buslogicR3InitiateReset(pBusLogic, fHardReset);
2301	#else
2302	rc = VINF_IOM_R3_IOPORT_WRITE;
2303	#endif
2304	break;
2305	}
2306
2307	rc = PDMCritSectEnter(&pBusLogic->CritSectIntr, VINF_IOM_R3_IOPORT_WRITE);
2308	if (rc != VINF_SUCCESS)
2309	return rc;
2310
2311	#ifdef LOG_ENABLED
2312	uint32_t cMailboxesReady = ASMAtomicXchgU32(&pBusLogic->cInMailboxesReady, 0);
2313	Log(("%u incoming mailboxes were ready when this interrupt was cleared\n", cMailboxesReady));
2314	#endif
2315
2316	if (uVal & BL_CTRL_RINT)
2317	buslogicClearInterrupt(pBusLogic);
2318
2319	PDMCritSectLeave(&pBusLogic->CritSectIntr);
2320
2321	break;
2322	}
2323	case BUSLOGIC_REGISTER_COMMAND:
2324	{
2325	/* Fast path for mailbox execution command. */
2326	if ((uVal == BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND) && (pBusLogic->uOperationCode == 0xff))
2327	{
2328	///@todo: Should fail if BL_STAT_INREQ is set
2329	/* If there are no mailboxes configured, don't even try to do anything. */
2330	if (pBusLogic->cMailbox)
2331	{
2332	ASMAtomicIncU32(&pBusLogic->cMailboxesReady);
2333	if (!ASMAtomicXchgBool(&pBusLogic->fNotificationSent, true))
2334	{
2335	/* Send new notification to the queue. */
2336	PPDMQUEUEITEMCORE pItem = PDMQueueAlloc(pBusLogic->CTX_SUFF(pNotifierQueue));
2337	AssertMsg(pItem, ("Allocating item for queue failed\n"));
2338	PDMQueueInsert(pBusLogic->CTX_SUFF(pNotifierQueue), (PPDMQUEUEITEMCORE)pItem);
2339	}
2340	}
2341
2342	return rc;
2343	}
2344
2345	/*
2346	* Check if we are already fetch command parameters from the guest.
2347	* If not we initialize executing a new command.
2348	*/
2349	if (pBusLogic->uOperationCode == 0xff)
2350	{
2351	pBusLogic->uOperationCode = uVal;
2352	pBusLogic->iParameter = 0;
2353
2354	/* Mark host adapter as busy and clear the invalid status bit. */
2355	pBusLogic->regStatus &= ~(BL_STAT_HARDY \| BL_STAT_CMDINV);
2356
2357	/* Get the number of bytes for parameters from the command code. */
2358	switch (pBusLogic->uOperationCode)
2359	{
2360	case BUSLOGICCOMMAND_TEST_CMDC_INTERRUPT:
2361	case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_LETTER:
2362	case BUSLOGICCOMMAND_INQUIRE_BOARD_ID:
2363	case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_3RD_LETTER:
2364	case BUSLOGICCOMMAND_INQUIRE_PCI_HOST_ADAPTER_INFORMATION:
2365	case BUSLOGICCOMMAND_INQUIRE_CONFIGURATION:
2366	case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_0_TO_7:
2367	case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_8_TO_15:
2368	case BUSLOGICCOMMAND_INQUIRE_TARGET_DEVICES:
2369	pBusLogic->cbCommandParametersLeft = 0;
2370	break;
2371	case BUSLOGICCOMMAND_MODIFY_IO_ADDRESS:
2372	case BUSLOGICCOMMAND_INQUIRE_EXTENDED_SETUP_INFORMATION:
2373	case BUSLOGICCOMMAND_INQUIRE_SETUP_INFORMATION:
2374	case BUSLOGICCOMMAND_INQUIRE_HOST_ADAPTER_MODEL_NUMBER:
2375	case BUSLOGICCOMMAND_ENABLE_STRICT_ROUND_ROBIN_MODE:
2376	case BUSLOGICCOMMAND_SET_CCB_FORMAT:
2377	case BUSLOGICCOMMAND_INQUIRE_SYNCHRONOUS_PERIOD:
2378	case BUSLOGICCOMMAND_DISABLE_HOST_ADAPTER_INTERRUPT:
2379	case BUSLOGICCOMMAND_ECHO_COMMAND_DATA:
2380	case BUSLOGICCOMMAND_ENABLE_OUTGOING_MAILBOX_AVAILABLE_INTERRUPT:
2381	case BUSLOGICCOMMAND_SET_PREEMPT_TIME_ON_BUS:
2382	case BUSLOGICCOMMAND_SET_TIME_OFF_BUS:
2383	case BUSLOGICCOMMAND_SET_BUS_TRANSFER_RATE:
2384	pBusLogic->cbCommandParametersLeft = 1;
2385	break;
2386	case BUSLOGICCOMMAND_FETCH_HOST_ADAPTER_LOCAL_RAM:
2387	pBusLogic->cbCommandParametersLeft = 2;
2388	break;
2389	case BUSLOGICCOMMAND_READ_BUSMASTER_CHIP_FIFO:
2390	case BUSLOGICCOMMAND_WRITE_BUSMASTER_CHIP_FIFO:
2391	pBusLogic->cbCommandParametersLeft = 3;
2392	break;
2393	case BUSLOGICCOMMAND_SET_SCSI_SELECTION_TIMEOUT:
2394	pBusLogic->cbCommandParametersLeft = 4;
2395	break;
2396	case BUSLOGICCOMMAND_INITIALIZE_MAILBOX:
2397	pBusLogic->cbCommandParametersLeft = sizeof(RequestInitMbx);
2398	break;
2399	case BUSLOGICCOMMAND_INITIALIZE_EXTENDED_MAILBOX:
2400	pBusLogic->cbCommandParametersLeft = sizeof(RequestInitializeExtendedMailbox);
2401	break;
2402	case BUSLOGICCOMMAND_SET_ADAPTER_OPTIONS:
2403	/* There must be at least one byte following this command. */
2404	pBusLogic->cbCommandParametersLeft = 1;
2405	break;
2406	case BUSLOGICCOMMAND_EXECUTE_SCSI_COMMAND:
2407	/* 12 bytes + variable-length CDB. */
2408	pBusLogic->cbCommandParametersLeft = 12;
2409	break;
2410	case BUSLOGICCOMMAND_EXT_BIOS_INFO:
2411	case BUSLOGICCOMMAND_UNLOCK_MAILBOX:
2412	/* Invalid commands. */
2413	pBusLogic->cbCommandParametersLeft = 0;
2414	break;
2415	case BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND: /* Should not come here anymore. */
2416	default:
2417	AssertMsgFailed(("Invalid operation code %#x\n", uVal));
2418	}
2419	}
2420	else
2421	{
2422	#ifndef IN_RING3
2423	/* This command must be executed in R3 as it rehooks the ISA I/O port. */
2424	if (pBusLogic->uOperationCode == BUSLOGICCOMMAND_MODIFY_IO_ADDRESS)
2425	{
2426	rc = VINF_IOM_R3_IOPORT_WRITE;
2427	break;
2428	}
2429	#endif
2430	/*
2431	* The real adapter would set the Command register busy bit in the status register.
2432	* The guest has to wait until it is unset.
2433	* We don't need to do it because the guest does not continue execution while we are in this
2434	* function.
2435	*/
2436	pBusLogic->aCommandBuffer[pBusLogic->iParameter] = uVal;
2437	pBusLogic->iParameter++;
2438	pBusLogic->cbCommandParametersLeft--;
2439	}
2440
2441	/* Start execution of command if there are no parameters left. */
2442	if (!pBusLogic->cbCommandParametersLeft)
2443	{
2444	rc = buslogicProcessCommand(pBusLogic);
2445	AssertMsgRC(rc, ("Processing command failed rc=%Rrc\n", rc));
2446	}
2447	break;
2448	}
2449
2450	/* On BusLogic adapters, the interrupt and geometry registers are R/W.
2451	* That is different from Adaptec 154x where those are read only.
2452	*/
2453	case BUSLOGIC_REGISTER_INTERRUPT:
2454	pBusLogic->regInterrupt = uVal;
2455	break;
2456
2457	case BUSLOGIC_REGISTER_GEOMETRY:
2458	pBusLogic->regGeometry = uVal;
2459	break;
2460
2461	default:
2462	AssertMsgFailed(("Register not available\n"));
2463	rc = VERR_IOM_IOPORT_UNUSED;
2464	}
2465
2466	return rc;
2467	}
2468
2469	/**
2470	* Memory mapped I/O Handler for read operations.
2471	*
2472	* @returns VBox status code.
2473	*
2474	* @param pDevIns The device instance.
2475	* @param pvUser User argument.
2476	* @param GCPhysAddr Physical address (in GC) where the read starts.
2477	* @param pv Where to store the result.
2478	* @param cb Number of bytes read.
2479	*/
2480	PDMBOTHCBDECL(int) buslogicMMIORead(PPDMDEVINS pDevIns, void pvUser, RTGCPHYS GCPhysAddr, void pv, unsigned cb)
2481	{
2482	RT_NOREF_PV(pDevIns); RT_NOREF_PV(pvUser); RT_NOREF_PV(GCPhysAddr); RT_NOREF_PV(pv); RT_NOREF_PV(cb);
2483
2484	/* the linux driver does not make use of the MMIO area. */
2485	AssertMsgFailed(("MMIO Read\n"));
2486	return VINF_SUCCESS;
2487	}
2488
2489	/**
2490	* Memory mapped I/O Handler for write operations.
2491	*
2492	* @returns VBox status code.
2493	*
2494	* @param pDevIns The device instance.
2495	* @param pvUser User argument.
2496	* @param GCPhysAddr Physical address (in GC) where the read starts.
2497	* @param pv Where to fetch the result.
2498	* @param cb Number of bytes to write.
2499	*/
2500	PDMBOTHCBDECL(int) buslogicMMIOWrite(PPDMDEVINS pDevIns, void pvUser, RTGCPHYS GCPhysAddr, void const pv, unsigned cb)
2501	{
2502	RT_NOREF_PV(pDevIns); RT_NOREF_PV(pvUser); RT_NOREF_PV(GCPhysAddr); RT_NOREF_PV(pv); RT_NOREF_PV(cb);
2503
2504	/* the linux driver does not make use of the MMIO area. */
2505	AssertMsgFailed(("MMIO Write\n"));
2506	return VINF_SUCCESS;
2507	}
2508
2509	/**
2510	* Port I/O Handler for IN operations.
2511	*
2512	* @returns VBox status code.
2513	*
2514	* @param pDevIns The device instance.
2515	* @param pvUser User argument.
2516	* @param uPort Port number used for the IN operation.
2517	* @param pu32 Where to store the result.
2518	* @param cb Number of bytes read.
2519	*/
2520	PDMBOTHCBDECL(int) buslogicIOPortRead(PPDMDEVINS pDevIns, void pvUser, RTIOPORT uPort, uint32_t pu32, unsigned cb)
2521	{
2522	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2523	unsigned iRegister = uPort % 4;
2524	RT_NOREF_PV(pvUser); RT_NOREF_PV(cb);
2525
2526	Assert(cb == 1);
2527
2528	return buslogicRegisterRead(pBusLogic, iRegister, pu32);
2529	}
2530
2531	/**
2532	* Port I/O Handler for OUT operations.
2533	*
2534	* @returns VBox status code.
2535	*
2536	* @param pDevIns The device instance.
2537	* @param pvUser User argument.
2538	* @param uPort Port number used for the IN operation.
2539	* @param u32 The value to output.
2540	* @param cb The value size in bytes.
2541	*/
2542	PDMBOTHCBDECL(int) buslogicIOPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint32_t u32, unsigned cb)
2543	{
2544	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2545	unsigned iRegister = uPort % 4;
2546	uint8_t uVal = (uint8_t)u32;
2547	RT_NOREF2(pvUser, cb);
2548
2549	Assert(cb == 1);
2550
2551	int rc = buslogicRegisterWrite(pBusLogic, iRegister, (uint8_t)uVal);
2552
2553	Log2(("#%d %s: pvUser=%#p cb=%d u32=%#x uPort=%#x rc=%Rrc\n",
2554	pDevIns->iInstance, __FUNCTION__, pvUser, cb, u32, uPort, rc));
2555
2556	return rc;
2557	}
2558
2559	#ifdef IN_RING3
2560
2561	static int buslogicR3PrepareBIOSSCSIRequest(PBUSLOGIC pThis)
2562	{
2563	uint32_t uTargetDevice;
2564	uint32_t uLun;
2565	uint8_t *pbCdb;
2566	size_t cbCdb;
2567	size_t cbBuf;
2568
2569	int rc = vboxscsiSetupRequest(&pThis->VBoxSCSI, &uLun, &pbCdb, &cbCdb, &cbBuf, &uTargetDevice);
2570	AssertMsgRCReturn(rc, ("Setting up SCSI request failed rc=%Rrc\n", rc), rc);
2571
2572	if ( uTargetDevice < RT_ELEMENTS(pThis->aDeviceStates)
2573	&& pThis->aDeviceStates[uTargetDevice].pDrvBase)
2574	{
2575	PBUSLOGICDEVICE pTgtDev = &pThis->aDeviceStates[uTargetDevice];
2576	PDMMEDIAEXIOREQ hIoReq;
2577	PBUSLOGICREQ pReq;
2578
2579	rc = pTgtDev->pDrvMediaEx->pfnIoReqAlloc(pTgtDev->pDrvMediaEx, &hIoReq, (void **)&pReq,
2580	0, PDMIMEDIAEX_F_SUSPEND_ON_RECOVERABLE_ERR);
2581	AssertMsgRCReturn(rc, ("Getting task from cache failed rc=%Rrc\n", rc), rc);
2582
2583	pReq->fBIOS = true;
2584	pReq->hIoReq = hIoReq;
2585	pReq->pTargetDevice = pTgtDev;
2586
2587	ASMAtomicIncU32(&pTgtDev->cOutstandingRequests);
2588
2589	rc = pTgtDev->pDrvMediaEx->pfnIoReqSendScsiCmd(pTgtDev->pDrvMediaEx, pReq->hIoReq, uLun,
2590	pbCdb, cbCdb, PDMMEDIAEXIOREQSCSITXDIR_UNKNOWN,
2591	cbBuf, NULL, 0, &pReq->u8ScsiSts, 30 * RT_MS_1SEC);
2592	if (rc == VINF_SUCCESS \|\| rc != VINF_PDM_MEDIAEX_IOREQ_IN_PROGRESS)
2593	{
2594	uint8_t u8ScsiSts = pReq->u8ScsiSts;
2595	pTgtDev->pDrvMediaEx->pfnIoReqFree(pTgtDev->pDrvMediaEx, pReq->hIoReq);
2596	rc = vboxscsiRequestFinished(&pThis->VBoxSCSI, u8ScsiSts);
2597	}
2598	else if (rc == VINF_PDM_MEDIAEX_IOREQ_IN_PROGRESS)
2599	rc = VINF_SUCCESS;
2600
2601	return rc;
2602	}
2603
2604	/* Device is not present. */
2605	AssertMsg(pbCdb[0] == SCSI_INQUIRY,
2606	("Device is not present but command is not inquiry\n"));
2607
2608	SCSIINQUIRYDATA ScsiInquiryData;
2609
2610	memset(&ScsiInquiryData, 0, sizeof(SCSIINQUIRYDATA));
2611	ScsiInquiryData.u5PeripheralDeviceType = SCSI_INQUIRY_DATA_PERIPHERAL_DEVICE_TYPE_UNKNOWN;
2612	ScsiInquiryData.u3PeripheralQualifier = SCSI_INQUIRY_DATA_PERIPHERAL_QUALIFIER_NOT_CONNECTED_NOT_SUPPORTED;
2613
2614	memcpy(pThis->VBoxSCSI.pbBuf, &ScsiInquiryData, 5);
2615
2616	rc = vboxscsiRequestFinished(&pThis->VBoxSCSI, SCSI_STATUS_OK);
2617	AssertMsgRCReturn(rc, ("Finishing BIOS SCSI request failed rc=%Rrc\n", rc), rc);
2618
2619	return rc;
2620	}
2621
2622
2623	/**
2624	* Port I/O Handler for IN operations - BIOS port.
2625	*
2626	* @returns VBox status code.
2627	*
2628	* @param pDevIns The device instance.
2629	* @param pvUser User argument.
2630	* @param uPort Port number used for the IN operation.
2631	* @param pu32 Where to store the result.
2632	* @param cb Number of bytes read.
2633	*/
2634	static DECLCALLBACK(int) buslogicR3BiosIoPortRead(PPDMDEVINS pDevIns, void pvUser, RTIOPORT uPort, uint32_t pu32, unsigned cb)
2635	{
2636	RT_NOREF(pvUser, cb);
2637	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2638
2639	Assert(cb == 1);
2640
2641	int rc = vboxscsiReadRegister(&pBusLogic->VBoxSCSI, (uPort - BUSLOGIC_BIOS_IO_PORT), pu32);
2642
2643	//Log2(("%s: pu32=%p:{%.*Rhxs} iRegister=%d rc=%Rrc\n",
2644	// __FUNCTION__, pu32, 1, pu32, (uPort - BUSLOGIC_BIOS_IO_PORT), rc));
2645
2646	return rc;
2647	}
2648
2649	/**
2650	* Port I/O Handler for OUT operations - BIOS port.
2651	*
2652	* @returns VBox status code.
2653	*
2654	* @param pDevIns The device instance.
2655	* @param pvUser User argument.
2656	* @param uPort Port number used for the IN operation.
2657	* @param u32 The value to output.
2658	* @param cb The value size in bytes.
2659	*/
2660	static DECLCALLBACK(int) buslogicR3BiosIoPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint32_t u32, unsigned cb)
2661	{
2662	RT_NOREF(pvUser, cb);
2663	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2664	Log2(("#%d %s: pvUser=%#p cb=%d u32=%#x uPort=%#x\n", pDevIns->iInstance, __FUNCTION__, pvUser, cb, u32, uPort));
2665
2666	/*
2667	* If there is already a request form the BIOS pending ignore this write
2668	* because it should not happen.
2669	*/
2670	if (ASMAtomicReadBool(&pThis->fBiosReqPending))
2671	return VINF_SUCCESS;
2672
2673	Assert(cb == 1);
2674
2675	int rc = vboxscsiWriteRegister(&pThis->VBoxSCSI, (uPort - BUSLOGIC_BIOS_IO_PORT), (uint8_t)u32);
2676	if (rc == VERR_MORE_DATA)
2677	{
2678	ASMAtomicXchgBool(&pThis->fBiosReqPending, true);
2679	/* Send a notifier to the PDM queue that there are pending requests. */
2680	PPDMQUEUEITEMCORE pItem = PDMQueueAlloc(pThis->CTX_SUFF(pNotifierQueue));
2681	AssertMsg(pItem, ("Allocating item for queue failed\n"));
2682	PDMQueueInsert(pThis->CTX_SUFF(pNotifierQueue), (PPDMQUEUEITEMCORE)pItem);
2683	rc = VINF_SUCCESS;
2684	}
2685	else if (RT_FAILURE(rc))
2686	AssertMsgFailed(("Writing BIOS register failed %Rrc\n", rc));
2687
2688	return VINF_SUCCESS;
2689	}
2690
2691	/**
2692	* Port I/O Handler for primary port range OUT string operations.
2693	* @see FNIOMIOPORTOUTSTRING for details.
2694	*/
2695	static DECLCALLBACK(int) buslogicR3BiosIoPortWriteStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port,
2696	uint8_t const pbSrc, uint32_t pcTransfers, unsigned cb)
2697	{
2698	RT_NOREF(pvUser);
2699	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2700	Log2(("#%d %s: pvUser=%#p cb=%d Port=%#x\n", pDevIns->iInstance, __FUNCTION__, pvUser, cb, Port));
2701
2702	/*
2703	* If there is already a request form the BIOS pending ignore this write
2704	* because it should not happen.
2705	*/
2706	if (ASMAtomicReadBool(&pThis->fBiosReqPending))
2707	return VINF_SUCCESS;
2708
2709	int rc = vboxscsiWriteString(pDevIns, &pThis->VBoxSCSI, (Port - BUSLOGIC_BIOS_IO_PORT), pbSrc, pcTransfers, cb);
2710	if (rc == VERR_MORE_DATA)
2711	{
2712	ASMAtomicXchgBool(&pThis->fBiosReqPending, true);
2713	/* Send a notifier to the PDM queue that there are pending requests. */
2714	PPDMQUEUEITEMCORE pItem = PDMQueueAlloc(pThis->CTX_SUFF(pNotifierQueue));
2715	AssertMsg(pItem, ("Allocating item for queue failed\n"));
2716	PDMQueueInsert(pThis->CTX_SUFF(pNotifierQueue), (PPDMQUEUEITEMCORE)pItem);
2717	}
2718	else if (RT_FAILURE(rc))
2719	AssertMsgFailed(("Writing BIOS register failed %Rrc\n", rc));
2720
2721	return VINF_SUCCESS;
2722	}
2723
2724	/**
2725	* Port I/O Handler for primary port range IN string operations.
2726	* @see FNIOMIOPORTINSTRING for details.
2727	*/
2728	static DECLCALLBACK(int) buslogicR3BiosIoPortReadStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port,
2729	uint8_t pbDst, uint32_t pcTransfers, unsigned cb)
2730	{
2731	RT_NOREF(pvUser);
2732	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2733	LogFlowFunc(("#%d %s: pvUser=%#p cb=%d Port=%#x\n", pDevIns->iInstance, __FUNCTION__, pvUser, cb, Port));
2734
2735	return vboxscsiReadString(pDevIns, &pBusLogic->VBoxSCSI, (Port - BUSLOGIC_BIOS_IO_PORT),
2736	pbDst, pcTransfers, cb);
2737	}
2738
2739	/**
2740	* Update the ISA I/O range.
2741	*
2742	* @returns nothing.
2743	* @param pBusLogic Pointer to the BusLogic device instance.
2744	* @param uBaseCode Encoded ISA I/O base; only low 3 bits are used.
2745	*/
2746	static int buslogicR3RegisterISARange(PBUSLOGIC pBusLogic, uint8_t uBaseCode)
2747	{
2748	uint8_t uCode = uBaseCode & MAX_ISA_BASE;
2749	uint16_t uNewBase = g_aISABases[uCode];
2750	int rc = VINF_SUCCESS;
2751
2752	LogFlowFunc(("ISA I/O code %02X, new base %X\n", uBaseCode, uNewBase));
2753
2754	/* Check if the same port range is already registered. */
2755	if (uNewBase != pBusLogic->IOISABase)
2756	{
2757	/* Unregister the old range, if any. */
2758	if (pBusLogic->IOISABase)
2759	rc = PDMDevHlpIOPortDeregister(pBusLogic->CTX_SUFF(pDevIns), pBusLogic->IOISABase, 4);
2760
2761	if (RT_SUCCESS(rc))
2762	{
2763	pBusLogic->IOISABase = 0; /* First mark as unregistered. */
2764	pBusLogic->uISABaseCode = ISA_BASE_DISABLED;
2765
2766	if (uNewBase)
2767	{
2768	/* Register the new range if requested. */
2769	rc = PDMDevHlpIOPortRegister(pBusLogic->CTX_SUFF(pDevIns), uNewBase, 4, NULL,
2770	buslogicIOPortWrite, buslogicIOPortRead,
2771	NULL, NULL,
2772	"BusLogic ISA");
2773	if (RT_SUCCESS(rc))
2774	{
2775	pBusLogic->IOISABase = uNewBase;
2776	pBusLogic->uISABaseCode = uCode;
2777	}
2778	}
2779	}
2780	if (RT_SUCCESS(rc))
2781	{
2782	if (uNewBase)
2783	{
2784	Log(("ISA I/O base: %x\n", uNewBase));
2785	LogRel(("BusLogic: ISA I/O base: %x\n", uNewBase));
2786	}
2787	else
2788	{
2789	Log(("Disabling ISA I/O ports.\n"));
2790	LogRel(("BusLogic: ISA I/O disabled\n"));
2791	}
2792	}
2793
2794	}
2795	return rc;
2796	}
2797
2798
2799	/**
2800	* @callback_method_impl{FNPCIIOREGIONMAP}
2801	*/
2802	static DECLCALLBACK(int) buslogicR3MmioMap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
2803	RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType)
2804	{
2805	RT_NOREF(pPciDev, iRegion);
2806	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2807	int rc = VINF_SUCCESS;
2808
2809	Log2(("%s: registering MMIO area at GCPhysAddr=%RGp cb=%RGp\n", __FUNCTION__, GCPhysAddress, cb));
2810
2811	Assert(cb >= 32);
2812
2813	if (enmType == PCI_ADDRESS_SPACE_MEM)
2814	{
2815	/* We use the assigned size here, because we currently only support page aligned MMIO ranges. */
2816	rc = PDMDevHlpMMIORegister(pDevIns, GCPhysAddress, cb, NULL /pvUser/,
2817	IOMMMIO_FLAGS_READ_PASSTHRU \| IOMMMIO_FLAGS_WRITE_PASSTHRU,
2818	buslogicMMIOWrite, buslogicMMIORead, "BusLogic MMIO");
2819	if (RT_FAILURE(rc))
2820	return rc;
2821
2822	if (pThis->fR0Enabled)
2823	{
2824	rc = PDMDevHlpMMIORegisterR0(pDevIns, GCPhysAddress, cb, NIL_RTR0PTR /pvUser/,
2825	"buslogicMMIOWrite", "buslogicMMIORead");
2826	if (RT_FAILURE(rc))
2827	return rc;
2828	}
2829
2830	if (pThis->fGCEnabled)
2831	{
2832	rc = PDMDevHlpMMIORegisterRC(pDevIns, GCPhysAddress, cb, NIL_RTRCPTR /pvUser/,
2833	"buslogicMMIOWrite", "buslogicMMIORead");
2834	if (RT_FAILURE(rc))
2835	return rc;
2836	}
2837
2838	pThis->MMIOBase = GCPhysAddress;
2839	}
2840	else if (enmType == PCI_ADDRESS_SPACE_IO)
2841	{
2842	rc = PDMDevHlpIOPortRegister(pDevIns, (RTIOPORT)GCPhysAddress, 32,
2843	NULL, buslogicIOPortWrite, buslogicIOPortRead, NULL, NULL, "BusLogic PCI");
2844	if (RT_FAILURE(rc))
2845	return rc;
2846
2847	if (pThis->fR0Enabled)
2848	{
2849	rc = PDMDevHlpIOPortRegisterR0(pDevIns, (RTIOPORT)GCPhysAddress, 32,
2850	0, "buslogicIOPortWrite", "buslogicIOPortRead", NULL, NULL, "BusLogic PCI");
2851	if (RT_FAILURE(rc))
2852	return rc;
2853	}
2854
2855	if (pThis->fGCEnabled)
2856	{
2857	rc = PDMDevHlpIOPortRegisterRC(pDevIns, (RTIOPORT)GCPhysAddress, 32,
2858	0, "buslogicIOPortWrite", "buslogicIOPortRead", NULL, NULL, "BusLogic PCI");
2859	if (RT_FAILURE(rc))
2860	return rc;
2861	}
2862
2863	pThis->IOPortBase = (RTIOPORT)GCPhysAddress;
2864	}
2865	else
2866	AssertMsgFailed(("Invalid enmType=%d\n", enmType));
2867
2868	return rc;
2869	}
2870
2871	static int buslogicR3ReqComplete(PBUSLOGIC pThis, PBUSLOGICREQ pReq, int rcReq)
2872	{
2873	RT_NOREF(rcReq);
2874	PBUSLOGICDEVICE pTgtDev = pReq->pTargetDevice;
2875
2876	LogFlowFunc(("before decrement %u\n", pTgtDev->cOutstandingRequests));
2877	ASMAtomicDecU32(&pTgtDev->cOutstandingRequests);
2878	LogFlowFunc(("after decrement %u\n", pTgtDev->cOutstandingRequests));
2879
2880	if (pReq->fBIOS)
2881	{
2882	uint8_t u8ScsiSts = pReq->u8ScsiSts;
2883	pTgtDev->pDrvMediaEx->pfnIoReqFree(pTgtDev->pDrvMediaEx, pReq->hIoReq);
2884	int rc = vboxscsiRequestFinished(&pThis->VBoxSCSI, u8ScsiSts);
2885	AssertMsgRC(rc, ("Finishing BIOS SCSI request failed rc=%Rrc\n", rc));
2886	}
2887	else
2888	{
2889	if (pReq->pbSenseBuffer)
2890	buslogicR3SenseBufferFree(pReq, (pReq->u8ScsiSts != SCSI_STATUS_OK));
2891
2892	/* Update residual data length. */
2893	if ( (pReq->CCBGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_DATA_LENGTH)
2894	\|\| (pReq->CCBGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_SCATTER_GATHER))
2895	{
2896	size_t cbResidual = 0;
2897	int rc = pTgtDev->pDrvMediaEx->pfnIoReqQueryResidual(pTgtDev->pDrvMediaEx, pReq->hIoReq, &cbResidual);
2898	AssertRC(rc); Assert(cbResidual == (uint32_t)cbResidual);
2899
2900	if (pReq->fIs24Bit)
2901	U32_TO_LEN(pReq->CCBGuest.o.acbData, (uint32_t)cbResidual);
2902	else
2903	pReq->CCBGuest.n.cbData = (uint32_t)cbResidual;
2904	}
2905
2906	/*
2907	* Save vital things from the request and free it before posting completion
2908	* to avoid that the guest submits a new request with the same ID as the still
2909	* allocated one.
2910	*/
2911	#ifdef LOG_ENABLED
2912	bool fIs24Bit = pReq->fIs24Bit;
2913	#endif
2914	uint8_t u8ScsiSts = pReq->u8ScsiSts;
2915	RTGCPHYS GCPhysAddrCCB = pReq->GCPhysAddrCCB;
2916	CCBU CCBGuest;
2917	memcpy(&CCBGuest, &pReq->CCBGuest, sizeof(CCBU));
2918
2919	pTgtDev->pDrvMediaEx->pfnIoReqFree(pTgtDev->pDrvMediaEx, pReq->hIoReq);
2920	if (u8ScsiSts == SCSI_STATUS_OK)
2921	buslogicR3SendIncomingMailbox(pThis, GCPhysAddrCCB, &CCBGuest,
2922	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_CMD_COMPLETED,
2923	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
2924	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITHOUT_ERROR);
2925	else if (u8ScsiSts == SCSI_STATUS_CHECK_CONDITION)
2926	buslogicR3SendIncomingMailbox(pThis, GCPhysAddrCCB, &CCBGuest,
2927	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_CMD_COMPLETED,
2928	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_CHECK_CONDITION,
2929	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR);
2930	else
2931	AssertMsgFailed(("invalid completion status %u\n", u8ScsiSts));
2932
2933	#ifdef LOG_ENABLED
2934	buslogicR3DumpCCBInfo(&CCBGuest, fIs24Bit);
2935	#endif
2936	}
2937
2938	if (pTgtDev->cOutstandingRequests == 0 && pThis->fSignalIdle)
2939	PDMDevHlpAsyncNotificationCompleted(pThis->pDevInsR3);
2940
2941	return VINF_SUCCESS;
2942	}
2943
2944	static DECLCALLBACK(int) buslogicR3QueryDeviceLocation(PPDMIMEDIAPORT pInterface, const char **ppcszController,
2945	uint32_t piInstance, uint32_t piLUN)
2946	{
2947	PBUSLOGICDEVICE pBusLogicDevice = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, IMediaPort);
2948	PPDMDEVINS pDevIns = pBusLogicDevice->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns);
2949
2950	AssertPtrReturn(ppcszController, VERR_INVALID_POINTER);
2951	AssertPtrReturn(piInstance, VERR_INVALID_POINTER);
2952	AssertPtrReturn(piLUN, VERR_INVALID_POINTER);
2953
2954	*ppcszController = pDevIns->pReg->szName;
2955	*piInstance = pDevIns->iInstance;
2956	*piLUN = pBusLogicDevice->iLUN;
2957
2958	return VINF_SUCCESS;
2959	}
2960
2961	/**
2962	* @interface_method_impl{PDMIMEDIAEXPORT,pfnIoReqCopyFromBuf}
2963	*/
2964	static DECLCALLBACK(int) buslogicR3IoReqCopyFromBuf(PPDMIMEDIAEXPORT pInterface, PDMMEDIAEXIOREQ hIoReq,
2965	void *pvIoReqAlloc, uint32_t offDst, PRTSGBUF pSgBuf,
2966	size_t cbCopy)
2967	{
2968	RT_NOREF1(hIoReq);
2969	PBUSLOGICDEVICE pTgtDev = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, IMediaExPort);
2970	PBUSLOGICREQ pReq = (PBUSLOGICREQ)pvIoReqAlloc;
2971
2972	size_t cbCopied = 0;
2973	if (RT_UNLIKELY(pReq->fBIOS))
2974	cbCopied = vboxscsiCopyToBuf(&pTgtDev->CTX_SUFF(pBusLogic)->VBoxSCSI, pSgBuf, offDst, cbCopy);
2975	else
2976	cbCopied = buslogicR3CopySgBufToGuest(pTgtDev->CTX_SUFF(pBusLogic), pReq, pSgBuf, offDst, cbCopy);
2977	return cbCopied == cbCopy ? VINF_SUCCESS : VERR_PDM_MEDIAEX_IOBUF_OVERFLOW;
2978	}
2979
2980	/**
2981	* @interface_method_impl{PDMIMEDIAEXPORT,pfnIoReqCopyToBuf}
2982	*/
2983	static DECLCALLBACK(int) buslogicR3IoReqCopyToBuf(PPDMIMEDIAEXPORT pInterface, PDMMEDIAEXIOREQ hIoReq,
2984	void *pvIoReqAlloc, uint32_t offSrc, PRTSGBUF pSgBuf,
2985	size_t cbCopy)
2986	{
2987	RT_NOREF1(hIoReq);
2988	PBUSLOGICDEVICE pTgtDev = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, IMediaExPort);
2989	PBUSLOGICREQ pReq = (PBUSLOGICREQ)pvIoReqAlloc;
2990
2991	size_t cbCopied = 0;
2992	if (RT_UNLIKELY(pReq->fBIOS))
2993	cbCopied = vboxscsiCopyFromBuf(&pTgtDev->CTX_SUFF(pBusLogic)->VBoxSCSI, pSgBuf, offSrc, cbCopy);
2994	else
2995	cbCopied = buslogicR3CopySgBufFromGuest(pTgtDev->CTX_SUFF(pBusLogic), pReq, pSgBuf, offSrc, cbCopy);
2996	return cbCopied == cbCopy ? VINF_SUCCESS : VERR_PDM_MEDIAEX_IOBUF_UNDERRUN;
2997	}
2998
2999	/**
3000	* @interface_method_impl{PDMIMEDIAEXPORT,pfnIoReqCompleteNotify}
3001	*/
3002	static DECLCALLBACK(int) buslogicR3IoReqCompleteNotify(PPDMIMEDIAEXPORT pInterface, PDMMEDIAEXIOREQ hIoReq,
3003	void *pvIoReqAlloc, int rcReq)
3004	{
3005	RT_NOREF(hIoReq);
3006	PBUSLOGICDEVICE pTgtDev = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, IMediaExPort);
3007	buslogicR3ReqComplete(pTgtDev->CTX_SUFF(pBusLogic), (PBUSLOGICREQ)pvIoReqAlloc, rcReq);
3008	return VINF_SUCCESS;
3009	}
3010
3011	/**
3012	* @interface_method_impl{PDMIMEDIAEXPORT,pfnIoReqStateChanged}
3013	*/
3014	static DECLCALLBACK(void) buslogicR3IoReqStateChanged(PPDMIMEDIAEXPORT pInterface, PDMMEDIAEXIOREQ hIoReq,
3015	void *pvIoReqAlloc, PDMMEDIAEXIOREQSTATE enmState)
3016	{
3017	RT_NOREF3(hIoReq, pvIoReqAlloc, enmState);
3018	PBUSLOGICDEVICE pTgtDev = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, IMediaExPort);
3019
3020	switch (enmState)
3021	{
3022	case PDMMEDIAEXIOREQSTATE_SUSPENDED:
3023	{
3024	/* Make sure the request is not accounted for so the VM can suspend successfully. */
3025	uint32_t cTasksActive = ASMAtomicDecU32(&pTgtDev->cOutstandingRequests);
3026	if (!cTasksActive && pTgtDev->CTX_SUFF(pBusLogic)->fSignalIdle)
3027	PDMDevHlpAsyncNotificationCompleted(pTgtDev->CTX_SUFF(pBusLogic)->pDevInsR3);
3028	break;
3029	}
3030	case PDMMEDIAEXIOREQSTATE_ACTIVE:
3031	/* Make sure the request is accounted for so the VM suspends only when the request is complete. */
3032	ASMAtomicIncU32(&pTgtDev->cOutstandingRequests);
3033	break;
3034	default:
3035	AssertMsgFailed(("Invalid request state given %u\n", enmState));
3036	}
3037	}
3038
3039	/**
3040	* @interface_method_impl{PDMIMEDIAEXPORT,pfnMediumEjected}
3041	*/
3042	static DECLCALLBACK(void) buslogicR3MediumEjected(PPDMIMEDIAEXPORT pInterface)
3043	{
3044	PBUSLOGICDEVICE pTgtDev = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, IMediaExPort);
3045	PBUSLOGIC pThis = pTgtDev->CTX_SUFF(pBusLogic);
3046
3047	if (pThis->pMediaNotify)
3048	{
3049	int rc = VMR3ReqCallNoWait(PDMDevHlpGetVM(pThis->CTX_SUFF(pDevIns)), VMCPUID_ANY,
3050	(PFNRT)pThis->pMediaNotify->pfnEjected, 2,
3051	pThis->pMediaNotify, pTgtDev->iLUN);
3052	AssertRC(rc);
3053	}
3054	}
3055
3056	static int buslogicR3DeviceSCSIRequestSetup(PBUSLOGIC pBusLogic, RTGCPHYS GCPhysAddrCCB)
3057	{
3058	int rc = VINF_SUCCESS;
3059	uint8_t uTargetIdCCB;
3060	CCBU CCBGuest;
3061
3062	/* Fetch the CCB from guest memory. */
3063	/** @todo How much do we really have to read? */
3064	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrCCB,
3065	&CCBGuest, sizeof(CCB32));
3066
3067	uTargetIdCCB = pBusLogic->fMbxIs24Bit ? CCBGuest.o.uTargetId : CCBGuest.n.uTargetId;
3068	if (RT_LIKELY(uTargetIdCCB < RT_ELEMENTS(pBusLogic->aDeviceStates)))
3069	{
3070	PBUSLOGICDEVICE pTgtDev = &pBusLogic->aDeviceStates[uTargetIdCCB];
3071
3072	#ifdef LOG_ENABLED
3073	buslogicR3DumpCCBInfo(&CCBGuest, pBusLogic->fMbxIs24Bit);
3074	#endif
3075
3076	/* Check if device is present on bus. If not return error immediately and don't process this further. */
3077	if (RT_LIKELY(pTgtDev->fPresent))
3078	{
3079	PDMMEDIAEXIOREQ hIoReq;
3080	PBUSLOGICREQ pReq;
3081	rc = pTgtDev->pDrvMediaEx->pfnIoReqAlloc(pTgtDev->pDrvMediaEx, &hIoReq, (void **)&pReq,
3082	GCPhysAddrCCB, PDMIMEDIAEX_F_SUSPEND_ON_RECOVERABLE_ERR);
3083	if (RT_SUCCESS(rc))
3084	{
3085	pReq->pTargetDevice = pTgtDev;
3086	pReq->GCPhysAddrCCB = GCPhysAddrCCB;
3087	pReq->fBIOS = false;
3088	pReq->hIoReq = hIoReq;
3089	pReq->fIs24Bit = pBusLogic->fMbxIs24Bit;
3090
3091	/* Make a copy of the CCB */
3092	memcpy(&pReq->CCBGuest, &CCBGuest, sizeof(CCBGuest));
3093
3094	/* Alloc required buffers. */
3095	rc = buslogicR3SenseBufferAlloc(pReq);
3096	AssertMsgRC(rc, ("Mapping sense buffer failed rc=%Rrc\n", rc));
3097
3098	size_t cbBuf = 0;
3099	rc = buslogicR3QueryDataBufferSize(pBusLogic->CTX_SUFF(pDevIns), &pReq->CCBGuest, pReq->fIs24Bit, &cbBuf);
3100	AssertRC(rc);
3101
3102	uint32_t uLun = pReq->fIs24Bit ? pReq->CCBGuest.o.uLogicalUnit
3103	: pReq->CCBGuest.n.uLogicalUnit;
3104
3105	PDMMEDIAEXIOREQSCSITXDIR enmXferDir = PDMMEDIAEXIOREQSCSITXDIR_UNKNOWN;
3106	size_t cbSense = buslogicR3ConvertSenseBufferLength(CCBGuest.c.cbSenseData);
3107
3108	if (CCBGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_NO_DATA)
3109	enmXferDir = PDMMEDIAEXIOREQSCSITXDIR_NONE;
3110	else if (CCBGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_OUT)
3111	enmXferDir = PDMMEDIAEXIOREQSCSITXDIR_TO_DEVICE;
3112	else if (CCBGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_IN)
3113	enmXferDir = PDMMEDIAEXIOREQSCSITXDIR_FROM_DEVICE;
3114
3115	ASMAtomicIncU32(&pTgtDev->cOutstandingRequests);
3116	rc = pTgtDev->pDrvMediaEx->pfnIoReqSendScsiCmd(pTgtDev->pDrvMediaEx, pReq->hIoReq, uLun,
3117	&pReq->CCBGuest.c.abCDB[0], pReq->CCBGuest.c.cbCDB,
3118	enmXferDir, cbBuf, pReq->pbSenseBuffer, cbSense,
3119	&pReq->u8ScsiSts, 30 * RT_MS_1SEC);
3120	if (rc != VINF_PDM_MEDIAEX_IOREQ_IN_PROGRESS)
3121	buslogicR3ReqComplete(pBusLogic, pReq, rc);
3122	}
3123	else
3124	buslogicR3SendIncomingMailbox(pBusLogic, GCPhysAddrCCB, &CCBGuest,
3125	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_SCSI_SELECTION_TIMEOUT,
3126	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
3127	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR);
3128	}
3129	else
3130	buslogicR3SendIncomingMailbox(pBusLogic, GCPhysAddrCCB, &CCBGuest,
3131	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_SCSI_SELECTION_TIMEOUT,
3132	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
3133	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR);
3134	}
3135	else
3136	buslogicR3SendIncomingMailbox(pBusLogic, GCPhysAddrCCB, &CCBGuest,
3137	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_COMMAND_PARAMETER,
3138	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
3139	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR);
3140
3141	return rc;
3142	}
3143
3144	static int buslogicR3DeviceSCSIRequestAbort(PBUSLOGIC pBusLogic, RTGCPHYS GCPhysAddrCCB)
3145	{
3146	int rc = VINF_SUCCESS;
3147	uint8_t uTargetIdCCB;
3148	CCBU CCBGuest;
3149
3150	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrCCB,
3151	&CCBGuest, sizeof(CCB32));
3152
3153	uTargetIdCCB = pBusLogic->fMbxIs24Bit ? CCBGuest.o.uTargetId : CCBGuest.n.uTargetId;
3154	if (RT_LIKELY(uTargetIdCCB < RT_ELEMENTS(pBusLogic->aDeviceStates)))
3155	buslogicR3SendIncomingMailbox(pBusLogic, GCPhysAddrCCB, &CCBGuest,
3156	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_ABORT_QUEUE_GENERATED,
3157	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
3158	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_ABORTED_NOT_FOUND);
3159	else
3160	buslogicR3SendIncomingMailbox(pBusLogic, GCPhysAddrCCB, &CCBGuest,
3161	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_COMMAND_PARAMETER,
3162	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
3163	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR);
3164
3165	return rc;
3166	}
3167
3168	/**
3169	* Read a mailbox from guest memory. Convert 24-bit mailboxes to
3170	* 32-bit format.
3171	*
3172	* @returns Mailbox guest physical address.
3173	* @param pBusLogic Pointer to the BusLogic instance data.
3174	* @param pMbx Pointer to the mailbox to read into.
3175	*/
3176	static RTGCPHYS buslogicR3ReadOutgoingMailbox(PBUSLOGIC pBusLogic, PMailbox32 pMbx)
3177	{
3178	RTGCPHYS GCMailbox;
3179
3180	if (pBusLogic->fMbxIs24Bit)
3181	{
3182	Mailbox24 Mbx24;
3183
3184	GCMailbox = pBusLogic->GCPhysAddrMailboxOutgoingBase + (pBusLogic->uMailboxOutgoingPositionCurrent * sizeof(Mailbox24));
3185	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCMailbox, &Mbx24, sizeof(Mailbox24));
3186	pMbx->u32PhysAddrCCB = ADDR_TO_U32(Mbx24.aPhysAddrCCB);
3187	pMbx->u.out.uActionCode = Mbx24.uCmdState;
3188	}
3189	else
3190	{
3191	GCMailbox = pBusLogic->GCPhysAddrMailboxOutgoingBase + (pBusLogic->uMailboxOutgoingPositionCurrent * sizeof(Mailbox32));
3192	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCMailbox, pMbx, sizeof(Mailbox32));
3193	}
3194
3195	return GCMailbox;
3196	}
3197
3198	/**
3199	* Read mailbox from the guest and execute command.
3200	*
3201	* @returns VBox status code.
3202	* @param pBusLogic Pointer to the BusLogic instance data.
3203	*/
3204	static int buslogicR3ProcessMailboxNext(PBUSLOGIC pBusLogic)
3205	{
3206	RTGCPHYS GCPhysAddrMailboxCurrent;
3207	Mailbox32 MailboxGuest;
3208	int rc = VINF_SUCCESS;
3209
3210	if (!pBusLogic->fStrictRoundRobinMode)
3211	{
3212	/* Search for a filled mailbox - stop if we have scanned all mailboxes. */
3213	uint8_t uMailboxPosCur = pBusLogic->uMailboxOutgoingPositionCurrent;
3214
3215	do
3216	{
3217	/* Fetch mailbox from guest memory. */
3218	GCPhysAddrMailboxCurrent = buslogicR3ReadOutgoingMailbox(pBusLogic, &MailboxGuest);
3219
3220	/* Check the next mailbox. */
3221	buslogicR3OutgoingMailboxAdvance(pBusLogic);
3222	} while ( MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE
3223	&& uMailboxPosCur != pBusLogic->uMailboxOutgoingPositionCurrent);
3224	}
3225	else
3226	{
3227	/* Fetch mailbox from guest memory. */
3228	GCPhysAddrMailboxCurrent = buslogicR3ReadOutgoingMailbox(pBusLogic, &MailboxGuest);
3229	}
3230
3231	/*
3232	* Check if the mailbox is actually loaded.
3233	* It might be possible that the guest notified us without
3234	* a loaded mailbox. Do nothing in that case but leave a
3235	* log entry.
3236	*/
3237	if (MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE)
3238	{
3239	Log(("No loaded mailbox left\n"));
3240	return VERR_NO_DATA;
3241	}
3242
3243	LogFlow(("Got loaded mailbox at slot %u, CCB phys %RGp\n", pBusLogic->uMailboxOutgoingPositionCurrent, (RTGCPHYS)MailboxGuest.u32PhysAddrCCB));
3244	#ifdef LOG_ENABLED
3245	buslogicR3DumpMailboxInfo(&MailboxGuest, true);
3246	#endif
3247
3248	/* We got the mailbox, mark it as free in the guest. */
3249	uint8_t uActionCode = BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE;
3250	unsigned uCodeOffs = pBusLogic->fMbxIs24Bit ? RT_OFFSETOF(Mailbox24, uCmdState) : RT_OFFSETOF(Mailbox32, u.out.uActionCode);
3251	PDMDevHlpPCIPhysWrite(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxCurrent + uCodeOffs, &uActionCode, sizeof(uActionCode));
3252
3253	if (MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_START_COMMAND)
3254	rc = buslogicR3DeviceSCSIRequestSetup(pBusLogic, (RTGCPHYS)MailboxGuest.u32PhysAddrCCB);
3255	else if (MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_ABORT_COMMAND)
3256	{
3257	LogFlow(("Aborting mailbox\n"));
3258	rc = buslogicR3DeviceSCSIRequestAbort(pBusLogic, (RTGCPHYS)MailboxGuest.u32PhysAddrCCB);
3259	}
3260	else
3261	AssertMsgFailed(("Invalid outgoing mailbox action code %u\n", MailboxGuest.u.out.uActionCode));
3262
3263	AssertRC(rc);
3264
3265	/* Advance to the next mailbox. */
3266	if (pBusLogic->fStrictRoundRobinMode)
3267	buslogicR3OutgoingMailboxAdvance(pBusLogic);
3268
3269	return rc;
3270	}
3271
3272	/**
3273	* Transmit queue consumer
3274	* Queue a new async task.
3275	*
3276	* @returns Success indicator.
3277	* If false the item will not be removed and the flushing will stop.
3278	* @param pDevIns The device instance.
3279	* @param pItem The item to consume. Upon return this item will be freed.
3280	*/
3281	static DECLCALLBACK(bool) buslogicR3NotifyQueueConsumer(PPDMDEVINS pDevIns, PPDMQUEUEITEMCORE pItem)
3282	{
3283	RT_NOREF(pItem);
3284	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3285
3286	int rc = SUPSemEventSignal(pThis->pSupDrvSession, pThis->hEvtProcess);
3287	AssertRC(rc);
3288
3289	return true;
3290	}
3291
3292	/** @callback_method_impl{FNSSMDEVLIVEEXEC} */
3293	static DECLCALLBACK(int) buslogicR3LiveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uPass)
3294	{
3295	RT_NOREF(uPass);
3296	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3297
3298	/* Save the device config. */
3299	for (unsigned i = 0; i < RT_ELEMENTS(pThis->aDeviceStates); i++)
3300	SSMR3PutBool(pSSM, pThis->aDeviceStates[i].fPresent);
3301
3302	return VINF_SSM_DONT_CALL_AGAIN;
3303	}
3304
3305	/** @callback_method_impl{FNSSMDEVSAVEEXEC} */
3306	static DECLCALLBACK(int) buslogicR3SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
3307	{
3308	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3309	uint32_t cReqsSuspended = 0;
3310
3311	/* Every device first. */
3312	for (unsigned i = 0; i < RT_ELEMENTS(pBusLogic->aDeviceStates); i++)
3313	{
3314	PBUSLOGICDEVICE pDevice = &pBusLogic->aDeviceStates[i];
3315
3316	AssertMsg(!pDevice->cOutstandingRequests,
3317	("There are still outstanding requests on this device\n"));
3318	SSMR3PutBool(pSSM, pDevice->fPresent);
3319	SSMR3PutU32(pSSM, pDevice->cOutstandingRequests);
3320
3321	if (pDevice->fPresent)
3322	cReqsSuspended += pDevice->pDrvMediaEx->pfnIoReqGetSuspendedCount(pDevice->pDrvMediaEx);
3323	}
3324	/* Now the main device state. */
3325	SSMR3PutU8 (pSSM, pBusLogic->regStatus);
3326	SSMR3PutU8 (pSSM, pBusLogic->regInterrupt);
3327	SSMR3PutU8 (pSSM, pBusLogic->regGeometry);
3328	SSMR3PutMem (pSSM, &pBusLogic->LocalRam, sizeof(pBusLogic->LocalRam));
3329	SSMR3PutU8 (pSSM, pBusLogic->uOperationCode);
3330	SSMR3PutMem (pSSM, &pBusLogic->aCommandBuffer, sizeof(pBusLogic->aCommandBuffer));
3331	SSMR3PutU8 (pSSM, pBusLogic->iParameter);
3332	SSMR3PutU8 (pSSM, pBusLogic->cbCommandParametersLeft);
3333	SSMR3PutBool (pSSM, pBusLogic->fUseLocalRam);
3334	SSMR3PutMem (pSSM, pBusLogic->aReplyBuffer, sizeof(pBusLogic->aReplyBuffer));
3335	SSMR3PutU8 (pSSM, pBusLogic->iReply);
3336	SSMR3PutU8 (pSSM, pBusLogic->cbReplyParametersLeft);
3337	SSMR3PutBool (pSSM, pBusLogic->fIRQEnabled);
3338	SSMR3PutU8 (pSSM, pBusLogic->uISABaseCode);
3339	SSMR3PutU32 (pSSM, pBusLogic->cMailbox);
3340	SSMR3PutBool (pSSM, pBusLogic->fMbxIs24Bit);
3341	SSMR3PutGCPhys(pSSM, pBusLogic->GCPhysAddrMailboxOutgoingBase);
3342	SSMR3PutU32 (pSSM, pBusLogic->uMailboxOutgoingPositionCurrent);
3343	SSMR3PutU32 (pSSM, pBusLogic->cMailboxesReady);
3344	SSMR3PutBool (pSSM, pBusLogic->fNotificationSent);
3345	SSMR3PutGCPhys(pSSM, pBusLogic->GCPhysAddrMailboxIncomingBase);
3346	SSMR3PutU32 (pSSM, pBusLogic->uMailboxIncomingPositionCurrent);
3347	SSMR3PutBool (pSSM, pBusLogic->fStrictRoundRobinMode);
3348	SSMR3PutBool (pSSM, pBusLogic->fExtendedLunCCBFormat);
3349
3350	vboxscsiR3SaveExec(&pBusLogic->VBoxSCSI, pSSM);
3351
3352	SSMR3PutU32(pSSM, cReqsSuspended);
3353
3354	/* Save the physical CCB address of all suspended requests. */
3355	for (unsigned i = 0; i < RT_ELEMENTS(pBusLogic->aDeviceStates) && cReqsSuspended; i++)
3356	{
3357	PBUSLOGICDEVICE pDevice = &pBusLogic->aDeviceStates[i];
3358	if (pDevice->fPresent)
3359	{
3360	uint32_t cThisReqsSuspended = pDevice->pDrvMediaEx->pfnIoReqGetSuspendedCount(pDevice->pDrvMediaEx);
3361
3362	cReqsSuspended -= cThisReqsSuspended;
3363	if (cThisReqsSuspended)
3364	{
3365	PDMMEDIAEXIOREQ hIoReq;
3366	PBUSLOGICREQ pReq;
3367	int rc = pDevice->pDrvMediaEx->pfnIoReqQuerySuspendedStart(pDevice->pDrvMediaEx, &hIoReq,
3368	(void **)&pReq);
3369	AssertRCBreak(rc);
3370
3371	for (;;)
3372	{
3373	SSMR3PutU32(pSSM, (uint32_t)pReq->GCPhysAddrCCB);
3374
3375	cThisReqsSuspended--;
3376	if (!cThisReqsSuspended)
3377	break;
3378
3379	rc = pDevice->pDrvMediaEx->pfnIoReqQuerySuspendedNext(pDevice->pDrvMediaEx, hIoReq,
3380	&hIoReq, (void **)&pReq);
3381	AssertRCBreak(rc);
3382	}
3383	}
3384	}
3385	}
3386
3387	return SSMR3PutU32(pSSM, UINT32_MAX);
3388	}
3389
3390	/** @callback_method_impl{FNSSMDEVLOADDONE} */
3391	static DECLCALLBACK(int) buslogicR3LoadDone(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
3392	{
3393	RT_NOREF(pSSM);
3394	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3395
3396	buslogicR3RegisterISARange(pThis, pThis->uISABaseCode);
3397
3398	/* Kick of any requests we might need to redo. */
3399	if (pThis->VBoxSCSI.fBusy)
3400	{
3401
3402	/* The BIOS had a request active when we got suspended. Resume it. */
3403	int rc = buslogicR3PrepareBIOSSCSIRequest(pThis);
3404	AssertRC(rc);
3405	}
3406	else if (pThis->cReqsRedo)
3407	{
3408	for (unsigned i = 0; i < pThis->cReqsRedo; i++)
3409	{
3410	int rc = buslogicR3DeviceSCSIRequestSetup(pThis, pThis->paGCPhysAddrCCBRedo[i]);
3411	AssertRC(rc);
3412	}
3413
3414	RTMemFree(pThis->paGCPhysAddrCCBRedo);
3415	pThis->paGCPhysAddrCCBRedo = NULL;
3416	pThis->cReqsRedo = 0;
3417	}
3418
3419	return VINF_SUCCESS;
3420	}
3421
3422	/** @callback_method_impl{FNSSMDEVLOADEXEC} */
3423	static DECLCALLBACK(int) buslogicR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
3424	{
3425	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3426	int rc = VINF_SUCCESS;
3427
3428	/* We support saved states only from this and older versions. */
3429	if (uVersion > BUSLOGIC_SAVED_STATE_MINOR_VERSION)
3430	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
3431
3432	/* Every device first. */
3433	for (unsigned i = 0; i < RT_ELEMENTS(pBusLogic->aDeviceStates); i++)
3434	{
3435	PBUSLOGICDEVICE pDevice = &pBusLogic->aDeviceStates[i];
3436
3437	AssertMsg(!pDevice->cOutstandingRequests,
3438	("There are still outstanding requests on this device\n"));
3439	bool fPresent;
3440	rc = SSMR3GetBool(pSSM, &fPresent);
3441	AssertRCReturn(rc, rc);
3442	if (pDevice->fPresent != fPresent)
3443	return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Target %u config mismatch: config=%RTbool state=%RTbool"), i, pDevice->fPresent, fPresent);
3444
3445	if (uPass == SSM_PASS_FINAL)
3446	SSMR3GetU32(pSSM, (uint32_t *)&pDevice->cOutstandingRequests);
3447	}
3448
3449	if (uPass != SSM_PASS_FINAL)
3450	return VINF_SUCCESS;
3451
3452	/* Now the main device state. */
3453	SSMR3GetU8 (pSSM, (uint8_t *)&pBusLogic->regStatus);
3454	SSMR3GetU8 (pSSM, (uint8_t *)&pBusLogic->regInterrupt);
3455	SSMR3GetU8 (pSSM, (uint8_t *)&pBusLogic->regGeometry);
3456	SSMR3GetMem (pSSM, &pBusLogic->LocalRam, sizeof(pBusLogic->LocalRam));
3457	SSMR3GetU8 (pSSM, &pBusLogic->uOperationCode);
3458	if (uVersion > BUSLOGIC_SAVED_STATE_MINOR_PRE_CMDBUF_RESIZE)
3459	SSMR3GetMem (pSSM, &pBusLogic->aCommandBuffer, sizeof(pBusLogic->aCommandBuffer));
3460	else
3461	SSMR3GetMem (pSSM, &pBusLogic->aCommandBuffer, BUSLOGIC_COMMAND_SIZE_OLD);
3462	SSMR3GetU8 (pSSM, &pBusLogic->iParameter);
3463	SSMR3GetU8 (pSSM, &pBusLogic->cbCommandParametersLeft);
3464	SSMR3GetBool (pSSM, &pBusLogic->fUseLocalRam);
3465	SSMR3GetMem (pSSM, pBusLogic->aReplyBuffer, sizeof(pBusLogic->aReplyBuffer));
3466	SSMR3GetU8 (pSSM, &pBusLogic->iReply);
3467	SSMR3GetU8 (pSSM, &pBusLogic->cbReplyParametersLeft);
3468	SSMR3GetBool (pSSM, &pBusLogic->fIRQEnabled);
3469	SSMR3GetU8 (pSSM, &pBusLogic->uISABaseCode);
3470	SSMR3GetU32 (pSSM, &pBusLogic->cMailbox);
3471	if (uVersion > BUSLOGIC_SAVED_STATE_MINOR_PRE_24BIT_MBOX)
3472	SSMR3GetBool (pSSM, &pBusLogic->fMbxIs24Bit);
3473	SSMR3GetGCPhys(pSSM, &pBusLogic->GCPhysAddrMailboxOutgoingBase);
3474	SSMR3GetU32 (pSSM, &pBusLogic->uMailboxOutgoingPositionCurrent);
3475	SSMR3GetU32 (pSSM, (uint32_t *)&pBusLogic->cMailboxesReady);
3476	SSMR3GetBool (pSSM, (bool *)&pBusLogic->fNotificationSent);
3477	SSMR3GetGCPhys(pSSM, &pBusLogic->GCPhysAddrMailboxIncomingBase);
3478	SSMR3GetU32 (pSSM, &pBusLogic->uMailboxIncomingPositionCurrent);
3479	SSMR3GetBool (pSSM, &pBusLogic->fStrictRoundRobinMode);
3480	SSMR3GetBool (pSSM, &pBusLogic->fExtendedLunCCBFormat);
3481
3482	rc = vboxscsiR3LoadExec(&pBusLogic->VBoxSCSI, pSSM);
3483	if (RT_FAILURE(rc))
3484	{
3485	LogRel(("BusLogic: Failed to restore BIOS state: %Rrc.\n", rc));
3486	return PDMDEV_SET_ERROR(pDevIns, rc,
3487	N_("BusLogic: Failed to restore BIOS state\n"));
3488	}
3489
3490	if (uVersion > BUSLOGIC_SAVED_STATE_MINOR_PRE_ERROR_HANDLING)
3491	{
3492	/* Check if there are pending tasks saved. */
3493	uint32_t cTasks = 0;
3494
3495	SSMR3GetU32(pSSM, &cTasks);
3496
3497	if (cTasks)
3498	{
3499	pBusLogic->paGCPhysAddrCCBRedo = (PRTGCPHYS)RTMemAllocZ(cTasks * sizeof(RTGCPHYS));
3500	if (RT_LIKELY(pBusLogic->paGCPhysAddrCCBRedo))
3501	{
3502	pBusLogic->cReqsRedo = cTasks;
3503
3504	for (uint32_t i = 0; i < cTasks; i++)
3505	{
3506	uint32_t u32PhysAddrCCB;
3507
3508	rc = SSMR3GetU32(pSSM, &u32PhysAddrCCB);
3509	if (RT_FAILURE(rc))
3510	break;
3511
3512	pBusLogic->paGCPhysAddrCCBRedo[i] = u32PhysAddrCCB;
3513	}
3514	}
3515	else
3516	rc = VERR_NO_MEMORY;
3517	}
3518	}
3519
3520	if (RT_SUCCESS(rc))
3521	{
3522	uint32_t u32;
3523	rc = SSMR3GetU32(pSSM, &u32);
3524	if (RT_SUCCESS(rc))
3525	AssertMsgReturn(u32 == UINT32_MAX, ("%#x\n", u32), VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
3526	}
3527
3528	return rc;
3529	}
3530
3531	/**
3532	* Gets the pointer to the status LED of a device - called from the SCSI driver.
3533	*
3534	* @returns VBox status code.
3535	* @param pInterface Pointer to the interface structure containing the called function pointer.
3536	* @param iLUN The unit which status LED we desire. Always 0 here as the driver
3537	* doesn't know about other LUN's.
3538	* @param ppLed Where to store the LED pointer.
3539	*/
3540	static DECLCALLBACK(int) buslogicR3DeviceQueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed)
3541	{
3542	PBUSLOGICDEVICE pDevice = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, ILed);
3543	if (iLUN == 0)
3544	{
3545	*ppLed = &pDevice->Led;
3546	Assert((*ppLed)->u32Magic == PDMLED_MAGIC);
3547	return VINF_SUCCESS;
3548	}
3549	return VERR_PDM_LUN_NOT_FOUND;
3550	}
3551
3552	/**
3553	* @interface_method_impl{PDMIBASE,pfnQueryInterface}
3554	*/
3555	static DECLCALLBACK(void ) buslogicR3DeviceQueryInterface(PPDMIBASE pInterface, const char pszIID)
3556	{
3557	PBUSLOGICDEVICE pDevice = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, IBase);
3558	PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pDevice->IBase);
3559	PDMIBASE_RETURN_INTERFACE(pszIID, PDMIMEDIAPORT, &pDevice->IMediaPort);
3560	PDMIBASE_RETURN_INTERFACE(pszIID, PDMIMEDIAEXPORT, &pDevice->IMediaExPort);
3561	PDMIBASE_RETURN_INTERFACE(pszIID, PDMILEDPORTS, &pDevice->ILed);
3562	return NULL;
3563	}
3564
3565	/**
3566	* Gets the pointer to the status LED of a unit.
3567	*
3568	* @returns VBox status code.
3569	* @param pInterface Pointer to the interface structure containing the called function pointer.
3570	* @param iLUN The unit which status LED we desire.
3571	* @param ppLed Where to store the LED pointer.
3572	*/
3573	static DECLCALLBACK(int) buslogicR3StatusQueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed)
3574	{
3575	PBUSLOGIC pBusLogic = RT_FROM_MEMBER(pInterface, BUSLOGIC, ILeds);
3576	if (iLUN < BUSLOGIC_MAX_DEVICES)
3577	{
3578	*ppLed = &pBusLogic->aDeviceStates[iLUN].Led;
3579	Assert((*ppLed)->u32Magic == PDMLED_MAGIC);
3580	return VINF_SUCCESS;
3581	}
3582	return VERR_PDM_LUN_NOT_FOUND;
3583	}
3584
3585	/**
3586	* @interface_method_impl{PDMIBASE,pfnQueryInterface}
3587	*/
3588	static DECLCALLBACK(void ) buslogicR3StatusQueryInterface(PPDMIBASE pInterface, const char pszIID)
3589	{
3590	PBUSLOGIC pThis = RT_FROM_MEMBER(pInterface, BUSLOGIC, IBase);
3591	PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pThis->IBase);
3592	PDMIBASE_RETURN_INTERFACE(pszIID, PDMILEDPORTS, &pThis->ILeds);
3593	return NULL;
3594	}
3595
3596	/**
3597	* The worker thread processing requests from the guest.
3598	*
3599	* @returns VBox status code.
3600	* @param pDevIns The device instance.
3601	* @param pThread The thread structure.
3602	*/
3603	static DECLCALLBACK(int) buslogicR3Worker(PPDMDEVINS pDevIns, PPDMTHREAD pThread)
3604	{
3605	RT_NOREF(pDevIns);
3606	PBUSLOGIC pThis = (PBUSLOGIC)pThread->pvUser;
3607	int rc = VINF_SUCCESS;
3608
3609	if (pThread->enmState == PDMTHREADSTATE_INITIALIZING)
3610	return VINF_SUCCESS;
3611
3612	while (pThread->enmState == PDMTHREADSTATE_RUNNING)
3613	{
3614	ASMAtomicWriteBool(&pThis->fWrkThreadSleeping, true);
3615	bool fNotificationSent = ASMAtomicXchgBool(&pThis->fNotificationSent, false);
3616	if (!fNotificationSent)
3617	{
3618	Assert(ASMAtomicReadBool(&pThis->fWrkThreadSleeping));
3619	rc = SUPSemEventWaitNoResume(pThis->pSupDrvSession, pThis->hEvtProcess, RT_INDEFINITE_WAIT);
3620	AssertLogRelMsgReturn(RT_SUCCESS(rc) \|\| rc == VERR_INTERRUPTED, ("%Rrc\n", rc), rc);
3621	if (RT_UNLIKELY(pThread->enmState != PDMTHREADSTATE_RUNNING))
3622	break;
3623	LogFlowFunc(("Woken up with rc=%Rrc\n", rc));
3624	ASMAtomicWriteBool(&pThis->fNotificationSent, false);
3625	}
3626
3627	ASMAtomicWriteBool(&pThis->fWrkThreadSleeping, false);
3628
3629	/* Check whether there is a BIOS request pending and process it first. */
3630	if (ASMAtomicReadBool(&pThis->fBiosReqPending))
3631	{
3632	rc = buslogicR3PrepareBIOSSCSIRequest(pThis);
3633	AssertRC(rc);
3634	ASMAtomicXchgBool(&pThis->fBiosReqPending, false);
3635	}
3636	else
3637	{
3638	ASMAtomicXchgU32(&pThis->cMailboxesReady, 0); /** @todo Actually not required anymore but to stay compatible with older saved states. */
3639
3640	/* Process mailboxes. */
3641	do
3642	{
3643	rc = buslogicR3ProcessMailboxNext(pThis);
3644	AssertMsg(RT_SUCCESS(rc) \|\| rc == VERR_NO_DATA, ("Processing mailbox failed rc=%Rrc\n", rc));
3645	} while (RT_SUCCESS(rc));
3646	}
3647	} /* While running */
3648
3649	return VINF_SUCCESS;
3650	}
3651
3652
3653	/**
3654	* Unblock the worker thread so it can respond to a state change.
3655	*
3656	* @returns VBox status code.
3657	* @param pDevIns The device instance.
3658	* @param pThread The send thread.
3659	*/
3660	static DECLCALLBACK(int) buslogicR3WorkerWakeUp(PPDMDEVINS pDevIns, PPDMTHREAD pThread)
3661	{
3662	RT_NOREF(pThread);
3663	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3664	return SUPSemEventSignal(pThis->pSupDrvSession, pThis->hEvtProcess);
3665	}
3666
3667	/**
3668	* BusLogic debugger info callback.
3669	*
3670	* @param pDevIns The device instance.
3671	* @param pHlp The output helpers.
3672	* @param pszArgs The arguments.
3673	*/
3674	static DECLCALLBACK(void) buslogicR3Info(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs)
3675	{
3676	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3677	unsigned i;
3678	bool fVerbose = false;
3679
3680	/* Parse arguments. */
3681	if (pszArgs)
3682	fVerbose = strstr(pszArgs, "verbose") != NULL;
3683
3684	/* Show basic information. */
3685	pHlp->pfnPrintf(pHlp,
3686	"%s#%d: PCI I/O=%RTiop ISA I/O=%RTiop MMIO=%RGp IRQ=%u GC=%RTbool R0=%RTbool\n",
3687	pDevIns->pReg->szName,
3688	pDevIns->iInstance,
3689	pThis->IOPortBase, pThis->IOISABase, pThis->MMIOBase,
3690	PCIDevGetInterruptLine(&pThis->dev),
3691	!!pThis->fGCEnabled, !!pThis->fR0Enabled);
3692
3693	/* Print mailbox state. */
3694	if (pThis->regStatus & BL_STAT_INREQ)
3695	pHlp->pfnPrintf(pHlp, "Mailbox not initialized\n");
3696	else
3697	pHlp->pfnPrintf(pHlp, "%u-bit mailbox with %u entries at %RGp (%d LUN CCBs)\n",
3698	pThis->fMbxIs24Bit ? 24 : 32, pThis->cMailbox,
3699	pThis->GCPhysAddrMailboxOutgoingBase,
3700	pThis->fMbxIs24Bit ? 8 : pThis->fExtendedLunCCBFormat ? 64 : 8);
3701
3702	/* Print register contents. */
3703	pHlp->pfnPrintf(pHlp, "Registers: STAT=%02x INTR=%02x GEOM=%02x\n",
3704	pThis->regStatus, pThis->regInterrupt, pThis->regGeometry);
3705
3706	/* Print miscellaneous state. */
3707	pHlp->pfnPrintf(pHlp, "HAC interrupts: %s\n",
3708	pThis->fIRQEnabled ? "on" : "off");
3709
3710	/* Print the current command, if any. */
3711	if (pThis->uOperationCode != 0xff )
3712	pHlp->pfnPrintf(pHlp, "Current command: %02X\n", pThis->uOperationCode);
3713
3714	if (fVerbose && (pThis->regStatus & BL_STAT_INREQ) == 0)
3715	{
3716	RTGCPHYS GCMailbox;
3717
3718	/* Dump the mailbox contents. */
3719	if (pThis->fMbxIs24Bit)
3720	{
3721	Mailbox24 Mbx24;
3722
3723	/* Outgoing mailbox, 24-bit format. */
3724	GCMailbox = pThis->GCPhysAddrMailboxOutgoingBase;
3725	pHlp->pfnPrintf(pHlp, " Outgoing mailbox entries (24-bit) at %06X:\n", GCMailbox);
3726	for (i = 0; i < pThis->cMailbox; ++i)
3727	{
3728	PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), GCMailbox, &Mbx24, sizeof(Mailbox24));
3729	pHlp->pfnPrintf(pHlp, " slot %03d: CCB at %06X action code %02X", i, ADDR_TO_U32(Mbx24.aPhysAddrCCB), Mbx24.uCmdState);
3730	pHlp->pfnPrintf(pHlp, "%s\n", pThis->uMailboxOutgoingPositionCurrent == i ? " *" : "");
3731	GCMailbox += sizeof(Mailbox24);
3732	}
3733
3734	/* Incoming mailbox, 24-bit format. */
3735	GCMailbox = pThis->GCPhysAddrMailboxOutgoingBase + (pThis->cMailbox * sizeof(Mailbox24));
3736	pHlp->pfnPrintf(pHlp, " Incoming mailbox entries (24-bit) at %06X:\n", GCMailbox);
3737	for (i = 0; i < pThis->cMailbox; ++i)
3738	{
3739	PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), GCMailbox, &Mbx24, sizeof(Mailbox24));
3740	pHlp->pfnPrintf(pHlp, " slot %03d: CCB at %06X completion code %02X", i, ADDR_TO_U32(Mbx24.aPhysAddrCCB), Mbx24.uCmdState);
3741	pHlp->pfnPrintf(pHlp, "%s\n", pThis->uMailboxIncomingPositionCurrent == i ? " *" : "");
3742	GCMailbox += sizeof(Mailbox24);
3743	}
3744
3745	}
3746	else
3747	{
3748	Mailbox32 Mbx32;
3749
3750	/* Outgoing mailbox, 32-bit format. */
3751	GCMailbox = pThis->GCPhysAddrMailboxOutgoingBase;
3752	pHlp->pfnPrintf(pHlp, " Outgoing mailbox entries (32-bit) at %08X:\n", (uint32_t)GCMailbox);
3753	for (i = 0; i < pThis->cMailbox; ++i)
3754	{
3755	PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), GCMailbox, &Mbx32, sizeof(Mailbox32));
3756	pHlp->pfnPrintf(pHlp, " slot %03d: CCB at %08X action code %02X", i, Mbx32.u32PhysAddrCCB, Mbx32.u.out.uActionCode);
3757	pHlp->pfnPrintf(pHlp, "%s\n", pThis->uMailboxOutgoingPositionCurrent == i ? " *" : "");
3758	GCMailbox += sizeof(Mailbox32);
3759	}
3760
3761	/* Incoming mailbox, 32-bit format. */
3762	GCMailbox = pThis->GCPhysAddrMailboxOutgoingBase + (pThis->cMailbox * sizeof(Mailbox32));
3763	pHlp->pfnPrintf(pHlp, " Outgoing mailbox entries (32-bit) at %08X:\n", (uint32_t)GCMailbox);
3764	for (i = 0; i < pThis->cMailbox; ++i)
3765	{
3766	PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), GCMailbox, &Mbx32, sizeof(Mailbox32));
3767	pHlp->pfnPrintf(pHlp, " slot %03d: CCB at %08X completion code %02X BTSTAT %02X SDSTAT %02X", i,
3768	Mbx32.u32PhysAddrCCB, Mbx32.u.in.uCompletionCode, Mbx32.u.in.uHostAdapterStatus, Mbx32.u.in.uTargetDeviceStatus);
3769	pHlp->pfnPrintf(pHlp, "%s\n", pThis->uMailboxOutgoingPositionCurrent == i ? " *" : "");
3770	GCMailbox += sizeof(Mailbox32);
3771	}
3772
3773	}
3774	}
3775	}
3776
3777	/* -=-=-=-=- Helper -=-=-=-=- */
3778
3779	/**
3780	* Checks if all asynchronous I/O is finished.
3781	*
3782	* Used by buslogicR3Reset, buslogicR3Suspend and buslogicR3PowerOff.
3783	*
3784	* @returns true if quiesced, false if busy.
3785	* @param pDevIns The device instance.
3786	*/
3787	static bool buslogicR3AllAsyncIOIsFinished(PPDMDEVINS pDevIns)
3788	{
3789	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3790
3791	for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aDeviceStates); i++)
3792	{
3793	PBUSLOGICDEVICE pThisDevice = &pThis->aDeviceStates[i];
3794	if (pThisDevice->pDrvBase)
3795	{
3796	if (pThisDevice->cOutstandingRequests != 0)
3797	return false;
3798	}
3799	}
3800
3801	return true;
3802	}
3803
3804	/**
3805	* Callback employed by buslogicR3Suspend and buslogicR3PowerOff.
3806	*
3807	* @returns true if we've quiesced, false if we're still working.
3808	* @param pDevIns The device instance.
3809	*/
3810	static DECLCALLBACK(bool) buslogicR3IsAsyncSuspendOrPowerOffDone(PPDMDEVINS pDevIns)
3811	{
3812	if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
3813	return false;
3814
3815	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3816	ASMAtomicWriteBool(&pThis->fSignalIdle, false);
3817	return true;
3818	}
3819
3820	/**
3821	* Common worker for buslogicR3Suspend and buslogicR3PowerOff.
3822	*/
3823	static void buslogicR3SuspendOrPowerOff(PPDMDEVINS pDevIns)
3824	{
3825	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3826
3827	ASMAtomicWriteBool(&pThis->fSignalIdle, true);
3828	if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
3829	PDMDevHlpSetAsyncNotification(pDevIns, buslogicR3IsAsyncSuspendOrPowerOffDone);
3830	else
3831	{
3832	ASMAtomicWriteBool(&pThis->fSignalIdle, false);
3833	AssertMsg(!pThis->fNotificationSent, ("The PDM Queue should be empty at this point\n"));
3834	}
3835	}
3836
3837	/**
3838	* Suspend notification.
3839	*
3840	* @param pDevIns The device instance data.
3841	*/
3842	static DECLCALLBACK(void) buslogicR3Suspend(PPDMDEVINS pDevIns)
3843	{
3844	Log(("buslogicR3Suspend\n"));
3845	buslogicR3SuspendOrPowerOff(pDevIns);
3846	}
3847
3848	/**
3849	* Detach notification.
3850	*
3851	* One harddisk at one port has been unplugged.
3852	* The VM is suspended at this point.
3853	*
3854	* @param pDevIns The device instance.
3855	* @param iLUN The logical unit which is being detached.
3856	* @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
3857	*/
3858	static DECLCALLBACK(void) buslogicR3Detach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
3859	{
3860	RT_NOREF(fFlags);
3861	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3862	PBUSLOGICDEVICE pDevice = &pThis->aDeviceStates[iLUN];
3863
3864	Log(("%s:\n", __FUNCTION__));
3865
3866	AssertMsg(fFlags & PDM_TACH_FLAGS_NOT_HOT_PLUG,
3867	("BusLogic: Device does not support hotplugging\n"));
3868
3869	/*
3870	* Zero some important members.
3871	*/
3872	pDevice->fPresent = false;
3873	pDevice->pDrvBase = NULL;
3874	pDevice->pDrvMedia = NULL;
3875	pDevice->pDrvMediaEx = NULL;
3876	}
3877
3878	/**
3879	* Attach command.
3880	*
3881	* This is called when we change block driver.
3882	*
3883	* @returns VBox status code.
3884	* @param pDevIns The device instance.
3885	* @param iLUN The logical unit which is being detached.
3886	* @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
3887	*/
3888	static DECLCALLBACK(int) buslogicR3Attach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
3889	{
3890	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3891	PBUSLOGICDEVICE pDevice = &pThis->aDeviceStates[iLUN];
3892	int rc;
3893
3894	AssertMsgReturn(fFlags & PDM_TACH_FLAGS_NOT_HOT_PLUG,
3895	("BusLogic: Device does not support hotplugging\n"),
3896	VERR_INVALID_PARAMETER);
3897
3898	/* the usual paranoia */
3899	AssertRelease(!pDevice->pDrvBase);
3900	AssertRelease(!pDevice->pDrvMedia);
3901	AssertRelease(!pDevice->pDrvMediaEx);
3902	Assert(pDevice->iLUN == iLUN);
3903
3904	/*
3905	* Try attach the SCSI driver and get the interfaces,
3906	* required as well as optional.
3907	*/
3908	rc = PDMDevHlpDriverAttach(pDevIns, pDevice->iLUN, &pDevice->IBase, &pDevice->pDrvBase, NULL);
3909	if (RT_SUCCESS(rc))
3910	{
3911	/* Query the media interface. */
3912	pDevice->pDrvMedia = PDMIBASE_QUERY_INTERFACE(pDevice->pDrvBase, PDMIMEDIA);
3913	AssertMsgReturn(VALID_PTR(pDevice->pDrvMedia),
3914	("BusLogic configuration error: LUN#%d misses the basic media interface!\n", pDevice->iLUN),
3915	VERR_PDM_MISSING_INTERFACE);
3916
3917	/* Get the extended media interface. */
3918	pDevice->pDrvMediaEx = PDMIBASE_QUERY_INTERFACE(pDevice->pDrvBase, PDMIMEDIAEX);
3919	AssertMsgReturn(VALID_PTR(pDevice->pDrvMediaEx),
3920	("BusLogic configuration error: LUN#%d misses the extended media interface!\n", pDevice->iLUN),
3921	VERR_PDM_MISSING_INTERFACE);
3922
3923	rc = pDevice->pDrvMediaEx->pfnIoReqAllocSizeSet(pDevice->pDrvMediaEx, sizeof(BUSLOGICREQ));
3924	AssertMsgRCReturn(rc, ("BusLogic configuration error: LUN#%u: Failed to set I/O request size!", pDevice->iLUN),
3925	rc);
3926
3927	pDevice->fPresent = true;
3928	}
3929	else
3930	AssertMsgFailed(("Failed to attach LUN#%d. rc=%Rrc\n", pDevice->iLUN, rc));
3931
3932	if (RT_FAILURE(rc))
3933	{
3934	pDevice->fPresent = false;
3935	pDevice->pDrvBase = NULL;
3936	pDevice->pDrvMedia = NULL;
3937	pDevice->pDrvMediaEx = NULL;
3938	}
3939	return rc;
3940	}
3941
3942	/**
3943	* Callback employed by buslogicR3Reset.
3944	*
3945	* @returns true if we've quiesced, false if we're still working.
3946	* @param pDevIns The device instance.
3947	*/
3948	static DECLCALLBACK(bool) buslogicR3IsAsyncResetDone(PPDMDEVINS pDevIns)
3949	{
3950	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3951
3952	if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
3953	return false;
3954	ASMAtomicWriteBool(&pThis->fSignalIdle, false);
3955
3956	buslogicR3HwReset(pThis, true);
3957	return true;
3958	}
3959
3960	/**
3961	* @copydoc FNPDMDEVRESET
3962	*/
3963	static DECLCALLBACK(void) buslogicR3Reset(PPDMDEVINS pDevIns)
3964	{
3965	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3966
3967	ASMAtomicWriteBool(&pThis->fSignalIdle, true);
3968	if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
3969	PDMDevHlpSetAsyncNotification(pDevIns, buslogicR3IsAsyncResetDone);
3970	else
3971	{
3972	ASMAtomicWriteBool(&pThis->fSignalIdle, false);
3973	buslogicR3HwReset(pThis, true);
3974	}
3975	}
3976
3977	static DECLCALLBACK(void) buslogicR3Relocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta)
3978	{
3979	RT_NOREF(offDelta);
3980	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3981
3982	pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
3983	pThis->pNotifierQueueRC = PDMQueueRCPtr(pThis->pNotifierQueueR3);
3984
3985	for (uint32_t i = 0; i < BUSLOGIC_MAX_DEVICES; i++)
3986	{
3987	PBUSLOGICDEVICE pDevice = &pThis->aDeviceStates[i];
3988
3989	pDevice->pBusLogicRC = PDMINS_2_DATA_RCPTR(pDevIns);
3990	}
3991
3992	}
3993
3994	/**
3995	* Poweroff notification.
3996	*
3997	* @param pDevIns Pointer to the device instance
3998	*/
3999	static DECLCALLBACK(void) buslogicR3PowerOff(PPDMDEVINS pDevIns)
4000	{
4001	Log(("buslogicR3PowerOff\n"));
4002	buslogicR3SuspendOrPowerOff(pDevIns);
4003	}
4004
4005	/**
4006	* Destroy a driver instance.
4007	*
4008	* Most VM resources are freed by the VM. This callback is provided so that any non-VM
4009	* resources can be freed correctly.
4010	*
4011	* @param pDevIns The device instance data.
4012	*/
4013	static DECLCALLBACK(int) buslogicR3Destruct(PPDMDEVINS pDevIns)
4014	{
4015	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
4016	PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns);
4017
4018	PDMR3CritSectDelete(&pThis->CritSectIntr);
4019
4020	if (pThis->hEvtProcess != NIL_SUPSEMEVENT)
4021	{
4022	SUPSemEventClose(pThis->pSupDrvSession, pThis->hEvtProcess);
4023	pThis->hEvtProcess = NIL_SUPSEMEVENT;
4024	}
4025
4026	return VINF_SUCCESS;
4027	}
4028
4029	/**
4030	* @interface_method_impl{PDMDEVREG,pfnConstruct}
4031	*/
4032	static DECLCALLBACK(int) buslogicR3Construct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
4033	{
4034	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
4035	int rc = VINF_SUCCESS;
4036	bool fBootable = true;
4037	char achISACompat[16];
4038	PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
4039
4040	/*
4041	* Init instance data (do early because of constructor).
4042	*/
4043	pThis->pDevInsR3 = pDevIns;
4044	pThis->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
4045	pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
4046	pThis->IBase.pfnQueryInterface = buslogicR3StatusQueryInterface;
4047	pThis->ILeds.pfnQueryStatusLed = buslogicR3StatusQueryStatusLed;
4048
4049	PCIDevSetVendorId (&pThis->dev, 0x104b); /* BusLogic */
4050	PCIDevSetDeviceId (&pThis->dev, 0x1040); /* BT-958 */
4051	PCIDevSetCommand (&pThis->dev, PCI_COMMAND_IOACCESS \| PCI_COMMAND_MEMACCESS);
4052	PCIDevSetRevisionId (&pThis->dev, 0x01);
4053	PCIDevSetClassProg (&pThis->dev, 0x00); /* SCSI */
4054	PCIDevSetClassSub (&pThis->dev, 0x00); /* SCSI */
4055	PCIDevSetClassBase (&pThis->dev, 0x01); /* Mass storage */
4056	PCIDevSetBaseAddress (&pThis->dev, 0, true /IO/, false /Pref/, false /64-bit/, 0x00000000);
4057	PCIDevSetBaseAddress (&pThis->dev, 1, false /IO/, false /Pref/, false /64-bit/, 0x00000000);
4058	PCIDevSetSubSystemVendorId(&pThis->dev, 0x104b);
4059	PCIDevSetSubSystemId (&pThis->dev, 0x1040);
4060	PCIDevSetInterruptLine (&pThis->dev, 0x00);
4061	PCIDevSetInterruptPin (&pThis->dev, 0x01);
4062
4063	/*
4064	* Validate and read configuration.
4065	*/
4066	if (!CFGMR3AreValuesValid(pCfg,
4067	"GCEnabled\0"
4068	"R0Enabled\0"
4069	"Bootable\0"
4070	"ISACompat\0"))
4071	return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
4072	N_("BusLogic configuration error: unknown option specified"));
4073
4074	rc = CFGMR3QueryBoolDef(pCfg, "GCEnabled", &pThis->fGCEnabled, true);
4075	if (RT_FAILURE(rc))
4076	return PDMDEV_SET_ERROR(pDevIns, rc,
4077	N_("BusLogic configuration error: failed to read GCEnabled as boolean"));
4078	Log(("%s: fGCEnabled=%d\n", __FUNCTION__, pThis->fGCEnabled));
4079
4080	rc = CFGMR3QueryBoolDef(pCfg, "R0Enabled", &pThis->fR0Enabled, true);
4081	if (RT_FAILURE(rc))
4082	return PDMDEV_SET_ERROR(pDevIns, rc,
4083	N_("BusLogic configuration error: failed to read R0Enabled as boolean"));
4084	Log(("%s: fR0Enabled=%d\n", __FUNCTION__, pThis->fR0Enabled));
4085	rc = CFGMR3QueryBoolDef(pCfg, "Bootable", &fBootable, true);
4086	if (RT_FAILURE(rc))
4087	return PDMDEV_SET_ERROR(pDevIns, rc,
4088	N_("BusLogic configuration error: failed to read Bootable as boolean"));
4089	Log(("%s: fBootable=%RTbool\n", __FUNCTION__, fBootable));
4090
4091	/* Only the first instance defaults to having the ISA compatibility ports enabled. */
4092	if (iInstance == 0)
4093	rc = CFGMR3QueryStringDef(pCfg, "ISACompat", achISACompat, sizeof(achISACompat), "Alternate");
4094	else
4095	rc = CFGMR3QueryStringDef(pCfg, "ISACompat", achISACompat, sizeof(achISACompat), "Disabled");
4096	if (RT_FAILURE(rc))
4097	return PDMDEV_SET_ERROR(pDevIns, rc,
4098	N_("BusLogic configuration error: failed to read ISACompat as string"));
4099	Log(("%s: ISACompat=%s\n", __FUNCTION__, achISACompat));
4100
4101	/* Grok the ISACompat setting. */
4102	if (!strcmp(achISACompat, "Disabled"))
4103	pThis->uDefaultISABaseCode = ISA_BASE_DISABLED;
4104	else if (!strcmp(achISACompat, "Primary"))
4105	pThis->uDefaultISABaseCode = 0; /* I/O base at 330h. */
4106	else if (!strcmp(achISACompat, "Alternate"))
4107	pThis->uDefaultISABaseCode = 1; /* I/O base at 334h. */
4108	else
4109	return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
4110	N_("BusLogic configuration error: invalid ISACompat setting"));
4111
4112	/*
4113	* Register the PCI device and its I/O regions.
4114	*/
4115	rc = PDMDevHlpPCIRegister(pDevIns, &pThis->dev);
4116	if (RT_FAILURE(rc))
4117	return rc;
4118
4119	rc = PDMDevHlpPCIIORegionRegister(pDevIns, 0, 32, PCI_ADDRESS_SPACE_IO, buslogicR3MmioMap);
4120	if (RT_FAILURE(rc))
4121	return rc;
4122
4123	rc = PDMDevHlpPCIIORegionRegister(pDevIns, 1, 32, PCI_ADDRESS_SPACE_MEM, buslogicR3MmioMap);
4124	if (RT_FAILURE(rc))
4125	return rc;
4126
4127	if (fBootable)
4128	{
4129	/* Register I/O port space for BIOS access. */
4130	rc = PDMDevHlpIOPortRegister(pDevIns, BUSLOGIC_BIOS_IO_PORT, 4, NULL,
4131	buslogicR3BiosIoPortWrite, buslogicR3BiosIoPortRead,
4132	buslogicR3BiosIoPortWriteStr, buslogicR3BiosIoPortReadStr,
4133	"BusLogic BIOS");
4134	if (RT_FAILURE(rc))
4135	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot register BIOS I/O handlers"));
4136	}
4137
4138	/* Set up the compatibility I/O range. */
4139	rc = buslogicR3RegisterISARange(pThis, pThis->uDefaultISABaseCode);
4140	if (RT_FAILURE(rc))
4141	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot register ISA I/O handlers"));
4142
4143	/* Initialize task queue. */
4144	rc = PDMDevHlpQueueCreate(pDevIns, sizeof(PDMQUEUEITEMCORE), 5, 0,
4145	buslogicR3NotifyQueueConsumer, true, "BusLogicTask", &pThis->pNotifierQueueR3);
4146	if (RT_FAILURE(rc))
4147	return rc;
4148	pThis->pNotifierQueueR0 = PDMQueueR0Ptr(pThis->pNotifierQueueR3);
4149	pThis->pNotifierQueueRC = PDMQueueRCPtr(pThis->pNotifierQueueR3);
4150
4151	rc = PDMDevHlpCritSectInit(pDevIns, &pThis->CritSectIntr, RT_SRC_POS, "BusLogic-Intr#%u", pDevIns->iInstance);
4152	if (RT_FAILURE(rc))
4153	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic: cannot create critical section"));
4154
4155	/*
4156	* Create event semaphore and worker thread.
4157	*/
4158	rc = SUPSemEventCreate(pThis->pSupDrvSession, &pThis->hEvtProcess);
4159	if (RT_FAILURE(rc))
4160	return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
4161	N_("BusLogic: Failed to create SUP event semaphore"));
4162
4163	char szDevTag[20];
4164	RTStrPrintf(szDevTag, sizeof(szDevTag), "BUSLOGIC-%u", iInstance);
4165
4166	rc = PDMDevHlpThreadCreate(pDevIns, &pThis->pThreadWrk, pThis, buslogicR3Worker,
4167	buslogicR3WorkerWakeUp, 0, RTTHREADTYPE_IO, szDevTag);
4168	if (RT_FAILURE(rc))
4169	return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
4170	N_("BusLogic: Failed to create worker thread %s"), szDevTag);
4171
4172	/* Initialize per device state. */
4173	for (unsigned i = 0; i < RT_ELEMENTS(pThis->aDeviceStates); i++)
4174	{
4175	char szName[24];
4176	PBUSLOGICDEVICE pDevice = &pThis->aDeviceStates[i];
4177
4178	char *pszName;
4179	if (RTStrAPrintf(&pszName, "Device%u", i) < 0)
4180	AssertLogRelFailedReturn(VERR_NO_MEMORY);
4181
4182	/* Initialize static parts of the device. */
4183	pDevice->iLUN = i;
4184	pDevice->pBusLogicR3 = pThis;
4185	pDevice->pBusLogicR0 = PDMINS_2_DATA_R0PTR(pDevIns);
4186	pDevice->pBusLogicRC = PDMINS_2_DATA_RCPTR(pDevIns);
4187	pDevice->Led.u32Magic = PDMLED_MAGIC;
4188	pDevice->IBase.pfnQueryInterface = buslogicR3DeviceQueryInterface;
4189	pDevice->IMediaPort.pfnQueryDeviceLocation = buslogicR3QueryDeviceLocation;
4190	pDevice->IMediaExPort.pfnIoReqCompleteNotify = buslogicR3IoReqCompleteNotify;
4191	pDevice->IMediaExPort.pfnIoReqCopyFromBuf = buslogicR3IoReqCopyFromBuf;
4192	pDevice->IMediaExPort.pfnIoReqCopyToBuf = buslogicR3IoReqCopyToBuf;
4193	pDevice->IMediaExPort.pfnIoReqQueryBuf = NULL;
4194	pDevice->IMediaExPort.pfnIoReqQueryDiscardRanges = NULL;
4195	pDevice->IMediaExPort.pfnIoReqStateChanged = buslogicR3IoReqStateChanged;
4196	pDevice->IMediaExPort.pfnMediumEjected = buslogicR3MediumEjected;
4197	pDevice->ILed.pfnQueryStatusLed = buslogicR3DeviceQueryStatusLed;
4198
4199	/* Attach SCSI driver. */
4200	rc = PDMDevHlpDriverAttach(pDevIns, pDevice->iLUN, &pDevice->IBase, &pDevice->pDrvBase, pszName);
4201	if (RT_SUCCESS(rc))
4202	{
4203	/* Query the media interface. */
4204	pDevice->pDrvMedia = PDMIBASE_QUERY_INTERFACE(pDevice->pDrvBase, PDMIMEDIA);
4205	AssertMsgReturn(VALID_PTR(pDevice->pDrvMedia),
4206	("Buslogic configuration error: LUN#%d misses the basic media interface!\n", pDevice->iLUN),
4207	VERR_PDM_MISSING_INTERFACE);
4208
4209	/* Get the extended media interface. */
4210	pDevice->pDrvMediaEx = PDMIBASE_QUERY_INTERFACE(pDevice->pDrvBase, PDMIMEDIAEX);
4211	AssertMsgReturn(VALID_PTR(pDevice->pDrvMediaEx),
4212	("Buslogic configuration error: LUN#%d misses the extended media interface!\n", pDevice->iLUN),
4213	VERR_PDM_MISSING_INTERFACE);
4214
4215	rc = pDevice->pDrvMediaEx->pfnIoReqAllocSizeSet(pDevice->pDrvMediaEx, sizeof(BUSLOGICREQ));
4216	if (RT_FAILURE(rc))
4217	return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
4218	N_("Buslogic configuration error: LUN#%u: Failed to set I/O request size!"),
4219	pDevice->iLUN);
4220
4221	pDevice->fPresent = true;
4222	}
4223	else if (rc == VERR_PDM_NO_ATTACHED_DRIVER)
4224	{
4225	pDevice->fPresent = false;
4226	pDevice->pDrvBase = NULL;
4227	pDevice->pDrvMedia = NULL;
4228	pDevice->pDrvMediaEx = NULL;
4229	rc = VINF_SUCCESS;
4230	Log(("BusLogic: no driver attached to device %s\n", szName));
4231	}
4232	else
4233	{
4234	AssertLogRelMsgFailed(("BusLogic: Failed to attach %s\n", szName));
4235	return rc;
4236	}
4237	}
4238
4239	/*
4240	* Attach status driver (optional).
4241	*/
4242	PPDMIBASE pBase;
4243	rc = PDMDevHlpDriverAttach(pDevIns, PDM_STATUS_LUN, &pThis->IBase, &pBase, "Status Port");
4244	if (RT_SUCCESS(rc))
4245	{
4246	pThis->pLedsConnector = PDMIBASE_QUERY_INTERFACE(pBase, PDMILEDCONNECTORS);
4247	pThis->pMediaNotify = PDMIBASE_QUERY_INTERFACE(pBase, PDMIMEDIANOTIFY);
4248	}
4249	else if (rc != VERR_PDM_NO_ATTACHED_DRIVER)
4250	{
4251	AssertMsgFailed(("Failed to attach to status driver. rc=%Rrc\n", rc));
4252	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot attach to status driver"));
4253	}
4254
4255	rc = PDMDevHlpSSMRegisterEx(pDevIns, BUSLOGIC_SAVED_STATE_MINOR_VERSION, sizeof(*pThis), NULL,
4256	NULL, buslogicR3LiveExec, NULL,
4257	NULL, buslogicR3SaveExec, NULL,
4258	NULL, buslogicR3LoadExec, buslogicR3LoadDone);
4259	if (RT_FAILURE(rc))
4260	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot register save state handlers"));
4261
4262	/*
4263	* Register the debugger info callback.
4264	*/
4265	char szTmp[128];
4266	RTStrPrintf(szTmp, sizeof(szTmp), "%s%d", pDevIns->pReg->szName, pDevIns->iInstance);
4267	PDMDevHlpDBGFInfoRegister(pDevIns, szTmp, "BusLogic HBA info", buslogicR3Info);
4268
4269	rc = buslogicR3HwReset(pThis, true);
4270	AssertMsgRC(rc, ("hardware reset of BusLogic host adapter failed rc=%Rrc\n", rc));
4271
4272	return rc;
4273	}
4274
4275	/**
4276	* The device registration structure.
4277	*/
4278	const PDMDEVREG g_DeviceBusLogic =
4279	{
4280	/* u32Version */
4281	PDM_DEVREG_VERSION,
4282	/* szName */
4283	"buslogic",
4284	/* szRCMod */
4285	"VBoxDDRC.rc",
4286	/* szR0Mod */
4287	"VBoxDDR0.r0",
4288	/* pszDescription */
4289	"BusLogic BT-958 SCSI host adapter.\n",
4290	/* fFlags */
4291	PDM_DEVREG_FLAGS_DEFAULT_BITS \| PDM_DEVREG_FLAGS_RC \| PDM_DEVREG_FLAGS_R0 \|
4292	PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION \| PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION \|
4293	PDM_DEVREG_FLAGS_FIRST_RESET_NOTIFICATION,
4294	/* fClass */
4295	PDM_DEVREG_CLASS_STORAGE,
4296	/* cMaxInstances */
4297	~0U,
4298	/* cbInstance */
4299	sizeof(BUSLOGIC),
4300	/* pfnConstruct */
4301	buslogicR3Construct,
4302	/* pfnDestruct */
4303	buslogicR3Destruct,
4304	/* pfnRelocate */
4305	buslogicR3Relocate,
4306	/* pfnMemSetup */
4307	NULL,
4308	/* pfnPowerOn */
4309	NULL,
4310	/* pfnReset */
4311	buslogicR3Reset,
4312	/* pfnSuspend */
4313	buslogicR3Suspend,
4314	/* pfnResume */
4315	NULL,
4316	/* pfnAttach */
4317	buslogicR3Attach,
4318	/* pfnDetach */
4319	buslogicR3Detach,
4320	/* pfnQueryInterface. */
4321	NULL,
4322	/* pfnInitComplete */
4323	NULL,
4324	/* pfnPowerOff */
4325	buslogicR3PowerOff,
4326	/* pfnSoftReset */
4327	NULL,
4328	/* u32VersionEnd */
4329	PDM_DEVREG_VERSION
4330	};
4331
4332	#endif /* IN_RING3 */
4333	#endif /* !VBOX_DEVICE_STRUCT_TESTCASE */

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source: vbox/trunk/src/VBox/Devices/Storage/DevBusLogic.cpp@ 67903

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