DevBusLogic.cpp@ 76128

Last change on this file since 76128 was 76128, checked in by vboxsync, 6 years ago
Buslogic: add an RT_FALL_THRU() needed by the last non-trivial change.
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1	/* $Id: DevBusLogic.cpp 76128 2018-12-10 14:18:30Z vboxsync $ */
2	/** @file
3	* VBox storage devices - BusLogic SCSI host adapter BT-958.
4	*
5	* Based on the Multi-Master Ultra SCSI Systems Technical Reference Manual.
6	*/
7
8	/*
9	* Copyright (C) 2006-2017 Oracle Corporation
10	*
11	* This file is part of VirtualBox Open Source Edition (OSE), as
12	* available from http://www.virtualbox.org. This file is free software;
13	* you can redistribute it and/or modify it under the terms of the GNU
14	* General Public License (GPL) as published by the Free Software
15	* Foundation, in version 2 as it comes in the "COPYING" file of the
16	* VirtualBox OSE distribution. VirtualBox OSE is distributed in the
17	* hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
18	*/
19
20
21	/*********************************************************************************************************************************
22	* Header Files *
23	*********************************************************************************************************************************/
24	#define LOG_GROUP LOG_GROUP_DEV_BUSLOGIC
25	#include <VBox/vmm/pdmdev.h>
26	#include <VBox/vmm/pdmstorageifs.h>
27	#include <VBox/vmm/pdmcritsect.h>
28	#include <VBox/scsi.h>
29	#include <iprt/asm.h>
30	#include <iprt/assert.h>
31	#include <iprt/string.h>
32	#include <iprt/log.h>
33	#ifdef IN_RING3
34	# include <iprt/alloc.h>
35	# include <iprt/memcache.h>
36	# include <iprt/param.h>
37	# include <iprt/uuid.h>
38	#endif
39
40	#include "VBoxSCSI.h"
41	#include "VBoxDD.h"
42
43
44	/*********************************************************************************************************************************
45	* Defined Constants And Macros *
46	*********************************************************************************************************************************/
47	/** Maximum number of attached devices the adapter can handle. */
48	#define BUSLOGIC_MAX_DEVICES 16
49
50	/** Maximum number of scatter gather elements this device can handle. */
51	#define BUSLOGIC_MAX_SCATTER_GATHER_LIST_SIZE 128
52
53	/** Size of the command buffer. */
54	#define BUSLOGIC_COMMAND_SIZE_MAX 53
55
56	/** Size of the reply buffer. */
57	#define BUSLOGIC_REPLY_SIZE_MAX 64
58
59	/** Custom fixed I/O ports for BIOS controller access.
60	* Note that these should not be in the ISA range (below 400h) to avoid
61	* conflicts with ISA device probing. Addresses in the 300h-340h range should be
62	* especially avoided.
63	*/
64	#define BUSLOGIC_BIOS_IO_PORT 0x430
65
66	/** State saved version. */
67	#define BUSLOGIC_SAVED_STATE_MINOR_VERSION 4
68
69	/** Saved state version before the suspend on error feature was implemented. */
70	#define BUSLOGIC_SAVED_STATE_MINOR_PRE_ERROR_HANDLING 1
71	/** Saved state version before 24-bit mailbox support was implemented. */
72	#define BUSLOGIC_SAVED_STATE_MINOR_PRE_24BIT_MBOX 2
73	/** Saved state version before command buffer size was raised. */
74	#define BUSLOGIC_SAVED_STATE_MINOR_PRE_CMDBUF_RESIZE 3
75
76	/** Command buffer size in old saved states. */
77	#define BUSLOGIC_COMMAND_SIZE_OLD 5
78
79	/** The duration of software-initiated reset (in nano seconds).
80	* Not documented, set to 50 ms. */
81	#define BUSLOGIC_RESET_DURATION_NS UINT64_C(50000000)
82
83
84	/*********************************************************************************************************************************
85	* Structures and Typedefs *
86	*********************************************************************************************************************************/
87	/**
88	* State of a device attached to the buslogic host adapter.
89	*
90	* @implements PDMIBASE
91	* @implements PDMISCSIPORT
92	* @implements PDMILEDPORTS
93	*/
94	typedef struct BUSLOGICDEVICE
95	{
96	/** Pointer to the owning buslogic device instance. - R3 pointer */
97	R3PTRTYPE(struct BUSLOGIC *) pBusLogicR3;
98	/** Pointer to the owning buslogic device instance. - R0 pointer */
99	R0PTRTYPE(struct BUSLOGIC *) pBusLogicR0;
100	/** Pointer to the owning buslogic device instance. - RC pointer */
101	RCPTRTYPE(struct BUSLOGIC *) pBusLogicRC;
102
103	/** Flag whether device is present. */
104	bool fPresent;
105	/** LUN of the device. */
106	RTUINT iLUN;
107
108	#if HC_ARCH_BITS == 64
109	uint32_t Alignment0;
110	#endif
111
112	/** Our base interface. */
113	PDMIBASE IBase;
114	/** Media port interface. */
115	PDMIMEDIAPORT IMediaPort;
116	/** Extended media port interface. */
117	PDMIMEDIAEXPORT IMediaExPort;
118	/** Led interface. */
119	PDMILEDPORTS ILed;
120	/** Pointer to the attached driver's base interface. */
121	R3PTRTYPE(PPDMIBASE) pDrvBase;
122	/** Pointer to the attached driver's media interface. */
123	R3PTRTYPE(PPDMIMEDIA) pDrvMedia;
124	/** Pointer to the attached driver's extended media interface. */
125	R3PTRTYPE(PPDMIMEDIAEX) pDrvMediaEx;
126	/** The status LED state for this device. */
127	PDMLED Led;
128
129	#if HC_ARCH_BITS == 64
130	uint32_t Alignment1;
131	#endif
132
133	/** Number of outstanding tasks on the port. */
134	volatile uint32_t cOutstandingRequests;
135
136	} BUSLOGICDEVICE, *PBUSLOGICDEVICE;
137
138	/**
139	* Commands the BusLogic adapter supports.
140	*/
141	enum BUSLOGICCOMMAND
142	{
143	BUSLOGICCOMMAND_TEST_CMDC_INTERRUPT = 0x00,
144	BUSLOGICCOMMAND_INITIALIZE_MAILBOX = 0x01,
145	BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND = 0x02,
146	BUSLOGICCOMMAND_EXECUTE_BIOS_COMMAND = 0x03,
147	BUSLOGICCOMMAND_INQUIRE_BOARD_ID = 0x04,
148	BUSLOGICCOMMAND_ENABLE_OUTGOING_MAILBOX_AVAILABLE_INTERRUPT = 0x05,
149	BUSLOGICCOMMAND_SET_SCSI_SELECTION_TIMEOUT = 0x06,
150	BUSLOGICCOMMAND_SET_PREEMPT_TIME_ON_BUS = 0x07,
151	BUSLOGICCOMMAND_SET_TIME_OFF_BUS = 0x08,
152	BUSLOGICCOMMAND_SET_BUS_TRANSFER_RATE = 0x09,
153	BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_0_TO_7 = 0x0a,
154	BUSLOGICCOMMAND_INQUIRE_CONFIGURATION = 0x0b,
155	BUSLOGICCOMMAND_ENABLE_TARGET_MODE = 0x0c,
156	BUSLOGICCOMMAND_INQUIRE_SETUP_INFORMATION = 0x0d,
157	BUSLOGICCOMMAND_WRITE_ADAPTER_LOCAL_RAM = 0x1a,
158	BUSLOGICCOMMAND_READ_ADAPTER_LOCAL_RAM = 0x1b,
159	BUSLOGICCOMMAND_WRITE_BUSMASTER_CHIP_FIFO = 0x1c,
160	BUSLOGICCOMMAND_READ_BUSMASTER_CHIP_FIFO = 0x1d,
161	BUSLOGICCOMMAND_ECHO_COMMAND_DATA = 0x1f,
162	BUSLOGICCOMMAND_HOST_ADAPTER_DIAGNOSTIC = 0x20,
163	BUSLOGICCOMMAND_SET_ADAPTER_OPTIONS = 0x21,
164	BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_8_TO_15 = 0x23,
165	BUSLOGICCOMMAND_INQUIRE_TARGET_DEVICES = 0x24,
166	BUSLOGICCOMMAND_DISABLE_HOST_ADAPTER_INTERRUPT = 0x25,
167	BUSLOGICCOMMAND_EXT_BIOS_INFO = 0x28,
168	BUSLOGICCOMMAND_UNLOCK_MAILBOX = 0x29,
169	BUSLOGICCOMMAND_INITIALIZE_EXTENDED_MAILBOX = 0x81,
170	BUSLOGICCOMMAND_EXECUTE_SCSI_COMMAND = 0x83,
171	BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_3RD_LETTER = 0x84,
172	BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_LETTER = 0x85,
173	BUSLOGICCOMMAND_INQUIRE_PCI_HOST_ADAPTER_INFORMATION = 0x86,
174	BUSLOGICCOMMAND_INQUIRE_HOST_ADAPTER_MODEL_NUMBER = 0x8b,
175	BUSLOGICCOMMAND_INQUIRE_SYNCHRONOUS_PERIOD = 0x8c,
176	BUSLOGICCOMMAND_INQUIRE_EXTENDED_SETUP_INFORMATION = 0x8d,
177	BUSLOGICCOMMAND_ENABLE_STRICT_ROUND_ROBIN_MODE = 0x8f,
178	BUSLOGICCOMMAND_STORE_HOST_ADAPTER_LOCAL_RAM = 0x90,
179	BUSLOGICCOMMAND_FETCH_HOST_ADAPTER_LOCAL_RAM = 0x91,
180	BUSLOGICCOMMAND_STORE_LOCAL_DATA_IN_EEPROM = 0x92,
181	BUSLOGICCOMMAND_UPLOAD_AUTO_SCSI_CODE = 0x94,
182	BUSLOGICCOMMAND_MODIFY_IO_ADDRESS = 0x95,
183	BUSLOGICCOMMAND_SET_CCB_FORMAT = 0x96,
184	BUSLOGICCOMMAND_WRITE_INQUIRY_BUFFER = 0x9a,
185	BUSLOGICCOMMAND_READ_INQUIRY_BUFFER = 0x9b,
186	BUSLOGICCOMMAND_FLASH_ROM_UPLOAD_DOWNLOAD = 0xa7,
187	BUSLOGICCOMMAND_READ_SCAM_DATA = 0xa8,
188	BUSLOGICCOMMAND_WRITE_SCAM_DATA = 0xa9
189	} BUSLOGICCOMMAND;
190
191	#pragma pack(1)
192	/**
193	* Auto SCSI structure which is located
194	* in host adapter RAM and contains several
195	* configuration parameters.
196	*/
197	typedef struct AutoSCSIRam
198	{
199	uint8_t aInternalSignature[2];
200	uint8_t cbInformation;
201	uint8_t aHostAdaptertype[6];
202	uint8_t uReserved1;
203	bool fFloppyEnabled : 1;
204	bool fFloppySecondary : 1;
205	bool fLevelSensitiveInterrupt : 1;
206	unsigned char uReserved2 : 2;
207	unsigned char uSystemRAMAreForBIOS : 3;
208	unsigned char uDMAChannel : 7;
209	bool fDMAAutoConfiguration : 1;
210	unsigned char uIrqChannel : 7;
211	bool fIrqAutoConfiguration : 1;
212	uint8_t uDMATransferRate;
213	uint8_t uSCSIId;
214	bool fLowByteTerminated : 1;
215	bool fParityCheckingEnabled : 1;
216	bool fHighByteTerminated : 1;
217	bool fNoisyCablingEnvironment : 1;
218	bool fFastSynchronousNeogtiation : 1;
219	bool fBusResetEnabled : 1;
220	bool fReserved3 : 1;
221	bool fActiveNegotiationEnabled : 1;
222	uint8_t uBusOnDelay;
223	uint8_t uBusOffDelay;
224	bool fHostAdapterBIOSEnabled : 1;
225	bool fBIOSRedirectionOfInt19 : 1;
226	bool fExtendedTranslation : 1;
227	bool fMapRemovableAsFixed : 1;
228	bool fReserved4 : 1;
229	bool fBIOSSupportsMoreThan2Drives : 1;
230	bool fBIOSInterruptMode : 1;
231	bool fFlopticalSupport : 1;
232	uint16_t u16DeviceEnabledMask;
233	uint16_t u16WidePermittedMask;
234	uint16_t u16FastPermittedMask;
235	uint16_t u16SynchronousPermittedMask;
236	uint16_t u16DisconnectPermittedMask;
237	uint16_t u16SendStartUnitCommandMask;
238	uint16_t u16IgnoreInBIOSScanMask;
239	unsigned char uPCIInterruptPin : 2;
240	unsigned char uHostAdapterIoPortAddress : 2;
241	bool fStrictRoundRobinMode : 1;
242	bool fVesaBusSpeedGreaterThan33MHz : 1;
243	bool fVesaBurstWrite : 1;
244	bool fVesaBurstRead : 1;
245	uint16_t u16UltraPermittedMask;
246	uint32_t uReserved5;
247	uint8_t uReserved6;
248	uint8_t uAutoSCSIMaximumLUN;
249	bool fReserved7 : 1;
250	bool fSCAMDominant : 1;
251	bool fSCAMenabled : 1;
252	bool fSCAMLevel2 : 1;
253	unsigned char uReserved8 : 4;
254	bool fInt13Extension : 1;
255	bool fReserved9 : 1;
256	bool fCDROMBoot : 1;
257	unsigned char uReserved10 : 5;
258	unsigned char uBootTargetId : 4;
259	unsigned char uBootChannel : 4;
260	bool fForceBusDeviceScanningOrder : 1;
261	unsigned char uReserved11 : 7;
262	uint16_t u16NonTaggedToAlternateLunPermittedMask;
263	uint16_t u16RenegotiateSyncAfterCheckConditionMask;
264	uint8_t aReserved12[10];
265	uint8_t aManufacturingDiagnostic[2];
266	uint16_t u16Checksum;
267	} AutoSCSIRam, *PAutoSCSIRam;
268	AssertCompileSize(AutoSCSIRam, 64);
269	#pragma pack()
270
271	/**
272	* The local Ram.
273	*/
274	typedef union HostAdapterLocalRam
275	{
276	/** Byte view. */
277	uint8_t u8View[256];
278	/** Structured view. */
279	struct
280	{
281	/** Offset 0 - 63 is for BIOS. */
282	uint8_t u8Bios[64];
283	/** Auto SCSI structure. */
284	AutoSCSIRam autoSCSIData;
285	} structured;
286	} HostAdapterLocalRam, *PHostAdapterLocalRam;
287	AssertCompileSize(HostAdapterLocalRam, 256);
288
289
290	/** Ugly 24-bit big-endian addressing. */
291	typedef struct
292	{
293	uint8_t hi;
294	uint8_t mid;
295	uint8_t lo;
296	} Addr24, Len24;
297	AssertCompileSize(Addr24, 3);
298
299	#define ADDR_TO_U32(x) (((x).hi << 16) \| ((x).mid << 8) \| (x).lo)
300	#define LEN_TO_U32 ADDR_TO_U32
301	#define U32_TO_ADDR(a, x) do {(a).hi = (x) >> 16; (a).mid = (x) >> 8; (a).lo = (x);} while(0)
302	#define U32_TO_LEN U32_TO_ADDR
303
304	/** @name Compatible ISA base I/O port addresses. Disabled if zero.
305	* @{ */
306	#define NUM_ISA_BASES 8
307	#define MAX_ISA_BASE (NUM_ISA_BASES - 1)
308	#define ISA_BASE_DISABLED 6
309
310	#ifdef IN_RING3
311	static uint16_t const g_aISABases[NUM_ISA_BASES] =
312	{
313	0x330, 0x334, 0x230, 0x234, 0x130, 0x134, 0, 0
314	};
315	#endif
316	/** @} */
317
318	/**
319	* Emulated device types.
320	*/
321	enum BL_DEVICE_TYPE
322	{
323	DEV_BT_958D = 0, /* BusLogic BT-958D, PCI. */
324	DEV_BT_545C = 1, /* BusLogic BT-545C, ISA. */
325	DEV_AHA_1540B = 2 /* Adaptec AHA-1540B, ISA. */
326	};
327
328	/** Pointer to a task state structure. */
329	typedef struct BUSLOGICREQ *PBUSLOGICREQ;
330
331	/**
332	* Main BusLogic device state.
333	*
334	* @extends PDMPCIDEV
335	* @implements PDMILEDPORTS
336	*/
337	typedef struct BUSLOGIC
338	{
339	/** The PCI device structure. */
340	PDMPCIDEV dev;
341	/** Pointer to the device instance - HC ptr */
342	PPDMDEVINSR3 pDevInsR3;
343	/** Pointer to the device instance - R0 ptr */
344	PPDMDEVINSR0 pDevInsR0;
345	/** Pointer to the device instance - RC ptr. */
346	PPDMDEVINSRC pDevInsRC;
347
348	/** Whether R0 is enabled. */
349	bool fR0Enabled;
350	/** Whether RC is enabled. */
351	bool fGCEnabled;
352	/** Base address of the I/O ports. */
353	RTIOPORT IOPortBase;
354
355	/** Base address of the memory mapping. */
356	RTGCPHYS MMIOBase;
357
358	/** Status register - Readonly. */
359	volatile uint8_t regStatus;
360	/** Interrupt register - Readonly. */
361	volatile uint8_t regInterrupt;
362	/** Geometry register - Readonly. */
363	volatile uint8_t regGeometry;
364	/** Pending (delayed) interrupt. */
365	uint8_t uPendingIntr;
366
367	/** Local RAM for the fetch hostadapter local RAM request.
368	* I don't know how big the buffer really is but the maximum
369	* seems to be 256 bytes because the offset and count field in the command request
370	* are only one byte big.
371	*/
372	HostAdapterLocalRam LocalRam;
373
374	/** Command code the guest issued. */
375	uint8_t uOperationCode;
376	/** Buffer for the command parameters the adapter is currently receiving from the guest.
377	* Size of the largest command which is possible.
378	*/
379	uint8_t aCommandBuffer[BUSLOGIC_COMMAND_SIZE_MAX]; /* Size of the biggest request. */
380	/** Current position in the command buffer. */
381	uint8_t iParameter;
382	/** Parameters left until the command is complete. */
383	uint8_t cbCommandParametersLeft;
384
385	/** Whether we are using the RAM or reply buffer. */
386	bool fUseLocalRam;
387	/** Buffer to store reply data from the controller to the guest. */
388	uint8_t aReplyBuffer[BUSLOGIC_REPLY_SIZE_MAX]; /* Size of the biggest reply. */
389	/** Position in the buffer we are reading next. */
390	uint8_t iReply;
391	/** Bytes left until the reply buffer is empty. */
392	uint8_t cbReplyParametersLeft;
393
394	/** Flag whether IRQs are enabled. */
395	bool fIRQEnabled;
396	/** Flag whether 24-bit mailboxes are in use (default is 32-bit). */
397	bool fMbxIs24Bit;
398	/** ISA I/O port base (encoded in FW-compatible format). */
399	uint8_t uISABaseCode;
400	/** ISA IRQ, non-zero if in ISA mode. */
401	uint8_t uIsaIrq;
402
403	/** ISA I/O port base (disabled if zero). */
404	RTIOPORT IOISABase;
405	/** Default ISA I/O port base in FW-compatible format. */
406	uint8_t uDefaultISABaseCode;
407	/** Emulated device type. */
408	uint8_t uDevType;
409
410	/** Signature index for Adaptec models. */
411	uint8_t uAhaSigIdx;
412	uint8_t Alignment[7];
413
414	/** Number of mailboxes the guest set up. */
415	uint32_t cMailbox;
416
417	#if HC_ARCH_BITS == 64
418	uint32_t Alignment0;
419	#endif
420
421	/** Time when HBA reset was last initiated. / /< @todo does this need to be saved? /
422	uint64_t u64ResetTime;
423	/** Physical base address of the outgoing mailboxes. */
424	RTGCPHYS GCPhysAddrMailboxOutgoingBase;
425	/** Current outgoing mailbox position. */
426	uint32_t uMailboxOutgoingPositionCurrent;
427	/** Number of mailboxes ready. */
428	volatile uint32_t cMailboxesReady;
429	/** Whether a notification to R3 was sent. */
430	volatile bool fNotificationSent;
431
432	#if HC_ARCH_BITS == 64
433	uint32_t Alignment1;
434	#endif
435
436	/** Physical base address of the incoming mailboxes. */
437	RTGCPHYS GCPhysAddrMailboxIncomingBase;
438	/** Current incoming mailbox position. */
439	uint32_t uMailboxIncomingPositionCurrent;
440
441	/** Whether strict round robin is enabled. */
442	bool fStrictRoundRobinMode;
443	/** Whether the extended LUN CCB format is enabled for 32 possible logical units. */
444	bool fExtendedLunCCBFormat;
445
446	/** Queue to send tasks to R3. - HC ptr */
447	R3PTRTYPE(PPDMQUEUE) pNotifierQueueR3;
448	/** Queue to send tasks to R3. - HC ptr */
449	R0PTRTYPE(PPDMQUEUE) pNotifierQueueR0;
450	/** Queue to send tasks to R3. - RC ptr */
451	RCPTRTYPE(PPDMQUEUE) pNotifierQueueRC;
452
453	uint32_t Alignment2;
454
455	/** Critical section protecting access to the interrupt status register. */
456	PDMCRITSECT CritSectIntr;
457
458	/** Device state for BIOS access. */
459	VBOXSCSI VBoxSCSI;
460
461	/** BusLogic device states. */
462	BUSLOGICDEVICE aDeviceStates[BUSLOGIC_MAX_DEVICES];
463
464	/** The base interface.
465	* @todo use PDMDEVINS::IBase */
466	PDMIBASE IBase;
467	/** Status Port - Leds interface. */
468	PDMILEDPORTS ILeds;
469	/** Partner of ILeds. */
470	R3PTRTYPE(PPDMILEDCONNECTORS) pLedsConnector;
471	/** Status LUN: Media Notifys. */
472	R3PTRTYPE(PPDMIMEDIANOTIFY) pMediaNotify;
473
474	#if HC_ARCH_BITS == 64
475	uint32_t Alignment3;
476	#endif
477
478	/** Indicates that PDMDevHlpAsyncNotificationCompleted should be called when
479	* a port is entering the idle state. */
480	bool volatile fSignalIdle;
481	/** Flag whether the worker thread is sleeping. */
482	volatile bool fWrkThreadSleeping;
483	/** Flag whether a request from the BIOS is pending which the
484	* worker thread needs to process. */
485	volatile bool fBiosReqPending;
486
487	/** The support driver session handle. */
488	R3R0PTRTYPE(PSUPDRVSESSION) pSupDrvSession;
489	/** Worker thread. */
490	R3PTRTYPE(PPDMTHREAD) pThreadWrk;
491	/** The event semaphore the processing thread waits on. */
492	SUPSEMEVENT hEvtProcess;
493
494	/** Pointer to the array of addresses to redo. */
495	R3PTRTYPE(PRTGCPHYS) paGCPhysAddrCCBRedo;
496	/** Number of addresses the redo array holds. */
497	uint32_t cReqsRedo;
498
499	#ifdef LOG_ENABLED
500	volatile uint32_t cInMailboxesReady;
501	#else
502	# if HC_ARCH_BITS == 64
503	uint32_t Alignment4;
504	# endif
505	#endif
506
507	} BUSLOGIC, *PBUSLOGIC;
508
509	/** Register offsets in the I/O port space. */
510	#define BUSLOGIC_REGISTER_CONTROL 0 /*< Writeonly /
511	/** Fields for the control register. */
512	# define BL_CTRL_RSBUS RT_BIT(4) /* Reset SCSI Bus. */
513	# define BL_CTRL_RINT RT_BIT(5) /* Reset Interrupt. */
514	# define BL_CTRL_RSOFT RT_BIT(6) /* Soft Reset. */
515	# define BL_CTRL_RHARD RT_BIT(7) /* Hard Reset. */
516
517	#define BUSLOGIC_REGISTER_STATUS 0 /*< Readonly /
518	/** Fields for the status register. */
519	# define BL_STAT_CMDINV RT_BIT(0) /* Command Invalid. */
520	# define BL_STAT_DIRRDY RT_BIT(2) /* Data In Register Ready. */
521	# define BL_STAT_CPRBSY RT_BIT(3) /* Command/Parameter Out Register Busy. */
522	# define BL_STAT_HARDY RT_BIT(4) /* Host Adapter Ready. */
523	# define BL_STAT_INREQ RT_BIT(5) /* Initialization Required. */
524	# define BL_STAT_DFAIL RT_BIT(6) /* Diagnostic Failure. */
525	# define BL_STAT_DACT RT_BIT(7) /* Diagnistic Active. */
526
527	#define BUSLOGIC_REGISTER_COMMAND 1 /*< Writeonly /
528	#define BUSLOGIC_REGISTER_DATAIN 1 /*< Readonly /
529	#define BUSLOGIC_REGISTER_INTERRUPT 2 /*< Readonly /
530	/** Fields for the interrupt register. */
531	# define BL_INTR_IMBL RT_BIT(0) /* Incoming Mailbox Loaded. */
532	# define BL_INTR_OMBR RT_BIT(1) /* Outgoing Mailbox Available. */
533	# define BL_INTR_CMDC RT_BIT(2) /* Command Complete. */
534	# define BL_INTR_RSTS RT_BIT(3) /* SCSI Bus Reset State. */
535	# define BL_INTR_INTV RT_BIT(7) /* Interrupt Valid. */
536
537	#define BUSLOGIC_REGISTER_GEOMETRY 3 /* Readonly */
538	# define BL_GEOM_XLATEN RT_BIT(7) /* Extended geometry translation enabled. */
539
540	/** Structure for the INQUIRE_PCI_HOST_ADAPTER_INFORMATION reply. */
541	typedef struct ReplyInquirePCIHostAdapterInformation
542	{
543	uint8_t IsaIOPort;
544	uint8_t IRQ;
545	unsigned char LowByteTerminated : 1;
546	unsigned char HighByteTerminated : 1;
547	unsigned char uReserved : 2; /* Reserved. */
548	unsigned char JP1 : 1; /* Whatever that means. */
549	unsigned char JP2 : 1; /* Whatever that means. */
550	unsigned char JP3 : 1; /* Whatever that means. */
551	/** Whether the provided info is valid. */
552	unsigned char InformationIsValid: 1;
553	uint8_t uReserved2; /* Reserved. */
554	} ReplyInquirePCIHostAdapterInformation, *PReplyInquirePCIHostAdapterInformation;
555	AssertCompileSize(ReplyInquirePCIHostAdapterInformation, 4);
556
557	/** Structure for the INQUIRE_CONFIGURATION reply. */
558	typedef struct ReplyInquireConfiguration
559	{
560	unsigned char uReserved1 : 5;
561	bool fDmaChannel5 : 1;
562	bool fDmaChannel6 : 1;
563	bool fDmaChannel7 : 1;
564	bool fIrqChannel9 : 1;
565	bool fIrqChannel10 : 1;
566	bool fIrqChannel11 : 1;
567	bool fIrqChannel12 : 1;
568	unsigned char uReserved2 : 1;
569	bool fIrqChannel14 : 1;
570	bool fIrqChannel15 : 1;
571	unsigned char uReserved3 : 1;
572	unsigned char uHostAdapterId : 4;
573	unsigned char uReserved4 : 4;
574	} ReplyInquireConfiguration, *PReplyInquireConfiguration;
575	AssertCompileSize(ReplyInquireConfiguration, 3);
576
577	/** Structure for the INQUIRE_SETUP_INFORMATION reply. */
578	typedef struct ReplyInquireSetupInformationSynchronousValue
579	{
580	unsigned char uOffset : 4;
581	unsigned char uTransferPeriod : 3;
582	bool fSynchronous : 1;
583	}ReplyInquireSetupInformationSynchronousValue, *PReplyInquireSetupInformationSynchronousValue;
584	AssertCompileSize(ReplyInquireSetupInformationSynchronousValue, 1);
585
586	typedef struct ReplyInquireSetupInformation
587	{
588	bool fSynchronousInitiationEnabled : 1;
589	bool fParityCheckingEnabled : 1;
590	unsigned char uReserved1 : 6;
591	uint8_t uBusTransferRate;
592	uint8_t uPreemptTimeOnBus;
593	uint8_t uTimeOffBus;
594	uint8_t cMailbox;
595	Addr24 MailboxAddress;
596	ReplyInquireSetupInformationSynchronousValue SynchronousValuesId0To7[8];
597	uint8_t uDisconnectPermittedId0To7;
598	uint8_t uSignature;
599	uint8_t uCharacterD;
600	uint8_t uHostBusType;
601	uint8_t uWideTransferPermittedId0To7;
602	uint8_t uWideTransfersActiveId0To7;
603	ReplyInquireSetupInformationSynchronousValue SynchronousValuesId8To15[8];
604	uint8_t uDisconnectPermittedId8To15;
605	uint8_t uReserved2;
606	uint8_t uWideTransferPermittedId8To15;
607	uint8_t uWideTransfersActiveId8To15;
608	} ReplyInquireSetupInformation, *PReplyInquireSetupInformation;
609	AssertCompileSize(ReplyInquireSetupInformation, 34);
610
611	/** Structure for the INQUIRE_EXTENDED_SETUP_INFORMATION. */
612	#pragma pack(1)
613	typedef struct ReplyInquireExtendedSetupInformation
614	{
615	uint8_t uBusType;
616	uint8_t uBiosAddress;
617	uint16_t u16ScatterGatherLimit;
618	uint8_t cMailbox;
619	uint32_t uMailboxAddressBase;
620	unsigned char uReserved1 : 2;
621	bool fFastEISA : 1;
622	unsigned char uReserved2 : 3;
623	bool fLevelSensitiveInterrupt : 1;
624	unsigned char uReserved3 : 1;
625	unsigned char aFirmwareRevision[3];
626	bool fHostWideSCSI : 1;
627	bool fHostDifferentialSCSI : 1;
628	bool fHostSupportsSCAM : 1;
629	bool fHostUltraSCSI : 1;
630	bool fHostSmartTermination : 1;
631	unsigned char uReserved4 : 3;
632	} ReplyInquireExtendedSetupInformation, *PReplyInquireExtendedSetupInformation;
633	AssertCompileSize(ReplyInquireExtendedSetupInformation, 14);
634	#pragma pack()
635
636	/** Structure for the INITIALIZE EXTENDED MAILBOX request. */
637	#pragma pack(1)
638	typedef struct RequestInitializeExtendedMailbox
639	{
640	/** Number of mailboxes in guest memory. */
641	uint8_t cMailbox;
642	/** Physical address of the first mailbox. */
643	uint32_t uMailboxBaseAddress;
644	} RequestInitializeExtendedMailbox, *PRequestInitializeExtendedMailbox;
645	AssertCompileSize(RequestInitializeExtendedMailbox, 5);
646	#pragma pack()
647
648	/** Structure for the INITIALIZE MAILBOX request. */
649	typedef struct
650	{
651	/** Number of mailboxes to set up. */
652	uint8_t cMailbox;
653	/** Physical address of the first mailbox. */
654	Addr24 aMailboxBaseAddr;
655	} RequestInitMbx, *PRequestInitMbx;
656	AssertCompileSize(RequestInitMbx, 4);
657
658	/**
659	* Structure of a mailbox in guest memory.
660	* The incoming and outgoing mailbox have the same size
661	* but the incoming one has some more fields defined which
662	* are marked as reserved in the outgoing one.
663	* The last field is also different from the type.
664	* For outgoing mailboxes it is the action and
665	* for incoming ones the completion status code for the task.
666	* We use one structure for both types.
667	*/
668	typedef struct Mailbox32
669	{
670	/** Physical address of the CCB structure in the guest memory. */
671	uint32_t u32PhysAddrCCB;
672	/** Type specific data. */
673	union
674	{
675	/** For outgoing mailboxes. */
676	struct
677	{
678	/** Reserved */
679	uint8_t uReserved[3];
680	/** Action code. */
681	uint8_t uActionCode;
682	} out;
683	/** For incoming mailboxes. */
684	struct
685	{
686	/** The host adapter status after finishing the request. */
687	uint8_t uHostAdapterStatus;
688	/** The status of the device which executed the request after executing it. */
689	uint8_t uTargetDeviceStatus;
690	/** Reserved. */
691	uint8_t uReserved;
692	/** The completion status code of the request. */
693	uint8_t uCompletionCode;
694	} in;
695	} u;
696	} Mailbox32, *PMailbox32;
697	AssertCompileSize(Mailbox32, 8);
698
699	/** Old style 24-bit mailbox entry. */
700	typedef struct Mailbox24
701	{
702	/** Mailbox command (incoming) or state (outgoing). */
703	uint8_t uCmdState;
704	/** Physical address of the CCB structure in the guest memory. */
705	Addr24 aPhysAddrCCB;
706	} Mailbox24, *PMailbox24;
707	AssertCompileSize(Mailbox24, 4);
708
709	/**
710	* Action codes for outgoing mailboxes.
711	*/
712	enum BUSLOGIC_MAILBOX_OUTGOING_ACTION
713	{
714	BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE = 0x00,
715	BUSLOGIC_MAILBOX_OUTGOING_ACTION_START_COMMAND = 0x01,
716	BUSLOGIC_MAILBOX_OUTGOING_ACTION_ABORT_COMMAND = 0x02
717	};
718
719	/**
720	* Completion codes for incoming mailboxes.
721	*/
722	enum BUSLOGIC_MAILBOX_INCOMING_COMPLETION
723	{
724	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_FREE = 0x00,
725	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITHOUT_ERROR = 0x01,
726	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_ABORTED = 0x02,
727	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_ABORTED_NOT_FOUND = 0x03,
728	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR = 0x04,
729	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_INVALID_CCB = 0x05
730	};
731
732	/**
733	* Host adapter status for incoming mailboxes.
734	*/
735	enum BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS
736	{
737	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_CMD_COMPLETED = 0x00,
738	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_LINKED_CMD_COMPLETED = 0x0a,
739	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_LINKED_CMD_COMPLETED_WITH_FLAG = 0x0b,
740	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_DATA_UNDERUN = 0x0c,
741	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_SCSI_SELECTION_TIMEOUT = 0x11,
742	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_DATA_OVERRUN = 0x12,
743	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_UNEXPECTED_BUS_FREE = 0x13,
744	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_BUS_PHASE_REQUESTED = 0x14,
745	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_OUTGOING_MAILBOX_ACTION_CODE = 0x15,
746	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_COMMAND_OPERATION_CODE = 0x16,
747	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_LINKED_CCB_HAS_INVALID_LUN = 0x17,
748	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_COMMAND_PARAMETER = 0x1a,
749	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_AUTO_REQUEST_SENSE_FAILED = 0x1b,
750	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_TAGGED_QUEUING_MESSAGE_REJECTED = 0x1c,
751	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_UNSUPPORTED_MESSAGE_RECEIVED = 0x1d,
752	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_HARDWARE_FAILED = 0x20,
753	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_TARGET_FAILED_RESPONSE_TO_ATN = 0x21,
754	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_ASSERTED_RST = 0x22,
755	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_OTHER_DEVICE_ASSERTED_RST = 0x23,
756	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_TARGET_DEVICE_RECONNECTED_IMPROPERLY = 0x24,
757	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_ASSERTED_BUS_DEVICE_RESET = 0x25,
758	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_ABORT_QUEUE_GENERATED = 0x26,
759	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_SOFTWARE_ERROR = 0x27,
760	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_HOST_ADAPTER_HARDWARE_TIMEOUT_ERROR = 0x30,
761	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_SCSI_PARITY_ERROR_DETECTED = 0x34
762	};
763
764	/**
765	* Device status codes for incoming mailboxes.
766	*/
767	enum BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS
768	{
769	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD = 0x00,
770	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_CHECK_CONDITION = 0x02,
771	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_DEVICE_BUSY = 0x08
772	};
773
774	/**
775	* Opcode types for CCB.
776	*/
777	enum BUSLOGIC_CCB_OPCODE
778	{
779	BUSLOGIC_CCB_OPCODE_INITIATOR_CCB = 0x00,
780	BUSLOGIC_CCB_OPCODE_TARGET_CCB = 0x01,
781	BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_SCATTER_GATHER = 0x02,
782	BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_DATA_LENGTH = 0x03,
783	BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_SCATTER_GATHER = 0x04,
784	BUSLOGIC_CCB_OPCODE_BUS_DEVICE_RESET = 0x81
785	};
786
787	/**
788	* Data transfer direction.
789	*/
790	enum BUSLOGIC_CCB_DIRECTION
791	{
792	BUSLOGIC_CCB_DIRECTION_UNKNOWN = 0x00,
793	BUSLOGIC_CCB_DIRECTION_IN = 0x01,
794	BUSLOGIC_CCB_DIRECTION_OUT = 0x02,
795	BUSLOGIC_CCB_DIRECTION_NO_DATA = 0x03
796	};
797
798	/**
799	* The command control block for a SCSI request.
800	*/
801	typedef struct CCB32
802	{
803	/** Opcode. */
804	uint8_t uOpcode;
805	/** Reserved */
806	unsigned char uReserved1 : 3;
807	/** Data direction for the request. */
808	unsigned char uDataDirection : 2;
809	/** Whether the request is tag queued. */
810	bool fTagQueued : 1;
811	/** Queue tag mode. */
812	unsigned char uQueueTag : 2;
813	/** Length of the SCSI CDB. */
814	uint8_t cbCDB;
815	/** Sense data length. */
816	uint8_t cbSenseData;
817	/** Data length. */
818	uint32_t cbData;
819	/** Data pointer.
820	* This points to the data region or a scatter gather list based on the opcode.
821	*/
822	uint32_t u32PhysAddrData;
823	/** Reserved. */
824	uint8_t uReserved2[2];
825	/** Host adapter status. */
826	uint8_t uHostAdapterStatus;
827	/** Device adapter status. */
828	uint8_t uDeviceStatus;
829	/** The device the request is sent to. */
830	uint8_t uTargetId;
831	/*The LUN in the device. /
832	unsigned char uLogicalUnit : 5;
833	/** Legacy tag. */
834	bool fLegacyTagEnable : 1;
835	/** Legacy queue tag. */
836	unsigned char uLegacyQueueTag : 2;
837	/** The SCSI CDB. (A CDB can be 12 bytes long.) */
838	uint8_t abCDB[12];
839	/** Reserved. */
840	uint8_t uReserved3[6];
841	/** Sense data pointer. */
842	uint32_t u32PhysAddrSenseData;
843	} CCB32, *PCCB32;
844	AssertCompileSize(CCB32, 40);
845
846
847	/**
848	* The 24-bit command control block.
849	*/
850	typedef struct CCB24
851	{
852	/** Opcode. */
853	uint8_t uOpcode;
854	/** The LUN in the device. */
855	unsigned char uLogicalUnit : 3;
856	/** Data direction for the request. */
857	unsigned char uDataDirection : 2;
858	/** The target device ID. */
859	unsigned char uTargetId : 3;
860	/** Length of the SCSI CDB. */
861	uint8_t cbCDB;
862	/** Sense data length. */
863	uint8_t cbSenseData;
864	/** Data length. */
865	Len24 acbData;
866	/** Data pointer.
867	* This points to the data region or a scatter gather list based on the opc
868	*/
869	Addr24 aPhysAddrData;
870	/** Pointer to next CCB for linked commands. */
871	Addr24 aPhysAddrLink;
872	/** Command linking identifier. */
873	uint8_t uLinkId;
874	/** Host adapter status. */
875	uint8_t uHostAdapterStatus;
876	/** Device adapter status. */
877	uint8_t uDeviceStatus;
878	/** Two unused bytes. */
879	uint8_t aReserved[2];
880	/** The SCSI CDB. (A CDB can be 12 bytes long.) */
881	uint8_t abCDB[12];
882	} CCB24, *PCCB24;
883	AssertCompileSize(CCB24, 30);
884
885	/**
886	* The common 24-bit/32-bit command control block. The 32-bit CCB is laid out
887	* such that many fields are in the same location as in the older 24-bit CCB.
888	*/
889	typedef struct CCBC
890	{
891	/** Opcode. */
892	uint8_t uOpcode;
893	/** The LUN in the device. */
894	unsigned char uPad1 : 3;
895	/** Data direction for the request. */
896	unsigned char uDataDirection : 2;
897	/** The target device ID. */
898	unsigned char uPad2 : 3;
899	/** Length of the SCSI CDB. */
900	uint8_t cbCDB;
901	/** Sense data length. */
902	uint8_t cbSenseData;
903	uint8_t aPad1[10];
904	/** Host adapter status. */
905	uint8_t uHostAdapterStatus;
906	/** Device adapter status. */
907	uint8_t uDeviceStatus;
908	uint8_t aPad2[2];
909	/** The SCSI CDB (up to 12 bytes). */
910	uint8_t abCDB[12];
911	} CCBC, *PCCBC;
912	AssertCompileSize(CCBC, 30);
913
914	/* Make sure that the 24-bit/32-bit/common CCB offsets match. */
915	AssertCompileMemberOffset(CCBC, cbCDB, 2);
916	AssertCompileMemberOffset(CCB24, cbCDB, 2);
917	AssertCompileMemberOffset(CCB32, cbCDB, 2);
918	AssertCompileMemberOffset(CCBC, uHostAdapterStatus, 14);
919	AssertCompileMemberOffset(CCB24, uHostAdapterStatus, 14);
920	AssertCompileMemberOffset(CCB32, uHostAdapterStatus, 14);
921	AssertCompileMemberOffset(CCBC, abCDB, 18);
922	AssertCompileMemberOffset(CCB24, abCDB, 18);
923	AssertCompileMemberOffset(CCB32, abCDB, 18);
924
925	/** A union of all CCB types (24-bit/32-bit/common). */
926	typedef union CCBU
927	{
928	CCB32 n; /*< New 32-bit CCB. /
929	CCB24 o; /*< Old 24-bit CCB. /
930	CCBC c; /*< Common CCB subset. /
931	} CCBU, *PCCBU;
932
933	/** 32-bit scatter-gather list entry. */
934	typedef struct SGE32
935	{
936	uint32_t cbSegment;
937	uint32_t u32PhysAddrSegmentBase;
938	} SGE32, *PSGE32;
939	AssertCompileSize(SGE32, 8);
940
941	/** 24-bit scatter-gather list entry. */
942	typedef struct SGE24
943	{
944	Len24 acbSegment;
945	Addr24 aPhysAddrSegmentBase;
946	} SGE24, *PSGE24;
947	AssertCompileSize(SGE24, 6);
948
949	/**
950	* The structure for the "Execute SCSI Command" command.
951	*/
952	typedef struct ESCMD
953	{
954	/** Data length. */
955	uint32_t cbData;
956	/** Data pointer. */
957	uint32_t u32PhysAddrData;
958	/** The device the request is sent to. */
959	uint8_t uTargetId;
960	/** The LUN in the device. */
961	uint8_t uLogicalUnit;
962	/** Reserved */
963	unsigned char uReserved1 : 3;
964	/** Data direction for the request. */
965	unsigned char uDataDirection : 2;
966	/** Reserved */
967	unsigned char uReserved2 : 3;
968	/** Length of the SCSI CDB. */
969	uint8_t cbCDB;
970	/** The SCSI CDB. (A CDB can be 12 bytes long.) */
971	uint8_t abCDB[12];
972	} ESCMD, *PESCMD;
973	AssertCompileSize(ESCMD, 24);
974
975	/**
976	* Task state for a CCB request.
977	*/
978	typedef struct BUSLOGICREQ
979	{
980	/** PDM extended media interface I/O request hande. */
981	PDMMEDIAEXIOREQ hIoReq;
982	/** Device this task is assigned to. */
983	PBUSLOGICDEVICE pTargetDevice;
984	/** The command control block from the guest. */
985	CCBU CCBGuest;
986	/** Guest physical address of th CCB. */
987	RTGCPHYS GCPhysAddrCCB;
988	/** Pointer to the R3 sense buffer. */
989	uint8_t *pbSenseBuffer;
990	/** Flag whether this is a request from the BIOS. */
991	bool fBIOS;
992	/** 24-bit request flag (default is 32-bit). */
993	bool fIs24Bit;
994	/** SCSI status code. */
995	uint8_t u8ScsiSts;
996	} BUSLOGICREQ;
997
998	#ifdef IN_RING3
999	/**
1000	* Memory buffer callback.
1001	*
1002	* @returns nothing.
1003	* @param pThis The BusLogic controller instance.
1004	* @param GCPhys The guest physical address of the memory buffer.
1005	* @param pSgBuf The pointer to the host R3 S/G buffer.
1006	* @param cbCopy How many bytes to copy between the two buffers.
1007	* @param pcbSkip Initially contains the amount of bytes to skip
1008	* starting from the guest physical address before
1009	* accessing the S/G buffer and start copying data.
1010	* On return this contains the remaining amount if
1011	* cbCopy < *pcbSkip or 0 otherwise.
1012	*/
1013	typedef DECLCALLBACK(void) BUSLOGICR3MEMCOPYCALLBACK(PBUSLOGIC pThis, RTGCPHYS GCPhys, PRTSGBUF pSgBuf, size_t cbCopy,
1014	size_t *pcbSkip);
1015	/** Pointer to a memory copy buffer callback. */
1016	typedef BUSLOGICR3MEMCOPYCALLBACK *PBUSLOGICR3MEMCOPYCALLBACK;
1017	#endif
1018
1019	#ifndef VBOX_DEVICE_STRUCT_TESTCASE
1020
1021
1022	/*********************************************************************************************************************************
1023	* Internal Functions *
1024	*********************************************************************************************************************************/
1025	#ifdef IN_RING3
1026	static int buslogicR3RegisterISARange(PBUSLOGIC pBusLogic, uint8_t uBaseCode);
1027	#endif
1028
1029
1030	/**
1031	* Assert IRQ line of the BusLogic adapter.
1032	*
1033	* @returns nothing.
1034	* @param pBusLogic Pointer to the BusLogic device instance.
1035	* @param fSuppressIrq Flag to suppress IRQ generation regardless of fIRQEnabled
1036	* @param uIrqType Type of interrupt being generated.
1037	*/
1038	static void buslogicSetInterrupt(PBUSLOGIC pBusLogic, bool fSuppressIrq, uint8_t uIrqType)
1039	{
1040	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
1041
1042	/* The CMDC interrupt has priority over IMBL and OMBR. */
1043	if (uIrqType & (BL_INTR_IMBL \| BL_INTR_OMBR))
1044	{
1045	if (!(pBusLogic->regInterrupt & BL_INTR_CMDC))
1046	pBusLogic->regInterrupt \|= uIrqType; /* Report now. */
1047	else
1048	pBusLogic->uPendingIntr \|= uIrqType; /* Report later. */
1049	}
1050	else if (uIrqType & BL_INTR_CMDC)
1051	{
1052	AssertMsg(pBusLogic->regInterrupt == 0 \|\| pBusLogic->regInterrupt == (BL_INTR_INTV \| BL_INTR_CMDC),
1053	("regInterrupt=%02X\n", pBusLogic->regInterrupt));
1054	pBusLogic->regInterrupt \|= uIrqType;
1055	}
1056	else
1057	AssertMsgFailed(("Invalid interrupt state!\n"));
1058
1059	pBusLogic->regInterrupt \|= BL_INTR_INTV;
1060	if (pBusLogic->fIRQEnabled && !fSuppressIrq)
1061	{
1062	if (!pBusLogic->uIsaIrq)
1063	PDMDevHlpPCISetIrq(pBusLogic->CTX_SUFF(pDevIns), 0, 1);
1064	else
1065	PDMDevHlpISASetIrq(pBusLogic->CTX_SUFF(pDevIns), pBusLogic->uIsaIrq, 1);
1066	}
1067	}
1068
1069	/**
1070	* Deasserts the interrupt line of the BusLogic adapter.
1071	*
1072	* @returns nothing.
1073	* @param pBusLogic Pointer to the BusLogic device instance.
1074	*/
1075	static void buslogicClearInterrupt(PBUSLOGIC pBusLogic)
1076	{
1077	LogFlowFunc(("pBusLogic=%#p, clearing %#02x (pending %#02x)\n",
1078	pBusLogic, pBusLogic->regInterrupt, pBusLogic->uPendingIntr));
1079	pBusLogic->regInterrupt = 0;
1080	pBusLogic->regStatus &= ~BL_STAT_CMDINV;
1081	if (!pBusLogic->uIsaIrq)
1082	PDMDevHlpPCISetIrq(pBusLogic->CTX_SUFF(pDevIns), 0, 0);
1083	else
1084	PDMDevHlpISASetIrq(pBusLogic->CTX_SUFF(pDevIns), pBusLogic->uIsaIrq, 0);
1085	/* If there's another pending interrupt, report it now. */
1086	if (pBusLogic->uPendingIntr)
1087	{
1088	buslogicSetInterrupt(pBusLogic, false, pBusLogic->uPendingIntr);
1089	pBusLogic->uPendingIntr = 0;
1090	}
1091	}
1092
1093	#if defined(IN_RING3)
1094
1095	/**
1096	* Advances the mailbox pointer to the next slot.
1097	*
1098	* @returns nothing.
1099	* @param pBusLogic The BusLogic controller instance.
1100	*/
1101	DECLINLINE(void) buslogicR3OutgoingMailboxAdvance(PBUSLOGIC pBusLogic)
1102	{
1103	pBusLogic->uMailboxOutgoingPositionCurrent = (pBusLogic->uMailboxOutgoingPositionCurrent + 1) % pBusLogic->cMailbox;
1104	}
1105
1106	/**
1107	* Initialize local RAM of host adapter with default values.
1108	*
1109	* @returns nothing.
1110	* @param pBusLogic The BusLogic controller instance.
1111	*/
1112	static void buslogicR3InitializeLocalRam(PBUSLOGIC pBusLogic)
1113	{
1114	/*
1115	* These values are mostly from what I think is right
1116	* looking at the dmesg output from a Linux guest inside
1117	* a VMware server VM.
1118	*
1119	* So they don't have to be right :)
1120	*/
1121	memset(pBusLogic->LocalRam.u8View, 0, sizeof(HostAdapterLocalRam));
1122	pBusLogic->LocalRam.structured.autoSCSIData.fLevelSensitiveInterrupt = true;
1123	pBusLogic->LocalRam.structured.autoSCSIData.fParityCheckingEnabled = true;
1124	pBusLogic->LocalRam.structured.autoSCSIData.fExtendedTranslation = true; /* Same as in geometry register. */
1125	pBusLogic->LocalRam.structured.autoSCSIData.u16DeviceEnabledMask = UINT16_MAX; /* All enabled. Maybe mask out non present devices? */
1126	pBusLogic->LocalRam.structured.autoSCSIData.u16WidePermittedMask = UINT16_MAX;
1127	pBusLogic->LocalRam.structured.autoSCSIData.u16FastPermittedMask = UINT16_MAX;
1128	pBusLogic->LocalRam.structured.autoSCSIData.u16SynchronousPermittedMask = UINT16_MAX;
1129	pBusLogic->LocalRam.structured.autoSCSIData.u16DisconnectPermittedMask = UINT16_MAX;
1130	pBusLogic->LocalRam.structured.autoSCSIData.fStrictRoundRobinMode = pBusLogic->fStrictRoundRobinMode;
1131	pBusLogic->LocalRam.structured.autoSCSIData.u16UltraPermittedMask = UINT16_MAX;
1132	/** @todo calculate checksum? */
1133	}
1134
1135	/**
1136	* Do a hardware reset of the buslogic adapter.
1137	*
1138	* @returns VBox status code.
1139	* @param pBusLogic Pointer to the BusLogic device instance.
1140	* @param fResetIO Flag determining whether ISA I/O should be reset.
1141	*/
1142	static int buslogicR3HwReset(PBUSLOGIC pBusLogic, bool fResetIO)
1143	{
1144	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
1145
1146	/* Reset registers to default values. */
1147	pBusLogic->regStatus = BL_STAT_HARDY \| BL_STAT_INREQ;
1148	pBusLogic->regGeometry = BL_GEOM_XLATEN;
1149	pBusLogic->uOperationCode = 0xff; /* No command executing. */
1150	pBusLogic->iParameter = 0;
1151	pBusLogic->cbCommandParametersLeft = 0;
1152	pBusLogic->fIRQEnabled = true;
1153	pBusLogic->fStrictRoundRobinMode = false;
1154	pBusLogic->fExtendedLunCCBFormat = false;
1155	pBusLogic->uMailboxOutgoingPositionCurrent = 0;
1156	pBusLogic->uMailboxIncomingPositionCurrent = 0;
1157	pBusLogic->uAhaSigIdx = 0;
1158
1159	/* Clear any active/pending interrupts. */
1160	pBusLogic->uPendingIntr = 0;
1161	buslogicClearInterrupt(pBusLogic);
1162
1163	/* Guest-initiated HBA reset does not affect ISA port I/O. */
1164	if (fResetIO)
1165	{
1166	buslogicR3RegisterISARange(pBusLogic, pBusLogic->uDefaultISABaseCode);
1167	}
1168	buslogicR3InitializeLocalRam(pBusLogic);
1169	vboxscsiInitialize(&pBusLogic->VBoxSCSI);
1170
1171	return VINF_SUCCESS;
1172	}
1173
1174	#endif /* IN_RING3 */
1175
1176	/**
1177	* Resets the command state machine for the next command and notifies the guest.
1178	*
1179	* @returns nothing.
1180	* @param pBusLogic Pointer to the BusLogic device instance
1181	* @param fSuppressIrq Flag to suppress IRQ generation regardless of current state
1182	*/
1183	static void buslogicCommandComplete(PBUSLOGIC pBusLogic, bool fSuppressIrq)
1184	{
1185	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
1186	Assert(pBusLogic->uOperationCode != BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND);
1187
1188	pBusLogic->fUseLocalRam = false;
1189	pBusLogic->regStatus \|= BL_STAT_HARDY;
1190	pBusLogic->iReply = 0;
1191
1192	/* The Enable OMBR command does not set CMDC when successful. */
1193	if (pBusLogic->uOperationCode != BUSLOGICCOMMAND_ENABLE_OUTGOING_MAILBOX_AVAILABLE_INTERRUPT)
1194	{
1195	/* Notify that the command is complete. */
1196	pBusLogic->regStatus &= ~BL_STAT_DIRRDY;
1197	buslogicSetInterrupt(pBusLogic, fSuppressIrq, BL_INTR_CMDC);
1198	}
1199
1200	pBusLogic->uOperationCode = 0xff;
1201	pBusLogic->iParameter = 0;
1202	}
1203
1204	/**
1205	* Memory write helper to handle PCI/ISA differences.
1206	*
1207	* @returns nothing.
1208	* @param pThis Pointer to the BusLogic device instance
1209	* @param GCPhys Guest physical memory address
1210	* @param pvBuf Host side buffer address
1211	* @param cbWrite Number of bytes to write
1212	*/
1213	static void blPhysWrite(PBUSLOGIC pThis, RTGCPHYS GCPhys, const void *pvBuf, size_t cbWrite)
1214	{
1215	if (!pThis->uIsaIrq)
1216	PDMDevHlpPCIPhysWrite(pThis->CTX_SUFF(pDevIns), GCPhys, pvBuf, cbWrite);
1217	else
1218	PDMDevHlpPhysWrite(pThis->CTX_SUFF(pDevIns), GCPhys, pvBuf, cbWrite);
1219	}
1220
1221	#if defined(IN_RING3)
1222
1223	/**
1224	* Initiates a hard reset which was issued from the guest.
1225	*
1226	* @returns nothing
1227	* @param pBusLogic Pointer to the BusLogic device instance.
1228	* @param fHardReset Flag initiating a hard (vs. soft) reset.
1229	*/
1230	static void buslogicR3InitiateReset(PBUSLOGIC pBusLogic, bool fHardReset)
1231	{
1232	LogFlowFunc(("pBusLogic=%#p fHardReset=%d\n", pBusLogic, fHardReset));
1233
1234	buslogicR3HwReset(pBusLogic, false);
1235
1236	if (fHardReset)
1237	{
1238	/* Set the diagnostic active bit in the status register and clear the ready state. */
1239	pBusLogic->regStatus \|= BL_STAT_DACT;
1240	pBusLogic->regStatus &= ~BL_STAT_HARDY;
1241
1242	/* Remember when the guest initiated a reset (after we're done resetting). */
1243	pBusLogic->u64ResetTime = PDMDevHlpTMTimeVirtGetNano(pBusLogic->CTX_SUFF(pDevIns));
1244	}
1245	}
1246
1247
1248	/**
1249	* Send a mailbox with set status codes to the guest.
1250	*
1251	* @returns nothing.
1252	* @param pBusLogic Pointer to the BusLogic device instance.
1253	* @param GCPhysAddrCCB The physical guest address of the CCB the mailbox is for.
1254	* @param pCCBGuest The command control block.
1255	* @param uHostAdapterStatus The host adapter status code to set.
1256	* @param uDeviceStatus The target device status to set.
1257	* @param uMailboxCompletionCode Completion status code to set in the mailbox.
1258	*/
1259	static void buslogicR3SendIncomingMailbox(PBUSLOGIC pBusLogic, RTGCPHYS GCPhysAddrCCB,
1260	PCCBU pCCBGuest, uint8_t uHostAdapterStatus,
1261	uint8_t uDeviceStatus, uint8_t uMailboxCompletionCode)
1262	{
1263	Mailbox32 MbxIn;
1264
1265	MbxIn.u32PhysAddrCCB = (uint32_t)GCPhysAddrCCB;
1266	MbxIn.u.in.uHostAdapterStatus = uHostAdapterStatus;
1267	MbxIn.u.in.uTargetDeviceStatus = uDeviceStatus;
1268	MbxIn.u.in.uCompletionCode = uMailboxCompletionCode;
1269
1270	int rc = PDMCritSectEnter(&pBusLogic->CritSectIntr, VINF_SUCCESS);
1271	AssertRC(rc);
1272
1273	RTGCPHYS GCPhysAddrMailboxIncoming = pBusLogic->GCPhysAddrMailboxIncomingBase
1274	+ ( pBusLogic->uMailboxIncomingPositionCurrent
1275	* (pBusLogic->fMbxIs24Bit ? sizeof(Mailbox24) : sizeof(Mailbox32)) );
1276
1277	if (uMailboxCompletionCode != BUSLOGIC_MAILBOX_INCOMING_COMPLETION_ABORTED_NOT_FOUND)
1278	{
1279	LogFlowFunc(("Completing CCB %RGp hstat=%u, dstat=%u, outgoing mailbox at %RGp\n", GCPhysAddrCCB,
1280	uHostAdapterStatus, uDeviceStatus, GCPhysAddrMailboxIncoming));
1281
1282	/* Update CCB. */
1283	pCCBGuest->c.uHostAdapterStatus = uHostAdapterStatus;
1284	pCCBGuest->c.uDeviceStatus = uDeviceStatus;
1285	/* Rewrite CCB up to the CDB; perhaps more than necessary. */
1286	blPhysWrite(pBusLogic, GCPhysAddrCCB, pCCBGuest, RT_UOFFSETOF(CCBC, abCDB));
1287	}
1288
1289	# ifdef RT_STRICT
1290	uint8_t uCode;
1291	unsigned uCodeOffs = pBusLogic->fMbxIs24Bit ? RT_OFFSETOF(Mailbox24, uCmdState) : RT_OFFSETOF(Mailbox32, u.out.uActionCode);
1292	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrMailboxIncoming + uCodeOffs, &uCode, sizeof(uCode));
1293	Assert(uCode == BUSLOGIC_MAILBOX_INCOMING_COMPLETION_FREE);
1294	# endif
1295
1296	/* Update mailbox. */
1297	if (pBusLogic->fMbxIs24Bit)
1298	{
1299	Mailbox24 Mbx24;
1300
1301	Mbx24.uCmdState = MbxIn.u.in.uCompletionCode;
1302	U32_TO_ADDR(Mbx24.aPhysAddrCCB, MbxIn.u32PhysAddrCCB);
1303	Log(("24-bit mailbox: completion code=%u, CCB at %RGp\n", Mbx24.uCmdState, (RTGCPHYS)ADDR_TO_U32(Mbx24.aPhysAddrCCB)));
1304	blPhysWrite(pBusLogic, GCPhysAddrMailboxIncoming, &Mbx24, sizeof(Mailbox24));
1305	}
1306	else
1307	{
1308	Log(("32-bit mailbox: completion code=%u, CCB at %RGp\n", MbxIn.u.in.uCompletionCode, GCPhysAddrCCB));
1309	blPhysWrite(pBusLogic, GCPhysAddrMailboxIncoming, &MbxIn, sizeof(Mailbox32));
1310	}
1311
1312	/* Advance to next mailbox position. */
1313	pBusLogic->uMailboxIncomingPositionCurrent++;
1314	if (pBusLogic->uMailboxIncomingPositionCurrent >= pBusLogic->cMailbox)
1315	pBusLogic->uMailboxIncomingPositionCurrent = 0;
1316
1317	# ifdef LOG_ENABLED
1318	ASMAtomicIncU32(&pBusLogic->cInMailboxesReady);
1319	# endif
1320
1321	buslogicSetInterrupt(pBusLogic, false, BL_INTR_IMBL);
1322
1323	PDMCritSectLeave(&pBusLogic->CritSectIntr);
1324	}
1325
1326	# ifdef LOG_ENABLED
1327
1328	/**
1329	* Dumps the content of a mailbox for debugging purposes.
1330	*
1331	* @return nothing
1332	* @param pMailbox The mailbox to dump.
1333	* @param fOutgoing true if dumping the outgoing state.
1334	* false if dumping the incoming state.
1335	*/
1336	static void buslogicR3DumpMailboxInfo(PMailbox32 pMailbox, bool fOutgoing)
1337	{
1338	Log(("%s: Dump for %s mailbox:\n", __FUNCTION__, fOutgoing ? "outgoing" : "incoming"));
1339	Log(("%s: u32PhysAddrCCB=%#x\n", __FUNCTION__, pMailbox->u32PhysAddrCCB));
1340	if (fOutgoing)
1341	{
1342	Log(("%s: uActionCode=%u\n", __FUNCTION__, pMailbox->u.out.uActionCode));
1343	}
1344	else
1345	{
1346	Log(("%s: uHostAdapterStatus=%u\n", __FUNCTION__, pMailbox->u.in.uHostAdapterStatus));
1347	Log(("%s: uTargetDeviceStatus=%u\n", __FUNCTION__, pMailbox->u.in.uTargetDeviceStatus));
1348	Log(("%s: uCompletionCode=%u\n", __FUNCTION__, pMailbox->u.in.uCompletionCode));
1349	}
1350	}
1351
1352	/**
1353	* Dumps the content of a command control block for debugging purposes.
1354	*
1355	* @returns nothing.
1356	* @param pCCB Pointer to the command control block to dump.
1357	* @param fIs24BitCCB Flag to determine CCB format.
1358	*/
1359	static void buslogicR3DumpCCBInfo(PCCBU pCCB, bool fIs24BitCCB)
1360	{
1361	Log(("%s: Dump for %s Command Control Block:\n", __FUNCTION__, fIs24BitCCB ? "24-bit" : "32-bit"));
1362	Log(("%s: uOpCode=%#x\n", __FUNCTION__, pCCB->c.uOpcode));
1363	Log(("%s: uDataDirection=%u\n", __FUNCTION__, pCCB->c.uDataDirection));
1364	Log(("%s: cbCDB=%u\n", __FUNCTION__, pCCB->c.cbCDB));
1365	Log(("%s: cbSenseData=%u\n", __FUNCTION__, pCCB->c.cbSenseData));
1366	Log(("%s: uHostAdapterStatus=%u\n", __FUNCTION__, pCCB->c.uHostAdapterStatus));
1367	Log(("%s: uDeviceStatus=%u\n", __FUNCTION__, pCCB->c.uDeviceStatus));
1368	if (fIs24BitCCB)
1369	{
1370	Log(("%s: cbData=%u\n", __FUNCTION__, LEN_TO_U32(pCCB->o.acbData)));
1371	Log(("%s: PhysAddrData=%#x\n", __FUNCTION__, ADDR_TO_U32(pCCB->o.aPhysAddrData)));
1372	Log(("%s: uTargetId=%u\n", __FUNCTION__, pCCB->o.uTargetId));
1373	Log(("%s: uLogicalUnit=%u\n", __FUNCTION__, pCCB->o.uLogicalUnit));
1374	}
1375	else
1376	{
1377	Log(("%s: cbData=%u\n", __FUNCTION__, pCCB->n.cbData));
1378	Log(("%s: PhysAddrData=%#x\n", __FUNCTION__, pCCB->n.u32PhysAddrData));
1379	Log(("%s: uTargetId=%u\n", __FUNCTION__, pCCB->n.uTargetId));
1380	Log(("%s: uLogicalUnit=%u\n", __FUNCTION__, pCCB->n.uLogicalUnit));
1381	Log(("%s: fTagQueued=%d\n", __FUNCTION__, pCCB->n.fTagQueued));
1382	Log(("%s: uQueueTag=%u\n", __FUNCTION__, pCCB->n.uQueueTag));
1383	Log(("%s: fLegacyTagEnable=%u\n", __FUNCTION__, pCCB->n.fLegacyTagEnable));
1384	Log(("%s: uLegacyQueueTag=%u\n", __FUNCTION__, pCCB->n.uLegacyQueueTag));
1385	Log(("%s: PhysAddrSenseData=%#x\n", __FUNCTION__, pCCB->n.u32PhysAddrSenseData));
1386	}
1387	Log(("%s: uCDB[0]=%#x\n", __FUNCTION__, pCCB->c.abCDB[0]));
1388	for (int i = 1; i < pCCB->c.cbCDB; i++)
1389	Log(("%s: uCDB[%d]=%u\n", __FUNCTION__, i, pCCB->c.abCDB[i]));
1390	}
1391
1392	# endif /* LOG_ENABLED */
1393
1394	/**
1395	* Allocate data buffer.
1396	*
1397	* @param pDevIns PDM device instance.
1398	* @param fIs24Bit Flag whether the 24bit SG format is used.
1399	* @param GCSGList Guest physical address of S/G list.
1400	* @param cEntries Number of list entries to read.
1401	* @param pSGEList Pointer to 32-bit S/G list storage.
1402	*/
1403	static void buslogicR3ReadSGEntries(PPDMDEVINS pDevIns, bool fIs24Bit, RTGCPHYS GCSGList,
1404	uint32_t cEntries, SGE32 *pSGEList)
1405	{
1406	/* Read the S/G entries. Convert 24-bit entries to 32-bit format. */
1407	if (fIs24Bit)
1408	{
1409	SGE24 aSGE24[32];
1410	Assert(cEntries <= RT_ELEMENTS(aSGE24));
1411
1412	Log2(("Converting %u 24-bit S/G entries to 32-bit\n", cEntries));
1413	PDMDevHlpPhysRead(pDevIns, GCSGList, &aSGE24, cEntries * sizeof(SGE24));
1414	for (uint32_t i = 0; i < cEntries; ++i)
1415	{
1416	pSGEList[i].cbSegment = LEN_TO_U32(aSGE24[i].acbSegment);
1417	pSGEList[i].u32PhysAddrSegmentBase = ADDR_TO_U32(aSGE24[i].aPhysAddrSegmentBase);
1418	}
1419	}
1420	else
1421	PDMDevHlpPhysRead(pDevIns, GCSGList, pSGEList, cEntries * sizeof(SGE32));
1422	}
1423
1424	/**
1425	* Determines the size of th guest data buffer.
1426	*
1427	* @returns VBox status code.
1428	* @param pDevIns PDM device instance.
1429	* @param pCCBGuest The CCB of the guest.
1430	* @param fIs24Bit Flag whether the 24bit SG format is used.
1431	* @param pcbBuf Where to store the size of the guest data buffer on success.
1432	*/
1433	static int buslogicR3QueryDataBufferSize(PPDMDEVINS pDevIns, PCCBU pCCBGuest, bool fIs24Bit, size_t *pcbBuf)
1434	{
1435	int rc = VINF_SUCCESS;
1436	uint32_t cbDataCCB;
1437	uint32_t u32PhysAddrCCB;
1438	size_t cbBuf = 0;
1439
1440	/* Extract the data length and physical address from the CCB. */
1441	if (fIs24Bit)
1442	{
1443	u32PhysAddrCCB = ADDR_TO_U32(pCCBGuest->o.aPhysAddrData);
1444	cbDataCCB = LEN_TO_U32(pCCBGuest->o.acbData);
1445	}
1446	else
1447	{
1448	u32PhysAddrCCB = pCCBGuest->n.u32PhysAddrData;
1449	cbDataCCB = pCCBGuest->n.cbData;
1450	}
1451
1452	#if 1
1453	/* Hack for NT 10/91: A CCB describes a 2K buffer, but TEST UNIT READY is executed. This command
1454	* returns no data, hence the buffer must be left alone!
1455	*/
1456	if (pCCBGuest->c.abCDB[0] == 0)
1457	cbDataCCB = 0;
1458	#endif
1459
1460	if ( (pCCBGuest->c.uDataDirection != BUSLOGIC_CCB_DIRECTION_NO_DATA)
1461	&& cbDataCCB)
1462	{
1463	/*
1464	* The BusLogic adapter can handle two different data buffer formats.
1465	* The first one is that the data pointer entry in the CCB points to
1466	* the buffer directly. In second mode the data pointer points to a
1467	* scatter gather list which describes the buffer.
1468	*/
1469	if ( (pCCBGuest->c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_SCATTER_GATHER)
1470	\|\| (pCCBGuest->c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_SCATTER_GATHER))
1471	{
1472	uint32_t cScatterGatherGCRead;
1473	uint32_t iScatterGatherEntry;
1474	SGE32 aScatterGatherReadGC[32]; /* A buffer for scatter gather list entries read from guest memory. */
1475	uint32_t cScatterGatherGCLeft = cbDataCCB / (fIs24Bit ? sizeof(SGE24) : sizeof(SGE32));
1476	RTGCPHYS GCPhysAddrScatterGatherCurrent = u32PhysAddrCCB;
1477
1478	/* Count number of bytes to transfer. */
1479	do
1480	{
1481	cScatterGatherGCRead = (cScatterGatherGCLeft < RT_ELEMENTS(aScatterGatherReadGC))
1482	? cScatterGatherGCLeft
1483	: RT_ELEMENTS(aScatterGatherReadGC);
1484	cScatterGatherGCLeft -= cScatterGatherGCRead;
1485
1486	buslogicR3ReadSGEntries(pDevIns, fIs24Bit, GCPhysAddrScatterGatherCurrent, cScatterGatherGCRead, aScatterGatherReadGC);
1487
1488	for (iScatterGatherEntry = 0; iScatterGatherEntry < cScatterGatherGCRead; iScatterGatherEntry++)
1489	cbBuf += aScatterGatherReadGC[iScatterGatherEntry].cbSegment;
1490
1491	/* Set address to the next entries to read. */
1492	GCPhysAddrScatterGatherCurrent += cScatterGatherGCRead * (fIs24Bit ? sizeof(SGE24) : sizeof(SGE32));
1493	} while (cScatterGatherGCLeft > 0);
1494
1495	Log(("%s: cbBuf=%d\n", __FUNCTION__, cbBuf));
1496	}
1497	else if ( pCCBGuest->c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB
1498	\|\| pCCBGuest->c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_DATA_LENGTH)
1499	cbBuf = cbDataCCB;
1500	}
1501
1502	if (RT_SUCCESS(rc))
1503	*pcbBuf = cbBuf;
1504
1505	return rc;
1506	}
1507
1508	/**
1509	* Copy from guest to host memory worker.
1510	*
1511	* @copydoc BUSLOGICR3MEMCOPYCALLBACK
1512	*/
1513	static DECLCALLBACK(void) buslogicR3CopyBufferFromGuestWorker(PBUSLOGIC pThis, RTGCPHYS GCPhys, PRTSGBUF pSgBuf,
1514	size_t cbCopy, size_t *pcbSkip)
1515	{
1516	size_t cbSkipped = RT_MIN(cbCopy, *pcbSkip);
1517	cbCopy -= cbSkipped;
1518	GCPhys += cbSkipped;
1519	*pcbSkip -= cbSkipped;
1520
1521	while (cbCopy)
1522	{
1523	size_t cbSeg = cbCopy;
1524	void *pvSeg = RTSgBufGetNextSegment(pSgBuf, &cbSeg);
1525
1526	AssertPtr(pvSeg);
1527	PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), GCPhys, pvSeg, cbSeg);
1528	GCPhys += cbSeg;
1529	cbCopy -= cbSeg;
1530	}
1531	}
1532
1533	/**
1534	* Copy from host to guest memory worker.
1535	*
1536	* @copydoc BUSLOGICR3MEMCOPYCALLBACK
1537	*/
1538	static DECLCALLBACK(void) buslogicR3CopyBufferToGuestWorker(PBUSLOGIC pThis, RTGCPHYS GCPhys, PRTSGBUF pSgBuf,
1539	size_t cbCopy, size_t *pcbSkip)
1540	{
1541	size_t cbSkipped = RT_MIN(cbCopy, *pcbSkip);
1542	cbCopy -= cbSkipped;
1543	GCPhys += cbSkipped;
1544	*pcbSkip -= cbSkipped;
1545
1546	while (cbCopy)
1547	{
1548	size_t cbSeg = cbCopy;
1549	void *pvSeg = RTSgBufGetNextSegment(pSgBuf, &cbSeg);
1550
1551	AssertPtr(pvSeg);
1552	blPhysWrite(pThis, GCPhys, pvSeg, cbSeg);
1553	GCPhys += cbSeg;
1554	cbCopy -= cbSeg;
1555	}
1556	}
1557
1558	/**
1559	* Walks the guest S/G buffer calling the given copy worker for every buffer.
1560	*
1561	* @returns The amout of bytes actually copied.
1562	* @param pThis Pointer to the Buslogic device state.
1563	* @param pReq Pointe to the request state.
1564	* @param pfnCopyWorker The copy method to apply for each guest buffer.
1565	* @param pSgBuf The host S/G buffer.
1566	* @param cbSkip How many bytes to skip in advance before starting to copy.
1567	* @param cbCopy How many bytes to copy.
1568	*/
1569	static size_t buslogicR3SgBufWalker(PBUSLOGIC pThis, PBUSLOGICREQ pReq,
1570	PBUSLOGICR3MEMCOPYCALLBACK pfnCopyWorker,
1571	PRTSGBUF pSgBuf, size_t cbSkip, size_t cbCopy)
1572	{
1573	PPDMDEVINS pDevIns = pThis->CTX_SUFF(pDevIns);
1574	uint32_t cbDataCCB;
1575	uint32_t u32PhysAddrCCB;
1576	size_t cbCopied = 0;
1577
1578	/*
1579	* Add the amount to skip to the host buffer size to avoid a
1580	* few conditionals later on.
1581	*/
1582	cbCopy += cbSkip;
1583
1584	/* Extract the data length and physical address from the CCB. */
1585	if (pReq->fIs24Bit)
1586	{
1587	u32PhysAddrCCB = ADDR_TO_U32(pReq->CCBGuest.o.aPhysAddrData);
1588	cbDataCCB = LEN_TO_U32(pReq->CCBGuest.o.acbData);
1589	}
1590	else
1591	{
1592	u32PhysAddrCCB = pReq->CCBGuest.n.u32PhysAddrData;
1593	cbDataCCB = pReq->CCBGuest.n.cbData;
1594	}
1595
1596	#if 1
1597	/* Hack for NT 10/91: A CCB describes a 2K buffer, but TEST UNIT READY is executed. This command
1598	* returns no data, hence the buffer must be left alone!
1599	*/
1600	if (pReq->CCBGuest.c.abCDB[0] == 0)
1601	cbDataCCB = 0;
1602	#endif
1603
1604	LogFlowFunc(("pReq=%#p cbDataCCB=%u direction=%u cbCopy=%zu\n", pReq, cbDataCCB,
1605	pReq->CCBGuest.c.uDataDirection, cbCopy));
1606
1607	if ( (cbDataCCB > 0)
1608	&& ( pReq->CCBGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_IN
1609	\|\| pReq->CCBGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_OUT
1610	\|\| pReq->CCBGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_UNKNOWN))
1611	{
1612	if ( (pReq->CCBGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_SCATTER_GATHER)
1613	\|\| (pReq->CCBGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_SCATTER_GATHER))
1614	{
1615	uint32_t cScatterGatherGCRead;
1616	uint32_t iScatterGatherEntry;
1617	SGE32 aScatterGatherReadGC[32]; /* Number of scatter gather list entries read from guest memory. */
1618	uint32_t cScatterGatherGCLeft = cbDataCCB / (pReq->fIs24Bit ? sizeof(SGE24) : sizeof(SGE32));
1619	RTGCPHYS GCPhysAddrScatterGatherCurrent = u32PhysAddrCCB;
1620
1621	do
1622	{
1623	cScatterGatherGCRead = (cScatterGatherGCLeft < RT_ELEMENTS(aScatterGatherReadGC))
1624	? cScatterGatherGCLeft
1625	: RT_ELEMENTS(aScatterGatherReadGC);
1626	cScatterGatherGCLeft -= cScatterGatherGCRead;
1627
1628	buslogicR3ReadSGEntries(pDevIns, pReq->fIs24Bit, GCPhysAddrScatterGatherCurrent,
1629	cScatterGatherGCRead, aScatterGatherReadGC);
1630
1631	for (iScatterGatherEntry = 0; iScatterGatherEntry < cScatterGatherGCRead && cbCopy > 0; iScatterGatherEntry++)
1632	{
1633	RTGCPHYS GCPhysAddrDataBase;
1634	size_t cbCopyThis;
1635
1636	Log(("%s: iScatterGatherEntry=%u\n", __FUNCTION__, iScatterGatherEntry));
1637
1638	GCPhysAddrDataBase = (RTGCPHYS)aScatterGatherReadGC[iScatterGatherEntry].u32PhysAddrSegmentBase;
1639	cbCopyThis = RT_MIN(cbCopy, aScatterGatherReadGC[iScatterGatherEntry].cbSegment);
1640
1641	Log(("%s: GCPhysAddrDataBase=%RGp cbCopyThis=%zu\n", __FUNCTION__, GCPhysAddrDataBase, cbCopyThis));
1642
1643	pfnCopyWorker(pThis, GCPhysAddrDataBase, pSgBuf, cbCopyThis, &cbSkip);
1644	cbCopied += cbCopyThis;
1645	cbCopy -= cbCopyThis;
1646	}
1647
1648	/* Set address to the next entries to read. */
1649	GCPhysAddrScatterGatherCurrent += cScatterGatherGCRead * (pReq->fIs24Bit ? sizeof(SGE24) : sizeof(SGE32));
1650	} while ( cScatterGatherGCLeft > 0
1651	&& cbCopy > 0);
1652
1653	}
1654	else if ( pReq->CCBGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB
1655	\|\| pReq->CCBGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_DATA_LENGTH)
1656	{
1657	/* The buffer is not scattered. */
1658	RTGCPHYS GCPhysAddrDataBase = u32PhysAddrCCB;
1659
1660	AssertMsg(GCPhysAddrDataBase != 0, ("Physical address is 0\n"));
1661
1662	Log(("Non-scattered buffer:\n"));
1663	Log(("u32PhysAddrData=%#x\n", u32PhysAddrCCB));
1664	Log(("cbData=%u\n", cbDataCCB));
1665	Log(("GCPhysAddrDataBase=0x%RGp\n", GCPhysAddrDataBase));
1666
1667	/* Copy the data into the guest memory. */
1668	pfnCopyWorker(pThis, GCPhysAddrDataBase, pSgBuf, RT_MIN(cbDataCCB, cbCopy), &cbSkip);
1669	cbCopied += RT_MIN(cbDataCCB, cbCopy);
1670	}
1671	}
1672
1673	return cbCopied - RT_MIN(cbSkip, cbCopied);
1674	}
1675
1676	/**
1677	* Copies a data buffer into the S/G buffer set up by the guest.
1678	*
1679	* @returns Amount of bytes copied to the guest.
1680	* @param pThis The BusLogic controller device instance.
1681	* @param pReq Request structure.
1682	* @param pSgBuf The S/G buffer to copy from.
1683	* @param cbSkip How many bytes to skip in advance before starting to copy.
1684	* @param cbCopy How many bytes to copy.
1685	*/
1686	static size_t buslogicR3CopySgBufToGuest(PBUSLOGIC pThis, PBUSLOGICREQ pReq, PRTSGBUF pSgBuf,
1687	size_t cbSkip, size_t cbCopy)
1688	{
1689	return buslogicR3SgBufWalker(pThis, pReq, buslogicR3CopyBufferToGuestWorker,
1690	pSgBuf, cbSkip, cbCopy);
1691	}
1692
1693	/**
1694	* Copies the guest S/G buffer into a host data buffer.
1695	*
1696	* @returns Amount of bytes copied from the guest.
1697	* @param pThis The BusLogic controller device instance.
1698	* @param pReq Request structure.
1699	* @param pSgBuf The S/G buffer to copy into.
1700	* @param cbSkip How many bytes to skip in advance before starting to copy.
1701	* @param cbCopy How many bytes to copy.
1702	*/
1703	static size_t buslogicR3CopySgBufFromGuest(PBUSLOGIC pThis, PBUSLOGICREQ pReq, PRTSGBUF pSgBuf,
1704	size_t cbSkip, size_t cbCopy)
1705	{
1706	return buslogicR3SgBufWalker(pThis, pReq, buslogicR3CopyBufferFromGuestWorker,
1707	pSgBuf, cbSkip, cbCopy);
1708	}
1709
1710	/** Convert sense buffer length taking into account shortcut values. */
1711	static uint32_t buslogicR3ConvertSenseBufferLength(uint32_t cbSense)
1712	{
1713	/* Convert special sense buffer length values. */
1714	if (cbSense == 0)
1715	cbSense = 14; /* 0 means standard 14-byte buffer. */
1716	else if (cbSense == 1)
1717	cbSense = 0; /* 1 means no sense data. */
1718	else if (cbSense < 8)
1719	AssertMsgFailed(("Reserved cbSense value of %d used!\n", cbSense));
1720
1721	return cbSense;
1722	}
1723
1724	/**
1725	* Free the sense buffer.
1726	*
1727	* @returns nothing.
1728	* @param pReq Pointer to the request state.
1729	* @param fCopy If sense data should be copied to guest memory.
1730	*/
1731	static void buslogicR3SenseBufferFree(PBUSLOGICREQ pReq, bool fCopy)
1732	{
1733	uint32_t cbSenseBuffer;
1734
1735	cbSenseBuffer = buslogicR3ConvertSenseBufferLength(pReq->CCBGuest.c.cbSenseData);
1736
1737	/* Copy the sense buffer into guest memory if requested. */
1738	if (fCopy && cbSenseBuffer)
1739	{
1740	PBUSLOGIC pThis = pReq->pTargetDevice->CTX_SUFF(pBusLogic);
1741	RTGCPHYS GCPhysAddrSenseBuffer;
1742
1743	/* With 32-bit CCBs, the (optional) sense buffer physical address is provided separately.
1744	* On the other hand, with 24-bit CCBs, the sense buffer is simply located at the end of
1745	* the CCB, right after the variable-length CDB.
1746	*/
1747	if (pReq->fIs24Bit)
1748	{
1749	GCPhysAddrSenseBuffer = pReq->GCPhysAddrCCB;
1750	GCPhysAddrSenseBuffer += pReq->CCBGuest.c.cbCDB + RT_OFFSETOF(CCB24, abCDB);
1751	}
1752	else
1753	GCPhysAddrSenseBuffer = pReq->CCBGuest.n.u32PhysAddrSenseData;
1754
1755	Log3(("%s: sense buffer: %.*Rhxs\n", __FUNCTION__, cbSenseBuffer, pReq->pbSenseBuffer));
1756	blPhysWrite(pThis, GCPhysAddrSenseBuffer, pReq->pbSenseBuffer, cbSenseBuffer);
1757	}
1758
1759	RTMemFree(pReq->pbSenseBuffer);
1760	pReq->pbSenseBuffer = NULL;
1761	}
1762
1763	/**
1764	* Alloc the sense buffer.
1765	*
1766	* @returns VBox status code.
1767	* @param pReq Pointer to the task state.
1768	*/
1769	static int buslogicR3SenseBufferAlloc(PBUSLOGICREQ pReq)
1770	{
1771	pReq->pbSenseBuffer = NULL;
1772
1773	uint32_t cbSenseBuffer = buslogicR3ConvertSenseBufferLength(pReq->CCBGuest.c.cbSenseData);
1774	if (cbSenseBuffer)
1775	{
1776	pReq->pbSenseBuffer = (uint8_t *)RTMemAllocZ(cbSenseBuffer);
1777	if (!pReq->pbSenseBuffer)
1778	return VERR_NO_MEMORY;
1779	}
1780
1781	return VINF_SUCCESS;
1782	}
1783
1784	#endif /* IN_RING3 */
1785
1786	/**
1787	* Parses the command buffer and executes it.
1788	*
1789	* @returns VBox status code.
1790	* @param pBusLogic Pointer to the BusLogic device instance.
1791	*/
1792	static int buslogicProcessCommand(PBUSLOGIC pBusLogic)
1793	{
1794	int rc = VINF_SUCCESS;
1795	bool fSuppressIrq = false;
1796
1797	LogFlowFunc(("pBusLogic=%#p\n", pBusLogic));
1798	AssertMsg(pBusLogic->uOperationCode != 0xff, ("There is no command to execute\n"));
1799
1800	switch (pBusLogic->uOperationCode)
1801	{
1802	case BUSLOGICCOMMAND_TEST_CMDC_INTERRUPT:
1803	/* Valid command, no reply. */
1804	pBusLogic->cbReplyParametersLeft = 0;
1805	break;
1806	case BUSLOGICCOMMAND_INQUIRE_PCI_HOST_ADAPTER_INFORMATION:
1807	{
1808	PReplyInquirePCIHostAdapterInformation pReply = (PReplyInquirePCIHostAdapterInformation)pBusLogic->aReplyBuffer;
1809	memset(pReply, 0, sizeof(ReplyInquirePCIHostAdapterInformation));
1810
1811	/* It seems VMware does not provide valid information here too, lets do the same :) */
1812	pReply->InformationIsValid = 0;
1813	pReply->IsaIOPort = pBusLogic->uISABaseCode;
1814	pReply->IRQ = PCIDevGetInterruptLine(&pBusLogic->dev);
1815	pBusLogic->cbReplyParametersLeft = sizeof(ReplyInquirePCIHostAdapterInformation);
1816	break;
1817	}
1818	case BUSLOGICCOMMAND_SET_SCSI_SELECTION_TIMEOUT:
1819	{
1820	/* no-op */
1821	pBusLogic->cbReplyParametersLeft = 0;
1822	break;
1823	}
1824	case BUSLOGICCOMMAND_MODIFY_IO_ADDRESS:
1825	{
1826	/* Modify the ISA-compatible I/O port base. Note that this technically
1827	* violates the PCI spec, as this address is not reported through PCI.
1828	* However, it is required for compatibility with old drivers.
1829	*/
1830	#ifdef IN_RING3
1831	Log(("ISA I/O for PCI (code %x)\n", pBusLogic->aCommandBuffer[0]));
1832	buslogicR3RegisterISARange(pBusLogic, pBusLogic->aCommandBuffer[0]);
1833	pBusLogic->cbReplyParametersLeft = 0;
1834	fSuppressIrq = true;
1835	break;
1836	#else
1837	AssertMsgFailed(("Must never get here!\n"));
1838	break;
1839	#endif
1840	}
1841	case BUSLOGICCOMMAND_INQUIRE_BOARD_ID:
1842	{
1843	/* The special option byte is important: If it is '0' or 'B', Windows NT drivers
1844	* for Adaptec AHA-154x may claim the adapter. The BusLogic drivers will claim
1845	* the adapter only when the byte is not '0' or 'B'.
1846	*/
1847	if (pBusLogic->uDevType == DEV_AHA_1540B)
1848	{
1849	pBusLogic->aReplyBuffer[0] = 'A'; /* Firmware option bytes */
1850	pBusLogic->aReplyBuffer[1] = '0'; /* Special option byte */
1851	}
1852	else
1853	{
1854	pBusLogic->aReplyBuffer[0] = 'A'; /* Firmware option bytes */
1855	pBusLogic->aReplyBuffer[1] = 'A'; /* Special option byte */
1856	}
1857
1858	/* We report version 5.07B. This reply will provide the first two digits. */
1859	pBusLogic->aReplyBuffer[2] = '5'; /* Major version 5 */
1860	pBusLogic->aReplyBuffer[3] = '0'; /* Minor version 0 */
1861	pBusLogic->cbReplyParametersLeft = 4; /* Reply is 4 bytes long */
1862	break;
1863	}
1864	case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_3RD_LETTER:
1865	{
1866	if (pBusLogic->uDevType == DEV_AHA_1540B)
1867	{
1868	/* Newer ASPI4DOS.SYS versions expect this command to fail. */
1869	Log(("Command %#x not valid for this adapter\n", pBusLogic->uOperationCode));
1870	pBusLogic->cbReplyParametersLeft = 0;
1871	pBusLogic->regStatus \|= BL_STAT_CMDINV;
1872	break;
1873	}
1874
1875	pBusLogic->aReplyBuffer[0] = '7';
1876	pBusLogic->cbReplyParametersLeft = 1;
1877	break;
1878	}
1879	case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_LETTER:
1880	{
1881	pBusLogic->aReplyBuffer[0] = 'B';
1882	pBusLogic->cbReplyParametersLeft = 1;
1883	break;
1884	}
1885	case BUSLOGICCOMMAND_SET_ADAPTER_OPTIONS:
1886	/* The parameter list length is determined by the first byte of the command buffer. */
1887	if (pBusLogic->iParameter == 1)
1888	{
1889	/* First pass - set the number of following parameter bytes. */
1890	pBusLogic->cbCommandParametersLeft = pBusLogic->aCommandBuffer[0];
1891	Log(("Set HA options: %u bytes follow\n", pBusLogic->cbCommandParametersLeft));
1892	}
1893	else
1894	{
1895	/* Second pass - process received data. */
1896	Log(("Set HA options: received %u bytes\n", pBusLogic->aCommandBuffer[0]));
1897	/* We ignore the data - it only concerns the SCSI hardware protocol. */
1898	}
1899	pBusLogic->cbReplyParametersLeft = 0;
1900	break;
1901
1902	case BUSLOGICCOMMAND_EXECUTE_SCSI_COMMAND:
1903	/* The parameter list length is at least 12 bytes; the 12th byte determines
1904	* the number of additional CDB bytes that will follow.
1905	*/
1906	if (pBusLogic->iParameter == 12)
1907	{
1908	/* First pass - set the number of following CDB bytes. */
1909	pBusLogic->cbCommandParametersLeft = pBusLogic->aCommandBuffer[11];
1910	Log(("Execute SCSI cmd: %u more bytes follow\n", pBusLogic->cbCommandParametersLeft));
1911	}
1912	else
1913	{
1914	PESCMD pCmd;
1915
1916	/* Second pass - process received data. */
1917	Log(("Execute SCSI cmd: received %u bytes\n", pBusLogic->aCommandBuffer[0]));
1918
1919	pCmd = (PESCMD)pBusLogic->aCommandBuffer;
1920	Log(("Addr %08X, cbData %08X, cbCDB=%u\n", pCmd->u32PhysAddrData, pCmd->cbData, pCmd->cbCDB));
1921	}
1922	// This is currently a dummy - just fails every command.
1923	pBusLogic->cbReplyParametersLeft = 4;
1924	pBusLogic->aReplyBuffer[0] = pBusLogic->aReplyBuffer[1] = 0;
1925	pBusLogic->aReplyBuffer[2] = 0x11; /* HBA status (timeout). */
1926	pBusLogic->aReplyBuffer[3] = 0; /* Device status. */
1927	break;
1928
1929	case BUSLOGICCOMMAND_INQUIRE_HOST_ADAPTER_MODEL_NUMBER:
1930	{
1931	/* Not supported on AHA-154x. */
1932	if (pBusLogic->uDevType == DEV_AHA_1540B)
1933	{
1934	Log(("Command %#x not valid for this adapter\n", pBusLogic->uOperationCode));
1935	pBusLogic->cbReplyParametersLeft = 0;
1936	pBusLogic->regStatus \|= BL_STAT_CMDINV;
1937	break;
1938	}
1939
1940	/* The reply length is set by the guest and is found in the first byte of the command buffer. */
1941	if (pBusLogic->aCommandBuffer[0] > sizeof(pBusLogic->aReplyBuffer))
1942	{
1943	Log(("Requested too much adapter model number data (%u)!\n", pBusLogic->aCommandBuffer[0]));
1944	pBusLogic->regStatus \|= BL_STAT_CMDINV;
1945	break;
1946	}
1947	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
1948	memset(pBusLogic->aReplyBuffer, 0, sizeof(pBusLogic->aReplyBuffer));
1949	const char aModelName[] = "958D "; /* Trailing \0 is fine, that's the filler anyway. */
1950	int cCharsToTransfer = pBusLogic->cbReplyParametersLeft <= sizeof(aModelName)
1951	? pBusLogic->cbReplyParametersLeft
1952	: sizeof(aModelName);
1953
1954	for (int i = 0; i < cCharsToTransfer; i++)
1955	pBusLogic->aReplyBuffer[i] = aModelName[i];
1956
1957	break;
1958	}
1959	case BUSLOGICCOMMAND_INQUIRE_CONFIGURATION:
1960	{
1961	uint8_t uIrq;
1962
1963	if (pBusLogic->uIsaIrq)
1964	uIrq = pBusLogic->uIsaIrq;
1965	else
1966	uIrq = PCIDevGetInterruptLine(&pBusLogic->dev);
1967
1968	pBusLogic->cbReplyParametersLeft = sizeof(ReplyInquireConfiguration);
1969	PReplyInquireConfiguration pReply = (PReplyInquireConfiguration)pBusLogic->aReplyBuffer;
1970	memset(pReply, 0, sizeof(ReplyInquireConfiguration));
1971
1972	pReply->uHostAdapterId = 7; /* The controller has always 7 as ID. */
1973	pReply->fDmaChannel6 = 1; /* DMA channel 6 is a good default. */
1974
1975	/* The PCI IRQ is not necessarily representable in this structure.
1976	* If that is the case, the guest likely won't function correctly,
1977	* therefore we log a warning. Note that for ISA configurations, we
1978	* can only allow IRQs that can be supported; for PCI, the HBA
1979	* has no control over IRQ assignment.
1980	*/
1981	switch (uIrq)
1982	{
1983	case 9: pReply->fIrqChannel9 = 1; break;
1984	case 10: pReply->fIrqChannel10 = 1; break;
1985	case 11: pReply->fIrqChannel11 = 1; break;
1986	case 12: pReply->fIrqChannel12 = 1; break;
1987	case 14: pReply->fIrqChannel14 = 1; break;
1988	case 15: pReply->fIrqChannel15 = 1; break;
1989	default:
1990	LogRel(("Warning: PCI IRQ %d cannot be represented as ISA!\n", uIrq));
1991	break;
1992	}
1993	break;
1994	}
1995	case BUSLOGICCOMMAND_INQUIRE_EXTENDED_SETUP_INFORMATION:
1996	{
1997	/* Some Adaptec AHA-154x drivers (e.g. OS/2) execute this command and expect
1998	* it to fail. If it succeeds, the drivers refuse to load. However, some newer
1999	* Adaptec 154x models supposedly support it too??
2000	*/
2001	if (pBusLogic->uDevType == DEV_AHA_1540B)
2002	{
2003	Log(("Command %#x not valid for this adapter\n", pBusLogic->uOperationCode));
2004	pBusLogic->cbReplyParametersLeft = 0;
2005	pBusLogic->regStatus \|= BL_STAT_CMDINV;
2006	break;
2007	}
2008
2009	/* The reply length is set by the guest and is found in the first byte of the command buffer. */
2010	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
2011	PReplyInquireExtendedSetupInformation pReply = (PReplyInquireExtendedSetupInformation)pBusLogic->aReplyBuffer;
2012	memset(pReply, 0, sizeof(ReplyInquireExtendedSetupInformation));
2013
2014	/** @todo should this reflect the RAM contents (AutoSCSIRam)? */
2015	pReply->uBusType = 'E'; /* EISA style */
2016	pReply->u16ScatterGatherLimit = 8192;
2017	pReply->cMailbox = pBusLogic->cMailbox;
2018	pReply->uMailboxAddressBase = (uint32_t)pBusLogic->GCPhysAddrMailboxOutgoingBase;
2019	pReply->fLevelSensitiveInterrupt = true;
2020	pReply->fHostWideSCSI = true;
2021	pReply->fHostUltraSCSI = true;
2022	memcpy(pReply->aFirmwareRevision, "07B", sizeof(pReply->aFirmwareRevision));
2023
2024	break;
2025	}
2026	case BUSLOGICCOMMAND_INQUIRE_SETUP_INFORMATION:
2027	{
2028	/* The reply length is set by the guest and is found in the first byte of the command buffer. */
2029	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
2030	PReplyInquireSetupInformation pReply = (PReplyInquireSetupInformation)pBusLogic->aReplyBuffer;
2031	memset(pReply, 0, sizeof(ReplyInquireSetupInformation));
2032	pReply->fSynchronousInitiationEnabled = true;
2033	pReply->fParityCheckingEnabled = true;
2034	pReply->cMailbox = pBusLogic->cMailbox;
2035	U32_TO_ADDR(pReply->MailboxAddress, pBusLogic->GCPhysAddrMailboxOutgoingBase);
2036	/* The 'D' signature (actually 'SD' for Storage Dimensions, and 'BD' for BusLogic)
2037	* prevents Adaptec's OS/2 drivers from getting too friendly with BusLogic hardware
2038	* and upsetting the HBA state.
2039	*/
2040	if (pBusLogic->uDevType == DEV_AHA_1540B)
2041	{
2042	pReply->uSignature = 0; /* Zeros for Adaptec. */
2043	pReply->uCharacterD = 0;
2044	}
2045	else
2046	{
2047	pReply->uSignature = 'B';
2048	pReply->uCharacterD = 'D'; /* BusLogic model. */
2049	}
2050	pReply->uHostBusType = 'F'; /* PCI bus. */
2051	break;
2052	}
2053	case BUSLOGICCOMMAND_FETCH_HOST_ADAPTER_LOCAL_RAM:
2054	{
2055	/*
2056	* First element in the command buffer contains start offset to read from
2057	* and second one the number of bytes to read.
2058	*/
2059	uint8_t uOffset = pBusLogic->aCommandBuffer[0];
2060	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[1];
2061
2062	pBusLogic->fUseLocalRam = true;
2063	pBusLogic->iReply = uOffset;
2064	break;
2065	}
2066	case BUSLOGICCOMMAND_INITIALIZE_MAILBOX:
2067	{
2068	PRequestInitMbx pRequest = (PRequestInitMbx)pBusLogic->aCommandBuffer;
2069
2070	pBusLogic->cbReplyParametersLeft = 0;
2071	if (!pRequest->cMailbox)
2072	{
2073	Log(("cMailboxes=%u (24-bit mode), fail!\n", pBusLogic->cMailbox));
2074	pBusLogic->regStatus \|= BL_STAT_CMDINV;
2075	break;
2076	}
2077	pBusLogic->fMbxIs24Bit = true;
2078	pBusLogic->cMailbox = pRequest->cMailbox;
2079	pBusLogic->GCPhysAddrMailboxOutgoingBase = (RTGCPHYS)ADDR_TO_U32(pRequest->aMailboxBaseAddr);
2080	/* The area for incoming mailboxes is right after the last entry of outgoing mailboxes. */
2081	pBusLogic->GCPhysAddrMailboxIncomingBase = pBusLogic->GCPhysAddrMailboxOutgoingBase + (pBusLogic->cMailbox * sizeof(Mailbox24));
2082
2083	Log(("GCPhysAddrMailboxOutgoingBase=%RGp\n", pBusLogic->GCPhysAddrMailboxOutgoingBase));
2084	Log(("GCPhysAddrMailboxIncomingBase=%RGp\n", pBusLogic->GCPhysAddrMailboxIncomingBase));
2085	Log(("cMailboxes=%u (24-bit mode)\n", pBusLogic->cMailbox));
2086	LogRel(("Initialized 24-bit mailbox, %d entries at %08x\n", pRequest->cMailbox, ADDR_TO_U32(pRequest->aMailboxBaseAddr)));
2087
2088	pBusLogic->regStatus &= ~BL_STAT_INREQ;
2089	break;
2090	}
2091	case BUSLOGICCOMMAND_INITIALIZE_EXTENDED_MAILBOX:
2092	{
2093	if (pBusLogic->uDevType == DEV_AHA_1540B)
2094	{
2095	Log(("Command %#x not valid for this adapter\n", pBusLogic->uOperationCode));
2096	pBusLogic->cbReplyParametersLeft = 0;
2097	pBusLogic->regStatus \|= BL_STAT_CMDINV;
2098	break;
2099	}
2100
2101	PRequestInitializeExtendedMailbox pRequest = (PRequestInitializeExtendedMailbox)pBusLogic->aCommandBuffer;
2102
2103	pBusLogic->cbReplyParametersLeft = 0;
2104	if (!pRequest->cMailbox)
2105	{
2106	Log(("cMailboxes=%u (32-bit mode), fail!\n", pBusLogic->cMailbox));
2107	pBusLogic->regStatus \|= BL_STAT_CMDINV;
2108	break;
2109	}
2110	pBusLogic->fMbxIs24Bit = false;
2111	pBusLogic->cMailbox = pRequest->cMailbox;
2112	pBusLogic->GCPhysAddrMailboxOutgoingBase = (RTGCPHYS)pRequest->uMailboxBaseAddress;
2113	/* The area for incoming mailboxes is right after the last entry of outgoing mailboxes. */
2114	pBusLogic->GCPhysAddrMailboxIncomingBase = (RTGCPHYS)pRequest->uMailboxBaseAddress + (pBusLogic->cMailbox * sizeof(Mailbox32));
2115
2116	Log(("GCPhysAddrMailboxOutgoingBase=%RGp\n", pBusLogic->GCPhysAddrMailboxOutgoingBase));
2117	Log(("GCPhysAddrMailboxIncomingBase=%RGp\n", pBusLogic->GCPhysAddrMailboxIncomingBase));
2118	Log(("cMailboxes=%u (32-bit mode)\n", pBusLogic->cMailbox));
2119	LogRel(("Initialized 32-bit mailbox, %d entries at %08x\n", pRequest->cMailbox, pRequest->uMailboxBaseAddress));
2120
2121	pBusLogic->regStatus &= ~BL_STAT_INREQ;
2122	break;
2123	}
2124	case BUSLOGICCOMMAND_ENABLE_STRICT_ROUND_ROBIN_MODE:
2125	{
2126	if (pBusLogic->aCommandBuffer[0] == 0)
2127	pBusLogic->fStrictRoundRobinMode = false;
2128	else if (pBusLogic->aCommandBuffer[0] == 1)
2129	pBusLogic->fStrictRoundRobinMode = true;
2130	else
2131	AssertMsgFailed(("Invalid round robin mode %d\n", pBusLogic->aCommandBuffer[0]));
2132
2133	pBusLogic->cbReplyParametersLeft = 0;
2134	break;
2135	}
2136	case BUSLOGICCOMMAND_SET_CCB_FORMAT:
2137	{
2138	if (pBusLogic->aCommandBuffer[0] == 0)
2139	pBusLogic->fExtendedLunCCBFormat = false;
2140	else if (pBusLogic->aCommandBuffer[0] == 1)
2141	pBusLogic->fExtendedLunCCBFormat = true;
2142	else
2143	AssertMsgFailed(("Invalid CCB format %d\n", pBusLogic->aCommandBuffer[0]));
2144
2145	pBusLogic->cbReplyParametersLeft = 0;
2146	break;
2147	}
2148	case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_0_TO_7:
2149	/* This is supposed to send TEST UNIT READY to each target/LUN.
2150	* We cheat and skip that, since we already know what's attached
2151	*/
2152	memset(pBusLogic->aReplyBuffer, 0, 8);
2153	for (int i = 0; i < 8; ++i)
2154	{
2155	if (pBusLogic->aDeviceStates[i].fPresent)
2156	pBusLogic->aReplyBuffer[i] = 1;
2157	}
2158	pBusLogic->aReplyBuffer[7] = 0; /* HA hardcoded at ID 7. */
2159	pBusLogic->cbReplyParametersLeft = 8;
2160	break;
2161	case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_8_TO_15:
2162	/* See note about cheating above. */
2163	memset(pBusLogic->aReplyBuffer, 0, 8);
2164	for (int i = 0; i < 8; ++i)
2165	{
2166	if (pBusLogic->aDeviceStates[i + 8].fPresent)
2167	pBusLogic->aReplyBuffer[i] = 1;
2168	}
2169	pBusLogic->cbReplyParametersLeft = 8;
2170	break;
2171	case BUSLOGICCOMMAND_INQUIRE_TARGET_DEVICES:
2172	{
2173	/* Each bit which is set in the 16bit wide variable means a present device. */
2174	uint16_t u16TargetsPresentMask = 0;
2175
2176	for (uint8_t i = 0; i < RT_ELEMENTS(pBusLogic->aDeviceStates); i++)
2177	{
2178	if (pBusLogic->aDeviceStates[i].fPresent)
2179	u16TargetsPresentMask \|= (1 << i);
2180	}
2181	pBusLogic->aReplyBuffer[0] = (uint8_t)u16TargetsPresentMask;
2182	pBusLogic->aReplyBuffer[1] = (uint8_t)(u16TargetsPresentMask >> 8);
2183	pBusLogic->cbReplyParametersLeft = 2;
2184	break;
2185	}
2186	case BUSLOGICCOMMAND_INQUIRE_SYNCHRONOUS_PERIOD:
2187	{
2188	if (pBusLogic->aCommandBuffer[0] > sizeof(pBusLogic->aReplyBuffer))
2189	{
2190	Log(("Requested too much synch period inquiry (%u)!\n", pBusLogic->aCommandBuffer[0]));
2191	pBusLogic->regStatus \|= BL_STAT_CMDINV;
2192	break;
2193	}
2194	pBusLogic->cbReplyParametersLeft = pBusLogic->aCommandBuffer[0];
2195	for (uint8_t i = 0; i < pBusLogic->cbReplyParametersLeft; i++)
2196	pBusLogic->aReplyBuffer[i] = 0; /** @todo Figure if we need something other here. It's not needed for the linux driver */
2197
2198	break;
2199	}
2200	case BUSLOGICCOMMAND_DISABLE_HOST_ADAPTER_INTERRUPT:
2201	{
2202	/* Not supported on AHA-154x HBAs. */
2203	if (pBusLogic->uDevType == DEV_AHA_1540B)
2204	{
2205	Log(("Command %#x not valid for this adapter\n", pBusLogic->uOperationCode));
2206	pBusLogic->cbReplyParametersLeft = 0;
2207	pBusLogic->regStatus \|= BL_STAT_CMDINV;
2208	break;
2209	}
2210
2211	pBusLogic->cbReplyParametersLeft = 0;
2212	if (pBusLogic->aCommandBuffer[0] == 0)
2213	pBusLogic->fIRQEnabled = false;
2214	else
2215	pBusLogic->fIRQEnabled = true;
2216	/* No interrupt signaled regardless of enable/disable. */
2217	fSuppressIrq = true;
2218	break;
2219	}
2220	case BUSLOGICCOMMAND_ECHO_COMMAND_DATA:
2221	{
2222	pBusLogic->aReplyBuffer[0] = pBusLogic->aCommandBuffer[0];
2223	pBusLogic->cbReplyParametersLeft = 1;
2224	break;
2225	}
2226	case BUSLOGICCOMMAND_ENABLE_OUTGOING_MAILBOX_AVAILABLE_INTERRUPT:
2227	{
2228	uint8_t uEnable = pBusLogic->aCommandBuffer[0];
2229
2230	pBusLogic->cbReplyParametersLeft = 0;
2231	Log(("Enable OMBR: %u\n", uEnable));
2232	/* Only 0/1 are accepted. */
2233	if (uEnable > 1)
2234	pBusLogic->regStatus \|= BL_STAT_CMDINV;
2235	else
2236	{
2237	pBusLogic->LocalRam.structured.autoSCSIData.uReserved6 = uEnable;
2238	fSuppressIrq = true;
2239	}
2240	break;
2241	}
2242	case BUSLOGICCOMMAND_SET_PREEMPT_TIME_ON_BUS:
2243	{
2244	pBusLogic->cbReplyParametersLeft = 0;
2245	pBusLogic->LocalRam.structured.autoSCSIData.uBusOnDelay = pBusLogic->aCommandBuffer[0];
2246	Log(("Bus-on time: %d\n", pBusLogic->aCommandBuffer[0]));
2247	break;
2248	}
2249	case BUSLOGICCOMMAND_SET_TIME_OFF_BUS:
2250	{
2251	pBusLogic->cbReplyParametersLeft = 0;
2252	pBusLogic->LocalRam.structured.autoSCSIData.uBusOffDelay = pBusLogic->aCommandBuffer[0];
2253	Log(("Bus-off time: %d\n", pBusLogic->aCommandBuffer[0]));
2254	break;
2255	}
2256	case BUSLOGICCOMMAND_SET_BUS_TRANSFER_RATE:
2257	{
2258	pBusLogic->cbReplyParametersLeft = 0;
2259	pBusLogic->LocalRam.structured.autoSCSIData.uDMATransferRate = pBusLogic->aCommandBuffer[0];
2260	Log(("Bus transfer rate: %02X\n", pBusLogic->aCommandBuffer[0]));
2261	break;
2262	}
2263	case BUSLOGICCOMMAND_WRITE_BUSMASTER_CHIP_FIFO:
2264	{
2265	RTGCPHYS GCPhysFifoBuf;
2266	Addr24 addr;
2267
2268	pBusLogic->cbReplyParametersLeft = 0;
2269	addr.hi = pBusLogic->aCommandBuffer[0];
2270	addr.mid = pBusLogic->aCommandBuffer[1];
2271	addr.lo = pBusLogic->aCommandBuffer[2];
2272	GCPhysFifoBuf = (RTGCPHYS)ADDR_TO_U32(addr);
2273	Log(("Write busmaster FIFO at: %04X\n", ADDR_TO_U32(addr)));
2274	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysFifoBuf,
2275	&pBusLogic->LocalRam.u8View[64], 64);
2276	break;
2277	}
2278	case BUSLOGICCOMMAND_READ_BUSMASTER_CHIP_FIFO:
2279	{
2280	RTGCPHYS GCPhysFifoBuf;
2281	Addr24 addr;
2282
2283	pBusLogic->cbReplyParametersLeft = 0;
2284	addr.hi = pBusLogic->aCommandBuffer[0];
2285	addr.mid = pBusLogic->aCommandBuffer[1];
2286	addr.lo = pBusLogic->aCommandBuffer[2];
2287	GCPhysFifoBuf = (RTGCPHYS)ADDR_TO_U32(addr);
2288	Log(("Read busmaster FIFO at: %04X\n", ADDR_TO_U32(addr)));
2289	blPhysWrite(pBusLogic, GCPhysFifoBuf, &pBusLogic->LocalRam.u8View[64], 64);
2290	break;
2291	}
2292	default:
2293	AssertMsgFailed(("Invalid command %#x\n", pBusLogic->uOperationCode));
2294	RT_FALL_THRU();
2295	case BUSLOGICCOMMAND_EXT_BIOS_INFO:
2296	case BUSLOGICCOMMAND_UNLOCK_MAILBOX:
2297	/* Commands valid for Adaptec 154xC which we don't handle since
2298	* we pretend being 154xB compatible. Just mark the command as invalid.
2299	*/
2300	Log(("Command %#x not valid for this adapter\n", pBusLogic->uOperationCode));
2301	pBusLogic->cbReplyParametersLeft = 0;
2302	pBusLogic->regStatus \|= BL_STAT_CMDINV;
2303	break;
2304	case BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND: /* Should be handled already. */
2305	AssertMsgFailed(("Invalid mailbox execute state!\n"));
2306	}
2307
2308	Log(("uOperationCode=%#x, cbReplyParametersLeft=%d\n", pBusLogic->uOperationCode, pBusLogic->cbReplyParametersLeft));
2309
2310	/* Fail command if too much parameter data requested. */
2311	if ((pBusLogic->cbCommandParametersLeft + pBusLogic->iParameter) > sizeof(pBusLogic->aCommandBuffer))
2312	{
2313	Log(("Invalid command parameter length (%u)\n", pBusLogic->cbCommandParametersLeft));
2314	pBusLogic->cbReplyParametersLeft = 0;
2315	pBusLogic->cbCommandParametersLeft = 0;
2316	pBusLogic->regStatus \|= BL_STAT_CMDINV;
2317	}
2318
2319	/* Set the data in ready bit in the status register in case the command has a reply. */
2320	if (pBusLogic->cbReplyParametersLeft)
2321	pBusLogic->regStatus \|= BL_STAT_DIRRDY;
2322	else if (!pBusLogic->cbCommandParametersLeft)
2323	buslogicCommandComplete(pBusLogic, fSuppressIrq);
2324
2325	return rc;
2326	}
2327
2328	/**
2329	* Read a register from the BusLogic adapter.
2330	*
2331	* @returns VBox status code.
2332	* @param pBusLogic Pointer to the BusLogic instance data.
2333	* @param iRegister The index of the register to read.
2334	* @param pu32 Where to store the register content.
2335	*/
2336	static int buslogicRegisterRead(PBUSLOGIC pBusLogic, unsigned iRegister, uint32_t *pu32)
2337	{
2338	static const char achAhaSig[] = "ADAP";
2339	int rc = VINF_SUCCESS;
2340
2341	switch (iRegister)
2342	{
2343	case BUSLOGIC_REGISTER_STATUS:
2344	{
2345	*pu32 = pBusLogic->regStatus;
2346
2347	/* If the diagnostic active bit is set, we are in a guest-initiated
2348	* hard reset. If the guest reads the status register and waits for
2349	* the host adapter ready bit to be set, we terminate the reset right
2350	* away. However, guests may also expect the reset condition to clear
2351	* automatically after a period of time, in which case we can't show
2352	* the DIAG bit at all.
2353	*/
2354	if (pBusLogic->regStatus & BL_STAT_DACT)
2355	{
2356	uint64_t u64AccessTime = PDMDevHlpTMTimeVirtGetNano(pBusLogic->CTX_SUFF(pDevIns));
2357
2358	pBusLogic->regStatus &= ~BL_STAT_DACT;
2359	pBusLogic->regStatus \|= BL_STAT_HARDY;
2360
2361	if (u64AccessTime - pBusLogic->u64ResetTime > BUSLOGIC_RESET_DURATION_NS)
2362	{
2363	/* If reset already expired, let the guest see that right away. */
2364	*pu32 = pBusLogic->regStatus;
2365	pBusLogic->u64ResetTime = 0;
2366	}
2367	}
2368	break;
2369	}
2370	case BUSLOGIC_REGISTER_DATAIN:
2371	{
2372	if (pBusLogic->fUseLocalRam)
2373	*pu32 = pBusLogic->LocalRam.u8View[pBusLogic->iReply];
2374	else
2375	*pu32 = pBusLogic->aReplyBuffer[pBusLogic->iReply];
2376
2377	/* Careful about underflow - guest can read data register even if
2378	* no data is available.
2379	*/
2380	if (pBusLogic->cbReplyParametersLeft)
2381	{
2382	pBusLogic->iReply++;
2383	pBusLogic->cbReplyParametersLeft--;
2384	if (!pBusLogic->cbReplyParametersLeft)
2385	{
2386	/*
2387	* Reply finished, set command complete bit, unset data-in ready bit and
2388	* interrupt the guest if enabled.
2389	* NB: Some commands do not set the CMDC bit / raise completion interrupt.
2390	*/
2391	if (pBusLogic->uOperationCode == BUSLOGICCOMMAND_FETCH_HOST_ADAPTER_LOCAL_RAM)
2392	buslogicCommandComplete(pBusLogic, true /* fSuppressIrq */);
2393	else
2394	buslogicCommandComplete(pBusLogic, false);
2395	}
2396	}
2397	LogFlowFunc(("data=%02x, iReply=%d, cbReplyParametersLeft=%u\n", *pu32,
2398	pBusLogic->iReply, pBusLogic->cbReplyParametersLeft));
2399	break;
2400	}
2401	case BUSLOGIC_REGISTER_INTERRUPT:
2402	{
2403	*pu32 = pBusLogic->regInterrupt;
2404	break;
2405	}
2406	case BUSLOGIC_REGISTER_GEOMETRY:
2407	{
2408	if (pBusLogic->uDevType == DEV_AHA_1540B)
2409	{
2410	*pu32 = achAhaSig[pBusLogic->uAhaSigIdx];
2411	pBusLogic->uAhaSigIdx = (pBusLogic->uAhaSigIdx + 1) & 3;
2412	}
2413	else
2414	*pu32 = pBusLogic->regGeometry;
2415	break;
2416	}
2417	default:
2418	*pu32 = UINT32_C(0xffffffff);
2419	}
2420
2421	Log2(("%s: pu32=%p:{%.*Rhxs} iRegister=%d rc=%Rrc\n",
2422	__FUNCTION__, pu32, 1, pu32, iRegister, rc));
2423
2424	return rc;
2425	}
2426
2427	/**
2428	* Write a value to a register.
2429	*
2430	* @returns VBox status code.
2431	* @param pBusLogic Pointer to the BusLogic instance data.
2432	* @param iRegister The index of the register to read.
2433	* @param uVal The value to write.
2434	*/
2435	static int buslogicRegisterWrite(PBUSLOGIC pBusLogic, unsigned iRegister, uint8_t uVal)
2436	{
2437	int rc = VINF_SUCCESS;
2438
2439	switch (iRegister)
2440	{
2441	case BUSLOGIC_REGISTER_CONTROL:
2442	{
2443	if ((uVal & BL_CTRL_RHARD) \|\| (uVal & BL_CTRL_RSOFT))
2444	{
2445	#ifdef IN_RING3
2446	bool fHardReset = !!(uVal & BL_CTRL_RHARD);
2447
2448	LogRel(("BusLogic: %s reset\n", fHardReset ? "hard" : "soft"));
2449	buslogicR3InitiateReset(pBusLogic, fHardReset);
2450	#else
2451	rc = VINF_IOM_R3_IOPORT_WRITE;
2452	#endif
2453	break;
2454	}
2455
2456	rc = PDMCritSectEnter(&pBusLogic->CritSectIntr, VINF_IOM_R3_IOPORT_WRITE);
2457	if (rc != VINF_SUCCESS)
2458	return rc;
2459
2460	#ifdef LOG_ENABLED
2461	uint32_t cMailboxesReady = ASMAtomicXchgU32(&pBusLogic->cInMailboxesReady, 0);
2462	Log(("%u incoming mailboxes were ready when this interrupt was cleared\n", cMailboxesReady));
2463	#endif
2464
2465	if (uVal & BL_CTRL_RINT)
2466	buslogicClearInterrupt(pBusLogic);
2467
2468	PDMCritSectLeave(&pBusLogic->CritSectIntr);
2469
2470	break;
2471	}
2472	case BUSLOGIC_REGISTER_COMMAND:
2473	{
2474	/* Fast path for mailbox execution command. */
2475	if ((uVal == BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND) && (pBusLogic->uOperationCode == 0xff))
2476	{
2477	/// @todo Should fail if BL_STAT_INREQ is set
2478	/* If there are no mailboxes configured, don't even try to do anything. */
2479	if (pBusLogic->cMailbox)
2480	{
2481	ASMAtomicIncU32(&pBusLogic->cMailboxesReady);
2482	if (!ASMAtomicXchgBool(&pBusLogic->fNotificationSent, true))
2483	{
2484	/* Send new notification to the queue. */
2485	PPDMQUEUEITEMCORE pItem = PDMQueueAlloc(pBusLogic->CTX_SUFF(pNotifierQueue));
2486	AssertMsg(pItem, ("Allocating item for queue failed\n"));
2487	PDMQueueInsert(pBusLogic->CTX_SUFF(pNotifierQueue), (PPDMQUEUEITEMCORE)pItem);
2488	}
2489	}
2490
2491	return rc;
2492	}
2493
2494	/*
2495	* Check if we are already fetch command parameters from the guest.
2496	* If not we initialize executing a new command.
2497	*/
2498	if (pBusLogic->uOperationCode == 0xff)
2499	{
2500	pBusLogic->uOperationCode = uVal;
2501	pBusLogic->iParameter = 0;
2502
2503	/* Mark host adapter as busy and clear the invalid status bit. */
2504	pBusLogic->regStatus &= ~(BL_STAT_HARDY \| BL_STAT_CMDINV);
2505
2506	/* Get the number of bytes for parameters from the command code. */
2507	switch (pBusLogic->uOperationCode)
2508	{
2509	case BUSLOGICCOMMAND_TEST_CMDC_INTERRUPT:
2510	case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_LETTER:
2511	case BUSLOGICCOMMAND_INQUIRE_BOARD_ID:
2512	case BUSLOGICCOMMAND_INQUIRE_FIRMWARE_VERSION_3RD_LETTER:
2513	case BUSLOGICCOMMAND_INQUIRE_PCI_HOST_ADAPTER_INFORMATION:
2514	case BUSLOGICCOMMAND_INQUIRE_CONFIGURATION:
2515	case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_0_TO_7:
2516	case BUSLOGICCOMMAND_INQUIRE_INSTALLED_DEVICES_ID_8_TO_15:
2517	case BUSLOGICCOMMAND_INQUIRE_TARGET_DEVICES:
2518	pBusLogic->cbCommandParametersLeft = 0;
2519	break;
2520	case BUSLOGICCOMMAND_MODIFY_IO_ADDRESS:
2521	case BUSLOGICCOMMAND_INQUIRE_EXTENDED_SETUP_INFORMATION:
2522	case BUSLOGICCOMMAND_DISABLE_HOST_ADAPTER_INTERRUPT:
2523	case BUSLOGICCOMMAND_INQUIRE_HOST_ADAPTER_MODEL_NUMBER:
2524	/* These commands are not on AHA-154x, some Adaptec drivers (ASPI4DOS.SYS) test them. */
2525	if (pBusLogic->uDevType == DEV_AHA_1540B)
2526	{
2527	pBusLogic->cbCommandParametersLeft = 0;
2528	break;
2529	}
2530	RT_FALL_THRU();
2531	case BUSLOGICCOMMAND_INQUIRE_SETUP_INFORMATION:
2532	case BUSLOGICCOMMAND_ENABLE_STRICT_ROUND_ROBIN_MODE:
2533	case BUSLOGICCOMMAND_SET_CCB_FORMAT:
2534	case BUSLOGICCOMMAND_INQUIRE_SYNCHRONOUS_PERIOD:
2535	case BUSLOGICCOMMAND_ECHO_COMMAND_DATA:
2536	case BUSLOGICCOMMAND_ENABLE_OUTGOING_MAILBOX_AVAILABLE_INTERRUPT:
2537	case BUSLOGICCOMMAND_SET_PREEMPT_TIME_ON_BUS:
2538	case BUSLOGICCOMMAND_SET_TIME_OFF_BUS:
2539	case BUSLOGICCOMMAND_SET_BUS_TRANSFER_RATE:
2540	pBusLogic->cbCommandParametersLeft = 1;
2541	break;
2542	case BUSLOGICCOMMAND_FETCH_HOST_ADAPTER_LOCAL_RAM:
2543	pBusLogic->cbCommandParametersLeft = 2;
2544	break;
2545	case BUSLOGICCOMMAND_READ_BUSMASTER_CHIP_FIFO:
2546	case BUSLOGICCOMMAND_WRITE_BUSMASTER_CHIP_FIFO:
2547	pBusLogic->cbCommandParametersLeft = 3;
2548	break;
2549	case BUSLOGICCOMMAND_SET_SCSI_SELECTION_TIMEOUT:
2550	pBusLogic->cbCommandParametersLeft = 4;
2551	break;
2552	case BUSLOGICCOMMAND_INITIALIZE_MAILBOX:
2553	pBusLogic->cbCommandParametersLeft = sizeof(RequestInitMbx);
2554	break;
2555	case BUSLOGICCOMMAND_INITIALIZE_EXTENDED_MAILBOX:
2556	/* Some Adaptec drivers (ASPI4DOS.SYS) test this command. */
2557	if (pBusLogic->uDevType == DEV_AHA_1540B)
2558	{
2559	pBusLogic->cbCommandParametersLeft = 0;
2560	break;
2561	}
2562	pBusLogic->cbCommandParametersLeft = sizeof(RequestInitializeExtendedMailbox);
2563	break;
2564	case BUSLOGICCOMMAND_SET_ADAPTER_OPTIONS:
2565	/* There must be at least one byte following this command. */
2566	pBusLogic->cbCommandParametersLeft = 1;
2567	break;
2568	case BUSLOGICCOMMAND_EXECUTE_SCSI_COMMAND:
2569	/* 12 bytes + variable-length CDB. */
2570	pBusLogic->cbCommandParametersLeft = 12;
2571	break;
2572	case BUSLOGICCOMMAND_EXT_BIOS_INFO:
2573	case BUSLOGICCOMMAND_UNLOCK_MAILBOX:
2574	/* Invalid commands. */
2575	pBusLogic->cbCommandParametersLeft = 0;
2576	break;
2577	case BUSLOGICCOMMAND_EXECUTE_MAILBOX_COMMAND: /* Should not come here anymore. */
2578	default:
2579	AssertMsgFailed(("Invalid operation code %#x\n", uVal));
2580	}
2581	}
2582	else
2583	{
2584	#ifndef IN_RING3
2585	/* This command must be executed in R3 as it rehooks the ISA I/O port. */
2586	if (pBusLogic->uOperationCode == BUSLOGICCOMMAND_MODIFY_IO_ADDRESS)
2587	{
2588	rc = VINF_IOM_R3_IOPORT_WRITE;
2589	break;
2590	}
2591	#endif
2592	/*
2593	* The real adapter would set the Command register busy bit in the status register.
2594	* The guest has to wait until it is unset.
2595	* We don't need to do it because the guest does not continue execution while we are in this
2596	* function.
2597	*/
2598	pBusLogic->aCommandBuffer[pBusLogic->iParameter] = uVal;
2599	pBusLogic->iParameter++;
2600	pBusLogic->cbCommandParametersLeft--;
2601	}
2602
2603	/* Start execution of command if there are no parameters left. */
2604	if (!pBusLogic->cbCommandParametersLeft)
2605	{
2606	rc = buslogicProcessCommand(pBusLogic);
2607	AssertMsgRC(rc, ("Processing command failed rc=%Rrc\n", rc));
2608	}
2609	break;
2610	}
2611
2612	/* On BusLogic adapters, the interrupt and geometry registers are R/W.
2613	* That is different from Adaptec 154x where those are read only.
2614	*/
2615	case BUSLOGIC_REGISTER_INTERRUPT:
2616	if (pBusLogic->uDevType == DEV_AHA_1540B)
2617	break;
2618	pBusLogic->regInterrupt = uVal;
2619	break;
2620
2621	case BUSLOGIC_REGISTER_GEOMETRY:
2622	if (pBusLogic->uDevType == DEV_AHA_1540B)
2623	break;
2624	pBusLogic->regGeometry = uVal;
2625	break;
2626
2627	default:
2628	AssertMsgFailed(("Register not available\n"));
2629	rc = VERR_IOM_IOPORT_UNUSED;
2630	}
2631
2632	return rc;
2633	}
2634
2635	/**
2636	* Memory mapped I/O Handler for read operations.
2637	*
2638	* @returns VBox status code.
2639	*
2640	* @param pDevIns The device instance.
2641	* @param pvUser User argument.
2642	* @param GCPhysAddr Physical address (in GC) where the read starts.
2643	* @param pv Where to store the result.
2644	* @param cb Number of bytes read.
2645	*/
2646	PDMBOTHCBDECL(int) buslogicMMIORead(PPDMDEVINS pDevIns, void pvUser, RTGCPHYS GCPhysAddr, void pv, unsigned cb)
2647	{
2648	RT_NOREF_PV(pDevIns); RT_NOREF_PV(pvUser); RT_NOREF_PV(GCPhysAddr); RT_NOREF_PV(pv); RT_NOREF_PV(cb);
2649
2650	/* the linux driver does not make use of the MMIO area. */
2651	AssertMsgFailed(("MMIO Read\n"));
2652	return VINF_SUCCESS;
2653	}
2654
2655	/**
2656	* Memory mapped I/O Handler for write operations.
2657	*
2658	* @returns VBox status code.
2659	*
2660	* @param pDevIns The device instance.
2661	* @param pvUser User argument.
2662	* @param GCPhysAddr Physical address (in GC) where the read starts.
2663	* @param pv Where to fetch the result.
2664	* @param cb Number of bytes to write.
2665	*/
2666	PDMBOTHCBDECL(int) buslogicMMIOWrite(PPDMDEVINS pDevIns, void pvUser, RTGCPHYS GCPhysAddr, void const pv, unsigned cb)
2667	{
2668	RT_NOREF_PV(pDevIns); RT_NOREF_PV(pvUser); RT_NOREF_PV(GCPhysAddr); RT_NOREF_PV(pv); RT_NOREF_PV(cb);
2669
2670	/* the linux driver does not make use of the MMIO area. */
2671	AssertMsgFailed(("MMIO Write\n"));
2672	return VINF_SUCCESS;
2673	}
2674
2675	/**
2676	* Port I/O Handler for IN operations.
2677	*
2678	* @returns VBox status code.
2679	*
2680	* @param pDevIns The device instance.
2681	* @param pvUser User argument.
2682	* @param uPort Port number used for the IN operation.
2683	* @param pu32 Where to store the result.
2684	* @param cb Number of bytes read.
2685	*/
2686	PDMBOTHCBDECL(int) buslogicIOPortRead(PPDMDEVINS pDevIns, void pvUser, RTIOPORT uPort, uint32_t pu32, unsigned cb)
2687	{
2688	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2689	unsigned iRegister = uPort % 4;
2690	RT_NOREF_PV(pvUser); RT_NOREF_PV(cb);
2691
2692	Assert(cb == 1);
2693
2694	return buslogicRegisterRead(pBusLogic, iRegister, pu32);
2695	}
2696
2697	/**
2698	* Port I/O Handler for OUT operations.
2699	*
2700	* @returns VBox status code.
2701	*
2702	* @param pDevIns The device instance.
2703	* @param pvUser User argument.
2704	* @param uPort Port number used for the IN operation.
2705	* @param u32 The value to output.
2706	* @param cb The value size in bytes.
2707	*/
2708	PDMBOTHCBDECL(int) buslogicIOPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint32_t u32, unsigned cb)
2709	{
2710	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2711	unsigned iRegister = uPort % 4;
2712	uint8_t uVal = (uint8_t)u32;
2713	RT_NOREF2(pvUser, cb);
2714
2715	Assert(cb == 1);
2716
2717	int rc = buslogicRegisterWrite(pBusLogic, iRegister, (uint8_t)uVal);
2718
2719	Log2(("#%d %s: pvUser=%#p cb=%d u32=%#x uPort=%#x rc=%Rrc\n",
2720	pDevIns->iInstance, __FUNCTION__, pvUser, cb, u32, uPort, rc));
2721
2722	return rc;
2723	}
2724
2725	#ifdef IN_RING3
2726
2727	static int buslogicR3PrepareBIOSSCSIRequest(PBUSLOGIC pThis)
2728	{
2729	uint32_t uTargetDevice;
2730	uint32_t uLun;
2731	uint8_t *pbCdb;
2732	size_t cbCdb;
2733	size_t cbBuf;
2734
2735	int rc = vboxscsiSetupRequest(&pThis->VBoxSCSI, &uLun, &pbCdb, &cbCdb, &cbBuf, &uTargetDevice);
2736	AssertMsgRCReturn(rc, ("Setting up SCSI request failed rc=%Rrc\n", rc), rc);
2737
2738	if ( uTargetDevice < RT_ELEMENTS(pThis->aDeviceStates)
2739	&& pThis->aDeviceStates[uTargetDevice].pDrvBase)
2740	{
2741	PBUSLOGICDEVICE pTgtDev = &pThis->aDeviceStates[uTargetDevice];
2742	PDMMEDIAEXIOREQ hIoReq;
2743	PBUSLOGICREQ pReq;
2744
2745	rc = pTgtDev->pDrvMediaEx->pfnIoReqAlloc(pTgtDev->pDrvMediaEx, &hIoReq, (void **)&pReq,
2746	0, PDMIMEDIAEX_F_SUSPEND_ON_RECOVERABLE_ERR);
2747	AssertMsgRCReturn(rc, ("Getting task from cache failed rc=%Rrc\n", rc), rc);
2748
2749	pReq->fBIOS = true;
2750	pReq->hIoReq = hIoReq;
2751	pReq->pTargetDevice = pTgtDev;
2752
2753	ASMAtomicIncU32(&pTgtDev->cOutstandingRequests);
2754
2755	rc = pTgtDev->pDrvMediaEx->pfnIoReqSendScsiCmd(pTgtDev->pDrvMediaEx, pReq->hIoReq, uLun,
2756	pbCdb, cbCdb, PDMMEDIAEXIOREQSCSITXDIR_UNKNOWN,
2757	cbBuf, NULL, 0, &pReq->u8ScsiSts, 30 * RT_MS_1SEC);
2758	if (rc == VINF_SUCCESS \|\| rc != VINF_PDM_MEDIAEX_IOREQ_IN_PROGRESS)
2759	{
2760	uint8_t u8ScsiSts = pReq->u8ScsiSts;
2761	pTgtDev->pDrvMediaEx->pfnIoReqFree(pTgtDev->pDrvMediaEx, pReq->hIoReq);
2762	rc = vboxscsiRequestFinished(&pThis->VBoxSCSI, u8ScsiSts);
2763	}
2764	else if (rc == VINF_PDM_MEDIAEX_IOREQ_IN_PROGRESS)
2765	rc = VINF_SUCCESS;
2766
2767	return rc;
2768	}
2769
2770	/* Device is not present. */
2771	AssertMsg(pbCdb[0] == SCSI_INQUIRY,
2772	("Device is not present but command is not inquiry\n"));
2773
2774	SCSIINQUIRYDATA ScsiInquiryData;
2775
2776	memset(&ScsiInquiryData, 0, sizeof(SCSIINQUIRYDATA));
2777	ScsiInquiryData.u5PeripheralDeviceType = SCSI_INQUIRY_DATA_PERIPHERAL_DEVICE_TYPE_UNKNOWN;
2778	ScsiInquiryData.u3PeripheralQualifier = SCSI_INQUIRY_DATA_PERIPHERAL_QUALIFIER_NOT_CONNECTED_NOT_SUPPORTED;
2779
2780	memcpy(pThis->VBoxSCSI.pbBuf, &ScsiInquiryData, 5);
2781
2782	rc = vboxscsiRequestFinished(&pThis->VBoxSCSI, SCSI_STATUS_OK);
2783	AssertMsgRCReturn(rc, ("Finishing BIOS SCSI request failed rc=%Rrc\n", rc), rc);
2784
2785	return rc;
2786	}
2787
2788
2789	/**
2790	* Port I/O Handler for IN operations - BIOS port.
2791	*
2792	* @returns VBox status code.
2793	*
2794	* @param pDevIns The device instance.
2795	* @param pvUser User argument.
2796	* @param uPort Port number used for the IN operation.
2797	* @param pu32 Where to store the result.
2798	* @param cb Number of bytes read.
2799	*/
2800	static DECLCALLBACK(int) buslogicR3BiosIoPortRead(PPDMDEVINS pDevIns, void pvUser, RTIOPORT uPort, uint32_t pu32, unsigned cb)
2801	{
2802	RT_NOREF(pvUser, cb);
2803	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2804
2805	Assert(cb == 1);
2806
2807	int rc = vboxscsiReadRegister(&pBusLogic->VBoxSCSI, (uPort - BUSLOGIC_BIOS_IO_PORT), pu32);
2808
2809	//Log2(("%s: pu32=%p:{%.*Rhxs} iRegister=%d rc=%Rrc\n",
2810	// __FUNCTION__, pu32, 1, pu32, (uPort - BUSLOGIC_BIOS_IO_PORT), rc));
2811
2812	return rc;
2813	}
2814
2815	/**
2816	* Port I/O Handler for OUT operations - BIOS port.
2817	*
2818	* @returns VBox status code.
2819	*
2820	* @param pDevIns The device instance.
2821	* @param pvUser User argument.
2822	* @param uPort Port number used for the IN operation.
2823	* @param u32 The value to output.
2824	* @param cb The value size in bytes.
2825	*/
2826	static DECLCALLBACK(int) buslogicR3BiosIoPortWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT uPort, uint32_t u32, unsigned cb)
2827	{
2828	RT_NOREF(pvUser, cb);
2829	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2830	Log2(("#%d %s: pvUser=%#p cb=%d u32=%#x uPort=%#x\n", pDevIns->iInstance, __FUNCTION__, pvUser, cb, u32, uPort));
2831
2832	/*
2833	* If there is already a request form the BIOS pending ignore this write
2834	* because it should not happen.
2835	*/
2836	if (ASMAtomicReadBool(&pThis->fBiosReqPending))
2837	return VINF_SUCCESS;
2838
2839	Assert(cb == 1);
2840
2841	int rc = vboxscsiWriteRegister(&pThis->VBoxSCSI, (uPort - BUSLOGIC_BIOS_IO_PORT), (uint8_t)u32);
2842	if (rc == VERR_MORE_DATA)
2843	{
2844	ASMAtomicXchgBool(&pThis->fBiosReqPending, true);
2845	/* Send a notifier to the PDM queue that there are pending requests. */
2846	PPDMQUEUEITEMCORE pItem = PDMQueueAlloc(pThis->CTX_SUFF(pNotifierQueue));
2847	AssertMsg(pItem, ("Allocating item for queue failed\n"));
2848	PDMQueueInsert(pThis->CTX_SUFF(pNotifierQueue), (PPDMQUEUEITEMCORE)pItem);
2849	rc = VINF_SUCCESS;
2850	}
2851	else if (RT_FAILURE(rc))
2852	AssertMsgFailed(("Writing BIOS register failed %Rrc\n", rc));
2853
2854	return VINF_SUCCESS;
2855	}
2856
2857	/**
2858	* Port I/O Handler for primary port range OUT string operations.
2859	* @see FNIOMIOPORTOUTSTRING for details.
2860	*/
2861	static DECLCALLBACK(int) buslogicR3BiosIoPortWriteStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port,
2862	uint8_t const pbSrc, uint32_t pcTransfers, unsigned cb)
2863	{
2864	RT_NOREF(pvUser);
2865	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2866	Log2(("#%d %s: pvUser=%#p cb=%d Port=%#x\n", pDevIns->iInstance, __FUNCTION__, pvUser, cb, Port));
2867
2868	/*
2869	* If there is already a request form the BIOS pending ignore this write
2870	* because it should not happen.
2871	*/
2872	if (ASMAtomicReadBool(&pThis->fBiosReqPending))
2873	return VINF_SUCCESS;
2874
2875	int rc = vboxscsiWriteString(pDevIns, &pThis->VBoxSCSI, (Port - BUSLOGIC_BIOS_IO_PORT), pbSrc, pcTransfers, cb);
2876	if (rc == VERR_MORE_DATA)
2877	{
2878	ASMAtomicXchgBool(&pThis->fBiosReqPending, true);
2879	/* Send a notifier to the PDM queue that there are pending requests. */
2880	PPDMQUEUEITEMCORE pItem = PDMQueueAlloc(pThis->CTX_SUFF(pNotifierQueue));
2881	AssertMsg(pItem, ("Allocating item for queue failed\n"));
2882	PDMQueueInsert(pThis->CTX_SUFF(pNotifierQueue), (PPDMQUEUEITEMCORE)pItem);
2883	}
2884	else if (RT_FAILURE(rc))
2885	AssertMsgFailed(("Writing BIOS register failed %Rrc\n", rc));
2886
2887	return VINF_SUCCESS;
2888	}
2889
2890	/**
2891	* Port I/O Handler for primary port range IN string operations.
2892	* @see FNIOMIOPORTINSTRING for details.
2893	*/
2894	static DECLCALLBACK(int) buslogicR3BiosIoPortReadStr(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT Port,
2895	uint8_t pbDst, uint32_t pcTransfers, unsigned cb)
2896	{
2897	RT_NOREF(pvUser);
2898	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2899	LogFlowFunc(("#%d %s: pvUser=%#p cb=%d Port=%#x\n", pDevIns->iInstance, __FUNCTION__, pvUser, cb, Port));
2900
2901	return vboxscsiReadString(pDevIns, &pBusLogic->VBoxSCSI, (Port - BUSLOGIC_BIOS_IO_PORT),
2902	pbDst, pcTransfers, cb);
2903	}
2904
2905	/**
2906	* Update the ISA I/O range.
2907	*
2908	* @returns nothing.
2909	* @param pBusLogic Pointer to the BusLogic device instance.
2910	* @param uBaseCode Encoded ISA I/O base; only low 3 bits are used.
2911	*/
2912	static int buslogicR3RegisterISARange(PBUSLOGIC pBusLogic, uint8_t uBaseCode)
2913	{
2914	uint8_t uCode = uBaseCode & MAX_ISA_BASE;
2915	uint16_t uNewBase = g_aISABases[uCode];
2916	int rc = VINF_SUCCESS;
2917
2918	LogFlowFunc(("ISA I/O code %02X, new base %X\n", uBaseCode, uNewBase));
2919
2920	/* Check if the same port range is already registered. */
2921	if (uNewBase != pBusLogic->IOISABase)
2922	{
2923	/* Unregister the old range, if any. */
2924	if (pBusLogic->IOISABase)
2925	rc = PDMDevHlpIOPortDeregister(pBusLogic->CTX_SUFF(pDevIns), pBusLogic->IOISABase, 4);
2926
2927	if (RT_SUCCESS(rc))
2928	{
2929	pBusLogic->IOISABase = 0; /* First mark as unregistered. */
2930	pBusLogic->uISABaseCode = ISA_BASE_DISABLED;
2931
2932	if (uNewBase)
2933	{
2934	/* Register the new range if requested. */
2935	rc = PDMDevHlpIOPortRegister(pBusLogic->CTX_SUFF(pDevIns), uNewBase, 4, NULL,
2936	buslogicIOPortWrite, buslogicIOPortRead,
2937	NULL, NULL,
2938	"BusLogic ISA");
2939	if (RT_SUCCESS(rc))
2940	{
2941	pBusLogic->IOISABase = uNewBase;
2942	pBusLogic->uISABaseCode = uCode;
2943	}
2944	}
2945	}
2946	if (RT_SUCCESS(rc))
2947	{
2948	if (uNewBase)
2949	{
2950	Log(("ISA I/O base: %x\n", uNewBase));
2951	LogRel(("BusLogic: ISA I/O base: %x\n", uNewBase));
2952	}
2953	else
2954	{
2955	Log(("Disabling ISA I/O ports.\n"));
2956	LogRel(("BusLogic: ISA I/O disabled\n"));
2957	}
2958	}
2959
2960	}
2961	return rc;
2962	}
2963
2964
2965	/**
2966	* @callback_method_impl{FNPCIIOREGIONMAP}
2967	*/
2968	static DECLCALLBACK(int) buslogicR3MmioMap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,
2969	RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType)
2970	{
2971	RT_NOREF(pPciDev, iRegion);
2972	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
2973	int rc = VINF_SUCCESS;
2974
2975	Log2(("%s: registering MMIO area at GCPhysAddr=%RGp cb=%RGp\n", __FUNCTION__, GCPhysAddress, cb));
2976
2977	Assert(cb >= 32);
2978
2979	if (enmType == PCI_ADDRESS_SPACE_MEM)
2980	{
2981	/* We use the assigned size here, because we currently only support page aligned MMIO ranges. */
2982	rc = PDMDevHlpMMIORegister(pDevIns, GCPhysAddress, cb, NULL /pvUser/,
2983	IOMMMIO_FLAGS_READ_PASSTHRU \| IOMMMIO_FLAGS_WRITE_PASSTHRU,
2984	buslogicMMIOWrite, buslogicMMIORead, "BusLogic MMIO");
2985	if (RT_FAILURE(rc))
2986	return rc;
2987
2988	if (pThis->fR0Enabled)
2989	{
2990	rc = PDMDevHlpMMIORegisterR0(pDevIns, GCPhysAddress, cb, NIL_RTR0PTR /pvUser/,
2991	"buslogicMMIOWrite", "buslogicMMIORead");
2992	if (RT_FAILURE(rc))
2993	return rc;
2994	}
2995
2996	if (pThis->fGCEnabled)
2997	{
2998	rc = PDMDevHlpMMIORegisterRC(pDevIns, GCPhysAddress, cb, NIL_RTRCPTR /pvUser/,
2999	"buslogicMMIOWrite", "buslogicMMIORead");
3000	if (RT_FAILURE(rc))
3001	return rc;
3002	}
3003
3004	pThis->MMIOBase = GCPhysAddress;
3005	}
3006	else if (enmType == PCI_ADDRESS_SPACE_IO)
3007	{
3008	rc = PDMDevHlpIOPortRegister(pDevIns, (RTIOPORT)GCPhysAddress, 32,
3009	NULL, buslogicIOPortWrite, buslogicIOPortRead, NULL, NULL, "BusLogic PCI");
3010	if (RT_FAILURE(rc))
3011	return rc;
3012
3013	if (pThis->fR0Enabled)
3014	{
3015	rc = PDMDevHlpIOPortRegisterR0(pDevIns, (RTIOPORT)GCPhysAddress, 32,
3016	0, "buslogicIOPortWrite", "buslogicIOPortRead", NULL, NULL, "BusLogic PCI");
3017	if (RT_FAILURE(rc))
3018	return rc;
3019	}
3020
3021	if (pThis->fGCEnabled)
3022	{
3023	rc = PDMDevHlpIOPortRegisterRC(pDevIns, (RTIOPORT)GCPhysAddress, 32,
3024	0, "buslogicIOPortWrite", "buslogicIOPortRead", NULL, NULL, "BusLogic PCI");
3025	if (RT_FAILURE(rc))
3026	return rc;
3027	}
3028
3029	pThis->IOPortBase = (RTIOPORT)GCPhysAddress;
3030	}
3031	else
3032	AssertMsgFailed(("Invalid enmType=%d\n", enmType));
3033
3034	return rc;
3035	}
3036
3037	static int buslogicR3ReqComplete(PBUSLOGIC pThis, PBUSLOGICREQ pReq, int rcReq)
3038	{
3039	RT_NOREF(rcReq);
3040	PBUSLOGICDEVICE pTgtDev = pReq->pTargetDevice;
3041
3042	LogFlowFunc(("before decrement %u\n", pTgtDev->cOutstandingRequests));
3043	ASMAtomicDecU32(&pTgtDev->cOutstandingRequests);
3044	LogFlowFunc(("after decrement %u\n", pTgtDev->cOutstandingRequests));
3045
3046	if (pReq->fBIOS)
3047	{
3048	uint8_t u8ScsiSts = pReq->u8ScsiSts;
3049	pTgtDev->pDrvMediaEx->pfnIoReqFree(pTgtDev->pDrvMediaEx, pReq->hIoReq);
3050	int rc = vboxscsiRequestFinished(&pThis->VBoxSCSI, u8ScsiSts);
3051	AssertMsgRC(rc, ("Finishing BIOS SCSI request failed rc=%Rrc\n", rc));
3052	}
3053	else
3054	{
3055	if (pReq->pbSenseBuffer)
3056	buslogicR3SenseBufferFree(pReq, (pReq->u8ScsiSts != SCSI_STATUS_OK));
3057
3058	/* Update residual data length. */
3059	if ( (pReq->CCBGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_DATA_LENGTH)
3060	\|\| (pReq->CCBGuest.c.uOpcode == BUSLOGIC_CCB_OPCODE_INITIATOR_CCB_RESIDUAL_SCATTER_GATHER))
3061	{
3062	size_t cbResidual = 0;
3063	int rc = pTgtDev->pDrvMediaEx->pfnIoReqQueryResidual(pTgtDev->pDrvMediaEx, pReq->hIoReq, &cbResidual);
3064	AssertRC(rc); Assert(cbResidual == (uint32_t)cbResidual);
3065
3066	if (pReq->fIs24Bit)
3067	U32_TO_LEN(pReq->CCBGuest.o.acbData, (uint32_t)cbResidual);
3068	else
3069	pReq->CCBGuest.n.cbData = (uint32_t)cbResidual;
3070	}
3071
3072	/*
3073	* Save vital things from the request and free it before posting completion
3074	* to avoid that the guest submits a new request with the same ID as the still
3075	* allocated one.
3076	*/
3077	#ifdef LOG_ENABLED
3078	bool fIs24Bit = pReq->fIs24Bit;
3079	#endif
3080	uint8_t u8ScsiSts = pReq->u8ScsiSts;
3081	RTGCPHYS GCPhysAddrCCB = pReq->GCPhysAddrCCB;
3082	CCBU CCBGuest;
3083	memcpy(&CCBGuest, &pReq->CCBGuest, sizeof(CCBU));
3084
3085	pTgtDev->pDrvMediaEx->pfnIoReqFree(pTgtDev->pDrvMediaEx, pReq->hIoReq);
3086	if (u8ScsiSts == SCSI_STATUS_OK)
3087	buslogicR3SendIncomingMailbox(pThis, GCPhysAddrCCB, &CCBGuest,
3088	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_CMD_COMPLETED,
3089	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
3090	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITHOUT_ERROR);
3091	else if (u8ScsiSts == SCSI_STATUS_CHECK_CONDITION)
3092	buslogicR3SendIncomingMailbox(pThis, GCPhysAddrCCB, &CCBGuest,
3093	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_CMD_COMPLETED,
3094	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_CHECK_CONDITION,
3095	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR);
3096	else
3097	AssertMsgFailed(("invalid completion status %u\n", u8ScsiSts));
3098
3099	#ifdef LOG_ENABLED
3100	buslogicR3DumpCCBInfo(&CCBGuest, fIs24Bit);
3101	#endif
3102	}
3103
3104	if (pTgtDev->cOutstandingRequests == 0 && pThis->fSignalIdle)
3105	PDMDevHlpAsyncNotificationCompleted(pThis->pDevInsR3);
3106
3107	return VINF_SUCCESS;
3108	}
3109
3110	static DECLCALLBACK(int) buslogicR3QueryDeviceLocation(PPDMIMEDIAPORT pInterface, const char **ppcszController,
3111	uint32_t piInstance, uint32_t piLUN)
3112	{
3113	PBUSLOGICDEVICE pBusLogicDevice = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, IMediaPort);
3114	PPDMDEVINS pDevIns = pBusLogicDevice->CTX_SUFF(pBusLogic)->CTX_SUFF(pDevIns);
3115
3116	AssertPtrReturn(ppcszController, VERR_INVALID_POINTER);
3117	AssertPtrReturn(piInstance, VERR_INVALID_POINTER);
3118	AssertPtrReturn(piLUN, VERR_INVALID_POINTER);
3119
3120	*ppcszController = pDevIns->pReg->szName;
3121	*piInstance = pDevIns->iInstance;
3122	*piLUN = pBusLogicDevice->iLUN;
3123
3124	return VINF_SUCCESS;
3125	}
3126
3127	/**
3128	* @interface_method_impl{PDMIMEDIAEXPORT,pfnIoReqCopyFromBuf}
3129	*/
3130	static DECLCALLBACK(int) buslogicR3IoReqCopyFromBuf(PPDMIMEDIAEXPORT pInterface, PDMMEDIAEXIOREQ hIoReq,
3131	void *pvIoReqAlloc, uint32_t offDst, PRTSGBUF pSgBuf,
3132	size_t cbCopy)
3133	{
3134	RT_NOREF1(hIoReq);
3135	PBUSLOGICDEVICE pTgtDev = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, IMediaExPort);
3136	PBUSLOGICREQ pReq = (PBUSLOGICREQ)pvIoReqAlloc;
3137
3138	size_t cbCopied = 0;
3139	if (RT_UNLIKELY(pReq->fBIOS))
3140	cbCopied = vboxscsiCopyToBuf(&pTgtDev->CTX_SUFF(pBusLogic)->VBoxSCSI, pSgBuf, offDst, cbCopy);
3141	else
3142	cbCopied = buslogicR3CopySgBufToGuest(pTgtDev->CTX_SUFF(pBusLogic), pReq, pSgBuf, offDst, cbCopy);
3143	return cbCopied == cbCopy ? VINF_SUCCESS : VERR_PDM_MEDIAEX_IOBUF_OVERFLOW;
3144	}
3145
3146	/**
3147	* @interface_method_impl{PDMIMEDIAEXPORT,pfnIoReqCopyToBuf}
3148	*/
3149	static DECLCALLBACK(int) buslogicR3IoReqCopyToBuf(PPDMIMEDIAEXPORT pInterface, PDMMEDIAEXIOREQ hIoReq,
3150	void *pvIoReqAlloc, uint32_t offSrc, PRTSGBUF pSgBuf,
3151	size_t cbCopy)
3152	{
3153	RT_NOREF1(hIoReq);
3154	PBUSLOGICDEVICE pTgtDev = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, IMediaExPort);
3155	PBUSLOGICREQ pReq = (PBUSLOGICREQ)pvIoReqAlloc;
3156
3157	size_t cbCopied = 0;
3158	if (RT_UNLIKELY(pReq->fBIOS))
3159	cbCopied = vboxscsiCopyFromBuf(&pTgtDev->CTX_SUFF(pBusLogic)->VBoxSCSI, pSgBuf, offSrc, cbCopy);
3160	else
3161	cbCopied = buslogicR3CopySgBufFromGuest(pTgtDev->CTX_SUFF(pBusLogic), pReq, pSgBuf, offSrc, cbCopy);
3162	return cbCopied == cbCopy ? VINF_SUCCESS : VERR_PDM_MEDIAEX_IOBUF_UNDERRUN;
3163	}
3164
3165	/**
3166	* @interface_method_impl{PDMIMEDIAEXPORT,pfnIoReqCompleteNotify}
3167	*/
3168	static DECLCALLBACK(int) buslogicR3IoReqCompleteNotify(PPDMIMEDIAEXPORT pInterface, PDMMEDIAEXIOREQ hIoReq,
3169	void *pvIoReqAlloc, int rcReq)
3170	{
3171	RT_NOREF(hIoReq);
3172	PBUSLOGICDEVICE pTgtDev = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, IMediaExPort);
3173	buslogicR3ReqComplete(pTgtDev->CTX_SUFF(pBusLogic), (PBUSLOGICREQ)pvIoReqAlloc, rcReq);
3174	return VINF_SUCCESS;
3175	}
3176
3177	/**
3178	* @interface_method_impl{PDMIMEDIAEXPORT,pfnIoReqStateChanged}
3179	*/
3180	static DECLCALLBACK(void) buslogicR3IoReqStateChanged(PPDMIMEDIAEXPORT pInterface, PDMMEDIAEXIOREQ hIoReq,
3181	void *pvIoReqAlloc, PDMMEDIAEXIOREQSTATE enmState)
3182	{
3183	RT_NOREF3(hIoReq, pvIoReqAlloc, enmState);
3184	PBUSLOGICDEVICE pTgtDev = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, IMediaExPort);
3185
3186	switch (enmState)
3187	{
3188	case PDMMEDIAEXIOREQSTATE_SUSPENDED:
3189	{
3190	/* Make sure the request is not accounted for so the VM can suspend successfully. */
3191	uint32_t cTasksActive = ASMAtomicDecU32(&pTgtDev->cOutstandingRequests);
3192	if (!cTasksActive && pTgtDev->CTX_SUFF(pBusLogic)->fSignalIdle)
3193	PDMDevHlpAsyncNotificationCompleted(pTgtDev->CTX_SUFF(pBusLogic)->pDevInsR3);
3194	break;
3195	}
3196	case PDMMEDIAEXIOREQSTATE_ACTIVE:
3197	/* Make sure the request is accounted for so the VM suspends only when the request is complete. */
3198	ASMAtomicIncU32(&pTgtDev->cOutstandingRequests);
3199	break;
3200	default:
3201	AssertMsgFailed(("Invalid request state given %u\n", enmState));
3202	}
3203	}
3204
3205	/**
3206	* @interface_method_impl{PDMIMEDIAEXPORT,pfnMediumEjected}
3207	*/
3208	static DECLCALLBACK(void) buslogicR3MediumEjected(PPDMIMEDIAEXPORT pInterface)
3209	{
3210	PBUSLOGICDEVICE pTgtDev = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, IMediaExPort);
3211	PBUSLOGIC pThis = pTgtDev->CTX_SUFF(pBusLogic);
3212
3213	if (pThis->pMediaNotify)
3214	{
3215	int rc = VMR3ReqCallNoWait(PDMDevHlpGetVM(pThis->CTX_SUFF(pDevIns)), VMCPUID_ANY,
3216	(PFNRT)pThis->pMediaNotify->pfnEjected, 2,
3217	pThis->pMediaNotify, pTgtDev->iLUN);
3218	AssertRC(rc);
3219	}
3220	}
3221
3222	static int buslogicR3DeviceSCSIRequestSetup(PBUSLOGIC pBusLogic, RTGCPHYS GCPhysAddrCCB)
3223	{
3224	int rc = VINF_SUCCESS;
3225	uint8_t uTargetIdCCB;
3226	CCBU CCBGuest;
3227
3228	/* Fetch the CCB from guest memory. */
3229	/** @todo How much do we really have to read? */
3230	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrCCB,
3231	&CCBGuest, sizeof(CCB32));
3232
3233	uTargetIdCCB = pBusLogic->fMbxIs24Bit ? CCBGuest.o.uTargetId : CCBGuest.n.uTargetId;
3234	if (RT_LIKELY(uTargetIdCCB < RT_ELEMENTS(pBusLogic->aDeviceStates)))
3235	{
3236	PBUSLOGICDEVICE pTgtDev = &pBusLogic->aDeviceStates[uTargetIdCCB];
3237
3238	#ifdef LOG_ENABLED
3239	buslogicR3DumpCCBInfo(&CCBGuest, pBusLogic->fMbxIs24Bit);
3240	#endif
3241
3242	/* Check if device is present on bus. If not return error immediately and don't process this further. */
3243	if (RT_LIKELY(pTgtDev->fPresent))
3244	{
3245	PDMMEDIAEXIOREQ hIoReq;
3246	PBUSLOGICREQ pReq;
3247	rc = pTgtDev->pDrvMediaEx->pfnIoReqAlloc(pTgtDev->pDrvMediaEx, &hIoReq, (void **)&pReq,
3248	GCPhysAddrCCB, PDMIMEDIAEX_F_SUSPEND_ON_RECOVERABLE_ERR);
3249	if (RT_SUCCESS(rc))
3250	{
3251	pReq->pTargetDevice = pTgtDev;
3252	pReq->GCPhysAddrCCB = GCPhysAddrCCB;
3253	pReq->fBIOS = false;
3254	pReq->hIoReq = hIoReq;
3255	pReq->fIs24Bit = pBusLogic->fMbxIs24Bit;
3256
3257	/* Make a copy of the CCB */
3258	memcpy(&pReq->CCBGuest, &CCBGuest, sizeof(CCBGuest));
3259
3260	/* Alloc required buffers. */
3261	rc = buslogicR3SenseBufferAlloc(pReq);
3262	AssertMsgRC(rc, ("Mapping sense buffer failed rc=%Rrc\n", rc));
3263
3264	size_t cbBuf = 0;
3265	rc = buslogicR3QueryDataBufferSize(pBusLogic->CTX_SUFF(pDevIns), &pReq->CCBGuest, pReq->fIs24Bit, &cbBuf);
3266	AssertRC(rc);
3267
3268	uint32_t uLun = pReq->fIs24Bit ? pReq->CCBGuest.o.uLogicalUnit
3269	: pReq->CCBGuest.n.uLogicalUnit;
3270
3271	PDMMEDIAEXIOREQSCSITXDIR enmXferDir = PDMMEDIAEXIOREQSCSITXDIR_UNKNOWN;
3272	size_t cbSense = buslogicR3ConvertSenseBufferLength(CCBGuest.c.cbSenseData);
3273
3274	if (CCBGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_NO_DATA)
3275	enmXferDir = PDMMEDIAEXIOREQSCSITXDIR_NONE;
3276	else if (CCBGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_OUT)
3277	enmXferDir = PDMMEDIAEXIOREQSCSITXDIR_TO_DEVICE;
3278	else if (CCBGuest.c.uDataDirection == BUSLOGIC_CCB_DIRECTION_IN)
3279	enmXferDir = PDMMEDIAEXIOREQSCSITXDIR_FROM_DEVICE;
3280
3281	ASMAtomicIncU32(&pTgtDev->cOutstandingRequests);
3282	rc = pTgtDev->pDrvMediaEx->pfnIoReqSendScsiCmd(pTgtDev->pDrvMediaEx, pReq->hIoReq, uLun,
3283	&pReq->CCBGuest.c.abCDB[0], pReq->CCBGuest.c.cbCDB,
3284	enmXferDir, cbBuf, pReq->pbSenseBuffer, cbSense,
3285	&pReq->u8ScsiSts, 30 * RT_MS_1SEC);
3286	if (rc != VINF_PDM_MEDIAEX_IOREQ_IN_PROGRESS)
3287	buslogicR3ReqComplete(pBusLogic, pReq, rc);
3288	}
3289	else
3290	buslogicR3SendIncomingMailbox(pBusLogic, GCPhysAddrCCB, &CCBGuest,
3291	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_SCSI_SELECTION_TIMEOUT,
3292	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
3293	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR);
3294	}
3295	else
3296	buslogicR3SendIncomingMailbox(pBusLogic, GCPhysAddrCCB, &CCBGuest,
3297	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_SCSI_SELECTION_TIMEOUT,
3298	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
3299	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR);
3300	}
3301	else
3302	buslogicR3SendIncomingMailbox(pBusLogic, GCPhysAddrCCB, &CCBGuest,
3303	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_COMMAND_PARAMETER,
3304	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
3305	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR);
3306
3307	return rc;
3308	}
3309
3310	static int buslogicR3DeviceSCSIRequestAbort(PBUSLOGIC pBusLogic, RTGCPHYS GCPhysAddrCCB)
3311	{
3312	int rc = VINF_SUCCESS;
3313	uint8_t uTargetIdCCB;
3314	CCBU CCBGuest;
3315
3316	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCPhysAddrCCB,
3317	&CCBGuest, sizeof(CCB32));
3318
3319	uTargetIdCCB = pBusLogic->fMbxIs24Bit ? CCBGuest.o.uTargetId : CCBGuest.n.uTargetId;
3320	if (RT_LIKELY(uTargetIdCCB < RT_ELEMENTS(pBusLogic->aDeviceStates)))
3321	buslogicR3SendIncomingMailbox(pBusLogic, GCPhysAddrCCB, &CCBGuest,
3322	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_ABORT_QUEUE_GENERATED,
3323	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
3324	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_ABORTED_NOT_FOUND);
3325	else
3326	buslogicR3SendIncomingMailbox(pBusLogic, GCPhysAddrCCB, &CCBGuest,
3327	BUSLOGIC_MAILBOX_INCOMING_ADAPTER_STATUS_INVALID_COMMAND_PARAMETER,
3328	BUSLOGIC_MAILBOX_INCOMING_DEVICE_STATUS_OPERATION_GOOD,
3329	BUSLOGIC_MAILBOX_INCOMING_COMPLETION_WITH_ERROR);
3330
3331	return rc;
3332	}
3333
3334	/**
3335	* Read a mailbox from guest memory. Convert 24-bit mailboxes to
3336	* 32-bit format.
3337	*
3338	* @returns Mailbox guest physical address.
3339	* @param pBusLogic Pointer to the BusLogic instance data.
3340	* @param pMbx Pointer to the mailbox to read into.
3341	*/
3342	static RTGCPHYS buslogicR3ReadOutgoingMailbox(PBUSLOGIC pBusLogic, PMailbox32 pMbx)
3343	{
3344	RTGCPHYS GCMailbox;
3345
3346	if (pBusLogic->fMbxIs24Bit)
3347	{
3348	Mailbox24 Mbx24;
3349
3350	GCMailbox = pBusLogic->GCPhysAddrMailboxOutgoingBase + (pBusLogic->uMailboxOutgoingPositionCurrent * sizeof(Mailbox24));
3351	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCMailbox, &Mbx24, sizeof(Mailbox24));
3352	pMbx->u32PhysAddrCCB = ADDR_TO_U32(Mbx24.aPhysAddrCCB);
3353	pMbx->u.out.uActionCode = Mbx24.uCmdState;
3354	}
3355	else
3356	{
3357	GCMailbox = pBusLogic->GCPhysAddrMailboxOutgoingBase + (pBusLogic->uMailboxOutgoingPositionCurrent * sizeof(Mailbox32));
3358	PDMDevHlpPhysRead(pBusLogic->CTX_SUFF(pDevIns), GCMailbox, pMbx, sizeof(Mailbox32));
3359	}
3360
3361	return GCMailbox;
3362	}
3363
3364	/**
3365	* Read mailbox from the guest and execute command.
3366	*
3367	* @returns VBox status code.
3368	* @param pBusLogic Pointer to the BusLogic instance data.
3369	*/
3370	static int buslogicR3ProcessMailboxNext(PBUSLOGIC pBusLogic)
3371	{
3372	RTGCPHYS GCPhysAddrMailboxCurrent;
3373	Mailbox32 MailboxGuest;
3374	int rc = VINF_SUCCESS;
3375
3376	if (!pBusLogic->fStrictRoundRobinMode)
3377	{
3378	/* Search for a filled mailbox - stop if we have scanned all mailboxes. */
3379	uint8_t uMailboxPosCur = pBusLogic->uMailboxOutgoingPositionCurrent;
3380
3381	do
3382	{
3383	/* Fetch mailbox from guest memory. */
3384	GCPhysAddrMailboxCurrent = buslogicR3ReadOutgoingMailbox(pBusLogic, &MailboxGuest);
3385
3386	/* Check the next mailbox. */
3387	buslogicR3OutgoingMailboxAdvance(pBusLogic);
3388	} while ( MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE
3389	&& uMailboxPosCur != pBusLogic->uMailboxOutgoingPositionCurrent);
3390	}
3391	else
3392	{
3393	/* Fetch mailbox from guest memory. */
3394	GCPhysAddrMailboxCurrent = buslogicR3ReadOutgoingMailbox(pBusLogic, &MailboxGuest);
3395	}
3396
3397	/*
3398	* Check if the mailbox is actually loaded.
3399	* It might be possible that the guest notified us without
3400	* a loaded mailbox. Do nothing in that case but leave a
3401	* log entry.
3402	*/
3403	if (MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE)
3404	{
3405	Log(("No loaded mailbox left\n"));
3406	return VERR_NO_DATA;
3407	}
3408
3409	LogFlow(("Got loaded mailbox at slot %u, CCB phys %RGp\n", pBusLogic->uMailboxOutgoingPositionCurrent, (RTGCPHYS)MailboxGuest.u32PhysAddrCCB));
3410	#ifdef LOG_ENABLED
3411	buslogicR3DumpMailboxInfo(&MailboxGuest, true);
3412	#endif
3413
3414	/* We got the mailbox, mark it as free in the guest. */
3415	uint8_t uActionCode = BUSLOGIC_MAILBOX_OUTGOING_ACTION_FREE;
3416	unsigned uCodeOffs = pBusLogic->fMbxIs24Bit ? RT_OFFSETOF(Mailbox24, uCmdState) : RT_OFFSETOF(Mailbox32, u.out.uActionCode);
3417	blPhysWrite(pBusLogic, GCPhysAddrMailboxCurrent + uCodeOffs, &uActionCode, sizeof(uActionCode));
3418
3419	if (MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_START_COMMAND)
3420	rc = buslogicR3DeviceSCSIRequestSetup(pBusLogic, (RTGCPHYS)MailboxGuest.u32PhysAddrCCB);
3421	else if (MailboxGuest.u.out.uActionCode == BUSLOGIC_MAILBOX_OUTGOING_ACTION_ABORT_COMMAND)
3422	{
3423	LogFlow(("Aborting mailbox\n"));
3424	rc = buslogicR3DeviceSCSIRequestAbort(pBusLogic, (RTGCPHYS)MailboxGuest.u32PhysAddrCCB);
3425	}
3426	else
3427	AssertMsgFailed(("Invalid outgoing mailbox action code %u\n", MailboxGuest.u.out.uActionCode));
3428
3429	AssertRC(rc);
3430
3431	/* Advance to the next mailbox. */
3432	if (pBusLogic->fStrictRoundRobinMode)
3433	buslogicR3OutgoingMailboxAdvance(pBusLogic);
3434
3435	return rc;
3436	}
3437
3438	/**
3439	* Transmit queue consumer
3440	* Queue a new async task.
3441	*
3442	* @returns Success indicator.
3443	* If false the item will not be removed and the flushing will stop.
3444	* @param pDevIns The device instance.
3445	* @param pItem The item to consume. Upon return this item will be freed.
3446	*/
3447	static DECLCALLBACK(bool) buslogicR3NotifyQueueConsumer(PPDMDEVINS pDevIns, PPDMQUEUEITEMCORE pItem)
3448	{
3449	RT_NOREF(pItem);
3450	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3451
3452	int rc = SUPSemEventSignal(pThis->pSupDrvSession, pThis->hEvtProcess);
3453	AssertRC(rc);
3454
3455	return true;
3456	}
3457
3458	/** @callback_method_impl{FNSSMDEVLIVEEXEC} */
3459	static DECLCALLBACK(int) buslogicR3LiveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uPass)
3460	{
3461	RT_NOREF(uPass);
3462	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3463
3464	/* Save the device config. */
3465	for (unsigned i = 0; i < RT_ELEMENTS(pThis->aDeviceStates); i++)
3466	SSMR3PutBool(pSSM, pThis->aDeviceStates[i].fPresent);
3467
3468	return VINF_SSM_DONT_CALL_AGAIN;
3469	}
3470
3471	/** @callback_method_impl{FNSSMDEVSAVEEXEC} */
3472	static DECLCALLBACK(int) buslogicR3SaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
3473	{
3474	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3475	uint32_t cReqsSuspended = 0;
3476
3477	/* Every device first. */
3478	for (unsigned i = 0; i < RT_ELEMENTS(pBusLogic->aDeviceStates); i++)
3479	{
3480	PBUSLOGICDEVICE pDevice = &pBusLogic->aDeviceStates[i];
3481
3482	AssertMsg(!pDevice->cOutstandingRequests,
3483	("There are still outstanding requests on this device\n"));
3484	SSMR3PutBool(pSSM, pDevice->fPresent);
3485	SSMR3PutU32(pSSM, pDevice->cOutstandingRequests);
3486
3487	if (pDevice->fPresent)
3488	cReqsSuspended += pDevice->pDrvMediaEx->pfnIoReqGetSuspendedCount(pDevice->pDrvMediaEx);
3489	}
3490	/* Now the main device state. */
3491	SSMR3PutU8 (pSSM, pBusLogic->regStatus);
3492	SSMR3PutU8 (pSSM, pBusLogic->regInterrupt);
3493	SSMR3PutU8 (pSSM, pBusLogic->regGeometry);
3494	SSMR3PutMem (pSSM, &pBusLogic->LocalRam, sizeof(pBusLogic->LocalRam));
3495	SSMR3PutU8 (pSSM, pBusLogic->uOperationCode);
3496	SSMR3PutMem (pSSM, &pBusLogic->aCommandBuffer, sizeof(pBusLogic->aCommandBuffer));
3497	SSMR3PutU8 (pSSM, pBusLogic->iParameter);
3498	SSMR3PutU8 (pSSM, pBusLogic->cbCommandParametersLeft);
3499	SSMR3PutBool (pSSM, pBusLogic->fUseLocalRam);
3500	SSMR3PutMem (pSSM, pBusLogic->aReplyBuffer, sizeof(pBusLogic->aReplyBuffer));
3501	SSMR3PutU8 (pSSM, pBusLogic->iReply);
3502	SSMR3PutU8 (pSSM, pBusLogic->cbReplyParametersLeft);
3503	SSMR3PutBool (pSSM, pBusLogic->fIRQEnabled);
3504	SSMR3PutU8 (pSSM, pBusLogic->uISABaseCode);
3505	SSMR3PutU32 (pSSM, pBusLogic->cMailbox);
3506	SSMR3PutBool (pSSM, pBusLogic->fMbxIs24Bit);
3507	SSMR3PutGCPhys(pSSM, pBusLogic->GCPhysAddrMailboxOutgoingBase);
3508	SSMR3PutU32 (pSSM, pBusLogic->uMailboxOutgoingPositionCurrent);
3509	SSMR3PutU32 (pSSM, pBusLogic->cMailboxesReady);
3510	SSMR3PutBool (pSSM, pBusLogic->fNotificationSent);
3511	SSMR3PutGCPhys(pSSM, pBusLogic->GCPhysAddrMailboxIncomingBase);
3512	SSMR3PutU32 (pSSM, pBusLogic->uMailboxIncomingPositionCurrent);
3513	SSMR3PutBool (pSSM, pBusLogic->fStrictRoundRobinMode);
3514	SSMR3PutBool (pSSM, pBusLogic->fExtendedLunCCBFormat);
3515
3516	vboxscsiR3SaveExec(&pBusLogic->VBoxSCSI, pSSM);
3517
3518	SSMR3PutU32(pSSM, cReqsSuspended);
3519
3520	/* Save the physical CCB address of all suspended requests. */
3521	for (unsigned i = 0; i < RT_ELEMENTS(pBusLogic->aDeviceStates) && cReqsSuspended; i++)
3522	{
3523	PBUSLOGICDEVICE pDevice = &pBusLogic->aDeviceStates[i];
3524	if (pDevice->fPresent)
3525	{
3526	uint32_t cThisReqsSuspended = pDevice->pDrvMediaEx->pfnIoReqGetSuspendedCount(pDevice->pDrvMediaEx);
3527
3528	cReqsSuspended -= cThisReqsSuspended;
3529	if (cThisReqsSuspended)
3530	{
3531	PDMMEDIAEXIOREQ hIoReq;
3532	PBUSLOGICREQ pReq;
3533	int rc = pDevice->pDrvMediaEx->pfnIoReqQuerySuspendedStart(pDevice->pDrvMediaEx, &hIoReq,
3534	(void **)&pReq);
3535	AssertRCBreak(rc);
3536
3537	for (;;)
3538	{
3539	SSMR3PutU32(pSSM, (uint32_t)pReq->GCPhysAddrCCB);
3540
3541	cThisReqsSuspended--;
3542	if (!cThisReqsSuspended)
3543	break;
3544
3545	rc = pDevice->pDrvMediaEx->pfnIoReqQuerySuspendedNext(pDevice->pDrvMediaEx, hIoReq,
3546	&hIoReq, (void **)&pReq);
3547	AssertRCBreak(rc);
3548	}
3549	}
3550	}
3551	}
3552
3553	return SSMR3PutU32(pSSM, UINT32_MAX);
3554	}
3555
3556	/** @callback_method_impl{FNSSMDEVLOADDONE} */
3557	static DECLCALLBACK(int) buslogicR3LoadDone(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
3558	{
3559	RT_NOREF(pSSM);
3560	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3561
3562	buslogicR3RegisterISARange(pThis, pThis->uISABaseCode);
3563
3564	/* Kick of any requests we might need to redo. */
3565	if (pThis->VBoxSCSI.fBusy)
3566	{
3567
3568	/* The BIOS had a request active when we got suspended. Resume it. */
3569	int rc = buslogicR3PrepareBIOSSCSIRequest(pThis);
3570	AssertRC(rc);
3571	}
3572	else if (pThis->cReqsRedo)
3573	{
3574	for (unsigned i = 0; i < pThis->cReqsRedo; i++)
3575	{
3576	int rc = buslogicR3DeviceSCSIRequestSetup(pThis, pThis->paGCPhysAddrCCBRedo[i]);
3577	AssertRC(rc);
3578	}
3579
3580	RTMemFree(pThis->paGCPhysAddrCCBRedo);
3581	pThis->paGCPhysAddrCCBRedo = NULL;
3582	pThis->cReqsRedo = 0;
3583	}
3584
3585	return VINF_SUCCESS;
3586	}
3587
3588	/** @callback_method_impl{FNSSMDEVLOADEXEC} */
3589	static DECLCALLBACK(int) buslogicR3LoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
3590	{
3591	PBUSLOGIC pBusLogic = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3592	int rc = VINF_SUCCESS;
3593
3594	/* We support saved states only from this and older versions. */
3595	if (uVersion > BUSLOGIC_SAVED_STATE_MINOR_VERSION)
3596	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
3597
3598	/* Every device first. */
3599	for (unsigned i = 0; i < RT_ELEMENTS(pBusLogic->aDeviceStates); i++)
3600	{
3601	PBUSLOGICDEVICE pDevice = &pBusLogic->aDeviceStates[i];
3602
3603	AssertMsg(!pDevice->cOutstandingRequests,
3604	("There are still outstanding requests on this device\n"));
3605	bool fPresent;
3606	rc = SSMR3GetBool(pSSM, &fPresent);
3607	AssertRCReturn(rc, rc);
3608	if (pDevice->fPresent != fPresent)
3609	return SSMR3SetCfgError(pSSM, RT_SRC_POS, N_("Target %u config mismatch: config=%RTbool state=%RTbool"), i, pDevice->fPresent, fPresent);
3610
3611	if (uPass == SSM_PASS_FINAL)
3612	SSMR3GetU32(pSSM, (uint32_t *)&pDevice->cOutstandingRequests);
3613	}
3614
3615	if (uPass != SSM_PASS_FINAL)
3616	return VINF_SUCCESS;
3617
3618	/* Now the main device state. */
3619	SSMR3GetU8 (pSSM, (uint8_t *)&pBusLogic->regStatus);
3620	SSMR3GetU8 (pSSM, (uint8_t *)&pBusLogic->regInterrupt);
3621	SSMR3GetU8 (pSSM, (uint8_t *)&pBusLogic->regGeometry);
3622	SSMR3GetMem (pSSM, &pBusLogic->LocalRam, sizeof(pBusLogic->LocalRam));
3623	SSMR3GetU8 (pSSM, &pBusLogic->uOperationCode);
3624	if (uVersion > BUSLOGIC_SAVED_STATE_MINOR_PRE_CMDBUF_RESIZE)
3625	SSMR3GetMem (pSSM, &pBusLogic->aCommandBuffer, sizeof(pBusLogic->aCommandBuffer));
3626	else
3627	SSMR3GetMem (pSSM, &pBusLogic->aCommandBuffer, BUSLOGIC_COMMAND_SIZE_OLD);
3628	SSMR3GetU8 (pSSM, &pBusLogic->iParameter);
3629	SSMR3GetU8 (pSSM, &pBusLogic->cbCommandParametersLeft);
3630	SSMR3GetBool (pSSM, &pBusLogic->fUseLocalRam);
3631	SSMR3GetMem (pSSM, pBusLogic->aReplyBuffer, sizeof(pBusLogic->aReplyBuffer));
3632	SSMR3GetU8 (pSSM, &pBusLogic->iReply);
3633	SSMR3GetU8 (pSSM, &pBusLogic->cbReplyParametersLeft);
3634	SSMR3GetBool (pSSM, &pBusLogic->fIRQEnabled);
3635	SSMR3GetU8 (pSSM, &pBusLogic->uISABaseCode);
3636	SSMR3GetU32 (pSSM, &pBusLogic->cMailbox);
3637	if (uVersion > BUSLOGIC_SAVED_STATE_MINOR_PRE_24BIT_MBOX)
3638	SSMR3GetBool (pSSM, &pBusLogic->fMbxIs24Bit);
3639	SSMR3GetGCPhys(pSSM, &pBusLogic->GCPhysAddrMailboxOutgoingBase);
3640	SSMR3GetU32 (pSSM, &pBusLogic->uMailboxOutgoingPositionCurrent);
3641	SSMR3GetU32 (pSSM, (uint32_t *)&pBusLogic->cMailboxesReady);
3642	SSMR3GetBool (pSSM, (bool *)&pBusLogic->fNotificationSent);
3643	SSMR3GetGCPhys(pSSM, &pBusLogic->GCPhysAddrMailboxIncomingBase);
3644	SSMR3GetU32 (pSSM, &pBusLogic->uMailboxIncomingPositionCurrent);
3645	SSMR3GetBool (pSSM, &pBusLogic->fStrictRoundRobinMode);
3646	SSMR3GetBool (pSSM, &pBusLogic->fExtendedLunCCBFormat);
3647
3648	rc = vboxscsiR3LoadExec(&pBusLogic->VBoxSCSI, pSSM);
3649	if (RT_FAILURE(rc))
3650	{
3651	LogRel(("BusLogic: Failed to restore BIOS state: %Rrc.\n", rc));
3652	return PDMDEV_SET_ERROR(pDevIns, rc,
3653	N_("BusLogic: Failed to restore BIOS state\n"));
3654	}
3655
3656	if (uVersion > BUSLOGIC_SAVED_STATE_MINOR_PRE_ERROR_HANDLING)
3657	{
3658	/* Check if there are pending tasks saved. */
3659	uint32_t cTasks = 0;
3660
3661	SSMR3GetU32(pSSM, &cTasks);
3662
3663	if (cTasks)
3664	{
3665	pBusLogic->paGCPhysAddrCCBRedo = (PRTGCPHYS)RTMemAllocZ(cTasks * sizeof(RTGCPHYS));
3666	if (RT_LIKELY(pBusLogic->paGCPhysAddrCCBRedo))
3667	{
3668	pBusLogic->cReqsRedo = cTasks;
3669
3670	for (uint32_t i = 0; i < cTasks; i++)
3671	{
3672	uint32_t u32PhysAddrCCB;
3673
3674	rc = SSMR3GetU32(pSSM, &u32PhysAddrCCB);
3675	if (RT_FAILURE(rc))
3676	break;
3677
3678	pBusLogic->paGCPhysAddrCCBRedo[i] = u32PhysAddrCCB;
3679	}
3680	}
3681	else
3682	rc = VERR_NO_MEMORY;
3683	}
3684	}
3685
3686	if (RT_SUCCESS(rc))
3687	{
3688	uint32_t u32;
3689	rc = SSMR3GetU32(pSSM, &u32);
3690	if (RT_SUCCESS(rc))
3691	AssertMsgReturn(u32 == UINT32_MAX, ("%#x\n", u32), VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
3692	}
3693
3694	return rc;
3695	}
3696
3697	/**
3698	* Gets the pointer to the status LED of a device - called from the SCSI driver.
3699	*
3700	* @returns VBox status code.
3701	* @param pInterface Pointer to the interface structure containing the called function pointer.
3702	* @param iLUN The unit which status LED we desire. Always 0 here as the driver
3703	* doesn't know about other LUN's.
3704	* @param ppLed Where to store the LED pointer.
3705	*/
3706	static DECLCALLBACK(int) buslogicR3DeviceQueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed)
3707	{
3708	PBUSLOGICDEVICE pDevice = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, ILed);
3709	if (iLUN == 0)
3710	{
3711	*ppLed = &pDevice->Led;
3712	Assert((*ppLed)->u32Magic == PDMLED_MAGIC);
3713	return VINF_SUCCESS;
3714	}
3715	return VERR_PDM_LUN_NOT_FOUND;
3716	}
3717
3718	/**
3719	* @interface_method_impl{PDMIBASE,pfnQueryInterface}
3720	*/
3721	static DECLCALLBACK(void ) buslogicR3DeviceQueryInterface(PPDMIBASE pInterface, const char pszIID)
3722	{
3723	PBUSLOGICDEVICE pDevice = RT_FROM_MEMBER(pInterface, BUSLOGICDEVICE, IBase);
3724	PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pDevice->IBase);
3725	PDMIBASE_RETURN_INTERFACE(pszIID, PDMIMEDIAPORT, &pDevice->IMediaPort);
3726	PDMIBASE_RETURN_INTERFACE(pszIID, PDMIMEDIAEXPORT, &pDevice->IMediaExPort);
3727	PDMIBASE_RETURN_INTERFACE(pszIID, PDMILEDPORTS, &pDevice->ILed);
3728	return NULL;
3729	}
3730
3731	/**
3732	* Gets the pointer to the status LED of a unit.
3733	*
3734	* @returns VBox status code.
3735	* @param pInterface Pointer to the interface structure containing the called function pointer.
3736	* @param iLUN The unit which status LED we desire.
3737	* @param ppLed Where to store the LED pointer.
3738	*/
3739	static DECLCALLBACK(int) buslogicR3StatusQueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed)
3740	{
3741	PBUSLOGIC pBusLogic = RT_FROM_MEMBER(pInterface, BUSLOGIC, ILeds);
3742	if (iLUN < BUSLOGIC_MAX_DEVICES)
3743	{
3744	*ppLed = &pBusLogic->aDeviceStates[iLUN].Led;
3745	Assert((*ppLed)->u32Magic == PDMLED_MAGIC);
3746	return VINF_SUCCESS;
3747	}
3748	return VERR_PDM_LUN_NOT_FOUND;
3749	}
3750
3751	/**
3752	* @interface_method_impl{PDMIBASE,pfnQueryInterface}
3753	*/
3754	static DECLCALLBACK(void ) buslogicR3StatusQueryInterface(PPDMIBASE pInterface, const char pszIID)
3755	{
3756	PBUSLOGIC pThis = RT_FROM_MEMBER(pInterface, BUSLOGIC, IBase);
3757	PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pThis->IBase);
3758	PDMIBASE_RETURN_INTERFACE(pszIID, PDMILEDPORTS, &pThis->ILeds);
3759	return NULL;
3760	}
3761
3762	/**
3763	* The worker thread processing requests from the guest.
3764	*
3765	* @returns VBox status code.
3766	* @param pDevIns The device instance.
3767	* @param pThread The thread structure.
3768	*/
3769	static DECLCALLBACK(int) buslogicR3Worker(PPDMDEVINS pDevIns, PPDMTHREAD pThread)
3770	{
3771	RT_NOREF(pDevIns);
3772	PBUSLOGIC pThis = (PBUSLOGIC)pThread->pvUser;
3773	int rc = VINF_SUCCESS;
3774
3775	if (pThread->enmState == PDMTHREADSTATE_INITIALIZING)
3776	return VINF_SUCCESS;
3777
3778	while (pThread->enmState == PDMTHREADSTATE_RUNNING)
3779	{
3780	ASMAtomicWriteBool(&pThis->fWrkThreadSleeping, true);
3781	bool fNotificationSent = ASMAtomicXchgBool(&pThis->fNotificationSent, false);
3782	if (!fNotificationSent)
3783	{
3784	Assert(ASMAtomicReadBool(&pThis->fWrkThreadSleeping));
3785	rc = SUPSemEventWaitNoResume(pThis->pSupDrvSession, pThis->hEvtProcess, RT_INDEFINITE_WAIT);
3786	AssertLogRelMsgReturn(RT_SUCCESS(rc) \|\| rc == VERR_INTERRUPTED, ("%Rrc\n", rc), rc);
3787	if (RT_UNLIKELY(pThread->enmState != PDMTHREADSTATE_RUNNING))
3788	break;
3789	LogFlowFunc(("Woken up with rc=%Rrc\n", rc));
3790	ASMAtomicWriteBool(&pThis->fNotificationSent, false);
3791	}
3792
3793	ASMAtomicWriteBool(&pThis->fWrkThreadSleeping, false);
3794
3795	/* Check whether there is a BIOS request pending and process it first. */
3796	if (ASMAtomicReadBool(&pThis->fBiosReqPending))
3797	{
3798	rc = buslogicR3PrepareBIOSSCSIRequest(pThis);
3799	AssertRC(rc);
3800	ASMAtomicXchgBool(&pThis->fBiosReqPending, false);
3801	}
3802	else
3803	{
3804	ASMAtomicXchgU32(&pThis->cMailboxesReady, 0); /** @todo Actually not required anymore but to stay compatible with older saved states. */
3805
3806	/* Process mailboxes. */
3807	do
3808	{
3809	rc = buslogicR3ProcessMailboxNext(pThis);
3810	AssertMsg(RT_SUCCESS(rc) \|\| rc == VERR_NO_DATA, ("Processing mailbox failed rc=%Rrc\n", rc));
3811	} while (RT_SUCCESS(rc));
3812	}
3813	} /* While running */
3814
3815	return VINF_SUCCESS;
3816	}
3817
3818
3819	/**
3820	* Unblock the worker thread so it can respond to a state change.
3821	*
3822	* @returns VBox status code.
3823	* @param pDevIns The device instance.
3824	* @param pThread The send thread.
3825	*/
3826	static DECLCALLBACK(int) buslogicR3WorkerWakeUp(PPDMDEVINS pDevIns, PPDMTHREAD pThread)
3827	{
3828	RT_NOREF(pThread);
3829	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3830	return SUPSemEventSignal(pThis->pSupDrvSession, pThis->hEvtProcess);
3831	}
3832
3833	/**
3834	* BusLogic debugger info callback.
3835	*
3836	* @param pDevIns The device instance.
3837	* @param pHlp The output helpers.
3838	* @param pszArgs The arguments.
3839	*/
3840	static DECLCALLBACK(void) buslogicR3Info(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs)
3841	{
3842	static const char *apszModels[] = { "BusLogic BT-958D", "BusLogic BT-545C", "Adaptec AHA-1540B" };
3843	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3844	unsigned i;
3845	bool fVerbose = false;
3846
3847	/* Parse arguments. */
3848	if (pszArgs)
3849	fVerbose = strstr(pszArgs, "verbose") != NULL;
3850
3851	/* Show basic information. */
3852	pHlp->pfnPrintf(pHlp, "%s#%d: %s ",
3853	pDevIns->pReg->szName,
3854	pDevIns->iInstance,
3855	pThis->uDevType >= RT_ELEMENTS(apszModels) ? "Uknown model" : apszModels[pThis->uDevType]);
3856	if (pThis->uIsaIrq)
3857	pHlp->pfnPrintf(pHlp, "ISA I/O=%RTiop IRQ=%u ",
3858	pThis->IOISABase,
3859	pThis->uIsaIrq);
3860	else
3861	pHlp->pfnPrintf(pHlp, "PCI I/O=%RTiop ISA I/O=%RTiop MMIO=%RGp IRQ=%u ",
3862	pThis->IOPortBase, pThis->IOISABase, pThis->MMIOBase,
3863	PCIDevGetInterruptLine(&pThis->dev));
3864	pHlp->pfnPrintf(pHlp, "GC=%RTbool R0=%RTbool\n",
3865	!!pThis->fGCEnabled, !!pThis->fR0Enabled);
3866
3867	/* Print mailbox state. */
3868	if (pThis->regStatus & BL_STAT_INREQ)
3869	pHlp->pfnPrintf(pHlp, "Mailbox not initialized\n");
3870	else
3871	pHlp->pfnPrintf(pHlp, "%u-bit mailbox with %u entries at %RGp (%d LUN CCBs)\n",
3872	pThis->fMbxIs24Bit ? 24 : 32, pThis->cMailbox,
3873	pThis->GCPhysAddrMailboxOutgoingBase,
3874	pThis->fMbxIs24Bit ? 8 : pThis->fExtendedLunCCBFormat ? 64 : 8);
3875
3876	/* Print register contents. */
3877	pHlp->pfnPrintf(pHlp, "Registers: STAT=%02x INTR=%02x GEOM=%02x\n",
3878	pThis->regStatus, pThis->regInterrupt, pThis->regGeometry);
3879
3880	/* Print miscellaneous state. */
3881	pHlp->pfnPrintf(pHlp, "HAC interrupts: %s\n",
3882	pThis->fIRQEnabled ? "on" : "off");
3883
3884	/* Print the current command, if any. */
3885	if (pThis->uOperationCode != 0xff )
3886	pHlp->pfnPrintf(pHlp, "Current command: %02X\n", pThis->uOperationCode);
3887
3888	if (fVerbose && (pThis->regStatus & BL_STAT_INREQ) == 0)
3889	{
3890	RTGCPHYS GCMailbox;
3891
3892	/* Dump the mailbox contents. */
3893	if (pThis->fMbxIs24Bit)
3894	{
3895	Mailbox24 Mbx24;
3896
3897	/* Outgoing mailbox, 24-bit format. */
3898	GCMailbox = pThis->GCPhysAddrMailboxOutgoingBase;
3899	pHlp->pfnPrintf(pHlp, " Outgoing mailbox entries (24-bit) at %06X:\n", GCMailbox);
3900	for (i = 0; i < pThis->cMailbox; ++i)
3901	{
3902	PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), GCMailbox, &Mbx24, sizeof(Mailbox24));
3903	pHlp->pfnPrintf(pHlp, " slot %03d: CCB at %06X action code %02X", i, ADDR_TO_U32(Mbx24.aPhysAddrCCB), Mbx24.uCmdState);
3904	pHlp->pfnPrintf(pHlp, "%s\n", pThis->uMailboxOutgoingPositionCurrent == i ? " *" : "");
3905	GCMailbox += sizeof(Mailbox24);
3906	}
3907
3908	/* Incoming mailbox, 24-bit format. */
3909	GCMailbox = pThis->GCPhysAddrMailboxOutgoingBase + (pThis->cMailbox * sizeof(Mailbox24));
3910	pHlp->pfnPrintf(pHlp, " Incoming mailbox entries (24-bit) at %06X:\n", GCMailbox);
3911	for (i = 0; i < pThis->cMailbox; ++i)
3912	{
3913	PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), GCMailbox, &Mbx24, sizeof(Mailbox24));
3914	pHlp->pfnPrintf(pHlp, " slot %03d: CCB at %06X completion code %02X", i, ADDR_TO_U32(Mbx24.aPhysAddrCCB), Mbx24.uCmdState);
3915	pHlp->pfnPrintf(pHlp, "%s\n", pThis->uMailboxIncomingPositionCurrent == i ? " *" : "");
3916	GCMailbox += sizeof(Mailbox24);
3917	}
3918
3919	}
3920	else
3921	{
3922	Mailbox32 Mbx32;
3923
3924	/* Outgoing mailbox, 32-bit format. */
3925	GCMailbox = pThis->GCPhysAddrMailboxOutgoingBase;
3926	pHlp->pfnPrintf(pHlp, " Outgoing mailbox entries (32-bit) at %08X:\n", (uint32_t)GCMailbox);
3927	for (i = 0; i < pThis->cMailbox; ++i)
3928	{
3929	PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), GCMailbox, &Mbx32, sizeof(Mailbox32));
3930	pHlp->pfnPrintf(pHlp, " slot %03d: CCB at %08X action code %02X", i, Mbx32.u32PhysAddrCCB, Mbx32.u.out.uActionCode);
3931	pHlp->pfnPrintf(pHlp, "%s\n", pThis->uMailboxOutgoingPositionCurrent == i ? " *" : "");
3932	GCMailbox += sizeof(Mailbox32);
3933	}
3934
3935	/* Incoming mailbox, 32-bit format. */
3936	GCMailbox = pThis->GCPhysAddrMailboxOutgoingBase + (pThis->cMailbox * sizeof(Mailbox32));
3937	pHlp->pfnPrintf(pHlp, " Outgoing mailbox entries (32-bit) at %08X:\n", (uint32_t)GCMailbox);
3938	for (i = 0; i < pThis->cMailbox; ++i)
3939	{
3940	PDMDevHlpPhysRead(pThis->CTX_SUFF(pDevIns), GCMailbox, &Mbx32, sizeof(Mailbox32));
3941	pHlp->pfnPrintf(pHlp, " slot %03d: CCB at %08X completion code %02X BTSTAT %02X SDSTAT %02X", i,
3942	Mbx32.u32PhysAddrCCB, Mbx32.u.in.uCompletionCode, Mbx32.u.in.uHostAdapterStatus, Mbx32.u.in.uTargetDeviceStatus);
3943	pHlp->pfnPrintf(pHlp, "%s\n", pThis->uMailboxOutgoingPositionCurrent == i ? " *" : "");
3944	GCMailbox += sizeof(Mailbox32);
3945	}
3946
3947	}
3948	}
3949	}
3950
3951	/* -=-=-=-=- Helper -=-=-=-=- */
3952
3953	/**
3954	* Checks if all asynchronous I/O is finished.
3955	*
3956	* Used by buslogicR3Reset, buslogicR3Suspend and buslogicR3PowerOff.
3957	*
3958	* @returns true if quiesced, false if busy.
3959	* @param pDevIns The device instance.
3960	*/
3961	static bool buslogicR3AllAsyncIOIsFinished(PPDMDEVINS pDevIns)
3962	{
3963	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3964
3965	for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aDeviceStates); i++)
3966	{
3967	PBUSLOGICDEVICE pThisDevice = &pThis->aDeviceStates[i];
3968	if (pThisDevice->pDrvBase)
3969	{
3970	if (pThisDevice->cOutstandingRequests != 0)
3971	return false;
3972	}
3973	}
3974
3975	return true;
3976	}
3977
3978	/**
3979	* Callback employed by buslogicR3Suspend and buslogicR3PowerOff.
3980	*
3981	* @returns true if we've quiesced, false if we're still working.
3982	* @param pDevIns The device instance.
3983	*/
3984	static DECLCALLBACK(bool) buslogicR3IsAsyncSuspendOrPowerOffDone(PPDMDEVINS pDevIns)
3985	{
3986	if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
3987	return false;
3988
3989	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
3990	ASMAtomicWriteBool(&pThis->fSignalIdle, false);
3991	return true;
3992	}
3993
3994	/**
3995	* Common worker for buslogicR3Suspend and buslogicR3PowerOff.
3996	*/
3997	static void buslogicR3SuspendOrPowerOff(PPDMDEVINS pDevIns)
3998	{
3999	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
4000
4001	ASMAtomicWriteBool(&pThis->fSignalIdle, true);
4002	if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
4003	PDMDevHlpSetAsyncNotification(pDevIns, buslogicR3IsAsyncSuspendOrPowerOffDone);
4004	else
4005	{
4006	ASMAtomicWriteBool(&pThis->fSignalIdle, false);
4007	AssertMsg(!pThis->fNotificationSent, ("The PDM Queue should be empty at this point\n"));
4008	}
4009
4010	for (uint32_t i = 0; i < RT_ELEMENTS(pThis->aDeviceStates); i++)
4011	{
4012	PBUSLOGICDEVICE pThisDevice = &pThis->aDeviceStates[i];
4013	if (pThisDevice->pDrvMediaEx)
4014	pThisDevice->pDrvMediaEx->pfnNotifySuspend(pThisDevice->pDrvMediaEx);
4015	}
4016	}
4017
4018	/**
4019	* Suspend notification.
4020	*
4021	* @param pDevIns The device instance data.
4022	*/
4023	static DECLCALLBACK(void) buslogicR3Suspend(PPDMDEVINS pDevIns)
4024	{
4025	Log(("buslogicR3Suspend\n"));
4026	buslogicR3SuspendOrPowerOff(pDevIns);
4027	}
4028
4029	/**
4030	* Detach notification.
4031	*
4032	* One harddisk at one port has been unplugged.
4033	* The VM is suspended at this point.
4034	*
4035	* @param pDevIns The device instance.
4036	* @param iLUN The logical unit which is being detached.
4037	* @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
4038	*/
4039	static DECLCALLBACK(void) buslogicR3Detach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
4040	{
4041	RT_NOREF(fFlags);
4042	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
4043	PBUSLOGICDEVICE pDevice = &pThis->aDeviceStates[iLUN];
4044
4045	Log(("%s:\n", __FUNCTION__));
4046
4047	AssertMsg(fFlags & PDM_TACH_FLAGS_NOT_HOT_PLUG,
4048	("BusLogic: Device does not support hotplugging\n"));
4049
4050	/*
4051	* Zero some important members.
4052	*/
4053	pDevice->fPresent = false;
4054	pDevice->pDrvBase = NULL;
4055	pDevice->pDrvMedia = NULL;
4056	pDevice->pDrvMediaEx = NULL;
4057	}
4058
4059	/**
4060	* Attach command.
4061	*
4062	* This is called when we change block driver.
4063	*
4064	* @returns VBox status code.
4065	* @param pDevIns The device instance.
4066	* @param iLUN The logical unit which is being detached.
4067	* @param fFlags Flags, combination of the PDMDEVATT_FLAGS_* \#defines.
4068	*/
4069	static DECLCALLBACK(int) buslogicR3Attach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
4070	{
4071	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
4072	PBUSLOGICDEVICE pDevice = &pThis->aDeviceStates[iLUN];
4073	int rc;
4074
4075	AssertMsgReturn(fFlags & PDM_TACH_FLAGS_NOT_HOT_PLUG,
4076	("BusLogic: Device does not support hotplugging\n"),
4077	VERR_INVALID_PARAMETER);
4078
4079	/* the usual paranoia */
4080	AssertRelease(!pDevice->pDrvBase);
4081	AssertRelease(!pDevice->pDrvMedia);
4082	AssertRelease(!pDevice->pDrvMediaEx);
4083	Assert(pDevice->iLUN == iLUN);
4084
4085	/*
4086	* Try attach the SCSI driver and get the interfaces,
4087	* required as well as optional.
4088	*/
4089	rc = PDMDevHlpDriverAttach(pDevIns, pDevice->iLUN, &pDevice->IBase, &pDevice->pDrvBase, NULL);
4090	if (RT_SUCCESS(rc))
4091	{
4092	/* Query the media interface. */
4093	pDevice->pDrvMedia = PDMIBASE_QUERY_INTERFACE(pDevice->pDrvBase, PDMIMEDIA);
4094	AssertMsgReturn(VALID_PTR(pDevice->pDrvMedia),
4095	("BusLogic configuration error: LUN#%d misses the basic media interface!\n", pDevice->iLUN),
4096	VERR_PDM_MISSING_INTERFACE);
4097
4098	/* Get the extended media interface. */
4099	pDevice->pDrvMediaEx = PDMIBASE_QUERY_INTERFACE(pDevice->pDrvBase, PDMIMEDIAEX);
4100	AssertMsgReturn(VALID_PTR(pDevice->pDrvMediaEx),
4101	("BusLogic configuration error: LUN#%d misses the extended media interface!\n", pDevice->iLUN),
4102	VERR_PDM_MISSING_INTERFACE);
4103
4104	rc = pDevice->pDrvMediaEx->pfnIoReqAllocSizeSet(pDevice->pDrvMediaEx, sizeof(BUSLOGICREQ));
4105	AssertMsgRCReturn(rc, ("BusLogic configuration error: LUN#%u: Failed to set I/O request size!", pDevice->iLUN),
4106	rc);
4107
4108	pDevice->fPresent = true;
4109	}
4110	else
4111	AssertMsgFailed(("Failed to attach LUN#%d. rc=%Rrc\n", pDevice->iLUN, rc));
4112
4113	if (RT_FAILURE(rc))
4114	{
4115	pDevice->fPresent = false;
4116	pDevice->pDrvBase = NULL;
4117	pDevice->pDrvMedia = NULL;
4118	pDevice->pDrvMediaEx = NULL;
4119	}
4120	return rc;
4121	}
4122
4123	/**
4124	* Callback employed by buslogicR3Reset.
4125	*
4126	* @returns true if we've quiesced, false if we're still working.
4127	* @param pDevIns The device instance.
4128	*/
4129	static DECLCALLBACK(bool) buslogicR3IsAsyncResetDone(PPDMDEVINS pDevIns)
4130	{
4131	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
4132
4133	if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
4134	return false;
4135	ASMAtomicWriteBool(&pThis->fSignalIdle, false);
4136
4137	buslogicR3HwReset(pThis, true);
4138	return true;
4139	}
4140
4141	/**
4142	* @copydoc FNPDMDEVRESET
4143	*/
4144	static DECLCALLBACK(void) buslogicR3Reset(PPDMDEVINS pDevIns)
4145	{
4146	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
4147
4148	ASMAtomicWriteBool(&pThis->fSignalIdle, true);
4149	if (!buslogicR3AllAsyncIOIsFinished(pDevIns))
4150	PDMDevHlpSetAsyncNotification(pDevIns, buslogicR3IsAsyncResetDone);
4151	else
4152	{
4153	ASMAtomicWriteBool(&pThis->fSignalIdle, false);
4154	buslogicR3HwReset(pThis, true);
4155	}
4156	}
4157
4158	static DECLCALLBACK(void) buslogicR3Relocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta)
4159	{
4160	RT_NOREF(offDelta);
4161	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
4162
4163	pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
4164	pThis->pNotifierQueueRC = PDMQueueRCPtr(pThis->pNotifierQueueR3);
4165
4166	for (uint32_t i = 0; i < BUSLOGIC_MAX_DEVICES; i++)
4167	{
4168	PBUSLOGICDEVICE pDevice = &pThis->aDeviceStates[i];
4169
4170	pDevice->pBusLogicRC = PDMINS_2_DATA_RCPTR(pDevIns);
4171	}
4172
4173	}
4174
4175	/**
4176	* Poweroff notification.
4177	*
4178	* @param pDevIns Pointer to the device instance
4179	*/
4180	static DECLCALLBACK(void) buslogicR3PowerOff(PPDMDEVINS pDevIns)
4181	{
4182	Log(("buslogicR3PowerOff\n"));
4183	buslogicR3SuspendOrPowerOff(pDevIns);
4184	}
4185
4186	/**
4187	* Destroy a driver instance.
4188	*
4189	* Most VM resources are freed by the VM. This callback is provided so that any non-VM
4190	* resources can be freed correctly.
4191	*
4192	* @param pDevIns The device instance data.
4193	*/
4194	static DECLCALLBACK(int) buslogicR3Destruct(PPDMDEVINS pDevIns)
4195	{
4196	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
4197	PDMDEV_CHECK_VERSIONS_RETURN_QUIET(pDevIns);
4198
4199	PDMR3CritSectDelete(&pThis->CritSectIntr);
4200
4201	if (pThis->hEvtProcess != NIL_SUPSEMEVENT)
4202	{
4203	SUPSemEventClose(pThis->pSupDrvSession, pThis->hEvtProcess);
4204	pThis->hEvtProcess = NIL_SUPSEMEVENT;
4205	}
4206
4207	return VINF_SUCCESS;
4208	}
4209
4210	/**
4211	* @interface_method_impl{PDMDEVREG,pfnConstruct}
4212	*/
4213	static DECLCALLBACK(int) buslogicR3Construct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
4214	{
4215	PBUSLOGIC pThis = PDMINS_2_DATA(pDevIns, PBUSLOGIC);
4216	int rc = VINF_SUCCESS;
4217	bool fBootable = true;
4218	char achCfgStr[16];
4219	PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
4220
4221	/*
4222	* Init instance data (do early because of constructor).
4223	*/
4224	pThis->pDevInsR3 = pDevIns;
4225	pThis->pDevInsR0 = PDMDEVINS_2_R0PTR(pDevIns);
4226	pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
4227	pThis->IBase.pfnQueryInterface = buslogicR3StatusQueryInterface;
4228	pThis->ILeds.pfnQueryStatusLed = buslogicR3StatusQueryStatusLed;
4229
4230	PCIDevSetVendorId (&pThis->dev, 0x104b); /* BusLogic */
4231	PCIDevSetDeviceId (&pThis->dev, 0x1040); /* BT-958 */
4232	PCIDevSetCommand (&pThis->dev, PCI_COMMAND_IOACCESS \| PCI_COMMAND_MEMACCESS);
4233	PCIDevSetRevisionId (&pThis->dev, 0x01);
4234	PCIDevSetClassProg (&pThis->dev, 0x00); /* SCSI */
4235	PCIDevSetClassSub (&pThis->dev, 0x00); /* SCSI */
4236	PCIDevSetClassBase (&pThis->dev, 0x01); /* Mass storage */
4237	PCIDevSetBaseAddress (&pThis->dev, 0, true /IO/, false /Pref/, false /64-bit/, 0x00000000);
4238	PCIDevSetBaseAddress (&pThis->dev, 1, false /IO/, false /Pref/, false /64-bit/, 0x00000000);
4239	PCIDevSetSubSystemVendorId(&pThis->dev, 0x104b);
4240	PCIDevSetSubSystemId (&pThis->dev, 0x1040);
4241	PCIDevSetInterruptLine (&pThis->dev, 0x00);
4242	PCIDevSetInterruptPin (&pThis->dev, 0x01);
4243
4244	/*
4245	* Validate and read configuration.
4246	*/
4247	if (!CFGMR3AreValuesValid(pCfg,
4248	"GCEnabled\0"
4249	"R0Enabled\0"
4250	"Bootable\0"
4251	"AdapterType\0"
4252	"ISACompat\0"))
4253	return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
4254	N_("BusLogic configuration error: unknown option specified"));
4255
4256	rc = CFGMR3QueryBoolDef(pCfg, "GCEnabled", &pThis->fGCEnabled, true);
4257	if (RT_FAILURE(rc))
4258	return PDMDEV_SET_ERROR(pDevIns, rc,
4259	N_("BusLogic configuration error: failed to read GCEnabled as boolean"));
4260	Log(("%s: fGCEnabled=%d\n", __FUNCTION__, pThis->fGCEnabled));
4261
4262	rc = CFGMR3QueryBoolDef(pCfg, "R0Enabled", &pThis->fR0Enabled, true);
4263	if (RT_FAILURE(rc))
4264	return PDMDEV_SET_ERROR(pDevIns, rc,
4265	N_("BusLogic configuration error: failed to read R0Enabled as boolean"));
4266	Log(("%s: fR0Enabled=%d\n", __FUNCTION__, pThis->fR0Enabled));
4267	rc = CFGMR3QueryBoolDef(pCfg, "Bootable", &fBootable, true);
4268	if (RT_FAILURE(rc))
4269	return PDMDEV_SET_ERROR(pDevIns, rc,
4270	N_("BusLogic configuration error: failed to read Bootable as boolean"));
4271	Log(("%s: fBootable=%RTbool\n", __FUNCTION__, fBootable));
4272
4273	/* Figure out the emulated device type. */
4274	rc = CFGMR3QueryStringDef(pCfg, "AdapterType", achCfgStr, sizeof(achCfgStr), "BT-958D");
4275	if (RT_FAILURE(rc))
4276	return PDMDEV_SET_ERROR(pDevIns, rc,
4277	N_("BusLogic configuration error: failed to read AdapterType as string"));
4278	Log(("%s: AdapterType=%s\n", __FUNCTION__, achCfgStr));
4279
4280	/* Grok the AdapterType setting. */
4281	if (!strcmp(achCfgStr, "BT-958D")) /* Default PCI device, 32-bit and 24-bit addressing. */
4282	{
4283	pThis->uDevType = DEV_BT_958D;
4284	pThis->uDefaultISABaseCode = ISA_BASE_DISABLED;
4285	}
4286	else if (!strcmp(achCfgStr, "BT-545C")) /* ISA device, 24-bit addressing only. */
4287	{
4288	pThis->uDevType = DEV_BT_545C;
4289	pThis->uIsaIrq = 11;
4290	}
4291	else if (!strcmp(achCfgStr, "AHA-1540B")) /* Competitor ISA device. */
4292	{
4293	pThis->uDevType = DEV_AHA_1540B;
4294	pThis->uIsaIrq = 11;
4295	}
4296	else
4297	return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
4298	N_("BusLogic configuration error: invalid AdapterType setting"));
4299
4300	/* Only the first instance defaults to having the ISA compatibility ports enabled. */
4301	if (iInstance == 0)
4302	rc = CFGMR3QueryStringDef(pCfg, "ISACompat", achCfgStr, sizeof(achCfgStr), "Alternate");
4303	else
4304	rc = CFGMR3QueryStringDef(pCfg, "ISACompat", achCfgStr, sizeof(achCfgStr), "Disabled");
4305	if (RT_FAILURE(rc))
4306	return PDMDEV_SET_ERROR(pDevIns, rc,
4307	N_("BusLogic configuration error: failed to read ISACompat as string"));
4308	Log(("%s: ISACompat=%s\n", __FUNCTION__, achCfgStr));
4309
4310	/* Grok the ISACompat setting. */
4311	if (!strcmp(achCfgStr, "Disabled"))
4312	pThis->uDefaultISABaseCode = ISA_BASE_DISABLED;
4313	else if (!strcmp(achCfgStr, "Primary"))
4314	pThis->uDefaultISABaseCode = 0; /* I/O base at 330h. */
4315	else if (!strcmp(achCfgStr, "Alternate"))
4316	pThis->uDefaultISABaseCode = 1; /* I/O base at 334h. */
4317	else
4318	return PDMDEV_SET_ERROR(pDevIns, VERR_PDM_DEVINS_UNKNOWN_CFG_VALUES,
4319	N_("BusLogic configuration error: invalid ISACompat setting"));
4320
4321	/*
4322	* Register the PCI device and its I/O regions if applicable.
4323	*/
4324	if (!pThis->uIsaIrq)
4325	{
4326	rc = PDMDevHlpPCIRegister(pDevIns, &pThis->dev);
4327	if (RT_FAILURE(rc))
4328	return rc;
4329
4330	rc = PDMDevHlpPCIIORegionRegister(pDevIns, 0, 32, PCI_ADDRESS_SPACE_IO, buslogicR3MmioMap);
4331	if (RT_FAILURE(rc))
4332	return rc;
4333
4334	rc = PDMDevHlpPCIIORegionRegister(pDevIns, 1, 32, PCI_ADDRESS_SPACE_MEM, buslogicR3MmioMap);
4335	if (RT_FAILURE(rc))
4336	return rc;
4337	}
4338
4339	if (fBootable)
4340	{
4341	/* Register I/O port space for BIOS access. */
4342	rc = PDMDevHlpIOPortRegister(pDevIns, BUSLOGIC_BIOS_IO_PORT, 4, NULL,
4343	buslogicR3BiosIoPortWrite, buslogicR3BiosIoPortRead,
4344	buslogicR3BiosIoPortWriteStr, buslogicR3BiosIoPortReadStr,
4345	"BusLogic BIOS");
4346	if (RT_FAILURE(rc))
4347	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot register BIOS I/O handlers"));
4348	}
4349
4350	/* Set up the compatibility I/O range. */
4351	rc = buslogicR3RegisterISARange(pThis, pThis->uDefaultISABaseCode);
4352	if (RT_FAILURE(rc))
4353	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot register ISA I/O handlers"));
4354
4355	/* Initialize task queue. */
4356	rc = PDMDevHlpQueueCreate(pDevIns, sizeof(PDMQUEUEITEMCORE), 5, 0,
4357	buslogicR3NotifyQueueConsumer, true, "BusLogicTask", &pThis->pNotifierQueueR3);
4358	if (RT_FAILURE(rc))
4359	return rc;
4360	pThis->pNotifierQueueR0 = PDMQueueR0Ptr(pThis->pNotifierQueueR3);
4361	pThis->pNotifierQueueRC = PDMQueueRCPtr(pThis->pNotifierQueueR3);
4362
4363	rc = PDMDevHlpCritSectInit(pDevIns, &pThis->CritSectIntr, RT_SRC_POS, "BusLogic-Intr#%u", pDevIns->iInstance);
4364	if (RT_FAILURE(rc))
4365	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic: cannot create critical section"));
4366
4367	/*
4368	* Create event semaphore and worker thread.
4369	*/
4370	rc = SUPSemEventCreate(pThis->pSupDrvSession, &pThis->hEvtProcess);
4371	if (RT_FAILURE(rc))
4372	return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
4373	N_("BusLogic: Failed to create SUP event semaphore"));
4374
4375	char szDevTag[20];
4376	RTStrPrintf(szDevTag, sizeof(szDevTag), "BUSLOGIC-%u", iInstance);
4377
4378	rc = PDMDevHlpThreadCreate(pDevIns, &pThis->pThreadWrk, pThis, buslogicR3Worker,
4379	buslogicR3WorkerWakeUp, 0, RTTHREADTYPE_IO, szDevTag);
4380	if (RT_FAILURE(rc))
4381	return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
4382	N_("BusLogic: Failed to create worker thread %s"), szDevTag);
4383
4384	/* Initialize per device state. */
4385	for (unsigned i = 0; i < RT_ELEMENTS(pThis->aDeviceStates); i++)
4386	{
4387	char szName[24];
4388	PBUSLOGICDEVICE pDevice = &pThis->aDeviceStates[i];
4389
4390	char *pszName;
4391	if (RTStrAPrintf(&pszName, "Device%u", i) < 0)
4392	AssertLogRelFailedReturn(VERR_NO_MEMORY);
4393
4394	/* Initialize static parts of the device. */
4395	pDevice->iLUN = i;
4396	pDevice->pBusLogicR3 = pThis;
4397	pDevice->pBusLogicR0 = PDMINS_2_DATA_R0PTR(pDevIns);
4398	pDevice->pBusLogicRC = PDMINS_2_DATA_RCPTR(pDevIns);
4399	pDevice->Led.u32Magic = PDMLED_MAGIC;
4400	pDevice->IBase.pfnQueryInterface = buslogicR3DeviceQueryInterface;
4401	pDevice->IMediaPort.pfnQueryDeviceLocation = buslogicR3QueryDeviceLocation;
4402	pDevice->IMediaExPort.pfnIoReqCompleteNotify = buslogicR3IoReqCompleteNotify;
4403	pDevice->IMediaExPort.pfnIoReqCopyFromBuf = buslogicR3IoReqCopyFromBuf;
4404	pDevice->IMediaExPort.pfnIoReqCopyToBuf = buslogicR3IoReqCopyToBuf;
4405	pDevice->IMediaExPort.pfnIoReqQueryBuf = NULL;
4406	pDevice->IMediaExPort.pfnIoReqQueryDiscardRanges = NULL;
4407	pDevice->IMediaExPort.pfnIoReqStateChanged = buslogicR3IoReqStateChanged;
4408	pDevice->IMediaExPort.pfnMediumEjected = buslogicR3MediumEjected;
4409	pDevice->ILed.pfnQueryStatusLed = buslogicR3DeviceQueryStatusLed;
4410
4411	/* Attach SCSI driver. */
4412	rc = PDMDevHlpDriverAttach(pDevIns, pDevice->iLUN, &pDevice->IBase, &pDevice->pDrvBase, pszName);
4413	if (RT_SUCCESS(rc))
4414	{
4415	/* Query the media interface. */
4416	pDevice->pDrvMedia = PDMIBASE_QUERY_INTERFACE(pDevice->pDrvBase, PDMIMEDIA);
4417	AssertMsgReturn(VALID_PTR(pDevice->pDrvMedia),
4418	("Buslogic configuration error: LUN#%d misses the basic media interface!\n", pDevice->iLUN),
4419	VERR_PDM_MISSING_INTERFACE);
4420
4421	/* Get the extended media interface. */
4422	pDevice->pDrvMediaEx = PDMIBASE_QUERY_INTERFACE(pDevice->pDrvBase, PDMIMEDIAEX);
4423	AssertMsgReturn(VALID_PTR(pDevice->pDrvMediaEx),
4424	("Buslogic configuration error: LUN#%d misses the extended media interface!\n", pDevice->iLUN),
4425	VERR_PDM_MISSING_INTERFACE);
4426
4427	rc = pDevice->pDrvMediaEx->pfnIoReqAllocSizeSet(pDevice->pDrvMediaEx, sizeof(BUSLOGICREQ));
4428	if (RT_FAILURE(rc))
4429	return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,
4430	N_("Buslogic configuration error: LUN#%u: Failed to set I/O request size!"),
4431	pDevice->iLUN);
4432
4433	pDevice->fPresent = true;
4434	}
4435	else if (rc == VERR_PDM_NO_ATTACHED_DRIVER)
4436	{
4437	pDevice->fPresent = false;
4438	pDevice->pDrvBase = NULL;
4439	pDevice->pDrvMedia = NULL;
4440	pDevice->pDrvMediaEx = NULL;
4441	rc = VINF_SUCCESS;
4442	Log(("BusLogic: no driver attached to device %s\n", szName));
4443	}
4444	else
4445	{
4446	AssertLogRelMsgFailed(("BusLogic: Failed to attach %s\n", szName));
4447	return rc;
4448	}
4449	}
4450
4451	/*
4452	* Attach status driver (optional).
4453	*/
4454	PPDMIBASE pBase;
4455	rc = PDMDevHlpDriverAttach(pDevIns, PDM_STATUS_LUN, &pThis->IBase, &pBase, "Status Port");
4456	if (RT_SUCCESS(rc))
4457	{
4458	pThis->pLedsConnector = PDMIBASE_QUERY_INTERFACE(pBase, PDMILEDCONNECTORS);
4459	pThis->pMediaNotify = PDMIBASE_QUERY_INTERFACE(pBase, PDMIMEDIANOTIFY);
4460	}
4461	else if (rc != VERR_PDM_NO_ATTACHED_DRIVER)
4462	{
4463	AssertMsgFailed(("Failed to attach to status driver. rc=%Rrc\n", rc));
4464	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot attach to status driver"));
4465	}
4466
4467	rc = PDMDevHlpSSMRegisterEx(pDevIns, BUSLOGIC_SAVED_STATE_MINOR_VERSION, sizeof(*pThis), NULL,
4468	NULL, buslogicR3LiveExec, NULL,
4469	NULL, buslogicR3SaveExec, NULL,
4470	NULL, buslogicR3LoadExec, buslogicR3LoadDone);
4471	if (RT_FAILURE(rc))
4472	return PDMDEV_SET_ERROR(pDevIns, rc, N_("BusLogic cannot register save state handlers"));
4473
4474	/*
4475	* Register the debugger info callback.
4476	*/
4477	char szTmp[128];
4478	RTStrPrintf(szTmp, sizeof(szTmp), "%s%d", pDevIns->pReg->szName, pDevIns->iInstance);
4479	PDMDevHlpDBGFInfoRegister(pDevIns, szTmp, "BusLogic HBA info", buslogicR3Info);
4480
4481	rc = buslogicR3HwReset(pThis, true);
4482	AssertMsgRC(rc, ("hardware reset of BusLogic host adapter failed rc=%Rrc\n", rc));
4483
4484	return rc;
4485	}
4486
4487	/**
4488	* The device registration structure.
4489	*/
4490	const PDMDEVREG g_DeviceBusLogic =
4491	{
4492	/* u32Version */
4493	PDM_DEVREG_VERSION,
4494	/* szName */
4495	"buslogic",
4496	/* szRCMod */
4497	"VBoxDDRC.rc",
4498	/* szR0Mod */
4499	"VBoxDDR0.r0",
4500	/* pszDescription */
4501	"BusLogic BT-958 SCSI host adapter.\n",
4502	/* fFlags */
4503	PDM_DEVREG_FLAGS_DEFAULT_BITS \| PDM_DEVREG_FLAGS_RC \| PDM_DEVREG_FLAGS_R0 \|
4504	PDM_DEVREG_FLAGS_FIRST_SUSPEND_NOTIFICATION \| PDM_DEVREG_FLAGS_FIRST_POWEROFF_NOTIFICATION \|
4505	PDM_DEVREG_FLAGS_FIRST_RESET_NOTIFICATION,
4506	/* fClass */
4507	PDM_DEVREG_CLASS_STORAGE,
4508	/* cMaxInstances */
4509	~0U,
4510	/* cbInstance */
4511	sizeof(BUSLOGIC),
4512	/* pfnConstruct */
4513	buslogicR3Construct,
4514	/* pfnDestruct */
4515	buslogicR3Destruct,
4516	/* pfnRelocate */
4517	buslogicR3Relocate,
4518	/* pfnMemSetup */
4519	NULL,
4520	/* pfnPowerOn */
4521	NULL,
4522	/* pfnReset */
4523	buslogicR3Reset,
4524	/* pfnSuspend */
4525	buslogicR3Suspend,
4526	/* pfnResume */
4527	NULL,
4528	/* pfnAttach */
4529	buslogicR3Attach,
4530	/* pfnDetach */
4531	buslogicR3Detach,
4532	/* pfnQueryInterface. */
4533	NULL,
4534	/* pfnInitComplete */
4535	NULL,
4536	/* pfnPowerOff */
4537	buslogicR3PowerOff,
4538	/* pfnSoftReset */
4539	NULL,
4540	/* u32VersionEnd */
4541	PDM_DEVREG_VERSION
4542	};
4543
4544	#endif /* IN_RING3 */
4545	#endif /* !VBOX_DEVICE_STRUCT_TESTCASE */

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source: vbox/trunk/src/VBox/Devices/Storage/DevBusLogic.cpp@ 76128

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